1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: opt < %s -instcombine -S | FileCheck %s
3
4; There should be no 'and' instructions left in any test.
5
6define i32 @test1(i32 %A) {
7; CHECK-LABEL: @test1(
8; CHECK-NEXT:    ret i32 0
9;
10  %B = and i32 %A, 0
11  ret i32 %B
12}
13
14define i32 @test2(i32 %A) {
15; CHECK-LABEL: @test2(
16; CHECK-NEXT:    ret i32 %A
17;
18  %B = and i32 %A, -1
19  ret i32 %B
20}
21
22define i1 @test3(i1 %A) {
23; CHECK-LABEL: @test3(
24; CHECK-NEXT:    ret i1 false
25;
26  %B = and i1 %A, false
27  ret i1 %B
28}
29
30define i1 @test4(i1 %A) {
31; CHECK-LABEL: @test4(
32; CHECK-NEXT:    ret i1 %A
33;
34  %B = and i1 %A, true
35  ret i1 %B
36}
37
38define i32 @test5(i32 %A) {
39; CHECK-LABEL: @test5(
40; CHECK-NEXT:    ret i32 %A
41;
42  %B = and i32 %A, %A
43  ret i32 %B
44}
45
46define i1 @test6(i1 %A) {
47; CHECK-LABEL: @test6(
48; CHECK-NEXT:    ret i1 %A
49;
50  %B = and i1 %A, %A
51  ret i1 %B
52}
53
54; A & ~A == 0
55define i32 @test7(i32 %A) {
56; CHECK-LABEL: @test7(
57; CHECK-NEXT:    ret i32 0
58;
59  %NotA = xor i32 %A, -1
60  %B = and i32 %A, %NotA
61  ret i32 %B
62}
63
64; AND associates
65define i8 @test8(i8 %A) {
66; CHECK-LABEL: @test8(
67; CHECK-NEXT:    ret i8 0
68;
69  %B = and i8 %A, 3
70  %C = and i8 %B, 4
71  ret i8 %C
72}
73
74; Test of sign bit, convert to setle %A, 0
75define i1 @test9(i32 %A) {
76; CHECK-LABEL: @test9(
77; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 %A, 0
78; CHECK-NEXT:    ret i1 [[C]]
79;
80  %B = and i32 %A, -2147483648
81  %C = icmp ne i32 %B, 0
82  ret i1 %C
83}
84
85; Test of sign bit, convert to setle %A, 0
86define i1 @test9a(i32 %A) {
87; CHECK-LABEL: @test9a(
88; CHECK-NEXT:    [[C:%.*]] = icmp slt i32 %A, 0
89; CHECK-NEXT:    ret i1 [[C]]
90;
91  %B = and i32 %A, -2147483648
92  %C = icmp ne i32 %B, 0
93  ret i1 %C
94}
95
96define i32 @test10(i32 %A) {
97; CHECK-LABEL: @test10(
98; CHECK-NEXT:    ret i32 1
99;
100  %B = and i32 %A, 12
101  %C = xor i32 %B, 15
102  ; (X ^ C1) & C2 --> (X & C2) ^ (C1&C2)
103  %D = and i32 %C, 1
104  ret i32 %D
105}
106
107define i32 @test11(i32 %A, i32* %P) {
108; CHECK-LABEL: @test11(
109; CHECK-NEXT:    [[B:%.*]] = or i32 %A, 3
110; CHECK-NEXT:    [[C:%.*]] = xor i32 [[B]], 12
111; CHECK-NEXT:    store i32 [[C]], i32* %P, align 4
112; CHECK-NEXT:    ret i32 3
113;
114  %B = or i32 %A, 3
115  %C = xor i32 %B, 12
116  ; additional use of C
117  store i32 %C, i32* %P
118  ; %C = and uint %B, 3 --> 3
119  %D = and i32 %C, 3
120  ret i32 %D
121}
122
123define i1 @test12(i32 %A, i32 %B) {
124; CHECK-LABEL: @test12(
125; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 %A, %B
126; CHECK-NEXT:    ret i1 [[TMP1]]
127;
128  %C1 = icmp ult i32 %A, %B
129  %C2 = icmp ule i32 %A, %B
130  ; (A < B) & (A <= B) === (A < B)
131  %D = and i1 %C1, %C2
132  ret i1 %D
133}
134
135define i1 @test13(i32 %A, i32 %B) {
136; CHECK-LABEL: @test13(
137; CHECK-NEXT:    ret i1 false
138;
139  %C1 = icmp ult i32 %A, %B
140  %C2 = icmp ugt i32 %A, %B
141  ; (A < B) & (A > B) === false
142  %D = and i1 %C1, %C2
143  ret i1 %D
144}
145
146define i1 @test14(i8 %A) {
147; CHECK-LABEL: @test14(
148; CHECK-NEXT:    [[C:%.*]] = icmp slt i8 %A, 0
149; CHECK-NEXT:    ret i1 [[C]]
150;
151  %B = and i8 %A, -128
152  %C = icmp ne i8 %B, 0
153  ret i1 %C
154}
155
156define i8 @test15(i8 %A) {
157; CHECK-LABEL: @test15(
158; CHECK-NEXT:    ret i8 0
159;
160  %B = lshr i8 %A, 7
161  ; Always equals zero
162  %C = and i8 %B, 2
163  ret i8 %C
164}
165
166define i8 @test16(i8 %A) {
167; CHECK-LABEL: @test16(
168; CHECK-NEXT:    ret i8 0
169;
170  %B = shl i8 %A, 2
171  %C = and i8 %B, 3
172  ret i8 %C
173}
174
175;; ~(~X & Y) --> (X | ~Y)
176define i8 @test17(i8 %X, i8 %Y) {
177; CHECK-LABEL: @test17(
178; CHECK-NEXT:    [[Y_NOT:%.*]] = xor i8 %Y, -1
179; CHECK-NEXT:    [[D:%.*]] = or i8 %X, [[Y_NOT]]
180; CHECK-NEXT:    ret i8 [[D]]
181;
182  %B = xor i8 %X, -1
183  %C = and i8 %B, %Y
184  %D = xor i8 %C, -1
185  ret i8 %D
186}
187
188define i1 @test18(i32 %A) {
189; CHECK-LABEL: @test18(
190; CHECK-NEXT:    [[C:%.*]] = icmp ugt i32 %A, 127
191; CHECK-NEXT:    ret i1 [[C]]
192;
193  %B = and i32 %A, -128
194  ;; C >= 128
195  %C = icmp ne i32 %B, 0
196  ret i1 %C
197}
198
199define <2 x i1> @test18_vec(<2 x i32> %A) {
200; CHECK-LABEL: @test18_vec(
201; CHECK-NEXT:    [[C:%.*]] = icmp ugt <2 x i32> %A, <i32 127, i32 127>
202; CHECK-NEXT:    ret <2 x i1> [[C]]
203;
204  %B = and <2 x i32> %A, <i32 -128, i32 -128>
205  %C = icmp ne <2 x i32> %B, zeroinitializer
206  ret <2 x i1> %C
207}
208
209define i1 @test18a(i8 %A) {
210; CHECK-LABEL: @test18a(
211; CHECK-NEXT:    [[C:%.*]] = icmp ult i8 %A, 2
212; CHECK-NEXT:    ret i1 [[C]]
213;
214  %B = and i8 %A, -2
215  %C = icmp eq i8 %B, 0
216  ret i1 %C
217}
218
219define <2 x i1> @test18a_vec(<2 x i8> %A) {
220; CHECK-LABEL: @test18a_vec(
221; CHECK-NEXT:    [[C:%.*]] = icmp ult <2 x i8> %A, <i8 2, i8 2>
222; CHECK-NEXT:    ret <2 x i1> [[C]]
223;
224  %B = and <2 x i8> %A, <i8 -2, i8 -2>
225  %C = icmp eq <2 x i8> %B, zeroinitializer
226  ret <2 x i1> %C
227}
228
229define i32 @test19(i32 %A) {
230; CHECK-LABEL: @test19(
231; CHECK-NEXT:    [[B:%.*]] = shl i32 %A, 3
232; CHECK-NEXT:    ret i32 [[B]]
233;
234  %B = shl i32 %A, 3
235  ;; Clearing a zero bit
236  %C = and i32 %B, -2
237  ret i32 %C
238}
239
240define i8 @test20(i8 %A) {
241; CHECK-LABEL: @test20(
242; CHECK-NEXT:    [[C:%.*]] = lshr i8 %A, 7
243; CHECK-NEXT:    ret i8 [[C]]
244;
245  %C = lshr i8 %A, 7
246  ;; Unneeded
247  %D = and i8 %C, 1
248  ret i8 %D
249}
250
251define i1 @test23(i32 %A) {
252; CHECK-LABEL: @test23(
253; CHECK-NEXT:    [[TMP1:%.*]] = icmp eq i32 %A, 2
254; CHECK-NEXT:    ret i1 [[TMP1]]
255;
256  %B = icmp sgt i32 %A, 1
257  %C = icmp sle i32 %A, 2
258  %D = and i1 %B, %C
259  ret i1 %D
260}
261
262; FIXME: Vectors should fold too.
263define <2 x i1> @test23vec(<2 x i32> %A) {
264; CHECK-LABEL: @test23vec(
265; CHECK-NEXT:    [[B:%.*]] = icmp sgt <2 x i32> %A, <i32 1, i32 1>
266; CHECK-NEXT:    [[C:%.*]] = icmp slt <2 x i32> %A, <i32 3, i32 3>
267; CHECK-NEXT:    [[D:%.*]] = and <2 x i1> [[B]], [[C]]
268; CHECK-NEXT:    ret <2 x i1> [[D]]
269;
270  %B = icmp sgt <2 x i32> %A, <i32 1, i32 1>
271  %C = icmp sle <2 x i32> %A, <i32 2, i32 2>
272  %D = and <2 x i1> %B, %C
273  ret <2 x i1> %D
274}
275
276define i1 @test24(i32 %A) {
277; CHECK-LABEL: @test24(
278; CHECK-NEXT:    [[TMP1:%.*]] = icmp sgt i32 %A, 2
279; CHECK-NEXT:    ret i1 [[TMP1]]
280;
281  %B = icmp sgt i32 %A, 1
282  %C = icmp ne i32 %A, 2
283  ;; A > 2
284  %D = and i1 %B, %C
285  ret i1 %D
286}
287
288define i1 @test25(i32 %A) {
289; CHECK-LABEL: @test25(
290; CHECK-NEXT:    [[A_OFF:%.*]] = add i32 %A, -50
291; CHECK-NEXT:    [[TMP1:%.*]] = icmp ult i32 [[A_OFF]], 50
292; CHECK-NEXT:    ret i1 [[TMP1]]
293;
294  %B = icmp sge i32 %A, 50
295  %C = icmp slt i32 %A, 100
296  %D = and i1 %B, %C
297  ret i1 %D
298}
299
300; FIXME: Vectors should fold too.
301define <2 x i1> @test25vec(<2 x i32> %A) {
302; CHECK-LABEL: @test25vec(
303; CHECK-NEXT:    [[B:%.*]] = icmp sgt <2 x i32> %A, <i32 49, i32 49>
304; CHECK-NEXT:    [[C:%.*]] = icmp slt <2 x i32> %A, <i32 100, i32 100>
305; CHECK-NEXT:    [[D:%.*]] = and <2 x i1> [[B]], [[C]]
306; CHECK-NEXT:    ret <2 x i1> [[D]]
307;
308  %B = icmp sge <2 x i32> %A, <i32 50, i32 50>
309  %C = icmp slt <2 x i32> %A, <i32 100, i32 100>
310  %D = and <2 x i1> %B, %C
311  ret <2 x i1> %D
312}
313
314define i1 @test26(i32 %A) {
315; CHECK-LABEL: @test26(
316; CHECK-NEXT:    [[A_OFF:%.*]] = add i32 %A, -49
317; CHECK-NEXT:    [[A_CMP:%.*]] = icmp ugt i32 [[A_OFF]], 1
318; CHECK-NEXT:    ret i1 [[A_CMP]]
319;
320  %B = icmp ne i32 %A, 49
321  %C = icmp ne i32 %A, 50
322  ;; (A-49) > 1
323  %D = and i1 %B, %C
324  ret i1 %D
325}
326
327define i8 @test27(i8 %A) {
328; CHECK-LABEL: @test27(
329; CHECK-NEXT:    ret i8 0
330;
331  %B = and i8 %A, 4
332  %C = sub i8 %B, 16
333  ;; 0xF0
334  %D = and i8 %C, -16
335  %E = add i8 %D, 16
336  ret i8 %E
337}
338
339;; This is juse a zero extending shr.
340define i32 @test28(i32 %X) {
341; CHECK-LABEL: @test28(
342; CHECK-NEXT:    [[Y1:%.*]] = lshr i32 %X, 24
343; CHECK-NEXT:    ret i32 [[Y1]]
344;
345  ;; Sign extend
346  %Y = ashr i32 %X, 24
347  ;; Mask out sign bits
348  %Z = and i32 %Y, 255
349  ret i32 %Z
350}
351
352define i32 @test29(i8 %X) {
353; CHECK-LABEL: @test29(
354; CHECK-NEXT:    [[Y:%.*]] = zext i8 %X to i32
355; CHECK-NEXT:    ret i32 [[Y]]
356;
357  %Y = zext i8 %X to i32
358  ;; Zero extend makes this unneeded.
359  %Z = and i32 %Y, 255
360  ret i32 %Z
361}
362
363define i32 @test30(i1 %X) {
364; CHECK-LABEL: @test30(
365; CHECK-NEXT:    [[Y:%.*]] = zext i1 %X to i32
366; CHECK-NEXT:    ret i32 [[Y]]
367;
368  %Y = zext i1 %X to i32
369  %Z = and i32 %Y, 1
370  ret i32 %Z
371}
372
373define i32 @test31(i1 %X) {
374; CHECK-LABEL: @test31(
375; CHECK-NEXT:    [[Y:%.*]] = zext i1 %X to i32
376; CHECK-NEXT:    [[Z:%.*]] = shl nuw nsw i32 [[Y]], 4
377; CHECK-NEXT:    ret i32 [[Z]]
378;
379  %Y = zext i1 %X to i32
380  %Z = shl i32 %Y, 4
381  %A = and i32 %Z, 16
382  ret i32 %A
383}
384
385define i32 @test32(i32 %In) {
386; CHECK-LABEL: @test32(
387; CHECK-NEXT:    ret i32 0
388;
389  %Y = and i32 %In, 16
390  %Z = lshr i32 %Y, 2
391  %A = and i32 %Z, 1
392  ret i32 %A
393}
394
395;; Code corresponding to one-bit bitfield ^1.
396define i32 @test33(i32 %b) {
397; CHECK-LABEL: @test33(
398; CHECK-NEXT:    [[TMP_13:%.*]] = xor i32 %b, 1
399; CHECK-NEXT:    ret i32 [[TMP_13]]
400;
401  %tmp.4.mask = and i32 %b, 1
402  %tmp.10 = xor i32 %tmp.4.mask, 1
403  %tmp.12 = and i32 %b, -2
404  %tmp.13 = or i32 %tmp.12, %tmp.10
405  ret i32 %tmp.13
406}
407
408define i32 @test34(i32 %A, i32 %B) {
409; CHECK-LABEL: @test34(
410; CHECK-NEXT:    ret i32 %B
411;
412  %tmp.2 = or i32 %B, %A
413  %tmp.4 = and i32 %tmp.2, %B
414  ret i32 %tmp.4
415}
416
417; FIXME: This test should only need -instsimplify (ValueTracking / computeKnownBits), not -instcombine.
418
419define <2 x i32> @PR24942(<2 x i32> %x) {
420; CHECK-LABEL: @PR24942(
421; CHECK-NEXT:    ret <2 x i32> zeroinitializer
422;
423  %lshr = lshr <2 x i32> %x, <i32 31, i32 31>
424  %and = and <2 x i32> %lshr, <i32 2, i32 2>
425  ret <2 x i32> %and
426}
427
428