1; RUN: opt < %s -instcombine -S | FileCheck %s
2
3define i32 @abs_abs_x01(i32 %x) {
4  %cmp = icmp sgt i32 %x, -1
5  %sub = sub nsw i32 0, %x
6  %cond = select i1 %cmp, i32 %x, i32 %sub
7  %cmp1 = icmp sgt i32 %cond, -1
8  %sub16 = sub nsw i32 0, %cond
9  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
10  ret i32 %cond18
11; CHECK-LABEL: @abs_abs_x01(
12; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
13; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
14; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
15; CHECK-NEXT: ret i32 [[SEL]]
16}
17
18define <2 x i32> @abs_abs_x01_vec(<2 x i32> %x) {
19; CHECK-LABEL: @abs_abs_x01_vec(
20; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
21; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, %x
22; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> %x, <2 x i32> [[SUB]]
23; CHECK-NEXT:    ret <2 x i32> [[COND]]
24;
25  %cmp = icmp sgt <2 x i32> %x, <i32 -1, i32 -1>
26  %sub = sub nsw <2 x i32> zeroinitializer, %x
27  %cond = select <2 x i1> %cmp, <2 x i32> %x, <2 x i32> %sub
28  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
29  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
30  %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
31  ret <2 x i32> %cond18
32}
33
34define i32 @abs_abs_x02(i32 %x) {
35  %cmp = icmp sgt i32 %x, 0
36  %sub = sub nsw i32 0, %x
37  %cond = select i1 %cmp, i32 %x, i32 %sub
38  %cmp1 = icmp sgt i32 %cond, -1
39  %sub16 = sub nsw i32 0, %cond
40  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
41  ret i32 %cond18
42; CHECK-LABEL: @abs_abs_x02(
43; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
44; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
45; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
46; CHECK-NEXT: ret i32 [[SEL]]
47}
48
49define i32 @abs_abs_x03(i32 %x) {
50  %cmp = icmp slt i32 %x, 0
51  %sub = sub nsw i32 0, %x
52  %cond = select i1 %cmp, i32 %sub, i32 %x
53  %cmp1 = icmp sgt i32 %cond, -1
54  %sub16 = sub nsw i32 0, %cond
55  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
56  ret i32 %cond18
57; CHECK-LABEL: @abs_abs_x03(
58; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
59; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
60; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
61; CHECK-NEXT: ret i32 [[SEL]]
62}
63
64define i32 @abs_abs_x04(i32 %x) {
65  %cmp = icmp slt i32 %x, 1
66  %sub = sub nsw i32 0, %x
67  %cond = select i1 %cmp, i32 %sub, i32 %x
68  %cmp1 = icmp sgt i32 %cond, -1
69  %sub16 = sub nsw i32 0, %cond
70  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
71  ret i32 %cond18
72; CHECK-LABEL: @abs_abs_x04(
73; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
74; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
75; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
76; CHECK-NEXT: ret i32 [[SEL]]
77}
78
79define <2 x i32> @abs_abs_x04_vec(<2 x i32> %x) {
80; CHECK-LABEL: @abs_abs_x04_vec(
81; CHECK-NEXT:    [[CMP:%.*]] = icmp slt <2 x i32> %x, <i32 1, i32 1>
82; CHECK-NEXT:    [[SUB:%.*]] = sub nsw <2 x i32> zeroinitializer, %x
83; CHECK-NEXT:    [[COND:%.*]] = select <2 x i1> [[CMP]], <2 x i32> [[SUB]], <2 x i32> %x
84; CHECK-NEXT:    ret <2 x i32> [[COND]]
85;
86  %cmp = icmp slt <2 x i32> %x, <i32 1, i32 1>
87  %sub = sub nsw <2 x i32> zeroinitializer, %x
88  %cond = select <2 x i1> %cmp, <2 x i32> %sub, <2 x i32> %x
89  %cmp1 = icmp sgt <2 x i32> %cond, <i32 -1, i32 -1>
90  %sub16 = sub nsw <2 x i32> zeroinitializer, %cond
91  %cond18 = select <2 x i1> %cmp1, <2 x i32> %cond, <2 x i32> %sub16
92  ret <2 x i32> %cond18
93}
94
95define i32 @abs_abs_x05(i32 %x) {
96  %cmp = icmp sgt i32 %x, -1
97  %sub = sub nsw i32 0, %x
98  %cond = select i1 %cmp, i32 %x, i32 %sub
99  %cmp1 = icmp sgt i32 %cond, 0
100  %sub16 = sub nsw i32 0, %cond
101  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
102  ret i32 %cond18
103; CHECK-LABEL: @abs_abs_x05(
104; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
105; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
106; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
107; CHECK-NEXT: ret i32 [[SEL]]
108}
109
110define i32 @abs_abs_x06(i32 %x) {
111  %cmp = icmp sgt i32 %x, 0
112  %sub = sub nsw i32 0, %x
113  %cond = select i1 %cmp, i32 %x, i32 %sub
114  %cmp1 = icmp sgt i32 %cond, 0
115  %sub16 = sub nsw i32 0, %cond
116  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
117  ret i32 %cond18
118; CHECK-LABEL: @abs_abs_x06(
119; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
120; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
121; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
122; CHECK-NEXT: ret i32 [[SEL]]
123}
124
125define i32 @abs_abs_x07(i32 %x) {
126  %cmp = icmp slt i32 %x, 0
127  %sub = sub nsw i32 0, %x
128  %cond = select i1 %cmp, i32 %sub, i32 %x
129  %cmp1 = icmp sgt i32 %cond, 0
130  %sub16 = sub nsw i32 0, %cond
131  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
132  ret i32 %cond18
133; CHECK-LABEL: @abs_abs_x07(
134; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
135; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
136; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
137; CHECK-NEXT: ret i32 [[SEL]]
138}
139
140define i32 @abs_abs_x08(i32 %x) {
141  %cmp = icmp slt i32 %x, 1
142  %sub = sub nsw i32 0, %x
143  %cond = select i1 %cmp, i32 %sub, i32 %x
144  %cmp1 = icmp sgt i32 %cond, 0
145  %sub16 = sub nsw i32 0, %cond
146  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
147  ret i32 %cond18
148; CHECK-LABEL: @abs_abs_x08(
149; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
150; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
151; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
152; CHECK-NEXT: ret i32 [[SEL]]
153}
154
155define i32 @abs_abs_x09(i32 %x) {
156  %cmp = icmp sgt i32 %x, -1
157  %sub = sub nsw i32 0, %x
158  %cond = select i1 %cmp, i32 %x, i32 %sub
159  %cmp1 = icmp slt i32 %cond, 0
160  %sub9 = sub nsw i32 0, %cond
161  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
162  ret i32 %cond18
163; CHECK-LABEL: @abs_abs_x09(
164; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
165; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
166; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
167; CHECK-NEXT: ret i32 [[SEL]]
168}
169
170define i32 @abs_abs_x10(i32 %x) {
171  %cmp = icmp sgt i32 %x, 0
172  %sub = sub nsw i32 0, %x
173  %cond = select i1 %cmp, i32 %x, i32 %sub
174  %cmp1 = icmp slt i32 %cond, 0
175  %sub9 = sub nsw i32 0, %cond
176  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
177  ret i32 %cond18
178; CHECK-LABEL: @abs_abs_x10(
179; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
180; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
181; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
182; CHECK-NEXT: ret i32 [[SEL]]
183}
184
185define i32 @abs_abs_x11(i32 %x) {
186  %cmp = icmp slt i32 %x, 0
187  %sub = sub nsw i32 0, %x
188  %cond = select i1 %cmp, i32 %sub, i32 %x
189  %cmp1 = icmp slt i32 %cond, 0
190  %sub9 = sub nsw i32 0, %cond
191  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
192  ret i32 %cond18
193; CHECK-LABEL: @abs_abs_x11(
194; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
195; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
196; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
197; CHECK-NEXT: ret i32 [[SEL]]
198}
199
200define i32 @abs_abs_x12(i32 %x) {
201  %cmp = icmp slt i32 %x, 1
202  %sub = sub nsw i32 0, %x
203  %cond = select i1 %cmp, i32 %sub, i32 %x
204  %cmp1 = icmp slt i32 %cond, 0
205  %sub9 = sub nsw i32 0, %cond
206  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
207  ret i32 %cond18
208; CHECK-LABEL: @abs_abs_x12(
209; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
210; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
211; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
212; CHECK-NEXT: ret i32 [[SEL]]
213}
214
215define i32 @abs_abs_x13(i32 %x) {
216  %cmp = icmp sgt i32 %x, -1
217  %sub = sub nsw i32 0, %x
218  %cond = select i1 %cmp, i32 %x, i32 %sub
219  %cmp1 = icmp slt i32 %cond, 1
220  %sub9 = sub nsw i32 0, %cond
221  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
222  ret i32 %cond18
223; CHECK-LABEL: @abs_abs_x13(
224; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
225; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
226; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
227; CHECK-NEXT: ret i32 [[SEL]]
228}
229
230define i32 @abs_abs_x14(i32 %x) {
231  %cmp = icmp sgt i32 %x, 0
232  %sub = sub nsw i32 0, %x
233  %cond = select i1 %cmp, i32 %x, i32 %sub
234  %cmp1 = icmp slt i32 %cond, 1
235  %sub9 = sub nsw i32 0, %cond
236  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
237  ret i32 %cond18
238; CHECK-LABEL: @abs_abs_x14(
239; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
240; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
241; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
242; CHECK-NEXT: ret i32 [[SEL]]
243}
244
245define i32 @abs_abs_x15(i32 %x) {
246  %cmp = icmp slt i32 %x, 0
247  %sub = sub nsw i32 0, %x
248  %cond = select i1 %cmp, i32 %sub, i32 %x
249  %cmp1 = icmp slt i32 %cond, 1
250  %sub9 = sub nsw i32 0, %cond
251  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
252  ret i32 %cond18
253; CHECK-LABEL: @abs_abs_x15(
254; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
255; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
256; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
257; CHECK-NEXT: ret i32 [[SEL]]
258}
259
260define i32 @abs_abs_x16(i32 %x) {
261  %cmp = icmp slt i32 %x, 1
262  %sub = sub nsw i32 0, %x
263  %cond = select i1 %cmp, i32 %sub, i32 %x
264  %cmp1 = icmp slt i32 %cond, 1
265  %sub9 = sub nsw i32 0, %cond
266  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
267  ret i32 %cond18
268; CHECK-LABEL: @abs_abs_x16(
269; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
270; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
271; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
272; CHECK-NEXT: ret i32 [[SEL]]
273}
274
275define i32 @nabs_nabs_x01(i32 %x) {
276  %cmp = icmp sgt i32 %x, -1
277  %sub = sub nsw i32 0, %x
278  %cond = select i1 %cmp, i32 %sub, i32 %x
279  %cmp1 = icmp sgt i32 %cond, -1
280  %sub9 = sub nsw i32 0, %cond
281  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
282  ret i32 %cond18
283; CHECK-LABEL: @nabs_nabs_x01(
284; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
285; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
286; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
287; CHECK-NEXT: ret i32 [[SEL]]
288}
289
290define i32 @nabs_nabs_x02(i32 %x) {
291  %cmp = icmp sgt i32 %x, 0
292  %sub = sub nsw i32 0, %x
293  %cond = select i1 %cmp, i32 %sub, i32 %x
294  %cmp1 = icmp sgt i32 %cond, -1
295  %sub9 = sub nsw i32 0, %cond
296  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
297  ret i32 %cond18
298; CHECK-LABEL: @nabs_nabs_x02(
299; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
300; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
301; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
302; CHECK-NEXT: ret i32 [[SEL]]
303}
304
305define i32 @nabs_nabs_x03(i32 %x) {
306  %cmp = icmp slt i32 %x, 0
307  %sub = sub nsw i32 0, %x
308  %cond = select i1 %cmp, i32 %x, i32 %sub
309  %cmp1 = icmp sgt i32 %cond, -1
310  %sub9 = sub nsw i32 0, %cond
311  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
312  ret i32 %cond18
313; CHECK-LABEL: @nabs_nabs_x03(
314; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
315; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
316; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
317; CHECK-NEXT: ret i32 [[SEL]]
318}
319
320define i32 @nabs_nabs_x04(i32 %x) {
321  %cmp = icmp slt i32 %x, 1
322  %sub = sub nsw i32 0, %x
323  %cond = select i1 %cmp, i32 %x, i32 %sub
324  %cmp1 = icmp sgt i32 %cond, -1
325  %sub9 = sub nsw i32 0, %cond
326  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
327  ret i32 %cond18
328; CHECK-LABEL: @nabs_nabs_x04(
329; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
330; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
331; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
332; CHECK-NEXT: ret i32 [[SEL]]
333}
334
335define i32 @nabs_nabs_x05(i32 %x) {
336  %cmp = icmp sgt i32 %x, -1
337  %sub = sub nsw i32 0, %x
338  %cond = select i1 %cmp, i32 %sub, i32 %x
339  %cmp1 = icmp sgt i32 %cond, 0
340  %sub9 = sub nsw i32 0, %cond
341  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
342  ret i32 %cond18
343; CHECK-LABEL: @nabs_nabs_x05(
344; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
345; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
346; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
347; CHECK-NEXT: ret i32 [[SEL]]
348}
349
350define i32 @nabs_nabs_x06(i32 %x) {
351  %cmp = icmp sgt i32 %x, 0
352  %sub = sub nsw i32 0, %x
353  %cond = select i1 %cmp, i32 %sub, i32 %x
354  %cmp1 = icmp sgt i32 %cond, 0
355  %sub9 = sub nsw i32 0, %cond
356  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
357  ret i32 %cond18
358; CHECK-LABEL: @nabs_nabs_x06(
359; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
360; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
361; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
362; CHECK-NEXT: ret i32 [[SEL]]
363}
364
365define i32 @nabs_nabs_x07(i32 %x) {
366  %cmp = icmp slt i32 %x, 0
367  %sub = sub nsw i32 0, %x
368  %cond = select i1 %cmp, i32 %x, i32 %sub
369  %cmp1 = icmp sgt i32 %cond, 0
370  %sub9 = sub nsw i32 0, %cond
371  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
372  ret i32 %cond18
373; CHECK-LABEL: @nabs_nabs_x07(
374; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
375; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
376; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
377; CHECK-NEXT: ret i32 [[SEL]]
378}
379
380define i32 @nabs_nabs_x08(i32 %x) {
381  %cmp = icmp slt i32 %x, 1
382  %sub = sub nsw i32 0, %x
383  %cond = select i1 %cmp, i32 %x, i32 %sub
384  %cmp1 = icmp sgt i32 %cond, 0
385  %sub9 = sub nsw i32 0, %cond
386  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
387  ret i32 %cond18
388; CHECK-LABEL: @nabs_nabs_x08(
389; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
390; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
391; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
392; CHECK-NEXT: ret i32 [[SEL]]
393}
394
395define i32 @nabs_nabs_x09(i32 %x) {
396  %cmp = icmp sgt i32 %x, -1
397  %sub = sub nsw i32 0, %x
398  %cond = select i1 %cmp, i32 %sub, i32 %x
399  %cmp1 = icmp slt i32 %cond, 0
400  %sub16 = sub nsw i32 0, %cond
401  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
402  ret i32 %cond18
403; CHECK-LABEL: @nabs_nabs_x09(
404; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
405; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
406; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
407; CHECK-NEXT: ret i32 [[SEL]]
408}
409
410define i32 @nabs_nabs_x10(i32 %x) {
411  %cmp = icmp sgt i32 %x, 0
412  %sub = sub nsw i32 0, %x
413  %cond = select i1 %cmp, i32 %sub, i32 %x
414  %cmp1 = icmp slt i32 %cond, 0
415  %sub16 = sub nsw i32 0, %cond
416  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
417  ret i32 %cond18
418; CHECK-LABEL: @nabs_nabs_x10(
419; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
420; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
421; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
422; CHECK-NEXT: ret i32 [[SEL]]
423}
424
425define i32 @nabs_nabs_x11(i32 %x) {
426  %cmp = icmp slt i32 %x, 0
427  %sub = sub nsw i32 0, %x
428  %cond = select i1 %cmp, i32 %x, i32 %sub
429  %cmp1 = icmp slt i32 %cond, 0
430  %sub16 = sub nsw i32 0, %cond
431  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
432  ret i32 %cond18
433; CHECK-LABEL: @nabs_nabs_x11(
434; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
435; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
436; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
437; CHECK-NEXT: ret i32 [[SEL]]
438}
439
440define i32 @nabs_nabs_x12(i32 %x) {
441  %cmp = icmp slt i32 %x, 1
442  %sub = sub nsw i32 0, %x
443  %cond = select i1 %cmp, i32 %x, i32 %sub
444  %cmp1 = icmp slt i32 %cond, 0
445  %sub16 = sub nsw i32 0, %cond
446  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
447  ret i32 %cond18
448; CHECK-LABEL: @nabs_nabs_x12(
449; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
450; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
451; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
452; CHECK-NEXT: ret i32 [[SEL]]
453}
454
455define i32 @nabs_nabs_x13(i32 %x) {
456  %cmp = icmp sgt i32 %x, -1
457  %sub = sub nsw i32 0, %x
458  %cond = select i1 %cmp, i32 %sub, i32 %x
459  %cmp1 = icmp slt i32 %cond, 1
460  %sub16 = sub nsw i32 0, %cond
461  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
462  ret i32 %cond18
463; CHECK-LABEL: @nabs_nabs_x13(
464; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
465; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
466; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
467; CHECK-NEXT: ret i32 [[SEL]]
468}
469
470define i32 @nabs_nabs_x14(i32 %x) {
471  %cmp = icmp sgt i32 %x, 0
472  %sub = sub nsw i32 0, %x
473  %cond = select i1 %cmp, i32 %sub, i32 %x
474  %cmp1 = icmp slt i32 %cond, 1
475  %sub16 = sub nsw i32 0, %cond
476  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
477  ret i32 %cond18
478; CHECK-LABEL: @nabs_nabs_x14(
479; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
480; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
481; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
482; CHECK-NEXT: ret i32 [[SEL]]
483}
484
485define i32 @nabs_nabs_x15(i32 %x) {
486  %cmp = icmp slt i32 %x, 0
487  %sub = sub nsw i32 0, %x
488  %cond = select i1 %cmp, i32 %x, i32 %sub
489  %cmp1 = icmp slt i32 %cond, 1
490  %sub16 = sub nsw i32 0, %cond
491  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
492  ret i32 %cond18
493; CHECK-LABEL: @nabs_nabs_x15(
494; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
495; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
496; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
497; CHECK-NEXT: ret i32 [[SEL]]
498}
499
500define i32 @nabs_nabs_x16(i32 %x) {
501  %cmp = icmp slt i32 %x, 1
502  %sub = sub nsw i32 0, %x
503  %cond = select i1 %cmp, i32 %x, i32 %sub
504  %cmp1 = icmp slt i32 %cond, 1
505  %sub16 = sub nsw i32 0, %cond
506  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
507  ret i32 %cond18
508; CHECK-LABEL: @nabs_nabs_x16(
509; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
510; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
511; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
512; CHECK-NEXT: ret i32 [[SEL]]
513}
514
515define i32 @abs_nabs_x01(i32 %x) {
516  %cmp = icmp sgt i32 %x, -1
517  %sub = sub nsw i32 0, %x
518  %cond = select i1 %cmp, i32 %sub, i32 %x
519  %cmp1 = icmp sgt i32 %cond, -1
520  %sub16 = sub nsw i32 0, %cond
521  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
522  ret i32 %cond18
523; CHECK-LABEL: @abs_nabs_x01(
524; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
525; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
526; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
527; CHECK-NEXT: ret i32 [[SEL]]
528}
529
530define i32 @abs_nabs_x02(i32 %x) {
531  %cmp = icmp sgt i32 %x, 0
532  %sub = sub nsw i32 0, %x
533  %cond = select i1 %cmp, i32 %sub, i32 %x
534  %cmp1 = icmp sgt i32 %cond, -1
535  %sub16 = sub nsw i32 0, %cond
536  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
537  ret i32 %cond18
538; CHECK-LABEL: @abs_nabs_x02(
539; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
540; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
541; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
542; CHECK-NEXT: ret i32 [[SEL]]
543}
544
545define i32 @abs_nabs_x03(i32 %x) {
546  %cmp = icmp slt i32 %x, 0
547  %sub = sub nsw i32 0, %x
548  %cond = select i1 %cmp, i32 %x, i32 %sub
549  %cmp1 = icmp sgt i32 %cond, -1
550  %sub16 = sub nsw i32 0, %cond
551  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
552  ret i32 %cond18
553; CHECK-LABEL: @abs_nabs_x03(
554; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
555; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
556; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
557; CHECK-NEXT: ret i32 [[SEL]]
558}
559
560define i32 @abs_nabs_x04(i32 %x) {
561  %cmp = icmp slt i32 %x, 1
562  %sub = sub nsw i32 0, %x
563  %cond = select i1 %cmp, i32 %x, i32 %sub
564  %cmp1 = icmp sgt i32 %cond, -1
565  %sub16 = sub nsw i32 0, %cond
566  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
567  ret i32 %cond18
568; CHECK-LABEL: @abs_nabs_x04(
569; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
570; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
571; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
572; CHECK-NEXT: ret i32 [[SEL]]
573}
574
575define i32 @abs_nabs_x05(i32 %x) {
576  %cmp = icmp sgt i32 %x, -1
577  %sub = sub nsw i32 0, %x
578  %cond = select i1 %cmp, i32 %sub, i32 %x
579  %cmp1 = icmp sgt i32 %cond, 0
580  %sub16 = sub nsw i32 0, %cond
581  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
582  ret i32 %cond18
583; CHECK-LABEL: @abs_nabs_x05(
584; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
585; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
586; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
587; CHECK-NEXT: ret i32 [[SEL]]
588}
589
590define i32 @abs_nabs_x06(i32 %x) {
591  %cmp = icmp sgt i32 %x, 0
592  %sub = sub nsw i32 0, %x
593  %cond = select i1 %cmp, i32 %sub, i32 %x
594  %cmp1 = icmp sgt i32 %cond, 0
595  %sub16 = sub nsw i32 0, %cond
596  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
597  ret i32 %cond18
598; CHECK-LABEL: @abs_nabs_x06(
599; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
600; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
601; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
602; CHECK-NEXT: ret i32 [[SEL]]
603}
604
605define i32 @abs_nabs_x07(i32 %x) {
606  %cmp = icmp slt i32 %x, 0
607  %sub = sub nsw i32 0, %x
608  %cond = select i1 %cmp, i32 %x, i32 %sub
609  %cmp1 = icmp sgt i32 %cond, 0
610  %sub16 = sub nsw i32 0, %cond
611  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
612  ret i32 %cond18
613; CHECK-LABEL: @abs_nabs_x07(
614; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
615; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
616; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
617; CHECK-NEXT: ret i32 [[SEL]]
618}
619
620define i32 @abs_nabs_x08(i32 %x) {
621  %cmp = icmp slt i32 %x, 1
622  %sub = sub nsw i32 0, %x
623  %cond = select i1 %cmp, i32 %x, i32 %sub
624  %cmp1 = icmp sgt i32 %cond, 0
625  %sub16 = sub nsw i32 0, %cond
626  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
627  ret i32 %cond18
628; CHECK-LABEL: @abs_nabs_x08(
629; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
630; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
631; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
632; CHECK-NEXT: ret i32 [[SEL]]
633}
634
635define i32 @abs_nabs_x09(i32 %x) {
636  %cmp = icmp sgt i32 %x, -1
637  %sub = sub nsw i32 0, %x
638  %cond = select i1 %cmp, i32 %sub, i32 %x
639  %cmp1 = icmp slt i32 %cond, 0
640  %sub9 = sub nsw i32 0, %cond
641  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
642  ret i32 %cond18
643; CHECK-LABEL: @abs_nabs_x09(
644; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
645; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
646; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
647; CHECK-NEXT: ret i32 [[SEL]]
648}
649
650define i32 @abs_nabs_x10(i32 %x) {
651  %cmp = icmp sgt i32 %x, 0
652  %sub = sub nsw i32 0, %x
653  %cond = select i1 %cmp, i32 %sub, i32 %x
654  %cmp1 = icmp slt i32 %cond, 0
655  %sub9 = sub nsw i32 0, %cond
656  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
657  ret i32 %cond18
658; CHECK-LABEL: @abs_nabs_x10(
659; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
660; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
661; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
662; CHECK-NEXT: ret i32 [[SEL]]
663}
664
665define i32 @abs_nabs_x11(i32 %x) {
666  %cmp = icmp slt i32 %x, 0
667  %sub = sub nsw i32 0, %x
668  %cond = select i1 %cmp, i32 %x, i32 %sub
669  %cmp1 = icmp slt i32 %cond, 0
670  %sub9 = sub nsw i32 0, %cond
671  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
672  ret i32 %cond18
673; CHECK-LABEL: @abs_nabs_x11(
674; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
675; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
676; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
677; CHECK-NEXT: ret i32 [[SEL]]
678}
679
680define i32 @abs_nabs_x12(i32 %x) {
681  %cmp = icmp slt i32 %x, 1
682  %sub = sub nsw i32 0, %x
683  %cond = select i1 %cmp, i32 %x, i32 %sub
684  %cmp1 = icmp slt i32 %cond, 0
685  %sub9 = sub nsw i32 0, %cond
686  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
687  ret i32 %cond18
688; CHECK-LABEL: @abs_nabs_x12(
689; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
690; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
691; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
692; CHECK-NEXT: ret i32 [[SEL]]
693}
694
695define i32 @abs_nabs_x13(i32 %x) {
696  %cmp = icmp sgt i32 %x, -1
697  %sub = sub nsw i32 0, %x
698  %cond = select i1 %cmp, i32 %sub, i32 %x
699  %cmp1 = icmp slt i32 %cond, 1
700  %sub9 = sub nsw i32 0, %cond
701  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
702  ret i32 %cond18
703; CHECK-LABEL: @abs_nabs_x13(
704; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
705; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
706; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
707; CHECK-NEXT: ret i32 [[SEL]]
708}
709
710define i32 @abs_nabs_x14(i32 %x) {
711  %cmp = icmp sgt i32 %x, 0
712  %sub = sub nsw i32 0, %x
713  %cond = select i1 %cmp, i32 %sub, i32 %x
714  %cmp1 = icmp slt i32 %cond, 1
715  %sub9 = sub nsw i32 0, %cond
716  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
717  ret i32 %cond18
718; CHECK-LABEL: @abs_nabs_x14(
719; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
720; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
721; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
722; CHECK-NEXT: ret i32 [[SEL]]
723}
724
725define i32 @abs_nabs_x15(i32 %x) {
726  %cmp = icmp slt i32 %x, 0
727  %sub = sub nsw i32 0, %x
728  %cond = select i1 %cmp, i32 %x, i32 %sub
729  %cmp1 = icmp slt i32 %cond, 1
730  %sub9 = sub nsw i32 0, %cond
731  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
732  ret i32 %cond18
733; CHECK-LABEL: @abs_nabs_x15(
734; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
735; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
736; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
737; CHECK-NEXT: ret i32 [[SEL]]
738}
739
740define i32 @abs_nabs_x16(i32 %x) {
741  %cmp = icmp slt i32 %x, 1
742  %sub = sub nsw i32 0, %x
743  %cond = select i1 %cmp, i32 %x, i32 %sub
744  %cmp1 = icmp slt i32 %cond, 1
745  %sub9 = sub nsw i32 0, %cond
746  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
747  ret i32 %cond18
748; CHECK-LABEL: @abs_nabs_x16(
749; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
750; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
751; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
752; CHECK-NEXT: ret i32 [[SEL]]
753}
754
755define i32 @nabs_abs_x01(i32 %x) {
756  %cmp = icmp sgt i32 %x, -1
757  %sub = sub nsw i32 0, %x
758  %cond = select i1 %cmp, i32 %x, i32 %sub
759  %cmp1 = icmp sgt i32 %cond, -1
760  %sub9 = sub nsw i32 0, %cond
761  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
762  ret i32 %cond18
763; CHECK-LABEL: @nabs_abs_x01(
764; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
765; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
766; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
767; CHECK-NEXT: ret i32 [[SEL]]
768}
769
770define i32 @nabs_abs_x02(i32 %x) {
771  %cmp = icmp sgt i32 %x, 0
772  %sub = sub nsw i32 0, %x
773  %cond = select i1 %cmp, i32 %x, i32 %sub
774  %cmp1 = icmp sgt i32 %cond, -1
775  %sub9 = sub nsw i32 0, %cond
776  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
777  ret i32 %cond18
778; CHECK-LABEL: @nabs_abs_x02(
779; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
780; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
781; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
782; CHECK-NEXT: ret i32 [[SEL]]
783}
784
785define i32 @nabs_abs_x03(i32 %x) {
786  %cmp = icmp slt i32 %x, 0
787  %sub = sub nsw i32 0, %x
788  %cond = select i1 %cmp, i32 %sub, i32 %x
789  %cmp1 = icmp sgt i32 %cond, -1
790  %sub9 = sub nsw i32 0, %cond
791  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
792  ret i32 %cond18
793; CHECK-LABEL: @nabs_abs_x03(
794; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
795; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
796; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
797; CHECK-NEXT: ret i32 [[SEL]]
798}
799
800define i32 @nabs_abs_x04(i32 %x) {
801  %cmp = icmp slt i32 %x, 1
802  %sub = sub nsw i32 0, %x
803  %cond = select i1 %cmp, i32 %sub, i32 %x
804  %cmp1 = icmp sgt i32 %cond, -1
805  %sub9 = sub nsw i32 0, %cond
806  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
807  ret i32 %cond18
808; CHECK-LABEL: @nabs_abs_x04(
809; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
810; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
811; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
812; CHECK-NEXT: ret i32 [[SEL]]
813}
814
815define i32 @nabs_abs_x05(i32 %x) {
816  %cmp = icmp sgt i32 %x, -1
817  %sub = sub nsw i32 0, %x
818  %cond = select i1 %cmp, i32 %x, i32 %sub
819  %cmp1 = icmp sgt i32 %cond, 0
820  %sub9 = sub nsw i32 0, %cond
821  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
822  ret i32 %cond18
823; CHECK-LABEL: @nabs_abs_x05(
824; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
825; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
826; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
827; CHECK-NEXT: ret i32 [[SEL]]
828}
829
830define i32 @nabs_abs_x06(i32 %x) {
831  %cmp = icmp sgt i32 %x, 0
832  %sub = sub nsw i32 0, %x
833  %cond = select i1 %cmp, i32 %x, i32 %sub
834  %cmp1 = icmp sgt i32 %cond, 0
835  %sub9 = sub nsw i32 0, %cond
836  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
837  ret i32 %cond18
838; CHECK-LABEL: @nabs_abs_x06(
839; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
840; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
841; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
842; CHECK-NEXT: ret i32 [[SEL]]
843}
844
845define i32 @nabs_abs_x07(i32 %x) {
846  %cmp = icmp slt i32 %x, 0
847  %sub = sub nsw i32 0, %x
848  %cond = select i1 %cmp, i32 %sub, i32 %x
849  %cmp1 = icmp sgt i32 %cond, 0
850  %sub9 = sub nsw i32 0, %cond
851  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
852  ret i32 %cond18
853; CHECK-LABEL: @nabs_abs_x07(
854; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
855; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
856; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
857; CHECK-NEXT: ret i32 [[SEL]]
858}
859
860define i32 @nabs_abs_x08(i32 %x) {
861  %cmp = icmp slt i32 %x, 1
862  %sub = sub nsw i32 0, %x
863  %cond = select i1 %cmp, i32 %sub, i32 %x
864  %cmp1 = icmp sgt i32 %cond, 0
865  %sub9 = sub nsw i32 0, %cond
866  %cond18 = select i1 %cmp1, i32 %sub9, i32 %cond
867  ret i32 %cond18
868; CHECK-LABEL: @nabs_abs_x08(
869; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
870; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
871; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
872; CHECK-NEXT: ret i32 [[SEL]]
873}
874
875define i32 @nabs_abs_x09(i32 %x) {
876  %cmp = icmp sgt i32 %x, -1
877  %sub = sub nsw i32 0, %x
878  %cond = select i1 %cmp, i32 %x, i32 %sub
879  %cmp1 = icmp slt i32 %cond, 0
880  %sub16 = sub nsw i32 0, %cond
881  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
882  ret i32 %cond18
883; CHECK-LABEL: @nabs_abs_x09(
884; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
885; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
886; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
887; CHECK-NEXT: ret i32 [[SEL]]
888}
889
890define i32 @nabs_abs_x10(i32 %x) {
891  %cmp = icmp sgt i32 %x, 0
892  %sub = sub nsw i32 0, %x
893  %cond = select i1 %cmp, i32 %x, i32 %sub
894  %cmp1 = icmp slt i32 %cond, 0
895  %sub16 = sub nsw i32 0, %cond
896  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
897  ret i32 %cond18
898; CHECK-LABEL: @nabs_abs_x10(
899; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
900; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
901; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
902; CHECK-NEXT: ret i32 [[SEL]]
903}
904
905define i32 @nabs_abs_x11(i32 %x) {
906  %cmp = icmp slt i32 %x, 0
907  %sub = sub nsw i32 0, %x
908  %cond = select i1 %cmp, i32 %sub, i32 %x
909  %cmp1 = icmp slt i32 %cond, 0
910  %sub16 = sub nsw i32 0, %cond
911  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
912  ret i32 %cond18
913; CHECK-LABEL: @nabs_abs_x11(
914; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
915; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
916; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
917; CHECK-NEXT: ret i32 [[SEL]]
918}
919
920define i32 @nabs_abs_x12(i32 %x) {
921  %cmp = icmp slt i32 %x, 1
922  %sub = sub nsw i32 0, %x
923  %cond = select i1 %cmp, i32 %sub, i32 %x
924  %cmp1 = icmp slt i32 %cond, 0
925  %sub16 = sub nsw i32 0, %cond
926  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
927  ret i32 %cond18
928; CHECK-LABEL: @nabs_abs_x12(
929; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
930; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
931; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
932; CHECK-NEXT: ret i32 [[SEL]]
933}
934
935define i32 @nabs_abs_x13(i32 %x) {
936  %cmp = icmp sgt i32 %x, -1
937  %sub = sub nsw i32 0, %x
938  %cond = select i1 %cmp, i32 %x, i32 %sub
939  %cmp1 = icmp slt i32 %cond, 1
940  %sub16 = sub nsw i32 0, %cond
941  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
942  ret i32 %cond18
943; CHECK-LABEL: @nabs_abs_x13(
944; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, -1
945; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
946; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
947; CHECK-NEXT: ret i32 [[SEL]]
948}
949
950define i32 @nabs_abs_x14(i32 %x) {
951  %cmp = icmp sgt i32 %x, 0
952  %sub = sub nsw i32 0, %x
953  %cond = select i1 %cmp, i32 %x, i32 %sub
954  %cmp1 = icmp slt i32 %cond, 1
955  %sub16 = sub nsw i32 0, %cond
956  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
957  ret i32 %cond18
958; CHECK-LABEL: @nabs_abs_x14(
959; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp sgt i32 %x, 0
960; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
961; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 [[NEG]], i32 %x
962; CHECK-NEXT: ret i32 [[SEL]]
963}
964
965define i32 @nabs_abs_x15(i32 %x) {
966  %cmp = icmp slt i32 %x, 0
967  %sub = sub nsw i32 0, %x
968  %cond = select i1 %cmp, i32 %sub, i32 %x
969  %cmp1 = icmp slt i32 %cond, 1
970  %sub16 = sub nsw i32 0, %cond
971  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
972  ret i32 %cond18
973; CHECK-LABEL: @nabs_abs_x15(
974; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 0
975; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
976; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
977; CHECK-NEXT: ret i32 [[SEL]]
978}
979
980define i32 @nabs_abs_x16(i32 %x) {
981  %cmp = icmp slt i32 %x, 1
982  %sub = sub nsw i32 0, %x
983  %cond = select i1 %cmp, i32 %sub, i32 %x
984  %cmp1 = icmp slt i32 %cond, 1
985  %sub16 = sub nsw i32 0, %cond
986  %cond18 = select i1 %cmp1, i32 %cond, i32 %sub16
987  ret i32 %cond18
988; CHECK-LABEL: @nabs_abs_x16(
989; CHECK-NEXT: [[CMP:%[a-z0-9]+]] = icmp slt i32 %x, 1
990; CHECK-NEXT: [[NEG:%[a-z0-9]+]] = sub nsw i32 0, %x
991; CHECK-NEXT: [[SEL:%[a-z0-9]+]] = select i1 [[CMP]], i32 %x, i32 [[NEG]]
992; CHECK-NEXT: ret i32 [[SEL]]
993}
994