1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals 2; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM 3; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=4 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM 4; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM 5; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM 6 7target triple = "amdgcn-amd-amdhsa" 8 9@ReachableKernel = internal addrspace(3) global i32 3, align 4 10@UnreachableKernel = internal addrspace(3) global i32 42, align 4 11@ReachableKernelAS0 = internal global i32 7, align 4 12 13;. 14; CHECK: @[[REACHABLEKERNEL:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 3, align 4 15; CHECK: @[[UNREACHABLEKERNEL:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 42, align 4 16; CHECK: @[[REACHABLEKERNELAS0:[a-zA-Z0-9_$"\\.-]+]] = internal global i32 7, align 4 17; CHECK: @[[REACHABLENONKERNEL:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 0, align 4 18; CHECK: @[[UNREACHABLENONKERNEL:[a-zA-Z0-9_$"\\.-]+]] = internal addrspace(3) global i32 0, align 4 19;. 20define dso_local void @kernel(i32 %C) norecurse "kernel" { 21; IS__TUNIT____: Function Attrs: norecurse nosync nounwind 22; IS__TUNIT____-LABEL: define {{[^@]+}}@kernel 23; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR0:[0-9]+]] { 24; IS__TUNIT____-NEXT: entry: 25; IS__TUNIT____-NEXT: call void @level1Kernel(i32 [[C]]) #[[ATTR3:[0-9]+]] 26; IS__TUNIT____-NEXT: ret void 27; 28; IS__CGSCC____: Function Attrs: norecurse nosync nounwind 29; IS__CGSCC____-LABEL: define {{[^@]+}}@kernel 30; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR0:[0-9]+]] { 31; IS__CGSCC____-NEXT: entry: 32; IS__CGSCC____-NEXT: call void @level1Kernel(i32 [[C]]) #[[ATTR4:[0-9]+]] 33; IS__CGSCC____-NEXT: ret void 34; 35entry: 36 call void @level1Kernel(i32 %C) 37 ret void 38} 39 40define internal void @level1Kernel(i32 %C) { 41; IS__TUNIT____: Function Attrs: norecurse nosync nounwind 42; IS__TUNIT____-LABEL: define {{[^@]+}}@level1Kernel 43; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR1:[0-9]+]] { 44; IS__TUNIT____-NEXT: entry: 45; IS__TUNIT____-NEXT: call void @level2Kernelall_early() #[[ATTR4:[0-9]+]] 46; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[C]], 0 47; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 48; IS__TUNIT____: if.then: 49; IS__TUNIT____-NEXT: call void @level2Kernela() #[[ATTR3]] 50; IS__TUNIT____-NEXT: br label [[IF_END:%.*]] 51; IS__TUNIT____: if.else: 52; IS__TUNIT____-NEXT: call void @level2Kernelb() #[[ATTR3]] 53; IS__TUNIT____-NEXT: br label [[IF_END]] 54; IS__TUNIT____: if.end: 55; IS__TUNIT____-NEXT: call void @level2Kernelall_late() #[[ATTR5:[0-9]+]] 56; IS__TUNIT____-NEXT: ret void 57; 58; IS__CGSCC____: Function Attrs: norecurse nosync nounwind 59; IS__CGSCC____-LABEL: define {{[^@]+}}@level1Kernel 60; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1:[0-9]+]] { 61; IS__CGSCC____-NEXT: entry: 62; IS__CGSCC____-NEXT: call void @level2Kernelall_early() #[[ATTR5:[0-9]+]] 63; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[C]], 0 64; IS__CGSCC____-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 65; IS__CGSCC____: if.then: 66; IS__CGSCC____-NEXT: call void @level2Kernela() #[[ATTR4]] 67; IS__CGSCC____-NEXT: br label [[IF_END:%.*]] 68; IS__CGSCC____: if.else: 69; IS__CGSCC____-NEXT: call void @level2Kernelb() #[[ATTR4]] 70; IS__CGSCC____-NEXT: br label [[IF_END]] 71; IS__CGSCC____: if.end: 72; IS__CGSCC____-NEXT: ret void 73; 74entry: 75 call void @level2Kernelall_early() 76 %tobool = icmp ne i32 %C, 0 77 br i1 %tobool, label %if.then, label %if.else 78 79if.then: ; preds = %entry 80 call void @level2Kernela() 81 br label %if.end 82 83if.else: ; preds = %entry 84 call void @level2Kernelb() 85 br label %if.end 86 87if.end: ; preds = %if.else, %if.then 88 call void @level2Kernelall_late() 89 ret void 90} 91 92define internal void @level2Kernelall_early() { 93; CHECK: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly 94; CHECK-LABEL: define {{[^@]+}}@level2Kernelall_early 95; CHECK-SAME: () #[[ATTR2:[0-9]+]] { 96; CHECK-NEXT: entry: 97; CHECK-NEXT: store i32 1, i32* @ReachableKernelAS0, align 4 98; CHECK-NEXT: store i32 1, i32* addrspacecast (i32 addrspace(3)* @ReachableKernel to i32*), align 4 99; CHECK-NEXT: ret void 100; 101entry: 102 store i32 1, i32* @ReachableKernelAS0, align 4 103 store i32 1, i32* addrspacecast (i32 addrspace(3)* @ReachableKernel to i32*), align 4 104 ret void 105} 106 107define internal void @level2Kernela() { 108; IS__TUNIT____: Function Attrs: norecurse nosync nounwind 109; IS__TUNIT____-LABEL: define {{[^@]+}}@level2Kernela 110; IS__TUNIT____-SAME: () #[[ATTR1]] { 111; IS__TUNIT____-NEXT: entry: 112; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableKernel to i32*), align 4 113; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* @ReachableKernelAS0, align 4 114; IS__TUNIT____-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 noundef 42) #[[ATTR6:[0-9]+]] 115; IS__TUNIT____-NEXT: ret void 116; 117; IS__CGSCC____: Function Attrs: norecurse nosync nounwind 118; IS__CGSCC____-LABEL: define {{[^@]+}}@level2Kernela 119; IS__CGSCC____-SAME: () #[[ATTR1]] { 120; IS__CGSCC____-NEXT: entry: 121; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableKernel to i32*), align 4 122; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* @ReachableKernelAS0, align 4 123; IS__CGSCC____-NEXT: [[TMP2:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableKernel to i32*), align 4 124; IS__CGSCC____-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 noundef 42) #[[ATTR4]] 125; IS__CGSCC____-NEXT: ret void 126; 127entry: 128 %0 = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableKernel to i32*), align 4 129 %1 = load i32, i32* @ReachableKernelAS0, align 4 130 %2 = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableKernel to i32*), align 4 131 call void @use(i32 %0, i32 %1, i32 %2) 132 ret void 133} 134 135define internal void @level2Kernelb() { 136; IS__TUNIT____: Function Attrs: norecurse nosync nounwind 137; IS__TUNIT____-LABEL: define {{[^@]+}}@level2Kernelb 138; IS__TUNIT____-SAME: () #[[ATTR1]] { 139; IS__TUNIT____-NEXT: entry: 140; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableKernel to i32*), align 4 141; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* @ReachableKernelAS0, align 4 142; IS__TUNIT____-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 noundef 42) #[[ATTR6]] 143; IS__TUNIT____-NEXT: ret void 144; 145; IS__CGSCC____: Function Attrs: norecurse nosync nounwind 146; IS__CGSCC____-LABEL: define {{[^@]+}}@level2Kernelb 147; IS__CGSCC____-SAME: () #[[ATTR1]] { 148; IS__CGSCC____-NEXT: entry: 149; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableKernel to i32*), align 4 150; IS__CGSCC____-NEXT: [[TMP1:%.*]] = load i32, i32* @ReachableKernelAS0, align 4 151; IS__CGSCC____-NEXT: [[TMP2:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableKernel to i32*), align 4 152; IS__CGSCC____-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 noundef 42) #[[ATTR4]] 153; IS__CGSCC____-NEXT: ret void 154; 155entry: 156 %0 = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableKernel to i32*), align 4 157 %1 = load i32, i32* @ReachableKernelAS0, align 4 158 %2 = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableKernel to i32*), align 4 159 call void @use(i32 %0, i32 %1, i32 %2) 160 ret void 161} 162 163define internal void @level2Kernelall_late() { 164; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly 165; IS__TUNIT____-LABEL: define {{[^@]+}}@level2Kernelall_late 166; IS__TUNIT____-SAME: () #[[ATTR2]] { 167; IS__TUNIT____-NEXT: entry: 168; IS__TUNIT____-NEXT: ret void 169; 170; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 171; IS__CGSCC____-LABEL: define {{[^@]+}}@level2Kernelall_late 172; IS__CGSCC____-SAME: () #[[ATTR3:[0-9]+]] { 173; IS__CGSCC____-NEXT: entry: 174; IS__CGSCC____-NEXT: ret void 175; 176entry: 177 store i32 1, i32 *addrspacecast (i32 addrspace(3)* @UnreachableKernel to i32*), align 4 178 ret void 179} 180 181@ReachableNonKernel = internal addrspace(3) global i32 0, align 4 182@UnreachableNonKernel = internal addrspace(3) global i32 0, align 4 183 184define dso_local void @non_kernel(i32 %C) norecurse { 185; IS__TUNIT____: Function Attrs: norecurse nosync nounwind 186; IS__TUNIT____-LABEL: define {{[^@]+}}@non_kernel 187; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 188; IS__TUNIT____-NEXT: entry: 189; IS__TUNIT____-NEXT: call void @level1(i32 [[C]]) #[[ATTR3]] 190; IS__TUNIT____-NEXT: ret void 191; 192; IS__CGSCC____: Function Attrs: norecurse nosync nounwind 193; IS__CGSCC____-LABEL: define {{[^@]+}}@non_kernel 194; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 195; IS__CGSCC____-NEXT: entry: 196; IS__CGSCC____-NEXT: call void @level1(i32 [[C]]) #[[ATTR4]] 197; IS__CGSCC____-NEXT: ret void 198; 199entry: 200 call void @level1(i32 %C) 201 ret void 202} 203 204define internal void @level1(i32 %C) { 205; IS__TUNIT____: Function Attrs: norecurse nosync nounwind 206; IS__TUNIT____-LABEL: define {{[^@]+}}@level1 207; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 208; IS__TUNIT____-NEXT: entry: 209; IS__TUNIT____-NEXT: [[LOCAL:%.*]] = alloca i32, align 4 210; IS__TUNIT____-NEXT: call void @level2all_early(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR4]] 211; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[C]], 0 212; IS__TUNIT____-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 213; IS__TUNIT____: if.then: 214; IS__TUNIT____-NEXT: call void @level2a() #[[ATTR3]] 215; IS__TUNIT____-NEXT: br label [[IF_END:%.*]] 216; IS__TUNIT____: if.else: 217; IS__TUNIT____-NEXT: call void @level2b() #[[ATTR3]] 218; IS__TUNIT____-NEXT: br label [[IF_END]] 219; IS__TUNIT____: if.end: 220; IS__TUNIT____-NEXT: call void @level2all_late(i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[LOCAL]]) #[[ATTR5]] 221; IS__TUNIT____-NEXT: ret void 222; 223; IS__CGSCC_OPM: Function Attrs: norecurse nosync nounwind 224; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@level1 225; IS__CGSCC_OPM-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 226; IS__CGSCC_OPM-NEXT: entry: 227; IS__CGSCC_OPM-NEXT: [[LOCAL:%.*]] = alloca i32, align 4 228; IS__CGSCC_OPM-NEXT: call void @level2all_early(i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) undef) #[[ATTR5]] 229; IS__CGSCC_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[C]], 0 230; IS__CGSCC_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 231; IS__CGSCC_OPM: if.then: 232; IS__CGSCC_OPM-NEXT: call void @level2a(i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) undef) #[[ATTR4]] 233; IS__CGSCC_OPM-NEXT: br label [[IF_END:%.*]] 234; IS__CGSCC_OPM: if.else: 235; IS__CGSCC_OPM-NEXT: call void @level2b(i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) undef) #[[ATTR4]] 236; IS__CGSCC_OPM-NEXT: br label [[IF_END]] 237; IS__CGSCC_OPM: if.end: 238; IS__CGSCC_OPM-NEXT: call void @level2all_late(i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) undef) #[[ATTR6:[0-9]+]] 239; IS__CGSCC_OPM-NEXT: ret void 240; 241; IS__CGSCC_NPM: Function Attrs: norecurse nosync nounwind 242; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@level1 243; IS__CGSCC_NPM-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 244; IS__CGSCC_NPM-NEXT: entry: 245; IS__CGSCC_NPM-NEXT: [[LOCAL:%.*]] = alloca i32, align 4 246; IS__CGSCC_NPM-NEXT: call void @level2all_early(i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) undef) #[[ATTR5]] 247; IS__CGSCC_NPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[C]], 0 248; IS__CGSCC_NPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 249; IS__CGSCC_NPM: if.then: 250; IS__CGSCC_NPM-NEXT: call void @level2a(i32 undef) #[[ATTR4]] 251; IS__CGSCC_NPM-NEXT: br label [[IF_END:%.*]] 252; IS__CGSCC_NPM: if.else: 253; IS__CGSCC_NPM-NEXT: call void @level2b(i32 undef) #[[ATTR6:[0-9]+]] 254; IS__CGSCC_NPM-NEXT: br label [[IF_END]] 255; IS__CGSCC_NPM: if.end: 256; IS__CGSCC_NPM-NEXT: call void @level2all_late(i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) undef) #[[ATTR7:[0-9]+]] 257; IS__CGSCC_NPM-NEXT: ret void 258; 259entry: 260 %local = alloca i32 261 call void @level2all_early(i32* %local) 262 %tobool = icmp ne i32 %C, 0 263 br i1 %tobool, label %if.then, label %if.else 264 265if.then: ; preds = %entry 266 call void @level2a(i32* %local) 267 br label %if.end 268 269if.else: ; preds = %entry 270 call void @level2b(i32* %local) 271 br label %if.end 272 273if.end: ; preds = %if.else, %if.then 274 call void @level2all_late(i32* %local) 275 ret void 276} 277 278define internal void @level2all_early(i32* %addr) { 279; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly 280; IS__TUNIT____-LABEL: define {{[^@]+}}@level2all_early 281; IS__TUNIT____-SAME: (i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] { 282; IS__TUNIT____-NEXT: entry: 283; IS__TUNIT____-NEXT: store i32 1, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 284; IS__TUNIT____-NEXT: ret void 285; 286; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly 287; IS__CGSCC____-LABEL: define {{[^@]+}}@level2all_early 288; IS__CGSCC____-SAME: (i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] { 289; IS__CGSCC____-NEXT: entry: 290; IS__CGSCC____-NEXT: store i32 1, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 291; IS__CGSCC____-NEXT: ret void 292; 293entry: 294 store i32 1, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 295 store i32 17, i32* %addr, align 4 296 ret void 297} 298 299define internal void @level2a(i32* %addr) { 300; IS__TUNIT____: Function Attrs: norecurse nosync nounwind 301; IS__TUNIT____-LABEL: define {{[^@]+}}@level2a 302; IS__TUNIT____-SAME: () #[[ATTR1]] { 303; IS__TUNIT____-NEXT: entry: 304; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 305; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 306; IS__TUNIT____-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 17) #[[ATTR6]] 307; IS__TUNIT____-NEXT: ret void 308; 309; IS__CGSCC_OPM: Function Attrs: norecurse nosync nounwind 310; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@level2a 311; IS__CGSCC_OPM-SAME: (i32* noalias nocapture nofree nonnull readnone align 4294967296 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR1]] { 312; IS__CGSCC_OPM-NEXT: entry: 313; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 314; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 315; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* undef, align 4294967296 316; IS__CGSCC_OPM-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 17) #[[ATTR4]] 317; IS__CGSCC_OPM-NEXT: ret void 318; 319; IS__CGSCC_NPM: Function Attrs: norecurse nosync nounwind 320; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@level2a 321; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR1]] { 322; IS__CGSCC_NPM-NEXT: entry: 323; IS__CGSCC_NPM-NEXT: [[ADDR_PRIV:%.*]] = alloca i32, align 4 324; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 325; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 326; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ADDR_PRIV]], align 4 327; IS__CGSCC_NPM-NEXT: call void @use(i32 noundef [[TMP1]], i32 noundef [[TMP2]], i32 17) #[[ATTR4]] 328; IS__CGSCC_NPM-NEXT: ret void 329; 330entry: 331 %0 = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 332 %1 = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 333 %2 = load i32, i32* %addr 334 call void @use(i32 %0, i32 %1, i32 %2) 335 ret void 336} 337 338define internal void @level2b(i32* %addr) { 339; IS__TUNIT____: Function Attrs: norecurse nosync nounwind 340; IS__TUNIT____-LABEL: define {{[^@]+}}@level2b 341; IS__TUNIT____-SAME: () #[[ATTR1]] { 342; IS__TUNIT____-NEXT: entry: 343; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 344; IS__TUNIT____-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 345; IS__TUNIT____-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 17) #[[ATTR6]] 346; IS__TUNIT____-NEXT: ret void 347; 348; IS__CGSCC_OPM: Function Attrs: norecurse nosync nounwind 349; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@level2b 350; IS__CGSCC_OPM-SAME: (i32* noalias nocapture nofree nonnull readnone align 4294967296 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR1]] { 351; IS__CGSCC_OPM-NEXT: entry: 352; IS__CGSCC_OPM-NEXT: [[TMP0:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 353; IS__CGSCC_OPM-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 354; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = load i32, i32* undef, align 4294967296 355; IS__CGSCC_OPM-NEXT: call void @use(i32 noundef [[TMP0]], i32 noundef [[TMP1]], i32 17) #[[ATTR4]] 356; IS__CGSCC_OPM-NEXT: ret void 357; 358; IS__CGSCC_NPM: Function Attrs: norecurse nosync nounwind 359; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@level2b 360; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR1]] { 361; IS__CGSCC_NPM-NEXT: entry: 362; IS__CGSCC_NPM-NEXT: [[ADDR_PRIV:%.*]] = alloca i32, align 4 363; IS__CGSCC_NPM-NEXT: [[TMP1:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 364; IS__CGSCC_NPM-NEXT: [[TMP2:%.*]] = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 365; IS__CGSCC_NPM-NEXT: [[TMP3:%.*]] = load i32, i32* [[ADDR_PRIV]], align 4 366; IS__CGSCC_NPM-NEXT: call void @use(i32 noundef [[TMP1]], i32 noundef [[TMP2]], i32 17) #[[ATTR4]] 367; IS__CGSCC_NPM-NEXT: ret void 368; 369entry: 370 %0 = load i32, i32* addrspacecast (i32 addrspace(3)* @ReachableNonKernel to i32*), align 4 371 %1 = load i32, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 372 %2 = load i32, i32* %addr 373 call void @use(i32 %0, i32 %1, i32 %2) 374 ret void 375} 376 377define internal void @level2all_late(i32* %addr) { 378; IS__TUNIT____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly 379; IS__TUNIT____-LABEL: define {{[^@]+}}@level2all_late 380; IS__TUNIT____-SAME: (i32* noalias nocapture nofree noundef nonnull writeonly align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] { 381; IS__TUNIT____-NEXT: entry: 382; IS__TUNIT____-NEXT: store i32 1, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 383; IS__TUNIT____-NEXT: ret void 384; 385; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind willreturn writeonly 386; IS__CGSCC____-LABEL: define {{[^@]+}}@level2all_late 387; IS__CGSCC____-SAME: (i32* noalias nocapture nofree nonnull readnone align 4 dereferenceable(4) [[ADDR:%.*]]) #[[ATTR2]] { 388; IS__CGSCC____-NEXT: entry: 389; IS__CGSCC____-NEXT: store i32 1, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 390; IS__CGSCC____-NEXT: ret void 391; 392entry: 393 store i32 1, i32* addrspacecast (i32 addrspace(3)* @UnreachableNonKernel to i32*), align 4 394 store i32 5, i32* %addr, align 4 395 ret void 396} 397 398declare dso_local void @use(i32, i32, i32) nosync norecurse nounwind 399 400;. 401; IS__TUNIT____: attributes #[[ATTR0]] = { norecurse nosync nounwind "kernel" } 402; IS__TUNIT____: attributes #[[ATTR1]] = { norecurse nosync nounwind } 403; IS__TUNIT____: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind willreturn writeonly } 404; IS__TUNIT____: attributes #[[ATTR3]] = { nosync nounwind } 405; IS__TUNIT____: attributes #[[ATTR4]] = { nofree nosync nounwind willreturn writeonly } 406; IS__TUNIT____: attributes #[[ATTR5]] = { nosync nounwind writeonly } 407; IS__TUNIT____: attributes #[[ATTR6]] = { nounwind } 408;. 409; IS__CGSCC_OPM: attributes #[[ATTR0]] = { norecurse nosync nounwind "kernel" } 410; IS__CGSCC_OPM: attributes #[[ATTR1]] = { norecurse nosync nounwind } 411; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind willreturn writeonly } 412; IS__CGSCC_OPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn } 413; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nounwind } 414; IS__CGSCC_OPM: attributes #[[ATTR5]] = { nounwind willreturn writeonly } 415; IS__CGSCC_OPM: attributes #[[ATTR6]] = { nounwind writeonly } 416;. 417; IS__CGSCC_NPM: attributes #[[ATTR0]] = { norecurse nosync nounwind "kernel" } 418; IS__CGSCC_NPM: attributes #[[ATTR1]] = { norecurse nosync nounwind } 419; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind willreturn writeonly } 420; IS__CGSCC_NPM: attributes #[[ATTR3]] = { nofree norecurse nosync nounwind readnone willreturn } 421; IS__CGSCC_NPM: attributes #[[ATTR4]] = { nounwind } 422; IS__CGSCC_NPM: attributes #[[ATTR5]] = { nounwind willreturn writeonly } 423; IS__CGSCC_NPM: attributes #[[ATTR6]] = { nosync nounwind } 424; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nosync nounwind writeonly } 425;. 426