1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals 2; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=25 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM 3; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=25 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM 4; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM 5; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM 6 7; FIXME: CGSCC is not looking at callees and calleers even though it could be allowed. 8 9define i32 @test0(i32* %p) { 10; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 11; IS__TUNIT____-LABEL: define {{[^@]+}}@test0 12; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0:[0-9]+]] { 13; IS__TUNIT____-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG0:![0-9]+]] 14; IS__TUNIT____-NEXT: ret i32 [[A]] 15; 16; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 17; IS__CGSCC____-LABEL: define {{[^@]+}}@test0 18; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0:[0-9]+]] { 19; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG0:![0-9]+]] 20; IS__CGSCC____-NEXT: ret i32 [[A]] 21; 22 %a = load i32, i32* %p, !range !0 23 ret i32 %a 24} 25 26define i32 @test0-range-check(i32* %p) { 27; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 28; IS__TUNIT____-LABEL: define {{[^@]+}}@test0-range-check 29; IS__TUNIT____-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) #[[ATTR0]] { 30; IS__TUNIT____-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR3:[0-9]+]], !range [[RNG0]] 31; IS__TUNIT____-NEXT: ret i32 [[A]] 32; 33; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 34; IS__CGSCC____-LABEL: define {{[^@]+}}@test0-range-check 35; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 36; IS__CGSCC____-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3:[0-9]+]], !range [[RNG0]] 37; IS__CGSCC____-NEXT: ret i32 [[A]] 38; 39 %a = tail call i32 @test0(i32* %p) 40 ret i32 %a 41} 42 43declare void @use3-dummy(i1, i1, i1) 44define void @use3(i1, i1, i1) { 45; CHECK-LABEL: define {{[^@]+}}@use3 46; CHECK-SAME: (i1 [[TMP0:%.*]], i1 [[TMP1:%.*]], i1 [[TMP2:%.*]]) { 47; CHECK-NEXT: tail call void @use3-dummy(i1 [[TMP0]], i1 [[TMP1]], i1 [[TMP2]]) 48; CHECK-NEXT: ret void 49; 50 tail call void @use3-dummy(i1 %0, i1 %1, i1 %2) 51 ret void 52} 53 54; TEST0 icmp test 55define void @test0-icmp-check(i32* %p){ 56 ; ret = [0, 10) 57; IS__TUNIT____-LABEL: define {{[^@]+}}@test0-icmp-check 58; IS__TUNIT____-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) { 59; IS__TUNIT____-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR3]], !range [[RNG0]] 60; IS__TUNIT____-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 61; IS__TUNIT____-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 62; IS__TUNIT____-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 63; IS__TUNIT____-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 64; IS__TUNIT____-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) 65; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false) 66; IS__TUNIT____-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 67; IS__TUNIT____-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 68; IS__TUNIT____-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1 69; IS__TUNIT____-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0 70; IS__TUNIT____-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]]) 71; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true) 72; IS__TUNIT____-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8 73; IS__TUNIT____-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1 74; IS__TUNIT____-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0 75; IS__TUNIT____-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]]) 76; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false) 77; IS__TUNIT____-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9 78; IS__TUNIT____-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8 79; IS__TUNIT____-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1 80; IS__TUNIT____-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]]) 81; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false) 82; IS__TUNIT____-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8 83; IS__TUNIT____-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1 84; IS__TUNIT____-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0 85; IS__TUNIT____-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]]) 86; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true) 87; IS__TUNIT____-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9 88; IS__TUNIT____-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8 89; IS__TUNIT____-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1 90; IS__TUNIT____-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]]) 91; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true) 92; IS__TUNIT____-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9 93; IS__TUNIT____-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8 94; IS__TUNIT____-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1 95; IS__TUNIT____-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]]) 96; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false) 97; IS__TUNIT____-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 98; IS__TUNIT____-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 99; IS__TUNIT____-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 100; IS__TUNIT____-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]]) 101; IS__TUNIT____-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false) 102; IS__TUNIT____-NEXT: ret void 103; 104; IS__CGSCC____-LABEL: define {{[^@]+}}@test0-icmp-check 105; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) { 106; IS__CGSCC____-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3]], !range [[RNG0]] 107; IS__CGSCC____-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 108; IS__CGSCC____-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 109; IS__CGSCC____-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 110; IS__CGSCC____-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 111; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) 112; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false) 113; IS__CGSCC____-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 114; IS__CGSCC____-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 115; IS__CGSCC____-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1 116; IS__CGSCC____-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0 117; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]]) 118; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true) 119; IS__CGSCC____-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8 120; IS__CGSCC____-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1 121; IS__CGSCC____-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0 122; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]]) 123; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false) 124; IS__CGSCC____-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9 125; IS__CGSCC____-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8 126; IS__CGSCC____-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1 127; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]]) 128; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false) 129; IS__CGSCC____-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8 130; IS__CGSCC____-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1 131; IS__CGSCC____-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0 132; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]]) 133; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true) 134; IS__CGSCC____-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9 135; IS__CGSCC____-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8 136; IS__CGSCC____-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1 137; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]]) 138; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true) 139; IS__CGSCC____-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9 140; IS__CGSCC____-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8 141; IS__CGSCC____-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1 142; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]]) 143; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false) 144; IS__CGSCC____-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 145; IS__CGSCC____-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 146; IS__CGSCC____-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 147; IS__CGSCC____-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]]) 148; IS__CGSCC____-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false) 149; IS__CGSCC____-NEXT: ret void 150; 151 %ret = tail call i32 @test0(i32 *%p) 152 153 ; ret = [0, 10), eq 154 %cmp-eq-1 = icmp eq i32 %ret, 10 155 %cmp-eq-2 = icmp eq i32 %ret, 9 156 %cmp-eq-3 = icmp eq i32 %ret, 8 157 %cmp-eq-4 = icmp eq i32 %ret, 1 158 %cmp-eq-5 = icmp eq i32 %ret, 0 159 %cmp-eq-6 = icmp eq i32 %ret, -1 160 tail call void @use3(i1 %cmp-eq-1, i1 %cmp-eq-2, i1 %cmp-eq-3) 161 tail call void @use3(i1 %cmp-eq-4, i1 %cmp-eq-5, i1 %cmp-eq-6) 162 163 ; ret = [0, 10), ne 164 %cmp-ne-1 = icmp ne i32 %ret, 10 165 %cmp-ne-2 = icmp ne i32 %ret, 9 166 %cmp-ne-3 = icmp ne i32 %ret, 8 167 %cmp-ne-4 = icmp ne i32 %ret, 1 168 %cmp-ne-5 = icmp ne i32 %ret, 0 169 %cmp-ne-6 = icmp ne i32 %ret, -1 170 tail call void @use3(i1 %cmp-ne-1, i1 %cmp-ne-2, i1 %cmp-ne-3) 171 tail call void @use3(i1 %cmp-ne-4, i1 %cmp-ne-5, i1 %cmp-ne-6) 172 173 ; ret = [0, 10), ugt 174 %cmp-ugt-1 = icmp ugt i32 %ret, 10 175 %cmp-ugt-2 = icmp ugt i32 %ret, 9 176 %cmp-ugt-3 = icmp ugt i32 %ret, 8 177 %cmp-ugt-4 = icmp ugt i32 %ret, 1 178 %cmp-ugt-5 = icmp ugt i32 %ret, 0 179 %cmp-ugt-6 = icmp ugt i32 %ret, -1 180 tail call void @use3(i1 %cmp-ugt-1, i1 %cmp-ugt-2, i1 %cmp-ugt-3) 181 tail call void @use3(i1 %cmp-ugt-4, i1 %cmp-ugt-5, i1 %cmp-ugt-6) 182 183 ; ret = [0, 10), uge 184 %cmp-uge-1 = icmp uge i32 %ret, 10 185 %cmp-uge-2 = icmp uge i32 %ret, 9 186 %cmp-uge-3 = icmp uge i32 %ret, 8 187 %cmp-uge-4 = icmp uge i32 %ret, 1 188 %cmp-uge-5 = icmp uge i32 %ret, 0 189 %cmp-uge-6 = icmp uge i32 %ret, -1 190 tail call void @use3(i1 %cmp-uge-1, i1 %cmp-uge-2, i1 %cmp-uge-3) 191 tail call void @use3(i1 %cmp-uge-4, i1 %cmp-uge-5, i1 %cmp-uge-6) 192 193 ; ret = [0, 10), sgt 194 %cmp-sgt-1 = icmp sgt i32 %ret, 10 195 %cmp-sgt-2 = icmp sgt i32 %ret, 9 196 %cmp-sgt-3 = icmp sgt i32 %ret, 8 197 %cmp-sgt-4 = icmp sgt i32 %ret, 1 198 %cmp-sgt-5 = icmp sgt i32 %ret, 0 199 %cmp-sgt-6 = icmp sgt i32 %ret, -1 200 tail call void @use3(i1 %cmp-sgt-1, i1 %cmp-sgt-2, i1 %cmp-sgt-3) 201 tail call void @use3(i1 %cmp-sgt-4, i1 %cmp-sgt-5, i1 %cmp-sgt-6) 202 203 ; ret = [0, 10), sge 204 %cmp-gte-1 = icmp sge i32 %ret, 10 205 %cmp-gte-2 = icmp sge i32 %ret, 9 206 %cmp-gte-3 = icmp sge i32 %ret, 8 207 %cmp-gte-4 = icmp sge i32 %ret, 1 208 %cmp-gte-5 = icmp sge i32 %ret, 0 209 %cmp-gte-6 = icmp sge i32 %ret, -1 210 tail call void @use3(i1 %cmp-gte-1, i1 %cmp-gte-2, i1 %cmp-gte-3) 211 tail call void @use3(i1 %cmp-gte-4, i1 %cmp-gte-5, i1 %cmp-gte-6) 212 213 ; ret = [0, 10), slt 214 %cmp-slt-1 = icmp slt i32 %ret, 10 215 %cmp-slt-2 = icmp slt i32 %ret, 9 216 %cmp-slt-3 = icmp slt i32 %ret, 8 217 %cmp-slt-4 = icmp slt i32 %ret, 1 218 %cmp-slt-5 = icmp slt i32 %ret, 0 219 %cmp-slt-6 = icmp slt i32 %ret, -1 220 tail call void @use3(i1 %cmp-slt-1, i1 %cmp-slt-2, i1 %cmp-slt-3) 221 tail call void @use3(i1 %cmp-slt-4, i1 %cmp-slt-5, i1 %cmp-slt-6) 222 223 ; ret = [0, 10), sle 224 %cmp-lte-1 = icmp sle i32 %ret, 10 225 %cmp-lte-2 = icmp sle i32 %ret, 9 226 %cmp-lte-3 = icmp sle i32 %ret, 8 227 %cmp-lte-4 = icmp sle i32 %ret, 1 228 %cmp-lte-5 = icmp sle i32 %ret, 0 229 %cmp-lte-6 = icmp sle i32 %ret, -1 230 tail call void @use3(i1 %cmp-lte-1, i1 %cmp-lte-2, i1 %cmp-lte-3) 231 tail call void @use3(i1 %cmp-lte-4, i1 %cmp-lte-5, i1 %cmp-lte-6) 232 233 ret void 234} 235define i32 @test1(i32* %p) { 236; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 237; IS__TUNIT____-LABEL: define {{[^@]+}}@test1 238; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 239; IS__TUNIT____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG1:![0-9]+]] 240; IS__TUNIT____-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10 241; IS__TUNIT____-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10 242; IS__TUNIT____-NEXT: ret i32 [[MUL_10_THEN_200_1091]] 243; 244; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 245; IS__CGSCC____-LABEL: define {{[^@]+}}@test1 246; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 247; IS__CGSCC____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG1:![0-9]+]] 248; IS__CGSCC____-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10 249; IS__CGSCC____-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10 250; IS__CGSCC____-NEXT: ret i32 [[MUL_10_THEN_200_1091]] 251; 252 %load-10-100 = load i32, i32* %p, !range !1 253 %add-10-then-20-110 = add i32 %load-10-100, 10 254 %mul-10-then-200-1091 = mul i32 %add-10-then-20-110, 10 255 ret i32 %mul-10-then-200-1091 256} 257 258define i1 @test1-check(i32* %p) { 259; 260; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 261; IS__TUNIT____-LABEL: define {{[^@]+}}@test1-check 262; IS__TUNIT____-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) #[[ATTR0]] { 263; IS__TUNIT____-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR3]], !range [[RNG2:![0-9]+]] 264; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 265; IS__TUNIT____-NEXT: ret i1 [[CMP]] 266; 267; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 268; IS__CGSCC____-LABEL: define {{[^@]+}}@test1-check 269; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 270; IS__CGSCC____-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3]], !range [[RNG2:![0-9]+]] 271; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 272; IS__CGSCC____-NEXT: ret i1 [[CMP]] 273; 274 %res = tail call i32 @test1(i32* %p) 275 %cmp = icmp eq i32 %res, 500 276 ret i1 %cmp 277} 278 279; TEST2 280; int test2(int *p) { return *p == 0 ? 4 : 3; } 281; int test2_check(int *p) { 282; int call = test2(p); 283; if (call == 5) { 284; // dead block 285; return 2; 286; } else { 287; return 3; 288; } 289; } 290 291define i32 @test2(i32* %p) { 292; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 293; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 294; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 295; IS__TUNIT____-NEXT: entry: 296; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4 297; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0 298; IS__TUNIT____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3 299; IS__TUNIT____-NEXT: ret i32 [[COND]] 300; 301; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 302; IS__CGSCC____-LABEL: define {{[^@]+}}@test2 303; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 304; IS__CGSCC____-NEXT: entry: 305; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4 306; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0 307; IS__CGSCC____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3 308; IS__CGSCC____-NEXT: ret i32 [[COND]] 309; 310entry: 311 %0 = load i32, i32* %p, align 4 312 %tobool = icmp eq i32 %0, 0 313 %cond = select i1 %tobool, i32 4, i32 3 314 ret i32 %cond 315} 316 317define i32 @test2_check(i32* %p) { 318; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 319; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_check 320; IS__TUNIT____-SAME: (i32* nocapture nofree readnone align 4 [[P:%.*]]) #[[ATTR1:[0-9]+]] { 321; IS__TUNIT____-NEXT: entry: 322; IS__TUNIT____-NEXT: br label [[IF_THEN:%.*]] 323; IS__TUNIT____: if.then: 324; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] 325; IS__TUNIT____: if.end: 326; IS__TUNIT____-NEXT: unreachable 327; IS__TUNIT____: return: 328; IS__TUNIT____-NEXT: ret i32 2 329; 330; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 331; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_check 332; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readnone align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR1:[0-9]+]] { 333; IS__CGSCC____-NEXT: entry: 334; IS__CGSCC____-NEXT: br label [[IF_THEN:%.*]] 335; IS__CGSCC____: if.then: 336; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] 337; IS__CGSCC____: if.end: 338; IS__CGSCC____-NEXT: unreachable 339; IS__CGSCC____: return: 340; IS__CGSCC____-NEXT: ret i32 2 341; 342entry: 343 %call = tail call i32 @test2(i32* %p) 344 %cmp = icmp slt i32 %call, 5 345 br i1 %cmp, label %if.then, label %if.end 346 347if.then: ; preds = %entry 348 br label %return 349 350if.end: ; preds = %entry 351 br label %return 352 353return: ; preds = %if.end, %if.then 354 %retval.0 = phi i32 [ 2, %if.then ], [ 3, %if.end ] 355 ret i32 %retval.0 356} 357 358; TEST 3 SECV test 359 360; void unkown(); 361; int r1(unsigned int u){ 362; int sum = 0; 363; for(int i = 0; i<100;i++){ 364; sum += i; 365; } 366; // sum = 50 * 49 / 2 367; if(sum > 10000){ 368; // dead block 369; return 20; 370; }else { 371; return 10; 372; } 373; } 374; void f1(int u){ 375; if(r1(u) > 15){ 376; // deadblock 377; unkown(); 378; }else { 379; return; 380; } 381; } 382 383declare dso_local void @unkown() 384 385define internal i32 @r1(i32) local_unnamed_addr { 386; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone 387; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@r1 388; IS__TUNIT_OPM-SAME: () local_unnamed_addr #[[ATTR2:[0-9]+]] { 389; IS__TUNIT_OPM-NEXT: br label [[TMP4:%.*]] 390; IS__TUNIT_OPM: 1: 391; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP7:%.*]], 10000 392; IS__TUNIT_OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[F:%.*]] 393; IS__TUNIT_OPM: 3: 394; IS__TUNIT_OPM-NEXT: ret i32 20 395; IS__TUNIT_OPM: f: 396; IS__TUNIT_OPM-NEXT: ret i32 10 397; IS__TUNIT_OPM: 4: 398; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP8:%.*]], [[TMP4]] ] 399; IS__TUNIT_OPM-NEXT: [[TMP6:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP7]], [[TMP4]] ] 400; IS__TUNIT_OPM-NEXT: [[TMP7]] = add nuw nsw i32 [[TMP5]], [[TMP6]] 401; IS__TUNIT_OPM-NEXT: [[TMP8]] = add nuw nsw i32 [[TMP5]], 1 402; IS__TUNIT_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 100 403; IS__TUNIT_OPM-NEXT: br i1 [[TMP9]], label [[TMP1:%.*]], label [[TMP4]] 404; 405; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone 406; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@r1 407; IS__CGSCC_OPM-SAME: () local_unnamed_addr #[[ATTR2:[0-9]+]] { 408; IS__CGSCC_OPM-NEXT: br label [[TMP4:%.*]] 409; IS__CGSCC_OPM: 1: 410; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP7:%.*]], 10000 411; IS__CGSCC_OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[F:%.*]] 412; IS__CGSCC_OPM: 3: 413; IS__CGSCC_OPM-NEXT: ret i32 20 414; IS__CGSCC_OPM: f: 415; IS__CGSCC_OPM-NEXT: ret i32 10 416; IS__CGSCC_OPM: 4: 417; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP8:%.*]], [[TMP4]] ] 418; IS__CGSCC_OPM-NEXT: [[TMP6:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP7]], [[TMP4]] ] 419; IS__CGSCC_OPM-NEXT: [[TMP7]] = add nuw nsw i32 [[TMP5]], [[TMP6]] 420; IS__CGSCC_OPM-NEXT: [[TMP8]] = add nuw nsw i32 [[TMP5]], 1 421; IS__CGSCC_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 100 422; IS__CGSCC_OPM-NEXT: br i1 [[TMP9]], label [[TMP1:%.*]], label [[TMP4]] 423; 424; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 425; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@r1 426; IS__CGSCC_NPM-SAME: () local_unnamed_addr #[[ATTR1]] { 427; IS__CGSCC_NPM-NEXT: br label [[TMP3:%.*]] 428; IS__CGSCC_NPM: 1: 429; IS__CGSCC_NPM-NEXT: br label [[F:%.*]] 430; IS__CGSCC_NPM: 2: 431; IS__CGSCC_NPM-NEXT: unreachable 432; IS__CGSCC_NPM: f: 433; IS__CGSCC_NPM-NEXT: ret i32 undef 434; IS__CGSCC_NPM: 3: 435; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[TMP3]] ] 436; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP6:%.*]], [[TMP3]] ] 437; IS__CGSCC_NPM-NEXT: [[TMP6]] = add nuw nsw i32 [[TMP4]], [[TMP5]] 438; IS__CGSCC_NPM-NEXT: [[TMP7]] = add nuw nsw i32 [[TMP4]], 1 439; IS__CGSCC_NPM-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 100 440; IS__CGSCC_NPM-NEXT: br i1 [[TMP8]], label [[TMP1:%.*]], label [[TMP3]] 441; 442 br label %5 443 4442: ; preds = %5 445 %3 = icmp sgt i32 %8, 10000 446 br i1 %3, label %4, label %f 4474: 448 ret i32 20 449f: 450 ret i32 10 4515: ; preds = %5, %1 452 %6 = phi i32 [ 0, %1 ], [ %9, %5 ] 453 %7 = phi i32 [ 0, %1 ], [ %8, %5 ] 454 %8 = add nuw nsw i32 %6, %7 455 %9 = add nuw nsw i32 %6, 1 456 %10 = icmp eq i32 %9, 100 457 br i1 %10, label %2, label %5 458} 459 460define void @f1(i32){ 461; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f1 462; IS__TUNIT_OPM-SAME: (i32 [[TMP0:%.*]]) { 463; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = tail call i32 @r1() #[[ATTR2]] 464; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 15 465; IS__TUNIT_OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]] 466; IS__TUNIT_OPM: 4: 467; IS__TUNIT_OPM-NEXT: tail call void @unkown() 468; IS__TUNIT_OPM-NEXT: br label [[TMP5]] 469; IS__TUNIT_OPM: 5: 470; IS__TUNIT_OPM-NEXT: ret void 471; 472; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn 473; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f1 474; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR1]] { 475; IS__TUNIT_NPM-NEXT: br label [[TMP3:%.*]] 476; IS__TUNIT_NPM: 2: 477; IS__TUNIT_NPM-NEXT: unreachable 478; IS__TUNIT_NPM: 3: 479; IS__TUNIT_NPM-NEXT: ret void 480; 481; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f1 482; IS__CGSCC_OPM-SAME: (i32 [[TMP0:%.*]]) { 483; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = tail call i32 @r1() #[[ATTR4:[0-9]+]], !range [[RNG3:![0-9]+]] 484; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 15 485; IS__CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]] 486; IS__CGSCC_OPM: 4: 487; IS__CGSCC_OPM-NEXT: tail call void @unkown() 488; IS__CGSCC_OPM-NEXT: br label [[TMP5]] 489; IS__CGSCC_OPM: 5: 490; IS__CGSCC_OPM-NEXT: ret void 491; 492; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 493; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f1 494; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR1]] { 495; IS__CGSCC_NPM-NEXT: br label [[TMP3:%.*]] 496; IS__CGSCC_NPM: 2: 497; IS__CGSCC_NPM-NEXT: unreachable 498; IS__CGSCC_NPM: 3: 499; IS__CGSCC_NPM-NEXT: ret void 500; 501 %2 = tail call i32 @r1(i32 %0) 502 %3 = icmp sgt i32 %2, 15 503 br i1 %3, label %4, label %5 504 5054: ; preds = %1 506 tail call void @unkown() 507 br label %5 508 5095: ; preds = %1, %4 510 ret void 511} 512 513; TEST4 LVI test 514 515; f1 516; int test4-f1(int u){ 517; if(u>=0) { 518; return u; 519; }else{ 520; return 0; 521; } 522; } 523define dso_local i32 @test4-f1(i32 %u) { 524; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 525; IS__TUNIT____-LABEL: define {{[^@]+}}@test4-f1 526; IS__TUNIT____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 527; IS__TUNIT____-NEXT: entry: 528; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1 529; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]] 530; IS__TUNIT____: if.then: 531; IS__TUNIT____-NEXT: br label [[RETURN]] 532; IS__TUNIT____: return: 533; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[U]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ] 534; IS__TUNIT____-NEXT: ret i32 [[RETVAL_0]] 535; 536; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 537; IS__CGSCC____-LABEL: define {{[^@]+}}@test4-f1 538; IS__CGSCC____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 539; IS__CGSCC____-NEXT: entry: 540; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1 541; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]] 542; IS__CGSCC____: if.then: 543; IS__CGSCC____-NEXT: br label [[RETURN]] 544; IS__CGSCC____: return: 545; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[U]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ] 546; IS__CGSCC____-NEXT: ret i32 [[RETVAL_0]] 547; 548; FIXME: RETVAL_0 >= 0 549entry: 550 %cmp = icmp sgt i32 %u, -1 551 br i1 %cmp, label %if.then, label %return 552 553if.then: ; preds = %entry 554 br label %return 555 556return: ; preds = %entry, %if.then 557 %retval.0 = phi i32 [ %u, %if.then ], [ 0, %entry ] 558 ret i32 %retval.0 559} 560 561 562define dso_local i32 @test4-g1(i32 %u) { 563; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 564; IS__TUNIT____-LABEL: define {{[^@]+}}@test4-g1 565; IS__TUNIT____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 566; IS__TUNIT____-NEXT: entry: 567; IS__TUNIT____-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR1]] 568; IS__TUNIT____-NEXT: ret i32 [[CALL]] 569; 570; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 571; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test4-g1 572; IS__CGSCC_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 573; IS__CGSCC_OPM-NEXT: entry: 574; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR5:[0-9]+]] 575; IS__CGSCC_OPM-NEXT: ret i32 [[CALL]] 576; 577; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 578; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4-g1 579; IS__CGSCC_NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 580; IS__CGSCC_NPM-NEXT: entry: 581; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR4:[0-9]+]] 582; IS__CGSCC_NPM-NEXT: ret i32 [[CALL]] 583; 584; FIXME: %call should have range [0, inf] 585 586entry: 587 %call = tail call i32 @test4-f1(i32 %u) 588 ret i32 %call 589} 590 591; f2 592; int test4-f1(int u){ 593; if(u>-1) { 594; return u+1; 595; }else{ 596; return 1; 597; } 598; } 599define dso_local i32 @test4-f2(i32 %u) { 600; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 601; IS__TUNIT____-LABEL: define {{[^@]+}}@test4-f2 602; IS__TUNIT____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 603; IS__TUNIT____-NEXT: entry: 604; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1 605; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 606; IS__TUNIT____: if.then: 607; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[U]], 1 608; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] 609; IS__TUNIT____: if.else: 610; IS__TUNIT____-NEXT: br label [[RETURN]] 611; IS__TUNIT____: return: 612; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[ADD]], [[IF_THEN]] ], [ 1, [[IF_ELSE]] ] 613; IS__TUNIT____-NEXT: ret i32 [[RETVAL_0]] 614; 615; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 616; IS__CGSCC____-LABEL: define {{[^@]+}}@test4-f2 617; IS__CGSCC____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 618; IS__CGSCC____-NEXT: entry: 619; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1 620; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 621; IS__CGSCC____: if.then: 622; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[U]], 1 623; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] 624; IS__CGSCC____: if.else: 625; IS__CGSCC____-NEXT: br label [[RETURN]] 626; IS__CGSCC____: return: 627; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[ADD]], [[IF_THEN]] ], [ 1, [[IF_ELSE]] ] 628; IS__CGSCC____-NEXT: ret i32 [[RETVAL_0]] 629; 630entry: 631 %cmp = icmp sgt i32 %u, -1 632 br i1 %cmp, label %if.then, label %if.else 633 634if.then: ; preds = %entry 635 %add = add nuw nsw i32 %u, 1 636 br label %return 637 638if.else: ; preds = %entry 639 br label %return 640 641return: ; preds = %if.else, %if.then 642 %retval.0 = phi i32 [ %add, %if.then ], [ 1, %if.else ] 643 ret i32 %retval.0 644} 645 646 647define dso_local i32 @test4-g2(i32 %u) { 648; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn 649; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test4-g2 650; IS__TUNIT_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 651; IS__TUNIT_OPM-NEXT: entry: 652; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR1]] 653; IS__TUNIT_OPM-NEXT: ret i32 [[CALL]] 654; 655; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn 656; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test4-g2 657; IS__TUNIT_NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 658; IS__TUNIT_NPM-NEXT: entry: 659; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR1]], !range [[RNG3:![0-9]+]] 660; IS__TUNIT_NPM-NEXT: ret i32 [[CALL]] 661; 662; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 663; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test4-g2 664; IS__CGSCC_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 665; IS__CGSCC_OPM-NEXT: entry: 666; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR5]] 667; IS__CGSCC_OPM-NEXT: ret i32 [[CALL]] 668; 669; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 670; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4-g2 671; IS__CGSCC_NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 672; IS__CGSCC_NPM-NEXT: entry: 673; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR4]], !range [[RNG3:![0-9]+]] 674; IS__CGSCC_NPM-NEXT: ret i32 [[CALL]] 675; 676entry: 677 %call = tail call i32 @test4-f2(i32 %u) 678 ret i32 %call 679} 680 681define dso_local i32 @test-5() { 682; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test-5() { 683; IS__TUNIT_OPM-NEXT: entry: 684; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noundef i32 @rec(i32 noundef 0), !range [[RNG3:![0-9]+]] 685; IS__TUNIT_OPM-NEXT: ret i32 [[CALL]] 686; 687; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@test-5() { 688; NOT_TUNIT_OPM-NEXT: entry: 689; NOT_TUNIT_OPM-NEXT: [[CALL:%.*]] = call noundef i32 @rec(i32 noundef 0), !range [[RNG4:![0-9]+]] 690; NOT_TUNIT_OPM-NEXT: ret i32 [[CALL]] 691; 692entry: 693 %call = call i32 @rec(i32 0) 694 ret i32 %call 695} 696define internal i32 @rec(i32 %depth) { 697; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@rec 698; IS__TUNIT_OPM-SAME: (i32 [[DEPTH:%.*]]) { 699; IS__TUNIT_OPM-NEXT: entry: 700; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @foo(i32 [[DEPTH]]) 701; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL]], 0 702; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 703; IS__TUNIT_OPM: if.then: 704; IS__TUNIT_OPM-NEXT: br label [[RETURN:%.*]] 705; IS__TUNIT_OPM: if.end: 706; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[DEPTH]], 10 707; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN1:%.*]], label [[IF_END3:%.*]] 708; IS__TUNIT_OPM: if.then1: 709; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[DEPTH]], 1 710; IS__TUNIT_OPM-NEXT: [[CALL2:%.*]] = call i32 @rec(i32 [[ADD]]), !range [[RNG3]] 711; IS__TUNIT_OPM-NEXT: br label [[IF_END3]] 712; IS__TUNIT_OPM: if.end3: 713; IS__TUNIT_OPM-NEXT: br label [[RETURN]] 714; IS__TUNIT_OPM: return: 715; IS__TUNIT_OPM-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 0, [[IF_THEN]] ], [ 1, [[IF_END3]] ] 716; IS__TUNIT_OPM-NEXT: ret i32 [[RETVAL_0]] 717; 718; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@rec 719; NOT_TUNIT_OPM-SAME: (i32 [[DEPTH:%.*]]) { 720; NOT_TUNIT_OPM-NEXT: entry: 721; NOT_TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @foo(i32 [[DEPTH]]) 722; NOT_TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL]], 0 723; NOT_TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 724; NOT_TUNIT_OPM: if.then: 725; NOT_TUNIT_OPM-NEXT: br label [[RETURN:%.*]] 726; NOT_TUNIT_OPM: if.end: 727; NOT_TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[DEPTH]], 10 728; NOT_TUNIT_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN1:%.*]], label [[IF_END3:%.*]] 729; NOT_TUNIT_OPM: if.then1: 730; NOT_TUNIT_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[DEPTH]], 1 731; NOT_TUNIT_OPM-NEXT: [[CALL2:%.*]] = call i32 @rec(i32 [[ADD]]), !range [[RNG4]] 732; NOT_TUNIT_OPM-NEXT: br label [[IF_END3]] 733; NOT_TUNIT_OPM: if.end3: 734; NOT_TUNIT_OPM-NEXT: br label [[RETURN]] 735; NOT_TUNIT_OPM: return: 736; NOT_TUNIT_OPM-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 0, [[IF_THEN]] ], [ 1, [[IF_END3]] ] 737; NOT_TUNIT_OPM-NEXT: ret i32 [[RETVAL_0]] 738; 739entry: 740 %call = call i32 @foo(i32 %depth) 741 %tobool = icmp ne i32 %call, 0 742 br i1 %tobool, label %if.then, label %if.end 743 744if.then: ; preds = %entry 745 br label %return 746 747if.end: ; preds = %entry 748 %cmp = icmp slt i32 %depth, 10 749 br i1 %cmp, label %if.then1, label %if.end3 750 751if.then1: ; preds = %if.end 752 %add = add nsw i32 %depth, 1 753 %call2 = call i32 @rec(i32 %add) 754 br label %if.end3 755 756if.end3: ; preds = %if.then1, %if.end 757 br label %return 758 759return: ; preds = %if.end3, %if.then 760 %retval.0 = phi i32 [ 0, %if.then ], [ 1, %if.end3 ] 761 ret i32 %retval.0 762} 763declare dso_local i32 @foo(i32) 764 765 766; Examples taken from https://llvm.discourse.group/t/impossible-condition-optimization/461/1 767; 768; The important part is that we return a constant (false) 769; 770; { 771 772; FIXME: All but the return is not needed anymore 773define dso_local zeroext i1 @phi(i32 %arg) { 774; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 775; IS__TUNIT____-LABEL: define {{[^@]+}}@phi 776; IS__TUNIT____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 777; IS__TUNIT____-NEXT: bb: 778; IS__TUNIT____-NEXT: [[TMP:%.*]] = icmp sgt i32 [[ARG]], 5 779; IS__TUNIT____-NEXT: br i1 [[TMP]], label [[BB1:%.*]], label [[BB2:%.*]] 780; IS__TUNIT____: bb1: 781; IS__TUNIT____-NEXT: br label [[BB3:%.*]] 782; IS__TUNIT____: bb2: 783; IS__TUNIT____-NEXT: br label [[BB3]] 784; IS__TUNIT____: bb3: 785; IS__TUNIT____-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[ARG]], 10 786; IS__TUNIT____-NEXT: br i1 [[TMP4]], label [[BB5:%.*]], label [[BB7:%.*]] 787; IS__TUNIT____: bb5: 788; IS__TUNIT____-NEXT: br label [[BB9:%.*]] 789; IS__TUNIT____: bb7: 790; IS__TUNIT____-NEXT: br label [[BB9]] 791; IS__TUNIT____: bb9: 792; IS__TUNIT____-NEXT: br label [[BB12:%.*]] 793; IS__TUNIT____: bb11: 794; IS__TUNIT____-NEXT: unreachable 795; IS__TUNIT____: bb12: 796; IS__TUNIT____-NEXT: br label [[BB13:%.*]] 797; IS__TUNIT____: bb13: 798; IS__TUNIT____-NEXT: ret i1 false 799; 800; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 801; IS__CGSCC____-LABEL: define {{[^@]+}}@phi 802; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 803; IS__CGSCC____-NEXT: bb: 804; IS__CGSCC____-NEXT: [[TMP:%.*]] = icmp sgt i32 [[ARG]], 5 805; IS__CGSCC____-NEXT: br i1 [[TMP]], label [[BB1:%.*]], label [[BB2:%.*]] 806; IS__CGSCC____: bb1: 807; IS__CGSCC____-NEXT: br label [[BB3:%.*]] 808; IS__CGSCC____: bb2: 809; IS__CGSCC____-NEXT: br label [[BB3]] 810; IS__CGSCC____: bb3: 811; IS__CGSCC____-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[ARG]], 10 812; IS__CGSCC____-NEXT: br i1 [[TMP4]], label [[BB5:%.*]], label [[BB7:%.*]] 813; IS__CGSCC____: bb5: 814; IS__CGSCC____-NEXT: br label [[BB9:%.*]] 815; IS__CGSCC____: bb7: 816; IS__CGSCC____-NEXT: br label [[BB9]] 817; IS__CGSCC____: bb9: 818; IS__CGSCC____-NEXT: br label [[BB12:%.*]] 819; IS__CGSCC____: bb11: 820; IS__CGSCC____-NEXT: unreachable 821; IS__CGSCC____: bb12: 822; IS__CGSCC____-NEXT: br label [[BB13:%.*]] 823; IS__CGSCC____: bb13: 824; IS__CGSCC____-NEXT: ret i1 false 825; 826bb: 827 %tmp = icmp sgt i32 %arg, 5 828 br i1 %tmp, label %bb1, label %bb2 829 830bb1: ; preds = %bb 831 br label %bb3 832 833bb2: ; preds = %bb 834 br label %bb3 835 836bb3: ; preds = %bb2, %bb1 837 %.02 = phi i32 [ 1, %bb1 ], [ 2, %bb2 ] 838 %tmp4 = icmp sgt i32 %arg, 10 839 br i1 %tmp4, label %bb5, label %bb7 840 841bb5: ; preds = %bb3 842 %tmp6 = add nsw i32 %.02, 1 843 br label %bb9 844 845bb7: ; preds = %bb3 846 %tmp8 = add nsw i32 %.02, 2 847 br label %bb9 848 849bb9: ; preds = %bb7, %bb5 850 %.01 = phi i32 [ %tmp6, %bb5 ], [ %tmp8, %bb7 ] 851 %tmp10 = icmp eq i32 %.01, 5 852 br i1 %tmp10, label %bb11, label %bb12 853 854bb11: ; preds = %bb9 855 br label %bb13 856 857bb12: ; preds = %bb9 858 br label %bb13 859 860bb13: ; preds = %bb12, %bb11 861 %.0 = phi i1 [ true, %bb11 ], [ false, %bb12 ] 862 ret i1 %.0 863} 864 865define dso_local i1 @select(i32 %a) local_unnamed_addr #0 { 866; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 867; IS__TUNIT____-LABEL: define {{[^@]+}}@select 868; IS__TUNIT____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 869; IS__TUNIT____-NEXT: entry: 870; IS__TUNIT____-NEXT: ret i1 false 871; 872; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 873; IS__CGSCC____-LABEL: define {{[^@]+}}@select 874; IS__CGSCC____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 875; IS__CGSCC____-NEXT: entry: 876; IS__CGSCC____-NEXT: ret i1 false 877; 878entry: 879 %cmp = icmp sgt i32 %a, 5 880 %. = select i1 %cmp, i32 1, i32 2 881 %cmp1 = icmp sgt i32 %a, 10 882 %y.0.v = select i1 %cmp1, i32 1, i32 2 883 %y.0 = add nuw nsw i32 %., %y.0.v 884 %cmp6 = icmp eq i32 %y.0, 5 885 ret i1 %cmp6 886} 887 888define dso_local i32 @select_zext(i32 %a) local_unnamed_addr #0 { 889; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 890; IS__TUNIT____-LABEL: define {{[^@]+}}@select_zext 891; IS__TUNIT____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 892; IS__TUNIT____-NEXT: entry: 893; IS__TUNIT____-NEXT: ret i32 0 894; 895; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 896; IS__CGSCC____-LABEL: define {{[^@]+}}@select_zext 897; IS__CGSCC____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 898; IS__CGSCC____-NEXT: entry: 899; IS__CGSCC____-NEXT: ret i32 0 900; 901entry: 902 %cmp = icmp sgt i32 %a, 5 903 %. = select i1 %cmp, i32 1, i32 2 904 %cmp1 = icmp sgt i32 %a, 10 905 %y.0.v = select i1 %cmp1, i32 1, i32 2 906 %y.0 = add nuw nsw i32 %., %y.0.v 907 %cmp6 = icmp eq i32 %y.0, 5 908 %.13 = zext i1 %cmp6 to i32 909 ret i32 %.13 910} 911 912define dso_local i64 @select_int2ptr_bitcast_ptr2int(i32 %a) local_unnamed_addr #0 { 913; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 914; IS__TUNIT____-LABEL: define {{[^@]+}}@select_int2ptr_bitcast_ptr2int 915; IS__TUNIT____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 916; IS__TUNIT____-NEXT: entry: 917; IS__TUNIT____-NEXT: ret i64 0 918; 919; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 920; IS__CGSCC____-LABEL: define {{[^@]+}}@select_int2ptr_bitcast_ptr2int 921; IS__CGSCC____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 922; IS__CGSCC____-NEXT: entry: 923; IS__CGSCC____-NEXT: ret i64 0 924; 925entry: 926 %cmp = icmp sgt i32 %a, 5 927 %. = select i1 %cmp, i32 1, i32 2 928 %cmp1 = icmp sgt i32 %a, 10 929 %y.0.v = select i1 %cmp1, i32 1, i32 2 930 %y.0 = add nuw nsw i32 %., %y.0.v 931 %cmp6 = icmp eq i32 %y.0, 5 932 %i2p = inttoptr i1 %cmp6 to i1* 933 %bc = bitcast i1* %i2p to i32* 934 %p2i = ptrtoint i32* %bc to i64 935 ret i64 %p2i 936} 937 938; } 939 940define i1 @f_fcmp(float %a, float %b) { 941; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 942; IS__TUNIT____-LABEL: define {{[^@]+}}@f_fcmp 943; IS__TUNIT____-SAME: (float [[A:%.*]], float [[B:%.*]]) #[[ATTR1]] { 944; IS__TUNIT____-NEXT: [[R:%.*]] = fcmp uge float [[A]], [[B]] 945; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 946; IS__TUNIT____-NEXT: ret i1 [[S]] 947; 948; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 949; IS__CGSCC____-LABEL: define {{[^@]+}}@f_fcmp 950; IS__CGSCC____-SAME: (float [[A:%.*]], float [[B:%.*]]) #[[ATTR1]] { 951; IS__CGSCC____-NEXT: [[R:%.*]] = fcmp uge float [[A]], [[B]] 952; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 953; IS__CGSCC____-NEXT: ret i1 [[S]] 954; 955 %r = fcmp uge float %a, %b 956 %s = select i1 %r, i1 %r, i1 0 957 ret i1 %s 958} 959define i1 @d_fcmp(double %a, double %b) { 960; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 961; IS__TUNIT____-LABEL: define {{[^@]+}}@d_fcmp 962; IS__TUNIT____-SAME: (double [[A:%.*]], double [[B:%.*]]) #[[ATTR1]] { 963; IS__TUNIT____-NEXT: [[R:%.*]] = fcmp oeq double [[A]], [[B]] 964; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 965; IS__TUNIT____-NEXT: ret i1 [[S]] 966; 967; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 968; IS__CGSCC____-LABEL: define {{[^@]+}}@d_fcmp 969; IS__CGSCC____-SAME: (double [[A:%.*]], double [[B:%.*]]) #[[ATTR1]] { 970; IS__CGSCC____-NEXT: [[R:%.*]] = fcmp oeq double [[A]], [[B]] 971; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 972; IS__CGSCC____-NEXT: ret i1 [[S]] 973; 974 %r = fcmp oeq double %a, %b 975 %s = select i1 %r, i1 %r, i1 0 976 ret i1 %s 977} 978define i1 @dp_icmp(double* %a, double* %b) { 979; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 980; IS__TUNIT____-LABEL: define {{[^@]+}}@dp_icmp 981; IS__TUNIT____-SAME: (double* nofree readnone [[A:%.*]], double* nofree readnone [[B:%.*]]) #[[ATTR1]] { 982; IS__TUNIT____-NEXT: [[R:%.*]] = icmp sge double* [[A]], [[B]] 983; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 984; IS__TUNIT____-NEXT: ret i1 [[S]] 985; 986; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 987; IS__CGSCC____-LABEL: define {{[^@]+}}@dp_icmp 988; IS__CGSCC____-SAME: (double* nofree readnone [[A:%.*]], double* nofree readnone [[B:%.*]]) #[[ATTR1]] { 989; IS__CGSCC____-NEXT: [[R:%.*]] = icmp sge double* [[A]], [[B]] 990; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 991; IS__CGSCC____-NEXT: ret i1 [[S]] 992; 993 %r = icmp sge double* %a, %b 994 %s = select i1 %r, i1 %r, i1 0 995 ret i1 %s 996} 997define i1 @ip_icmp(i8* %a, i8* %b) { 998; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 999; IS__TUNIT____-LABEL: define {{[^@]+}}@ip_icmp 1000; IS__TUNIT____-SAME: (i8* nofree readnone [[A:%.*]], i8* nofree readnone [[B:%.*]]) #[[ATTR1]] { 1001; IS__TUNIT____-NEXT: [[R:%.*]] = icmp ult i8* [[A]], [[B]] 1002; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 1003; IS__TUNIT____-NEXT: ret i1 [[S]] 1004; 1005; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1006; IS__CGSCC____-LABEL: define {{[^@]+}}@ip_icmp 1007; IS__CGSCC____-SAME: (i8* nofree readnone [[A:%.*]], i8* nofree readnone [[B:%.*]]) #[[ATTR1]] { 1008; IS__CGSCC____-NEXT: [[R:%.*]] = icmp ult i8* [[A]], [[B]] 1009; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 1010; IS__CGSCC____-NEXT: ret i1 [[S]] 1011; 1012 %r = icmp ult i8* %a, %b 1013 %s = select i1 %r, i1 %r, i1 0 1014 ret i1 %s 1015} 1016define i1 @fcmp_caller(float %fa, float %fb, double %da, double %db, double* %dpa, double* %dpb, i8* %ipa, i8* %ipb) { 1017; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1018; IS__TUNIT____-LABEL: define {{[^@]+}}@fcmp_caller 1019; IS__TUNIT____-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] { 1020; IS__TUNIT____-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR1]] 1021; IS__TUNIT____-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR1]] 1022; IS__TUNIT____-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR1]] 1023; IS__TUNIT____-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR1]] 1024; IS__TUNIT____-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]] 1025; IS__TUNIT____-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]] 1026; IS__TUNIT____-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]] 1027; IS__TUNIT____-NEXT: ret i1 [[O3]] 1028; 1029; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1030; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fcmp_caller 1031; IS__CGSCC_OPM-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] { 1032; IS__CGSCC_OPM-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR5]] 1033; IS__CGSCC_OPM-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR5]] 1034; IS__CGSCC_OPM-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR5]] 1035; IS__CGSCC_OPM-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR5]] 1036; IS__CGSCC_OPM-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]] 1037; IS__CGSCC_OPM-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]] 1038; IS__CGSCC_OPM-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]] 1039; IS__CGSCC_OPM-NEXT: ret i1 [[O3]] 1040; 1041; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1042; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fcmp_caller 1043; IS__CGSCC_NPM-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] { 1044; IS__CGSCC_NPM-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR4]] 1045; IS__CGSCC_NPM-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR4]] 1046; IS__CGSCC_NPM-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR4]] 1047; IS__CGSCC_NPM-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR4]] 1048; IS__CGSCC_NPM-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]] 1049; IS__CGSCC_NPM-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]] 1050; IS__CGSCC_NPM-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]] 1051; IS__CGSCC_NPM-NEXT: ret i1 [[O3]] 1052; 1053 %r1 = call i1 @f_fcmp(float %fa, float %fb) 1054 %r2 = call i1 @d_fcmp(double %da, double %db) 1055 %r3 = call i1 @dp_icmp(double* %dpa, double* %dpb) 1056 %r4 = call i1 @ip_icmp(i8* %ipa, i8* %ipb) 1057 %o1 = or i1 %r1, %r2 1058 %o2 = or i1 %r3, %r4 1059 %o3 = or i1 %o1, %o2 1060 ret i1 %o3 1061} 1062 1063define i8 @ret_two() { 1064; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1065; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_two 1066; IS__TUNIT____-SAME: () #[[ATTR1]] { 1067; IS__TUNIT____-NEXT: ret i8 2 1068; 1069; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1070; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_two 1071; IS__CGSCC____-SAME: () #[[ATTR1]] { 1072; IS__CGSCC____-NEXT: ret i8 2 1073; 1074 ret i8 2 1075} 1076define i8 @ret_undef() { 1077; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1078; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_undef 1079; IS__TUNIT____-SAME: () #[[ATTR1]] { 1080; IS__TUNIT____-NEXT: ret i8 undef 1081; 1082; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1083; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_undef 1084; IS__CGSCC____-SAME: () #[[ATTR1]] { 1085; IS__CGSCC____-NEXT: ret i8 undef 1086; 1087 ret i8 undef 1088} 1089 1090; Verify we collapse undef to a value and return something non-undef here. 1091define i8 @undef_collapse_1() { 1092; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1093; IS__TUNIT____-LABEL: define {{[^@]+}}@undef_collapse_1 1094; IS__TUNIT____-SAME: () #[[ATTR1]] { 1095; IS__TUNIT____-NEXT: ret i8 0 1096; 1097; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1098; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_collapse_1 1099; IS__CGSCC____-SAME: () #[[ATTR1]] { 1100; IS__CGSCC____-NEXT: ret i8 0 1101; 1102 %c = call i8 @ret_undef() 1103 %s = shl i8 %c, 2 1104 ret i8 %s 1105} 1106 1107; Verify we collapse undef to a value and return something non-undef here. 1108define i8 @undef_collapse_2() { 1109; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1110; IS__TUNIT____-LABEL: define {{[^@]+}}@undef_collapse_2 1111; IS__TUNIT____-SAME: () #[[ATTR1]] { 1112; IS__TUNIT____-NEXT: ret i8 0 1113; 1114; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1115; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_collapse_2 1116; IS__CGSCC____-SAME: () #[[ATTR1]] { 1117; IS__CGSCC____-NEXT: ret i8 0 1118; 1119 %c = call i8 @ret_two() 1120 %s = shl i8 undef, %c 1121 ret i8 %s 1122} 1123 1124define i8 @undef_collapse_caller() { 1125; 1126; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1127; IS__TUNIT____-LABEL: define {{[^@]+}}@undef_collapse_caller 1128; IS__TUNIT____-SAME: () #[[ATTR1]] { 1129; IS__TUNIT____-NEXT: ret i8 0 1130; 1131; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1132; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_collapse_caller 1133; IS__CGSCC____-SAME: () #[[ATTR1]] { 1134; IS__CGSCC____-NEXT: ret i8 0 1135; 1136 %c1 = call i8 @undef_collapse_1() 1137 %c2 = call i8 @undef_collapse_2() 1138 %a = add i8 %c1, %c2 1139 ret i8 %a 1140} 1141 1142define i32 @ret1or2(i1 %c) { 1143; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1144; IS__TUNIT____-LABEL: define {{[^@]+}}@ret1or2 1145; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1146; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[C]], i32 1, i32 2 1147; IS__TUNIT____-NEXT: ret i32 [[S]] 1148; 1149; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1150; IS__CGSCC____-LABEL: define {{[^@]+}}@ret1or2 1151; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1152; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[C]], i32 1, i32 2 1153; IS__CGSCC____-NEXT: ret i32 [[S]] 1154; 1155 %s = select i1 %c, i32 1, i32 2 1156 ret i32 %s 1157} 1158define i1 @callee_range_1(i1 %c1, i1 %c2, i1 %c3) { 1159; 1160; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1161; IS__TUNIT____-LABEL: define {{[^@]+}}@callee_range_1 1162; IS__TUNIT____-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]]) #[[ATTR1]] { 1163; IS__TUNIT____-NEXT: ret i1 true 1164; 1165; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1166; IS__CGSCC____-LABEL: define {{[^@]+}}@callee_range_1 1167; IS__CGSCC____-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]]) #[[ATTR1]] { 1168; IS__CGSCC____-NEXT: ret i1 true 1169; 1170 %r1 = call i32 @ret1or2(i1 %c1) 1171 %r2 = call i32 @ret1or2(i1 %c2) 1172 %indirection = select i1 %c3, i32 %r1, i32 %r2 1173 %a = add i32 %r1, %indirection 1174 %i1 = icmp sle i32 %a, 4 1175 %i2 = icmp sge i32 %a, 2 1176 %f = and i1 %i1, %i2 1177 ret i1 %f 1178} 1179 1180define i1 @callee_range_2(i1 %c1, i1 %c2) { 1181; 1182; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn 1183; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@callee_range_2 1184; IS__TUNIT_OPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { 1185; IS__TUNIT_OPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR1]], !range [[RNG4:![0-9]+]] 1186; IS__TUNIT_OPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR1]], !range [[RNG4]] 1187; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] 1188; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 1189; IS__TUNIT_OPM-NEXT: [[F:%.*]] = and i1 [[I1]], true 1190; IS__TUNIT_OPM-NEXT: ret i1 [[F]] 1191; 1192; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn 1193; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_range_2 1194; IS__TUNIT_NPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { 1195; IS__TUNIT_NPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR1]], !range [[RNG5:![0-9]+]] 1196; IS__TUNIT_NPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR1]], !range [[RNG5]] 1197; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] 1198; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 1199; IS__TUNIT_NPM-NEXT: ret i1 [[I1]] 1200; 1201; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1202; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@callee_range_2 1203; IS__CGSCC_OPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { 1204; IS__CGSCC_OPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR5]], !range [[RNG5:![0-9]+]] 1205; IS__CGSCC_OPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR5]], !range [[RNG5]] 1206; IS__CGSCC_OPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] 1207; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 1208; IS__CGSCC_OPM-NEXT: [[F:%.*]] = and i1 [[I1]], true 1209; IS__CGSCC_OPM-NEXT: ret i1 [[F]] 1210; 1211; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1212; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_range_2 1213; IS__CGSCC_NPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { 1214; IS__CGSCC_NPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR4]], !range [[RNG5:![0-9]+]] 1215; IS__CGSCC_NPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR4]], !range [[RNG5]] 1216; IS__CGSCC_NPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] 1217; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 1218; IS__CGSCC_NPM-NEXT: ret i1 [[I1]] 1219; 1220 %r1 = call i32 @ret1or2(i1 %c1) 1221 %r2 = call i32 @ret1or2(i1 %c2) 1222 %a = add i32 %r1, %r2 1223 %i1 = icmp sle i32 %a, 3 1224 %i2 = icmp sge i32 %a, 2 1225 %f = and i1 %i1, %i2 1226 ret i1 %f 1227} 1228 1229 1230define i32 @ret100() { 1231; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1232; IS__TUNIT____-LABEL: define {{[^@]+}}@ret100 1233; IS__TUNIT____-SAME: () #[[ATTR1]] { 1234; IS__TUNIT____-NEXT: ret i32 100 1235; 1236; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1237; IS__CGSCC____-LABEL: define {{[^@]+}}@ret100 1238; IS__CGSCC____-SAME: () #[[ATTR1]] { 1239; IS__CGSCC____-NEXT: ret i32 100 1240; 1241 ret i32 100 1242} 1243 1244define i1 @ctx_adjustment(i32 %V) { 1245; 1246; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn 1247; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@ctx_adjustment 1248; IS__TUNIT_OPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] { 1249; IS__TUNIT_OPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100 1250; IS__TUNIT_OPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] 1251; IS__TUNIT_OPM: if.true: 1252; IS__TUNIT_OPM-NEXT: br label [[END:%.*]] 1253; IS__TUNIT_OPM: if.false: 1254; IS__TUNIT_OPM-NEXT: br label [[END]] 1255; IS__TUNIT_OPM: end: 1256; IS__TUNIT_OPM-NEXT: [[PHI:%.*]] = phi i32 [ [[V]], [[IF_TRUE]] ], [ 100, [[IF_FALSE]] ] 1257; IS__TUNIT_OPM-NEXT: [[C2:%.*]] = icmp sge i32 [[PHI]], 100 1258; IS__TUNIT_OPM-NEXT: ret i1 [[C2]] 1259; 1260; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn 1261; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@ctx_adjustment 1262; IS__TUNIT_NPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] { 1263; IS__TUNIT_NPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100 1264; IS__TUNIT_NPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] 1265; IS__TUNIT_NPM: if.true: 1266; IS__TUNIT_NPM-NEXT: br label [[END:%.*]] 1267; IS__TUNIT_NPM: if.false: 1268; IS__TUNIT_NPM-NEXT: br label [[END]] 1269; IS__TUNIT_NPM: end: 1270; IS__TUNIT_NPM-NEXT: ret i1 true 1271; 1272; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1273; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@ctx_adjustment 1274; IS__CGSCC_OPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] { 1275; IS__CGSCC_OPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100 1276; IS__CGSCC_OPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] 1277; IS__CGSCC_OPM: if.true: 1278; IS__CGSCC_OPM-NEXT: br label [[END:%.*]] 1279; IS__CGSCC_OPM: if.false: 1280; IS__CGSCC_OPM-NEXT: br label [[END]] 1281; IS__CGSCC_OPM: end: 1282; IS__CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32 [ [[V]], [[IF_TRUE]] ], [ 100, [[IF_FALSE]] ] 1283; IS__CGSCC_OPM-NEXT: [[C2:%.*]] = icmp sge i32 [[PHI]], 100 1284; IS__CGSCC_OPM-NEXT: ret i1 [[C2]] 1285; 1286; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1287; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@ctx_adjustment 1288; IS__CGSCC_NPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] { 1289; IS__CGSCC_NPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100 1290; IS__CGSCC_NPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] 1291; IS__CGSCC_NPM: if.true: 1292; IS__CGSCC_NPM-NEXT: br label [[END:%.*]] 1293; IS__CGSCC_NPM: if.false: 1294; IS__CGSCC_NPM-NEXT: br label [[END]] 1295; IS__CGSCC_NPM: end: 1296; IS__CGSCC_NPM-NEXT: ret i1 true 1297; 1298 %c1 = icmp sge i32 %V, 100 1299 br i1 %c1, label %if.true, label %if.false 1300if.true: 1301 br label %end 1302if.false: 1303 %call = call i32 @ret100() 1304 br label %end 1305end: 1306 %phi = phi i32 [ %V, %if.true ], [ %call, %if.false ] 1307 %c2 = icmp sge i32 %phi, 100 1308 ret i1 %c2 1309} 1310 1311 1312define i32 @func(i1 %c) { 1313; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1314; IS__TUNIT____-LABEL: define {{[^@]+}}@func 1315; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1316; IS__TUNIT____-NEXT: [[RET:%.*]] = select i1 [[C]], i32 0, i32 1 1317; IS__TUNIT____-NEXT: ret i32 [[RET]] 1318; 1319; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1320; IS__CGSCC____-LABEL: define {{[^@]+}}@func 1321; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1322; IS__CGSCC____-NEXT: [[RET:%.*]] = select i1 [[C]], i32 0, i32 1 1323; IS__CGSCC____-NEXT: ret i32 [[RET]] 1324; 1325 %ret = select i1 %c, i32 0, i32 1 1326 ret i32 %ret 1327} 1328 1329define i32 @simplify_callsite_argument(i1 %d) { 1330; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn 1331; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument 1332; IS__TUNIT_OPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { 1333; IS__TUNIT_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false 1334; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1335; IS__TUNIT_OPM: t: 1336; IS__TUNIT_OPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef [[C]]) #[[ATTR1]], !range [[RNG3]] 1337; IS__TUNIT_OPM-NEXT: ret i32 [[RET1]] 1338; IS__TUNIT_OPM: f: 1339; IS__TUNIT_OPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR1]], !range [[RNG3]] 1340; IS__TUNIT_OPM-NEXT: ret i32 [[RET2]] 1341; 1342; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn 1343; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument 1344; IS__TUNIT_NPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { 1345; IS__TUNIT_NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false 1346; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1347; IS__TUNIT_NPM: t: 1348; IS__TUNIT_NPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef true) #[[ATTR1]], !range [[RNG4]] 1349; IS__TUNIT_NPM-NEXT: ret i32 [[RET1]] 1350; IS__TUNIT_NPM: f: 1351; IS__TUNIT_NPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR1]], !range [[RNG4]] 1352; IS__TUNIT_NPM-NEXT: ret i32 [[RET2]] 1353; 1354; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1355; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument 1356; IS__CGSCC_OPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { 1357; IS__CGSCC_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false 1358; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1359; IS__CGSCC_OPM: t: 1360; IS__CGSCC_OPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef [[C]]) #[[ATTR5]], !range [[RNG4]] 1361; IS__CGSCC_OPM-NEXT: ret i32 [[RET1]] 1362; IS__CGSCC_OPM: f: 1363; IS__CGSCC_OPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR5]], !range [[RNG4]] 1364; IS__CGSCC_OPM-NEXT: ret i32 [[RET2]] 1365; 1366; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1367; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument 1368; IS__CGSCC_NPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { 1369; IS__CGSCC_NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false 1370; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1371; IS__CGSCC_NPM: t: 1372; IS__CGSCC_NPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef true) #[[ATTR4]], !range [[RNG4]] 1373; IS__CGSCC_NPM-NEXT: ret i32 [[RET1]] 1374; IS__CGSCC_NPM: f: 1375; IS__CGSCC_NPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR4]], !range [[RNG4]] 1376; IS__CGSCC_NPM-NEXT: ret i32 [[RET2]] 1377; 1378 %c = select i1 %d, i1 true, i1 false 1379 br i1 %c, label %t, label %f 1380t: 1381 %ret1 = call i32 @func(i1 %c) 1382 ret i32 %ret1 1383f: 1384 %ret2 = call i32 @func(i1 false) 1385 ret i32 %ret2 1386} 1387 1388define internal i32 @less_than_65536(i32 %arg) { 1389; 1390; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1391; IS__CGSCC____-LABEL: define {{[^@]+}}@less_than_65536 1392; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 1393; IS__CGSCC____-NEXT: [[SHRINKED:%.*]] = udiv i32 undef, 65536 1394; IS__CGSCC____-NEXT: ret i32 undef 1395; 1396 %shrinked = udiv i32 %arg, 65536 1397 ret i32 %shrinked 1398} 1399 1400define internal i1 @is_less_than_65536(i32 %arg) { 1401; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1402; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_65536 1403; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 1404; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp ult i32 undef, 65536 1405; IS__CGSCC____-NEXT: ret i1 undef 1406; 1407 %cmp = icmp ult i32 %arg, 65536 1408 ret i1 %cmp 1409} 1410 1411define i1 @check_divided_range(i32 %arg) { 1412; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1413; IS__TUNIT____-LABEL: define {{[^@]+}}@check_divided_range 1414; IS__TUNIT____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 1415; IS__TUNIT____-NEXT: ret i1 true 1416; 1417; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1418; IS__CGSCC____-LABEL: define {{[^@]+}}@check_divided_range 1419; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 1420; IS__CGSCC____-NEXT: ret i1 true 1421; 1422 %csret1 = call i32 @less_than_65536(i32 0) 1423 %csret2 = call i32 @less_than_65536(i32 %arg) 1424 %true1 = call i1 @is_less_than_65536(i32 %csret1) 1425 %true2 = call i1 @is_less_than_65536(i32 %csret2) 1426 %ret = and i1 %true1, %true2 1427 ret i1 %ret 1428} 1429 1430define internal i32 @cast_and_return(i1 %c) { 1431; 1432; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1433; IS__CGSCC____-LABEL: define {{[^@]+}}@cast_and_return 1434; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1435; IS__CGSCC____-NEXT: [[RET:%.*]] = zext i1 undef to i32 1436; IS__CGSCC____-NEXT: ret i32 undef 1437; 1438 %ret = zext i1 %c to i32 1439 ret i32 %ret 1440} 1441 1442define internal i1 @is_less_than_3(i32 %c) { 1443; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1444; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_3 1445; IS__CGSCC____-SAME: () #[[ATTR1]] { 1446; IS__CGSCC____-NEXT: ret i1 undef 1447; 1448 %cmp = icmp slt i32 %c, 3 1449 ret i1 %cmp 1450} 1451 1452define i1 @check_casted_range(i1 %c) { 1453; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1454; IS__TUNIT____-LABEL: define {{[^@]+}}@check_casted_range 1455; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1456; IS__TUNIT____-NEXT: ret i1 true 1457; 1458; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1459; IS__CGSCC____-LABEL: define {{[^@]+}}@check_casted_range 1460; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1461; IS__CGSCC____-NEXT: ret i1 true 1462; 1463 %csret1 = call i32 @cast_and_return(i1 true) 1464 %csret2 = call i32 @cast_and_return(i1 %c) 1465 %add = add i32 %csret1, %csret2 1466 %ret = call i1 @is_less_than_3(i32 %add) 1467 ret i1 %ret 1468} 1469 1470define internal i32 @less_than_100_1(i32 %c) { 1471; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1472; IS__CGSCC____-LABEL: define {{[^@]+}}@less_than_100_1 1473; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1474; IS__CGSCC____-NEXT: switch i32 [[C]], label [[OTHERWISE:%.*]] [ 1475; IS__CGSCC____-NEXT: i32 0, label [[ONZERO:%.*]] 1476; IS__CGSCC____-NEXT: i32 1, label [[ONONE:%.*]] 1477; IS__CGSCC____-NEXT: i32 2, label [[ONTWO:%.*]] 1478; IS__CGSCC____-NEXT: i32 3, label [[ONTHREE:%.*]] 1479; IS__CGSCC____-NEXT: i32 4, label [[ONFOUR:%.*]] 1480; IS__CGSCC____-NEXT: i32 5, label [[ONFIVE:%.*]] 1481; IS__CGSCC____-NEXT: i32 6, label [[ONSIX:%.*]] 1482; IS__CGSCC____-NEXT: ] 1483; IS__CGSCC____: onzero: 1484; IS__CGSCC____-NEXT: ret i32 undef 1485; IS__CGSCC____: onone: 1486; IS__CGSCC____-NEXT: ret i32 undef 1487; IS__CGSCC____: ontwo: 1488; IS__CGSCC____-NEXT: ret i32 undef 1489; IS__CGSCC____: onthree: 1490; IS__CGSCC____-NEXT: ret i32 undef 1491; IS__CGSCC____: onfour: 1492; IS__CGSCC____-NEXT: ret i32 undef 1493; IS__CGSCC____: onfive: 1494; IS__CGSCC____-NEXT: ret i32 undef 1495; IS__CGSCC____: onsix: 1496; IS__CGSCC____-NEXT: ret i32 undef 1497; IS__CGSCC____: otherwise: 1498; IS__CGSCC____-NEXT: ret i32 undef 1499; 1500 switch i32 %c, label %otherwise [ i32 0, label %onzero 1501 i32 1, label %onone 1502 i32 2, label %ontwo 1503 i32 3, label %onthree 1504 i32 4, label %onfour 1505 i32 5, label %onfive 1506 i32 6, label %onsix] 1507onzero: 1508 ret i32 0 1509onone: 1510 ret i32 1 1511ontwo: 1512 ret i32 2 1513onthree: 1514 ret i32 3 1515onfour: 1516 ret i32 4 1517onfive: 1518 ret i32 5 1519onsix: 1520 ret i32 6 1521otherwise: 1522 ret i32 99 1523} 1524 1525define internal i1 @is_less_than_100_1(i32 %c) { 1526; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1527; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_100_1 1528; IS__CGSCC____-SAME: () #[[ATTR1]] { 1529; IS__CGSCC____-NEXT: ret i1 undef 1530; 1531 %cmp = icmp slt i32 %c, 100 1532 ret i1 %cmp 1533} 1534 1535define i1 @propagate_range1(i32 %c){ 1536; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1537; IS__TUNIT____-LABEL: define {{[^@]+}}@propagate_range1 1538; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1539; IS__TUNIT____-NEXT: ret i1 true 1540; 1541; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1542; IS__CGSCC____-LABEL: define {{[^@]+}}@propagate_range1 1543; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1544; IS__CGSCC____-NEXT: ret i1 true 1545; 1546 %csret = call i32 @less_than_100_1(i32 %c) 1547 %true = call i1 @is_less_than_100_1(i32 %csret) 1548 ret i1 %true 1549} 1550 1551define internal i32 @less_than_100_2(i32 %c) { 1552; 1553; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1554; IS__CGSCC____-LABEL: define {{[^@]+}}@less_than_100_2 1555; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1556; IS__CGSCC____-NEXT: switch i32 [[C]], label [[OTHERWISE:%.*]] [ 1557; IS__CGSCC____-NEXT: i32 0, label [[ONZERO:%.*]] 1558; IS__CGSCC____-NEXT: i32 1, label [[ONONE:%.*]] 1559; IS__CGSCC____-NEXT: i32 2, label [[ONTWO:%.*]] 1560; IS__CGSCC____-NEXT: i32 3, label [[ONTHREE:%.*]] 1561; IS__CGSCC____-NEXT: i32 4, label [[ONFOUR:%.*]] 1562; IS__CGSCC____-NEXT: i32 5, label [[ONFIVE:%.*]] 1563; IS__CGSCC____-NEXT: i32 6, label [[ONSIX:%.*]] 1564; IS__CGSCC____-NEXT: ] 1565; IS__CGSCC____: onzero: 1566; IS__CGSCC____-NEXT: ret i32 undef 1567; IS__CGSCC____: onone: 1568; IS__CGSCC____-NEXT: ret i32 undef 1569; IS__CGSCC____: ontwo: 1570; IS__CGSCC____-NEXT: ret i32 undef 1571; IS__CGSCC____: onthree: 1572; IS__CGSCC____-NEXT: ret i32 undef 1573; IS__CGSCC____: onfour: 1574; IS__CGSCC____-NEXT: ret i32 undef 1575; IS__CGSCC____: onfive: 1576; IS__CGSCC____-NEXT: ret i32 undef 1577; IS__CGSCC____: onsix: 1578; IS__CGSCC____-NEXT: ret i32 undef 1579; IS__CGSCC____: otherwise: 1580; IS__CGSCC____-NEXT: ret i32 undef 1581; 1582 switch i32 %c, label %otherwise [ i32 0, label %onzero 1583 i32 1, label %onone 1584 i32 2, label %ontwo 1585 i32 3, label %onthree 1586 i32 4, label %onfour 1587 i32 5, label %onfive 1588 i32 6, label %onsix] 1589onzero: 1590 ret i32 0 1591onone: 1592 ret i32 1 1593ontwo: 1594 ret i32 2 1595onthree: 1596 ret i32 3 1597onfour: 1598 ret i32 4 1599onfive: 1600 ret i32 5 1601onsix: 1602 ret i32 6 1603otherwise: 1604 ret i32 99 1605} 1606 1607define internal i1 @is_less_than_100_2(i32 %c) { 1608; 1609; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1610; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_100_2 1611; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1612; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp slt i32 undef, 100 1613; IS__CGSCC____-NEXT: ret i1 undef 1614; 1615 %cmp = icmp slt i32 %c, 100 1616 ret i1 %cmp 1617} 1618 1619define i1 @propagate_range2(i32 %c) { 1620; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1621; IS__TUNIT____-LABEL: define {{[^@]+}}@propagate_range2 1622; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1623; IS__TUNIT____-NEXT: ret i1 true 1624; 1625; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1626; IS__CGSCC____-LABEL: define {{[^@]+}}@propagate_range2 1627; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1628; IS__CGSCC____-NEXT: ret i1 true 1629; 1630 %csret1 = call i32 @less_than_100_2(i32 0) 1631 %true1 = call i1 @is_less_than_100_2(i32 %csret1) 1632 %csret2 = call i32 @less_than_100_2(i32 %c) 1633 %true2 = call i1 @is_less_than_100_2(i32 %csret2) 1634 %true = and i1 %true1, %true2 1635 ret i1 %true 1636} 1637 1638define internal i1 @non_zero(i8 %v) { 1639; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn 1640; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@non_zero 1641; IS__TUNIT_OPM-SAME: (i8 [[V:%.*]]) #[[ATTR1]] { 1642; IS__TUNIT_OPM-NEXT: [[R:%.*]] = icmp ne i8 [[V]], 0 1643; IS__TUNIT_OPM-NEXT: ret i1 [[R]] 1644; 1645; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1646; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@non_zero 1647; IS__CGSCC_OPM-SAME: (i8 [[V:%.*]]) #[[ATTR1]] { 1648; IS__CGSCC_OPM-NEXT: [[R:%.*]] = icmp ne i8 [[V]], 0 1649; IS__CGSCC_OPM-NEXT: ret i1 [[R]] 1650; 1651; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1652; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@non_zero 1653; IS__CGSCC_NPM-SAME: () #[[ATTR1]] { 1654; IS__CGSCC_NPM-NEXT: ret i1 undef 1655; 1656 %r = icmp ne i8 %v, 0 1657 ret i1 %r 1658} 1659 1660; Avoid range metadata for %l below 1661define i1 @context(i8* %p) { 1662; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 1663; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@context 1664; IS__TUNIT_OPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { 1665; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 1666; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] 1667; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1668; IS__TUNIT_OPM: t: 1669; IS__TUNIT_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) #[[ATTR1]] 1670; IS__TUNIT_OPM-NEXT: ret i1 [[R]] 1671; IS__TUNIT_OPM: f: 1672; IS__TUNIT_OPM-NEXT: ret i1 false 1673; 1674; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 1675; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@context 1676; IS__TUNIT_NPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { 1677; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 1678; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] 1679; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1680; IS__TUNIT_NPM: t: 1681; IS__TUNIT_NPM-NEXT: ret i1 true 1682; IS__TUNIT_NPM: f: 1683; IS__TUNIT_NPM-NEXT: ret i1 false 1684; 1685; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 1686; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@context 1687; IS__CGSCC_OPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { 1688; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 1689; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] 1690; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1691; IS__CGSCC_OPM: t: 1692; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) #[[ATTR5]] 1693; IS__CGSCC_OPM-NEXT: ret i1 [[R]] 1694; IS__CGSCC_OPM: f: 1695; IS__CGSCC_OPM-NEXT: ret i1 false 1696; 1697; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 1698; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@context 1699; IS__CGSCC_NPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { 1700; IS__CGSCC_NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 1701; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] 1702; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1703; IS__CGSCC_NPM: t: 1704; IS__CGSCC_NPM-NEXT: ret i1 true 1705; IS__CGSCC_NPM: f: 1706; IS__CGSCC_NPM-NEXT: ret i1 false 1707; 1708 %l = load i8, i8* %p 1709 %c = icmp slt i8 0, %l 1710 br i1 %c, label %t, label %f 1711t: 1712 %r = call i1 @non_zero(i8 %l) 1713 ret i1 %r 1714f: 1715 ret i1 false 1716} 1717 1718 1719define void @spam(i32* %arg, i32* %arg1) { 1720; CHECK-LABEL: define {{[^@]+}}@spam 1721; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 8 dereferenceable(4) [[ARG:%.*]], i32* nocapture nofree readnone [[ARG1:%.*]]) { 1722; CHECK-NEXT: bb: 1723; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[ARG]], align 8 1724; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP]], 4 1725; CHECK-NEXT: br i1 [[TMP2]], label [[BB3:%.*]], label [[BB4:%.*]] 1726; CHECK: bb3: 1727; CHECK-NEXT: call fastcc void @wobble(i32 signext [[TMP]]) 1728; CHECK-NEXT: br label [[BB5:%.*]] 1729; CHECK: bb4: 1730; CHECK-NEXT: call void @ham(i32 [[TMP]]) 1731; CHECK-NEXT: br label [[BB5]] 1732; CHECK: bb5: 1733; CHECK-NEXT: ret void 1734; 1735bb: 1736 %tmp = load i32, i32* %arg, align 8 1737 %tmp2 = icmp ult i32 %tmp, 4 1738 br i1 %tmp2, label %bb3, label %bb4 1739 1740bb3: ; preds = %bb 1741 call fastcc void @wobble(i32 signext %tmp) 1742 br label %bb5 1743 1744bb4: ; preds = %bb 1745 call void @ham(i32 %tmp) 1746 br label %bb5 1747 1748bb5: ; preds = %bb4, %bb3 1749 ret void 1750} 1751 1752define internal fastcc void @wobble(i32 signext %arg) { 1753; CHECK-LABEL: define {{[^@]+}}@wobble 1754; CHECK-SAME: (i32 signext [[ARG:%.*]]) { 1755; CHECK-NEXT: bb: 1756; CHECK-NEXT: [[TMP:%.*]] = icmp ult i32 [[ARG]], 2 1757; CHECK-NEXT: br i1 [[TMP]], label [[BB1:%.*]], label [[BB2:%.*]] 1758; CHECK: bb1: 1759; CHECK-NEXT: call void @barney(i32 noundef signext 32, i32 noundef signext 0) 1760; CHECK-NEXT: br label [[BB3:%.*]] 1761; CHECK: bb2: 1762; CHECK-NEXT: br label [[BB3]] 1763; CHECK: bb3: 1764; CHECK-NEXT: ret void 1765; 1766bb: 1767 %tmp = icmp ult i32 %arg, 2 1768 br i1 %tmp, label %bb1, label %bb2 1769 1770bb1: ; preds = %bb 1771 call void @barney(i32 signext 32, i32 signext 0) 1772 br label %bb3 1773 1774bb2: ; preds = %bb 1775 br label %bb3 1776 1777bb3: ; preds = %bb2, %bb1 1778 ret void 1779} 1780 1781define i1 @loop_1(i32 %N) { 1782; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone 1783; IS__TUNIT____-LABEL: define {{[^@]+}}@loop_1 1784; IS__TUNIT____-SAME: (i32 [[N:%.*]]) #[[ATTR2:[0-9]+]] { 1785; IS__TUNIT____-NEXT: entry: 1786; IS__TUNIT____-NEXT: br label [[HEADER:%.*]] 1787; IS__TUNIT____: header: 1788; IS__TUNIT____-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[AND:%.*]], [[HEADER]] ] 1789; IS__TUNIT____-NEXT: [[INC:%.*]] = add i32 [[I]], 1 1790; IS__TUNIT____-NEXT: [[AND]] = and i32 [[INC]], 9999 1791; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp ne i32 [[N]], [[AND]] 1792; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]] 1793; IS__TUNIT____: exit: 1794; IS__TUNIT____-NEXT: [[R:%.*]] = icmp sle i32 [[I]], 5 1795; IS__TUNIT____-NEXT: ret i1 [[R]] 1796; 1797; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone 1798; IS__CGSCC____-LABEL: define {{[^@]+}}@loop_1 1799; IS__CGSCC____-SAME: (i32 [[N:%.*]]) #[[ATTR2:[0-9]+]] { 1800; IS__CGSCC____-NEXT: entry: 1801; IS__CGSCC____-NEXT: br label [[HEADER:%.*]] 1802; IS__CGSCC____: header: 1803; IS__CGSCC____-NEXT: [[I:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[AND:%.*]], [[HEADER]] ] 1804; IS__CGSCC____-NEXT: [[INC:%.*]] = add i32 [[I]], 1 1805; IS__CGSCC____-NEXT: [[AND]] = and i32 [[INC]], 9999 1806; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp ne i32 [[N]], [[AND]] 1807; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[HEADER]], label [[EXIT:%.*]] 1808; IS__CGSCC____: exit: 1809; IS__CGSCC____-NEXT: [[R:%.*]] = icmp sle i32 [[I]], 5 1810; IS__CGSCC____-NEXT: ret i1 [[R]] 1811; 1812entry: 1813 br label %header 1814header: 1815 %i = phi i32 [0, %entry], [%and, %header] 1816 %inc = add i32 %i, 1 1817 %and = and i32 %inc, 9999 1818 %cmp = icmp ne i32 %N, %and 1819 br i1 %cmp, label %header, label %exit 1820exit: 1821 %r = icmp sle i32 %i, 5 1822 ret i1 %r 1823} 1824 1825declare void @ham(i32) 1826 1827declare void @barney(i32 signext, i32 signext) 1828 1829 1830!0 = !{i32 0, i32 10} 1831!1 = !{i32 10, i32 100} 1832;. 1833; IS__TUNIT____: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind readonly willreturn } 1834; IS__TUNIT____: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } 1835; IS__TUNIT____: attributes #[[ATTR2]] = { nofree nosync nounwind readnone } 1836; IS__TUNIT____: attributes #[[ATTR3]] = { nofree nosync nounwind readonly willreturn } 1837;. 1838; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } 1839; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } 1840; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone } 1841; IS__CGSCC_OPM: attributes #[[ATTR3]] = { readonly willreturn } 1842; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nounwind readnone } 1843; IS__CGSCC_OPM: attributes #[[ATTR5]] = { readnone willreturn } 1844;. 1845; IS__CGSCC_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } 1846; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } 1847; IS__CGSCC_NPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone } 1848; IS__CGSCC_NPM: attributes #[[ATTR3]] = { readonly willreturn } 1849; IS__CGSCC_NPM: attributes #[[ATTR4]] = { readnone willreturn } 1850;. 1851; IS__TUNIT_OPM: [[RNG0]] = !{i32 0, i32 10} 1852; IS__TUNIT_OPM: [[RNG1]] = !{i32 10, i32 100} 1853; IS__TUNIT_OPM: [[RNG2]] = !{i32 200, i32 1091} 1854; IS__TUNIT_OPM: [[RNG3]] = !{i32 0, i32 2} 1855; IS__TUNIT_OPM: [[RNG4]] = !{i32 1, i32 3} 1856;. 1857; IS________NPM: [[RNG0]] = !{i32 0, i32 10} 1858; IS________NPM: [[RNG1]] = !{i32 10, i32 100} 1859; IS________NPM: [[RNG2]] = !{i32 200, i32 1091} 1860; IS________NPM: [[META3:![0-9]+]] = !{i32 1, i32 -2147483648} 1861; IS________NPM: [[RNG4]] = !{i32 0, i32 2} 1862; IS________NPM: [[META5:![0-9]+]] = !{i32 1, i32 3} 1863;. 1864; IS__CGSCC_OPM: [[RNG0]] = !{i32 0, i32 10} 1865; IS__CGSCC_OPM: [[RNG1]] = !{i32 10, i32 100} 1866; IS__CGSCC_OPM: [[RNG2]] = !{i32 200, i32 1091} 1867; IS__CGSCC_OPM: [[RNG3]] = !{i32 10, i32 21} 1868; IS__CGSCC_OPM: [[RNG4]] = !{i32 0, i32 2} 1869; IS__CGSCC_OPM: [[RNG5]] = !{i32 1, i32 3} 1870;. 1871