1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --function-signature --check-attributes --check-globals 2; RUN: opt -attributor -enable-new-pm=0 -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=25 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_NPM,NOT_CGSCC_OPM,NOT_TUNIT_NPM,IS__TUNIT____,IS________OPM,IS__TUNIT_OPM 3; RUN: opt -aa-pipeline=basic-aa -passes=attributor -attributor-manifest-internal -attributor-max-iterations-verify -attributor-annotate-decl-cs -attributor-max-iterations=25 -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_CGSCC_OPM,NOT_CGSCC_NPM,NOT_TUNIT_OPM,IS__TUNIT____,IS________NPM,IS__TUNIT_NPM 4; RUN: opt -attributor-cgscc -enable-new-pm=0 -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_NPM,IS__CGSCC____,IS________OPM,IS__CGSCC_OPM 5; RUN: opt -aa-pipeline=basic-aa -passes=attributor-cgscc -attributor-manifest-internal -attributor-annotate-decl-cs -S < %s | FileCheck %s --check-prefixes=CHECK,NOT_TUNIT_NPM,NOT_TUNIT_OPM,NOT_CGSCC_OPM,IS__CGSCC____,IS________NPM,IS__CGSCC_NPM 6 7; FIXME: CGSCC is not looking at callees and calleers even though it could be allowed. 8 9define i32 @test0(i32* %p) { 10; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 11; IS__TUNIT____-LABEL: define {{[^@]+}}@test0 12; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0:[0-9]+]] { 13; IS__TUNIT____-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG0:![0-9]+]] 14; IS__TUNIT____-NEXT: ret i32 [[A]] 15; 16; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 17; IS__CGSCC____-LABEL: define {{[^@]+}}@test0 18; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0:[0-9]+]] { 19; IS__CGSCC____-NEXT: [[A:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG0:![0-9]+]] 20; IS__CGSCC____-NEXT: ret i32 [[A]] 21; 22 %a = load i32, i32* %p, !range !0 23 ret i32 %a 24} 25 26define i32 @test0-range-check(i32* %p) { 27; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 28; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test0-range-check 29; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) #[[ATTR0]] { 30; IS__TUNIT_OPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR3:[0-9]+]], !range [[RNG0]] 31; IS__TUNIT_OPM-NEXT: ret i32 [[A]] 32; 33; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 34; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test0-range-check 35; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) #[[ATTR0]] { 36; IS__TUNIT_NPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR2:[0-9]+]], !range [[RNG0]] 37; IS__TUNIT_NPM-NEXT: ret i32 [[A]] 38; 39; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 40; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test0-range-check 41; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 42; IS__CGSCC_OPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3:[0-9]+]], !range [[RNG0]] 43; IS__CGSCC_OPM-NEXT: ret i32 [[A]] 44; 45; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 46; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test0-range-check 47; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 48; IS__CGSCC_NPM-NEXT: [[A:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR2:[0-9]+]], !range [[RNG0]] 49; IS__CGSCC_NPM-NEXT: ret i32 [[A]] 50; 51 %a = tail call i32 @test0(i32* %p) 52 ret i32 %a 53} 54 55declare void @use3-dummy(i1, i1, i1) 56define void @use3(i1, i1, i1) { 57; CHECK-LABEL: define {{[^@]+}}@use3 58; CHECK-SAME: (i1 [[TMP0:%.*]], i1 [[TMP1:%.*]], i1 [[TMP2:%.*]]) { 59; CHECK-NEXT: tail call void @use3-dummy(i1 [[TMP0]], i1 [[TMP1]], i1 [[TMP2]]) 60; CHECK-NEXT: ret void 61; 62 tail call void @use3-dummy(i1 %0, i1 %1, i1 %2) 63 ret void 64} 65 66; TEST0 icmp test 67define void @test0-icmp-check(i32* %p){ 68 ; ret = [0, 10) 69; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test0-icmp-check 70; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) { 71; IS__TUNIT_OPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR3]], !range [[RNG0]] 72; IS__TUNIT_OPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 73; IS__TUNIT_OPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 74; IS__TUNIT_OPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 75; IS__TUNIT_OPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 76; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) 77; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false) 78; IS__TUNIT_OPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 79; IS__TUNIT_OPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 80; IS__TUNIT_OPM-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1 81; IS__TUNIT_OPM-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0 82; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]]) 83; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true) 84; IS__TUNIT_OPM-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8 85; IS__TUNIT_OPM-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1 86; IS__TUNIT_OPM-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0 87; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]]) 88; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false) 89; IS__TUNIT_OPM-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9 90; IS__TUNIT_OPM-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8 91; IS__TUNIT_OPM-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1 92; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]]) 93; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false) 94; IS__TUNIT_OPM-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8 95; IS__TUNIT_OPM-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1 96; IS__TUNIT_OPM-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0 97; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]]) 98; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true) 99; IS__TUNIT_OPM-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9 100; IS__TUNIT_OPM-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8 101; IS__TUNIT_OPM-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1 102; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]]) 103; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true) 104; IS__TUNIT_OPM-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9 105; IS__TUNIT_OPM-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8 106; IS__TUNIT_OPM-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1 107; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]]) 108; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false) 109; IS__TUNIT_OPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 110; IS__TUNIT_OPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 111; IS__TUNIT_OPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 112; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]]) 113; IS__TUNIT_OPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false) 114; IS__TUNIT_OPM-NEXT: ret void 115; 116; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test0-icmp-check 117; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) { 118; IS__TUNIT_NPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR2]], !range [[RNG0]] 119; IS__TUNIT_NPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 120; IS__TUNIT_NPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 121; IS__TUNIT_NPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 122; IS__TUNIT_NPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 123; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) 124; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false) 125; IS__TUNIT_NPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 126; IS__TUNIT_NPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 127; IS__TUNIT_NPM-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1 128; IS__TUNIT_NPM-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0 129; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]]) 130; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true) 131; IS__TUNIT_NPM-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8 132; IS__TUNIT_NPM-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1 133; IS__TUNIT_NPM-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0 134; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]]) 135; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false) 136; IS__TUNIT_NPM-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9 137; IS__TUNIT_NPM-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8 138; IS__TUNIT_NPM-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1 139; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]]) 140; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false) 141; IS__TUNIT_NPM-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8 142; IS__TUNIT_NPM-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1 143; IS__TUNIT_NPM-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0 144; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]]) 145; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true) 146; IS__TUNIT_NPM-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9 147; IS__TUNIT_NPM-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8 148; IS__TUNIT_NPM-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1 149; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]]) 150; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true) 151; IS__TUNIT_NPM-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9 152; IS__TUNIT_NPM-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8 153; IS__TUNIT_NPM-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1 154; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]]) 155; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false) 156; IS__TUNIT_NPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 157; IS__TUNIT_NPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 158; IS__TUNIT_NPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 159; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]]) 160; IS__TUNIT_NPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false) 161; IS__TUNIT_NPM-NEXT: ret void 162; 163; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test0-icmp-check 164; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) { 165; IS__CGSCC_OPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3]], !range [[RNG0]] 166; IS__CGSCC_OPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 167; IS__CGSCC_OPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 168; IS__CGSCC_OPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 169; IS__CGSCC_OPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 170; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) 171; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false) 172; IS__CGSCC_OPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 173; IS__CGSCC_OPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 174; IS__CGSCC_OPM-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1 175; IS__CGSCC_OPM-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0 176; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]]) 177; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true) 178; IS__CGSCC_OPM-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8 179; IS__CGSCC_OPM-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1 180; IS__CGSCC_OPM-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0 181; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]]) 182; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false) 183; IS__CGSCC_OPM-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9 184; IS__CGSCC_OPM-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8 185; IS__CGSCC_OPM-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1 186; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]]) 187; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false) 188; IS__CGSCC_OPM-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8 189; IS__CGSCC_OPM-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1 190; IS__CGSCC_OPM-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0 191; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]]) 192; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true) 193; IS__CGSCC_OPM-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9 194; IS__CGSCC_OPM-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8 195; IS__CGSCC_OPM-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1 196; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]]) 197; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true) 198; IS__CGSCC_OPM-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9 199; IS__CGSCC_OPM-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8 200; IS__CGSCC_OPM-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1 201; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]]) 202; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false) 203; IS__CGSCC_OPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 204; IS__CGSCC_OPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 205; IS__CGSCC_OPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 206; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]]) 207; IS__CGSCC_OPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false) 208; IS__CGSCC_OPM-NEXT: ret void 209; 210; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test0-icmp-check 211; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) { 212; IS__CGSCC_NPM-NEXT: [[RET:%.*]] = tail call i32 @test0(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR2]], !range [[RNG0]] 213; IS__CGSCC_NPM-NEXT: [[CMP_EQ_2:%.*]] = icmp eq i32 [[RET]], 9 214; IS__CGSCC_NPM-NEXT: [[CMP_EQ_3:%.*]] = icmp eq i32 [[RET]], 8 215; IS__CGSCC_NPM-NEXT: [[CMP_EQ_4:%.*]] = icmp eq i32 [[RET]], 1 216; IS__CGSCC_NPM-NEXT: [[CMP_EQ_5:%.*]] = icmp eq i32 [[RET]], 0 217; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_EQ_2]], i1 [[CMP_EQ_3]]) 218; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_EQ_4]], i1 [[CMP_EQ_5]], i1 noundef false) 219; IS__CGSCC_NPM-NEXT: [[CMP_NE_2:%.*]] = icmp ne i32 [[RET]], 9 220; IS__CGSCC_NPM-NEXT: [[CMP_NE_3:%.*]] = icmp ne i32 [[RET]], 8 221; IS__CGSCC_NPM-NEXT: [[CMP_NE_4:%.*]] = icmp ne i32 [[RET]], 1 222; IS__CGSCC_NPM-NEXT: [[CMP_NE_5:%.*]] = icmp ne i32 [[RET]], 0 223; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_NE_2]], i1 [[CMP_NE_3]]) 224; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_NE_4]], i1 [[CMP_NE_5]], i1 noundef true) 225; IS__CGSCC_NPM-NEXT: [[CMP_UGT_3:%.*]] = icmp ugt i32 [[RET]], 8 226; IS__CGSCC_NPM-NEXT: [[CMP_UGT_4:%.*]] = icmp ugt i32 [[RET]], 1 227; IS__CGSCC_NPM-NEXT: [[CMP_UGT_5:%.*]] = icmp ugt i32 [[RET]], 0 228; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_UGT_3]]) 229; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_UGT_4]], i1 [[CMP_UGT_5]], i1 noundef false) 230; IS__CGSCC_NPM-NEXT: [[CMP_UGE_2:%.*]] = icmp uge i32 [[RET]], 9 231; IS__CGSCC_NPM-NEXT: [[CMP_UGE_3:%.*]] = icmp uge i32 [[RET]], 8 232; IS__CGSCC_NPM-NEXT: [[CMP_UGE_4:%.*]] = icmp uge i32 [[RET]], 1 233; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_UGE_2]], i1 [[CMP_UGE_3]]) 234; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_UGE_4]], i1 noundef true, i1 noundef false) 235; IS__CGSCC_NPM-NEXT: [[CMP_SGT_3:%.*]] = icmp sgt i32 [[RET]], 8 236; IS__CGSCC_NPM-NEXT: [[CMP_SGT_4:%.*]] = icmp sgt i32 [[RET]], 1 237; IS__CGSCC_NPM-NEXT: [[CMP_SGT_5:%.*]] = icmp sgt i32 [[RET]], 0 238; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 noundef false, i1 [[CMP_SGT_3]]) 239; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_SGT_4]], i1 [[CMP_SGT_5]], i1 noundef true) 240; IS__CGSCC_NPM-NEXT: [[CMP_GTE_2:%.*]] = icmp sge i32 [[RET]], 9 241; IS__CGSCC_NPM-NEXT: [[CMP_GTE_3:%.*]] = icmp sge i32 [[RET]], 8 242; IS__CGSCC_NPM-NEXT: [[CMP_GTE_4:%.*]] = icmp sge i32 [[RET]], 1 243; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef false, i1 [[CMP_GTE_2]], i1 [[CMP_GTE_3]]) 244; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_GTE_4]], i1 noundef true, i1 noundef true) 245; IS__CGSCC_NPM-NEXT: [[CMP_SLT_2:%.*]] = icmp slt i32 [[RET]], 9 246; IS__CGSCC_NPM-NEXT: [[CMP_SLT_3:%.*]] = icmp slt i32 [[RET]], 8 247; IS__CGSCC_NPM-NEXT: [[CMP_SLT_4:%.*]] = icmp slt i32 [[RET]], 1 248; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef true, i1 [[CMP_SLT_2]], i1 [[CMP_SLT_3]]) 249; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_SLT_4]], i1 noundef false, i1 noundef false) 250; IS__CGSCC_NPM-NEXT: [[CMP_LTE_3:%.*]] = icmp sle i32 [[RET]], 8 251; IS__CGSCC_NPM-NEXT: [[CMP_LTE_4:%.*]] = icmp sle i32 [[RET]], 1 252; IS__CGSCC_NPM-NEXT: [[CMP_LTE_5:%.*]] = icmp sle i32 [[RET]], 0 253; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 noundef true, i1 noundef true, i1 [[CMP_LTE_3]]) 254; IS__CGSCC_NPM-NEXT: tail call void @use3(i1 [[CMP_LTE_4]], i1 [[CMP_LTE_5]], i1 noundef false) 255; IS__CGSCC_NPM-NEXT: ret void 256; 257 %ret = tail call i32 @test0(i32 *%p) 258 259 ; ret = [0, 10), eq 260 %cmp-eq-1 = icmp eq i32 %ret, 10 261 %cmp-eq-2 = icmp eq i32 %ret, 9 262 %cmp-eq-3 = icmp eq i32 %ret, 8 263 %cmp-eq-4 = icmp eq i32 %ret, 1 264 %cmp-eq-5 = icmp eq i32 %ret, 0 265 %cmp-eq-6 = icmp eq i32 %ret, -1 266 tail call void @use3(i1 %cmp-eq-1, i1 %cmp-eq-2, i1 %cmp-eq-3) 267 tail call void @use3(i1 %cmp-eq-4, i1 %cmp-eq-5, i1 %cmp-eq-6) 268 269 ; ret = [0, 10), ne 270 %cmp-ne-1 = icmp ne i32 %ret, 10 271 %cmp-ne-2 = icmp ne i32 %ret, 9 272 %cmp-ne-3 = icmp ne i32 %ret, 8 273 %cmp-ne-4 = icmp ne i32 %ret, 1 274 %cmp-ne-5 = icmp ne i32 %ret, 0 275 %cmp-ne-6 = icmp ne i32 %ret, -1 276 tail call void @use3(i1 %cmp-ne-1, i1 %cmp-ne-2, i1 %cmp-ne-3) 277 tail call void @use3(i1 %cmp-ne-4, i1 %cmp-ne-5, i1 %cmp-ne-6) 278 279 ; ret = [0, 10), ugt 280 %cmp-ugt-1 = icmp ugt i32 %ret, 10 281 %cmp-ugt-2 = icmp ugt i32 %ret, 9 282 %cmp-ugt-3 = icmp ugt i32 %ret, 8 283 %cmp-ugt-4 = icmp ugt i32 %ret, 1 284 %cmp-ugt-5 = icmp ugt i32 %ret, 0 285 %cmp-ugt-6 = icmp ugt i32 %ret, -1 286 tail call void @use3(i1 %cmp-ugt-1, i1 %cmp-ugt-2, i1 %cmp-ugt-3) 287 tail call void @use3(i1 %cmp-ugt-4, i1 %cmp-ugt-5, i1 %cmp-ugt-6) 288 289 ; ret = [0, 10), uge 290 %cmp-uge-1 = icmp uge i32 %ret, 10 291 %cmp-uge-2 = icmp uge i32 %ret, 9 292 %cmp-uge-3 = icmp uge i32 %ret, 8 293 %cmp-uge-4 = icmp uge i32 %ret, 1 294 %cmp-uge-5 = icmp uge i32 %ret, 0 295 %cmp-uge-6 = icmp uge i32 %ret, -1 296 tail call void @use3(i1 %cmp-uge-1, i1 %cmp-uge-2, i1 %cmp-uge-3) 297 tail call void @use3(i1 %cmp-uge-4, i1 %cmp-uge-5, i1 %cmp-uge-6) 298 299 ; ret = [0, 10), sgt 300 %cmp-sgt-1 = icmp sgt i32 %ret, 10 301 %cmp-sgt-2 = icmp sgt i32 %ret, 9 302 %cmp-sgt-3 = icmp sgt i32 %ret, 8 303 %cmp-sgt-4 = icmp sgt i32 %ret, 1 304 %cmp-sgt-5 = icmp sgt i32 %ret, 0 305 %cmp-sgt-6 = icmp sgt i32 %ret, -1 306 tail call void @use3(i1 %cmp-sgt-1, i1 %cmp-sgt-2, i1 %cmp-sgt-3) 307 tail call void @use3(i1 %cmp-sgt-4, i1 %cmp-sgt-5, i1 %cmp-sgt-6) 308 309 ; ret = [0, 10), sge 310 %cmp-gte-1 = icmp sge i32 %ret, 10 311 %cmp-gte-2 = icmp sge i32 %ret, 9 312 %cmp-gte-3 = icmp sge i32 %ret, 8 313 %cmp-gte-4 = icmp sge i32 %ret, 1 314 %cmp-gte-5 = icmp sge i32 %ret, 0 315 %cmp-gte-6 = icmp sge i32 %ret, -1 316 tail call void @use3(i1 %cmp-gte-1, i1 %cmp-gte-2, i1 %cmp-gte-3) 317 tail call void @use3(i1 %cmp-gte-4, i1 %cmp-gte-5, i1 %cmp-gte-6) 318 319 ; ret = [0, 10), slt 320 %cmp-slt-1 = icmp slt i32 %ret, 10 321 %cmp-slt-2 = icmp slt i32 %ret, 9 322 %cmp-slt-3 = icmp slt i32 %ret, 8 323 %cmp-slt-4 = icmp slt i32 %ret, 1 324 %cmp-slt-5 = icmp slt i32 %ret, 0 325 %cmp-slt-6 = icmp slt i32 %ret, -1 326 tail call void @use3(i1 %cmp-slt-1, i1 %cmp-slt-2, i1 %cmp-slt-3) 327 tail call void @use3(i1 %cmp-slt-4, i1 %cmp-slt-5, i1 %cmp-slt-6) 328 329 ; ret = [0, 10), sle 330 %cmp-lte-1 = icmp sle i32 %ret, 10 331 %cmp-lte-2 = icmp sle i32 %ret, 9 332 %cmp-lte-3 = icmp sle i32 %ret, 8 333 %cmp-lte-4 = icmp sle i32 %ret, 1 334 %cmp-lte-5 = icmp sle i32 %ret, 0 335 %cmp-lte-6 = icmp sle i32 %ret, -1 336 tail call void @use3(i1 %cmp-lte-1, i1 %cmp-lte-2, i1 %cmp-lte-3) 337 tail call void @use3(i1 %cmp-lte-4, i1 %cmp-lte-5, i1 %cmp-lte-6) 338 339 ret void 340} 341define i32 @test1(i32* %p) { 342; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 343; IS__TUNIT____-LABEL: define {{[^@]+}}@test1 344; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 345; IS__TUNIT____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG1:![0-9]+]] 346; IS__TUNIT____-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10 347; IS__TUNIT____-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10 348; IS__TUNIT____-NEXT: ret i32 [[MUL_10_THEN_200_1091]] 349; 350; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 351; IS__CGSCC____-LABEL: define {{[^@]+}}@test1 352; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 353; IS__CGSCC____-NEXT: [[LOAD_10_100:%.*]] = load i32, i32* [[P]], align 4, !range [[RNG1:![0-9]+]] 354; IS__CGSCC____-NEXT: [[ADD_10_THEN_20_110:%.*]] = add i32 [[LOAD_10_100]], 10 355; IS__CGSCC____-NEXT: [[MUL_10_THEN_200_1091:%.*]] = mul i32 [[ADD_10_THEN_20_110]], 10 356; IS__CGSCC____-NEXT: ret i32 [[MUL_10_THEN_200_1091]] 357; 358 %load-10-100 = load i32, i32* %p, !range !1 359 %add-10-then-20-110 = add i32 %load-10-100, 10 360 %mul-10-then-200-1091 = mul i32 %add-10-then-20-110, 10 361 ret i32 %mul-10-then-200-1091 362} 363 364define i1 @test1-check(i32* %p) { 365; 366; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 367; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test1-check 368; IS__TUNIT_OPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) #[[ATTR0]] { 369; IS__TUNIT_OPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR3]], !range [[RNG2:![0-9]+]] 370; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 371; IS__TUNIT_OPM-NEXT: ret i1 [[CMP]] 372; 373; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 374; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test1-check 375; IS__TUNIT_NPM-SAME: (i32* nocapture nofree readonly align 4 [[P:%.*]]) #[[ATTR0]] { 376; IS__TUNIT_NPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree readonly align 4 [[P]]) #[[ATTR2]], !range [[RNG2:![0-9]+]] 377; IS__TUNIT_NPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 378; IS__TUNIT_NPM-NEXT: ret i1 [[CMP]] 379; 380; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 381; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test1-check 382; IS__CGSCC_OPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 383; IS__CGSCC_OPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR3]], !range [[RNG2:![0-9]+]] 384; IS__CGSCC_OPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 385; IS__CGSCC_OPM-NEXT: ret i1 [[CMP]] 386; 387; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 388; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test1-check 389; IS__CGSCC_NPM-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 390; IS__CGSCC_NPM-NEXT: [[RES:%.*]] = tail call i32 @test1(i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P]]) #[[ATTR2]], !range [[RNG2:![0-9]+]] 391; IS__CGSCC_NPM-NEXT: [[CMP:%.*]] = icmp eq i32 [[RES]], 500 392; IS__CGSCC_NPM-NEXT: ret i1 [[CMP]] 393; 394 %res = tail call i32 @test1(i32* %p) 395 %cmp = icmp eq i32 %res, 500 396 ret i1 %cmp 397} 398 399; TEST2 400; int test2(int *p) { return *p == 0 ? 4 : 3; } 401; int test2_check(int *p) { 402; int call = test2(p); 403; if (call == 5) { 404; // dead block 405; return 2; 406; } else { 407; return 3; 408; } 409; } 410 411define i32 @test2(i32* %p) { 412; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 413; IS__TUNIT____-LABEL: define {{[^@]+}}@test2 414; IS__TUNIT____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 415; IS__TUNIT____-NEXT: entry: 416; IS__TUNIT____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4 417; IS__TUNIT____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0 418; IS__TUNIT____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3 419; IS__TUNIT____-NEXT: ret i32 [[COND]] 420; 421; IS__CGSCC____: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 422; IS__CGSCC____-LABEL: define {{[^@]+}}@test2 423; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readonly align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR0]] { 424; IS__CGSCC____-NEXT: entry: 425; IS__CGSCC____-NEXT: [[TMP0:%.*]] = load i32, i32* [[P]], align 4 426; IS__CGSCC____-NEXT: [[TOBOOL:%.*]] = icmp eq i32 [[TMP0]], 0 427; IS__CGSCC____-NEXT: [[COND:%.*]] = select i1 [[TOBOOL]], i32 4, i32 3 428; IS__CGSCC____-NEXT: ret i32 [[COND]] 429; 430entry: 431 %0 = load i32, i32* %p, align 4 432 %tobool = icmp eq i32 %0, 0 433 %cond = select i1 %tobool, i32 4, i32 3 434 ret i32 %cond 435} 436 437define i32 @test2_check(i32* %p) { 438; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 439; IS__TUNIT____-LABEL: define {{[^@]+}}@test2_check 440; IS__TUNIT____-SAME: (i32* nocapture nofree readnone align 4 [[P:%.*]]) #[[ATTR1:[0-9]+]] { 441; IS__TUNIT____-NEXT: entry: 442; IS__TUNIT____-NEXT: br label [[IF_THEN:%.*]] 443; IS__TUNIT____: if.then: 444; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] 445; IS__TUNIT____: if.end: 446; IS__TUNIT____-NEXT: unreachable 447; IS__TUNIT____: return: 448; IS__TUNIT____-NEXT: ret i32 2 449; 450; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 451; IS__CGSCC____-LABEL: define {{[^@]+}}@test2_check 452; IS__CGSCC____-SAME: (i32* nocapture nofree noundef nonnull readnone align 4 dereferenceable(4) [[P:%.*]]) #[[ATTR1:[0-9]+]] { 453; IS__CGSCC____-NEXT: entry: 454; IS__CGSCC____-NEXT: br label [[IF_THEN:%.*]] 455; IS__CGSCC____: if.then: 456; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] 457; IS__CGSCC____: if.end: 458; IS__CGSCC____-NEXT: unreachable 459; IS__CGSCC____: return: 460; IS__CGSCC____-NEXT: ret i32 2 461; 462entry: 463 %call = tail call i32 @test2(i32* %p) 464 %cmp = icmp slt i32 %call, 5 465 br i1 %cmp, label %if.then, label %if.end 466 467if.then: ; preds = %entry 468 br label %return 469 470if.end: ; preds = %entry 471 br label %return 472 473return: ; preds = %if.end, %if.then 474 %retval.0 = phi i32 [ 2, %if.then ], [ 3, %if.end ] 475 ret i32 %retval.0 476} 477 478; TEST 3 SECV test 479 480; void unkown(); 481; int r1(unsigned int u){ 482; int sum = 0; 483; for(int i = 0; i<100;i++){ 484; sum += i; 485; } 486; // sum = 50 * 49 / 2 487; if(sum > 10000){ 488; // dead block 489; return 20; 490; }else { 491; return 10; 492; } 493; } 494; void f1(int u){ 495; if(r1(u) > 15){ 496; // deadblock 497; unkown(); 498; }else { 499; return; 500; } 501; } 502 503declare dso_local void @unkown() 504 505define internal i32 @r1(i32) local_unnamed_addr { 506; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone 507; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@r1 508; IS__TUNIT_OPM-SAME: () local_unnamed_addr #[[ATTR2:[0-9]+]] { 509; IS__TUNIT_OPM-NEXT: br label [[TMP4:%.*]] 510; IS__TUNIT_OPM: 1: 511; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP7:%.*]], 10000 512; IS__TUNIT_OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[F:%.*]] 513; IS__TUNIT_OPM: 3: 514; IS__TUNIT_OPM-NEXT: ret i32 20 515; IS__TUNIT_OPM: f: 516; IS__TUNIT_OPM-NEXT: ret i32 10 517; IS__TUNIT_OPM: 4: 518; IS__TUNIT_OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP8:%.*]], [[TMP4]] ] 519; IS__TUNIT_OPM-NEXT: [[TMP6:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP7]], [[TMP4]] ] 520; IS__TUNIT_OPM-NEXT: [[TMP7]] = add nuw nsw i32 [[TMP5]], [[TMP6]] 521; IS__TUNIT_OPM-NEXT: [[TMP8]] = add nuw nsw i32 [[TMP5]], 1 522; IS__TUNIT_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 100 523; IS__TUNIT_OPM-NEXT: br i1 [[TMP9]], label [[TMP1:%.*]], label [[TMP4]] 524; 525; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone 526; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@r1 527; IS__CGSCC_OPM-SAME: () local_unnamed_addr #[[ATTR2:[0-9]+]] { 528; IS__CGSCC_OPM-NEXT: br label [[TMP4:%.*]] 529; IS__CGSCC_OPM: 1: 530; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP7:%.*]], 10000 531; IS__CGSCC_OPM-NEXT: br i1 [[TMP2]], label [[TMP3:%.*]], label [[F:%.*]] 532; IS__CGSCC_OPM: 3: 533; IS__CGSCC_OPM-NEXT: ret i32 20 534; IS__CGSCC_OPM: f: 535; IS__CGSCC_OPM-NEXT: ret i32 10 536; IS__CGSCC_OPM: 4: 537; IS__CGSCC_OPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP8:%.*]], [[TMP4]] ] 538; IS__CGSCC_OPM-NEXT: [[TMP6:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP7]], [[TMP4]] ] 539; IS__CGSCC_OPM-NEXT: [[TMP7]] = add nuw nsw i32 [[TMP5]], [[TMP6]] 540; IS__CGSCC_OPM-NEXT: [[TMP8]] = add nuw nsw i32 [[TMP5]], 1 541; IS__CGSCC_OPM-NEXT: [[TMP9:%.*]] = icmp eq i32 [[TMP8]], 100 542; IS__CGSCC_OPM-NEXT: br i1 [[TMP9]], label [[TMP1:%.*]], label [[TMP4]] 543; 544; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 545; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@r1 546; IS__CGSCC_NPM-SAME: () local_unnamed_addr #[[ATTR1]] { 547; IS__CGSCC_NPM-NEXT: br label [[TMP3:%.*]] 548; IS__CGSCC_NPM: 1: 549; IS__CGSCC_NPM-NEXT: br label [[F:%.*]] 550; IS__CGSCC_NPM: 2: 551; IS__CGSCC_NPM-NEXT: unreachable 552; IS__CGSCC_NPM: f: 553; IS__CGSCC_NPM-NEXT: ret i32 undef 554; IS__CGSCC_NPM: 3: 555; IS__CGSCC_NPM-NEXT: [[TMP4:%.*]] = phi i32 [ 0, [[TMP0:%.*]] ], [ [[TMP7:%.*]], [[TMP3]] ] 556; IS__CGSCC_NPM-NEXT: [[TMP5:%.*]] = phi i32 [ 0, [[TMP0]] ], [ [[TMP6:%.*]], [[TMP3]] ] 557; IS__CGSCC_NPM-NEXT: [[TMP6]] = add nuw nsw i32 [[TMP4]], [[TMP5]] 558; IS__CGSCC_NPM-NEXT: [[TMP7]] = add nuw nsw i32 [[TMP4]], 1 559; IS__CGSCC_NPM-NEXT: [[TMP8:%.*]] = icmp eq i32 [[TMP7]], 100 560; IS__CGSCC_NPM-NEXT: br i1 [[TMP8]], label [[TMP1:%.*]], label [[TMP3]] 561; 562 br label %5 563 5642: ; preds = %5 565 %3 = icmp sgt i32 %8, 10000 566 br i1 %3, label %4, label %f 5674: 568 ret i32 20 569f: 570 ret i32 10 5715: ; preds = %5, %1 572 %6 = phi i32 [ 0, %1 ], [ %9, %5 ] 573 %7 = phi i32 [ 0, %1 ], [ %8, %5 ] 574 %8 = add nuw nsw i32 %6, %7 575 %9 = add nuw nsw i32 %6, 1 576 %10 = icmp eq i32 %9, 100 577 br i1 %10, label %2, label %5 578} 579 580define void @f1(i32){ 581; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@f1 582; IS__TUNIT_OPM-SAME: (i32 [[TMP0:%.*]]) { 583; IS__TUNIT_OPM-NEXT: [[TMP2:%.*]] = tail call i32 @r1() #[[ATTR2]] 584; IS__TUNIT_OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 15 585; IS__TUNIT_OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]] 586; IS__TUNIT_OPM: 4: 587; IS__TUNIT_OPM-NEXT: tail call void @unkown() 588; IS__TUNIT_OPM-NEXT: br label [[TMP5]] 589; IS__TUNIT_OPM: 5: 590; IS__TUNIT_OPM-NEXT: ret void 591; 592; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn 593; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@f1 594; IS__TUNIT_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR1]] { 595; IS__TUNIT_NPM-NEXT: br label [[TMP3:%.*]] 596; IS__TUNIT_NPM: 2: 597; IS__TUNIT_NPM-NEXT: unreachable 598; IS__TUNIT_NPM: 3: 599; IS__TUNIT_NPM-NEXT: ret void 600; 601; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@f1 602; IS__CGSCC_OPM-SAME: (i32 [[TMP0:%.*]]) { 603; IS__CGSCC_OPM-NEXT: [[TMP2:%.*]] = tail call i32 @r1() #[[ATTR4:[0-9]+]], !range [[RNG3:![0-9]+]] 604; IS__CGSCC_OPM-NEXT: [[TMP3:%.*]] = icmp sgt i32 [[TMP2]], 15 605; IS__CGSCC_OPM-NEXT: br i1 [[TMP3]], label [[TMP4:%.*]], label [[TMP5:%.*]] 606; IS__CGSCC_OPM: 4: 607; IS__CGSCC_OPM-NEXT: tail call void @unkown() 608; IS__CGSCC_OPM-NEXT: br label [[TMP5]] 609; IS__CGSCC_OPM: 5: 610; IS__CGSCC_OPM-NEXT: ret void 611; 612; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 613; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@f1 614; IS__CGSCC_NPM-SAME: (i32 [[TMP0:%.*]]) #[[ATTR1]] { 615; IS__CGSCC_NPM-NEXT: br label [[TMP3:%.*]] 616; IS__CGSCC_NPM: 2: 617; IS__CGSCC_NPM-NEXT: unreachable 618; IS__CGSCC_NPM: 3: 619; IS__CGSCC_NPM-NEXT: ret void 620; 621 %2 = tail call i32 @r1(i32 %0) 622 %3 = icmp sgt i32 %2, 15 623 br i1 %3, label %4, label %5 624 6254: ; preds = %1 626 tail call void @unkown() 627 br label %5 628 6295: ; preds = %1, %4 630 ret void 631} 632 633; TEST4 LVI test 634 635; f1 636; int test4-f1(int u){ 637; if(u>=0) { 638; return u; 639; }else{ 640; return 0; 641; } 642; } 643define dso_local i32 @test4-f1(i32 %u) { 644; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 645; IS__TUNIT____-LABEL: define {{[^@]+}}@test4-f1 646; IS__TUNIT____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 647; IS__TUNIT____-NEXT: entry: 648; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1 649; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]] 650; IS__TUNIT____: if.then: 651; IS__TUNIT____-NEXT: br label [[RETURN]] 652; IS__TUNIT____: return: 653; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[U]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ] 654; IS__TUNIT____-NEXT: ret i32 [[RETVAL_0]] 655; 656; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 657; IS__CGSCC____-LABEL: define {{[^@]+}}@test4-f1 658; IS__CGSCC____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 659; IS__CGSCC____-NEXT: entry: 660; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1 661; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[RETURN:%.*]] 662; IS__CGSCC____: if.then: 663; IS__CGSCC____-NEXT: br label [[RETURN]] 664; IS__CGSCC____: return: 665; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[U]], [[IF_THEN]] ], [ 0, [[ENTRY:%.*]] ] 666; IS__CGSCC____-NEXT: ret i32 [[RETVAL_0]] 667; 668; FIXME: RETVAL_0 >= 0 669entry: 670 %cmp = icmp sgt i32 %u, -1 671 br i1 %cmp, label %if.then, label %return 672 673if.then: ; preds = %entry 674 br label %return 675 676return: ; preds = %entry, %if.then 677 %retval.0 = phi i32 [ %u, %if.then ], [ 0, %entry ] 678 ret i32 %retval.0 679} 680 681 682define dso_local i32 @test4-g1(i32 %u) { 683; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 684; IS__TUNIT____-LABEL: define {{[^@]+}}@test4-g1 685; IS__TUNIT____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 686; IS__TUNIT____-NEXT: entry: 687; IS__TUNIT____-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR1]] 688; IS__TUNIT____-NEXT: ret i32 [[CALL]] 689; 690; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 691; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test4-g1 692; IS__CGSCC_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 693; IS__CGSCC_OPM-NEXT: entry: 694; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR5:[0-9]+]] 695; IS__CGSCC_OPM-NEXT: ret i32 [[CALL]] 696; 697; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 698; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4-g1 699; IS__CGSCC_NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 700; IS__CGSCC_NPM-NEXT: entry: 701; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f1(i32 [[U]]) #[[ATTR3:[0-9]+]] 702; IS__CGSCC_NPM-NEXT: ret i32 [[CALL]] 703; 704; FIXME: %call should have range [0, inf] 705 706entry: 707 %call = tail call i32 @test4-f1(i32 %u) 708 ret i32 %call 709} 710 711; f2 712; int test4-f1(int u){ 713; if(u>-1) { 714; return u+1; 715; }else{ 716; return 1; 717; } 718; } 719define dso_local i32 @test4-f2(i32 %u) { 720; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 721; IS__TUNIT____-LABEL: define {{[^@]+}}@test4-f2 722; IS__TUNIT____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 723; IS__TUNIT____-NEXT: entry: 724; IS__TUNIT____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1 725; IS__TUNIT____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 726; IS__TUNIT____: if.then: 727; IS__TUNIT____-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[U]], 1 728; IS__TUNIT____-NEXT: br label [[RETURN:%.*]] 729; IS__TUNIT____: if.else: 730; IS__TUNIT____-NEXT: br label [[RETURN]] 731; IS__TUNIT____: return: 732; IS__TUNIT____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[ADD]], [[IF_THEN]] ], [ 1, [[IF_ELSE]] ] 733; IS__TUNIT____-NEXT: ret i32 [[RETVAL_0]] 734; 735; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 736; IS__CGSCC____-LABEL: define {{[^@]+}}@test4-f2 737; IS__CGSCC____-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 738; IS__CGSCC____-NEXT: entry: 739; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp sgt i32 [[U]], -1 740; IS__CGSCC____-NEXT: br i1 [[CMP]], label [[IF_THEN:%.*]], label [[IF_ELSE:%.*]] 741; IS__CGSCC____: if.then: 742; IS__CGSCC____-NEXT: [[ADD:%.*]] = add nuw nsw i32 [[U]], 1 743; IS__CGSCC____-NEXT: br label [[RETURN:%.*]] 744; IS__CGSCC____: if.else: 745; IS__CGSCC____-NEXT: br label [[RETURN]] 746; IS__CGSCC____: return: 747; IS__CGSCC____-NEXT: [[RETVAL_0:%.*]] = phi i32 [ [[ADD]], [[IF_THEN]] ], [ 1, [[IF_ELSE]] ] 748; IS__CGSCC____-NEXT: ret i32 [[RETVAL_0]] 749; 750entry: 751 %cmp = icmp sgt i32 %u, -1 752 br i1 %cmp, label %if.then, label %if.else 753 754if.then: ; preds = %entry 755 %add = add nuw nsw i32 %u, 1 756 br label %return 757 758if.else: ; preds = %entry 759 br label %return 760 761return: ; preds = %if.else, %if.then 762 %retval.0 = phi i32 [ %add, %if.then ], [ 1, %if.else ] 763 ret i32 %retval.0 764} 765 766 767define dso_local i32 @test4-g2(i32 %u) { 768; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn 769; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test4-g2 770; IS__TUNIT_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 771; IS__TUNIT_OPM-NEXT: entry: 772; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR1]] 773; IS__TUNIT_OPM-NEXT: ret i32 [[CALL]] 774; 775; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn 776; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@test4-g2 777; IS__TUNIT_NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 778; IS__TUNIT_NPM-NEXT: entry: 779; IS__TUNIT_NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR1]], !range [[RNG3:![0-9]+]] 780; IS__TUNIT_NPM-NEXT: ret i32 [[CALL]] 781; 782; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 783; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@test4-g2 784; IS__CGSCC_OPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 785; IS__CGSCC_OPM-NEXT: entry: 786; IS__CGSCC_OPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR5]] 787; IS__CGSCC_OPM-NEXT: ret i32 [[CALL]] 788; 789; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 790; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@test4-g2 791; IS__CGSCC_NPM-SAME: (i32 [[U:%.*]]) #[[ATTR1]] { 792; IS__CGSCC_NPM-NEXT: entry: 793; IS__CGSCC_NPM-NEXT: [[CALL:%.*]] = tail call i32 @test4-f2(i32 [[U]]) #[[ATTR3]], !range [[RNG3:![0-9]+]] 794; IS__CGSCC_NPM-NEXT: ret i32 [[CALL]] 795; 796entry: 797 %call = tail call i32 @test4-f2(i32 %u) 798 ret i32 %call 799} 800 801define dso_local i32 @test-5() { 802; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@test-5() { 803; IS__TUNIT_OPM-NEXT: entry: 804; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call noundef i32 @rec(i32 noundef 0), !range [[RNG3:![0-9]+]] 805; IS__TUNIT_OPM-NEXT: ret i32 [[CALL]] 806; 807; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@test-5() { 808; NOT_TUNIT_OPM-NEXT: entry: 809; NOT_TUNIT_OPM-NEXT: [[CALL:%.*]] = call noundef i32 @rec(i32 noundef 0), !range [[RNG4:![0-9]+]] 810; NOT_TUNIT_OPM-NEXT: ret i32 [[CALL]] 811; 812entry: 813 %call = call i32 @rec(i32 0) 814 ret i32 %call 815} 816define internal i32 @rec(i32 %depth) { 817; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@rec 818; IS__TUNIT_OPM-SAME: (i32 [[DEPTH:%.*]]) { 819; IS__TUNIT_OPM-NEXT: entry: 820; IS__TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @foo(i32 [[DEPTH]]) 821; IS__TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL]], 0 822; IS__TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 823; IS__TUNIT_OPM: if.then: 824; IS__TUNIT_OPM-NEXT: br label [[RETURN:%.*]] 825; IS__TUNIT_OPM: if.end: 826; IS__TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[DEPTH]], 10 827; IS__TUNIT_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN1:%.*]], label [[IF_END3:%.*]] 828; IS__TUNIT_OPM: if.then1: 829; IS__TUNIT_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[DEPTH]], 1 830; IS__TUNIT_OPM-NEXT: [[CALL2:%.*]] = call i32 @rec(i32 [[ADD]]), !range [[RNG3]] 831; IS__TUNIT_OPM-NEXT: br label [[IF_END3]] 832; IS__TUNIT_OPM: if.end3: 833; IS__TUNIT_OPM-NEXT: br label [[RETURN]] 834; IS__TUNIT_OPM: return: 835; IS__TUNIT_OPM-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 0, [[IF_THEN]] ], [ 1, [[IF_END3]] ] 836; IS__TUNIT_OPM-NEXT: ret i32 [[RETVAL_0]] 837; 838; NOT_TUNIT_OPM-LABEL: define {{[^@]+}}@rec 839; NOT_TUNIT_OPM-SAME: (i32 [[DEPTH:%.*]]) { 840; NOT_TUNIT_OPM-NEXT: entry: 841; NOT_TUNIT_OPM-NEXT: [[CALL:%.*]] = call i32 @foo(i32 [[DEPTH]]) 842; NOT_TUNIT_OPM-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[CALL]], 0 843; NOT_TUNIT_OPM-NEXT: br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] 844; NOT_TUNIT_OPM: if.then: 845; NOT_TUNIT_OPM-NEXT: br label [[RETURN:%.*]] 846; NOT_TUNIT_OPM: if.end: 847; NOT_TUNIT_OPM-NEXT: [[CMP:%.*]] = icmp slt i32 [[DEPTH]], 10 848; NOT_TUNIT_OPM-NEXT: br i1 [[CMP]], label [[IF_THEN1:%.*]], label [[IF_END3:%.*]] 849; NOT_TUNIT_OPM: if.then1: 850; NOT_TUNIT_OPM-NEXT: [[ADD:%.*]] = add nsw i32 [[DEPTH]], 1 851; NOT_TUNIT_OPM-NEXT: [[CALL2:%.*]] = call i32 @rec(i32 [[ADD]]), !range [[RNG4]] 852; NOT_TUNIT_OPM-NEXT: br label [[IF_END3]] 853; NOT_TUNIT_OPM: if.end3: 854; NOT_TUNIT_OPM-NEXT: br label [[RETURN]] 855; NOT_TUNIT_OPM: return: 856; NOT_TUNIT_OPM-NEXT: [[RETVAL_0:%.*]] = phi i32 [ 0, [[IF_THEN]] ], [ 1, [[IF_END3]] ] 857; NOT_TUNIT_OPM-NEXT: ret i32 [[RETVAL_0]] 858; 859entry: 860 %call = call i32 @foo(i32 %depth) 861 %tobool = icmp ne i32 %call, 0 862 br i1 %tobool, label %if.then, label %if.end 863 864if.then: ; preds = %entry 865 br label %return 866 867if.end: ; preds = %entry 868 %cmp = icmp slt i32 %depth, 10 869 br i1 %cmp, label %if.then1, label %if.end3 870 871if.then1: ; preds = %if.end 872 %add = add nsw i32 %depth, 1 873 %call2 = call i32 @rec(i32 %add) 874 br label %if.end3 875 876if.end3: ; preds = %if.then1, %if.end 877 br label %return 878 879return: ; preds = %if.end3, %if.then 880 %retval.0 = phi i32 [ 0, %if.then ], [ 1, %if.end3 ] 881 ret i32 %retval.0 882} 883declare dso_local i32 @foo(i32) 884 885 886; Examples taken from https://llvm.discourse.group/t/impossible-condition-optimization/461/1 887; 888; The important part is that we return a constant (false) 889; 890; { 891 892; FIXME: All but the return is not needed anymore 893define dso_local zeroext i1 @phi(i32 %arg) { 894; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 895; IS__TUNIT____-LABEL: define {{[^@]+}}@phi 896; IS__TUNIT____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 897; IS__TUNIT____-NEXT: bb: 898; IS__TUNIT____-NEXT: [[TMP:%.*]] = icmp sgt i32 [[ARG]], 5 899; IS__TUNIT____-NEXT: br i1 [[TMP]], label [[BB1:%.*]], label [[BB2:%.*]] 900; IS__TUNIT____: bb1: 901; IS__TUNIT____-NEXT: br label [[BB3:%.*]] 902; IS__TUNIT____: bb2: 903; IS__TUNIT____-NEXT: br label [[BB3]] 904; IS__TUNIT____: bb3: 905; IS__TUNIT____-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[ARG]], 10 906; IS__TUNIT____-NEXT: br i1 [[TMP4]], label [[BB5:%.*]], label [[BB7:%.*]] 907; IS__TUNIT____: bb5: 908; IS__TUNIT____-NEXT: br label [[BB9:%.*]] 909; IS__TUNIT____: bb7: 910; IS__TUNIT____-NEXT: br label [[BB9]] 911; IS__TUNIT____: bb9: 912; IS__TUNIT____-NEXT: br label [[BB12:%.*]] 913; IS__TUNIT____: bb11: 914; IS__TUNIT____-NEXT: unreachable 915; IS__TUNIT____: bb12: 916; IS__TUNIT____-NEXT: br label [[BB13:%.*]] 917; IS__TUNIT____: bb13: 918; IS__TUNIT____-NEXT: ret i1 false 919; 920; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 921; IS__CGSCC____-LABEL: define {{[^@]+}}@phi 922; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 923; IS__CGSCC____-NEXT: bb: 924; IS__CGSCC____-NEXT: [[TMP:%.*]] = icmp sgt i32 [[ARG]], 5 925; IS__CGSCC____-NEXT: br i1 [[TMP]], label [[BB1:%.*]], label [[BB2:%.*]] 926; IS__CGSCC____: bb1: 927; IS__CGSCC____-NEXT: br label [[BB3:%.*]] 928; IS__CGSCC____: bb2: 929; IS__CGSCC____-NEXT: br label [[BB3]] 930; IS__CGSCC____: bb3: 931; IS__CGSCC____-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[ARG]], 10 932; IS__CGSCC____-NEXT: br i1 [[TMP4]], label [[BB5:%.*]], label [[BB7:%.*]] 933; IS__CGSCC____: bb5: 934; IS__CGSCC____-NEXT: br label [[BB9:%.*]] 935; IS__CGSCC____: bb7: 936; IS__CGSCC____-NEXT: br label [[BB9]] 937; IS__CGSCC____: bb9: 938; IS__CGSCC____-NEXT: br label [[BB12:%.*]] 939; IS__CGSCC____: bb11: 940; IS__CGSCC____-NEXT: unreachable 941; IS__CGSCC____: bb12: 942; IS__CGSCC____-NEXT: br label [[BB13:%.*]] 943; IS__CGSCC____: bb13: 944; IS__CGSCC____-NEXT: ret i1 false 945; 946bb: 947 %tmp = icmp sgt i32 %arg, 5 948 br i1 %tmp, label %bb1, label %bb2 949 950bb1: ; preds = %bb 951 br label %bb3 952 953bb2: ; preds = %bb 954 br label %bb3 955 956bb3: ; preds = %bb2, %bb1 957 %.02 = phi i32 [ 1, %bb1 ], [ 2, %bb2 ] 958 %tmp4 = icmp sgt i32 %arg, 10 959 br i1 %tmp4, label %bb5, label %bb7 960 961bb5: ; preds = %bb3 962 %tmp6 = add nsw i32 %.02, 1 963 br label %bb9 964 965bb7: ; preds = %bb3 966 %tmp8 = add nsw i32 %.02, 2 967 br label %bb9 968 969bb9: ; preds = %bb7, %bb5 970 %.01 = phi i32 [ %tmp6, %bb5 ], [ %tmp8, %bb7 ] 971 %tmp10 = icmp eq i32 %.01, 5 972 br i1 %tmp10, label %bb11, label %bb12 973 974bb11: ; preds = %bb9 975 br label %bb13 976 977bb12: ; preds = %bb9 978 br label %bb13 979 980bb13: ; preds = %bb12, %bb11 981 %.0 = phi i1 [ true, %bb11 ], [ false, %bb12 ] 982 ret i1 %.0 983} 984 985define dso_local i1 @select(i32 %a) local_unnamed_addr #0 { 986; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 987; IS__TUNIT____-LABEL: define {{[^@]+}}@select 988; IS__TUNIT____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 989; IS__TUNIT____-NEXT: entry: 990; IS__TUNIT____-NEXT: ret i1 false 991; 992; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 993; IS__CGSCC____-LABEL: define {{[^@]+}}@select 994; IS__CGSCC____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 995; IS__CGSCC____-NEXT: entry: 996; IS__CGSCC____-NEXT: ret i1 false 997; 998entry: 999 %cmp = icmp sgt i32 %a, 5 1000 %. = select i1 %cmp, i32 1, i32 2 1001 %cmp1 = icmp sgt i32 %a, 10 1002 %y.0.v = select i1 %cmp1, i32 1, i32 2 1003 %y.0 = add nuw nsw i32 %., %y.0.v 1004 %cmp6 = icmp eq i32 %y.0, 5 1005 ret i1 %cmp6 1006} 1007 1008define dso_local i32 @select_zext(i32 %a) local_unnamed_addr #0 { 1009; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1010; IS__TUNIT____-LABEL: define {{[^@]+}}@select_zext 1011; IS__TUNIT____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 1012; IS__TUNIT____-NEXT: entry: 1013; IS__TUNIT____-NEXT: ret i32 0 1014; 1015; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1016; IS__CGSCC____-LABEL: define {{[^@]+}}@select_zext 1017; IS__CGSCC____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 1018; IS__CGSCC____-NEXT: entry: 1019; IS__CGSCC____-NEXT: ret i32 0 1020; 1021entry: 1022 %cmp = icmp sgt i32 %a, 5 1023 %. = select i1 %cmp, i32 1, i32 2 1024 %cmp1 = icmp sgt i32 %a, 10 1025 %y.0.v = select i1 %cmp1, i32 1, i32 2 1026 %y.0 = add nuw nsw i32 %., %y.0.v 1027 %cmp6 = icmp eq i32 %y.0, 5 1028 %.13 = zext i1 %cmp6 to i32 1029 ret i32 %.13 1030} 1031 1032define dso_local i64 @select_int2ptr_bitcast_ptr2int(i32 %a) local_unnamed_addr #0 { 1033; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1034; IS__TUNIT____-LABEL: define {{[^@]+}}@select_int2ptr_bitcast_ptr2int 1035; IS__TUNIT____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 1036; IS__TUNIT____-NEXT: entry: 1037; IS__TUNIT____-NEXT: ret i64 0 1038; 1039; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1040; IS__CGSCC____-LABEL: define {{[^@]+}}@select_int2ptr_bitcast_ptr2int 1041; IS__CGSCC____-SAME: (i32 [[A:%.*]]) local_unnamed_addr #[[ATTR1]] { 1042; IS__CGSCC____-NEXT: entry: 1043; IS__CGSCC____-NEXT: ret i64 0 1044; 1045entry: 1046 %cmp = icmp sgt i32 %a, 5 1047 %. = select i1 %cmp, i32 1, i32 2 1048 %cmp1 = icmp sgt i32 %a, 10 1049 %y.0.v = select i1 %cmp1, i32 1, i32 2 1050 %y.0 = add nuw nsw i32 %., %y.0.v 1051 %cmp6 = icmp eq i32 %y.0, 5 1052 %i2p = inttoptr i1 %cmp6 to i1* 1053 %bc = bitcast i1* %i2p to i32* 1054 %p2i = ptrtoint i32* %bc to i64 1055 ret i64 %p2i 1056} 1057 1058; } 1059 1060define i1 @f_fcmp(float %a, float %b) { 1061; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1062; IS__TUNIT____-LABEL: define {{[^@]+}}@f_fcmp 1063; IS__TUNIT____-SAME: (float [[A:%.*]], float [[B:%.*]]) #[[ATTR1]] { 1064; IS__TUNIT____-NEXT: [[R:%.*]] = fcmp uge float [[A]], [[B]] 1065; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 1066; IS__TUNIT____-NEXT: ret i1 [[S]] 1067; 1068; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1069; IS__CGSCC____-LABEL: define {{[^@]+}}@f_fcmp 1070; IS__CGSCC____-SAME: (float [[A:%.*]], float [[B:%.*]]) #[[ATTR1]] { 1071; IS__CGSCC____-NEXT: [[R:%.*]] = fcmp uge float [[A]], [[B]] 1072; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 1073; IS__CGSCC____-NEXT: ret i1 [[S]] 1074; 1075 %r = fcmp uge float %a, %b 1076 %s = select i1 %r, i1 %r, i1 0 1077 ret i1 %s 1078} 1079define i1 @d_fcmp(double %a, double %b) { 1080; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1081; IS__TUNIT____-LABEL: define {{[^@]+}}@d_fcmp 1082; IS__TUNIT____-SAME: (double [[A:%.*]], double [[B:%.*]]) #[[ATTR1]] { 1083; IS__TUNIT____-NEXT: [[R:%.*]] = fcmp oeq double [[A]], [[B]] 1084; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 1085; IS__TUNIT____-NEXT: ret i1 [[S]] 1086; 1087; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1088; IS__CGSCC____-LABEL: define {{[^@]+}}@d_fcmp 1089; IS__CGSCC____-SAME: (double [[A:%.*]], double [[B:%.*]]) #[[ATTR1]] { 1090; IS__CGSCC____-NEXT: [[R:%.*]] = fcmp oeq double [[A]], [[B]] 1091; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 1092; IS__CGSCC____-NEXT: ret i1 [[S]] 1093; 1094 %r = fcmp oeq double %a, %b 1095 %s = select i1 %r, i1 %r, i1 0 1096 ret i1 %s 1097} 1098define i1 @dp_icmp(double* %a, double* %b) { 1099; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1100; IS__TUNIT____-LABEL: define {{[^@]+}}@dp_icmp 1101; IS__TUNIT____-SAME: (double* nofree readnone [[A:%.*]], double* nofree readnone [[B:%.*]]) #[[ATTR1]] { 1102; IS__TUNIT____-NEXT: [[R:%.*]] = icmp sge double* [[A]], [[B]] 1103; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 1104; IS__TUNIT____-NEXT: ret i1 [[S]] 1105; 1106; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1107; IS__CGSCC____-LABEL: define {{[^@]+}}@dp_icmp 1108; IS__CGSCC____-SAME: (double* nofree readnone [[A:%.*]], double* nofree readnone [[B:%.*]]) #[[ATTR1]] { 1109; IS__CGSCC____-NEXT: [[R:%.*]] = icmp sge double* [[A]], [[B]] 1110; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 1111; IS__CGSCC____-NEXT: ret i1 [[S]] 1112; 1113 %r = icmp sge double* %a, %b 1114 %s = select i1 %r, i1 %r, i1 0 1115 ret i1 %s 1116} 1117define i1 @ip_icmp(i8* %a, i8* %b) { 1118; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1119; IS__TUNIT____-LABEL: define {{[^@]+}}@ip_icmp 1120; IS__TUNIT____-SAME: (i8* nofree readnone [[A:%.*]], i8* nofree readnone [[B:%.*]]) #[[ATTR1]] { 1121; IS__TUNIT____-NEXT: [[R:%.*]] = icmp ult i8* [[A]], [[B]] 1122; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 1123; IS__TUNIT____-NEXT: ret i1 [[S]] 1124; 1125; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1126; IS__CGSCC____-LABEL: define {{[^@]+}}@ip_icmp 1127; IS__CGSCC____-SAME: (i8* nofree readnone [[A:%.*]], i8* nofree readnone [[B:%.*]]) #[[ATTR1]] { 1128; IS__CGSCC____-NEXT: [[R:%.*]] = icmp ult i8* [[A]], [[B]] 1129; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[R]], i1 [[R]], i1 false 1130; IS__CGSCC____-NEXT: ret i1 [[S]] 1131; 1132 %r = icmp ult i8* %a, %b 1133 %s = select i1 %r, i1 %r, i1 0 1134 ret i1 %s 1135} 1136define i1 @fcmp_caller(float %fa, float %fb, double %da, double %db, double* %dpa, double* %dpb, i8* %ipa, i8* %ipb) { 1137; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1138; IS__TUNIT____-LABEL: define {{[^@]+}}@fcmp_caller 1139; IS__TUNIT____-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] { 1140; IS__TUNIT____-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR1]] 1141; IS__TUNIT____-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR1]] 1142; IS__TUNIT____-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR1]] 1143; IS__TUNIT____-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR1]] 1144; IS__TUNIT____-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]] 1145; IS__TUNIT____-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]] 1146; IS__TUNIT____-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]] 1147; IS__TUNIT____-NEXT: ret i1 [[O3]] 1148; 1149; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1150; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@fcmp_caller 1151; IS__CGSCC_OPM-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] { 1152; IS__CGSCC_OPM-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR5]] 1153; IS__CGSCC_OPM-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR5]] 1154; IS__CGSCC_OPM-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR5]] 1155; IS__CGSCC_OPM-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR5]] 1156; IS__CGSCC_OPM-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]] 1157; IS__CGSCC_OPM-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]] 1158; IS__CGSCC_OPM-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]] 1159; IS__CGSCC_OPM-NEXT: ret i1 [[O3]] 1160; 1161; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1162; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@fcmp_caller 1163; IS__CGSCC_NPM-SAME: (float [[FA:%.*]], float [[FB:%.*]], double [[DA:%.*]], double [[DB:%.*]], double* nofree readnone [[DPA:%.*]], double* nofree readnone [[DPB:%.*]], i8* nofree readnone [[IPA:%.*]], i8* nofree readnone [[IPB:%.*]]) #[[ATTR1]] { 1164; IS__CGSCC_NPM-NEXT: [[R1:%.*]] = call i1 @f_fcmp(float [[FA]], float [[FB]]) #[[ATTR3]] 1165; IS__CGSCC_NPM-NEXT: [[R2:%.*]] = call i1 @d_fcmp(double [[DA]], double [[DB]]) #[[ATTR3]] 1166; IS__CGSCC_NPM-NEXT: [[R3:%.*]] = call i1 @dp_icmp(double* noalias nofree readnone [[DPA]], double* noalias nofree readnone [[DPB]]) #[[ATTR3]] 1167; IS__CGSCC_NPM-NEXT: [[R4:%.*]] = call i1 @ip_icmp(i8* noalias nofree readnone [[IPA]], i8* noalias nofree readnone [[IPB]]) #[[ATTR3]] 1168; IS__CGSCC_NPM-NEXT: [[O1:%.*]] = or i1 [[R1]], [[R2]] 1169; IS__CGSCC_NPM-NEXT: [[O2:%.*]] = or i1 [[R3]], [[R4]] 1170; IS__CGSCC_NPM-NEXT: [[O3:%.*]] = or i1 [[O1]], [[O2]] 1171; IS__CGSCC_NPM-NEXT: ret i1 [[O3]] 1172; 1173 %r1 = call i1 @f_fcmp(float %fa, float %fb) 1174 %r2 = call i1 @d_fcmp(double %da, double %db) 1175 %r3 = call i1 @dp_icmp(double* %dpa, double* %dpb) 1176 %r4 = call i1 @ip_icmp(i8* %ipa, i8* %ipb) 1177 %o1 = or i1 %r1, %r2 1178 %o2 = or i1 %r3, %r4 1179 %o3 = or i1 %o1, %o2 1180 ret i1 %o3 1181} 1182 1183define i8 @ret_two() { 1184; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1185; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_two 1186; IS__TUNIT____-SAME: () #[[ATTR1]] { 1187; IS__TUNIT____-NEXT: ret i8 2 1188; 1189; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1190; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_two 1191; IS__CGSCC____-SAME: () #[[ATTR1]] { 1192; IS__CGSCC____-NEXT: ret i8 2 1193; 1194 ret i8 2 1195} 1196define i8 @ret_undef() { 1197; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1198; IS__TUNIT____-LABEL: define {{[^@]+}}@ret_undef 1199; IS__TUNIT____-SAME: () #[[ATTR1]] { 1200; IS__TUNIT____-NEXT: ret i8 undef 1201; 1202; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1203; IS__CGSCC____-LABEL: define {{[^@]+}}@ret_undef 1204; IS__CGSCC____-SAME: () #[[ATTR1]] { 1205; IS__CGSCC____-NEXT: ret i8 undef 1206; 1207 ret i8 undef 1208} 1209 1210; Verify we collapse undef to a value and return something non-undef here. 1211define i8 @undef_collapse_1() { 1212; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1213; IS__TUNIT____-LABEL: define {{[^@]+}}@undef_collapse_1 1214; IS__TUNIT____-SAME: () #[[ATTR1]] { 1215; IS__TUNIT____-NEXT: ret i8 0 1216; 1217; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1218; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_collapse_1 1219; IS__CGSCC____-SAME: () #[[ATTR1]] { 1220; IS__CGSCC____-NEXT: ret i8 0 1221; 1222 %c = call i8 @ret_undef() 1223 %s = shl i8 %c, 2 1224 ret i8 %s 1225} 1226 1227; Verify we collapse undef to a value and return something non-undef here. 1228define i8 @undef_collapse_2() { 1229; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1230; IS__TUNIT____-LABEL: define {{[^@]+}}@undef_collapse_2 1231; IS__TUNIT____-SAME: () #[[ATTR1]] { 1232; IS__TUNIT____-NEXT: ret i8 0 1233; 1234; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1235; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_collapse_2 1236; IS__CGSCC____-SAME: () #[[ATTR1]] { 1237; IS__CGSCC____-NEXT: ret i8 0 1238; 1239 %c = call i8 @ret_two() 1240 %s = shl i8 undef, %c 1241 ret i8 %s 1242} 1243 1244define i8 @undef_collapse_caller() { 1245; 1246; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1247; IS__TUNIT____-LABEL: define {{[^@]+}}@undef_collapse_caller 1248; IS__TUNIT____-SAME: () #[[ATTR1]] { 1249; IS__TUNIT____-NEXT: ret i8 0 1250; 1251; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1252; IS__CGSCC____-LABEL: define {{[^@]+}}@undef_collapse_caller 1253; IS__CGSCC____-SAME: () #[[ATTR1]] { 1254; IS__CGSCC____-NEXT: ret i8 0 1255; 1256 %c1 = call i8 @undef_collapse_1() 1257 %c2 = call i8 @undef_collapse_2() 1258 %a = add i8 %c1, %c2 1259 ret i8 %a 1260} 1261 1262define i32 @ret1or2(i1 %c) { 1263; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1264; IS__TUNIT____-LABEL: define {{[^@]+}}@ret1or2 1265; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1266; IS__TUNIT____-NEXT: [[S:%.*]] = select i1 [[C]], i32 1, i32 2 1267; IS__TUNIT____-NEXT: ret i32 [[S]] 1268; 1269; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1270; IS__CGSCC____-LABEL: define {{[^@]+}}@ret1or2 1271; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1272; IS__CGSCC____-NEXT: [[S:%.*]] = select i1 [[C]], i32 1, i32 2 1273; IS__CGSCC____-NEXT: ret i32 [[S]] 1274; 1275 %s = select i1 %c, i32 1, i32 2 1276 ret i32 %s 1277} 1278define i1 @callee_range_1(i1 %c1, i1 %c2, i1 %c3) { 1279; 1280; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1281; IS__TUNIT____-LABEL: define {{[^@]+}}@callee_range_1 1282; IS__TUNIT____-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]]) #[[ATTR1]] { 1283; IS__TUNIT____-NEXT: ret i1 true 1284; 1285; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1286; IS__CGSCC____-LABEL: define {{[^@]+}}@callee_range_1 1287; IS__CGSCC____-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]], i1 [[C3:%.*]]) #[[ATTR1]] { 1288; IS__CGSCC____-NEXT: ret i1 true 1289; 1290 %r1 = call i32 @ret1or2(i1 %c1) 1291 %r2 = call i32 @ret1or2(i1 %c2) 1292 %indirection = select i1 %c3, i32 %r1, i32 %r2 1293 %a = add i32 %r1, %indirection 1294 %i1 = icmp sle i32 %a, 4 1295 %i2 = icmp sge i32 %a, 2 1296 %f = and i1 %i1, %i2 1297 ret i1 %f 1298} 1299 1300define i1 @callee_range_2(i1 %c1, i1 %c2) { 1301; 1302; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn 1303; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@callee_range_2 1304; IS__TUNIT_OPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { 1305; IS__TUNIT_OPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR1]], !range [[RNG4:![0-9]+]] 1306; IS__TUNIT_OPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR1]], !range [[RNG4]] 1307; IS__TUNIT_OPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] 1308; IS__TUNIT_OPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 1309; IS__TUNIT_OPM-NEXT: [[F:%.*]] = and i1 [[I1]], true 1310; IS__TUNIT_OPM-NEXT: ret i1 [[F]] 1311; 1312; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn 1313; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@callee_range_2 1314; IS__TUNIT_NPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { 1315; IS__TUNIT_NPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR1]], !range [[RNG5:![0-9]+]] 1316; IS__TUNIT_NPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR1]], !range [[RNG5]] 1317; IS__TUNIT_NPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] 1318; IS__TUNIT_NPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 1319; IS__TUNIT_NPM-NEXT: ret i1 [[I1]] 1320; 1321; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1322; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@callee_range_2 1323; IS__CGSCC_OPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { 1324; IS__CGSCC_OPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR5]], !range [[RNG5:![0-9]+]] 1325; IS__CGSCC_OPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR5]], !range [[RNG5]] 1326; IS__CGSCC_OPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] 1327; IS__CGSCC_OPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 1328; IS__CGSCC_OPM-NEXT: [[F:%.*]] = and i1 [[I1]], true 1329; IS__CGSCC_OPM-NEXT: ret i1 [[F]] 1330; 1331; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1332; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@callee_range_2 1333; IS__CGSCC_NPM-SAME: (i1 [[C1:%.*]], i1 [[C2:%.*]]) #[[ATTR1]] { 1334; IS__CGSCC_NPM-NEXT: [[R1:%.*]] = call i32 @ret1or2(i1 [[C1]]) #[[ATTR3]], !range [[RNG5:![0-9]+]] 1335; IS__CGSCC_NPM-NEXT: [[R2:%.*]] = call i32 @ret1or2(i1 [[C2]]) #[[ATTR3]], !range [[RNG5]] 1336; IS__CGSCC_NPM-NEXT: [[A:%.*]] = add i32 [[R1]], [[R2]] 1337; IS__CGSCC_NPM-NEXT: [[I1:%.*]] = icmp sle i32 [[A]], 3 1338; IS__CGSCC_NPM-NEXT: ret i1 [[I1]] 1339; 1340 %r1 = call i32 @ret1or2(i1 %c1) 1341 %r2 = call i32 @ret1or2(i1 %c2) 1342 %a = add i32 %r1, %r2 1343 %i1 = icmp sle i32 %a, 3 1344 %i2 = icmp sge i32 %a, 2 1345 %f = and i1 %i1, %i2 1346 ret i1 %f 1347} 1348 1349 1350define i32 @ret100() { 1351; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1352; IS__TUNIT____-LABEL: define {{[^@]+}}@ret100 1353; IS__TUNIT____-SAME: () #[[ATTR1]] { 1354; IS__TUNIT____-NEXT: ret i32 100 1355; 1356; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1357; IS__CGSCC____-LABEL: define {{[^@]+}}@ret100 1358; IS__CGSCC____-SAME: () #[[ATTR1]] { 1359; IS__CGSCC____-NEXT: ret i32 100 1360; 1361 ret i32 100 1362} 1363 1364define i1 @ctx_adjustment(i32 %V) { 1365; 1366; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn 1367; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@ctx_adjustment 1368; IS__TUNIT_OPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] { 1369; IS__TUNIT_OPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100 1370; IS__TUNIT_OPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] 1371; IS__TUNIT_OPM: if.true: 1372; IS__TUNIT_OPM-NEXT: br label [[END:%.*]] 1373; IS__TUNIT_OPM: if.false: 1374; IS__TUNIT_OPM-NEXT: br label [[END]] 1375; IS__TUNIT_OPM: end: 1376; IS__TUNIT_OPM-NEXT: [[PHI:%.*]] = phi i32 [ [[V]], [[IF_TRUE]] ], [ 100, [[IF_FALSE]] ] 1377; IS__TUNIT_OPM-NEXT: [[C2:%.*]] = icmp sge i32 [[PHI]], 100 1378; IS__TUNIT_OPM-NEXT: ret i1 [[C2]] 1379; 1380; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn 1381; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@ctx_adjustment 1382; IS__TUNIT_NPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] { 1383; IS__TUNIT_NPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100 1384; IS__TUNIT_NPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] 1385; IS__TUNIT_NPM: if.true: 1386; IS__TUNIT_NPM-NEXT: br label [[END:%.*]] 1387; IS__TUNIT_NPM: if.false: 1388; IS__TUNIT_NPM-NEXT: br label [[END]] 1389; IS__TUNIT_NPM: end: 1390; IS__TUNIT_NPM-NEXT: ret i1 true 1391; 1392; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1393; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@ctx_adjustment 1394; IS__CGSCC_OPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] { 1395; IS__CGSCC_OPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100 1396; IS__CGSCC_OPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] 1397; IS__CGSCC_OPM: if.true: 1398; IS__CGSCC_OPM-NEXT: br label [[END:%.*]] 1399; IS__CGSCC_OPM: if.false: 1400; IS__CGSCC_OPM-NEXT: br label [[END]] 1401; IS__CGSCC_OPM: end: 1402; IS__CGSCC_OPM-NEXT: [[PHI:%.*]] = phi i32 [ [[V]], [[IF_TRUE]] ], [ 100, [[IF_FALSE]] ] 1403; IS__CGSCC_OPM-NEXT: [[C2:%.*]] = icmp sge i32 [[PHI]], 100 1404; IS__CGSCC_OPM-NEXT: ret i1 [[C2]] 1405; 1406; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1407; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@ctx_adjustment 1408; IS__CGSCC_NPM-SAME: (i32 [[V:%.*]]) #[[ATTR1]] { 1409; IS__CGSCC_NPM-NEXT: [[C1:%.*]] = icmp sge i32 [[V]], 100 1410; IS__CGSCC_NPM-NEXT: br i1 [[C1]], label [[IF_TRUE:%.*]], label [[IF_FALSE:%.*]] 1411; IS__CGSCC_NPM: if.true: 1412; IS__CGSCC_NPM-NEXT: br label [[END:%.*]] 1413; IS__CGSCC_NPM: if.false: 1414; IS__CGSCC_NPM-NEXT: br label [[END]] 1415; IS__CGSCC_NPM: end: 1416; IS__CGSCC_NPM-NEXT: ret i1 true 1417; 1418 %c1 = icmp sge i32 %V, 100 1419 br i1 %c1, label %if.true, label %if.false 1420if.true: 1421 br label %end 1422if.false: 1423 %call = call i32 @ret100() 1424 br label %end 1425end: 1426 %phi = phi i32 [ %V, %if.true ], [ %call, %if.false ] 1427 %c2 = icmp sge i32 %phi, 100 1428 ret i1 %c2 1429} 1430 1431 1432define i32 @func(i1 %c) { 1433; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1434; IS__TUNIT____-LABEL: define {{[^@]+}}@func 1435; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1436; IS__TUNIT____-NEXT: [[RET:%.*]] = select i1 [[C]], i32 0, i32 1 1437; IS__TUNIT____-NEXT: ret i32 [[RET]] 1438; 1439; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1440; IS__CGSCC____-LABEL: define {{[^@]+}}@func 1441; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1442; IS__CGSCC____-NEXT: [[RET:%.*]] = select i1 [[C]], i32 0, i32 1 1443; IS__CGSCC____-NEXT: ret i32 [[RET]] 1444; 1445 %ret = select i1 %c, i32 0, i32 1 1446 ret i32 %ret 1447} 1448 1449define i32 @simplify_callsite_argument(i1 %d) { 1450; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn 1451; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument 1452; IS__TUNIT_OPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { 1453; IS__TUNIT_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false 1454; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1455; IS__TUNIT_OPM: t: 1456; IS__TUNIT_OPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef [[C]]) #[[ATTR1]], !range [[RNG3]] 1457; IS__TUNIT_OPM-NEXT: ret i32 [[RET1]] 1458; IS__TUNIT_OPM: f: 1459; IS__TUNIT_OPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR1]], !range [[RNG3]] 1460; IS__TUNIT_OPM-NEXT: ret i32 [[RET2]] 1461; 1462; IS__TUNIT_NPM: Function Attrs: nofree nosync nounwind readnone willreturn 1463; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument 1464; IS__TUNIT_NPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { 1465; IS__TUNIT_NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false 1466; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1467; IS__TUNIT_NPM: t: 1468; IS__TUNIT_NPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef true) #[[ATTR1]], !range [[RNG4]] 1469; IS__TUNIT_NPM-NEXT: ret i32 [[RET1]] 1470; IS__TUNIT_NPM: f: 1471; IS__TUNIT_NPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR1]], !range [[RNG4]] 1472; IS__TUNIT_NPM-NEXT: ret i32 [[RET2]] 1473; 1474; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1475; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@simplify_callsite_argument 1476; IS__CGSCC_OPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { 1477; IS__CGSCC_OPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false 1478; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1479; IS__CGSCC_OPM: t: 1480; IS__CGSCC_OPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef [[C]]) #[[ATTR5]], !range [[RNG4]] 1481; IS__CGSCC_OPM-NEXT: ret i32 [[RET1]] 1482; IS__CGSCC_OPM: f: 1483; IS__CGSCC_OPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR5]], !range [[RNG4]] 1484; IS__CGSCC_OPM-NEXT: ret i32 [[RET2]] 1485; 1486; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1487; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@simplify_callsite_argument 1488; IS__CGSCC_NPM-SAME: (i1 [[D:%.*]]) #[[ATTR1]] { 1489; IS__CGSCC_NPM-NEXT: [[C:%.*]] = select i1 [[D]], i1 true, i1 false 1490; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1491; IS__CGSCC_NPM: t: 1492; IS__CGSCC_NPM-NEXT: [[RET1:%.*]] = call noundef i32 @func(i1 noundef true) #[[ATTR3]], !range [[RNG4]] 1493; IS__CGSCC_NPM-NEXT: ret i32 [[RET1]] 1494; IS__CGSCC_NPM: f: 1495; IS__CGSCC_NPM-NEXT: [[RET2:%.*]] = call noundef i32 @func(i1 noundef false) #[[ATTR3]], !range [[RNG4]] 1496; IS__CGSCC_NPM-NEXT: ret i32 [[RET2]] 1497; 1498 %c = select i1 %d, i1 true, i1 false 1499 br i1 %c, label %t, label %f 1500t: 1501 %ret1 = call i32 @func(i1 %c) 1502 ret i32 %ret1 1503f: 1504 %ret2 = call i32 @func(i1 false) 1505 ret i32 %ret2 1506} 1507 1508define internal i32 @less_than_65536(i32 %arg) { 1509; 1510; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1511; IS__CGSCC____-LABEL: define {{[^@]+}}@less_than_65536 1512; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 1513; IS__CGSCC____-NEXT: [[SHRINKED:%.*]] = udiv i32 undef, 65536 1514; IS__CGSCC____-NEXT: ret i32 undef 1515; 1516 %shrinked = udiv i32 %arg, 65536 1517 ret i32 %shrinked 1518} 1519 1520define internal i1 @is_less_than_65536(i32 %arg) { 1521; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1522; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_65536 1523; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 1524; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp ult i32 undef, 65536 1525; IS__CGSCC____-NEXT: ret i1 undef 1526; 1527 %cmp = icmp ult i32 %arg, 65536 1528 ret i1 %cmp 1529} 1530 1531define i1 @check_divided_range(i32 %arg) { 1532; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1533; IS__TUNIT____-LABEL: define {{[^@]+}}@check_divided_range 1534; IS__TUNIT____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 1535; IS__TUNIT____-NEXT: ret i1 true 1536; 1537; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1538; IS__CGSCC____-LABEL: define {{[^@]+}}@check_divided_range 1539; IS__CGSCC____-SAME: (i32 [[ARG:%.*]]) #[[ATTR1]] { 1540; IS__CGSCC____-NEXT: ret i1 true 1541; 1542 %csret1 = call i32 @less_than_65536(i32 0) 1543 %csret2 = call i32 @less_than_65536(i32 %arg) 1544 %true1 = call i1 @is_less_than_65536(i32 %csret1) 1545 %true2 = call i1 @is_less_than_65536(i32 %csret2) 1546 %ret = and i1 %true1, %true2 1547 ret i1 %ret 1548} 1549 1550define internal i32 @cast_and_return(i1 %c) { 1551; 1552; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1553; IS__CGSCC____-LABEL: define {{[^@]+}}@cast_and_return 1554; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1555; IS__CGSCC____-NEXT: [[RET:%.*]] = zext i1 undef to i32 1556; IS__CGSCC____-NEXT: ret i32 undef 1557; 1558 %ret = zext i1 %c to i32 1559 ret i32 %ret 1560} 1561 1562define internal i1 @is_less_than_3(i32 %c) { 1563; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1564; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_3 1565; IS__CGSCC____-SAME: () #[[ATTR1]] { 1566; IS__CGSCC____-NEXT: ret i1 undef 1567; 1568 %cmp = icmp slt i32 %c, 3 1569 ret i1 %cmp 1570} 1571 1572define i1 @check_casted_range(i1 %c) { 1573; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1574; IS__TUNIT____-LABEL: define {{[^@]+}}@check_casted_range 1575; IS__TUNIT____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1576; IS__TUNIT____-NEXT: ret i1 true 1577; 1578; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1579; IS__CGSCC____-LABEL: define {{[^@]+}}@check_casted_range 1580; IS__CGSCC____-SAME: (i1 [[C:%.*]]) #[[ATTR1]] { 1581; IS__CGSCC____-NEXT: ret i1 true 1582; 1583 %csret1 = call i32 @cast_and_return(i1 true) 1584 %csret2 = call i32 @cast_and_return(i1 %c) 1585 %add = add i32 %csret1, %csret2 1586 %ret = call i1 @is_less_than_3(i32 %add) 1587 ret i1 %ret 1588} 1589 1590define internal i32 @less_than_100_1(i32 %c) { 1591; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1592; IS__CGSCC____-LABEL: define {{[^@]+}}@less_than_100_1 1593; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1594; IS__CGSCC____-NEXT: switch i32 [[C]], label [[OTHERWISE:%.*]] [ 1595; IS__CGSCC____-NEXT: i32 0, label [[ONZERO:%.*]] 1596; IS__CGSCC____-NEXT: i32 1, label [[ONONE:%.*]] 1597; IS__CGSCC____-NEXT: i32 2, label [[ONTWO:%.*]] 1598; IS__CGSCC____-NEXT: i32 3, label [[ONTHREE:%.*]] 1599; IS__CGSCC____-NEXT: i32 4, label [[ONFOUR:%.*]] 1600; IS__CGSCC____-NEXT: i32 5, label [[ONFIVE:%.*]] 1601; IS__CGSCC____-NEXT: i32 6, label [[ONSIX:%.*]] 1602; IS__CGSCC____-NEXT: ] 1603; IS__CGSCC____: onzero: 1604; IS__CGSCC____-NEXT: ret i32 undef 1605; IS__CGSCC____: onone: 1606; IS__CGSCC____-NEXT: ret i32 undef 1607; IS__CGSCC____: ontwo: 1608; IS__CGSCC____-NEXT: ret i32 undef 1609; IS__CGSCC____: onthree: 1610; IS__CGSCC____-NEXT: ret i32 undef 1611; IS__CGSCC____: onfour: 1612; IS__CGSCC____-NEXT: ret i32 undef 1613; IS__CGSCC____: onfive: 1614; IS__CGSCC____-NEXT: ret i32 undef 1615; IS__CGSCC____: onsix: 1616; IS__CGSCC____-NEXT: ret i32 undef 1617; IS__CGSCC____: otherwise: 1618; IS__CGSCC____-NEXT: ret i32 undef 1619; 1620 switch i32 %c, label %otherwise [ i32 0, label %onzero 1621 i32 1, label %onone 1622 i32 2, label %ontwo 1623 i32 3, label %onthree 1624 i32 4, label %onfour 1625 i32 5, label %onfive 1626 i32 6, label %onsix] 1627onzero: 1628 ret i32 0 1629onone: 1630 ret i32 1 1631ontwo: 1632 ret i32 2 1633onthree: 1634 ret i32 3 1635onfour: 1636 ret i32 4 1637onfive: 1638 ret i32 5 1639onsix: 1640 ret i32 6 1641otherwise: 1642 ret i32 99 1643} 1644 1645define internal i1 @is_less_than_100_1(i32 %c) { 1646; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1647; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_100_1 1648; IS__CGSCC____-SAME: () #[[ATTR1]] { 1649; IS__CGSCC____-NEXT: ret i1 undef 1650; 1651 %cmp = icmp slt i32 %c, 100 1652 ret i1 %cmp 1653} 1654 1655define i1 @propagate_range1(i32 %c){ 1656; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1657; IS__TUNIT____-LABEL: define {{[^@]+}}@propagate_range1 1658; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1659; IS__TUNIT____-NEXT: ret i1 true 1660; 1661; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1662; IS__CGSCC____-LABEL: define {{[^@]+}}@propagate_range1 1663; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1664; IS__CGSCC____-NEXT: ret i1 true 1665; 1666 %csret = call i32 @less_than_100_1(i32 %c) 1667 %true = call i1 @is_less_than_100_1(i32 %csret) 1668 ret i1 %true 1669} 1670 1671define internal i32 @less_than_100_2(i32 %c) { 1672; 1673; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1674; IS__CGSCC____-LABEL: define {{[^@]+}}@less_than_100_2 1675; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1676; IS__CGSCC____-NEXT: switch i32 [[C]], label [[OTHERWISE:%.*]] [ 1677; IS__CGSCC____-NEXT: i32 0, label [[ONZERO:%.*]] 1678; IS__CGSCC____-NEXT: i32 1, label [[ONONE:%.*]] 1679; IS__CGSCC____-NEXT: i32 2, label [[ONTWO:%.*]] 1680; IS__CGSCC____-NEXT: i32 3, label [[ONTHREE:%.*]] 1681; IS__CGSCC____-NEXT: i32 4, label [[ONFOUR:%.*]] 1682; IS__CGSCC____-NEXT: i32 5, label [[ONFIVE:%.*]] 1683; IS__CGSCC____-NEXT: i32 6, label [[ONSIX:%.*]] 1684; IS__CGSCC____-NEXT: ] 1685; IS__CGSCC____: onzero: 1686; IS__CGSCC____-NEXT: ret i32 undef 1687; IS__CGSCC____: onone: 1688; IS__CGSCC____-NEXT: ret i32 undef 1689; IS__CGSCC____: ontwo: 1690; IS__CGSCC____-NEXT: ret i32 undef 1691; IS__CGSCC____: onthree: 1692; IS__CGSCC____-NEXT: ret i32 undef 1693; IS__CGSCC____: onfour: 1694; IS__CGSCC____-NEXT: ret i32 undef 1695; IS__CGSCC____: onfive: 1696; IS__CGSCC____-NEXT: ret i32 undef 1697; IS__CGSCC____: onsix: 1698; IS__CGSCC____-NEXT: ret i32 undef 1699; IS__CGSCC____: otherwise: 1700; IS__CGSCC____-NEXT: ret i32 undef 1701; 1702 switch i32 %c, label %otherwise [ i32 0, label %onzero 1703 i32 1, label %onone 1704 i32 2, label %ontwo 1705 i32 3, label %onthree 1706 i32 4, label %onfour 1707 i32 5, label %onfive 1708 i32 6, label %onsix] 1709onzero: 1710 ret i32 0 1711onone: 1712 ret i32 1 1713ontwo: 1714 ret i32 2 1715onthree: 1716 ret i32 3 1717onfour: 1718 ret i32 4 1719onfive: 1720 ret i32 5 1721onsix: 1722 ret i32 6 1723otherwise: 1724 ret i32 99 1725} 1726 1727define internal i1 @is_less_than_100_2(i32 %c) { 1728; 1729; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1730; IS__CGSCC____-LABEL: define {{[^@]+}}@is_less_than_100_2 1731; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1732; IS__CGSCC____-NEXT: [[CMP:%.*]] = icmp slt i32 undef, 100 1733; IS__CGSCC____-NEXT: ret i1 undef 1734; 1735 %cmp = icmp slt i32 %c, 100 1736 ret i1 %cmp 1737} 1738 1739define i1 @propagate_range2(i32 %c) { 1740; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn 1741; IS__TUNIT____-LABEL: define {{[^@]+}}@propagate_range2 1742; IS__TUNIT____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1743; IS__TUNIT____-NEXT: ret i1 true 1744; 1745; IS__CGSCC____: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1746; IS__CGSCC____-LABEL: define {{[^@]+}}@propagate_range2 1747; IS__CGSCC____-SAME: (i32 [[C:%.*]]) #[[ATTR1]] { 1748; IS__CGSCC____-NEXT: ret i1 true 1749; 1750 %csret1 = call i32 @less_than_100_2(i32 0) 1751 %true1 = call i1 @is_less_than_100_2(i32 %csret1) 1752 %csret2 = call i32 @less_than_100_2(i32 %c) 1753 %true2 = call i1 @is_less_than_100_2(i32 %csret2) 1754 %true = and i1 %true1, %true2 1755 ret i1 %true 1756} 1757 1758define internal i1 @non_zero(i8 %v) { 1759; IS__TUNIT_OPM: Function Attrs: nofree nosync nounwind readnone willreturn 1760; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@non_zero 1761; IS__TUNIT_OPM-SAME: (i8 [[V:%.*]]) #[[ATTR1]] { 1762; IS__TUNIT_OPM-NEXT: [[R:%.*]] = icmp ne i8 [[V]], 0 1763; IS__TUNIT_OPM-NEXT: ret i1 [[R]] 1764; 1765; IS__CGSCC_OPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1766; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@non_zero 1767; IS__CGSCC_OPM-SAME: (i8 [[V:%.*]]) #[[ATTR1]] { 1768; IS__CGSCC_OPM-NEXT: [[R:%.*]] = icmp ne i8 [[V]], 0 1769; IS__CGSCC_OPM-NEXT: ret i1 [[R]] 1770; 1771; IS__CGSCC_NPM: Function Attrs: nofree norecurse nosync nounwind readnone willreturn 1772; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@non_zero 1773; IS__CGSCC_NPM-SAME: () #[[ATTR1]] { 1774; IS__CGSCC_NPM-NEXT: ret i1 undef 1775; 1776 %r = icmp ne i8 %v, 0 1777 ret i1 %r 1778} 1779 1780; Avoid range metadata for %l below 1781define i1 @context(i8* %p) { 1782; IS__TUNIT_OPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 1783; IS__TUNIT_OPM-LABEL: define {{[^@]+}}@context 1784; IS__TUNIT_OPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { 1785; IS__TUNIT_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 1786; IS__TUNIT_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] 1787; IS__TUNIT_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1788; IS__TUNIT_OPM: t: 1789; IS__TUNIT_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) #[[ATTR1]] 1790; IS__TUNIT_OPM-NEXT: ret i1 [[R]] 1791; IS__TUNIT_OPM: f: 1792; IS__TUNIT_OPM-NEXT: ret i1 false 1793; 1794; IS__TUNIT_NPM: Function Attrs: argmemonly nofree nosync nounwind readonly willreturn 1795; IS__TUNIT_NPM-LABEL: define {{[^@]+}}@context 1796; IS__TUNIT_NPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { 1797; IS__TUNIT_NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 1798; IS__TUNIT_NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] 1799; IS__TUNIT_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1800; IS__TUNIT_NPM: t: 1801; IS__TUNIT_NPM-NEXT: ret i1 true 1802; IS__TUNIT_NPM: f: 1803; IS__TUNIT_NPM-NEXT: ret i1 false 1804; 1805; IS__CGSCC_OPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 1806; IS__CGSCC_OPM-LABEL: define {{[^@]+}}@context 1807; IS__CGSCC_OPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { 1808; IS__CGSCC_OPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 1809; IS__CGSCC_OPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] 1810; IS__CGSCC_OPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1811; IS__CGSCC_OPM: t: 1812; IS__CGSCC_OPM-NEXT: [[R:%.*]] = call i1 @non_zero(i8 [[L]]) #[[ATTR5]] 1813; IS__CGSCC_OPM-NEXT: ret i1 [[R]] 1814; IS__CGSCC_OPM: f: 1815; IS__CGSCC_OPM-NEXT: ret i1 false 1816; 1817; IS__CGSCC_NPM: Function Attrs: argmemonly nofree norecurse nosync nounwind readonly willreturn 1818; IS__CGSCC_NPM-LABEL: define {{[^@]+}}@context 1819; IS__CGSCC_NPM-SAME: (i8* nocapture nofree noundef nonnull readonly dereferenceable(1) [[P:%.*]]) #[[ATTR0]] { 1820; IS__CGSCC_NPM-NEXT: [[L:%.*]] = load i8, i8* [[P]], align 1 1821; IS__CGSCC_NPM-NEXT: [[C:%.*]] = icmp slt i8 0, [[L]] 1822; IS__CGSCC_NPM-NEXT: br i1 [[C]], label [[T:%.*]], label [[F:%.*]] 1823; IS__CGSCC_NPM: t: 1824; IS__CGSCC_NPM-NEXT: ret i1 true 1825; IS__CGSCC_NPM: f: 1826; IS__CGSCC_NPM-NEXT: ret i1 false 1827; 1828 %l = load i8, i8* %p 1829 %c = icmp slt i8 0, %l 1830 br i1 %c, label %t, label %f 1831t: 1832 %r = call i1 @non_zero(i8 %l) 1833 ret i1 %r 1834f: 1835 ret i1 false 1836} 1837 1838 1839define void @spam(i32* %arg, i32* %arg1) { 1840; CHECK-LABEL: define {{[^@]+}}@spam 1841; CHECK-SAME: (i32* nocapture nofree noundef nonnull readonly align 8 dereferenceable(4) [[ARG:%.*]], i32* nocapture nofree readnone [[ARG1:%.*]]) { 1842; CHECK-NEXT: bb: 1843; CHECK-NEXT: [[TMP:%.*]] = load i32, i32* [[ARG]], align 8 1844; CHECK-NEXT: [[TMP2:%.*]] = icmp ult i32 [[TMP]], 4 1845; CHECK-NEXT: br i1 [[TMP2]], label [[BB3:%.*]], label [[BB4:%.*]] 1846; CHECK: bb3: 1847; CHECK-NEXT: call fastcc void @wobble(i32 signext [[TMP]]) 1848; CHECK-NEXT: br label [[BB5:%.*]] 1849; CHECK: bb4: 1850; CHECK-NEXT: call void @ham(i32 [[TMP]]) 1851; CHECK-NEXT: br label [[BB5]] 1852; CHECK: bb5: 1853; CHECK-NEXT: ret void 1854; 1855bb: 1856 %tmp = load i32, i32* %arg, align 8 1857 %tmp2 = icmp ult i32 %tmp, 4 1858 br i1 %tmp2, label %bb3, label %bb4 1859 1860bb3: ; preds = %bb 1861 call fastcc void @wobble(i32 signext %tmp) 1862 br label %bb5 1863 1864bb4: ; preds = %bb 1865 call void @ham(i32 %tmp) 1866 br label %bb5 1867 1868bb5: ; preds = %bb4, %bb3 1869 ret void 1870} 1871 1872define internal fastcc void @wobble(i32 signext %arg) { 1873; CHECK-LABEL: define {{[^@]+}}@wobble 1874; CHECK-SAME: (i32 signext [[ARG:%.*]]) { 1875; CHECK-NEXT: bb: 1876; CHECK-NEXT: [[TMP:%.*]] = icmp ult i32 [[ARG]], 2 1877; CHECK-NEXT: br i1 [[TMP]], label [[BB1:%.*]], label [[BB2:%.*]] 1878; CHECK: bb1: 1879; CHECK-NEXT: call void @barney(i32 noundef signext 32, i32 noundef signext 0) 1880; CHECK-NEXT: br label [[BB3:%.*]] 1881; CHECK: bb2: 1882; CHECK-NEXT: br label [[BB3]] 1883; CHECK: bb3: 1884; CHECK-NEXT: ret void 1885; 1886bb: 1887 %tmp = icmp ult i32 %arg, 2 1888 br i1 %tmp, label %bb1, label %bb2 1889 1890bb1: ; preds = %bb 1891 call void @barney(i32 signext 32, i32 signext 0) 1892 br label %bb3 1893 1894bb2: ; preds = %bb 1895 br label %bb3 1896 1897bb3: ; preds = %bb2, %bb1 1898 ret void 1899} 1900 1901declare void @ham(i32) 1902 1903declare void @barney(i32 signext, i32 signext) 1904 1905 1906!0 = !{i32 0, i32 10} 1907!1 = !{i32 10, i32 100} 1908;. 1909; IS__TUNIT_OPM: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind readonly willreturn } 1910; IS__TUNIT_OPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } 1911; IS__TUNIT_OPM: attributes #[[ATTR2]] = { nofree nosync nounwind readnone } 1912; IS__TUNIT_OPM: attributes #[[ATTR3]] = { nofree nosync nounwind readonly willreturn } 1913;. 1914; IS__TUNIT_NPM: attributes #[[ATTR0]] = { argmemonly nofree nosync nounwind readonly willreturn } 1915; IS__TUNIT_NPM: attributes #[[ATTR1]] = { nofree nosync nounwind readnone willreturn } 1916; IS__TUNIT_NPM: attributes #[[ATTR2]] = { nofree nosync nounwind readonly willreturn } 1917;. 1918; IS__CGSCC_OPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } 1919; IS__CGSCC_OPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } 1920; IS__CGSCC_OPM: attributes #[[ATTR2]] = { nofree norecurse nosync nounwind readnone } 1921; IS__CGSCC_OPM: attributes #[[ATTR3]] = { readonly willreturn } 1922; IS__CGSCC_OPM: attributes #[[ATTR4]] = { nounwind readnone } 1923; IS__CGSCC_OPM: attributes #[[ATTR5]] = { readnone willreturn } 1924;. 1925; IS__CGSCC_NPM: attributes #[[ATTR0]] = { argmemonly nofree norecurse nosync nounwind readonly willreturn } 1926; IS__CGSCC_NPM: attributes #[[ATTR1]] = { nofree norecurse nosync nounwind readnone willreturn } 1927; IS__CGSCC_NPM: attributes #[[ATTR2]] = { readonly willreturn } 1928; IS__CGSCC_NPM: attributes #[[ATTR3]] = { readnone willreturn } 1929;. 1930; IS__TUNIT_OPM: [[RNG0]] = !{i32 0, i32 10} 1931; IS__TUNIT_OPM: [[RNG1]] = !{i32 10, i32 100} 1932; IS__TUNIT_OPM: [[RNG2]] = !{i32 200, i32 1091} 1933; IS__TUNIT_OPM: [[RNG3]] = !{i32 0, i32 2} 1934; IS__TUNIT_OPM: [[RNG4]] = !{i32 1, i32 3} 1935;. 1936; IS________NPM: [[RNG0]] = !{i32 0, i32 10} 1937; IS________NPM: [[RNG1]] = !{i32 10, i32 100} 1938; IS________NPM: [[META2:![0-9]+]] = !{i32 200, i32 1091} 1939; IS________NPM: [[META3:![0-9]+]] = !{i32 1, i32 -2147483648} 1940; IS________NPM: [[RNG4]] = !{i32 0, i32 2} 1941; IS________NPM: [[META5:![0-9]+]] = !{i32 1, i32 3} 1942;. 1943; IS__CGSCC_OPM: [[RNG0]] = !{i32 0, i32 10} 1944; IS__CGSCC_OPM: [[RNG1]] = !{i32 10, i32 100} 1945; IS__CGSCC_OPM: [[RNG2]] = !{i32 200, i32 1091} 1946; IS__CGSCC_OPM: [[RNG3]] = !{i32 10, i32 21} 1947; IS__CGSCC_OPM: [[RNG4]] = !{i32 0, i32 2} 1948; IS__CGSCC_OPM: [[RNG5]] = !{i32 1, i32 3} 1949;. 1950