1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F
8
9define <8 x i16> @zext_16i8_to_8i16(<16 x i8> %A) nounwind uwtable readnone ssp {
10; SSE2-LABEL: zext_16i8_to_8i16:
11; SSE2:       # BB#0: # %entry
12; SSE2-NEXT:    pxor %xmm1, %xmm1
13; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
14; SSE2-NEXT:    retq
15;
16; SSSE3-LABEL: zext_16i8_to_8i16:
17; SSSE3:       # BB#0: # %entry
18; SSSE3-NEXT:    pxor %xmm1, %xmm1
19; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
20; SSSE3-NEXT:    retq
21;
22; SSE41-LABEL: zext_16i8_to_8i16:
23; SSE41:       # BB#0: # %entry
24; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
25; SSE41-NEXT:    retq
26;
27; AVX-LABEL: zext_16i8_to_8i16:
28; AVX:       # BB#0: # %entry
29; AVX-NEXT:    vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
30; AVX-NEXT:    retq
31entry:
32  %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
33  %C = zext <8 x i8> %B to <8 x i16>
34  ret <8 x i16> %C
35}
36
37; PR17654
38define <16 x i16> @zext_16i8_to_16i16(<16 x i8> %A) {
39; SSE2-LABEL: zext_16i8_to_16i16:
40; SSE2:       # BB#0: # %entry
41; SSE2-NEXT:    movdqa %xmm0, %xmm1
42; SSE2-NEXT:    pxor %xmm2, %xmm2
43; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
44; SSE2-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15]
45; SSE2-NEXT:    retq
46;
47; SSSE3-LABEL: zext_16i8_to_16i16:
48; SSSE3:       # BB#0: # %entry
49; SSSE3-NEXT:    movdqa %xmm0, %xmm1
50; SSSE3-NEXT:    pxor %xmm2, %xmm2
51; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
52; SSSE3-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15]
53; SSSE3-NEXT:    retq
54;
55; SSE41-LABEL: zext_16i8_to_16i16:
56; SSE41:       # BB#0: # %entry
57; SSE41-NEXT:    movdqa %xmm0, %xmm1
58; SSE41-NEXT:    pxor %xmm2, %xmm2
59; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
60; SSE41-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15]
61; SSE41-NEXT:    retq
62;
63; AVX1-LABEL: zext_16i8_to_16i16:
64; AVX1:       # BB#0: # %entry
65; AVX1-NEXT:    vpxor %xmm1, %xmm1, %xmm1
66; AVX1-NEXT:    vpunpckhbw {{.*#+}} xmm1 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15]
67; AVX1-NEXT:    vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
68; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
69; AVX1-NEXT:    retq
70;
71; AVX2-LABEL: zext_16i8_to_16i16:
72; AVX2:       # BB#0: # %entry
73; AVX2-NEXT:    vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
74; AVX2-NEXT:    retq
75;
76; AVX512-LABEL: zext_16i8_to_16i16:
77; AVX512:       # BB#0: # %entry
78; AVX512-NEXT:    vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero
79; AVX512-NEXT:    retq
80entry:
81  %B = zext <16 x i8> %A to <16 x i16>
82  ret <16 x i16> %B
83}
84
85define <4 x i32> @zext_16i8_to_4i32(<16 x i8> %A) nounwind uwtable readnone ssp {
86; SSE2-LABEL: zext_16i8_to_4i32:
87; SSE2:       # BB#0: # %entry
88; SSE2-NEXT:    pxor %xmm1, %xmm1
89; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
90; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
91; SSE2-NEXT:    retq
92;
93; SSSE3-LABEL: zext_16i8_to_4i32:
94; SSSE3:       # BB#0: # %entry
95; SSSE3-NEXT:    pxor %xmm1, %xmm1
96; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
97; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
98; SSSE3-NEXT:    retq
99;
100; SSE41-LABEL: zext_16i8_to_4i32:
101; SSE41:       # BB#0: # %entry
102; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
103; SSE41-NEXT:    retq
104;
105; AVX-LABEL: zext_16i8_to_4i32:
106; AVX:       # BB#0: # %entry
107; AVX-NEXT:    vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
108; AVX-NEXT:    retq
109entry:
110  %B = shufflevector <16 x i8> %A, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
111  %C = zext <4 x i8> %B to <4 x i32>
112  ret <4 x i32> %C
113}
114
115define <8 x i32> @zext_16i8_to_8i32(<16 x i8> %A) nounwind uwtable readnone ssp {
116; SSE2-LABEL: zext_16i8_to_8i32:
117; SSE2:       # BB#0: # %entry
118; SSE2-NEXT:    movdqa %xmm0, %xmm1
119; SSE2-NEXT:    pxor %xmm2, %xmm2
120; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
121; SSE2-NEXT:    movdqa %xmm1, %xmm0
122; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
123; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
124; SSE2-NEXT:    retq
125;
126; SSSE3-LABEL: zext_16i8_to_8i32:
127; SSSE3:       # BB#0: # %entry
128; SSSE3-NEXT:    movdqa %xmm0, %xmm1
129; SSSE3-NEXT:    pxor %xmm2, %xmm2
130; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
131; SSSE3-NEXT:    movdqa %xmm1, %xmm0
132; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
133; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
134; SSSE3-NEXT:    retq
135;
136; SSE41-LABEL: zext_16i8_to_8i32:
137; SSE41:       # BB#0: # %entry
138; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
139; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
140; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
141; SSE41-NEXT:    movdqa %xmm2, %xmm0
142; SSE41-NEXT:    retq
143;
144; AVX1-LABEL: zext_16i8_to_8i32:
145; AVX1:       # BB#0: # %entry
146; AVX1-NEXT:    vpmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
147; AVX1-NEXT:    vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
148; AVX1-NEXT:    vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
149; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
150; AVX1-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
151; AVX1-NEXT:    retq
152;
153; AVX2-LABEL: zext_16i8_to_8i32:
154; AVX2:       # BB#0: # %entry
155; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
156; AVX2-NEXT:    vpand {{.*}}(%rip), %ymm0, %ymm0
157; AVX2-NEXT:    retq
158;
159; AVX512-LABEL: zext_16i8_to_8i32:
160; AVX512:       # BB#0: # %entry
161; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
162; AVX512-NEXT:    vpand {{.*}}(%rip), %ymm0, %ymm0
163; AVX512-NEXT:    retq
164entry:
165  %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
166  %C = zext <8 x i8> %B to <8 x i32>
167  ret <8 x i32> %C
168}
169
170define <2 x i64> @zext_16i8_to_2i64(<16 x i8> %A) nounwind uwtable readnone ssp {
171; SSE2-LABEL: zext_16i8_to_2i64:
172; SSE2:       # BB#0: # %entry
173; SSE2-NEXT:    pxor %xmm1, %xmm1
174; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
175; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
176; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
177; SSE2-NEXT:    retq
178;
179; SSSE3-LABEL: zext_16i8_to_2i64:
180; SSSE3:       # BB#0: # %entry
181; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
182; SSSE3-NEXT:    retq
183;
184; SSE41-LABEL: zext_16i8_to_2i64:
185; SSE41:       # BB#0: # %entry
186; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
187; SSE41-NEXT:    retq
188;
189; AVX-LABEL: zext_16i8_to_2i64:
190; AVX:       # BB#0: # %entry
191; AVX-NEXT:    vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
192; AVX-NEXT:    retq
193entry:
194  %B = shufflevector <16 x i8> %A, <16 x i8> undef, <2 x i32> <i32 0, i32 1>
195  %C = zext <2 x i8> %B to <2 x i64>
196  ret <2 x i64> %C
197}
198
199define <4 x i64> @zext_16i8_to_4i64(<16 x i8> %A) nounwind uwtable readnone ssp {
200; SSE2-LABEL: zext_16i8_to_4i64:
201; SSE2:       # BB#0: # %entry
202; SSE2-NEXT:    movdqa %xmm0, %xmm1
203; SSE2-NEXT:    pxor %xmm2, %xmm2
204; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
205; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
206; SSE2-NEXT:    movdqa %xmm1, %xmm0
207; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
208; SSE2-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
209; SSE2-NEXT:    retq
210;
211; SSSE3-LABEL: zext_16i8_to_4i64:
212; SSSE3:       # BB#0: # %entry
213; SSSE3-NEXT:    movdqa %xmm0, %xmm1
214; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
215; SSSE3-NEXT:    pshufb {{.*#+}} xmm1 = xmm1[2],zero,zero,zero,zero,zero,zero,zero,xmm1[3],zero,zero,zero,zero,zero,zero,zero
216; SSSE3-NEXT:    retq
217;
218; SSE41-LABEL: zext_16i8_to_4i64:
219; SSE41:       # BB#0: # %entry
220; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm2 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
221; SSE41-NEXT:    psrld $16, %xmm0
222; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
223; SSE41-NEXT:    movdqa %xmm2, %xmm0
224; SSE41-NEXT:    retq
225;
226; AVX1-LABEL: zext_16i8_to_4i64:
227; AVX1:       # BB#0: # %entry
228; AVX1-NEXT:    vpmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
229; AVX1-NEXT:    vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
230; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,2,3,3]
231; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
232; AVX1-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
233; AVX1-NEXT:    retq
234;
235; AVX2-LABEL: zext_16i8_to_4i64:
236; AVX2:       # BB#0: # %entry
237; AVX2-NEXT:    vpmovzxbq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero
238; AVX2-NEXT:    vpand {{.*}}(%rip), %ymm0, %ymm0
239; AVX2-NEXT:    retq
240;
241; AVX512-LABEL: zext_16i8_to_4i64:
242; AVX512:       # BB#0: # %entry
243; AVX512-NEXT:    vpmovzxbq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero
244; AVX512-NEXT:    vpand {{.*}}(%rip), %ymm0, %ymm0
245; AVX512-NEXT:    retq
246entry:
247  %B = shufflevector <16 x i8> %A, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
248  %C = zext <4 x i8> %B to <4 x i64>
249  ret <4 x i64> %C
250}
251
252define <4 x i32> @zext_8i16_to_4i32(<8 x i16> %A) nounwind uwtable readnone ssp {
253; SSE2-LABEL: zext_8i16_to_4i32:
254; SSE2:       # BB#0: # %entry
255; SSE2-NEXT:    pxor %xmm1, %xmm1
256; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
257; SSE2-NEXT:    retq
258;
259; SSSE3-LABEL: zext_8i16_to_4i32:
260; SSSE3:       # BB#0: # %entry
261; SSSE3-NEXT:    pxor %xmm1, %xmm1
262; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
263; SSSE3-NEXT:    retq
264;
265; SSE41-LABEL: zext_8i16_to_4i32:
266; SSE41:       # BB#0: # %entry
267; SSE41-NEXT:    pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
268; SSE41-NEXT:    retq
269;
270; AVX-LABEL: zext_8i16_to_4i32:
271; AVX:       # BB#0: # %entry
272; AVX-NEXT:    vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
273; AVX-NEXT:    retq
274entry:
275  %B = shufflevector <8 x i16> %A, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
276  %C = zext <4 x i16> %B to <4 x i32>
277  ret <4 x i32> %C
278}
279
280define <8 x i32> @zext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp {
281; SSE2-LABEL: zext_8i16_to_8i32:
282; SSE2:       # BB#0: # %entry
283; SSE2-NEXT:    movdqa %xmm0, %xmm1
284; SSE2-NEXT:    pxor %xmm2, %xmm2
285; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
286; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
287; SSE2-NEXT:    retq
288;
289; SSSE3-LABEL: zext_8i16_to_8i32:
290; SSSE3:       # BB#0: # %entry
291; SSSE3-NEXT:    movdqa %xmm0, %xmm1
292; SSSE3-NEXT:    pxor %xmm2, %xmm2
293; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
294; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
295; SSSE3-NEXT:    retq
296;
297; SSE41-LABEL: zext_8i16_to_8i32:
298; SSE41:       # BB#0: # %entry
299; SSE41-NEXT:    movdqa %xmm0, %xmm1
300; SSE41-NEXT:    pxor %xmm2, %xmm2
301; SSE41-NEXT:    pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
302; SSE41-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
303; SSE41-NEXT:    retq
304;
305; AVX1-LABEL: zext_8i16_to_8i32:
306; AVX1:       # BB#0: # %entry
307; AVX1-NEXT:    vpxor %xmm1, %xmm1, %xmm1
308; AVX1-NEXT:    vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
309; AVX1-NEXT:    vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
310; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
311; AVX1-NEXT:    retq
312;
313; AVX2-LABEL: zext_8i16_to_8i32:
314; AVX2:       # BB#0: # %entry
315; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
316; AVX2-NEXT:    retq
317;
318; AVX512-LABEL: zext_8i16_to_8i32:
319; AVX512:       # BB#0: # %entry
320; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
321; AVX512-NEXT:    retq
322entry:
323  %B = zext <8 x i16> %A to <8 x i32>
324  ret <8 x i32>%B
325}
326
327define <2 x i64> @zext_8i16_to_2i64(<8 x i16> %A) nounwind uwtable readnone ssp {
328; SSE2-LABEL: zext_8i16_to_2i64:
329; SSE2:       # BB#0: # %entry
330; SSE2-NEXT:    pxor %xmm1, %xmm1
331; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
332; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
333; SSE2-NEXT:    retq
334;
335; SSSE3-LABEL: zext_8i16_to_2i64:
336; SSSE3:       # BB#0: # %entry
337; SSSE3-NEXT:    pxor %xmm1, %xmm1
338; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
339; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
340; SSSE3-NEXT:    retq
341;
342; SSE41-LABEL: zext_8i16_to_2i64:
343; SSE41:       # BB#0: # %entry
344; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
345; SSE41-NEXT:    retq
346;
347; AVX-LABEL: zext_8i16_to_2i64:
348; AVX:       # BB#0: # %entry
349; AVX-NEXT:    vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
350; AVX-NEXT:    retq
351entry:
352  %B = shufflevector <8 x i16> %A, <8 x i16> undef, <2 x i32> <i32 0, i32 1>
353  %C = zext <2 x i16> %B to <2 x i64>
354  ret <2 x i64> %C
355}
356
357define <4 x i64> @zext_8i16_to_4i64(<8 x i16> %A) nounwind uwtable readnone ssp {
358; SSE2-LABEL: zext_8i16_to_4i64:
359; SSE2:       # BB#0: # %entry
360; SSE2-NEXT:    movdqa %xmm0, %xmm1
361; SSE2-NEXT:    pxor %xmm2, %xmm2
362; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
363; SSE2-NEXT:    movdqa %xmm1, %xmm0
364; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
365; SSE2-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
366; SSE2-NEXT:    retq
367;
368; SSSE3-LABEL: zext_8i16_to_4i64:
369; SSSE3:       # BB#0: # %entry
370; SSSE3-NEXT:    movdqa %xmm0, %xmm1
371; SSSE3-NEXT:    pxor %xmm2, %xmm2
372; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
373; SSSE3-NEXT:    movdqa %xmm1, %xmm0
374; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
375; SSSE3-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
376; SSSE3-NEXT:    retq
377;
378; SSE41-LABEL: zext_8i16_to_4i64:
379; SSE41:       # BB#0: # %entry
380; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
381; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
382; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
383; SSE41-NEXT:    movdqa %xmm2, %xmm0
384; SSE41-NEXT:    retq
385;
386; AVX1-LABEL: zext_8i16_to_4i64:
387; AVX1:       # BB#0: # %entry
388; AVX1-NEXT:    vpmovzxwd {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
389; AVX1-NEXT:    vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
390; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,2,3,3]
391; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
392; AVX1-NEXT:    vandps {{.*}}(%rip), %ymm0, %ymm0
393; AVX1-NEXT:    retq
394;
395; AVX2-LABEL: zext_8i16_to_4i64:
396; AVX2:       # BB#0: # %entry
397; AVX2-NEXT:    vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
398; AVX2-NEXT:    vpxor %ymm1, %ymm1, %ymm1
399; AVX2-NEXT:    vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7],ymm0[8],ymm1[9,10,11],ymm0[12],ymm1[13,14,15]
400; AVX2-NEXT:    retq
401;
402; AVX512-LABEL: zext_8i16_to_4i64:
403; AVX512:       # BB#0: # %entry
404; AVX512-NEXT:    vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
405; AVX512-NEXT:    vpxor %ymm1, %ymm1, %ymm1
406; AVX512-NEXT:    vpblendw {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3],ymm0[4],ymm1[5,6,7],ymm0[8],ymm1[9,10,11],ymm0[12],ymm1[13,14,15]
407; AVX512-NEXT:    retq
408entry:
409  %B = shufflevector <8 x i16> %A, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
410  %C = zext <4 x i16> %B to <4 x i64>
411  ret <4 x i64> %C
412}
413
414define <2 x i64> @zext_4i32_to_2i64(<4 x i32> %A) nounwind uwtable readnone ssp {
415; SSE2-LABEL: zext_4i32_to_2i64:
416; SSE2:       # BB#0: # %entry
417; SSE2-NEXT:    pxor %xmm1, %xmm1
418; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
419; SSE2-NEXT:    retq
420;
421; SSSE3-LABEL: zext_4i32_to_2i64:
422; SSSE3:       # BB#0: # %entry
423; SSSE3-NEXT:    pxor %xmm1, %xmm1
424; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
425; SSSE3-NEXT:    retq
426;
427; SSE41-LABEL: zext_4i32_to_2i64:
428; SSE41:       # BB#0: # %entry
429; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
430; SSE41-NEXT:    retq
431;
432; AVX-LABEL: zext_4i32_to_2i64:
433; AVX:       # BB#0: # %entry
434; AVX-NEXT:    vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
435; AVX-NEXT:    retq
436entry:
437  %B = shufflevector <4 x i32> %A, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
438  %C = zext <2 x i32> %B to <2 x i64>
439  ret <2 x i64> %C
440}
441
442define <4 x i64> @zext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp {
443; SSE2-LABEL: zext_4i32_to_4i64:
444; SSE2:       # BB#0: # %entry
445; SSE2-NEXT:    movdqa %xmm0, %xmm1
446; SSE2-NEXT:    pxor %xmm2, %xmm2
447; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
448; SSE2-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
449; SSE2-NEXT:    retq
450;
451; SSSE3-LABEL: zext_4i32_to_4i64:
452; SSSE3:       # BB#0: # %entry
453; SSSE3-NEXT:    movdqa %xmm0, %xmm1
454; SSSE3-NEXT:    pxor %xmm2, %xmm2
455; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
456; SSSE3-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
457; SSSE3-NEXT:    retq
458;
459; SSE41-LABEL: zext_4i32_to_4i64:
460; SSE41:       # BB#0: # %entry
461; SSE41-NEXT:    movdqa %xmm0, %xmm1
462; SSE41-NEXT:    pxor %xmm2, %xmm2
463; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero
464; SSE41-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
465; SSE41-NEXT:    retq
466;
467; AVX1-LABEL: zext_4i32_to_4i64:
468; AVX1:       # BB#0: # %entry
469; AVX1-NEXT:    vpxor %xmm1, %xmm1, %xmm1
470; AVX1-NEXT:    vpunpckhdq {{.*#+}} xmm1 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
471; AVX1-NEXT:    vpmovzxdq {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero
472; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
473; AVX1-NEXT:    retq
474;
475; AVX2-LABEL: zext_4i32_to_4i64:
476; AVX2:       # BB#0: # %entry
477; AVX2-NEXT:    vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
478; AVX2-NEXT:    retq
479;
480; AVX512-LABEL: zext_4i32_to_4i64:
481; AVX512:       # BB#0: # %entry
482; AVX512-NEXT:    vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
483; AVX512-NEXT:    retq
484entry:
485  %B = zext <4 x i32> %A to <4 x i64>
486  ret <4 x i64>%B
487}
488
489define <2 x i64> @load_zext_2i8_to_2i64(<2 x i8> *%ptr) {
490; SSE2-LABEL: load_zext_2i8_to_2i64:
491; SSE2:       # BB#0: # %entry
492; SSE2-NEXT:    movzwl (%rdi), %eax
493; SSE2-NEXT:    movd %eax, %xmm0
494; SSE2-NEXT:    pxor %xmm1, %xmm1
495; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
496; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
497; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
498; SSE2-NEXT:    retq
499;
500; SSSE3-LABEL: load_zext_2i8_to_2i64:
501; SSSE3:       # BB#0: # %entry
502; SSSE3-NEXT:    movzwl (%rdi), %eax
503; SSSE3-NEXT:    movd %eax, %xmm0
504; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
505; SSSE3-NEXT:    retq
506;
507; SSE41-LABEL: load_zext_2i8_to_2i64:
508; SSE41:       # BB#0: # %entry
509; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
510; SSE41-NEXT:    retq
511;
512; AVX-LABEL: load_zext_2i8_to_2i64:
513; AVX:       # BB#0: # %entry
514; AVX-NEXT:    vpmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
515; AVX-NEXT:    retq
516entry:
517 %X = load <2 x i8>, <2 x i8>* %ptr
518 %Y = zext <2 x i8> %X to <2 x i64>
519 ret <2 x i64> %Y
520}
521
522define <4 x i32> @load_zext_4i8_to_4i32(<4 x i8> *%ptr) {
523; SSE2-LABEL: load_zext_4i8_to_4i32:
524; SSE2:       # BB#0: # %entry
525; SSE2-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
526; SSE2-NEXT:    pxor %xmm1, %xmm1
527; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
528; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
529; SSE2-NEXT:    retq
530;
531; SSSE3-LABEL: load_zext_4i8_to_4i32:
532; SSSE3:       # BB#0: # %entry
533; SSSE3-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
534; SSSE3-NEXT:    pxor %xmm1, %xmm1
535; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
536; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
537; SSSE3-NEXT:    retq
538;
539; SSE41-LABEL: load_zext_4i8_to_4i32:
540; SSE41:       # BB#0: # %entry
541; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
542; SSE41-NEXT:    retq
543;
544; AVX-LABEL: load_zext_4i8_to_4i32:
545; AVX:       # BB#0: # %entry
546; AVX-NEXT:    vpmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
547; AVX-NEXT:    retq
548entry:
549 %X = load <4 x i8>, <4 x i8>* %ptr
550 %Y = zext <4 x i8> %X to <4 x i32>
551 ret <4 x i32> %Y
552}
553
554define <4 x i64> @load_zext_4i8_to_4i64(<4 x i8> *%ptr) {
555; SSE2-LABEL: load_zext_4i8_to_4i64:
556; SSE2:       # BB#0: # %entry
557; SSE2-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
558; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
559; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
560; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,1,1,3]
561; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
562; SSE2-NEXT:    pand %xmm2, %xmm0
563; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,1,3,3]
564; SSE2-NEXT:    pand %xmm2, %xmm1
565; SSE2-NEXT:    retq
566;
567; SSSE3-LABEL: load_zext_4i8_to_4i64:
568; SSSE3:       # BB#0: # %entry
569; SSSE3-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
570; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
571; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
572; SSSE3-NEXT:    movdqa %xmm1, %xmm0
573; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[4],zero,zero,zero,zero,zero,zero,zero
574; SSSE3-NEXT:    pshufb {{.*#+}} xmm1 = xmm1[8],zero,zero,zero,zero,zero,zero,zero,xmm1[12],zero,zero,zero,zero,zero,zero,zero
575; SSSE3-NEXT:    retq
576;
577; SSE41-LABEL: load_zext_4i8_to_4i64:
578; SSE41:       # BB#0: # %entry
579; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
580; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
581; SSE41-NEXT:    retq
582;
583; AVX1-LABEL: load_zext_4i8_to_4i64:
584; AVX1:       # BB#0: # %entry
585; AVX1-NEXT:    vpmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
586; AVX1-NEXT:    vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
587; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
588; AVX1-NEXT:    retq
589;
590; AVX2-LABEL: load_zext_4i8_to_4i64:
591; AVX2:       # BB#0: # %entry
592; AVX2-NEXT:    vpmovzxbq {{.*#+}} ymm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero,mem[2],zero,zero,zero,zero,zero,zero,zero,mem[3],zero,zero,zero,zero,zero,zero,zero
593; AVX2-NEXT:    retq
594;
595; AVX512-LABEL: load_zext_4i8_to_4i64:
596; AVX512:       # BB#0: # %entry
597; AVX512-NEXT:    vpmovzxbq {{.*#+}} ymm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero,mem[2],zero,zero,zero,zero,zero,zero,zero,mem[3],zero,zero,zero,zero,zero,zero,zero
598; AVX512-NEXT:    retq
599entry:
600 %X = load <4 x i8>, <4 x i8>* %ptr
601 %Y = zext <4 x i8> %X to <4 x i64>
602 ret <4 x i64> %Y
603}
604
605define <8 x i16> @load_zext_8i8_to_8i16(<8 x i8> *%ptr) {
606; SSE2-LABEL: load_zext_8i8_to_8i16:
607; SSE2:       # BB#0: # %entry
608; SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
609; SSE2-NEXT:    pxor %xmm1, %xmm1
610; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
611; SSE2-NEXT:    retq
612;
613; SSSE3-LABEL: load_zext_8i8_to_8i16:
614; SSSE3:       # BB#0: # %entry
615; SSSE3-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
616; SSSE3-NEXT:    pxor %xmm1, %xmm1
617; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
618; SSSE3-NEXT:    retq
619;
620; SSE41-LABEL: load_zext_8i8_to_8i16:
621; SSE41:       # BB#0: # %entry
622; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
623; SSE41-NEXT:    retq
624;
625; AVX-LABEL: load_zext_8i8_to_8i16:
626; AVX:       # BB#0: # %entry
627; AVX-NEXT:    vpmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
628; AVX-NEXT:    retq
629entry:
630 %X = load <8 x i8>, <8 x i8>* %ptr
631 %Y = zext <8 x i8> %X to <8 x i16>
632 ret <8 x i16> %Y
633}
634
635define <8 x i32> @load_zext_8i8_to_8i32(<8 x i8> *%ptr) {
636; SSE2-LABEL: load_zext_8i8_to_8i32:
637; SSE2:       # BB#0: # %entry
638; SSE2-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero
639; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
640; SSE2-NEXT:    movdqa %xmm1, %xmm0
641; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
642; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
643; SSE2-NEXT:    pand %xmm2, %xmm0
644; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
645; SSE2-NEXT:    pand %xmm2, %xmm1
646; SSE2-NEXT:    retq
647;
648; SSSE3-LABEL: load_zext_8i8_to_8i32:
649; SSSE3:       # BB#0: # %entry
650; SSSE3-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero
651; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
652; SSSE3-NEXT:    movdqa %xmm1, %xmm0
653; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[6],zero,zero,zero
654; SSSE3-NEXT:    pshufb {{.*#+}} xmm1 = xmm1[8],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[14],zero,zero,zero
655; SSSE3-NEXT:    retq
656;
657; SSE41-LABEL: load_zext_8i8_to_8i32:
658; SSE41:       # BB#0: # %entry
659; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
660; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
661; SSE41-NEXT:    retq
662;
663; AVX1-LABEL: load_zext_8i8_to_8i32:
664; AVX1:       # BB#0: # %entry
665; AVX1-NEXT:    vpmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
666; AVX1-NEXT:    vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
667; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
668; AVX1-NEXT:    retq
669;
670; AVX2-LABEL: load_zext_8i8_to_8i32:
671; AVX2:       # BB#0: # %entry
672; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
673; AVX2-NEXT:    retq
674;
675; AVX512-LABEL: load_zext_8i8_to_8i32:
676; AVX512:       # BB#0: # %entry
677; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero
678; AVX512-NEXT:    retq
679entry:
680 %X = load <8 x i8>, <8 x i8>* %ptr
681 %Y = zext <8 x i8> %X to <8 x i32>
682 ret <8 x i32> %Y
683}
684
685define <8 x i64> @load_zext_8i8_to_8i64(<8 x i8> *%ptr) {
686; SSE2-LABEL: load_zext_8i8_to_8i64:
687; SSE2:       # BB#0: # %entry
688; SSE2-NEXT:    movq {{.*#+}} xmm3 = mem[0],zero
689; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
690; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,1,0,3]
691; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,5,6,7]
692; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
693; SSE2-NEXT:    pand %xmm4, %xmm0
694; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm3[1,1,1,3]
695; SSE2-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,5,5,6,7]
696; SSE2-NEXT:    pand %xmm4, %xmm1
697; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[2,1,2,3]
698; SSE2-NEXT:    pshufhw {{.*#+}} xmm2 = xmm2[0,1,2,3,5,5,6,7]
699; SSE2-NEXT:    pand %xmm4, %xmm2
700; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[3,1,3,3]
701; SSE2-NEXT:    pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,5,5,6,7]
702; SSE2-NEXT:    pand %xmm4, %xmm3
703; SSE2-NEXT:    retq
704;
705; SSSE3-LABEL: load_zext_8i8_to_8i64:
706; SSSE3:       # BB#0: # %entry
707; SSSE3-NEXT:    movq {{.*#+}} xmm3 = mem[0],zero
708; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
709; SSSE3-NEXT:    movdqa %xmm3, %xmm0
710; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero
711; SSSE3-NEXT:    movdqa %xmm3, %xmm1
712; SSSE3-NEXT:    pshufb {{.*#+}} xmm1 = xmm1[4],zero,zero,zero,zero,zero,zero,zero,xmm1[6],zero,zero,zero,zero,zero,zero,zero
713; SSSE3-NEXT:    movdqa %xmm3, %xmm2
714; SSSE3-NEXT:    pshufb {{.*#+}} xmm2 = xmm2[8],zero,zero,zero,zero,zero,zero,zero,xmm2[10],zero,zero,zero,zero,zero,zero,zero
715; SSSE3-NEXT:    pshufb {{.*#+}} xmm3 = xmm3[12],zero,zero,zero,zero,zero,zero,zero,xmm3[14],zero,zero,zero,zero,zero,zero,zero
716; SSSE3-NEXT:    retq
717;
718; SSE41-LABEL: load_zext_8i8_to_8i64:
719; SSE41:       # BB#0: # %entry
720; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
721; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
722; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm2 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
723; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm3 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
724; SSE41-NEXT:    retq
725;
726; AVX1-LABEL: load_zext_8i8_to_8i64:
727; AVX1:       # BB#0: # %entry
728; AVX1-NEXT:    vpmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
729; AVX1-NEXT:    vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
730; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
731; AVX1-NEXT:    vpmovzxbq {{.*#+}} xmm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
732; AVX1-NEXT:    vpmovzxbq {{.*#+}} xmm2 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero
733; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm1, %ymm1
734; AVX1-NEXT:    retq
735;
736; AVX2-LABEL: load_zext_8i8_to_8i64:
737; AVX2:       # BB#0: # %entry
738; AVX2-NEXT:    vpmovzxbq {{.*#+}} ymm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero,mem[2],zero,zero,zero,zero,zero,zero,zero,mem[3],zero,zero,zero,zero,zero,zero,zero
739; AVX2-NEXT:    vpmovzxbq {{.*#+}} ymm1 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero,mem[2],zero,zero,zero,zero,zero,zero,zero,mem[3],zero,zero,zero,zero,zero,zero,zero
740; AVX2-NEXT:    retq
741;
742; AVX512-LABEL: load_zext_8i8_to_8i64:
743; AVX512:       # BB#0: # %entry
744; AVX512-NEXT:    vpmovzxbq {{.*#+}} zmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero,mem[2],zero,zero,zero,zero,zero,zero,zero,mem[3],zero,zero,zero,zero,zero,zero,zero,mem[4],zero,zero,zero,zero,zero,zero,zero,mem[5],zero,zero,zero,zero,zero,zero,zero,mem[6],zero,zero,zero,zero,zero,zero,zero,mem[7],zero,zero,zero,zero,zero,zero,zero
745; AVX512-NEXT:    retq
746entry:
747 %X = load <8 x i8>, <8 x i8>* %ptr
748 %Y = zext <8 x i8> %X to <8 x i64>
749 ret <8 x i64> %Y
750}
751
752define <16 x i16> @load_zext_16i8_to_16i16(<16 x i8> *%ptr) {
753; SSE2-LABEL: load_zext_16i8_to_16i16:
754; SSE2:       # BB#0: # %entry
755; SSE2-NEXT:    movdqa (%rdi), %xmm1
756; SSE2-NEXT:    pxor %xmm2, %xmm2
757; SSE2-NEXT:    movdqa %xmm1, %xmm0
758; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
759; SSE2-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15]
760; SSE2-NEXT:    retq
761;
762; SSSE3-LABEL: load_zext_16i8_to_16i16:
763; SSSE3:       # BB#0: # %entry
764; SSSE3-NEXT:    movdqa (%rdi), %xmm1
765; SSSE3-NEXT:    pxor %xmm2, %xmm2
766; SSSE3-NEXT:    movdqa %xmm1, %xmm0
767; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
768; SSSE3-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15]
769; SSSE3-NEXT:    retq
770;
771; SSE41-LABEL: load_zext_16i8_to_16i16:
772; SSE41:       # BB#0: # %entry
773; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
774; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
775; SSE41-NEXT:    retq
776;
777; AVX1-LABEL: load_zext_16i8_to_16i16:
778; AVX1:       # BB#0: # %entry
779; AVX1-NEXT:    vpmovzxbw {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
780; AVX1-NEXT:    vpmovzxbw {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
781; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
782; AVX1-NEXT:    retq
783;
784; AVX2-LABEL: load_zext_16i8_to_16i16:
785; AVX2:       # BB#0: # %entry
786; AVX2-NEXT:    vpmovzxbw {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero,mem[8],zero,mem[9],zero,mem[10],zero,mem[11],zero,mem[12],zero,mem[13],zero,mem[14],zero,mem[15],zero
787; AVX2-NEXT:    retq
788;
789; AVX512-LABEL: load_zext_16i8_to_16i16:
790; AVX512:       # BB#0: # %entry
791; AVX512-NEXT:    vpmovzxbw {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero,mem[8],zero,mem[9],zero,mem[10],zero,mem[11],zero,mem[12],zero,mem[13],zero,mem[14],zero,mem[15],zero
792; AVX512-NEXT:    retq
793entry:
794 %X = load <16 x i8>, <16 x i8>* %ptr
795 %Y = zext <16 x i8> %X to <16 x i16>
796 ret <16 x i16> %Y
797}
798
799define <2 x i64> @load_zext_2i16_to_2i64(<2 x i16> *%ptr) {
800; SSE2-LABEL: load_zext_2i16_to_2i64:
801; SSE2:       # BB#0: # %entry
802; SSE2-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
803; SSE2-NEXT:    pxor %xmm1, %xmm1
804; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
805; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
806; SSE2-NEXT:    retq
807;
808; SSSE3-LABEL: load_zext_2i16_to_2i64:
809; SSSE3:       # BB#0: # %entry
810; SSSE3-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
811; SSSE3-NEXT:    pxor %xmm1, %xmm1
812; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
813; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
814; SSSE3-NEXT:    retq
815;
816; SSE41-LABEL: load_zext_2i16_to_2i64:
817; SSE41:       # BB#0: # %entry
818; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
819; SSE41-NEXT:    retq
820;
821; AVX-LABEL: load_zext_2i16_to_2i64:
822; AVX:       # BB#0: # %entry
823; AVX-NEXT:    vpmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
824; AVX-NEXT:    retq
825entry:
826 %X = load <2 x i16>, <2 x i16>* %ptr
827 %Y = zext <2 x i16> %X to <2 x i64>
828 ret <2 x i64> %Y
829}
830
831define <4 x i32> @load_zext_4i16_to_4i32(<4 x i16> *%ptr) {
832; SSE2-LABEL: load_zext_4i16_to_4i32:
833; SSE2:       # BB#0: # %entry
834; SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
835; SSE2-NEXT:    pxor %xmm1, %xmm1
836; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
837; SSE2-NEXT:    retq
838;
839; SSSE3-LABEL: load_zext_4i16_to_4i32:
840; SSSE3:       # BB#0: # %entry
841; SSSE3-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
842; SSSE3-NEXT:    pxor %xmm1, %xmm1
843; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
844; SSSE3-NEXT:    retq
845;
846; SSE41-LABEL: load_zext_4i16_to_4i32:
847; SSE41:       # BB#0: # %entry
848; SSE41-NEXT:    pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
849; SSE41-NEXT:    retq
850;
851; AVX-LABEL: load_zext_4i16_to_4i32:
852; AVX:       # BB#0: # %entry
853; AVX-NEXT:    vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
854; AVX-NEXT:    retq
855entry:
856 %X = load <4 x i16>, <4 x i16>* %ptr
857 %Y = zext <4 x i16> %X to <4 x i32>
858 ret <4 x i32> %Y
859}
860
861define <4 x i64> @load_zext_4i16_to_4i64(<4 x i16> *%ptr) {
862; SSE2-LABEL: load_zext_4i16_to_4i64:
863; SSE2:       # BB#0: # %entry
864; SSE2-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero
865; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
866; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[0,1,1,3]
867; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [65535,0,0,0,65535,0,0,0]
868; SSE2-NEXT:    pand %xmm2, %xmm0
869; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,1,3,3]
870; SSE2-NEXT:    pand %xmm2, %xmm1
871; SSE2-NEXT:    retq
872;
873; SSSE3-LABEL: load_zext_4i16_to_4i64:
874; SSSE3:       # BB#0: # %entry
875; SSSE3-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero
876; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
877; SSSE3-NEXT:    movdqa %xmm1, %xmm0
878; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1],zero,zero,zero,zero,zero,zero,xmm0[4,5],zero,zero,zero,zero,zero,zero
879; SSSE3-NEXT:    pshufb {{.*#+}} xmm1 = xmm1[8,9],zero,zero,zero,zero,zero,zero,xmm1[12,13],zero,zero,zero,zero,zero,zero
880; SSSE3-NEXT:    retq
881;
882; SSE41-LABEL: load_zext_4i16_to_4i64:
883; SSE41:       # BB#0: # %entry
884; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
885; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
886; SSE41-NEXT:    retq
887;
888; AVX1-LABEL: load_zext_4i16_to_4i64:
889; AVX1:       # BB#0: # %entry
890; AVX1-NEXT:    vpmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
891; AVX1-NEXT:    vpmovzxwq {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero
892; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
893; AVX1-NEXT:    retq
894;
895; AVX2-LABEL: load_zext_4i16_to_4i64:
896; AVX2:       # BB#0: # %entry
897; AVX2-NEXT:    vpmovzxwq {{.*#+}} ymm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
898; AVX2-NEXT:    retq
899;
900; AVX512-LABEL: load_zext_4i16_to_4i64:
901; AVX512:       # BB#0: # %entry
902; AVX512-NEXT:    vpmovzxwq {{.*#+}} ymm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero
903; AVX512-NEXT:    retq
904entry:
905 %X = load <4 x i16>, <4 x i16>* %ptr
906 %Y = zext <4 x i16> %X to <4 x i64>
907 ret <4 x i64> %Y
908}
909
910define <8 x i32> @load_zext_8i16_to_8i32(<8 x i16> *%ptr) {
911; SSE2-LABEL: load_zext_8i16_to_8i32:
912; SSE2:       # BB#0: # %entry
913; SSE2-NEXT:    movdqa (%rdi), %xmm1
914; SSE2-NEXT:    pxor %xmm2, %xmm2
915; SSE2-NEXT:    movdqa %xmm1, %xmm0
916; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
917; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
918; SSE2-NEXT:    retq
919;
920; SSSE3-LABEL: load_zext_8i16_to_8i32:
921; SSSE3:       # BB#0: # %entry
922; SSSE3-NEXT:    movdqa (%rdi), %xmm1
923; SSSE3-NEXT:    pxor %xmm2, %xmm2
924; SSSE3-NEXT:    movdqa %xmm1, %xmm0
925; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
926; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
927; SSSE3-NEXT:    retq
928;
929; SSE41-LABEL: load_zext_8i16_to_8i32:
930; SSE41:       # BB#0: # %entry
931; SSE41-NEXT:    pmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
932; SSE41-NEXT:    pmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
933; SSE41-NEXT:    retq
934;
935; AVX1-LABEL: load_zext_8i16_to_8i32:
936; AVX1:       # BB#0: # %entry
937; AVX1-NEXT:    vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
938; AVX1-NEXT:    vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
939; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
940; AVX1-NEXT:    retq
941;
942; AVX2-LABEL: load_zext_8i16_to_8i32:
943; AVX2:       # BB#0: # %entry
944; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
945; AVX2-NEXT:    retq
946;
947; AVX512-LABEL: load_zext_8i16_to_8i32:
948; AVX512:       # BB#0: # %entry
949; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
950; AVX512-NEXT:    retq
951entry:
952 %X = load <8 x i16>, <8 x i16>* %ptr
953 %Y = zext <8 x i16> %X to <8 x i32>
954 ret <8 x i32> %Y
955}
956
957define <2 x i64> @load_zext_2i32_to_2i64(<2 x i32> *%ptr) {
958; SSE2-LABEL: load_zext_2i32_to_2i64:
959; SSE2:       # BB#0: # %entry
960; SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
961; SSE2-NEXT:    pxor %xmm1, %xmm1
962; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
963; SSE2-NEXT:    retq
964;
965; SSSE3-LABEL: load_zext_2i32_to_2i64:
966; SSSE3:       # BB#0: # %entry
967; SSSE3-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
968; SSSE3-NEXT:    pxor %xmm1, %xmm1
969; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
970; SSSE3-NEXT:    retq
971;
972; SSE41-LABEL: load_zext_2i32_to_2i64:
973; SSE41:       # BB#0: # %entry
974; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
975; SSE41-NEXT:    retq
976;
977; AVX-LABEL: load_zext_2i32_to_2i64:
978; AVX:       # BB#0: # %entry
979; AVX-NEXT:    vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
980; AVX-NEXT:    retq
981entry:
982 %X = load <2 x i32>, <2 x i32>* %ptr
983 %Y = zext <2 x i32> %X to <2 x i64>
984 ret <2 x i64> %Y
985}
986
987define <4 x i64> @load_zext_4i32_to_4i64(<4 x i32> *%ptr) {
988; SSE2-LABEL: load_zext_4i32_to_4i64:
989; SSE2:       # BB#0: # %entry
990; SSE2-NEXT:    movdqa (%rdi), %xmm1
991; SSE2-NEXT:    pxor %xmm2, %xmm2
992; SSE2-NEXT:    movdqa %xmm1, %xmm0
993; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
994; SSE2-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
995; SSE2-NEXT:    retq
996;
997; SSSE3-LABEL: load_zext_4i32_to_4i64:
998; SSSE3:       # BB#0: # %entry
999; SSSE3-NEXT:    movdqa (%rdi), %xmm1
1000; SSSE3-NEXT:    pxor %xmm2, %xmm2
1001; SSSE3-NEXT:    movdqa %xmm1, %xmm0
1002; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
1003; SSSE3-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
1004; SSSE3-NEXT:    retq
1005;
1006; SSE41-LABEL: load_zext_4i32_to_4i64:
1007; SSE41:       # BB#0: # %entry
1008; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
1009; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero
1010; SSE41-NEXT:    retq
1011;
1012; AVX1-LABEL: load_zext_4i32_to_4i64:
1013; AVX1:       # BB#0: # %entry
1014; AVX1-NEXT:    vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero
1015; AVX1-NEXT:    vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero
1016; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1017; AVX1-NEXT:    retq
1018;
1019; AVX2-LABEL: load_zext_4i32_to_4i64:
1020; AVX2:       # BB#0: # %entry
1021; AVX2-NEXT:    vpmovzxdq {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1022; AVX2-NEXT:    retq
1023;
1024; AVX512-LABEL: load_zext_4i32_to_4i64:
1025; AVX512:       # BB#0: # %entry
1026; AVX512-NEXT:    vpmovzxdq {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
1027; AVX512-NEXT:    retq
1028entry:
1029 %X = load <4 x i32>, <4 x i32>* %ptr
1030 %Y = zext <4 x i32> %X to <4 x i64>
1031 ret <4 x i64> %Y
1032}
1033
1034define <8 x i32> @zext_8i8_to_8i32(<8 x i8> %z) {
1035; SSE2-LABEL: zext_8i8_to_8i32:
1036; SSE2:       # BB#0: # %entry
1037; SSE2-NEXT:    movdqa %xmm0, %xmm1
1038; SSE2-NEXT:    pand {{.*}}(%rip), %xmm1
1039; SSE2-NEXT:    pxor %xmm2, %xmm2
1040; SSE2-NEXT:    movdqa %xmm1, %xmm0
1041; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1042; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1043; SSE2-NEXT:    retq
1044;
1045; SSSE3-LABEL: zext_8i8_to_8i32:
1046; SSSE3:       # BB#0: # %entry
1047; SSSE3-NEXT:    movdqa %xmm0, %xmm1
1048; SSSE3-NEXT:    pand {{.*}}(%rip), %xmm1
1049; SSSE3-NEXT:    pxor %xmm2, %xmm2
1050; SSSE3-NEXT:    movdqa %xmm1, %xmm0
1051; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1052; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1053; SSSE3-NEXT:    retq
1054;
1055; SSE41-LABEL: zext_8i8_to_8i32:
1056; SSE41:       # BB#0: # %entry
1057; SSE41-NEXT:    movdqa %xmm0, %xmm1
1058; SSE41-NEXT:    pand {{.*}}(%rip), %xmm1
1059; SSE41-NEXT:    pxor %xmm2, %xmm2
1060; SSE41-NEXT:    pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
1061; SSE41-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1062; SSE41-NEXT:    retq
1063;
1064; AVX1-LABEL: zext_8i8_to_8i32:
1065; AVX1:       # BB#0: # %entry
1066; AVX1-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
1067; AVX1-NEXT:    vpxor %xmm1, %xmm1, %xmm1
1068; AVX1-NEXT:    vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
1069; AVX1-NEXT:    vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1070; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1071; AVX1-NEXT:    retq
1072;
1073; AVX2-LABEL: zext_8i8_to_8i32:
1074; AVX2:       # BB#0: # %entry
1075; AVX2-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
1076; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1077; AVX2-NEXT:    retq
1078;
1079; AVX512-LABEL: zext_8i8_to_8i32:
1080; AVX512:       # BB#0: # %entry
1081; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
1082; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1083; AVX512-NEXT:    retq
1084entry:
1085  %t = zext <8 x i8> %z to <8 x i32>
1086  ret <8 x i32> %t
1087}
1088
1089define <8 x i32> @shuf_zext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp {
1090; SSE2-LABEL: shuf_zext_8i16_to_8i32:
1091; SSE2:       # BB#0: # %entry
1092; SSE2-NEXT:    movdqa %xmm0, %xmm1
1093; SSE2-NEXT:    pxor %xmm2, %xmm2
1094; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1095; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1096; SSE2-NEXT:    retq
1097;
1098; SSSE3-LABEL: shuf_zext_8i16_to_8i32:
1099; SSSE3:       # BB#0: # %entry
1100; SSSE3-NEXT:    movdqa %xmm0, %xmm1
1101; SSSE3-NEXT:    pxor %xmm2, %xmm2
1102; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1103; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1104; SSSE3-NEXT:    retq
1105;
1106; SSE41-LABEL: shuf_zext_8i16_to_8i32:
1107; SSE41:       # BB#0: # %entry
1108; SSE41-NEXT:    movdqa %xmm0, %xmm1
1109; SSE41-NEXT:    pxor %xmm2, %xmm2
1110; SSE41-NEXT:    pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
1111; SSE41-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1112; SSE41-NEXT:    retq
1113;
1114; AVX1-LABEL: shuf_zext_8i16_to_8i32:
1115; AVX1:       # BB#0: # %entry
1116; AVX1-NEXT:    vpxor %xmm1, %xmm1, %xmm1
1117; AVX1-NEXT:    vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
1118; AVX1-NEXT:    vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1119; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1120; AVX1-NEXT:    retq
1121;
1122; AVX2-LABEL: shuf_zext_8i16_to_8i32:
1123; AVX2:       # BB#0: # %entry
1124; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1125; AVX2-NEXT:    retq
1126;
1127; AVX512-LABEL: shuf_zext_8i16_to_8i32:
1128; AVX512:       # BB#0: # %entry
1129; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1130; AVX512-NEXT:    retq
1131entry:
1132  %B = shufflevector <8 x i16> %A, <8 x i16> zeroinitializer, <16 x i32> <i32 0, i32 8, i32 1, i32 8, i32 2, i32 8, i32 3, i32 8, i32 4, i32 8, i32 5, i32 8, i32 6, i32 8, i32 7, i32 8>
1133  %Z = bitcast <16 x i16> %B to <8 x i32>
1134  ret <8 x i32> %Z
1135}
1136
1137define <4 x i64> @shuf_zext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp {
1138; SSE2-LABEL: shuf_zext_4i32_to_4i64:
1139; SSE2:       # BB#0: # %entry
1140; SSE2-NEXT:    movdqa %xmm0, %xmm1
1141; SSE2-NEXT:    pxor %xmm2, %xmm2
1142; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
1143; SSE2-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
1144; SSE2-NEXT:    retq
1145;
1146; SSSE3-LABEL: shuf_zext_4i32_to_4i64:
1147; SSSE3:       # BB#0: # %entry
1148; SSSE3-NEXT:    movdqa %xmm0, %xmm1
1149; SSSE3-NEXT:    pxor %xmm2, %xmm2
1150; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
1151; SSSE3-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
1152; SSSE3-NEXT:    retq
1153;
1154; SSE41-LABEL: shuf_zext_4i32_to_4i64:
1155; SSE41:       # BB#0: # %entry
1156; SSE41-NEXT:    movdqa %xmm0, %xmm1
1157; SSE41-NEXT:    pxor %xmm2, %xmm2
1158; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero
1159; SSE41-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
1160; SSE41-NEXT:    retq
1161;
1162; AVX1-LABEL: shuf_zext_4i32_to_4i64:
1163; AVX1:       # BB#0: # %entry
1164; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero
1165; AVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
1166; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
1167; AVX1-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[2,0,3,0]
1168; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
1169; AVX1-NEXT:    retq
1170;
1171; AVX2-LABEL: shuf_zext_4i32_to_4i64:
1172; AVX2:       # BB#0: # %entry
1173; AVX2-NEXT:    vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1174; AVX2-NEXT:    retq
1175;
1176; AVX512-LABEL: shuf_zext_4i32_to_4i64:
1177; AVX512:       # BB#0: # %entry
1178; AVX512-NEXT:    vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1179; AVX512-NEXT:    retq
1180entry:
1181  %B = shufflevector <4 x i32> %A, <4 x i32> zeroinitializer, <8 x i32> <i32 0, i32 4, i32 1, i32 4, i32 2, i32 4, i32 3, i32 4>
1182  %Z = bitcast <8 x i32> %B to <4 x i64>
1183  ret <4 x i64> %Z
1184}
1185
1186define <8 x i32> @shuf_zext_8i8_to_8i32(<8 x i8> %A) {
1187; SSE2-LABEL: shuf_zext_8i8_to_8i32:
1188; SSE2:       # BB#0: # %entry
1189; SSE2-NEXT:    movdqa %xmm0, %xmm1
1190; SSE2-NEXT:    pand {{.*}}(%rip), %xmm1
1191; SSE2-NEXT:    packuswb %xmm1, %xmm1
1192; SSE2-NEXT:    pxor %xmm2, %xmm2
1193; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1194; SSE2-NEXT:    movdqa %xmm1, %xmm0
1195; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1196; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1197; SSE2-NEXT:    retq
1198;
1199; SSSE3-LABEL: shuf_zext_8i8_to_8i32:
1200; SSSE3:       # BB#0: # %entry
1201; SSSE3-NEXT:    movdqa %xmm0, %xmm1
1202; SSSE3-NEXT:    pshufb {{.*#+}} xmm1 = xmm1[0],zero,xmm1[2],zero,xmm1[4],zero,xmm1[6],zero,xmm1[8],zero,xmm1[10],zero,xmm1[12],zero,xmm1[14],zero
1203; SSSE3-NEXT:    pxor %xmm2, %xmm2
1204; SSSE3-NEXT:    movdqa %xmm1, %xmm0
1205; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1206; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1207; SSSE3-NEXT:    retq
1208;
1209; SSE41-LABEL: shuf_zext_8i8_to_8i32:
1210; SSE41:       # BB#0: # %entry
1211; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1212; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm2 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
1213; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
1214; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
1215; SSE41-NEXT:    movdqa %xmm2, %xmm0
1216; SSE41-NEXT:    retq
1217;
1218; AVX1-LABEL: shuf_zext_8i8_to_8i32:
1219; AVX1:       # BB#0: # %entry
1220; AVX1-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1221; AVX1-NEXT:    vpmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
1222; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
1223; AVX1-NEXT:    vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
1224; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
1225; AVX1-NEXT:    retq
1226;
1227; AVX2-LABEL: shuf_zext_8i8_to_8i32:
1228; AVX2:       # BB#0: # %entry
1229; AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1230; AVX2-NEXT:    vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
1231; AVX2-NEXT:    retq
1232;
1233; AVX512-LABEL: shuf_zext_8i8_to_8i32:
1234; AVX512:       # BB#0: # %entry
1235; AVX512-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1236; AVX512-NEXT:    vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero
1237; AVX512-NEXT:    retq
1238entry:
1239  %B = shufflevector <8 x i8> %A, <8 x i8> zeroinitializer, <32 x i32> <i32 0, i32 8, i32 8, i32 8, i32 1, i32 8, i32 8, i32 8, i32 2, i32 8, i32 8, i32 8, i32 3, i32 8, i32 8, i32 8, i32 4, i32 8, i32 8, i32 8, i32 5, i32 8, i32 8, i32 8, i32 6, i32 8, i32 8, i32 8, i32 7, i32 8, i32 8, i32 8>
1240  %Z = bitcast <32 x i8> %B to <8 x i32>
1241  ret <8 x i32> %Z
1242}
1243
1244define <2 x i64> @shuf_zext_16i8_to_2i64_offset6(<16 x i8> %A) nounwind uwtable readnone ssp {
1245; SSE2-LABEL: shuf_zext_16i8_to_2i64_offset6:
1246; SSE2:       # BB#0: # %entry
1247; SSE2-NEXT:    pxor %xmm1, %xmm1
1248; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
1249; SSE2-NEXT:    punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
1250; SSE2-NEXT:    punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1251; SSE2-NEXT:    retq
1252;
1253; SSSE3-LABEL: shuf_zext_16i8_to_2i64_offset6:
1254; SSSE3:       # BB#0: # %entry
1255; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[6],zero,zero,zero,zero,zero,zero,zero,xmm0[7],zero,zero,zero,zero,zero,zero,zero
1256; SSSE3-NEXT:    retq
1257;
1258; SSE41-LABEL: shuf_zext_16i8_to_2i64_offset6:
1259; SSE41:       # BB#0: # %entry
1260; SSE41-NEXT:    psrlq $48, %xmm0
1261; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
1262; SSE41-NEXT:    retq
1263;
1264; AVX-LABEL: shuf_zext_16i8_to_2i64_offset6:
1265; AVX:       # BB#0: # %entry
1266; AVX-NEXT:    vpsrlq $48, %xmm0, %xmm0
1267; AVX-NEXT:    vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
1268; AVX-NEXT:    retq
1269entry:
1270  %B = shufflevector <16 x i8> %A, <16 x i8> zeroinitializer, <16 x i32> <i32 6, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 7, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
1271  %Z = bitcast <16 x i8> %B to <2 x i64>
1272  ret <2 x i64> %Z
1273}
1274
1275define <4 x i64> @shuf_zext_16i8_to_4i64_offset11(<16 x i8> %A) nounwind uwtable readnone ssp {
1276; SSE2-LABEL: shuf_zext_16i8_to_4i64_offset11:
1277; SSE2:       # BB#0: # %entry
1278; SSE2-NEXT:    movdqa %xmm0, %xmm1
1279; SSE2-NEXT:    psrldq {{.*#+}} xmm1 = xmm1[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero
1280; SSE2-NEXT:    pxor %xmm2, %xmm2
1281; SSE2-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15]
1282; SSE2-NEXT:    movdqa %xmm1, %xmm0
1283; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1284; SSE2-NEXT:    punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1285; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1286; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
1287; SSE2-NEXT:    retq
1288;
1289; SSSE3-LABEL: shuf_zext_16i8_to_4i64_offset11:
1290; SSSE3:       # BB#0: # %entry
1291; SSSE3-NEXT:    movdqa %xmm0, %xmm1
1292; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[11],zero,zero,zero,zero,zero,zero,zero,xmm0[12],zero,zero,zero,zero,zero,zero,zero
1293; SSSE3-NEXT:    pshufb {{.*#+}} xmm1 = xmm1[13],zero,zero,zero,zero,zero,zero,zero,xmm1[14],zero,zero,zero,zero,zero,zero,zero
1294; SSSE3-NEXT:    retq
1295;
1296; SSE41-LABEL: shuf_zext_16i8_to_4i64_offset11:
1297; SSE41:       # BB#0: # %entry
1298; SSE41-NEXT:    movdqa %xmm0, %xmm1
1299; SSE41-NEXT:    psrldq {{.*#+}} xmm1 = xmm1[11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1300; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1301; SSE41-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1302; SSE41-NEXT:    pmovzxbq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
1303; SSE41-NEXT:    movdqa %xmm2, %xmm0
1304; SSE41-NEXT:    retq
1305;
1306; AVX1-LABEL: shuf_zext_16i8_to_4i64_offset11:
1307; AVX1:       # BB#0: # %entry
1308; AVX1-NEXT:    vpsrldq {{.*#+}} xmm1 = xmm0[11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1309; AVX1-NEXT:    vpmovzxbq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[1],zero,zero,zero,zero,zero,zero,zero
1310; AVX1-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1311; AVX1-NEXT:    vpmovzxbq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero
1312; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
1313; AVX1-NEXT:    retq
1314;
1315; AVX2-LABEL: shuf_zext_16i8_to_4i64_offset11:
1316; AVX2:       # BB#0: # %entry
1317; AVX2-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1318; AVX2-NEXT:    vpmovzxbq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero
1319; AVX2-NEXT:    retq
1320;
1321; AVX512-LABEL: shuf_zext_16i8_to_4i64_offset11:
1322; AVX512:       # BB#0: # %entry
1323; AVX512-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[11,12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1324; AVX512-NEXT:    vpmovzxbq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero
1325; AVX512-NEXT:    retq
1326entry:
1327  %B = shufflevector <16 x i8> %A, <16 x i8> zeroinitializer, <32 x i32> <i32 11, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 12, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 13, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 14, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
1328  %Z = bitcast <32 x i8> %B to <4 x i64>
1329  ret <4 x i64> %Z
1330}
1331
1332define <2 x i64> @shuf_zext_8i16_to_2i64_offset6(<8 x i16> %A) nounwind uwtable readnone ssp {
1333; SSE2-LABEL: shuf_zext_8i16_to_2i64_offset6:
1334; SSE2:       # BB#0: # %entry
1335; SSE2-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero,zero
1336; SSE2-NEXT:    pxor %xmm1, %xmm1
1337; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1338; SSE2-NEXT:    punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1339; SSE2-NEXT:    retq
1340;
1341; SSSE3-LABEL: shuf_zext_8i16_to_2i64_offset6:
1342; SSSE3:       # BB#0: # %entry
1343; SSSE3-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero,zero
1344; SSSE3-NEXT:    pxor %xmm1, %xmm1
1345; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1346; SSSE3-NEXT:    punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1347; SSSE3-NEXT:    retq
1348;
1349; SSE41-LABEL: shuf_zext_8i16_to_2i64_offset6:
1350; SSE41:       # BB#0: # %entry
1351; SSE41-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
1352; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
1353; SSE41-NEXT:    retq
1354;
1355; AVX-LABEL: shuf_zext_8i16_to_2i64_offset6:
1356; AVX:       # BB#0: # %entry
1357; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
1358; AVX-NEXT:    vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
1359; AVX-NEXT:    retq
1360entry:
1361  %B = shufflevector <8 x i16> %A, <8 x i16> zeroinitializer, <8 x i32> <i32 3, i32 8, i32 8, i32 8, i32 4, i32 8, i32 8, i32 8>
1362  %Z = bitcast <8 x i16> %B to <2 x i64>
1363  ret <2 x i64> %Z
1364}
1365
1366define <4 x i64> @shuf_zext_8i16_to_4i64_offset2(<8 x i16> %A) nounwind uwtable readnone ssp {
1367; SSE2-LABEL: shuf_zext_8i16_to_4i64_offset2:
1368; SSE2:       # BB#0: # %entry
1369; SSE2-NEXT:    movdqa %xmm0, %xmm1
1370; SSE2-NEXT:    pxor %xmm2, %xmm2
1371; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1372; SSE2-NEXT:    punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1373; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1374; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
1375; SSE2-NEXT:    retq
1376;
1377; SSSE3-LABEL: shuf_zext_8i16_to_4i64_offset2:
1378; SSSE3:       # BB#0: # %entry
1379; SSSE3-NEXT:    movdqa %xmm0, %xmm1
1380; SSSE3-NEXT:    pxor %xmm2, %xmm2
1381; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1382; SSSE3-NEXT:    punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1383; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1384; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
1385; SSSE3-NEXT:    retq
1386;
1387; SSE41-LABEL: shuf_zext_8i16_to_4i64_offset2:
1388; SSE41:       # BB#0: # %entry
1389; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1390; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1391; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
1392; SSE41-NEXT:    pmovzxwq {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
1393; SSE41-NEXT:    movdqa %xmm2, %xmm0
1394; SSE41-NEXT:    retq
1395;
1396; AVX1-LABEL: shuf_zext_8i16_to_4i64_offset2:
1397; AVX1:       # BB#0: # %entry
1398; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3]
1399; AVX1-NEXT:    vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero
1400; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
1401; AVX1-NEXT:    vpmovzxwq {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero
1402; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
1403; AVX1-NEXT:    retq
1404;
1405; AVX2-LABEL: shuf_zext_8i16_to_4i64_offset2:
1406; AVX2:       # BB#0: # %entry
1407; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,2,2,3]
1408; AVX2-NEXT:    vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
1409; AVX2-NEXT:    retq
1410;
1411; AVX512-LABEL: shuf_zext_8i16_to_4i64_offset2:
1412; AVX512:       # BB#0: # %entry
1413; AVX512-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,2,2,3]
1414; AVX512-NEXT:    vpmovzxwq {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero
1415; AVX512-NEXT:    retq
1416entry:
1417  %B = shufflevector <8 x i16> %A, <8 x i16> zeroinitializer, <16 x i32> <i32 2, i32 8, i32 8, i32 8, i32 3, i32 8, i32 8, i32 8, i32 4, i32 8, i32 8, i32 8, i32 5, i32 8, i32 8, i32 8>
1418  %Z = bitcast <16 x i16> %B to <4 x i64>
1419  ret <4 x i64> %Z
1420}
1421
1422define <4 x i32> @shuf_zext_8i16_to_4i32_offset1(<8 x i16> %A) nounwind uwtable readnone ssp {
1423; SSE-LABEL: shuf_zext_8i16_to_4i32_offset1:
1424; SSE:       # BB#0: # %entry
1425; SSE-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero,zero
1426; SSE-NEXT:    pxor %xmm1, %xmm1
1427; SSE-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1428; SSE-NEXT:    retq
1429;
1430; AVX-LABEL: shuf_zext_8i16_to_4i32_offset1:
1431; AVX:       # BB#0: # %entry
1432; AVX-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero,zero
1433; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
1434; AVX-NEXT:    vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1435; AVX-NEXT:    retq
1436entry:
1437  %B = shufflevector <8 x i16> %A, <8 x i16> zeroinitializer, <8 x i32> <i32 1, i32 8, i32 2, i32 8, i32 3, i32 8, i32 4, i32 8>
1438  %Z = bitcast <8 x i16> %B to <4 x i32>
1439  ret <4 x i32> %Z
1440}
1441
1442define <8 x i32> @shuf_zext_8i16_to_8i32_offset3(<8 x i16> %A) nounwind uwtable readnone ssp {
1443; SSE2-LABEL: shuf_zext_8i16_to_8i32_offset3:
1444; SSE2:       # BB#0: # %entry
1445; SSE2-NEXT:    movdqa %xmm0, %xmm1
1446; SSE2-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
1447; SSE2-NEXT:    pxor %xmm2, %xmm2
1448; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1449; SSE2-NEXT:    psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1450; SSE2-NEXT:    retq
1451;
1452; SSSE3-LABEL: shuf_zext_8i16_to_8i32_offset3:
1453; SSSE3:       # BB#0: # %entry
1454; SSSE3-NEXT:    movdqa %xmm0, %xmm1
1455; SSSE3-NEXT:    psrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
1456; SSSE3-NEXT:    pxor %xmm2, %xmm2
1457; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1458; SSSE3-NEXT:    psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1459; SSSE3-NEXT:    retq
1460;
1461; SSE41-LABEL: shuf_zext_8i16_to_8i32_offset3:
1462; SSE41:       # BB#0: # %entry
1463; SSE41-NEXT:    movdqa %xmm0, %xmm1
1464; SSE41-NEXT:    pslldq {{.*#+}} xmm0 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
1465; SSE41-NEXT:    pxor %xmm2, %xmm2
1466; SSE41-NEXT:    punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
1467; SSE41-NEXT:    psrldq {{.*#+}} xmm1 = xmm1[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1468; SSE41-NEXT:    retq
1469;
1470; AVX1-LABEL: shuf_zext_8i16_to_8i32_offset3:
1471; AVX1:       # BB#0: # %entry
1472; AVX1-NEXT:    vpslldq {{.*#+}} xmm1 = zero,zero,xmm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13]
1473; AVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
1474; AVX1-NEXT:    vpunpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1475; AVX1-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1476; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
1477; AVX1-NEXT:    retq
1478;
1479; AVX2-LABEL: shuf_zext_8i16_to_8i32_offset3:
1480; AVX2:       # BB#0: # %entry
1481; AVX2-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
1482; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1483; AVX2-NEXT:    retq
1484;
1485; AVX512-LABEL: shuf_zext_8i16_to_8i32_offset3:
1486; AVX512:       # BB#0: # %entry
1487; AVX512-NEXT:    vpsrldq {{.*#+}} xmm0 = xmm0[6,7,8,9,10,11,12,13,14,15],zero,zero,zero,zero,zero,zero
1488; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1489; AVX512-NEXT:    retq
1490entry:
1491  %B = shufflevector <8 x i16> %A, <8 x i16> zeroinitializer, <16 x i32> <i32 3, i32 8, i32 4, i32 8, i32 5, i32 8, i32 6, i32 8, i32 7, i32 8, i32 undef, i32 8, i32 undef, i32 8, i32 undef, i32 8>
1492  %Z = bitcast <16 x i16> %B to <8 x i32>
1493  ret <8 x i32> %Z
1494}
1495
1496define <8 x i32> @shuf_zext_16i16_to_8i32_offset8(<16 x i16> %A) nounwind uwtable readnone ssp {
1497; SSE2-LABEL: shuf_zext_16i16_to_8i32_offset8:
1498; SSE2:       # BB#0: # %entry
1499; SSE2-NEXT:    pxor %xmm2, %xmm2
1500; SSE2-NEXT:    movdqa %xmm1, %xmm0
1501; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1502; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1503; SSE2-NEXT:    retq
1504;
1505; SSSE3-LABEL: shuf_zext_16i16_to_8i32_offset8:
1506; SSSE3:       # BB#0: # %entry
1507; SSSE3-NEXT:    pxor %xmm2, %xmm2
1508; SSSE3-NEXT:    movdqa %xmm1, %xmm0
1509; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1510; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
1511; SSSE3-NEXT:    retq
1512;
1513; SSE41-LABEL: shuf_zext_16i16_to_8i32_offset8:
1514; SSE41:       # BB#0: # %entry
1515; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[2,2,3,3]
1516; SSE41-NEXT:    pxor %xmm2, %xmm2
1517; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm0[0],xmm2[1,2,3],xmm0[4],xmm2[5,6,7]
1518; SSE41-NEXT:    pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
1519; SSE41-NEXT:    movdqa %xmm2, %xmm1
1520; SSE41-NEXT:    retq
1521;
1522; AVX1-LABEL: shuf_zext_16i16_to_8i32_offset8:
1523; AVX1:       # BB#0: # %entry
1524; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
1525; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,2,3,3]
1526; AVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
1527; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7]
1528; AVX1-NEXT:    vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1529; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1530; AVX1-NEXT:    retq
1531;
1532; AVX2-LABEL: shuf_zext_16i16_to_8i32_offset8:
1533; AVX2:       # BB#0: # %entry
1534; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm0
1535; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1536; AVX2-NEXT:    retq
1537;
1538; AVX512-LABEL: shuf_zext_16i16_to_8i32_offset8:
1539; AVX512:       # BB#0: # %entry
1540; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm0
1541; AVX512-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
1542; AVX512-NEXT:    retq
1543entry:
1544  %B = shufflevector <16 x i16> %A, <16 x i16> zeroinitializer, <16 x i32> <i32 8, i32 16, i32 9, i32 16, i32 10, i32 16, i32 11, i32 16, i32 12, i32 16, i32 undef, i32 16, i32 14, i32 16, i32 undef, i32 16>
1545  %Z = bitcast <16 x i16> %B to <8 x i32>
1546  ret <8 x i32> %Z
1547}
1548
1549define <2 x i64> @shuf_zext_4i32_to_2i64_offset2(<4 x i32> %A) nounwind uwtable readnone ssp {
1550; SSE-LABEL: shuf_zext_4i32_to_2i64_offset2:
1551; SSE:       # BB#0: # %entry
1552; SSE-NEXT:    pxor %xmm1, %xmm1
1553; SSE-NEXT:    punpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1554; SSE-NEXT:    retq
1555;
1556; AVX-LABEL: shuf_zext_4i32_to_2i64_offset2:
1557; AVX:       # BB#0: # %entry
1558; AVX-NEXT:    vpxor %xmm1, %xmm1, %xmm1
1559; AVX-NEXT:    vpunpckhdq {{.*#+}} xmm0 = xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1560; AVX-NEXT:    retq
1561entry:
1562  %B = shufflevector <4 x i32> %A, <4 x i32> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 3, i32 4>
1563  %Z = bitcast <4 x i32> %B to <2 x i64>
1564  ret <2 x i64> %Z
1565}
1566
1567define <4 x i64> @shuf_zext_4i32_to_4i64_offset1(<4 x i32> %A) nounwind uwtable readnone ssp {
1568; SSE2-LABEL: shuf_zext_4i32_to_4i64_offset1:
1569; SSE2:       # BB#0: # %entry
1570; SSE2-NEXT:    movdqa %xmm0, %xmm1
1571; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [0,0,4294967295,0]
1572; SSE2-NEXT:    pand %xmm1, %xmm0
1573; SSE2-NEXT:    psrldq {{.*#+}} xmm1 = xmm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1574; SSE2-NEXT:    retq
1575;
1576; SSSE3-LABEL: shuf_zext_4i32_to_4i64_offset1:
1577; SSSE3:       # BB#0: # %entry
1578; SSSE3-NEXT:    movdqa %xmm0, %xmm1
1579; SSSE3-NEXT:    movdqa {{.*#+}} xmm0 = [0,0,4294967295,0]
1580; SSSE3-NEXT:    pand %xmm1, %xmm0
1581; SSSE3-NEXT:    psrldq {{.*#+}} xmm1 = xmm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1582; SSSE3-NEXT:    retq
1583;
1584; SSE41-LABEL: shuf_zext_4i32_to_4i64_offset1:
1585; SSE41:       # BB#0: # %entry
1586; SSE41-NEXT:    movdqa %xmm0, %xmm1
1587; SSE41-NEXT:    pxor %xmm0, %xmm0
1588; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5],xmm0[6,7]
1589; SSE41-NEXT:    psrldq {{.*#+}} xmm1 = xmm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
1590; SSE41-NEXT:    retq
1591;
1592; AVX1-LABEL: shuf_zext_4i32_to_4i64_offset1:
1593; AVX1:       # BB#0: # %entry
1594; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm0[3],zero,zero,zero
1595; AVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
1596; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5],xmm2[6,7]
1597; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1598; AVX1-NEXT:    retq
1599;
1600; AVX2-LABEL: shuf_zext_4i32_to_4i64_offset1:
1601; AVX2:       # BB#0: # %entry
1602; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,2,3,3]
1603; AVX2-NEXT:    vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1604; AVX2-NEXT:    retq
1605;
1606; AVX512-LABEL: shuf_zext_4i32_to_4i64_offset1:
1607; AVX512:       # BB#0: # %entry
1608; AVX512-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,2,3,3]
1609; AVX512-NEXT:    vpmovzxdq {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero
1610; AVX512-NEXT:    retq
1611entry:
1612  %B = shufflevector <4 x i32> %A, <4 x i32> zeroinitializer, <8 x i32> <i32 undef, i32 4, i32 2, i32 4, i32 3, i32 4, i32 undef, i32 4>
1613  %Z = bitcast <8 x i32> %B to <4 x i64>
1614  ret <4 x i64> %Z
1615}
1616