1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512VL
9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BW
10; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BWVL
11
12define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) {
13; SSE-LABEL: trunc8i64_8i32:
14; SSE:       # BB#0: # %entry
15; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
16; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
17; SSE-NEXT:    movaps %xmm2, %xmm1
18; SSE-NEXT:    retq
19;
20; AVX1-LABEL: trunc8i64_8i32:
21; AVX1:       # BB#0: # %entry
22; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
23; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
24; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
25; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
26; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
27; AVX1-NEXT:    retq
28;
29; AVX2-LABEL: trunc8i64_8i32:
30; AVX2:       # BB#0: # %entry
31; AVX2-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
32; AVX2-NEXT:    vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
33; AVX2-NEXT:    vpermilps {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
34; AVX2-NEXT:    vpermpd {{.*#+}} ymm1 = ymm1[0,2,2,3]
35; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
36; AVX2-NEXT:    retq
37;
38; AVX512-LABEL: trunc8i64_8i32:
39; AVX512:       # BB#0: # %entry
40; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
41; AVX512-NEXT:    retq
42entry:
43  %0 = trunc <8 x i64> %a to <8 x i32>
44  ret <8 x i32> %0
45}
46
47define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) {
48; SSE2-LABEL: trunc8i64_8i32_ashr:
49; SSE2:       # BB#0: # %entry
50; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
51; SSE2-NEXT:    psrad $31, %xmm3
52; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,3,2,3]
53; SSE2-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
54; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]
55; SSE2-NEXT:    psrad $31, %xmm1
56; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
57; SSE2-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
58; SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,3],xmm3[0,2]
59; SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,3],xmm4[0,2]
60; SSE2-NEXT:    movaps %xmm2, %xmm1
61; SSE2-NEXT:    retq
62;
63; SSSE3-LABEL: trunc8i64_8i32_ashr:
64; SSSE3:       # BB#0: # %entry
65; SSSE3-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
66; SSSE3-NEXT:    psrad $31, %xmm3
67; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,3,2,3]
68; SSSE3-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
69; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]
70; SSSE3-NEXT:    psrad $31, %xmm1
71; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
72; SSSE3-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
73; SSSE3-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,3],xmm3[0,2]
74; SSSE3-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,3],xmm4[0,2]
75; SSSE3-NEXT:    movaps %xmm2, %xmm1
76; SSSE3-NEXT:    retq
77;
78; SSE41-LABEL: trunc8i64_8i32_ashr:
79; SSE41:       # BB#0: # %entry
80; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
81; SSE41-NEXT:    psrad $31, %xmm3
82; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm4[0,1],xmm3[2,3],xmm4[4,5],xmm3[6,7]
83; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]
84; SSE41-NEXT:    psrad $31, %xmm1
85; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm4[0,1],xmm1[2,3],xmm4[4,5],xmm1[6,7]
86; SSE41-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[0,2]
87; SSE41-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[0,2]
88; SSE41-NEXT:    movaps %xmm2, %xmm1
89; SSE41-NEXT:    retq
90;
91; AVX1-LABEL: trunc8i64_8i32_ashr:
92; AVX1:       # BB#0: # %entry
93; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
94; AVX1-NEXT:    vpsrad $31, %xmm2, %xmm3
95; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
96; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]
97; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
98; AVX1-NEXT:    vpsrad $31, %xmm3, %xmm4
99; AVX1-NEXT:    vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
100; AVX1-NEXT:    vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm4[2,3],xmm3[4,5],xmm4[6,7]
101; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[1,3],xmm3[0,2]
102; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[1,3],xmm2[0,2]
103; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
104; AVX1-NEXT:    retq
105;
106; AVX2-LABEL: trunc8i64_8i32_ashr:
107; AVX2:       # BB#0: # %entry
108; AVX2-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[1,3,2,3,5,7,6,7]
109; AVX2-NEXT:    vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
110; AVX2-NEXT:    vpermilps {{.*#+}} ymm1 = ymm1[1,3,2,3,5,7,6,7]
111; AVX2-NEXT:    vpermpd {{.*#+}} ymm1 = ymm1[0,2,2,3]
112; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
113; AVX2-NEXT:    retq
114;
115; AVX512-LABEL: trunc8i64_8i32_ashr:
116; AVX512:       # BB#0: # %entry
117; AVX512-NEXT:    vpsraq $32, %zmm0, %zmm0
118; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
119; AVX512-NEXT:    retq
120entry:
121  %0 = ashr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>
122  %1 = trunc <8 x i64> %0 to <8 x i32>
123  ret <8 x i32> %1
124}
125
126define <8 x i32> @trunc8i64_8i32_lshr(<8 x i64> %a) {
127; SSE-LABEL: trunc8i64_8i32_lshr:
128; SSE:       # BB#0: # %entry
129; SSE-NEXT:    psrlq $32, %xmm3
130; SSE-NEXT:    psrlq $32, %xmm2
131; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
132; SSE-NEXT:    psrlq $32, %xmm1
133; SSE-NEXT:    psrlq $32, %xmm0
134; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
135; SSE-NEXT:    movaps %xmm2, %xmm1
136; SSE-NEXT:    retq
137;
138; AVX1-LABEL: trunc8i64_8i32_lshr:
139; AVX1:       # BB#0: # %entry
140; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
141; AVX1-NEXT:    vpsrlq $32, %xmm2, %xmm2
142; AVX1-NEXT:    vpsrlq $32, %xmm0, %xmm0
143; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
144; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
145; AVX1-NEXT:    vpsrlq $32, %xmm2, %xmm2
146; AVX1-NEXT:    vpsrlq $32, %xmm1, %xmm1
147; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
148; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
149; AVX1-NEXT:    retq
150;
151; AVX2-LABEL: trunc8i64_8i32_lshr:
152; AVX2:       # BB#0: # %entry
153; AVX2-NEXT:    vpsrlq $32, %ymm1, %ymm1
154; AVX2-NEXT:    vpsrlq $32, %ymm0, %ymm0
155; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
156; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
157; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
158; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
159; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
160; AVX2-NEXT:    retq
161;
162; AVX512-LABEL: trunc8i64_8i32_lshr:
163; AVX512:       # BB#0: # %entry
164; AVX512-NEXT:    vpsrlq $32, %zmm0, %zmm0
165; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
166; AVX512-NEXT:    retq
167entry:
168  %0 = lshr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>
169  %1 = trunc <8 x i64> %0 to <8 x i32>
170  ret <8 x i32> %1
171}
172
173define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) {
174; SSE2-LABEL: trunc8i64_8i16:
175; SSE2:       # BB#0: # %entry
176; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
177; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
178; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
179; SSE2-NEXT:    pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7]
180; SSE2-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
181; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
182; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
183; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
184; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
185; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
186; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
187; SSE2-NEXT:    retq
188;
189; SSSE3-LABEL: trunc8i64_8i16:
190; SSSE3:       # BB#0: # %entry
191; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
192; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
193; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
194; SSSE3-NEXT:    pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7]
195; SSSE3-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
196; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
197; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
198; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
199; SSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
200; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
201; SSSE3-NEXT:    movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
202; SSSE3-NEXT:    retq
203;
204; SSE41-LABEL: trunc8i64_8i16:
205; SSE41:       # BB#0: # %entry
206; SSE41-NEXT:    pxor %xmm4, %xmm4
207; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
208; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7]
209; SSE41-NEXT:    packusdw %xmm3, %xmm2
210; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7]
211; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7]
212; SSE41-NEXT:    packusdw %xmm1, %xmm0
213; SSE41-NEXT:    packusdw %xmm2, %xmm0
214; SSE41-NEXT:    retq
215;
216; AVX1-LABEL: trunc8i64_8i16:
217; AVX1:       # BB#0: # %entry
218; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
219; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
220; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
221; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7]
222; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
223; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
224; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
225; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7]
226; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
227; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
228; AVX1-NEXT:    vzeroupper
229; AVX1-NEXT:    retq
230;
231; AVX2-LABEL: trunc8i64_8i16:
232; AVX2:       # BB#0: # %entry
233; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
234; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
235; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
236; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
237; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
238; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
239; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
240; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
241; AVX2-NEXT:    vzeroupper
242; AVX2-NEXT:    retq
243;
244; AVX512-LABEL: trunc8i64_8i16:
245; AVX512:       # BB#0: # %entry
246; AVX512-NEXT:    vpmovqw %zmm0, %xmm0
247; AVX512-NEXT:    vzeroupper
248; AVX512-NEXT:    retq
249entry:
250  %0 = trunc <8 x i64> %a to <8 x i16>
251  ret <8 x i16> %0
252}
253
254define void @trunc8i64_8i8(<8 x i64> %a) {
255; SSE-LABEL: trunc8i64_8i8:
256; SSE:       # BB#0: # %entry
257; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
258; SSE-NEXT:    pand %xmm4, %xmm3
259; SSE-NEXT:    pand %xmm4, %xmm2
260; SSE-NEXT:    packuswb %xmm3, %xmm2
261; SSE-NEXT:    pand %xmm4, %xmm1
262; SSE-NEXT:    pand %xmm4, %xmm0
263; SSE-NEXT:    packuswb %xmm1, %xmm0
264; SSE-NEXT:    packuswb %xmm2, %xmm0
265; SSE-NEXT:    packuswb %xmm0, %xmm0
266; SSE-NEXT:    movq %xmm0, (%rax)
267; SSE-NEXT:    retq
268;
269; AVX1-LABEL: trunc8i64_8i8:
270; AVX1:       # BB#0: # %entry
271; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
272; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
273; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
274; AVX1-NEXT:    vpand %xmm3, %xmm1, %xmm1
275; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
276; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
277; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
278; AVX1-NEXT:    vpand %xmm3, %xmm0, %xmm0
279; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
280; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
281; AVX1-NEXT:    vpackuswb %xmm0, %xmm0, %xmm0
282; AVX1-NEXT:    vmovq %xmm0, (%rax)
283; AVX1-NEXT:    vzeroupper
284; AVX1-NEXT:    retq
285;
286; AVX2-LABEL: trunc8i64_8i8:
287; AVX2:       # BB#0: # %entry
288; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
289; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
290; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
291; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
292; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
293; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
294; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
295; AVX2-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
296; AVX2-NEXT:    vmovq %xmm0, (%rax)
297; AVX2-NEXT:    vzeroupper
298; AVX2-NEXT:    retq
299;
300; AVX512-LABEL: trunc8i64_8i8:
301; AVX512:       # BB#0: # %entry
302; AVX512-NEXT:    vpmovqb %zmm0, (%rax)
303; AVX512-NEXT:    vzeroupper
304; AVX512-NEXT:    retq
305entry:
306  %0 = trunc <8 x i64> %a to <8 x i8>
307  store <8 x i8> %0, <8 x i8>* undef, align 4
308  ret void
309}
310
311define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) {
312; SSE2-LABEL: trunc8i32_8i16:
313; SSE2:       # BB#0: # %entry
314; SSE2-NEXT:    pslld $16, %xmm1
315; SSE2-NEXT:    psrad $16, %xmm1
316; SSE2-NEXT:    pslld $16, %xmm0
317; SSE2-NEXT:    psrad $16, %xmm0
318; SSE2-NEXT:    packssdw %xmm1, %xmm0
319; SSE2-NEXT:    retq
320;
321; SSSE3-LABEL: trunc8i32_8i16:
322; SSSE3:       # BB#0: # %entry
323; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
324; SSSE3-NEXT:    pshufb %xmm2, %xmm1
325; SSSE3-NEXT:    pshufb %xmm2, %xmm0
326; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
327; SSSE3-NEXT:    retq
328;
329; SSE41-LABEL: trunc8i32_8i16:
330; SSE41:       # BB#0: # %entry
331; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
332; SSE41-NEXT:    pshufb %xmm2, %xmm1
333; SSE41-NEXT:    pshufb %xmm2, %xmm0
334; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
335; SSE41-NEXT:    retq
336;
337; AVX1-LABEL: trunc8i32_8i16:
338; AVX1:       # BB#0: # %entry
339; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
340; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
341; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
342; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
343; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
344; AVX1-NEXT:    vzeroupper
345; AVX1-NEXT:    retq
346;
347; AVX2-LABEL: trunc8i32_8i16:
348; AVX2:       # BB#0: # %entry
349; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
350; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
351; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
352; AVX2-NEXT:    vzeroupper
353; AVX2-NEXT:    retq
354;
355; AVX512F-LABEL: trunc8i32_8i16:
356; AVX512F:       # BB#0: # %entry
357; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
358; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
359; AVX512F-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
360; AVX512F-NEXT:    vzeroupper
361; AVX512F-NEXT:    retq
362;
363; AVX512VL-LABEL: trunc8i32_8i16:
364; AVX512VL:       # BB#0: # %entry
365; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
366; AVX512VL-NEXT:    vzeroupper
367; AVX512VL-NEXT:    retq
368;
369; AVX512BW-LABEL: trunc8i32_8i16:
370; AVX512BW:       # BB#0: # %entry
371; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
372; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
373; AVX512BW-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
374; AVX512BW-NEXT:    vzeroupper
375; AVX512BW-NEXT:    retq
376;
377; AVX512BWVL-LABEL: trunc8i32_8i16:
378; AVX512BWVL:       # BB#0: # %entry
379; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
380; AVX512BWVL-NEXT:    vzeroupper
381; AVX512BWVL-NEXT:    retq
382entry:
383  %0 = trunc <8 x i32> %a to <8 x i16>
384  ret <8 x i16> %0
385}
386
387define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) {
388; SSE-LABEL: trunc8i32_8i16_ashr:
389; SSE:       # BB#0: # %entry
390; SSE-NEXT:    psrad $16, %xmm1
391; SSE-NEXT:    psrad $16, %xmm0
392; SSE-NEXT:    packssdw %xmm1, %xmm0
393; SSE-NEXT:    retq
394;
395; AVX1-LABEL: trunc8i32_8i16_ashr:
396; AVX1:       # BB#0: # %entry
397; AVX1-NEXT:    vpsrad $16, %xmm0, %xmm1
398; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
399; AVX1-NEXT:    vpsrad $16, %xmm0, %xmm0
400; AVX1-NEXT:    vpackssdw %xmm0, %xmm0, %xmm0
401; AVX1-NEXT:    vpackssdw %xmm0, %xmm1, %xmm1
402; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
403; AVX1-NEXT:    vzeroupper
404; AVX1-NEXT:    retq
405;
406; AVX2-LABEL: trunc8i32_8i16_ashr:
407; AVX2:       # BB#0: # %entry
408; AVX2-NEXT:    vpsrad $16, %ymm0, %ymm0
409; AVX2-NEXT:    vpackssdw %ymm0, %ymm0, %ymm0
410; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
411; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
412; AVX2-NEXT:    vzeroupper
413; AVX2-NEXT:    retq
414;
415; AVX512F-LABEL: trunc8i32_8i16_ashr:
416; AVX512F:       # BB#0: # %entry
417; AVX512F-NEXT:    vpsrad $16, %ymm0, %ymm0
418; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
419; AVX512F-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
420; AVX512F-NEXT:    vzeroupper
421; AVX512F-NEXT:    retq
422;
423; AVX512VL-LABEL: trunc8i32_8i16_ashr:
424; AVX512VL:       # BB#0: # %entry
425; AVX512VL-NEXT:    vpsrad $16, %ymm0, %ymm0
426; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
427; AVX512VL-NEXT:    vzeroupper
428; AVX512VL-NEXT:    retq
429;
430; AVX512BW-LABEL: trunc8i32_8i16_ashr:
431; AVX512BW:       # BB#0: # %entry
432; AVX512BW-NEXT:    vpsrad $16, %ymm0, %ymm0
433; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
434; AVX512BW-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
435; AVX512BW-NEXT:    vzeroupper
436; AVX512BW-NEXT:    retq
437;
438; AVX512BWVL-LABEL: trunc8i32_8i16_ashr:
439; AVX512BWVL:       # BB#0: # %entry
440; AVX512BWVL-NEXT:    vpsrad $16, %ymm0, %ymm0
441; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
442; AVX512BWVL-NEXT:    vzeroupper
443; AVX512BWVL-NEXT:    retq
444entry:
445  %0 = ashr <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
446  %1 = trunc <8 x i32> %0 to <8 x i16>
447  ret <8 x i16> %1
448}
449
450define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) {
451; SSE2-LABEL: trunc8i32_8i16_lshr:
452; SSE2:       # BB#0: # %entry
453; SSE2-NEXT:    psrld $16, %xmm0
454; SSE2-NEXT:    psrld $16, %xmm1
455; SSE2-NEXT:    pslld $16, %xmm1
456; SSE2-NEXT:    psrad $16, %xmm1
457; SSE2-NEXT:    pslld $16, %xmm0
458; SSE2-NEXT:    psrad $16, %xmm0
459; SSE2-NEXT:    packssdw %xmm1, %xmm0
460; SSE2-NEXT:    retq
461;
462; SSSE3-LABEL: trunc8i32_8i16_lshr:
463; SSSE3:       # BB#0: # %entry
464; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [2,3,6,7,10,11,14,15,10,11,14,15,14,15,255,255]
465; SSSE3-NEXT:    pshufb %xmm2, %xmm1
466; SSSE3-NEXT:    pshufb %xmm2, %xmm0
467; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
468; SSSE3-NEXT:    retq
469;
470; SSE41-LABEL: trunc8i32_8i16_lshr:
471; SSE41:       # BB#0: # %entry
472; SSE41-NEXT:    psrld $16, %xmm1
473; SSE41-NEXT:    psrld $16, %xmm0
474; SSE41-NEXT:    packusdw %xmm1, %xmm0
475; SSE41-NEXT:    retq
476;
477; AVX1-LABEL: trunc8i32_8i16_lshr:
478; AVX1:       # BB#0: # %entry
479; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
480; AVX1-NEXT:    vpsrld $16, %xmm1, %xmm1
481; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm0
482; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
483; AVX1-NEXT:    vzeroupper
484; AVX1-NEXT:    retq
485;
486; AVX2-LABEL: trunc8i32_8i16_lshr:
487; AVX2:       # BB#0: # %entry
488; AVX2-NEXT:    vpsrld $16, %ymm0, %ymm0
489; AVX2-NEXT:    vpackusdw %ymm0, %ymm0, %ymm0
490; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
491; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
492; AVX2-NEXT:    vzeroupper
493; AVX2-NEXT:    retq
494;
495; AVX512F-LABEL: trunc8i32_8i16_lshr:
496; AVX512F:       # BB#0: # %entry
497; AVX512F-NEXT:    vpsrld $16, %ymm0, %ymm0
498; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
499; AVX512F-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
500; AVX512F-NEXT:    vzeroupper
501; AVX512F-NEXT:    retq
502;
503; AVX512VL-LABEL: trunc8i32_8i16_lshr:
504; AVX512VL:       # BB#0: # %entry
505; AVX512VL-NEXT:    vpsrld $16, %ymm0, %ymm0
506; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
507; AVX512VL-NEXT:    vzeroupper
508; AVX512VL-NEXT:    retq
509;
510; AVX512BW-LABEL: trunc8i32_8i16_lshr:
511; AVX512BW:       # BB#0: # %entry
512; AVX512BW-NEXT:    vpsrld $16, %ymm0, %ymm0
513; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
514; AVX512BW-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
515; AVX512BW-NEXT:    vzeroupper
516; AVX512BW-NEXT:    retq
517;
518; AVX512BWVL-LABEL: trunc8i32_8i16_lshr:
519; AVX512BWVL:       # BB#0: # %entry
520; AVX512BWVL-NEXT:    vpsrld $16, %ymm0, %ymm0
521; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
522; AVX512BWVL-NEXT:    vzeroupper
523; AVX512BWVL-NEXT:    retq
524entry:
525  %0 = lshr <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
526  %1 = trunc <8 x i32> %0 to <8 x i16>
527  ret <8 x i16> %1
528}
529
530define void @trunc8i32_8i8(<8 x i32> %a) {
531; SSE2-LABEL: trunc8i32_8i8:
532; SSE2:       # BB#0: # %entry
533; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
534; SSE2-NEXT:    pand %xmm2, %xmm1
535; SSE2-NEXT:    pand %xmm2, %xmm0
536; SSE2-NEXT:    packuswb %xmm1, %xmm0
537; SSE2-NEXT:    packuswb %xmm0, %xmm0
538; SSE2-NEXT:    movq %xmm0, (%rax)
539; SSE2-NEXT:    retq
540;
541; SSSE3-LABEL: trunc8i32_8i8:
542; SSSE3:       # BB#0: # %entry
543; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
544; SSSE3-NEXT:    pshufb %xmm2, %xmm1
545; SSSE3-NEXT:    pshufb %xmm2, %xmm0
546; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
547; SSSE3-NEXT:    movq %xmm0, (%rax)
548; SSSE3-NEXT:    retq
549;
550; SSE41-LABEL: trunc8i32_8i8:
551; SSE41:       # BB#0: # %entry
552; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
553; SSE41-NEXT:    pshufb %xmm2, %xmm1
554; SSE41-NEXT:    pshufb %xmm2, %xmm0
555; SSE41-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
556; SSE41-NEXT:    movq %xmm0, (%rax)
557; SSE41-NEXT:    retq
558;
559; AVX1-LABEL: trunc8i32_8i8:
560; AVX1:       # BB#0: # %entry
561; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
562; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
563; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
564; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
565; AVX1-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
566; AVX1-NEXT:    vmovq %xmm0, (%rax)
567; AVX1-NEXT:    vzeroupper
568; AVX1-NEXT:    retq
569;
570; AVX2-LABEL: trunc8i32_8i8:
571; AVX2:       # BB#0: # %entry
572; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
573; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
574; AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
575; AVX2-NEXT:    vmovq %xmm0, (%rax)
576; AVX2-NEXT:    vzeroupper
577; AVX2-NEXT:    retq
578;
579; AVX512F-LABEL: trunc8i32_8i8:
580; AVX512F:       # BB#0: # %entry
581; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
582; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
583; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
584; AVX512F-NEXT:    vmovq %xmm0, (%rax)
585; AVX512F-NEXT:    vzeroupper
586; AVX512F-NEXT:    retq
587;
588; AVX512VL-LABEL: trunc8i32_8i8:
589; AVX512VL:       # BB#0: # %entry
590; AVX512VL-NEXT:    vpmovdb %ymm0, (%rax)
591; AVX512VL-NEXT:    vzeroupper
592; AVX512VL-NEXT:    retq
593;
594; AVX512BW-LABEL: trunc8i32_8i8:
595; AVX512BW:       # BB#0: # %entry
596; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
597; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
598; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
599; AVX512BW-NEXT:    vmovq %xmm0, (%rax)
600; AVX512BW-NEXT:    vzeroupper
601; AVX512BW-NEXT:    retq
602;
603; AVX512BWVL-LABEL: trunc8i32_8i8:
604; AVX512BWVL:       # BB#0: # %entry
605; AVX512BWVL-NEXT:    vpmovdb %ymm0, (%rax)
606; AVX512BWVL-NEXT:    vzeroupper
607; AVX512BWVL-NEXT:    retq
608entry:
609  %0 = trunc <8 x i32> %a to <8 x i8>
610  store <8 x i8> %0, <8 x i8>* undef, align 4
611  ret void
612}
613
614define void @trunc16i32_16i16(<16 x i32> %a) {
615; SSE2-LABEL: trunc16i32_16i16:
616; SSE2:       # BB#0: # %entry
617; SSE2-NEXT:    pslld $16, %xmm1
618; SSE2-NEXT:    psrad $16, %xmm1
619; SSE2-NEXT:    pslld $16, %xmm0
620; SSE2-NEXT:    psrad $16, %xmm0
621; SSE2-NEXT:    packssdw %xmm1, %xmm0
622; SSE2-NEXT:    pslld $16, %xmm3
623; SSE2-NEXT:    psrad $16, %xmm3
624; SSE2-NEXT:    pslld $16, %xmm2
625; SSE2-NEXT:    psrad $16, %xmm2
626; SSE2-NEXT:    packssdw %xmm3, %xmm2
627; SSE2-NEXT:    movdqu %xmm2, (%rax)
628; SSE2-NEXT:    movdqu %xmm0, (%rax)
629; SSE2-NEXT:    retq
630;
631; SSSE3-LABEL: trunc16i32_16i16:
632; SSSE3:       # BB#0: # %entry
633; SSSE3-NEXT:    pslld $16, %xmm1
634; SSSE3-NEXT:    psrad $16, %xmm1
635; SSSE3-NEXT:    pslld $16, %xmm0
636; SSSE3-NEXT:    psrad $16, %xmm0
637; SSSE3-NEXT:    packssdw %xmm1, %xmm0
638; SSSE3-NEXT:    pslld $16, %xmm3
639; SSSE3-NEXT:    psrad $16, %xmm3
640; SSSE3-NEXT:    pslld $16, %xmm2
641; SSSE3-NEXT:    psrad $16, %xmm2
642; SSSE3-NEXT:    packssdw %xmm3, %xmm2
643; SSSE3-NEXT:    movdqu %xmm2, (%rax)
644; SSSE3-NEXT:    movdqu %xmm0, (%rax)
645; SSSE3-NEXT:    retq
646;
647; SSE41-LABEL: trunc16i32_16i16:
648; SSE41:       # BB#0: # %entry
649; SSE41-NEXT:    pxor %xmm4, %xmm4
650; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7]
651; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7]
652; SSE41-NEXT:    packusdw %xmm1, %xmm0
653; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7]
654; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7]
655; SSE41-NEXT:    packusdw %xmm3, %xmm2
656; SSE41-NEXT:    movdqu %xmm2, (%rax)
657; SSE41-NEXT:    movdqu %xmm0, (%rax)
658; SSE41-NEXT:    retq
659;
660; AVX1-LABEL: trunc16i32_16i16:
661; AVX1:       # BB#0: # %entry
662; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
663; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
664; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3],xmm2[4],xmm3[5],xmm2[6],xmm3[7]
665; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1],xmm1[2],xmm3[3],xmm1[4],xmm3[5],xmm1[6],xmm3[7]
666; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
667; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
668; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3],xmm2[4],xmm3[5],xmm2[6],xmm3[7]
669; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1],xmm0[2],xmm3[3],xmm0[4],xmm3[5],xmm0[6],xmm3[7]
670; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
671; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
672; AVX1-NEXT:    vmovups %ymm0, (%rax)
673; AVX1-NEXT:    vzeroupper
674; AVX1-NEXT:    retq
675;
676; AVX2-LABEL: trunc16i32_16i16:
677; AVX2:       # BB#0: # %entry
678; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
679; AVX2-NEXT:    vpshufb %ymm2, %ymm0, %ymm0
680; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
681; AVX2-NEXT:    vpshufb %ymm2, %ymm1, %ymm1
682; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
683; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
684; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
685; AVX2-NEXT:    vzeroupper
686; AVX2-NEXT:    retq
687;
688; AVX512-LABEL: trunc16i32_16i16:
689; AVX512:       # BB#0: # %entry
690; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
691; AVX512-NEXT:    vzeroupper
692; AVX512-NEXT:    retq
693entry:
694  %0 = trunc <16 x i32> %a to <16 x i16>
695  store <16 x i16> %0, <16 x i16>* undef, align 4
696  ret void
697}
698
699define void @trunc16i32_16i16_ashr(<16 x i32> %a) {
700; SSE2-LABEL: trunc16i32_16i16_ashr:
701; SSE2:       # BB#0: # %entry
702; SSE2-NEXT:    psrad $16, %xmm3
703; SSE2-NEXT:    psrad $16, %xmm2
704; SSE2-NEXT:    packssdw %xmm3, %xmm2
705; SSE2-NEXT:    psrad $16, %xmm1
706; SSE2-NEXT:    psrad $16, %xmm0
707; SSE2-NEXT:    packssdw %xmm1, %xmm0
708; SSE2-NEXT:    movdqu %xmm2, (%rax)
709; SSE2-NEXT:    movdqu %xmm0, (%rax)
710; SSE2-NEXT:    retq
711;
712; SSSE3-LABEL: trunc16i32_16i16_ashr:
713; SSSE3:       # BB#0: # %entry
714; SSSE3-NEXT:    psrad $16, %xmm3
715; SSSE3-NEXT:    psrad $16, %xmm2
716; SSSE3-NEXT:    packssdw %xmm3, %xmm2
717; SSSE3-NEXT:    psrad $16, %xmm1
718; SSSE3-NEXT:    psrad $16, %xmm0
719; SSSE3-NEXT:    packssdw %xmm1, %xmm0
720; SSSE3-NEXT:    movdqu %xmm2, (%rax)
721; SSSE3-NEXT:    movdqu %xmm0, (%rax)
722; SSSE3-NEXT:    retq
723;
724; SSE41-LABEL: trunc16i32_16i16_ashr:
725; SSE41:       # BB#0: # %entry
726; SSE41-NEXT:    psrad $16, %xmm2
727; SSE41-NEXT:    psrad $16, %xmm3
728; SSE41-NEXT:    psrad $16, %xmm0
729; SSE41-NEXT:    psrad $16, %xmm1
730; SSE41-NEXT:    pxor %xmm4, %xmm4
731; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7]
732; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7]
733; SSE41-NEXT:    packusdw %xmm1, %xmm0
734; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7]
735; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7]
736; SSE41-NEXT:    packusdw %xmm3, %xmm2
737; SSE41-NEXT:    movdqu %xmm2, (%rax)
738; SSE41-NEXT:    movdqu %xmm0, (%rax)
739; SSE41-NEXT:    retq
740;
741; AVX1-LABEL: trunc16i32_16i16_ashr:
742; AVX1:       # BB#0: # %entry
743; AVX1-NEXT:    vpsrad $16, %xmm0, %xmm2
744; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
745; AVX1-NEXT:    vpsrad $16, %xmm0, %xmm0
746; AVX1-NEXT:    vpsrad $16, %xmm1, %xmm3
747; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm1
748; AVX1-NEXT:    vpsrad $16, %xmm1, %xmm1
749; AVX1-NEXT:    vpxor %xmm4, %xmm4, %xmm4
750; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7]
751; AVX1-NEXT:    vpblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7]
752; AVX1-NEXT:    vpackusdw %xmm1, %xmm3, %xmm1
753; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7]
754; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7]
755; AVX1-NEXT:    vpackusdw %xmm0, %xmm2, %xmm0
756; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
757; AVX1-NEXT:    vmovups %ymm0, (%rax)
758; AVX1-NEXT:    vzeroupper
759; AVX1-NEXT:    retq
760;
761; AVX2-LABEL: trunc16i32_16i16_ashr:
762; AVX2:       # BB#0: # %entry
763; AVX2-NEXT:    vpsrad $16, %ymm1, %ymm1
764; AVX2-NEXT:    vpsrad $16, %ymm0, %ymm0
765; AVX2-NEXT:    vpackssdw %ymm0, %ymm0, %ymm0
766; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
767; AVX2-NEXT:    vpackssdw %ymm0, %ymm1, %ymm1
768; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
769; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
770; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
771; AVX2-NEXT:    vzeroupper
772; AVX2-NEXT:    retq
773;
774; AVX512-LABEL: trunc16i32_16i16_ashr:
775; AVX512:       # BB#0: # %entry
776; AVX512-NEXT:    vpsrld $16, %zmm0, %zmm0
777; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
778; AVX512-NEXT:    vzeroupper
779; AVX512-NEXT:    retq
780entry:
781  %0 = ashr <16 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
782  %1 = trunc <16 x i32> %0 to <16 x i16>
783  store <16 x i16> %1, <16 x i16>* undef, align 4
784  ret void
785}
786
787define void @trunc16i32_16i16_lshr(<16 x i32> %a) {
788; SSE2-LABEL: trunc16i32_16i16_lshr:
789; SSE2:       # BB#0: # %entry
790; SSE2-NEXT:    psrld $16, %xmm2
791; SSE2-NEXT:    psrld $16, %xmm3
792; SSE2-NEXT:    psrld $16, %xmm0
793; SSE2-NEXT:    psrld $16, %xmm1
794; SSE2-NEXT:    pslld $16, %xmm1
795; SSE2-NEXT:    psrad $16, %xmm1
796; SSE2-NEXT:    pslld $16, %xmm0
797; SSE2-NEXT:    psrad $16, %xmm0
798; SSE2-NEXT:    packssdw %xmm1, %xmm0
799; SSE2-NEXT:    pslld $16, %xmm3
800; SSE2-NEXT:    psrad $16, %xmm3
801; SSE2-NEXT:    pslld $16, %xmm2
802; SSE2-NEXT:    psrad $16, %xmm2
803; SSE2-NEXT:    packssdw %xmm3, %xmm2
804; SSE2-NEXT:    movdqu %xmm2, (%rax)
805; SSE2-NEXT:    movdqu %xmm0, (%rax)
806; SSE2-NEXT:    retq
807;
808; SSSE3-LABEL: trunc16i32_16i16_lshr:
809; SSSE3:       # BB#0: # %entry
810; SSSE3-NEXT:    psrld $16, %xmm2
811; SSSE3-NEXT:    psrld $16, %xmm3
812; SSSE3-NEXT:    psrld $16, %xmm0
813; SSSE3-NEXT:    psrld $16, %xmm1
814; SSSE3-NEXT:    pslld $16, %xmm1
815; SSSE3-NEXT:    psrad $16, %xmm1
816; SSSE3-NEXT:    pslld $16, %xmm0
817; SSSE3-NEXT:    psrad $16, %xmm0
818; SSSE3-NEXT:    packssdw %xmm1, %xmm0
819; SSSE3-NEXT:    pslld $16, %xmm3
820; SSSE3-NEXT:    psrad $16, %xmm3
821; SSSE3-NEXT:    pslld $16, %xmm2
822; SSSE3-NEXT:    psrad $16, %xmm2
823; SSSE3-NEXT:    packssdw %xmm3, %xmm2
824; SSSE3-NEXT:    movdqu %xmm2, (%rax)
825; SSSE3-NEXT:    movdqu %xmm0, (%rax)
826; SSSE3-NEXT:    retq
827;
828; SSE41-LABEL: trunc16i32_16i16_lshr:
829; SSE41:       # BB#0: # %entry
830; SSE41-NEXT:    psrld $16, %xmm3
831; SSE41-NEXT:    psrld $16, %xmm2
832; SSE41-NEXT:    packusdw %xmm3, %xmm2
833; SSE41-NEXT:    psrld $16, %xmm1
834; SSE41-NEXT:    psrld $16, %xmm0
835; SSE41-NEXT:    packusdw %xmm1, %xmm0
836; SSE41-NEXT:    movdqu %xmm2, (%rax)
837; SSE41-NEXT:    movdqu %xmm0, (%rax)
838; SSE41-NEXT:    retq
839;
840; AVX1-LABEL: trunc16i32_16i16_lshr:
841; AVX1:       # BB#0: # %entry
842; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
843; AVX1-NEXT:    vpsrld $16, %xmm2, %xmm2
844; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm0
845; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
846; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
847; AVX1-NEXT:    vpsrld $16, %xmm2, %xmm2
848; AVX1-NEXT:    vpsrld $16, %xmm1, %xmm1
849; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
850; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
851; AVX1-NEXT:    vmovups %ymm0, (%rax)
852; AVX1-NEXT:    vzeroupper
853; AVX1-NEXT:    retq
854;
855; AVX2-LABEL: trunc16i32_16i16_lshr:
856; AVX2:       # BB#0: # %entry
857; AVX2-NEXT:    vpsrld $16, %ymm1, %ymm1
858; AVX2-NEXT:    vpsrld $16, %ymm0, %ymm0
859; AVX2-NEXT:    vpackusdw %ymm0, %ymm0, %ymm0
860; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
861; AVX2-NEXT:    vpackusdw %ymm0, %ymm1, %ymm1
862; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
863; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
864; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
865; AVX2-NEXT:    vzeroupper
866; AVX2-NEXT:    retq
867;
868; AVX512-LABEL: trunc16i32_16i16_lshr:
869; AVX512:       # BB#0: # %entry
870; AVX512-NEXT:    vpsrld $16, %zmm0, %zmm0
871; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
872; AVX512-NEXT:    vzeroupper
873; AVX512-NEXT:    retq
874entry:
875  %0 = lshr <16 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
876  %1 = trunc <16 x i32> %0 to <16 x i16>
877  store <16 x i16> %1, <16 x i16>* undef, align 4
878  ret void
879}
880
881define void @trunc16i32_16i8(<16 x i32> %a) {
882; SSE-LABEL: trunc16i32_16i8:
883; SSE:       # BB#0: # %entry
884; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
885; SSE-NEXT:    pand %xmm4, %xmm3
886; SSE-NEXT:    pand %xmm4, %xmm2
887; SSE-NEXT:    packuswb %xmm3, %xmm2
888; SSE-NEXT:    pand %xmm4, %xmm1
889; SSE-NEXT:    pand %xmm4, %xmm0
890; SSE-NEXT:    packuswb %xmm1, %xmm0
891; SSE-NEXT:    packuswb %xmm2, %xmm0
892; SSE-NEXT:    movdqu %xmm0, (%rax)
893; SSE-NEXT:    retq
894;
895; AVX1-LABEL: trunc16i32_16i8:
896; AVX1:       # BB#0: # %entry
897; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
898; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
899; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
900; AVX1-NEXT:    vpand %xmm3, %xmm1, %xmm1
901; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
902; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
903; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
904; AVX1-NEXT:    vpand %xmm3, %xmm0, %xmm0
905; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
906; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
907; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
908; AVX1-NEXT:    vzeroupper
909; AVX1-NEXT:    retq
910;
911; AVX2-LABEL: trunc16i32_16i8:
912; AVX2:       # BB#0: # %entry
913; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
914; AVX2-NEXT:    vpshufb %ymm2, %ymm1, %ymm1
915; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
916; AVX2-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
917; AVX2-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
918; AVX2-NEXT:    vpshufb %ymm2, %ymm0, %ymm0
919; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
920; AVX2-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
921; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
922; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
923; AVX2-NEXT:    vzeroupper
924; AVX2-NEXT:    retq
925;
926; AVX512-LABEL: trunc16i32_16i8:
927; AVX512:       # BB#0: # %entry
928; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
929; AVX512-NEXT:    vzeroupper
930; AVX512-NEXT:    retq
931entry:
932  %0 = trunc <16 x i32> %a to <16 x i8>
933  store <16 x i8> %0, <16 x i8>* undef, align 4
934  ret void
935}
936
937define void @trunc16i32_16i8_ashr(<16 x i32> %a) {
938; SSE-LABEL: trunc16i32_16i8_ashr:
939; SSE:       # BB#0: # %entry
940; SSE-NEXT:    psrad $24, %xmm0
941; SSE-NEXT:    psrad $24, %xmm1
942; SSE-NEXT:    psrad $24, %xmm2
943; SSE-NEXT:    psrad $24, %xmm3
944; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
945; SSE-NEXT:    pand %xmm4, %xmm3
946; SSE-NEXT:    pand %xmm4, %xmm2
947; SSE-NEXT:    packuswb %xmm3, %xmm2
948; SSE-NEXT:    pand %xmm4, %xmm1
949; SSE-NEXT:    pand %xmm4, %xmm0
950; SSE-NEXT:    packuswb %xmm1, %xmm0
951; SSE-NEXT:    packuswb %xmm2, %xmm0
952; SSE-NEXT:    movdqu %xmm0, (%rax)
953; SSE-NEXT:    retq
954;
955; AVX1-LABEL: trunc16i32_16i8_ashr:
956; AVX1:       # BB#0: # %entry
957; AVX1-NEXT:    vpsrad $24, %xmm0, %xmm2
958; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
959; AVX1-NEXT:    vpsrad $24, %xmm0, %xmm0
960; AVX1-NEXT:    vpsrad $24, %xmm1, %xmm3
961; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm1
962; AVX1-NEXT:    vpsrad $24, %xmm1, %xmm1
963; AVX1-NEXT:    vmovdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
964; AVX1-NEXT:    vpand %xmm4, %xmm1, %xmm1
965; AVX1-NEXT:    vpand %xmm4, %xmm3, %xmm3
966; AVX1-NEXT:    vpackuswb %xmm1, %xmm3, %xmm1
967; AVX1-NEXT:    vpand %xmm4, %xmm0, %xmm0
968; AVX1-NEXT:    vpand %xmm4, %xmm2, %xmm2
969; AVX1-NEXT:    vpackuswb %xmm0, %xmm2, %xmm0
970; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
971; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
972; AVX1-NEXT:    vzeroupper
973; AVX1-NEXT:    retq
974;
975; AVX2-LABEL: trunc16i32_16i8_ashr:
976; AVX2:       # BB#0: # %entry
977; AVX2-NEXT:    vpsrad $24, %ymm0, %ymm0
978; AVX2-NEXT:    vpsrad $24, %ymm1, %ymm1
979; AVX2-NEXT:    vpackssdw %ymm0, %ymm1, %ymm1
980; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
981; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
982; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
983; AVX2-NEXT:    vpackssdw %ymm0, %ymm0, %ymm0
984; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
985; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
986; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
987; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
988; AVX2-NEXT:    vzeroupper
989; AVX2-NEXT:    retq
990;
991; AVX512-LABEL: trunc16i32_16i8_ashr:
992; AVX512:       # BB#0: # %entry
993; AVX512-NEXT:    vpsrld $24, %zmm0, %zmm0
994; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
995; AVX512-NEXT:    vzeroupper
996; AVX512-NEXT:    retq
997entry:
998  %0 = ashr <16 x i32> %a, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
999  %1 = trunc <16 x i32> %0 to <16 x i8>
1000  store <16 x i8> %1, <16 x i8>* undef, align 4
1001  ret void
1002}
1003
1004define void @trunc16i32_16i8_lshr(<16 x i32> %a) {
1005; SSE-LABEL: trunc16i32_16i8_lshr:
1006; SSE:       # BB#0: # %entry
1007; SSE-NEXT:    psrld $24, %xmm1
1008; SSE-NEXT:    psrld $24, %xmm0
1009; SSE-NEXT:    packuswb %xmm1, %xmm0
1010; SSE-NEXT:    psrld $24, %xmm3
1011; SSE-NEXT:    psrld $24, %xmm2
1012; SSE-NEXT:    packuswb %xmm3, %xmm2
1013; SSE-NEXT:    packuswb %xmm2, %xmm0
1014; SSE-NEXT:    movdqu %xmm0, (%rax)
1015; SSE-NEXT:    retq
1016;
1017; AVX1-LABEL: trunc16i32_16i8_lshr:
1018; AVX1:       # BB#0: # %entry
1019; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
1020; AVX1-NEXT:    vpsrld $24, %xmm2, %xmm2
1021; AVX1-NEXT:    vpsrld $24, %xmm0, %xmm0
1022; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
1023; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1024; AVX1-NEXT:    vpsrld $24, %xmm2, %xmm2
1025; AVX1-NEXT:    vpsrld $24, %xmm1, %xmm1
1026; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
1027; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
1028; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
1029; AVX1-NEXT:    vzeroupper
1030; AVX1-NEXT:    retq
1031;
1032; AVX2-LABEL: trunc16i32_16i8_lshr:
1033; AVX2:       # BB#0: # %entry
1034; AVX2-NEXT:    vpsrld $24, %ymm0, %ymm0
1035; AVX2-NEXT:    vpsrld $24, %ymm1, %ymm1
1036; AVX2-NEXT:    vpackssdw %ymm0, %ymm1, %ymm1
1037; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
1038; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1039; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1040; AVX2-NEXT:    vpackssdw %ymm0, %ymm0, %ymm0
1041; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
1042; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1043; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1044; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
1045; AVX2-NEXT:    vzeroupper
1046; AVX2-NEXT:    retq
1047;
1048; AVX512-LABEL: trunc16i32_16i8_lshr:
1049; AVX512:       # BB#0: # %entry
1050; AVX512-NEXT:    vpsrld $24, %zmm0, %zmm0
1051; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
1052; AVX512-NEXT:    vzeroupper
1053; AVX512-NEXT:    retq
1054entry:
1055  %0 = lshr <16 x i32> %a, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
1056  %1 = trunc <16 x i32> %0 to <16 x i8>
1057  store <16 x i8> %1, <16 x i8>* undef, align 4
1058  ret void
1059}
1060
1061;PR25684
1062define void @trunc16i16_16i8(<16 x i16> %a) {
1063; SSE2-LABEL: trunc16i16_16i8:
1064; SSE2:       # BB#0: # %entry
1065; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1066; SSE2-NEXT:    pand %xmm2, %xmm1
1067; SSE2-NEXT:    pand %xmm2, %xmm0
1068; SSE2-NEXT:    packuswb %xmm1, %xmm0
1069; SSE2-NEXT:    movdqu %xmm0, (%rax)
1070; SSE2-NEXT:    retq
1071;
1072; SSSE3-LABEL: trunc16i16_16i8:
1073; SSSE3:       # BB#0: # %entry
1074; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1075; SSSE3-NEXT:    pshufb %xmm2, %xmm1
1076; SSSE3-NEXT:    pshufb %xmm2, %xmm0
1077; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1078; SSSE3-NEXT:    movdqu %xmm0, (%rax)
1079; SSSE3-NEXT:    retq
1080;
1081; SSE41-LABEL: trunc16i16_16i8:
1082; SSE41:       # BB#0: # %entry
1083; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1084; SSE41-NEXT:    pshufb %xmm2, %xmm1
1085; SSE41-NEXT:    pshufb %xmm2, %xmm0
1086; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1087; SSE41-NEXT:    movdqu %xmm0, (%rax)
1088; SSE41-NEXT:    retq
1089;
1090; AVX1-LABEL: trunc16i16_16i8:
1091; AVX1:       # BB#0: # %entry
1092; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
1093; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1094; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1095; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1096; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1097; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
1098; AVX1-NEXT:    vzeroupper
1099; AVX1-NEXT:    retq
1100;
1101; AVX2-LABEL: trunc16i16_16i8:
1102; AVX2:       # BB#0: # %entry
1103; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
1104; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1105; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1106; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1107; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1108; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
1109; AVX2-NEXT:    vzeroupper
1110; AVX2-NEXT:    retq
1111;
1112; AVX512F-LABEL: trunc16i16_16i8:
1113; AVX512F:       # BB#0: # %entry
1114; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
1115; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
1116; AVX512F-NEXT:    vmovdqu %xmm0, (%rax)
1117; AVX512F-NEXT:    vzeroupper
1118; AVX512F-NEXT:    retq
1119;
1120; AVX512VL-LABEL: trunc16i16_16i8:
1121; AVX512VL:       # BB#0: # %entry
1122; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
1123; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
1124; AVX512VL-NEXT:    vmovdqu %xmm0, (%rax)
1125; AVX512VL-NEXT:    vzeroupper
1126; AVX512VL-NEXT:    retq
1127;
1128; AVX512BW-LABEL: trunc16i16_16i8:
1129; AVX512BW:       # BB#0: # %entry
1130; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
1131; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
1132; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
1133; AVX512BW-NEXT:    vzeroupper
1134; AVX512BW-NEXT:    retq
1135;
1136; AVX512BWVL-LABEL: trunc16i16_16i8:
1137; AVX512BWVL:       # BB#0: # %entry
1138; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
1139; AVX512BWVL-NEXT:    vzeroupper
1140; AVX512BWVL-NEXT:    retq
1141entry:
1142  %0 = trunc <16 x i16> %a to <16 x i8>
1143  store <16 x i8> %0, <16 x i8>* undef, align 4
1144  ret void
1145}
1146
1147define void @trunc16i16_16i8_ashr(<16 x i16> %a) {
1148; SSE-LABEL: trunc16i16_16i8_ashr:
1149; SSE:       # BB#0: # %entry
1150; SSE-NEXT:    psraw $8, %xmm1
1151; SSE-NEXT:    psraw $8, %xmm0
1152; SSE-NEXT:    packsswb %xmm1, %xmm0
1153; SSE-NEXT:    movdqu %xmm0, (%rax)
1154; SSE-NEXT:    retq
1155;
1156; AVX1-LABEL: trunc16i16_16i8_ashr:
1157; AVX1:       # BB#0: # %entry
1158; AVX1-NEXT:    vpsraw $8, %xmm0, %xmm1
1159; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
1160; AVX1-NEXT:    vpsraw $8, %xmm0, %xmm0
1161; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1162; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1163; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1164; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1165; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
1166; AVX1-NEXT:    vzeroupper
1167; AVX1-NEXT:    retq
1168;
1169; AVX2-LABEL: trunc16i16_16i8_ashr:
1170; AVX2:       # BB#0: # %entry
1171; AVX2-NEXT:    vpsraw $8, %ymm0, %ymm0
1172; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
1173; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1174; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1175; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1176; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1177; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
1178; AVX2-NEXT:    vzeroupper
1179; AVX2-NEXT:    retq
1180;
1181; AVX512F-LABEL: trunc16i16_16i8_ashr:
1182; AVX512F:       # BB#0: # %entry
1183; AVX512F-NEXT:    vpsraw $8, %ymm0, %ymm0
1184; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
1185; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
1186; AVX512F-NEXT:    vmovdqu %xmm0, (%rax)
1187; AVX512F-NEXT:    vzeroupper
1188; AVX512F-NEXT:    retq
1189;
1190; AVX512VL-LABEL: trunc16i16_16i8_ashr:
1191; AVX512VL:       # BB#0: # %entry
1192; AVX512VL-NEXT:    vpsraw $8, %ymm0, %ymm0
1193; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
1194; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
1195; AVX512VL-NEXT:    vmovdqu %xmm0, (%rax)
1196; AVX512VL-NEXT:    vzeroupper
1197; AVX512VL-NEXT:    retq
1198;
1199; AVX512BW-LABEL: trunc16i16_16i8_ashr:
1200; AVX512BW:       # BB#0: # %entry
1201; AVX512BW-NEXT:    vpsraw $8, %ymm0, %ymm0
1202; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
1203; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
1204; AVX512BW-NEXT:    vzeroupper
1205; AVX512BW-NEXT:    retq
1206;
1207; AVX512BWVL-LABEL: trunc16i16_16i8_ashr:
1208; AVX512BWVL:       # BB#0: # %entry
1209; AVX512BWVL-NEXT:    vpsrlw $8, %ymm0, %ymm0
1210; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
1211; AVX512BWVL-NEXT:    vzeroupper
1212; AVX512BWVL-NEXT:    retq
1213entry:
1214  %0 = ashr <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
1215  %1 = trunc <16 x i16> %0 to <16 x i8>
1216  store <16 x i8> %1, <16 x i8>* undef, align 4
1217  ret void
1218}
1219
1220define void @trunc16i16_16i8_lshr(<16 x i16> %a) {
1221; SSE-LABEL: trunc16i16_16i8_lshr:
1222; SSE:       # BB#0: # %entry
1223; SSE-NEXT:    psrlw $8, %xmm1
1224; SSE-NEXT:    psrlw $8, %xmm0
1225; SSE-NEXT:    packuswb %xmm1, %xmm0
1226; SSE-NEXT:    movdqu %xmm0, (%rax)
1227; SSE-NEXT:    retq
1228;
1229; AVX1-LABEL: trunc16i16_16i8_lshr:
1230; AVX1:       # BB#0: # %entry
1231; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
1232; AVX1-NEXT:    vpsrlw $8, %xmm1, %xmm1
1233; AVX1-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u]
1234; AVX1-NEXT:    vpshufb {{.*#+}} xmm1 = xmm1[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1235; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1236; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
1237; AVX1-NEXT:    vzeroupper
1238; AVX1-NEXT:    retq
1239;
1240; AVX2-LABEL: trunc16i16_16i8_lshr:
1241; AVX2:       # BB#0: # %entry
1242; AVX2-NEXT:    vpsrlw $8, %ymm0, %ymm0
1243; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
1244; AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
1245; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
1246; AVX2-NEXT:    vzeroupper
1247; AVX2-NEXT:    retq
1248;
1249; AVX512F-LABEL: trunc16i16_16i8_lshr:
1250; AVX512F:       # BB#0: # %entry
1251; AVX512F-NEXT:    vpsrlw $8, %ymm0, %ymm0
1252; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
1253; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
1254; AVX512F-NEXT:    vmovdqu %xmm0, (%rax)
1255; AVX512F-NEXT:    vzeroupper
1256; AVX512F-NEXT:    retq
1257;
1258; AVX512VL-LABEL: trunc16i16_16i8_lshr:
1259; AVX512VL:       # BB#0: # %entry
1260; AVX512VL-NEXT:    vpsrlw $8, %ymm0, %ymm0
1261; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
1262; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
1263; AVX512VL-NEXT:    vmovdqu %xmm0, (%rax)
1264; AVX512VL-NEXT:    vzeroupper
1265; AVX512VL-NEXT:    retq
1266;
1267; AVX512BW-LABEL: trunc16i16_16i8_lshr:
1268; AVX512BW:       # BB#0: # %entry
1269; AVX512BW-NEXT:    vpsrlw $8, %ymm0, %ymm0
1270; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
1271; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
1272; AVX512BW-NEXT:    vzeroupper
1273; AVX512BW-NEXT:    retq
1274;
1275; AVX512BWVL-LABEL: trunc16i16_16i8_lshr:
1276; AVX512BWVL:       # BB#0: # %entry
1277; AVX512BWVL-NEXT:    vpsrlw $8, %ymm0, %ymm0
1278; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
1279; AVX512BWVL-NEXT:    vzeroupper
1280; AVX512BWVL-NEXT:    retq
1281entry:
1282  %0 = lshr <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
1283  %1 = trunc <16 x i16> %0 to <16 x i8>
1284  store <16 x i8> %1, <16 x i8>* undef, align 4
1285  ret void
1286}
1287
1288define void @trunc32i16_32i8(<32 x i16> %a) {
1289; SSE2-LABEL: trunc32i16_32i8:
1290; SSE2:       # BB#0: # %entry
1291; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
1292; SSE2-NEXT:    pand %xmm4, %xmm1
1293; SSE2-NEXT:    pand %xmm4, %xmm0
1294; SSE2-NEXT:    packuswb %xmm1, %xmm0
1295; SSE2-NEXT:    pand %xmm4, %xmm3
1296; SSE2-NEXT:    pand %xmm4, %xmm2
1297; SSE2-NEXT:    packuswb %xmm3, %xmm2
1298; SSE2-NEXT:    movdqu %xmm2, (%rax)
1299; SSE2-NEXT:    movdqu %xmm0, (%rax)
1300; SSE2-NEXT:    retq
1301;
1302; SSSE3-LABEL: trunc32i16_32i8:
1303; SSSE3:       # BB#0: # %entry
1304; SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1305; SSSE3-NEXT:    pshufb %xmm4, %xmm1
1306; SSSE3-NEXT:    pshufb %xmm4, %xmm0
1307; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1308; SSSE3-NEXT:    pshufb %xmm4, %xmm3
1309; SSSE3-NEXT:    pshufb %xmm4, %xmm2
1310; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1311; SSSE3-NEXT:    movdqu %xmm2, (%rax)
1312; SSSE3-NEXT:    movdqu %xmm0, (%rax)
1313; SSSE3-NEXT:    retq
1314;
1315; SSE41-LABEL: trunc32i16_32i8:
1316; SSE41:       # BB#0: # %entry
1317; SSE41-NEXT:    movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1318; SSE41-NEXT:    pshufb %xmm4, %xmm1
1319; SSE41-NEXT:    pshufb %xmm4, %xmm0
1320; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1321; SSE41-NEXT:    pshufb %xmm4, %xmm3
1322; SSE41-NEXT:    pshufb %xmm4, %xmm2
1323; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1324; SSE41-NEXT:    movdqu %xmm2, (%rax)
1325; SSE41-NEXT:    movdqu %xmm0, (%rax)
1326; SSE41-NEXT:    retq
1327;
1328; AVX1-LABEL: trunc32i16_32i8:
1329; AVX1:       # BB#0: # %entry
1330; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1331; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1332; AVX1-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
1333; AVX1-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
1334; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
1335; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
1336; AVX1-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
1337; AVX1-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
1338; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
1339; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1340; AVX1-NEXT:    vmovups %ymm0, (%rax)
1341; AVX1-NEXT:    vzeroupper
1342; AVX1-NEXT:    retq
1343;
1344; AVX2-LABEL: trunc32i16_32i8:
1345; AVX2:       # BB#0: # %entry
1346; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
1347; AVX2-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1348; AVX2-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
1349; AVX2-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
1350; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
1351; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm2
1352; AVX2-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
1353; AVX2-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
1354; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
1355; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1356; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
1357; AVX2-NEXT:    vzeroupper
1358; AVX2-NEXT:    retq
1359;
1360; AVX512F-LABEL: trunc32i16_32i8:
1361; AVX512F:       # BB#0: # %entry
1362; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
1363; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
1364; AVX512F-NEXT:    vpmovsxwd %ymm1, %zmm1
1365; AVX512F-NEXT:    vpmovdb %zmm1, %xmm1
1366; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1367; AVX512F-NEXT:    vmovdqu %ymm0, (%rax)
1368; AVX512F-NEXT:    vzeroupper
1369; AVX512F-NEXT:    retq
1370;
1371; AVX512VL-LABEL: trunc32i16_32i8:
1372; AVX512VL:       # BB#0: # %entry
1373; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
1374; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
1375; AVX512VL-NEXT:    vpmovsxwd %ymm1, %zmm1
1376; AVX512VL-NEXT:    vpmovdb %zmm1, %xmm1
1377; AVX512VL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1378; AVX512VL-NEXT:    vmovdqu %ymm0, (%rax)
1379; AVX512VL-NEXT:    vzeroupper
1380; AVX512VL-NEXT:    retq
1381;
1382; AVX512BW-LABEL: trunc32i16_32i8:
1383; AVX512BW:       # BB#0: # %entry
1384; AVX512BW-NEXT:    vpmovwb %zmm0, (%rax)
1385; AVX512BW-NEXT:    vzeroupper
1386; AVX512BW-NEXT:    retq
1387;
1388; AVX512BWVL-LABEL: trunc32i16_32i8:
1389; AVX512BWVL:       # BB#0: # %entry
1390; AVX512BWVL-NEXT:    vpmovwb %zmm0, (%rax)
1391; AVX512BWVL-NEXT:    vzeroupper
1392; AVX512BWVL-NEXT:    retq
1393entry:
1394  %0 = trunc <32 x i16> %a to <32 x i8>
1395  store <32 x i8> %0, <32 x i8>* undef, align 4
1396  ret void
1397}
1398
1399define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) {
1400; SSE-LABEL: trunc2x4i64_8i32:
1401; SSE:       # BB#0: # %entry
1402; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
1403; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
1404; SSE-NEXT:    movaps %xmm2, %xmm1
1405; SSE-NEXT:    retq
1406;
1407; AVX1-LABEL: trunc2x4i64_8i32:
1408; AVX1:       # BB#0: # %entry
1409; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
1410; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
1411; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1412; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
1413; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1414; AVX1-NEXT:    retq
1415;
1416; AVX2-LABEL: trunc2x4i64_8i32:
1417; AVX2:       # BB#0: # %entry
1418; AVX2-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
1419; AVX2-NEXT:    vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
1420; AVX2-NEXT:    vpermilps {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
1421; AVX2-NEXT:    vpermpd {{.*#+}} ymm1 = ymm1[0,2,2,3]
1422; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1423; AVX2-NEXT:    retq
1424;
1425; AVX512F-LABEL: trunc2x4i64_8i32:
1426; AVX512F:       # BB#0: # %entry
1427; AVX512F-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
1428; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
1429; AVX512F-NEXT:    vpmovqd %zmm0, %ymm0
1430; AVX512F-NEXT:    vpmovqd %zmm1, %ymm1
1431; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1432; AVX512F-NEXT:    retq
1433;
1434; AVX512VL-LABEL: trunc2x4i64_8i32:
1435; AVX512VL:       # BB#0: # %entry
1436; AVX512VL-NEXT:    vpmovqd %ymm0, %xmm0
1437; AVX512VL-NEXT:    vpmovqd %ymm1, %xmm1
1438; AVX512VL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1439; AVX512VL-NEXT:    retq
1440;
1441; AVX512BW-LABEL: trunc2x4i64_8i32:
1442; AVX512BW:       # BB#0: # %entry
1443; AVX512BW-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
1444; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
1445; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
1446; AVX512BW-NEXT:    vpmovqd %zmm1, %ymm1
1447; AVX512BW-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1448; AVX512BW-NEXT:    retq
1449;
1450; AVX512BWVL-LABEL: trunc2x4i64_8i32:
1451; AVX512BWVL:       # BB#0: # %entry
1452; AVX512BWVL-NEXT:    vpmovqd %ymm0, %xmm0
1453; AVX512BWVL-NEXT:    vpmovqd %ymm1, %xmm1
1454; AVX512BWVL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1455; AVX512BWVL-NEXT:    retq
1456entry:
1457  %0 = trunc <4 x i64> %a to <4 x i32>
1458  %1 = trunc <4 x i64> %b to <4 x i32>
1459  %2 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1460  ret <8 x i32> %2
1461}
1462
1463define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) {
1464; SSE2-LABEL: trunc2x4i64_8i16:
1465; SSE2:       # BB#0: # %entry
1466; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1467; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1468; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1469; SSE2-NEXT:    pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7]
1470; SSE2-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
1471; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
1472; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
1473; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
1474; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
1475; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1476; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
1477; SSE2-NEXT:    retq
1478;
1479; SSSE3-LABEL: trunc2x4i64_8i16:
1480; SSSE3:       # BB#0: # %entry
1481; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1482; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1483; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1484; SSSE3-NEXT:    pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7]
1485; SSSE3-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
1486; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
1487; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
1488; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
1489; SSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
1490; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1491; SSSE3-NEXT:    movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
1492; SSSE3-NEXT:    retq
1493;
1494; SSE41-LABEL: trunc2x4i64_8i16:
1495; SSE41:       # BB#0: # %entry
1496; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
1497; SSE41-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
1498; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
1499; SSE41-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
1500; SSE41-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
1501; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1502; SSE41-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1503; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1504; SSE41-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1505; SSE41-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1506; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
1507; SSE41-NEXT:    retq
1508;
1509; AVX1-LABEL: trunc2x4i64_8i16:
1510; AVX1:       # BB#0: # %entry
1511; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
1512; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
1513; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1514; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
1515; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1516; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1517; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1518; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1519; AVX1-NEXT:    vzeroupper
1520; AVX1-NEXT:    retq
1521;
1522; AVX2-LABEL: trunc2x4i64_8i16:
1523; AVX2:       # BB#0: # %entry
1524; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
1525; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
1526; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
1527; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
1528; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1529; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1530; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1531; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1532; AVX2-NEXT:    vzeroupper
1533; AVX2-NEXT:    retq
1534;
1535; AVX512F-LABEL: trunc2x4i64_8i16:
1536; AVX512F:       # BB#0: # %entry
1537; AVX512F-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
1538; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
1539; AVX512F-NEXT:    vpmovqd %zmm0, %ymm0
1540; AVX512F-NEXT:    vpmovqd %zmm1, %ymm1
1541; AVX512F-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1542; AVX512F-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1543; AVX512F-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1544; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1545; AVX512F-NEXT:    vzeroupper
1546; AVX512F-NEXT:    retq
1547;
1548; AVX512VL-LABEL: trunc2x4i64_8i16:
1549; AVX512VL:       # BB#0: # %entry
1550; AVX512VL-NEXT:    vpmovqd %ymm0, %xmm0
1551; AVX512VL-NEXT:    vpmovqd %ymm1, %xmm1
1552; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1553; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1554; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1555; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1556; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1557; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1558; AVX512VL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1559; AVX512VL-NEXT:    vzeroupper
1560; AVX512VL-NEXT:    retq
1561;
1562; AVX512BW-LABEL: trunc2x4i64_8i16:
1563; AVX512BW:       # BB#0: # %entry
1564; AVX512BW-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
1565; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
1566; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
1567; AVX512BW-NEXT:    vpmovqd %zmm1, %ymm1
1568; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1569; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1570; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1571; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1572; AVX512BW-NEXT:    vzeroupper
1573; AVX512BW-NEXT:    retq
1574;
1575; AVX512BWVL-LABEL: trunc2x4i64_8i16:
1576; AVX512BWVL:       # BB#0: # %entry
1577; AVX512BWVL-NEXT:    vpmovqd %ymm0, %xmm0
1578; AVX512BWVL-NEXT:    vpmovqd %ymm1, %xmm1
1579; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1580; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1581; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1582; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1583; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1584; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1585; AVX512BWVL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1586; AVX512BWVL-NEXT:    vzeroupper
1587; AVX512BWVL-NEXT:    retq
1588entry:
1589  %0 = trunc <4 x i64> %a to <4 x i16>
1590  %1 = trunc <4 x i64> %b to <4 x i16>
1591  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1592  ret <8 x i16> %2
1593}
1594
1595define <4 x i32> @trunc2x2i64_4i32(<2 x i64> %a, <2 x i64> %b) {
1596; SSE-LABEL: trunc2x2i64_4i32:
1597; SSE:       # BB#0: # %entry
1598; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
1599; SSE-NEXT:    retq
1600;
1601; AVX-LABEL: trunc2x2i64_4i32:
1602; AVX:       # BB#0: # %entry
1603; AVX-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
1604; AVX-NEXT:    retq
1605;
1606; AVX512-LABEL: trunc2x2i64_4i32:
1607; AVX512:       # BB#0: # %entry
1608; AVX512-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
1609; AVX512-NEXT:    retq
1610entry:
1611  %0 = trunc <2 x i64> %a to <2 x i32>
1612  %1 = trunc <2 x i64> %b to <2 x i32>
1613  %2 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
1614  ret <4 x i32> %2
1615}
1616
1617define i64 @trunc2i64_i64(<2 x i64> %inval) {
1618; SSE-LABEL: trunc2i64_i64:
1619; SSE:       # BB#0: # %entry
1620; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1621; SSE-NEXT:    movq %xmm0, %rax
1622; SSE-NEXT:    retq
1623;
1624; AVX-LABEL: trunc2i64_i64:
1625; AVX:       # BB#0: # %entry
1626; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1627; AVX-NEXT:    vmovq %xmm0, %rax
1628; AVX-NEXT:    retq
1629;
1630; AVX512F-LABEL: trunc2i64_i64:
1631; AVX512F:       # BB#0: # %entry
1632; AVX512F-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1633; AVX512F-NEXT:    vmovq %xmm0, %rax
1634; AVX512F-NEXT:    retq
1635;
1636; AVX512VL-LABEL: trunc2i64_i64:
1637; AVX512VL:       # BB#0: # %entry
1638; AVX512VL-NEXT:    vpmovqd %xmm0, -{{[0-9]+}}(%rsp)
1639; AVX512VL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1640; AVX512VL-NEXT:    retq
1641;
1642; AVX512BW-LABEL: trunc2i64_i64:
1643; AVX512BW:       # BB#0: # %entry
1644; AVX512BW-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1645; AVX512BW-NEXT:    vmovq %xmm0, %rax
1646; AVX512BW-NEXT:    retq
1647;
1648; AVX512BWVL-LABEL: trunc2i64_i64:
1649; AVX512BWVL:       # BB#0: # %entry
1650; AVX512BWVL-NEXT:    vpmovqd %xmm0, -{{[0-9]+}}(%rsp)
1651; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1652; AVX512BWVL-NEXT:    retq
1653entry:
1654  %0 = trunc <2 x i64> %inval to <2 x i32>
1655  %1 = bitcast <2 x i32> %0 to i64
1656  ret i64 %1
1657}
1658
1659define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) {
1660; SSE2-LABEL: trunc2x4i32_8i16:
1661; SSE2:       # BB#0: # %entry
1662; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1663; SSE2-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1664; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1665; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1666; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1667; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1668; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1669; SSE2-NEXT:    retq
1670;
1671; SSSE3-LABEL: trunc2x4i32_8i16:
1672; SSSE3:       # BB#0: # %entry
1673; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1674; SSSE3-NEXT:    pshufb %xmm2, %xmm1
1675; SSSE3-NEXT:    pshufb %xmm2, %xmm0
1676; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1677; SSSE3-NEXT:    retq
1678;
1679; SSE41-LABEL: trunc2x4i32_8i16:
1680; SSE41:       # BB#0: # %entry
1681; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1682; SSE41-NEXT:    pshufb %xmm2, %xmm1
1683; SSE41-NEXT:    pshufb %xmm2, %xmm0
1684; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1685; SSE41-NEXT:    retq
1686;
1687; AVX-LABEL: trunc2x4i32_8i16:
1688; AVX:       # BB#0: # %entry
1689; AVX-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1690; AVX-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1691; AVX-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1692; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1693; AVX-NEXT:    retq
1694;
1695; AVX512F-LABEL: trunc2x4i32_8i16:
1696; AVX512F:       # BB#0: # %entry
1697; AVX512F-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1698; AVX512F-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1699; AVX512F-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1700; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1701; AVX512F-NEXT:    retq
1702;
1703; AVX512VL-LABEL: trunc2x4i32_8i16:
1704; AVX512VL:       # BB#0: # %entry
1705; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1706; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1707; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1708; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1709; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1710; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1711; AVX512VL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1712; AVX512VL-NEXT:    retq
1713;
1714; AVX512BW-LABEL: trunc2x4i32_8i16:
1715; AVX512BW:       # BB#0: # %entry
1716; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1717; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1718; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1719; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1720; AVX512BW-NEXT:    retq
1721;
1722; AVX512BWVL-LABEL: trunc2x4i32_8i16:
1723; AVX512BWVL:       # BB#0: # %entry
1724; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1725; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1726; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1727; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1728; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1729; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1730; AVX512BWVL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1731; AVX512BWVL-NEXT:    retq
1732entry:
1733  %0 = trunc <4 x i32> %a to <4 x i16>
1734  %1 = trunc <4 x i32> %b to <4 x i16>
1735  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1736  ret <8 x i16> %2
1737}
1738
1739; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
1740define i64 @trunc4i32_i64(<4 x i32> %inval) {
1741; SSE2-LABEL: trunc4i32_i64:
1742; SSE2:       # BB#0: # %entry
1743; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1744; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1745; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1746; SSE2-NEXT:    movq %xmm0, %rax
1747; SSE2-NEXT:    retq
1748;
1749; SSSE3-LABEL: trunc4i32_i64:
1750; SSSE3:       # BB#0: # %entry
1751; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1752; SSSE3-NEXT:    movq %xmm0, %rax
1753; SSSE3-NEXT:    retq
1754;
1755; SSE41-LABEL: trunc4i32_i64:
1756; SSE41:       # BB#0: # %entry
1757; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1758; SSE41-NEXT:    movq %xmm0, %rax
1759; SSE41-NEXT:    retq
1760;
1761; AVX-LABEL: trunc4i32_i64:
1762; AVX:       # BB#0: # %entry
1763; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1764; AVX-NEXT:    vmovq %xmm0, %rax
1765; AVX-NEXT:    retq
1766;
1767; AVX512F-LABEL: trunc4i32_i64:
1768; AVX512F:       # BB#0: # %entry
1769; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1770; AVX512F-NEXT:    vmovq %xmm0, %rax
1771; AVX512F-NEXT:    retq
1772;
1773; AVX512VL-LABEL: trunc4i32_i64:
1774; AVX512VL:       # BB#0: # %entry
1775; AVX512VL-NEXT:    vpmovdw %xmm0, -{{[0-9]+}}(%rsp)
1776; AVX512VL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1777; AVX512VL-NEXT:    retq
1778;
1779; AVX512BW-LABEL: trunc4i32_i64:
1780; AVX512BW:       # BB#0: # %entry
1781; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1782; AVX512BW-NEXT:    vmovq %xmm0, %rax
1783; AVX512BW-NEXT:    retq
1784;
1785; AVX512BWVL-LABEL: trunc4i32_i64:
1786; AVX512BWVL:       # BB#0: # %entry
1787; AVX512BWVL-NEXT:    vpmovdw %xmm0, -{{[0-9]+}}(%rsp)
1788; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1789; AVX512BWVL-NEXT:    retq
1790entry:
1791  %0 = trunc <4 x i32> %inval to <4 x i16>
1792  %1 = bitcast <4 x i16> %0 to i64
1793  ret i64 %1
1794}
1795
1796define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) {
1797; SSE2-LABEL: trunc2x8i16_16i8:
1798; SSE2:       # BB#0: # %entry
1799; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1800; SSE2-NEXT:    pand %xmm2, %xmm1
1801; SSE2-NEXT:    pand %xmm2, %xmm0
1802; SSE2-NEXT:    packuswb %xmm1, %xmm0
1803; SSE2-NEXT:    retq
1804;
1805; SSSE3-LABEL: trunc2x8i16_16i8:
1806; SSSE3:       # BB#0: # %entry
1807; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1808; SSSE3-NEXT:    pshufb %xmm2, %xmm1
1809; SSSE3-NEXT:    pshufb %xmm2, %xmm0
1810; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1811; SSSE3-NEXT:    retq
1812;
1813; SSE41-LABEL: trunc2x8i16_16i8:
1814; SSE41:       # BB#0: # %entry
1815; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1816; SSE41-NEXT:    pshufb %xmm2, %xmm1
1817; SSE41-NEXT:    pshufb %xmm2, %xmm0
1818; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1819; SSE41-NEXT:    retq
1820;
1821; AVX-LABEL: trunc2x8i16_16i8:
1822; AVX:       # BB#0: # %entry
1823; AVX-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1824; AVX-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1825; AVX-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1826; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1827; AVX-NEXT:    retq
1828;
1829; AVX512-LABEL: trunc2x8i16_16i8:
1830; AVX512:       # BB#0: # %entry
1831; AVX512-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1832; AVX512-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1833; AVX512-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1834; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1835; AVX512-NEXT:    retq
1836entry:
1837  %0 = trunc <8 x i16> %a to <8 x i8>
1838  %1 = trunc <8 x i16> %b to <8 x i8>
1839  %2 = shufflevector <8 x i8> %0, <8 x i8> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
1840  ret <16 x i8> %2
1841}
1842
1843; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
1844define i64 @trunc8i16_i64(<8 x i16> %inval) {
1845; SSE2-LABEL: trunc8i16_i64:
1846; SSE2:       # BB#0: # %entry
1847; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
1848; SSE2-NEXT:    packuswb %xmm0, %xmm0
1849; SSE2-NEXT:    movq %xmm0, %rax
1850; SSE2-NEXT:    retq
1851;
1852; SSSE3-LABEL: trunc8i16_i64:
1853; SSSE3:       # BB#0: # %entry
1854; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1855; SSSE3-NEXT:    movq %xmm0, %rax
1856; SSSE3-NEXT:    retq
1857;
1858; SSE41-LABEL: trunc8i16_i64:
1859; SSE41:       # BB#0: # %entry
1860; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1861; SSE41-NEXT:    movq %xmm0, %rax
1862; SSE41-NEXT:    retq
1863;
1864; AVX-LABEL: trunc8i16_i64:
1865; AVX:       # BB#0: # %entry
1866; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1867; AVX-NEXT:    vmovq %xmm0, %rax
1868; AVX-NEXT:    retq
1869;
1870; AVX512F-LABEL: trunc8i16_i64:
1871; AVX512F:       # BB#0: # %entry
1872; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1873; AVX512F-NEXT:    vmovq %xmm0, %rax
1874; AVX512F-NEXT:    retq
1875;
1876; AVX512VL-LABEL: trunc8i16_i64:
1877; AVX512VL:       # BB#0: # %entry
1878; AVX512VL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1879; AVX512VL-NEXT:    vmovq %xmm0, %rax
1880; AVX512VL-NEXT:    retq
1881;
1882; AVX512BW-LABEL: trunc8i16_i64:
1883; AVX512BW:       # BB#0: # %entry
1884; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1885; AVX512BW-NEXT:    vmovq %xmm0, %rax
1886; AVX512BW-NEXT:    retq
1887;
1888; AVX512BWVL-LABEL: trunc8i16_i64:
1889; AVX512BWVL:       # BB#0: # %entry
1890; AVX512BWVL-NEXT:    vpmovwb %xmm0, -{{[0-9]+}}(%rsp)
1891; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1892; AVX512BWVL-NEXT:    retq
1893entry:
1894  %0 = trunc <8 x i16> %inval to <8 x i8>
1895  %1 = bitcast <8 x i8> %0 to i64
1896  ret i64 %1
1897}
1898
1899define <16 x i8> @trunc16i64_16i8_const() {
1900; SSE-LABEL: trunc16i64_16i8_const:
1901; SSE:       # BB#0: # %entry
1902; SSE-NEXT:    xorps %xmm0, %xmm0
1903; SSE-NEXT:    retq
1904;
1905; AVX-LABEL: trunc16i64_16i8_const:
1906; AVX:       # BB#0: # %entry
1907; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1908; AVX-NEXT:    retq
1909;
1910; AVX512F-LABEL: trunc16i64_16i8_const:
1911; AVX512F:       # BB#0: # %entry
1912; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1913; AVX512F-NEXT:    retq
1914;
1915; AVX512VL-LABEL: trunc16i64_16i8_const:
1916; AVX512VL:       # BB#0: # %entry
1917; AVX512VL-NEXT:    vpxor %xmm0, %xmm0, %xmm0
1918; AVX512VL-NEXT:    retq
1919;
1920; AVX512BW-LABEL: trunc16i64_16i8_const:
1921; AVX512BW:       # BB#0: # %entry
1922; AVX512BW-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1923; AVX512BW-NEXT:    retq
1924;
1925; AVX512BWVL-LABEL: trunc16i64_16i8_const:
1926; AVX512BWVL:       # BB#0: # %entry
1927; AVX512BWVL-NEXT:    vpxor %xmm0, %xmm0, %xmm0
1928; AVX512BWVL-NEXT:    retq
1929
1930entry:
1931  %0 = trunc <16 x i64> zeroinitializer to <16 x i8>
1932  %1 = shufflevector <16 x i8> %0, <16 x i8> %0, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 undef, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26>
1933  ret <16 x i8> %1
1934}
1935
1936