1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512VL
9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BW
10; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BWVL
11
12define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) {
13; SSE2-LABEL: trunc8i64_8i32:
14; SSE2:       # BB#0: # %entry
15; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
16; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
17; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
18; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
19; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
20; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]
21; SSE2-NEXT:    retq
22;
23; SSSE3-LABEL: trunc8i64_8i32:
24; SSSE3:       # BB#0: # %entry
25; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
26; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
27; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
28; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
29; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
30; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]
31; SSSE3-NEXT:    retq
32;
33; SSE41-LABEL: trunc8i64_8i32:
34; SSE41:       # BB#0: # %entry
35; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
36; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
37; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
38; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,1,0,2]
39; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
40; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm3[4,5,6,7]
41; SSE41-NEXT:    retq
42;
43; AVX1-LABEL: trunc8i64_8i32:
44; AVX1:       # BB#0: # %entry
45; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
46; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
47; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
48; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7]
49; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
50; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
51; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
52; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
53; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
54; AVX1-NEXT:    retq
55;
56; AVX2-LABEL: trunc8i64_8i32:
57; AVX2:       # BB#0: # %entry
58; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
59; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
60; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
61; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
62; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
63; AVX2-NEXT:    retq
64;
65; AVX512-LABEL: trunc8i64_8i32:
66; AVX512:       # BB#0: # %entry
67; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
68; AVX512-NEXT:    retq
69entry:
70  %0 = trunc <8 x i64> %a to <8 x i32>
71  ret <8 x i32> %0
72}
73
74define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) {
75; SSE2-LABEL: trunc8i64_8i16:
76; SSE2:       # BB#0: # %entry
77; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
78; SSE2-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
79; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
80; SSE2-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
81; SSE2-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
82; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
83; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
84; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
85; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
86; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
87; SSE2-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
88; SSE2-NEXT:    movapd %xmm2, %xmm0
89; SSE2-NEXT:    retq
90;
91; SSSE3-LABEL: trunc8i64_8i16:
92; SSSE3:       # BB#0: # %entry
93; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
94; SSSE3-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
95; SSSE3-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
96; SSSE3-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
97; SSSE3-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
98; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
99; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
100; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
101; SSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
102; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
103; SSSE3-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
104; SSSE3-NEXT:    movapd %xmm2, %xmm0
105; SSSE3-NEXT:    retq
106;
107; SSE41-LABEL: trunc8i64_8i16:
108; SSE41:       # BB#0: # %entry
109; SSE41-NEXT:    pxor %xmm4, %xmm4
110; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
111; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7]
112; SSE41-NEXT:    packusdw %xmm3, %xmm2
113; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7]
114; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7]
115; SSE41-NEXT:    packusdw %xmm1, %xmm0
116; SSE41-NEXT:    packusdw %xmm2, %xmm0
117; SSE41-NEXT:    retq
118;
119; AVX1-LABEL: trunc8i64_8i16:
120; AVX1:       # BB#0: # %entry
121; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
122; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
123; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
124; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7]
125; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
126; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
127; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
128; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7]
129; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
130; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
131; AVX1-NEXT:    vzeroupper
132; AVX1-NEXT:    retq
133;
134; AVX2-LABEL: trunc8i64_8i16:
135; AVX2:       # BB#0: # %entry
136; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
137; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
138; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
139; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
140; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
141; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
142; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
143; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
144; AVX2-NEXT:    vzeroupper
145; AVX2-NEXT:    retq
146;
147; AVX512-LABEL: trunc8i64_8i16:
148; AVX512:       # BB#0: # %entry
149; AVX512-NEXT:    vpmovqw %zmm0, %xmm0
150; AVX512-NEXT:    retq
151entry:
152  %0 = trunc <8 x i64> %a to <8 x i16>
153  ret <8 x i16> %0
154}
155
156define void @trunc8i64_8i8(<8 x i64> %a) {
157; SSE-LABEL: trunc8i64_8i8:
158; SSE:       # BB#0: # %entry
159; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
160; SSE-NEXT:    pand %xmm4, %xmm3
161; SSE-NEXT:    pand %xmm4, %xmm2
162; SSE-NEXT:    packuswb %xmm3, %xmm2
163; SSE-NEXT:    pand %xmm4, %xmm1
164; SSE-NEXT:    pand %xmm4, %xmm0
165; SSE-NEXT:    packuswb %xmm1, %xmm0
166; SSE-NEXT:    packuswb %xmm2, %xmm0
167; SSE-NEXT:    packuswb %xmm0, %xmm0
168; SSE-NEXT:    movq %xmm0, (%rax)
169; SSE-NEXT:    retq
170;
171; AVX1-LABEL: trunc8i64_8i8:
172; AVX1:       # BB#0: # %entry
173; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
174; AVX1-NEXT:    vmovaps {{.*#+}} xmm3 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
175; AVX1-NEXT:    vandps %xmm3, %xmm2, %xmm2
176; AVX1-NEXT:    vandps %xmm3, %xmm1, %xmm1
177; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
178; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
179; AVX1-NEXT:    vandps %xmm3, %xmm2, %xmm2
180; AVX1-NEXT:    vandps %xmm3, %xmm0, %xmm0
181; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
182; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
183; AVX1-NEXT:    vpackuswb %xmm0, %xmm0, %xmm0
184; AVX1-NEXT:    vmovq %xmm0, (%rax)
185; AVX1-NEXT:    vzeroupper
186; AVX1-NEXT:    retq
187;
188; AVX2-LABEL: trunc8i64_8i8:
189; AVX2:       # BB#0: # %entry
190; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
191; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
192; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
193; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
194; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
195; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
196; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
197; AVX2-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
198; AVX2-NEXT:    vmovq %xmm0, (%rax)
199; AVX2-NEXT:    vzeroupper
200; AVX2-NEXT:    retq
201;
202; AVX512-LABEL: trunc8i64_8i8:
203; AVX512:       # BB#0: # %entry
204; AVX512-NEXT:    vpmovqb %zmm0, (%rax)
205; AVX512-NEXT:    retq
206entry:
207  %0 = trunc <8 x i64> %a to <8 x i8>
208  store <8 x i8> %0, <8 x i8>* undef, align 4
209  ret void
210}
211
212define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) {
213; SSE2-LABEL: trunc8i32_8i16:
214; SSE2:       # BB#0: # %entry
215; SSE2-NEXT:    pslld $16, %xmm1
216; SSE2-NEXT:    psrad $16, %xmm1
217; SSE2-NEXT:    pslld $16, %xmm0
218; SSE2-NEXT:    psrad $16, %xmm0
219; SSE2-NEXT:    packssdw %xmm1, %xmm0
220; SSE2-NEXT:    retq
221;
222; SSSE3-LABEL: trunc8i32_8i16:
223; SSSE3:       # BB#0: # %entry
224; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
225; SSSE3-NEXT:    pshufb %xmm2, %xmm1
226; SSSE3-NEXT:    pshufb %xmm2, %xmm0
227; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
228; SSSE3-NEXT:    retq
229;
230; SSE41-LABEL: trunc8i32_8i16:
231; SSE41:       # BB#0: # %entry
232; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
233; SSE41-NEXT:    pshufb %xmm2, %xmm1
234; SSE41-NEXT:    pshufb %xmm2, %xmm0
235; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
236; SSE41-NEXT:    retq
237;
238; AVX1-LABEL: trunc8i32_8i16:
239; AVX1:       # BB#0: # %entry
240; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
241; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
242; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
243; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
244; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
245; AVX1-NEXT:    vzeroupper
246; AVX1-NEXT:    retq
247;
248; AVX2-LABEL: trunc8i32_8i16:
249; AVX2:       # BB#0: # %entry
250; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
251; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
252; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
253; AVX2-NEXT:    vzeroupper
254; AVX2-NEXT:    retq
255;
256; AVX512F-LABEL: trunc8i32_8i16:
257; AVX512F:       # BB#0: # %entry
258; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
259; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
260; AVX512F-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
261; AVX512F-NEXT:    retq
262;
263; AVX512VL-LABEL: trunc8i32_8i16:
264; AVX512VL:       # BB#0: # %entry
265; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
266; AVX512VL-NEXT:    retq
267;
268; AVX512BW-LABEL: trunc8i32_8i16:
269; AVX512BW:       # BB#0: # %entry
270; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
271; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
272; AVX512BW-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
273; AVX512BW-NEXT:    retq
274;
275; AVX512BWVL-LABEL: trunc8i32_8i16:
276; AVX512BWVL:       # BB#0: # %entry
277; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
278; AVX512BWVL-NEXT:    retq
279entry:
280  %0 = trunc <8 x i32> %a to <8 x i16>
281  ret <8 x i16> %0
282}
283
284define void @trunc8i32_8i8(<8 x i32> %a) {
285; SSE2-LABEL: trunc8i32_8i8:
286; SSE2:       # BB#0: # %entry
287; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
288; SSE2-NEXT:    pand %xmm2, %xmm1
289; SSE2-NEXT:    pand %xmm2, %xmm0
290; SSE2-NEXT:    packuswb %xmm1, %xmm0
291; SSE2-NEXT:    packuswb %xmm0, %xmm0
292; SSE2-NEXT:    movq %xmm0, (%rax)
293; SSE2-NEXT:    retq
294;
295; SSSE3-LABEL: trunc8i32_8i8:
296; SSSE3:       # BB#0: # %entry
297; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
298; SSSE3-NEXT:    pshufb %xmm2, %xmm1
299; SSSE3-NEXT:    pshufb %xmm2, %xmm0
300; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
301; SSSE3-NEXT:    movq %xmm0, (%rax)
302; SSSE3-NEXT:    retq
303;
304; SSE41-LABEL: trunc8i32_8i8:
305; SSE41:       # BB#0: # %entry
306; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
307; SSE41-NEXT:    pshufb %xmm2, %xmm1
308; SSE41-NEXT:    pshufb %xmm2, %xmm0
309; SSE41-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
310; SSE41-NEXT:    movq %xmm0, (%rax)
311; SSE41-NEXT:    retq
312;
313; AVX1-LABEL: trunc8i32_8i8:
314; AVX1:       # BB#0: # %entry
315; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
316; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
317; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
318; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
319; AVX1-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
320; AVX1-NEXT:    vmovq %xmm0, (%rax)
321; AVX1-NEXT:    vzeroupper
322; AVX1-NEXT:    retq
323;
324; AVX2-LABEL: trunc8i32_8i8:
325; AVX2:       # BB#0: # %entry
326; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
327; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
328; AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
329; AVX2-NEXT:    vmovq %xmm0, (%rax)
330; AVX2-NEXT:    vzeroupper
331; AVX2-NEXT:    retq
332;
333; AVX512F-LABEL: trunc8i32_8i8:
334; AVX512F:       # BB#0: # %entry
335; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
336; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
337; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
338; AVX512F-NEXT:    vmovq %xmm0, (%rax)
339; AVX512F-NEXT:    retq
340;
341; AVX512VL-LABEL: trunc8i32_8i8:
342; AVX512VL:       # BB#0: # %entry
343; AVX512VL-NEXT:    vpmovdb %ymm0, (%rax)
344; AVX512VL-NEXT:    retq
345;
346; AVX512BW-LABEL: trunc8i32_8i8:
347; AVX512BW:       # BB#0: # %entry
348; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
349; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
350; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
351; AVX512BW-NEXT:    vmovq %xmm0, (%rax)
352; AVX512BW-NEXT:    retq
353;
354; AVX512BWVL-LABEL: trunc8i32_8i8:
355; AVX512BWVL:       # BB#0: # %entry
356; AVX512BWVL-NEXT:    vpmovdb %ymm0, (%rax)
357; AVX512BWVL-NEXT:    retq
358entry:
359  %0 = trunc <8 x i32> %a to <8 x i8>
360  store <8 x i8> %0, <8 x i8>* undef, align 4
361  ret void
362}
363
364define void @trunc16i32_16i16(<16 x i32> %a) {
365; SSE2-LABEL: trunc16i32_16i16:
366; SSE2:       # BB#0: # %entry
367; SSE2-NEXT:    pslld $16, %xmm1
368; SSE2-NEXT:    psrad $16, %xmm1
369; SSE2-NEXT:    pslld $16, %xmm0
370; SSE2-NEXT:    psrad $16, %xmm0
371; SSE2-NEXT:    packssdw %xmm1, %xmm0
372; SSE2-NEXT:    pslld $16, %xmm3
373; SSE2-NEXT:    psrad $16, %xmm3
374; SSE2-NEXT:    pslld $16, %xmm2
375; SSE2-NEXT:    psrad $16, %xmm2
376; SSE2-NEXT:    packssdw %xmm3, %xmm2
377; SSE2-NEXT:    movdqu %xmm2, (%rax)
378; SSE2-NEXT:    movdqu %xmm0, (%rax)
379; SSE2-NEXT:    retq
380;
381; SSSE3-LABEL: trunc16i32_16i16:
382; SSSE3:       # BB#0: # %entry
383; SSSE3-NEXT:    pslld $16, %xmm1
384; SSSE3-NEXT:    psrad $16, %xmm1
385; SSSE3-NEXT:    pslld $16, %xmm0
386; SSSE3-NEXT:    psrad $16, %xmm0
387; SSSE3-NEXT:    packssdw %xmm1, %xmm0
388; SSSE3-NEXT:    pslld $16, %xmm3
389; SSSE3-NEXT:    psrad $16, %xmm3
390; SSSE3-NEXT:    pslld $16, %xmm2
391; SSSE3-NEXT:    psrad $16, %xmm2
392; SSSE3-NEXT:    packssdw %xmm3, %xmm2
393; SSSE3-NEXT:    movdqu %xmm2, (%rax)
394; SSSE3-NEXT:    movdqu %xmm0, (%rax)
395; SSSE3-NEXT:    retq
396;
397; SSE41-LABEL: trunc16i32_16i16:
398; SSE41:       # BB#0: # %entry
399; SSE41-NEXT:    pxor %xmm4, %xmm4
400; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7]
401; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7]
402; SSE41-NEXT:    packusdw %xmm1, %xmm0
403; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7]
404; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7]
405; SSE41-NEXT:    packusdw %xmm3, %xmm2
406; SSE41-NEXT:    movdqu %xmm2, (%rax)
407; SSE41-NEXT:    movdqu %xmm0, (%rax)
408; SSE41-NEXT:    retq
409;
410; AVX1-LABEL: trunc16i32_16i16:
411; AVX1:       # BB#0: # %entry
412; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
413; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
414; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3],xmm2[4],xmm3[5],xmm2[6],xmm3[7]
415; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1],xmm1[2],xmm3[3],xmm1[4],xmm3[5],xmm1[6],xmm3[7]
416; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
417; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
418; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3],xmm2[4],xmm3[5],xmm2[6],xmm3[7]
419; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1],xmm0[2],xmm3[3],xmm0[4],xmm3[5],xmm0[6],xmm3[7]
420; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
421; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
422; AVX1-NEXT:    vmovups %ymm0, (%rax)
423; AVX1-NEXT:    vzeroupper
424; AVX1-NEXT:    retq
425;
426; AVX2-LABEL: trunc16i32_16i16:
427; AVX2:       # BB#0: # %entry
428; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128]
429; AVX2-NEXT:    vpshufb %ymm2, %ymm0, %ymm0
430; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
431; AVX2-NEXT:    vpshufb %ymm2, %ymm1, %ymm1
432; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
433; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
434; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
435; AVX2-NEXT:    vzeroupper
436; AVX2-NEXT:    retq
437;
438; AVX512-LABEL: trunc16i32_16i16:
439; AVX512:       # BB#0: # %entry
440; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
441; AVX512-NEXT:    retq
442entry:
443  %0 = trunc <16 x i32> %a to <16 x i16>
444  store <16 x i16> %0, <16 x i16>* undef, align 4
445  ret void
446}
447
448define void @trunc16i32_16i8(<16 x i32> %a) {
449; SSE-LABEL: trunc16i32_16i8:
450; SSE:       # BB#0: # %entry
451; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
452; SSE-NEXT:    pand %xmm4, %xmm3
453; SSE-NEXT:    pand %xmm4, %xmm2
454; SSE-NEXT:    packuswb %xmm3, %xmm2
455; SSE-NEXT:    pand %xmm4, %xmm1
456; SSE-NEXT:    pand %xmm4, %xmm0
457; SSE-NEXT:    packuswb %xmm1, %xmm0
458; SSE-NEXT:    packuswb %xmm2, %xmm0
459; SSE-NEXT:    movdqu %xmm0, (%rax)
460; SSE-NEXT:    retq
461;
462; AVX1-LABEL: trunc16i32_16i8:
463; AVX1:       # BB#0: # %entry
464; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
465; AVX1-NEXT:    vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
466; AVX1-NEXT:    vandps %xmm3, %xmm2, %xmm2
467; AVX1-NEXT:    vandps %xmm3, %xmm1, %xmm1
468; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
469; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
470; AVX1-NEXT:    vandps %xmm3, %xmm2, %xmm2
471; AVX1-NEXT:    vandps %xmm3, %xmm0, %xmm0
472; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
473; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
474; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
475; AVX1-NEXT:    vzeroupper
476; AVX1-NEXT:    retq
477;
478; AVX2-LABEL: trunc16i32_16i8:
479; AVX2:       # BB#0: # %entry
480; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128]
481; AVX2-NEXT:    vpshufb %ymm2, %ymm1, %ymm1
482; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
483; AVX2-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
484; AVX2-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
485; AVX2-NEXT:    vpshufb %ymm2, %ymm0, %ymm0
486; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
487; AVX2-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
488; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
489; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
490; AVX2-NEXT:    vzeroupper
491; AVX2-NEXT:    retq
492;
493; AVX512-LABEL: trunc16i32_16i8:
494; AVX512:       # BB#0: # %entry
495; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
496; AVX512-NEXT:    retq
497entry:
498  %0 = trunc <16 x i32> %a to <16 x i8>
499  store <16 x i8> %0, <16 x i8>* undef, align 4
500  ret void
501}
502
503;PR25684
504define void @trunc16i16_16i8(<16 x i16> %a) {
505; SSE2-LABEL: trunc16i16_16i8:
506; SSE2:       # BB#0: # %entry
507; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
508; SSE2-NEXT:    pand %xmm2, %xmm1
509; SSE2-NEXT:    pand %xmm2, %xmm0
510; SSE2-NEXT:    packuswb %xmm1, %xmm0
511; SSE2-NEXT:    movdqu %xmm0, (%rax)
512; SSE2-NEXT:    retq
513;
514; SSSE3-LABEL: trunc16i16_16i8:
515; SSSE3:       # BB#0: # %entry
516; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
517; SSSE3-NEXT:    pshufb %xmm2, %xmm1
518; SSSE3-NEXT:    pshufb %xmm2, %xmm0
519; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
520; SSSE3-NEXT:    movdqu %xmm0, (%rax)
521; SSSE3-NEXT:    retq
522;
523; SSE41-LABEL: trunc16i16_16i8:
524; SSE41:       # BB#0: # %entry
525; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
526; SSE41-NEXT:    pshufb %xmm2, %xmm1
527; SSE41-NEXT:    pshufb %xmm2, %xmm0
528; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
529; SSE41-NEXT:    movdqu %xmm0, (%rax)
530; SSE41-NEXT:    retq
531;
532; AVX1-LABEL: trunc16i16_16i8:
533; AVX1:       # BB#0: # %entry
534; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
535; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
536; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
537; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
538; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
539; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
540; AVX1-NEXT:    vzeroupper
541; AVX1-NEXT:    retq
542;
543; AVX2-LABEL: trunc16i16_16i8:
544; AVX2:       # BB#0: # %entry
545; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
546; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
547; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
548; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
549; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
550; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
551; AVX2-NEXT:    vzeroupper
552; AVX2-NEXT:    retq
553;
554; AVX512F-LABEL: trunc16i16_16i8:
555; AVX512F:       # BB#0: # %entry
556; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
557; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
558; AVX512F-NEXT:    vmovdqu %xmm0, (%rax)
559; AVX512F-NEXT:    retq
560;
561; AVX512VL-LABEL: trunc16i16_16i8:
562; AVX512VL:       # BB#0: # %entry
563; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
564; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
565; AVX512VL-NEXT:    vmovdqu32 %xmm0, (%rax)
566; AVX512VL-NEXT:    retq
567;
568; AVX512BW-LABEL: trunc16i16_16i8:
569; AVX512BW:       # BB#0: # %entry
570; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
571; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
572; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
573; AVX512BW-NEXT:    retq
574;
575; AVX512BWVL-LABEL: trunc16i16_16i8:
576; AVX512BWVL:       # BB#0: # %entry
577; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
578; AVX512BWVL-NEXT:    retq
579entry:
580  %0 = trunc <16 x i16> %a to <16 x i8>
581  store <16 x i8> %0, <16 x i8>* undef, align 4
582  ret void
583}
584
585define void @trunc32i16_32i8(<32 x i16> %a) {
586; SSE2-LABEL: trunc32i16_32i8:
587; SSE2:       # BB#0: # %entry
588; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
589; SSE2-NEXT:    pand %xmm4, %xmm1
590; SSE2-NEXT:    pand %xmm4, %xmm0
591; SSE2-NEXT:    packuswb %xmm1, %xmm0
592; SSE2-NEXT:    pand %xmm4, %xmm3
593; SSE2-NEXT:    pand %xmm4, %xmm2
594; SSE2-NEXT:    packuswb %xmm3, %xmm2
595; SSE2-NEXT:    movdqu %xmm2, (%rax)
596; SSE2-NEXT:    movdqu %xmm0, (%rax)
597; SSE2-NEXT:    retq
598;
599; SSSE3-LABEL: trunc32i16_32i8:
600; SSSE3:       # BB#0: # %entry
601; SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
602; SSSE3-NEXT:    pshufb %xmm4, %xmm1
603; SSSE3-NEXT:    pshufb %xmm4, %xmm0
604; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
605; SSSE3-NEXT:    pshufb %xmm4, %xmm3
606; SSSE3-NEXT:    pshufb %xmm4, %xmm2
607; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
608; SSSE3-NEXT:    movdqu %xmm2, (%rax)
609; SSSE3-NEXT:    movdqu %xmm0, (%rax)
610; SSSE3-NEXT:    retq
611;
612; SSE41-LABEL: trunc32i16_32i8:
613; SSE41:       # BB#0: # %entry
614; SSE41-NEXT:    movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
615; SSE41-NEXT:    pshufb %xmm4, %xmm1
616; SSE41-NEXT:    pshufb %xmm4, %xmm0
617; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
618; SSE41-NEXT:    pshufb %xmm4, %xmm3
619; SSE41-NEXT:    pshufb %xmm4, %xmm2
620; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
621; SSE41-NEXT:    movdqu %xmm2, (%rax)
622; SSE41-NEXT:    movdqu %xmm0, (%rax)
623; SSE41-NEXT:    retq
624;
625; AVX1-LABEL: trunc32i16_32i8:
626; AVX1:       # BB#0: # %entry
627; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
628; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
629; AVX1-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
630; AVX1-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
631; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
632; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
633; AVX1-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
634; AVX1-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
635; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
636; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
637; AVX1-NEXT:    vmovups %ymm0, (%rax)
638; AVX1-NEXT:    vzeroupper
639; AVX1-NEXT:    retq
640;
641; AVX2-LABEL: trunc32i16_32i8:
642; AVX2:       # BB#0: # %entry
643; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
644; AVX2-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
645; AVX2-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
646; AVX2-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
647; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
648; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm2
649; AVX2-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
650; AVX2-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
651; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
652; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
653; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
654; AVX2-NEXT:    vzeroupper
655; AVX2-NEXT:    retq
656;
657; AVX512F-LABEL: trunc32i16_32i8:
658; AVX512F:       # BB#0: # %entry
659; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
660; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
661; AVX512F-NEXT:    vpmovsxwd %ymm1, %zmm1
662; AVX512F-NEXT:    vpmovdb %zmm1, %xmm1
663; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
664; AVX512F-NEXT:    vmovdqu %ymm0, (%rax)
665; AVX512F-NEXT:    retq
666;
667; AVX512VL-LABEL: trunc32i16_32i8:
668; AVX512VL:       # BB#0: # %entry
669; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
670; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
671; AVX512VL-NEXT:    vpmovsxwd %ymm1, %zmm1
672; AVX512VL-NEXT:    vpmovdb %zmm1, %xmm1
673; AVX512VL-NEXT:    vinserti32x4 $1, %xmm1, %ymm0, %ymm0
674; AVX512VL-NEXT:    vmovdqu32 %ymm0, (%rax)
675; AVX512VL-NEXT:    retq
676;
677; AVX512BW-LABEL: trunc32i16_32i8:
678; AVX512BW:       # BB#0: # %entry
679; AVX512BW-NEXT:    vpmovwb %zmm0, (%rax)
680; AVX512BW-NEXT:    retq
681;
682; AVX512BWVL-LABEL: trunc32i16_32i8:
683; AVX512BWVL:       # BB#0: # %entry
684; AVX512BWVL-NEXT:    vpmovwb %zmm0, (%rax)
685; AVX512BWVL-NEXT:    retq
686entry:
687  %0 = trunc <32 x i16> %a to <32 x i8>
688  store <32 x i8> %0, <32 x i8>* undef, align 4
689  ret void
690}
691
692define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) {
693; SSE2-LABEL: trunc2x4i64_8i32:
694; SSE2:       # BB#0: # %entry
695; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
696; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
697; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
698; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
699; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
700; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]
701; SSE2-NEXT:    retq
702;
703; SSSE3-LABEL: trunc2x4i64_8i32:
704; SSSE3:       # BB#0: # %entry
705; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
706; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
707; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
708; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
709; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
710; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]
711; SSSE3-NEXT:    retq
712;
713; SSE41-LABEL: trunc2x4i64_8i32:
714; SSE41:       # BB#0: # %entry
715; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
716; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
717; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
718; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,1,0,2]
719; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
720; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm3[4,5,6,7]
721; SSE41-NEXT:    retq
722;
723; AVX1-LABEL: trunc2x4i64_8i32:
724; AVX1:       # BB#0: # %entry
725; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
726; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
727; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
728; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
729; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
730; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
731; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
732; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7]
733; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
734; AVX1-NEXT:    retq
735;
736; AVX2-LABEL: trunc2x4i64_8i32:
737; AVX2:       # BB#0: # %entry
738; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
739; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
740; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
741; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
742; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
743; AVX2-NEXT:    retq
744;
745; AVX512F-LABEL: trunc2x4i64_8i32:
746; AVX512F:       # BB#0: # %entry
747; AVX512F-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
748; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
749; AVX512F-NEXT:    vpmovqd %zmm0, %ymm0
750; AVX512F-NEXT:    vpmovqd %zmm1, %ymm1
751; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
752; AVX512F-NEXT:    retq
753;
754; AVX512VL-LABEL: trunc2x4i64_8i32:
755; AVX512VL:       # BB#0: # %entry
756; AVX512VL-NEXT:    vpmovqd %ymm0, %xmm0
757; AVX512VL-NEXT:    vpmovqd %ymm1, %xmm1
758; AVX512VL-NEXT:    vinserti32x4 $1, %xmm1, %ymm0, %ymm0
759; AVX512VL-NEXT:    retq
760;
761; AVX512BW-LABEL: trunc2x4i64_8i32:
762; AVX512BW:       # BB#0: # %entry
763; AVX512BW-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
764; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
765; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
766; AVX512BW-NEXT:    vpmovqd %zmm1, %ymm1
767; AVX512BW-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
768; AVX512BW-NEXT:    retq
769;
770; AVX512BWVL-LABEL: trunc2x4i64_8i32:
771; AVX512BWVL:       # BB#0: # %entry
772; AVX512BWVL-NEXT:    vpmovqd %ymm0, %xmm0
773; AVX512BWVL-NEXT:    vpmovqd %ymm1, %xmm1
774; AVX512BWVL-NEXT:    vinserti32x4 $1, %xmm1, %ymm0, %ymm0
775; AVX512BWVL-NEXT:    retq
776entry:
777  %0 = trunc <4 x i64> %a to <4 x i32>
778  %1 = trunc <4 x i64> %b to <4 x i32>
779  %2 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
780  ret <8 x i32> %2
781}
782
783define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) {
784; SSE2-LABEL: trunc2x4i64_8i16:
785; SSE2:       # BB#0: # %entry
786; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
787; SSE2-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
788; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
789; SSE2-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
790; SSE2-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
791; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
792; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
793; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
794; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
795; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
796; SSE2-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
797; SSE2-NEXT:    movapd %xmm2, %xmm0
798; SSE2-NEXT:    retq
799;
800; SSSE3-LABEL: trunc2x4i64_8i16:
801; SSSE3:       # BB#0: # %entry
802; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
803; SSSE3-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
804; SSSE3-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
805; SSSE3-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
806; SSSE3-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
807; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
808; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
809; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
810; SSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
811; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
812; SSSE3-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
813; SSSE3-NEXT:    movapd %xmm2, %xmm0
814; SSSE3-NEXT:    retq
815;
816; SSE41-LABEL: trunc2x4i64_8i16:
817; SSE41:       # BB#0: # %entry
818; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
819; SSE41-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
820; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
821; SSE41-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
822; SSE41-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
823; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
824; SSE41-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
825; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
826; SSE41-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
827; SSE41-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
828; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
829; SSE41-NEXT:    retq
830;
831; AVX1-LABEL: trunc2x4i64_8i16:
832; AVX1:       # BB#0: # %entry
833; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
834; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
835; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
836; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
837; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
838; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
839; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
840; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7]
841; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
842; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
843; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
844; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
845; AVX1-NEXT:    vzeroupper
846; AVX1-NEXT:    retq
847;
848; AVX2-LABEL: trunc2x4i64_8i16:
849; AVX2:       # BB#0: # %entry
850; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
851; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
852; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
853; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
854; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
855; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
856; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
857; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
858; AVX2-NEXT:    vzeroupper
859; AVX2-NEXT:    retq
860;
861; AVX512F-LABEL: trunc2x4i64_8i16:
862; AVX512F:       # BB#0: # %entry
863; AVX512F-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
864; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
865; AVX512F-NEXT:    vpmovqd %zmm0, %ymm0
866; AVX512F-NEXT:    vpmovqd %zmm1, %ymm1
867; AVX512F-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
868; AVX512F-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
869; AVX512F-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
870; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
871; AVX512F-NEXT:    retq
872;
873; AVX512VL-LABEL: trunc2x4i64_8i16:
874; AVX512VL:       # BB#0: # %entry
875; AVX512VL-NEXT:    vpmovqd %ymm0, %xmm0
876; AVX512VL-NEXT:    vpmovqd %ymm1, %xmm1
877; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
878; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
879; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
880; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
881; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
882; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
883; AVX512VL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
884; AVX512VL-NEXT:    retq
885;
886; AVX512BW-LABEL: trunc2x4i64_8i16:
887; AVX512BW:       # BB#0: # %entry
888; AVX512BW-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
889; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
890; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
891; AVX512BW-NEXT:    vpmovqd %zmm1, %ymm1
892; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
893; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
894; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
895; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
896; AVX512BW-NEXT:    retq
897;
898; AVX512BWVL-LABEL: trunc2x4i64_8i16:
899; AVX512BWVL:       # BB#0: # %entry
900; AVX512BWVL-NEXT:    vpmovqd %ymm0, %xmm0
901; AVX512BWVL-NEXT:    vpmovqd %ymm1, %xmm1
902; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
903; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
904; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
905; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
906; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
907; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
908; AVX512BWVL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
909; AVX512BWVL-NEXT:    retq
910entry:
911  %0 = trunc <4 x i64> %a to <4 x i16>
912  %1 = trunc <4 x i64> %b to <4 x i16>
913  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
914  ret <8 x i16> %2
915}
916
917define <4 x i32> @trunc2x2i64_4i32(<2 x i64> %a, <2 x i64> %b) {
918; SSE2-LABEL: trunc2x2i64_4i32:
919; SSE2:       # BB#0: # %entry
920; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
921; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
922; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
923; SSE2-NEXT:    retq
924;
925; SSSE3-LABEL: trunc2x2i64_4i32:
926; SSSE3:       # BB#0: # %entry
927; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
928; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
929; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
930; SSSE3-NEXT:    retq
931;
932; SSE41-LABEL: trunc2x2i64_4i32:
933; SSE41:       # BB#0: # %entry
934; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
935; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
936; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
937; SSE41-NEXT:    retq
938;
939; AVX1-LABEL: trunc2x2i64_4i32:
940; AVX1:       # BB#0: # %entry
941; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
942; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
943; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
944; AVX1-NEXT:    retq
945;
946; AVX2-LABEL: trunc2x2i64_4i32:
947; AVX2:       # BB#0: # %entry
948; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
949; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
950; AVX2-NEXT:    vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
951; AVX2-NEXT:    retq
952;
953; AVX512-LABEL: trunc2x2i64_4i32:
954; AVX512:       # BB#0: # %entry
955; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
956; AVX512-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
957; AVX512-NEXT:    vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
958; AVX512-NEXT:    retq
959entry:
960  %0 = trunc <2 x i64> %a to <2 x i32>
961  %1 = trunc <2 x i64> %b to <2 x i32>
962  %2 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
963  ret <4 x i32> %2
964}
965
966define i64 @trunc2i64_i64(<2 x i64> %inval) {
967; SSE-LABEL: trunc2i64_i64:
968; SSE:       # BB#0: # %entry
969; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
970; SSE-NEXT:    movd %xmm0, %rax
971; SSE-NEXT:    retq
972;
973; AVX-LABEL: trunc2i64_i64:
974; AVX:       # BB#0: # %entry
975; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
976; AVX-NEXT:    vmovq %xmm0, %rax
977; AVX-NEXT:    retq
978;
979; AVX512F-LABEL: trunc2i64_i64:
980; AVX512F:       # BB#0: # %entry
981; AVX512F-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
982; AVX512F-NEXT:    vmovq %xmm0, %rax
983; AVX512F-NEXT:    retq
984;
985; AVX512VL-LABEL: trunc2i64_i64:
986; AVX512VL:       # BB#0: # %entry
987; AVX512VL-NEXT:    vpmovqd %xmm0, -{{[0-9]+}}(%rsp)
988; AVX512VL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
989; AVX512VL-NEXT:    retq
990;
991; AVX512BW-LABEL: trunc2i64_i64:
992; AVX512BW:       # BB#0: # %entry
993; AVX512BW-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
994; AVX512BW-NEXT:    vmovq %xmm0, %rax
995; AVX512BW-NEXT:    retq
996;
997; AVX512BWVL-LABEL: trunc2i64_i64:
998; AVX512BWVL:       # BB#0: # %entry
999; AVX512BWVL-NEXT:    vpmovqd %xmm0, -{{[0-9]+}}(%rsp)
1000; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1001; AVX512BWVL-NEXT:    retq
1002entry:
1003  %0 = trunc <2 x i64> %inval to <2 x i32>
1004  %1 = bitcast <2 x i32> %0 to i64
1005  ret i64 %1
1006}
1007
1008define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) {
1009; SSE2-LABEL: trunc2x4i32_8i16:
1010; SSE2:       # BB#0: # %entry
1011; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1012; SSE2-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1013; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1014; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1015; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1016; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1017; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1018; SSE2-NEXT:    retq
1019;
1020; SSSE3-LABEL: trunc2x4i32_8i16:
1021; SSSE3:       # BB#0: # %entry
1022; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1023; SSSE3-NEXT:    pshufb %xmm2, %xmm1
1024; SSSE3-NEXT:    pshufb %xmm2, %xmm0
1025; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1026; SSSE3-NEXT:    retq
1027;
1028; SSE41-LABEL: trunc2x4i32_8i16:
1029; SSE41:       # BB#0: # %entry
1030; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1031; SSE41-NEXT:    pshufb %xmm2, %xmm1
1032; SSE41-NEXT:    pshufb %xmm2, %xmm0
1033; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1034; SSE41-NEXT:    retq
1035;
1036; AVX-LABEL: trunc2x4i32_8i16:
1037; AVX:       # BB#0: # %entry
1038; AVX-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1039; AVX-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1040; AVX-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1041; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1042; AVX-NEXT:    retq
1043;
1044; AVX512F-LABEL: trunc2x4i32_8i16:
1045; AVX512F:       # BB#0: # %entry
1046; AVX512F-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1047; AVX512F-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1048; AVX512F-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1049; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1050; AVX512F-NEXT:    retq
1051;
1052; AVX512VL-LABEL: trunc2x4i32_8i16:
1053; AVX512VL:       # BB#0: # %entry
1054; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1055; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1056; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1057; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1058; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1059; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1060; AVX512VL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1061; AVX512VL-NEXT:    retq
1062;
1063; AVX512BW-LABEL: trunc2x4i32_8i16:
1064; AVX512BW:       # BB#0: # %entry
1065; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1066; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1067; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1068; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1069; AVX512BW-NEXT:    retq
1070;
1071; AVX512BWVL-LABEL: trunc2x4i32_8i16:
1072; AVX512BWVL:       # BB#0: # %entry
1073; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1074; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1075; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1076; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1077; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1078; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1079; AVX512BWVL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1080; AVX512BWVL-NEXT:    retq
1081entry:
1082  %0 = trunc <4 x i32> %a to <4 x i16>
1083  %1 = trunc <4 x i32> %b to <4 x i16>
1084  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1085  ret <8 x i16> %2
1086}
1087
1088; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
1089define i64 @trunc4i32_i64(<4 x i32> %inval) {
1090; SSE2-LABEL: trunc4i32_i64:
1091; SSE2:       # BB#0: # %entry
1092; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1093; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1094; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1095; SSE2-NEXT:    movd %xmm0, %rax
1096; SSE2-NEXT:    retq
1097;
1098; SSSE3-LABEL: trunc4i32_i64:
1099; SSSE3:       # BB#0: # %entry
1100; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1101; SSSE3-NEXT:    movd %xmm0, %rax
1102; SSSE3-NEXT:    retq
1103;
1104; SSE41-LABEL: trunc4i32_i64:
1105; SSE41:       # BB#0: # %entry
1106; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1107; SSE41-NEXT:    movd %xmm0, %rax
1108; SSE41-NEXT:    retq
1109;
1110; AVX-LABEL: trunc4i32_i64:
1111; AVX:       # BB#0: # %entry
1112; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1113; AVX-NEXT:    vmovq %xmm0, %rax
1114; AVX-NEXT:    retq
1115;
1116; AVX512F-LABEL: trunc4i32_i64:
1117; AVX512F:       # BB#0: # %entry
1118; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1119; AVX512F-NEXT:    vmovq %xmm0, %rax
1120; AVX512F-NEXT:    retq
1121;
1122; AVX512VL-LABEL: trunc4i32_i64:
1123; AVX512VL:       # BB#0: # %entry
1124; AVX512VL-NEXT:    vpmovdw %xmm0, -{{[0-9]+}}(%rsp)
1125; AVX512VL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1126; AVX512VL-NEXT:    retq
1127;
1128; AVX512BW-LABEL: trunc4i32_i64:
1129; AVX512BW:       # BB#0: # %entry
1130; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1131; AVX512BW-NEXT:    vmovq %xmm0, %rax
1132; AVX512BW-NEXT:    retq
1133;
1134; AVX512BWVL-LABEL: trunc4i32_i64:
1135; AVX512BWVL:       # BB#0: # %entry
1136; AVX512BWVL-NEXT:    vpmovdw %xmm0, -{{[0-9]+}}(%rsp)
1137; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1138; AVX512BWVL-NEXT:    retq
1139entry:
1140  %0 = trunc <4 x i32> %inval to <4 x i16>
1141  %1 = bitcast <4 x i16> %0 to i64
1142  ret i64 %1
1143}
1144
1145define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) {
1146; SSE2-LABEL: trunc2x8i16_16i8:
1147; SSE2:       # BB#0: # %entry
1148; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1149; SSE2-NEXT:    pand %xmm2, %xmm1
1150; SSE2-NEXT:    pand %xmm2, %xmm0
1151; SSE2-NEXT:    packuswb %xmm1, %xmm0
1152; SSE2-NEXT:    retq
1153;
1154; SSSE3-LABEL: trunc2x8i16_16i8:
1155; SSSE3:       # BB#0: # %entry
1156; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1157; SSSE3-NEXT:    pshufb %xmm2, %xmm1
1158; SSSE3-NEXT:    pshufb %xmm2, %xmm0
1159; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1160; SSSE3-NEXT:    retq
1161;
1162; SSE41-LABEL: trunc2x8i16_16i8:
1163; SSE41:       # BB#0: # %entry
1164; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1165; SSE41-NEXT:    pshufb %xmm2, %xmm1
1166; SSE41-NEXT:    pshufb %xmm2, %xmm0
1167; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1168; SSE41-NEXT:    retq
1169;
1170; AVX-LABEL: trunc2x8i16_16i8:
1171; AVX:       # BB#0: # %entry
1172; AVX-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1173; AVX-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1174; AVX-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1175; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1176; AVX-NEXT:    retq
1177;
1178; AVX512F-LABEL: trunc2x8i16_16i8:
1179; AVX512F:       # BB#0: # %entry
1180; AVX512F-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1181; AVX512F-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1182; AVX512F-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1183; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1184; AVX512F-NEXT:    retq
1185;
1186; AVX512VL-LABEL: trunc2x8i16_16i8:
1187; AVX512VL:       # BB#0: # %entry
1188; AVX512VL-NEXT:    vmovdqa64 {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1189; AVX512VL-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1190; AVX512VL-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1191; AVX512VL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1192; AVX512VL-NEXT:    retq
1193;
1194; AVX512BW-LABEL: trunc2x8i16_16i8:
1195; AVX512BW:       # BB#0: # %entry
1196; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1197; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1198; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1199; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1200; AVX512BW-NEXT:    retq
1201;
1202; AVX512BWVL-LABEL: trunc2x8i16_16i8:
1203; AVX512BWVL:       # BB#0: # %entry
1204; AVX512BWVL-NEXT:    vmovdqu8 {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1205; AVX512BWVL-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1206; AVX512BWVL-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1207; AVX512BWVL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1208; AVX512BWVL-NEXT:    retq
1209entry:
1210  %0 = trunc <8 x i16> %a to <8 x i8>
1211  %1 = trunc <8 x i16> %b to <8 x i8>
1212  %2 = shufflevector <8 x i8> %0, <8 x i8> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
1213  ret <16 x i8> %2
1214}
1215
1216; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
1217define i64 @trunc8i16_i64(<8 x i16> %inval) {
1218; SSE2-LABEL: trunc8i16_i64:
1219; SSE2:       # BB#0: # %entry
1220; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
1221; SSE2-NEXT:    packuswb %xmm0, %xmm0
1222; SSE2-NEXT:    movd %xmm0, %rax
1223; SSE2-NEXT:    retq
1224;
1225; SSSE3-LABEL: trunc8i16_i64:
1226; SSSE3:       # BB#0: # %entry
1227; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1228; SSSE3-NEXT:    movd %xmm0, %rax
1229; SSSE3-NEXT:    retq
1230;
1231; SSE41-LABEL: trunc8i16_i64:
1232; SSE41:       # BB#0: # %entry
1233; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1234; SSE41-NEXT:    movd %xmm0, %rax
1235; SSE41-NEXT:    retq
1236;
1237; AVX-LABEL: trunc8i16_i64:
1238; AVX:       # BB#0: # %entry
1239; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1240; AVX-NEXT:    vmovq %xmm0, %rax
1241; AVX-NEXT:    retq
1242;
1243; AVX512F-LABEL: trunc8i16_i64:
1244; AVX512F:       # BB#0: # %entry
1245; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1246; AVX512F-NEXT:    vmovq %xmm0, %rax
1247; AVX512F-NEXT:    retq
1248;
1249; AVX512VL-LABEL: trunc8i16_i64:
1250; AVX512VL:       # BB#0: # %entry
1251; AVX512VL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1252; AVX512VL-NEXT:    vmovq %xmm0, %rax
1253; AVX512VL-NEXT:    retq
1254;
1255; AVX512BW-LABEL: trunc8i16_i64:
1256; AVX512BW:       # BB#0: # %entry
1257; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1258; AVX512BW-NEXT:    vmovq %xmm0, %rax
1259; AVX512BW-NEXT:    retq
1260;
1261; AVX512BWVL-LABEL: trunc8i16_i64:
1262; AVX512BWVL:       # BB#0: # %entry
1263; AVX512BWVL-NEXT:    vpmovwb %xmm0, -{{[0-9]+}}(%rsp)
1264; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1265; AVX512BWVL-NEXT:    retq
1266entry:
1267  %0 = trunc <8 x i16> %inval to <8 x i8>
1268  %1 = bitcast <8 x i8> %0 to i64
1269  ret i64 %1
1270}
1271
1272define <16 x i8> @trunc16i64_16i8_const() {
1273; SSE-LABEL: trunc16i64_16i8_const:
1274; SSE:       # BB#0: # %entry
1275; SSE-NEXT:    xorps %xmm0, %xmm0
1276; SSE-NEXT:    retq
1277;
1278; AVX-LABEL: trunc16i64_16i8_const:
1279; AVX:       # BB#0: # %entry
1280; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1281; AVX-NEXT:    retq
1282;
1283; AVX512F-LABEL: trunc16i64_16i8_const:
1284; AVX512F:       # BB#0: # %entry
1285; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1286; AVX512F-NEXT:    retq
1287;
1288; AVX512VL-LABEL: trunc16i64_16i8_const:
1289; AVX512VL:       # BB#0: # %entry
1290; AVX512VL-NEXT:    vpxord %xmm0, %xmm0, %xmm0
1291; AVX512VL-NEXT:    retq
1292;
1293; AVX512BW-LABEL: trunc16i64_16i8_const:
1294; AVX512BW:       # BB#0: # %entry
1295; AVX512BW-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1296; AVX512BW-NEXT:    retq
1297;
1298; AVX512BWVL-LABEL: trunc16i64_16i8_const:
1299; AVX512BWVL:       # BB#0: # %entry
1300; AVX512BWVL-NEXT:    vpxord %xmm0, %xmm0, %xmm0
1301; AVX512BWVL-NEXT:    retq
1302
1303entry:
1304  %0 = trunc <16 x i64> zeroinitializer to <16 x i8>
1305  %1 = shufflevector <16 x i8> %0, <16 x i8> %0, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 undef, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26>
1306  ret <16 x i8> %1
1307}
1308
1309