1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST 8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F 9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL 10; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW 11; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL 12 13define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) { 14; SSE-LABEL: trunc8i64_8i32: 15; SSE: # %bb.0: # %entry 16; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 17; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2] 18; SSE-NEXT: movaps %xmm2, %xmm1 19; SSE-NEXT: retq 20; 21; AVX1-LABEL: trunc8i64_8i32: 22; AVX1: # %bb.0: # %entry 23; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 24; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 25; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6] 26; AVX1-NEXT: retq 27; 28; AVX2-SLOW-LABEL: trunc8i64_8i32: 29; AVX2-SLOW: # %bb.0: # %entry 30; AVX2-SLOW-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 31; AVX2-SLOW-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 32; AVX2-SLOW-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6] 33; AVX2-SLOW-NEXT: retq 34; 35; AVX2-FAST-LABEL: trunc8i64_8i32: 36; AVX2-FAST: # %bb.0: # %entry 37; AVX2-FAST-NEXT: vmovaps {{.*#+}} ymm2 = [0,2,4,6,4,6,6,7] 38; AVX2-FAST-NEXT: vpermps %ymm0, %ymm2, %ymm0 39; AVX2-FAST-NEXT: vpermps %ymm1, %ymm2, %ymm1 40; AVX2-FAST-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 41; AVX2-FAST-NEXT: retq 42; 43; AVX512-LABEL: trunc8i64_8i32: 44; AVX512: # %bb.0: # %entry 45; AVX512-NEXT: vpmovqd %zmm0, %ymm0 46; AVX512-NEXT: retq 47entry: 48 %0 = trunc <8 x i64> %a to <8 x i32> 49 ret <8 x i32> %0 50} 51 52define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) { 53; SSE-LABEL: trunc8i64_8i32_ashr: 54; SSE: # %bb.0: # %entry 55; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3] 56; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[1,3] 57; SSE-NEXT: movaps %xmm2, %xmm1 58; SSE-NEXT: retq 59; 60; AVX1-LABEL: trunc8i64_8i32_ashr: 61; AVX1: # %bb.0: # %entry 62; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 63; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 64; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7] 65; AVX1-NEXT: retq 66; 67; AVX2-SLOW-LABEL: trunc8i64_8i32_ashr: 68; AVX2-SLOW: # %bb.0: # %entry 69; AVX2-SLOW-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 70; AVX2-SLOW-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 71; AVX2-SLOW-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7] 72; AVX2-SLOW-NEXT: retq 73; 74; AVX2-FAST-LABEL: trunc8i64_8i32_ashr: 75; AVX2-FAST: # %bb.0: # %entry 76; AVX2-FAST-NEXT: vmovaps {{.*#+}} xmm2 = [1,3,5,7] 77; AVX2-FAST-NEXT: vpermps %ymm0, %ymm2, %ymm0 78; AVX2-FAST-NEXT: vpermps %ymm1, %ymm2, %ymm1 79; AVX2-FAST-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 80; AVX2-FAST-NEXT: retq 81; 82; AVX512-LABEL: trunc8i64_8i32_ashr: 83; AVX512: # %bb.0: # %entry 84; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 85; AVX512-NEXT: vpmovqd %zmm0, %ymm0 86; AVX512-NEXT: retq 87entry: 88 %0 = ashr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32> 89 %1 = trunc <8 x i64> %0 to <8 x i32> 90 ret <8 x i32> %1 91} 92 93define <8 x i32> @trunc8i64_8i32_lshr(<8 x i64> %a) { 94; SSE-LABEL: trunc8i64_8i32_lshr: 95; SSE: # %bb.0: # %entry 96; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3] 97; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[1,3] 98; SSE-NEXT: movaps %xmm2, %xmm1 99; SSE-NEXT: retq 100; 101; AVX1-LABEL: trunc8i64_8i32_lshr: 102; AVX1: # %bb.0: # %entry 103; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 104; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 105; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7] 106; AVX1-NEXT: retq 107; 108; AVX2-SLOW-LABEL: trunc8i64_8i32_lshr: 109; AVX2-SLOW: # %bb.0: # %entry 110; AVX2-SLOW-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 111; AVX2-SLOW-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 112; AVX2-SLOW-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7] 113; AVX2-SLOW-NEXT: retq 114; 115; AVX2-FAST-LABEL: trunc8i64_8i32_lshr: 116; AVX2-FAST: # %bb.0: # %entry 117; AVX2-FAST-NEXT: vmovaps {{.*#+}} xmm2 = [1,3,5,7] 118; AVX2-FAST-NEXT: vpermps %ymm0, %ymm2, %ymm0 119; AVX2-FAST-NEXT: vpermps %ymm1, %ymm2, %ymm1 120; AVX2-FAST-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 121; AVX2-FAST-NEXT: retq 122; 123; AVX512-LABEL: trunc8i64_8i32_lshr: 124; AVX512: # %bb.0: # %entry 125; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 126; AVX512-NEXT: vpmovqd %zmm0, %ymm0 127; AVX512-NEXT: retq 128entry: 129 %0 = lshr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32> 130 %1 = trunc <8 x i64> %0 to <8 x i32> 131 ret <8 x i32> %1 132} 133 134define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) { 135; SSE2-LABEL: trunc8i64_8i16: 136; SSE2: # %bb.0: # %entry 137; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 138; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 139; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 140; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] 141; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 142; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 143; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7] 144; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 145; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 146; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 147; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] 148; SSE2-NEXT: retq 149; 150; SSSE3-LABEL: trunc8i64_8i16: 151; SSSE3: # %bb.0: # %entry 152; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 153; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 154; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 155; SSSE3-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] 156; SSSE3-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 157; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 158; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7] 159; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 160; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 161; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 162; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] 163; SSSE3-NEXT: retq 164; 165; SSE41-LABEL: trunc8i64_8i16: 166; SSE41: # %bb.0: # %entry 167; SSE41-NEXT: pxor %xmm4, %xmm4 168; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 169; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 170; SSE41-NEXT: packusdw %xmm3, %xmm2 171; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 172; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 173; SSE41-NEXT: packusdw %xmm1, %xmm0 174; SSE41-NEXT: packusdw %xmm2, %xmm0 175; SSE41-NEXT: retq 176; 177; AVX1-LABEL: trunc8i64_8i16: 178; AVX1: # %bb.0: # %entry 179; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535] 180; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 181; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 182; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 183; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 184; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 185; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 186; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 187; AVX1-NEXT: vzeroupper 188; AVX1-NEXT: retq 189; 190; AVX2-SLOW-LABEL: trunc8i64_8i16: 191; AVX2-SLOW: # %bb.0: # %entry 192; AVX2-SLOW-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 193; AVX2-SLOW-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 194; AVX2-SLOW-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6] 195; AVX2-SLOW-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u] 196; AVX2-SLOW-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 197; AVX2-SLOW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 198; AVX2-SLOW-NEXT: vzeroupper 199; AVX2-SLOW-NEXT: retq 200; 201; AVX2-FAST-LABEL: trunc8i64_8i16: 202; AVX2-FAST: # %bb.0: # %entry 203; AVX2-FAST-NEXT: vmovdqa {{.*#+}} ymm2 = [0,2,4,6,4,6,6,7] 204; AVX2-FAST-NEXT: vpermd %ymm0, %ymm2, %ymm0 205; AVX2-FAST-NEXT: vpermd %ymm1, %ymm2, %ymm1 206; AVX2-FAST-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 207; AVX2-FAST-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u] 208; AVX2-FAST-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 209; AVX2-FAST-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 210; AVX2-FAST-NEXT: vzeroupper 211; AVX2-FAST-NEXT: retq 212; 213; AVX512-LABEL: trunc8i64_8i16: 214; AVX512: # %bb.0: # %entry 215; AVX512-NEXT: vpmovqw %zmm0, %xmm0 216; AVX512-NEXT: vzeroupper 217; AVX512-NEXT: retq 218entry: 219 %0 = trunc <8 x i64> %a to <8 x i16> 220 ret <8 x i16> %0 221} 222 223define void @trunc8i64_8i8(<8 x i64> %a) { 224; SSE2-LABEL: trunc8i64_8i8: 225; SSE2: # %bb.0: # %entry 226; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 227; SSE2-NEXT: pand %xmm4, %xmm3 228; SSE2-NEXT: pand %xmm4, %xmm2 229; SSE2-NEXT: packuswb %xmm3, %xmm2 230; SSE2-NEXT: pand %xmm4, %xmm1 231; SSE2-NEXT: pand %xmm4, %xmm0 232; SSE2-NEXT: packuswb %xmm1, %xmm0 233; SSE2-NEXT: packuswb %xmm2, %xmm0 234; SSE2-NEXT: packuswb %xmm0, %xmm0 235; SSE2-NEXT: movq %xmm0, (%rax) 236; SSE2-NEXT: retq 237; 238; SSSE3-LABEL: trunc8i64_8i8: 239; SSSE3: # %bb.0: # %entry 240; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 241; SSSE3-NEXT: pand %xmm4, %xmm3 242; SSSE3-NEXT: pand %xmm4, %xmm2 243; SSSE3-NEXT: packuswb %xmm3, %xmm2 244; SSSE3-NEXT: pand %xmm4, %xmm1 245; SSSE3-NEXT: pand %xmm4, %xmm0 246; SSSE3-NEXT: packuswb %xmm1, %xmm0 247; SSSE3-NEXT: packuswb %xmm2, %xmm0 248; SSSE3-NEXT: packuswb %xmm0, %xmm0 249; SSSE3-NEXT: movq %xmm0, (%rax) 250; SSSE3-NEXT: retq 251; 252; SSE41-LABEL: trunc8i64_8i8: 253; SSE41: # %bb.0: # %entry 254; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 255; SSE41-NEXT: pand %xmm4, %xmm3 256; SSE41-NEXT: pand %xmm4, %xmm2 257; SSE41-NEXT: packusdw %xmm3, %xmm2 258; SSE41-NEXT: pand %xmm4, %xmm1 259; SSE41-NEXT: pand %xmm4, %xmm0 260; SSE41-NEXT: packusdw %xmm1, %xmm0 261; SSE41-NEXT: packusdw %xmm2, %xmm0 262; SSE41-NEXT: packuswb %xmm0, %xmm0 263; SSE41-NEXT: movq %xmm0, (%rax) 264; SSE41-NEXT: retq 265; 266; AVX1-LABEL: trunc8i64_8i8: 267; AVX1: # %bb.0: # %entry 268; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [255,255,255,255] 269; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 270; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 271; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 272; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 273; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 274; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 275; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 276; AVX1-NEXT: vpackuswb %xmm0, %xmm0, %xmm0 277; AVX1-NEXT: vmovq %xmm0, (%rax) 278; AVX1-NEXT: vzeroupper 279; AVX1-NEXT: retq 280; 281; AVX2-LABEL: trunc8i64_8i8: 282; AVX2: # %bb.0: # %entry 283; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 284; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <u,u,0,8,u,u,u,u,u,u,u,u,u,u,u,u> 285; AVX2-NEXT: vpshufb %xmm3, %xmm2, %xmm2 286; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 287; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 288; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 289; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,8,u,u,u,u,u,u,u,u,u,u,u,u,u,u> 290; AVX2-NEXT: vpshufb %xmm3, %xmm2, %xmm2 291; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 292; AVX2-NEXT: vpunpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 293; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2,3] 294; AVX2-NEXT: vmovq %xmm0, (%rax) 295; AVX2-NEXT: vzeroupper 296; AVX2-NEXT: retq 297; 298; AVX512-LABEL: trunc8i64_8i8: 299; AVX512: # %bb.0: # %entry 300; AVX512-NEXT: vpmovqb %zmm0, (%rax) 301; AVX512-NEXT: vzeroupper 302; AVX512-NEXT: retq 303entry: 304 %0 = trunc <8 x i64> %a to <8 x i8> 305 store <8 x i8> %0, <8 x i8>* undef, align 4 306 ret void 307} 308 309define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { 310; SSE2-LABEL: trunc8i32_8i16: 311; SSE2: # %bb.0: # %entry 312; SSE2-NEXT: pslld $16, %xmm1 313; SSE2-NEXT: psrad $16, %xmm1 314; SSE2-NEXT: pslld $16, %xmm0 315; SSE2-NEXT: psrad $16, %xmm0 316; SSE2-NEXT: packssdw %xmm1, %xmm0 317; SSE2-NEXT: retq 318; 319; SSSE3-LABEL: trunc8i32_8i16: 320; SSSE3: # %bb.0: # %entry 321; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 322; SSSE3-NEXT: pshufb %xmm2, %xmm1 323; SSSE3-NEXT: pshufb %xmm2, %xmm0 324; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 325; SSSE3-NEXT: retq 326; 327; SSE41-LABEL: trunc8i32_8i16: 328; SSE41: # %bb.0: # %entry 329; SSE41-NEXT: pxor %xmm2, %xmm2 330; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 331; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 332; SSE41-NEXT: packusdw %xmm1, %xmm0 333; SSE41-NEXT: retq 334; 335; AVX1-LABEL: trunc8i32_8i16: 336; AVX1: # %bb.0: # %entry 337; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 338; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u> 339; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 340; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 341; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 342; AVX1-NEXT: vzeroupper 343; AVX1-NEXT: retq 344; 345; AVX2-LABEL: trunc8i32_8i16: 346; AVX2: # %bb.0: # %entry 347; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u] 348; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 349; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 350; AVX2-NEXT: vzeroupper 351; AVX2-NEXT: retq 352; 353; AVX512F-LABEL: trunc8i32_8i16: 354; AVX512F: # %bb.0: # %entry 355; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 356; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 357; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 358; AVX512F-NEXT: vzeroupper 359; AVX512F-NEXT: retq 360; 361; AVX512VL-LABEL: trunc8i32_8i16: 362; AVX512VL: # %bb.0: # %entry 363; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 364; AVX512VL-NEXT: vzeroupper 365; AVX512VL-NEXT: retq 366; 367; AVX512BW-LABEL: trunc8i32_8i16: 368; AVX512BW: # %bb.0: # %entry 369; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 370; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 371; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 372; AVX512BW-NEXT: vzeroupper 373; AVX512BW-NEXT: retq 374; 375; AVX512BWVL-LABEL: trunc8i32_8i16: 376; AVX512BWVL: # %bb.0: # %entry 377; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 378; AVX512BWVL-NEXT: vzeroupper 379; AVX512BWVL-NEXT: retq 380entry: 381 %0 = trunc <8 x i32> %a to <8 x i16> 382 ret <8 x i16> %0 383} 384 385define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) { 386; SSE2-LABEL: trunc8i32_8i16_ashr: 387; SSE2: # %bb.0: # %entry 388; SSE2-NEXT: psrad $16, %xmm1 389; SSE2-NEXT: psrad $16, %xmm0 390; SSE2-NEXT: packssdw %xmm1, %xmm0 391; SSE2-NEXT: retq 392; 393; SSSE3-LABEL: trunc8i32_8i16_ashr: 394; SSSE3: # %bb.0: # %entry 395; SSSE3-NEXT: psrad $16, %xmm1 396; SSSE3-NEXT: psrad $16, %xmm0 397; SSSE3-NEXT: packssdw %xmm1, %xmm0 398; SSSE3-NEXT: retq 399; 400; SSE41-LABEL: trunc8i32_8i16_ashr: 401; SSE41: # %bb.0: # %entry 402; SSE41-NEXT: psrld $16, %xmm1 403; SSE41-NEXT: psrld $16, %xmm0 404; SSE41-NEXT: packusdw %xmm1, %xmm0 405; SSE41-NEXT: retq 406; 407; AVX1-LABEL: trunc8i32_8i16_ashr: 408; AVX1: # %bb.0: # %entry 409; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 410; AVX1-NEXT: vpsrld $16, %xmm1, %xmm1 411; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 412; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 413; AVX1-NEXT: vzeroupper 414; AVX1-NEXT: retq 415; 416; AVX2-LABEL: trunc8i32_8i16_ashr: 417; AVX2: # %bb.0: # %entry 418; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 419; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 420; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 421; AVX2-NEXT: vzeroupper 422; AVX2-NEXT: retq 423; 424; AVX512F-LABEL: trunc8i32_8i16_ashr: 425; AVX512F: # %bb.0: # %entry 426; AVX512F-NEXT: vpsrld $16, %ymm0, %ymm0 427; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 428; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 429; AVX512F-NEXT: vzeroupper 430; AVX512F-NEXT: retq 431; 432; AVX512VL-LABEL: trunc8i32_8i16_ashr: 433; AVX512VL: # %bb.0: # %entry 434; AVX512VL-NEXT: vpsrld $16, %ymm0, %ymm0 435; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 436; AVX512VL-NEXT: vzeroupper 437; AVX512VL-NEXT: retq 438; 439; AVX512BW-LABEL: trunc8i32_8i16_ashr: 440; AVX512BW: # %bb.0: # %entry 441; AVX512BW-NEXT: vpsrld $16, %ymm0, %ymm0 442; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 443; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 444; AVX512BW-NEXT: vzeroupper 445; AVX512BW-NEXT: retq 446; 447; AVX512BWVL-LABEL: trunc8i32_8i16_ashr: 448; AVX512BWVL: # %bb.0: # %entry 449; AVX512BWVL-NEXT: vpsrld $16, %ymm0, %ymm0 450; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 451; AVX512BWVL-NEXT: vzeroupper 452; AVX512BWVL-NEXT: retq 453entry: 454 %0 = ashr <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16> 455 %1 = trunc <8 x i32> %0 to <8 x i16> 456 ret <8 x i16> %1 457} 458 459define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) { 460; SSE2-LABEL: trunc8i32_8i16_lshr: 461; SSE2: # %bb.0: # %entry 462; SSE2-NEXT: psrad $16, %xmm1 463; SSE2-NEXT: psrad $16, %xmm0 464; SSE2-NEXT: packssdw %xmm1, %xmm0 465; SSE2-NEXT: retq 466; 467; SSSE3-LABEL: trunc8i32_8i16_lshr: 468; SSSE3: # %bb.0: # %entry 469; SSSE3-NEXT: psrad $16, %xmm1 470; SSSE3-NEXT: psrad $16, %xmm0 471; SSSE3-NEXT: packssdw %xmm1, %xmm0 472; SSSE3-NEXT: retq 473; 474; SSE41-LABEL: trunc8i32_8i16_lshr: 475; SSE41: # %bb.0: # %entry 476; SSE41-NEXT: psrld $16, %xmm1 477; SSE41-NEXT: psrld $16, %xmm0 478; SSE41-NEXT: packusdw %xmm1, %xmm0 479; SSE41-NEXT: retq 480; 481; AVX1-LABEL: trunc8i32_8i16_lshr: 482; AVX1: # %bb.0: # %entry 483; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 484; AVX1-NEXT: vpsrld $16, %xmm1, %xmm1 485; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 486; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 487; AVX1-NEXT: vzeroupper 488; AVX1-NEXT: retq 489; 490; AVX2-LABEL: trunc8i32_8i16_lshr: 491; AVX2: # %bb.0: # %entry 492; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 493; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 494; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 495; AVX2-NEXT: vzeroupper 496; AVX2-NEXT: retq 497; 498; AVX512F-LABEL: trunc8i32_8i16_lshr: 499; AVX512F: # %bb.0: # %entry 500; AVX512F-NEXT: vpsrld $16, %ymm0, %ymm0 501; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 502; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 503; AVX512F-NEXT: vzeroupper 504; AVX512F-NEXT: retq 505; 506; AVX512VL-LABEL: trunc8i32_8i16_lshr: 507; AVX512VL: # %bb.0: # %entry 508; AVX512VL-NEXT: vpsrld $16, %ymm0, %ymm0 509; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 510; AVX512VL-NEXT: vzeroupper 511; AVX512VL-NEXT: retq 512; 513; AVX512BW-LABEL: trunc8i32_8i16_lshr: 514; AVX512BW: # %bb.0: # %entry 515; AVX512BW-NEXT: vpsrld $16, %ymm0, %ymm0 516; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 517; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 518; AVX512BW-NEXT: vzeroupper 519; AVX512BW-NEXT: retq 520; 521; AVX512BWVL-LABEL: trunc8i32_8i16_lshr: 522; AVX512BWVL: # %bb.0: # %entry 523; AVX512BWVL-NEXT: vpsrld $16, %ymm0, %ymm0 524; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 525; AVX512BWVL-NEXT: vzeroupper 526; AVX512BWVL-NEXT: retq 527entry: 528 %0 = lshr <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16> 529 %1 = trunc <8 x i32> %0 to <8 x i16> 530 ret <8 x i16> %1 531} 532 533define void @trunc8i32_8i8(<8 x i32> %a) { 534; SSE2-LABEL: trunc8i32_8i8: 535; SSE2: # %bb.0: # %entry 536; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 537; SSE2-NEXT: pand %xmm2, %xmm1 538; SSE2-NEXT: pand %xmm2, %xmm0 539; SSE2-NEXT: packuswb %xmm1, %xmm0 540; SSE2-NEXT: packuswb %xmm0, %xmm0 541; SSE2-NEXT: movq %xmm0, (%rax) 542; SSE2-NEXT: retq 543; 544; SSSE3-LABEL: trunc8i32_8i8: 545; SSSE3: # %bb.0: # %entry 546; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> 547; SSSE3-NEXT: pshufb %xmm2, %xmm1 548; SSSE3-NEXT: pshufb %xmm2, %xmm0 549; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 550; SSSE3-NEXT: movq %xmm0, (%rax) 551; SSSE3-NEXT: retq 552; 553; SSE41-LABEL: trunc8i32_8i8: 554; SSE41: # %bb.0: # %entry 555; SSE41-NEXT: movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> 556; SSE41-NEXT: pshufb %xmm2, %xmm1 557; SSE41-NEXT: pshufb %xmm2, %xmm0 558; SSE41-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 559; SSE41-NEXT: movq %xmm0, (%rax) 560; SSE41-NEXT: retq 561; 562; AVX1-LABEL: trunc8i32_8i8: 563; AVX1: # %bb.0: # %entry 564; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 565; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> 566; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 567; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 568; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 569; AVX1-NEXT: vmovq %xmm0, (%rax) 570; AVX1-NEXT: vzeroupper 571; AVX1-NEXT: retq 572; 573; AVX2-LABEL: trunc8i32_8i8: 574; AVX2: # %bb.0: # %entry 575; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 576; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> 577; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 578; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 579; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 580; AVX2-NEXT: vmovq %xmm0, (%rax) 581; AVX2-NEXT: vzeroupper 582; AVX2-NEXT: retq 583; 584; AVX512F-LABEL: trunc8i32_8i8: 585; AVX512F: # %bb.0: # %entry 586; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 587; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 588; AVX512F-NEXT: vmovq %xmm0, (%rax) 589; AVX512F-NEXT: vzeroupper 590; AVX512F-NEXT: retq 591; 592; AVX512VL-LABEL: trunc8i32_8i8: 593; AVX512VL: # %bb.0: # %entry 594; AVX512VL-NEXT: vpmovdb %ymm0, (%rax) 595; AVX512VL-NEXT: vzeroupper 596; AVX512VL-NEXT: retq 597; 598; AVX512BW-LABEL: trunc8i32_8i8: 599; AVX512BW: # %bb.0: # %entry 600; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 601; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 602; AVX512BW-NEXT: vmovq %xmm0, (%rax) 603; AVX512BW-NEXT: vzeroupper 604; AVX512BW-NEXT: retq 605; 606; AVX512BWVL-LABEL: trunc8i32_8i8: 607; AVX512BWVL: # %bb.0: # %entry 608; AVX512BWVL-NEXT: vpmovdb %ymm0, (%rax) 609; AVX512BWVL-NEXT: vzeroupper 610; AVX512BWVL-NEXT: retq 611entry: 612 %0 = trunc <8 x i32> %a to <8 x i8> 613 store <8 x i8> %0, <8 x i8>* undef, align 4 614 ret void 615} 616 617define void @trunc16i32_16i16(<16 x i32> %a) { 618; SSE2-LABEL: trunc16i32_16i16: 619; SSE2: # %bb.0: # %entry 620; SSE2-NEXT: pslld $16, %xmm1 621; SSE2-NEXT: psrad $16, %xmm1 622; SSE2-NEXT: pslld $16, %xmm0 623; SSE2-NEXT: psrad $16, %xmm0 624; SSE2-NEXT: packssdw %xmm1, %xmm0 625; SSE2-NEXT: pslld $16, %xmm3 626; SSE2-NEXT: psrad $16, %xmm3 627; SSE2-NEXT: pslld $16, %xmm2 628; SSE2-NEXT: psrad $16, %xmm2 629; SSE2-NEXT: packssdw %xmm3, %xmm2 630; SSE2-NEXT: movdqu %xmm2, (%rax) 631; SSE2-NEXT: movdqu %xmm0, (%rax) 632; SSE2-NEXT: retq 633; 634; SSSE3-LABEL: trunc16i32_16i16: 635; SSSE3: # %bb.0: # %entry 636; SSSE3-NEXT: pslld $16, %xmm1 637; SSSE3-NEXT: psrad $16, %xmm1 638; SSSE3-NEXT: pslld $16, %xmm0 639; SSSE3-NEXT: psrad $16, %xmm0 640; SSSE3-NEXT: packssdw %xmm1, %xmm0 641; SSSE3-NEXT: pslld $16, %xmm3 642; SSSE3-NEXT: psrad $16, %xmm3 643; SSSE3-NEXT: pslld $16, %xmm2 644; SSSE3-NEXT: psrad $16, %xmm2 645; SSSE3-NEXT: packssdw %xmm3, %xmm2 646; SSSE3-NEXT: movdqu %xmm2, (%rax) 647; SSSE3-NEXT: movdqu %xmm0, (%rax) 648; SSSE3-NEXT: retq 649; 650; SSE41-LABEL: trunc16i32_16i16: 651; SSE41: # %bb.0: # %entry 652; SSE41-NEXT: pxor %xmm4, %xmm4 653; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7] 654; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7] 655; SSE41-NEXT: packusdw %xmm1, %xmm0 656; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7] 657; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7] 658; SSE41-NEXT: packusdw %xmm3, %xmm2 659; SSE41-NEXT: movdqu %xmm2, (%rax) 660; SSE41-NEXT: movdqu %xmm0, (%rax) 661; SSE41-NEXT: retq 662; 663; AVX1-LABEL: trunc16i32_16i16: 664; AVX1: # %bb.0: # %entry 665; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535,65535,65535,65535,65535] 666; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 667; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 668; AVX1-NEXT: vpackusdw %xmm3, %xmm0, %xmm0 669; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 670; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 671; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 672; AVX1-NEXT: vmovdqu %xmm1, (%rax) 673; AVX1-NEXT: vmovdqu %xmm0, (%rax) 674; AVX1-NEXT: vzeroupper 675; AVX1-NEXT: retq 676; 677; AVX2-LABEL: trunc16i32_16i16: 678; AVX2: # %bb.0: # %entry 679; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 680; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 681; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 682; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 683; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 684; AVX2-NEXT: vmovdqu %xmm1, (%rax) 685; AVX2-NEXT: vmovdqu %xmm0, (%rax) 686; AVX2-NEXT: vzeroupper 687; AVX2-NEXT: retq 688; 689; AVX512-LABEL: trunc16i32_16i16: 690; AVX512: # %bb.0: # %entry 691; AVX512-NEXT: vpmovdw %zmm0, (%rax) 692; AVX512-NEXT: vzeroupper 693; AVX512-NEXT: retq 694entry: 695 %0 = trunc <16 x i32> %a to <16 x i16> 696 store <16 x i16> %0, <16 x i16>* undef, align 4 697 ret void 698} 699 700define void @trunc16i32_16i16_ashr(<16 x i32> %a) { 701; SSE2-LABEL: trunc16i32_16i16_ashr: 702; SSE2: # %bb.0: # %entry 703; SSE2-NEXT: psrad $16, %xmm1 704; SSE2-NEXT: psrad $16, %xmm0 705; SSE2-NEXT: packssdw %xmm1, %xmm0 706; SSE2-NEXT: psrad $16, %xmm3 707; SSE2-NEXT: psrad $16, %xmm2 708; SSE2-NEXT: packssdw %xmm3, %xmm2 709; SSE2-NEXT: movdqu %xmm2, (%rax) 710; SSE2-NEXT: movdqu %xmm0, (%rax) 711; SSE2-NEXT: retq 712; 713; SSSE3-LABEL: trunc16i32_16i16_ashr: 714; SSSE3: # %bb.0: # %entry 715; SSSE3-NEXT: psrad $16, %xmm1 716; SSSE3-NEXT: psrad $16, %xmm0 717; SSSE3-NEXT: packssdw %xmm1, %xmm0 718; SSSE3-NEXT: psrad $16, %xmm3 719; SSSE3-NEXT: psrad $16, %xmm2 720; SSSE3-NEXT: packssdw %xmm3, %xmm2 721; SSSE3-NEXT: movdqu %xmm2, (%rax) 722; SSSE3-NEXT: movdqu %xmm0, (%rax) 723; SSSE3-NEXT: retq 724; 725; SSE41-LABEL: trunc16i32_16i16_ashr: 726; SSE41: # %bb.0: # %entry 727; SSE41-NEXT: psrld $16, %xmm3 728; SSE41-NEXT: psrld $16, %xmm2 729; SSE41-NEXT: packusdw %xmm3, %xmm2 730; SSE41-NEXT: psrld $16, %xmm1 731; SSE41-NEXT: psrld $16, %xmm0 732; SSE41-NEXT: packusdw %xmm1, %xmm0 733; SSE41-NEXT: movdqu %xmm2, (%rax) 734; SSE41-NEXT: movdqu %xmm0, (%rax) 735; SSE41-NEXT: retq 736; 737; AVX1-LABEL: trunc16i32_16i16_ashr: 738; AVX1: # %bb.0: # %entry 739; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 740; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 741; AVX1-NEXT: vpsrld $16, %xmm1, %xmm1 742; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 743; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 744; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 745; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 746; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 747; AVX1-NEXT: vmovdqu %xmm1, (%rax) 748; AVX1-NEXT: vmovdqu %xmm0, (%rax) 749; AVX1-NEXT: vzeroupper 750; AVX1-NEXT: retq 751; 752; AVX2-LABEL: trunc16i32_16i16_ashr: 753; AVX2: # %bb.0: # %entry 754; AVX2-NEXT: vpsrld $16, %ymm1, %ymm1 755; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 756; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 757; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] 758; AVX2-NEXT: vmovdqu %ymm0, (%rax) 759; AVX2-NEXT: vzeroupper 760; AVX2-NEXT: retq 761; 762; AVX512-LABEL: trunc16i32_16i16_ashr: 763; AVX512: # %bb.0: # %entry 764; AVX512-NEXT: vpsrld $16, %zmm0, %zmm0 765; AVX512-NEXT: vpmovdw %zmm0, (%rax) 766; AVX512-NEXT: vzeroupper 767; AVX512-NEXT: retq 768entry: 769 %0 = ashr <16 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16> 770 %1 = trunc <16 x i32> %0 to <16 x i16> 771 store <16 x i16> %1, <16 x i16>* undef, align 4 772 ret void 773} 774 775define void @trunc16i32_16i16_lshr(<16 x i32> %a) { 776; SSE2-LABEL: trunc16i32_16i16_lshr: 777; SSE2: # %bb.0: # %entry 778; SSE2-NEXT: psrad $16, %xmm1 779; SSE2-NEXT: psrad $16, %xmm0 780; SSE2-NEXT: packssdw %xmm1, %xmm0 781; SSE2-NEXT: psrad $16, %xmm3 782; SSE2-NEXT: psrad $16, %xmm2 783; SSE2-NEXT: packssdw %xmm3, %xmm2 784; SSE2-NEXT: movdqu %xmm2, (%rax) 785; SSE2-NEXT: movdqu %xmm0, (%rax) 786; SSE2-NEXT: retq 787; 788; SSSE3-LABEL: trunc16i32_16i16_lshr: 789; SSSE3: # %bb.0: # %entry 790; SSSE3-NEXT: psrad $16, %xmm1 791; SSSE3-NEXT: psrad $16, %xmm0 792; SSSE3-NEXT: packssdw %xmm1, %xmm0 793; SSSE3-NEXT: psrad $16, %xmm3 794; SSSE3-NEXT: psrad $16, %xmm2 795; SSSE3-NEXT: packssdw %xmm3, %xmm2 796; SSSE3-NEXT: movdqu %xmm2, (%rax) 797; SSSE3-NEXT: movdqu %xmm0, (%rax) 798; SSSE3-NEXT: retq 799; 800; SSE41-LABEL: trunc16i32_16i16_lshr: 801; SSE41: # %bb.0: # %entry 802; SSE41-NEXT: psrld $16, %xmm3 803; SSE41-NEXT: psrld $16, %xmm2 804; SSE41-NEXT: packusdw %xmm3, %xmm2 805; SSE41-NEXT: psrld $16, %xmm1 806; SSE41-NEXT: psrld $16, %xmm0 807; SSE41-NEXT: packusdw %xmm1, %xmm0 808; SSE41-NEXT: movdqu %xmm2, (%rax) 809; SSE41-NEXT: movdqu %xmm0, (%rax) 810; SSE41-NEXT: retq 811; 812; AVX1-LABEL: trunc16i32_16i16_lshr: 813; AVX1: # %bb.0: # %entry 814; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 815; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 816; AVX1-NEXT: vpsrld $16, %xmm1, %xmm1 817; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 818; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 819; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 820; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 821; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 822; AVX1-NEXT: vmovdqu %xmm1, (%rax) 823; AVX1-NEXT: vmovdqu %xmm0, (%rax) 824; AVX1-NEXT: vzeroupper 825; AVX1-NEXT: retq 826; 827; AVX2-LABEL: trunc16i32_16i16_lshr: 828; AVX2: # %bb.0: # %entry 829; AVX2-NEXT: vpsrld $16, %ymm1, %ymm1 830; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 831; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 832; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] 833; AVX2-NEXT: vmovdqu %ymm0, (%rax) 834; AVX2-NEXT: vzeroupper 835; AVX2-NEXT: retq 836; 837; AVX512-LABEL: trunc16i32_16i16_lshr: 838; AVX512: # %bb.0: # %entry 839; AVX512-NEXT: vpsrld $16, %zmm0, %zmm0 840; AVX512-NEXT: vpmovdw %zmm0, (%rax) 841; AVX512-NEXT: vzeroupper 842; AVX512-NEXT: retq 843entry: 844 %0 = lshr <16 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16> 845 %1 = trunc <16 x i32> %0 to <16 x i16> 846 store <16 x i16> %1, <16 x i16>* undef, align 4 847 ret void 848} 849 850define void @trunc16i32_16i8(<16 x i32> %a) { 851; SSE2-LABEL: trunc16i32_16i8: 852; SSE2: # %bb.0: # %entry 853; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 854; SSE2-NEXT: pand %xmm4, %xmm3 855; SSE2-NEXT: pand %xmm4, %xmm2 856; SSE2-NEXT: packuswb %xmm3, %xmm2 857; SSE2-NEXT: pand %xmm4, %xmm1 858; SSE2-NEXT: pand %xmm4, %xmm0 859; SSE2-NEXT: packuswb %xmm1, %xmm0 860; SSE2-NEXT: packuswb %xmm2, %xmm0 861; SSE2-NEXT: movdqu %xmm0, (%rax) 862; SSE2-NEXT: retq 863; 864; SSSE3-LABEL: trunc16i32_16i8: 865; SSSE3: # %bb.0: # %entry 866; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 867; SSSE3-NEXT: pand %xmm4, %xmm3 868; SSSE3-NEXT: pand %xmm4, %xmm2 869; SSSE3-NEXT: packuswb %xmm3, %xmm2 870; SSSE3-NEXT: pand %xmm4, %xmm1 871; SSSE3-NEXT: pand %xmm4, %xmm0 872; SSSE3-NEXT: packuswb %xmm1, %xmm0 873; SSSE3-NEXT: packuswb %xmm2, %xmm0 874; SSSE3-NEXT: movdqu %xmm0, (%rax) 875; SSSE3-NEXT: retq 876; 877; SSE41-LABEL: trunc16i32_16i8: 878; SSE41: # %bb.0: # %entry 879; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 880; SSE41-NEXT: pand %xmm4, %xmm3 881; SSE41-NEXT: pand %xmm4, %xmm2 882; SSE41-NEXT: packusdw %xmm3, %xmm2 883; SSE41-NEXT: pand %xmm4, %xmm1 884; SSE41-NEXT: pand %xmm4, %xmm0 885; SSE41-NEXT: packusdw %xmm1, %xmm0 886; SSE41-NEXT: packuswb %xmm2, %xmm0 887; SSE41-NEXT: movdqu %xmm0, (%rax) 888; SSE41-NEXT: retq 889; 890; AVX1-LABEL: trunc16i32_16i8: 891; AVX1: # %bb.0: # %entry 892; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255] 893; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 894; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 895; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 896; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 897; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 898; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 899; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 900; AVX1-NEXT: vmovdqu %xmm0, (%rax) 901; AVX1-NEXT: vzeroupper 902; AVX1-NEXT: retq 903; 904; AVX2-LABEL: trunc16i32_16i8: 905; AVX2: # %bb.0: # %entry 906; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 907; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 908; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 909; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255] 910; AVX2-NEXT: vpand %xmm3, %xmm1, %xmm1 911; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 912; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 913; AVX2-NEXT: vpand %xmm3, %xmm0, %xmm0 914; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 915; AVX2-NEXT: vmovdqu %xmm0, (%rax) 916; AVX2-NEXT: vzeroupper 917; AVX2-NEXT: retq 918; 919; AVX512-LABEL: trunc16i32_16i8: 920; AVX512: # %bb.0: # %entry 921; AVX512-NEXT: vpmovdb %zmm0, (%rax) 922; AVX512-NEXT: vzeroupper 923; AVX512-NEXT: retq 924entry: 925 %0 = trunc <16 x i32> %a to <16 x i8> 926 store <16 x i8> %0, <16 x i8>* undef, align 4 927 ret void 928} 929 930define void @trunc16i32_16i8_ashr(<16 x i32> %a) { 931; SSE2-LABEL: trunc16i32_16i8_ashr: 932; SSE2: # %bb.0: # %entry 933; SSE2-NEXT: psrld $24, %xmm1 934; SSE2-NEXT: psrld $24, %xmm0 935; SSE2-NEXT: packuswb %xmm1, %xmm0 936; SSE2-NEXT: psrld $24, %xmm3 937; SSE2-NEXT: psrld $24, %xmm2 938; SSE2-NEXT: packuswb %xmm3, %xmm2 939; SSE2-NEXT: packuswb %xmm2, %xmm0 940; SSE2-NEXT: movdqu %xmm0, (%rax) 941; SSE2-NEXT: retq 942; 943; SSSE3-LABEL: trunc16i32_16i8_ashr: 944; SSSE3: # %bb.0: # %entry 945; SSSE3-NEXT: psrld $24, %xmm1 946; SSSE3-NEXT: psrld $24, %xmm0 947; SSSE3-NEXT: packuswb %xmm1, %xmm0 948; SSSE3-NEXT: psrld $24, %xmm3 949; SSSE3-NEXT: psrld $24, %xmm2 950; SSSE3-NEXT: packuswb %xmm3, %xmm2 951; SSSE3-NEXT: packuswb %xmm2, %xmm0 952; SSSE3-NEXT: movdqu %xmm0, (%rax) 953; SSSE3-NEXT: retq 954; 955; SSE41-LABEL: trunc16i32_16i8_ashr: 956; SSE41: # %bb.0: # %entry 957; SSE41-NEXT: psrld $24, %xmm1 958; SSE41-NEXT: psrld $24, %xmm0 959; SSE41-NEXT: packusdw %xmm1, %xmm0 960; SSE41-NEXT: psrld $24, %xmm3 961; SSE41-NEXT: psrld $24, %xmm2 962; SSE41-NEXT: packusdw %xmm3, %xmm2 963; SSE41-NEXT: packuswb %xmm2, %xmm0 964; SSE41-NEXT: movdqu %xmm0, (%rax) 965; SSE41-NEXT: retq 966; 967; AVX1-LABEL: trunc16i32_16i8_ashr: 968; AVX1: # %bb.0: # %entry 969; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 970; AVX1-NEXT: vpsrld $24, %xmm2, %xmm2 971; AVX1-NEXT: vpsrld $24, %xmm0, %xmm0 972; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 973; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 974; AVX1-NEXT: vpsrld $24, %xmm2, %xmm2 975; AVX1-NEXT: vpsrld $24, %xmm1, %xmm1 976; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 977; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 978; AVX1-NEXT: vmovdqu %xmm0, (%rax) 979; AVX1-NEXT: vzeroupper 980; AVX1-NEXT: retq 981; 982; AVX2-LABEL: trunc16i32_16i8_ashr: 983; AVX2: # %bb.0: # %entry 984; AVX2-NEXT: vpsrld $24, %ymm1, %ymm1 985; AVX2-NEXT: vpsrld $24, %ymm0, %ymm0 986; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 987; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 988; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 989; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3] 990; AVX2-NEXT: vmovdqu %xmm0, (%rax) 991; AVX2-NEXT: vzeroupper 992; AVX2-NEXT: retq 993; 994; AVX512-LABEL: trunc16i32_16i8_ashr: 995; AVX512: # %bb.0: # %entry 996; AVX512-NEXT: vpsrld $24, %zmm0, %zmm0 997; AVX512-NEXT: vpmovdb %zmm0, (%rax) 998; AVX512-NEXT: vzeroupper 999; AVX512-NEXT: retq 1000entry: 1001 %0 = ashr <16 x i32> %a, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24> 1002 %1 = trunc <16 x i32> %0 to <16 x i8> 1003 store <16 x i8> %1, <16 x i8>* undef, align 4 1004 ret void 1005} 1006 1007define void @trunc16i32_16i8_lshr(<16 x i32> %a) { 1008; SSE2-LABEL: trunc16i32_16i8_lshr: 1009; SSE2: # %bb.0: # %entry 1010; SSE2-NEXT: psrld $24, %xmm1 1011; SSE2-NEXT: psrld $24, %xmm0 1012; SSE2-NEXT: packuswb %xmm1, %xmm0 1013; SSE2-NEXT: psrld $24, %xmm3 1014; SSE2-NEXT: psrld $24, %xmm2 1015; SSE2-NEXT: packuswb %xmm3, %xmm2 1016; SSE2-NEXT: packuswb %xmm2, %xmm0 1017; SSE2-NEXT: movdqu %xmm0, (%rax) 1018; SSE2-NEXT: retq 1019; 1020; SSSE3-LABEL: trunc16i32_16i8_lshr: 1021; SSSE3: # %bb.0: # %entry 1022; SSSE3-NEXT: psrld $24, %xmm1 1023; SSSE3-NEXT: psrld $24, %xmm0 1024; SSSE3-NEXT: packuswb %xmm1, %xmm0 1025; SSSE3-NEXT: psrld $24, %xmm3 1026; SSSE3-NEXT: psrld $24, %xmm2 1027; SSSE3-NEXT: packuswb %xmm3, %xmm2 1028; SSSE3-NEXT: packuswb %xmm2, %xmm0 1029; SSSE3-NEXT: movdqu %xmm0, (%rax) 1030; SSSE3-NEXT: retq 1031; 1032; SSE41-LABEL: trunc16i32_16i8_lshr: 1033; SSE41: # %bb.0: # %entry 1034; SSE41-NEXT: psrld $24, %xmm1 1035; SSE41-NEXT: psrld $24, %xmm0 1036; SSE41-NEXT: packusdw %xmm1, %xmm0 1037; SSE41-NEXT: psrld $24, %xmm3 1038; SSE41-NEXT: psrld $24, %xmm2 1039; SSE41-NEXT: packusdw %xmm3, %xmm2 1040; SSE41-NEXT: packuswb %xmm2, %xmm0 1041; SSE41-NEXT: movdqu %xmm0, (%rax) 1042; SSE41-NEXT: retq 1043; 1044; AVX1-LABEL: trunc16i32_16i8_lshr: 1045; AVX1: # %bb.0: # %entry 1046; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1047; AVX1-NEXT: vpsrld $24, %xmm2, %xmm2 1048; AVX1-NEXT: vpsrld $24, %xmm0, %xmm0 1049; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 1050; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1051; AVX1-NEXT: vpsrld $24, %xmm2, %xmm2 1052; AVX1-NEXT: vpsrld $24, %xmm1, %xmm1 1053; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 1054; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1055; AVX1-NEXT: vmovdqu %xmm0, (%rax) 1056; AVX1-NEXT: vzeroupper 1057; AVX1-NEXT: retq 1058; 1059; AVX2-LABEL: trunc16i32_16i8_lshr: 1060; AVX2: # %bb.0: # %entry 1061; AVX2-NEXT: vpsrld $24, %ymm1, %ymm1 1062; AVX2-NEXT: vpsrld $24, %ymm0, %ymm0 1063; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 1064; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1065; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1066; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3] 1067; AVX2-NEXT: vmovdqu %xmm0, (%rax) 1068; AVX2-NEXT: vzeroupper 1069; AVX2-NEXT: retq 1070; 1071; AVX512-LABEL: trunc16i32_16i8_lshr: 1072; AVX512: # %bb.0: # %entry 1073; AVX512-NEXT: vpsrld $24, %zmm0, %zmm0 1074; AVX512-NEXT: vpmovdb %zmm0, (%rax) 1075; AVX512-NEXT: vzeroupper 1076; AVX512-NEXT: retq 1077entry: 1078 %0 = lshr <16 x i32> %a, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24> 1079 %1 = trunc <16 x i32> %0 to <16 x i8> 1080 store <16 x i8> %1, <16 x i8>* undef, align 4 1081 ret void 1082} 1083 1084;PR25684 1085define void @trunc16i16_16i8(<16 x i16> %a) { 1086; SSE-LABEL: trunc16i16_16i8: 1087; SSE: # %bb.0: # %entry 1088; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 1089; SSE-NEXT: pand %xmm2, %xmm1 1090; SSE-NEXT: pand %xmm2, %xmm0 1091; SSE-NEXT: packuswb %xmm1, %xmm0 1092; SSE-NEXT: movdqu %xmm0, (%rax) 1093; SSE-NEXT: retq 1094; 1095; AVX1-LABEL: trunc16i16_16i8: 1096; AVX1: # %bb.0: # %entry 1097; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 1098; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 1099; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1100; AVX1-NEXT: vmovdqu %xmm0, (%rax) 1101; AVX1-NEXT: vzeroupper 1102; AVX1-NEXT: retq 1103; 1104; AVX2-LABEL: trunc16i16_16i8: 1105; AVX2: # %bb.0: # %entry 1106; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 1107; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1108; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1109; AVX2-NEXT: vmovdqu %xmm0, (%rax) 1110; AVX2-NEXT: vzeroupper 1111; AVX2-NEXT: retq 1112; 1113; AVX512F-LABEL: trunc16i16_16i8: 1114; AVX512F: # %bb.0: # %entry 1115; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1116; AVX512F-NEXT: vpmovdb %zmm0, (%rax) 1117; AVX512F-NEXT: vzeroupper 1118; AVX512F-NEXT: retq 1119; 1120; AVX512VL-LABEL: trunc16i16_16i8: 1121; AVX512VL: # %bb.0: # %entry 1122; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1123; AVX512VL-NEXT: vpmovdb %zmm0, (%rax) 1124; AVX512VL-NEXT: vzeroupper 1125; AVX512VL-NEXT: retq 1126; 1127; AVX512BW-LABEL: trunc16i16_16i8: 1128; AVX512BW: # %bb.0: # %entry 1129; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1130; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1131; AVX512BW-NEXT: vmovdqu %xmm0, (%rax) 1132; AVX512BW-NEXT: vzeroupper 1133; AVX512BW-NEXT: retq 1134; 1135; AVX512BWVL-LABEL: trunc16i16_16i8: 1136; AVX512BWVL: # %bb.0: # %entry 1137; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rax) 1138; AVX512BWVL-NEXT: vzeroupper 1139; AVX512BWVL-NEXT: retq 1140entry: 1141 %0 = trunc <16 x i16> %a to <16 x i8> 1142 store <16 x i8> %0, <16 x i8>* undef, align 4 1143 ret void 1144} 1145 1146define void @trunc16i16_16i8_ashr(<16 x i16> %a) { 1147; SSE-LABEL: trunc16i16_16i8_ashr: 1148; SSE: # %bb.0: # %entry 1149; SSE-NEXT: psrlw $8, %xmm1 1150; SSE-NEXT: psrlw $8, %xmm0 1151; SSE-NEXT: packuswb %xmm1, %xmm0 1152; SSE-NEXT: movdqu %xmm0, (%rax) 1153; SSE-NEXT: retq 1154; 1155; AVX1-LABEL: trunc16i16_16i8_ashr: 1156; AVX1: # %bb.0: # %entry 1157; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 1158; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 1159; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 1160; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1161; AVX1-NEXT: vmovdqu %xmm0, (%rax) 1162; AVX1-NEXT: vzeroupper 1163; AVX1-NEXT: retq 1164; 1165; AVX2-LABEL: trunc16i16_16i8_ashr: 1166; AVX2: # %bb.0: # %entry 1167; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0 1168; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1169; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1170; AVX2-NEXT: vmovdqu %xmm0, (%rax) 1171; AVX2-NEXT: vzeroupper 1172; AVX2-NEXT: retq 1173; 1174; AVX512F-LABEL: trunc16i16_16i8_ashr: 1175; AVX512F: # %bb.0: # %entry 1176; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 1177; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1178; AVX512F-NEXT: vpmovdb %zmm0, (%rax) 1179; AVX512F-NEXT: vzeroupper 1180; AVX512F-NEXT: retq 1181; 1182; AVX512VL-LABEL: trunc16i16_16i8_ashr: 1183; AVX512VL: # %bb.0: # %entry 1184; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 1185; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1186; AVX512VL-NEXT: vpmovdb %zmm0, (%rax) 1187; AVX512VL-NEXT: vzeroupper 1188; AVX512VL-NEXT: retq 1189; 1190; AVX512BW-LABEL: trunc16i16_16i8_ashr: 1191; AVX512BW: # %bb.0: # %entry 1192; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 1193; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1194; AVX512BW-NEXT: vmovdqu %xmm0, (%rax) 1195; AVX512BW-NEXT: vzeroupper 1196; AVX512BW-NEXT: retq 1197; 1198; AVX512BWVL-LABEL: trunc16i16_16i8_ashr: 1199; AVX512BWVL: # %bb.0: # %entry 1200; AVX512BWVL-NEXT: vpsrlw $8, %ymm0, %ymm0 1201; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rax) 1202; AVX512BWVL-NEXT: vzeroupper 1203; AVX512BWVL-NEXT: retq 1204entry: 1205 %0 = ashr <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8> 1206 %1 = trunc <16 x i16> %0 to <16 x i8> 1207 store <16 x i8> %1, <16 x i8>* undef, align 4 1208 ret void 1209} 1210 1211define void @trunc16i16_16i8_lshr(<16 x i16> %a) { 1212; SSE-LABEL: trunc16i16_16i8_lshr: 1213; SSE: # %bb.0: # %entry 1214; SSE-NEXT: psrlw $8, %xmm1 1215; SSE-NEXT: psrlw $8, %xmm0 1216; SSE-NEXT: packuswb %xmm1, %xmm0 1217; SSE-NEXT: movdqu %xmm0, (%rax) 1218; SSE-NEXT: retq 1219; 1220; AVX1-LABEL: trunc16i16_16i8_lshr: 1221; AVX1: # %bb.0: # %entry 1222; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 1223; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 1224; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 1225; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1226; AVX1-NEXT: vmovdqu %xmm0, (%rax) 1227; AVX1-NEXT: vzeroupper 1228; AVX1-NEXT: retq 1229; 1230; AVX2-LABEL: trunc16i16_16i8_lshr: 1231; AVX2: # %bb.0: # %entry 1232; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0 1233; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1234; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1235; AVX2-NEXT: vmovdqu %xmm0, (%rax) 1236; AVX2-NEXT: vzeroupper 1237; AVX2-NEXT: retq 1238; 1239; AVX512F-LABEL: trunc16i16_16i8_lshr: 1240; AVX512F: # %bb.0: # %entry 1241; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 1242; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1243; AVX512F-NEXT: vpmovdb %zmm0, (%rax) 1244; AVX512F-NEXT: vzeroupper 1245; AVX512F-NEXT: retq 1246; 1247; AVX512VL-LABEL: trunc16i16_16i8_lshr: 1248; AVX512VL: # %bb.0: # %entry 1249; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 1250; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1251; AVX512VL-NEXT: vpmovdb %zmm0, (%rax) 1252; AVX512VL-NEXT: vzeroupper 1253; AVX512VL-NEXT: retq 1254; 1255; AVX512BW-LABEL: trunc16i16_16i8_lshr: 1256; AVX512BW: # %bb.0: # %entry 1257; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 1258; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1259; AVX512BW-NEXT: vmovdqu %xmm0, (%rax) 1260; AVX512BW-NEXT: vzeroupper 1261; AVX512BW-NEXT: retq 1262; 1263; AVX512BWVL-LABEL: trunc16i16_16i8_lshr: 1264; AVX512BWVL: # %bb.0: # %entry 1265; AVX512BWVL-NEXT: vpsrlw $8, %ymm0, %ymm0 1266; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rax) 1267; AVX512BWVL-NEXT: vzeroupper 1268; AVX512BWVL-NEXT: retq 1269entry: 1270 %0 = lshr <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8> 1271 %1 = trunc <16 x i16> %0 to <16 x i8> 1272 store <16 x i8> %1, <16 x i8>* undef, align 4 1273 ret void 1274} 1275 1276define void @trunc32i16_32i8(<32 x i16> %a) { 1277; SSE-LABEL: trunc32i16_32i8: 1278; SSE: # %bb.0: # %entry 1279; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 1280; SSE-NEXT: pand %xmm4, %xmm1 1281; SSE-NEXT: pand %xmm4, %xmm0 1282; SSE-NEXT: packuswb %xmm1, %xmm0 1283; SSE-NEXT: pand %xmm4, %xmm3 1284; SSE-NEXT: pand %xmm4, %xmm2 1285; SSE-NEXT: packuswb %xmm3, %xmm2 1286; SSE-NEXT: movdqu %xmm2, (%rax) 1287; SSE-NEXT: movdqu %xmm0, (%rax) 1288; SSE-NEXT: retq 1289; 1290; AVX1-LABEL: trunc32i16_32i8: 1291; AVX1: # %bb.0: # %entry 1292; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255] 1293; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 1294; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 1295; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 1296; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 1297; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1298; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 1299; AVX1-NEXT: vmovdqu %xmm1, (%rax) 1300; AVX1-NEXT: vmovdqu %xmm0, (%rax) 1301; AVX1-NEXT: vzeroupper 1302; AVX1-NEXT: retq 1303; 1304; AVX2-LABEL: trunc32i16_32i8: 1305; AVX2: # %bb.0: # %entry 1306; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255] 1307; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 1308; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0 1309; AVX2-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 1310; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] 1311; AVX2-NEXT: vmovdqu %ymm0, (%rax) 1312; AVX2-NEXT: vzeroupper 1313; AVX2-NEXT: retq 1314; 1315; AVX512F-LABEL: trunc32i16_32i8: 1316; AVX512F: # %bb.0: # %entry 1317; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1 1318; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero 1319; AVX512F-NEXT: vpmovdb %zmm1, (%rax) 1320; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1321; AVX512F-NEXT: vpmovdb %zmm0, (%rax) 1322; AVX512F-NEXT: vzeroupper 1323; AVX512F-NEXT: retq 1324; 1325; AVX512VL-LABEL: trunc32i16_32i8: 1326; AVX512VL: # %bb.0: # %entry 1327; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm1 1328; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero 1329; AVX512VL-NEXT: vpmovdb %zmm1, (%rax) 1330; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1331; AVX512VL-NEXT: vpmovdb %zmm0, (%rax) 1332; AVX512VL-NEXT: vzeroupper 1333; AVX512VL-NEXT: retq 1334; 1335; AVX512BW-LABEL: trunc32i16_32i8: 1336; AVX512BW: # %bb.0: # %entry 1337; AVX512BW-NEXT: vpmovwb %zmm0, (%rax) 1338; AVX512BW-NEXT: vzeroupper 1339; AVX512BW-NEXT: retq 1340; 1341; AVX512BWVL-LABEL: trunc32i16_32i8: 1342; AVX512BWVL: # %bb.0: # %entry 1343; AVX512BWVL-NEXT: vpmovwb %zmm0, (%rax) 1344; AVX512BWVL-NEXT: vzeroupper 1345; AVX512BWVL-NEXT: retq 1346entry: 1347 %0 = trunc <32 x i16> %a to <32 x i8> 1348 store <32 x i8> %0, <32 x i8>* undef, align 4 1349 ret void 1350} 1351 1352define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) { 1353; SSE-LABEL: trunc2x4i64_8i32: 1354; SSE: # %bb.0: # %entry 1355; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1356; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2] 1357; SSE-NEXT: movaps %xmm2, %xmm1 1358; SSE-NEXT: retq 1359; 1360; AVX1-LABEL: trunc2x4i64_8i32: 1361; AVX1: # %bb.0: # %entry 1362; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 1363; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 1364; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6] 1365; AVX1-NEXT: retq 1366; 1367; AVX2-SLOW-LABEL: trunc2x4i64_8i32: 1368; AVX2-SLOW: # %bb.0: # %entry 1369; AVX2-SLOW-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 1370; AVX2-SLOW-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 1371; AVX2-SLOW-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6] 1372; AVX2-SLOW-NEXT: retq 1373; 1374; AVX2-FAST-LABEL: trunc2x4i64_8i32: 1375; AVX2-FAST: # %bb.0: # %entry 1376; AVX2-FAST-NEXT: vmovaps {{.*#+}} ymm2 = [0,2,4,6,4,6,6,7] 1377; AVX2-FAST-NEXT: vpermps %ymm0, %ymm2, %ymm0 1378; AVX2-FAST-NEXT: vpermps %ymm1, %ymm2, %ymm1 1379; AVX2-FAST-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 1380; AVX2-FAST-NEXT: retq 1381; 1382; AVX512F-LABEL: trunc2x4i64_8i32: 1383; AVX512F: # %bb.0: # %entry 1384; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 1385; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1386; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 1387; AVX512F-NEXT: vpmovqd %zmm1, %ymm1 1388; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1389; AVX512F-NEXT: retq 1390; 1391; AVX512VL-LABEL: trunc2x4i64_8i32: 1392; AVX512VL: # %bb.0: # %entry 1393; AVX512VL-NEXT: vpmovqd %ymm0, %xmm0 1394; AVX512VL-NEXT: vpmovqd %ymm1, %xmm1 1395; AVX512VL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1396; AVX512VL-NEXT: retq 1397; 1398; AVX512BW-LABEL: trunc2x4i64_8i32: 1399; AVX512BW: # %bb.0: # %entry 1400; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 1401; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1402; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 1403; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1 1404; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1405; AVX512BW-NEXT: retq 1406; 1407; AVX512BWVL-LABEL: trunc2x4i64_8i32: 1408; AVX512BWVL: # %bb.0: # %entry 1409; AVX512BWVL-NEXT: vpmovqd %ymm0, %xmm0 1410; AVX512BWVL-NEXT: vpmovqd %ymm1, %xmm1 1411; AVX512BWVL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1412; AVX512BWVL-NEXT: retq 1413entry: 1414 %0 = trunc <4 x i64> %a to <4 x i32> 1415 %1 = trunc <4 x i64> %b to <4 x i32> 1416 %2 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1417 ret <8 x i32> %2 1418} 1419 1420define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { 1421; SSE2-LABEL: trunc2x4i64_8i16: 1422; SSE2: # %bb.0: # %entry 1423; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1424; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 1425; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1426; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] 1427; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 1428; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 1429; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7] 1430; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 1431; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 1432; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1433; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] 1434; SSE2-NEXT: retq 1435; 1436; SSSE3-LABEL: trunc2x4i64_8i16: 1437; SSSE3: # %bb.0: # %entry 1438; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1439; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 1440; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1441; SSSE3-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] 1442; SSSE3-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 1443; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 1444; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7] 1445; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 1446; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 1447; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1448; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] 1449; SSSE3-NEXT: retq 1450; 1451; SSE41-LABEL: trunc2x4i64_8i16: 1452; SSE41: # %bb.0: # %entry 1453; SSE41-NEXT: pxor %xmm4, %xmm4 1454; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 1455; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 1456; SSE41-NEXT: packusdw %xmm3, %xmm2 1457; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 1458; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 1459; SSE41-NEXT: packusdw %xmm1, %xmm0 1460; SSE41-NEXT: packusdw %xmm2, %xmm0 1461; SSE41-NEXT: retq 1462; 1463; AVX1-LABEL: trunc2x4i64_8i16: 1464; AVX1: # %bb.0: # %entry 1465; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1466; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 1467; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 1468; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 1469; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 1470; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1471; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 1472; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 1473; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 1474; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1475; AVX1-NEXT: vzeroupper 1476; AVX1-NEXT: retq 1477; 1478; AVX2-LABEL: trunc2x4i64_8i16: 1479; AVX2: # %bb.0: # %entry 1480; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 1481; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 1482; AVX2-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 1483; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 1484; AVX2-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 1485; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 1486; AVX2-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 1487; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 1488; AVX2-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 1489; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1490; AVX2-NEXT: vzeroupper 1491; AVX2-NEXT: retq 1492; 1493; AVX512F-LABEL: trunc2x4i64_8i16: 1494; AVX512F: # %bb.0: # %entry 1495; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 1496; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1497; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 1498; AVX512F-NEXT: vpmovqw %zmm1, %xmm1 1499; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1500; AVX512F-NEXT: vzeroupper 1501; AVX512F-NEXT: retq 1502; 1503; AVX512VL-LABEL: trunc2x4i64_8i16: 1504; AVX512VL: # %bb.0: # %entry 1505; AVX512VL-NEXT: vpmovqw %ymm0, %xmm0 1506; AVX512VL-NEXT: vpmovqw %ymm1, %xmm1 1507; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1508; AVX512VL-NEXT: vzeroupper 1509; AVX512VL-NEXT: retq 1510; 1511; AVX512BW-LABEL: trunc2x4i64_8i16: 1512; AVX512BW: # %bb.0: # %entry 1513; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 1514; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1515; AVX512BW-NEXT: vpmovqw %zmm0, %xmm0 1516; AVX512BW-NEXT: vpmovqw %zmm1, %xmm1 1517; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1518; AVX512BW-NEXT: vzeroupper 1519; AVX512BW-NEXT: retq 1520; 1521; AVX512BWVL-LABEL: trunc2x4i64_8i16: 1522; AVX512BWVL: # %bb.0: # %entry 1523; AVX512BWVL-NEXT: vpmovqw %ymm0, %xmm0 1524; AVX512BWVL-NEXT: vpmovqw %ymm1, %xmm1 1525; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1526; AVX512BWVL-NEXT: vzeroupper 1527; AVX512BWVL-NEXT: retq 1528entry: 1529 %0 = trunc <4 x i64> %a to <4 x i16> 1530 %1 = trunc <4 x i64> %b to <4 x i16> 1531 %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1532 ret <8 x i16> %2 1533} 1534 1535define <4 x i32> @trunc2x2i64_4i32(<2 x i64> %a, <2 x i64> %b) { 1536; SSE-LABEL: trunc2x2i64_4i32: 1537; SSE: # %bb.0: # %entry 1538; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1539; SSE-NEXT: retq 1540; 1541; AVX-LABEL: trunc2x2i64_4i32: 1542; AVX: # %bb.0: # %entry 1543; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1544; AVX-NEXT: retq 1545; 1546; AVX512F-LABEL: trunc2x2i64_4i32: 1547; AVX512F: # %bb.0: # %entry 1548; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1549; AVX512F-NEXT: retq 1550; 1551; AVX512VL-LABEL: trunc2x2i64_4i32: 1552; AVX512VL: # %bb.0: # %entry 1553; AVX512VL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1554; AVX512VL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1555; AVX512VL-NEXT: vpmovqd %ymm0, %xmm0 1556; AVX512VL-NEXT: vzeroupper 1557; AVX512VL-NEXT: retq 1558; 1559; AVX512BW-LABEL: trunc2x2i64_4i32: 1560; AVX512BW: # %bb.0: # %entry 1561; AVX512BW-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1562; AVX512BW-NEXT: retq 1563; 1564; AVX512BWVL-LABEL: trunc2x2i64_4i32: 1565; AVX512BWVL: # %bb.0: # %entry 1566; AVX512BWVL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1567; AVX512BWVL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1568; AVX512BWVL-NEXT: vpmovqd %ymm0, %xmm0 1569; AVX512BWVL-NEXT: vzeroupper 1570; AVX512BWVL-NEXT: retq 1571entry: 1572 %0 = trunc <2 x i64> %a to <2 x i32> 1573 %1 = trunc <2 x i64> %b to <2 x i32> 1574 %2 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1575 ret <4 x i32> %2 1576} 1577 1578define i64 @trunc2i64_i64(<2 x i64> %inval) { 1579; SSE-LABEL: trunc2i64_i64: 1580; SSE: # %bb.0: # %entry 1581; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1582; SSE-NEXT: movq %xmm0, %rax 1583; SSE-NEXT: retq 1584; 1585; AVX-LABEL: trunc2i64_i64: 1586; AVX: # %bb.0: # %entry 1587; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1588; AVX-NEXT: vmovq %xmm0, %rax 1589; AVX-NEXT: retq 1590; 1591; AVX512-LABEL: trunc2i64_i64: 1592; AVX512: # %bb.0: # %entry 1593; AVX512-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1594; AVX512-NEXT: vmovq %xmm0, %rax 1595; AVX512-NEXT: retq 1596entry: 1597 %0 = trunc <2 x i64> %inval to <2 x i32> 1598 %1 = bitcast <2 x i32> %0 to i64 1599 ret i64 %1 1600} 1601 1602define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { 1603; SSE2-LABEL: trunc2x4i32_8i16: 1604; SSE2: # %bb.0: # %entry 1605; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 1606; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] 1607; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1608; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 1609; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7] 1610; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1611; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1612; SSE2-NEXT: retq 1613; 1614; SSSE3-LABEL: trunc2x4i32_8i16: 1615; SSSE3: # %bb.0: # %entry 1616; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 1617; SSSE3-NEXT: pshufb %xmm2, %xmm1 1618; SSSE3-NEXT: pshufb %xmm2, %xmm0 1619; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1620; SSSE3-NEXT: retq 1621; 1622; SSE41-LABEL: trunc2x4i32_8i16: 1623; SSE41: # %bb.0: # %entry 1624; SSE41-NEXT: pxor %xmm2, %xmm2 1625; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 1626; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 1627; SSE41-NEXT: packusdw %xmm1, %xmm0 1628; SSE41-NEXT: retq 1629; 1630; AVX-LABEL: trunc2x4i32_8i16: 1631; AVX: # %bb.0: # %entry 1632; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2 1633; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 1634; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 1635; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1636; AVX-NEXT: retq 1637; 1638; AVX512F-LABEL: trunc2x4i32_8i16: 1639; AVX512F: # %bb.0: # %entry 1640; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1641; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1642; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 1643; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 1644; AVX512F-NEXT: vzeroupper 1645; AVX512F-NEXT: retq 1646; 1647; AVX512VL-LABEL: trunc2x4i32_8i16: 1648; AVX512VL: # %bb.0: # %entry 1649; AVX512VL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1650; AVX512VL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1651; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 1652; AVX512VL-NEXT: vzeroupper 1653; AVX512VL-NEXT: retq 1654; 1655; AVX512BW-LABEL: trunc2x4i32_8i16: 1656; AVX512BW: # %bb.0: # %entry 1657; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1658; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1659; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 1660; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 1661; AVX512BW-NEXT: vzeroupper 1662; AVX512BW-NEXT: retq 1663; 1664; AVX512BWVL-LABEL: trunc2x4i32_8i16: 1665; AVX512BWVL: # %bb.0: # %entry 1666; AVX512BWVL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1667; AVX512BWVL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1668; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 1669; AVX512BWVL-NEXT: vzeroupper 1670; AVX512BWVL-NEXT: retq 1671entry: 1672 %0 = trunc <4 x i32> %a to <4 x i16> 1673 %1 = trunc <4 x i32> %b to <4 x i16> 1674 %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1675 ret <8 x i16> %2 1676} 1677 1678; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524 1679define i64 @trunc4i32_i64(<4 x i32> %inval) { 1680; SSE2-LABEL: trunc4i32_i64: 1681; SSE2: # %bb.0: # %entry 1682; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 1683; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7] 1684; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1685; SSE2-NEXT: movq %xmm0, %rax 1686; SSE2-NEXT: retq 1687; 1688; SSSE3-LABEL: trunc4i32_i64: 1689; SSSE3: # %bb.0: # %entry 1690; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u] 1691; SSSE3-NEXT: movq %xmm0, %rax 1692; SSSE3-NEXT: retq 1693; 1694; SSE41-LABEL: trunc4i32_i64: 1695; SSE41: # %bb.0: # %entry 1696; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u] 1697; SSE41-NEXT: movq %xmm0, %rax 1698; SSE41-NEXT: retq 1699; 1700; AVX-LABEL: trunc4i32_i64: 1701; AVX: # %bb.0: # %entry 1702; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u] 1703; AVX-NEXT: vmovq %xmm0, %rax 1704; AVX-NEXT: retq 1705; 1706; AVX512F-LABEL: trunc4i32_i64: 1707; AVX512F: # %bb.0: # %entry 1708; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u] 1709; AVX512F-NEXT: vmovq %xmm0, %rax 1710; AVX512F-NEXT: retq 1711; 1712; AVX512VL-LABEL: trunc4i32_i64: 1713; AVX512VL: # %bb.0: # %entry 1714; AVX512VL-NEXT: vpmovdw %xmm0, %xmm0 1715; AVX512VL-NEXT: vmovq %xmm0, %rax 1716; AVX512VL-NEXT: retq 1717; 1718; AVX512BW-LABEL: trunc4i32_i64: 1719; AVX512BW: # %bb.0: # %entry 1720; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u] 1721; AVX512BW-NEXT: vmovq %xmm0, %rax 1722; AVX512BW-NEXT: retq 1723; 1724; AVX512BWVL-LABEL: trunc4i32_i64: 1725; AVX512BWVL: # %bb.0: # %entry 1726; AVX512BWVL-NEXT: vpmovdw %xmm0, %xmm0 1727; AVX512BWVL-NEXT: vmovq %xmm0, %rax 1728; AVX512BWVL-NEXT: retq 1729entry: 1730 %0 = trunc <4 x i32> %inval to <4 x i16> 1731 %1 = bitcast <4 x i16> %0 to i64 1732 ret i64 %1 1733} 1734 1735define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) { 1736; SSE2-LABEL: trunc2x8i16_16i8: 1737; SSE2: # %bb.0: # %entry 1738; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 1739; SSE2-NEXT: pand %xmm2, %xmm0 1740; SSE2-NEXT: pand %xmm2, %xmm1 1741; SSE2-NEXT: packuswb %xmm1, %xmm0 1742; SSE2-NEXT: retq 1743; 1744; SSSE3-LABEL: trunc2x8i16_16i8: 1745; SSSE3: # %bb.0: # %entry 1746; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1747; SSSE3-NEXT: pand %xmm2, %xmm1 1748; SSSE3-NEXT: pand %xmm2, %xmm0 1749; SSSE3-NEXT: packuswb %xmm1, %xmm0 1750; SSSE3-NEXT: retq 1751; 1752; SSE41-LABEL: trunc2x8i16_16i8: 1753; SSE41: # %bb.0: # %entry 1754; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1755; SSE41-NEXT: pand %xmm2, %xmm1 1756; SSE41-NEXT: pand %xmm2, %xmm0 1757; SSE41-NEXT: packuswb %xmm1, %xmm0 1758; SSE41-NEXT: retq 1759; 1760; AVX-LABEL: trunc2x8i16_16i8: 1761; AVX: # %bb.0: # %entry 1762; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1763; AVX-NEXT: vpand %xmm2, %xmm1, %xmm1 1764; AVX-NEXT: vpand %xmm2, %xmm0, %xmm0 1765; AVX-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1766; AVX-NEXT: retq 1767; 1768; AVX512F-LABEL: trunc2x8i16_16i8: 1769; AVX512F: # %bb.0: # %entry 1770; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1771; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1 1772; AVX512F-NEXT: vpand %xmm2, %xmm0, %xmm0 1773; AVX512F-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1774; AVX512F-NEXT: retq 1775; 1776; AVX512VL-LABEL: trunc2x8i16_16i8: 1777; AVX512VL: # %bb.0: # %entry 1778; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1779; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm1 1780; AVX512VL-NEXT: vpand %xmm2, %xmm0, %xmm0 1781; AVX512VL-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1782; AVX512VL-NEXT: retq 1783; 1784; AVX512BW-LABEL: trunc2x8i16_16i8: 1785; AVX512BW: # %bb.0: # %entry 1786; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1787; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1788; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1789; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 1790; AVX512BW-NEXT: vzeroupper 1791; AVX512BW-NEXT: retq 1792; 1793; AVX512BWVL-LABEL: trunc2x8i16_16i8: 1794; AVX512BWVL: # %bb.0: # %entry 1795; AVX512BWVL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1796; AVX512BWVL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1797; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0 1798; AVX512BWVL-NEXT: vzeroupper 1799; AVX512BWVL-NEXT: retq 1800entry: 1801 %0 = trunc <8 x i16> %a to <8 x i8> 1802 %1 = trunc <8 x i16> %b to <8 x i8> 1803 %2 = shufflevector <8 x i8> %0, <8 x i8> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 1804 ret <16 x i8> %2 1805} 1806 1807; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524 1808define i64 @trunc8i16_i64(<8 x i16> %inval) { 1809; SSE2-LABEL: trunc8i16_i64: 1810; SSE2: # %bb.0: # %entry 1811; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 1812; SSE2-NEXT: packuswb %xmm0, %xmm0 1813; SSE2-NEXT: movq %xmm0, %rax 1814; SSE2-NEXT: retq 1815; 1816; SSSE3-LABEL: trunc8i16_i64: 1817; SSSE3: # %bb.0: # %entry 1818; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1819; SSSE3-NEXT: movq %xmm0, %rax 1820; SSSE3-NEXT: retq 1821; 1822; SSE41-LABEL: trunc8i16_i64: 1823; SSE41: # %bb.0: # %entry 1824; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1825; SSE41-NEXT: movq %xmm0, %rax 1826; SSE41-NEXT: retq 1827; 1828; AVX-LABEL: trunc8i16_i64: 1829; AVX: # %bb.0: # %entry 1830; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1831; AVX-NEXT: vmovq %xmm0, %rax 1832; AVX-NEXT: retq 1833; 1834; AVX512F-LABEL: trunc8i16_i64: 1835; AVX512F: # %bb.0: # %entry 1836; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1837; AVX512F-NEXT: vmovq %xmm0, %rax 1838; AVX512F-NEXT: retq 1839; 1840; AVX512VL-LABEL: trunc8i16_i64: 1841; AVX512VL: # %bb.0: # %entry 1842; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1843; AVX512VL-NEXT: vmovq %xmm0, %rax 1844; AVX512VL-NEXT: retq 1845; 1846; AVX512BW-LABEL: trunc8i16_i64: 1847; AVX512BW: # %bb.0: # %entry 1848; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1849; AVX512BW-NEXT: vmovq %xmm0, %rax 1850; AVX512BW-NEXT: retq 1851; 1852; AVX512BWVL-LABEL: trunc8i16_i64: 1853; AVX512BWVL: # %bb.0: # %entry 1854; AVX512BWVL-NEXT: vpmovwb %xmm0, %xmm0 1855; AVX512BWVL-NEXT: vmovq %xmm0, %rax 1856; AVX512BWVL-NEXT: retq 1857entry: 1858 %0 = trunc <8 x i16> %inval to <8 x i8> 1859 %1 = bitcast <8 x i8> %0 to i64 1860 ret i64 %1 1861} 1862 1863define <16 x i8> @trunc16i64_16i8_const() { 1864; SSE-LABEL: trunc16i64_16i8_const: 1865; SSE: # %bb.0: # %entry 1866; SSE-NEXT: xorps %xmm0, %xmm0 1867; SSE-NEXT: retq 1868; 1869; AVX-LABEL: trunc16i64_16i8_const: 1870; AVX: # %bb.0: # %entry 1871; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0 1872; AVX-NEXT: retq 1873; 1874; AVX512-LABEL: trunc16i64_16i8_const: 1875; AVX512: # %bb.0: # %entry 1876; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0 1877; AVX512-NEXT: retq 1878 1879entry: 1880 %0 = trunc <16 x i64> zeroinitializer to <16 x i8> 1881 %1 = shufflevector <16 x i8> %0, <16 x i8> %0, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 undef, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26> 1882 ret <16 x i8> %1 1883} 1884 1885define <8 x i16> @PR32160(<8 x i32> %x) { 1886; SSE-LABEL: PR32160: 1887; SSE: # %bb.0: 1888; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,4,4] 1889; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,2,2] 1890; SSE-NEXT: retq 1891; 1892; AVX1-LABEL: PR32160: 1893; AVX1: # %bb.0: 1894; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[8,9,8,9,8,9,8,9,8,9,8,9,8,9,8,9] 1895; AVX1-NEXT: vzeroupper 1896; AVX1-NEXT: retq 1897; 1898; AVX2-SLOW-LABEL: PR32160: 1899; AVX2-SLOW: # %bb.0: 1900; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,2,2] 1901; AVX2-SLOW-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[2,2,2,2,4,5,6,7] 1902; AVX2-SLOW-NEXT: vpbroadcastd %xmm0, %xmm0 1903; AVX2-SLOW-NEXT: vzeroupper 1904; AVX2-SLOW-NEXT: retq 1905; 1906; AVX2-FAST-LABEL: PR32160: 1907; AVX2-FAST: # %bb.0: 1908; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[8,9,8,9,8,9,8,9,8,9,8,9,8,9,8,9] 1909; AVX2-FAST-NEXT: vzeroupper 1910; AVX2-FAST-NEXT: retq 1911; 1912; AVX512F-LABEL: PR32160: 1913; AVX512F: # %bb.0: 1914; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1915; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 1916; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[2,2,2,2,4,5,6,7] 1917; AVX512F-NEXT: vpbroadcastd %xmm0, %xmm0 1918; AVX512F-NEXT: vzeroupper 1919; AVX512F-NEXT: retq 1920; 1921; AVX512VL-LABEL: PR32160: 1922; AVX512VL: # %bb.0: 1923; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 1924; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,4,5,4,5,4,5,4,5,4,5] 1925; AVX512VL-NEXT: vzeroupper 1926; AVX512VL-NEXT: retq 1927; 1928; AVX512BW-LABEL: PR32160: 1929; AVX512BW: # %bb.0: 1930; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1931; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 1932; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,4,5,4,5,4,5,4,5,4,5] 1933; AVX512BW-NEXT: vzeroupper 1934; AVX512BW-NEXT: retq 1935; 1936; AVX512BWVL-LABEL: PR32160: 1937; AVX512BWVL: # %bb.0: 1938; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 1939; AVX512BWVL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,4,5,4,5,4,5,4,5,4,5] 1940; AVX512BWVL-NEXT: vzeroupper 1941; AVX512BWVL-NEXT: retq 1942 %shuf = trunc <8 x i32> %x to <8 x i16> 1943 %trunc = shufflevector <8 x i16> %shuf, <8 x i16> undef, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2> 1944 ret <8 x i16> %trunc 1945} 1946 1947define void @PR34773(i16* %a0, i8* %a1) { 1948; SSE-LABEL: PR34773: 1949; SSE: # %bb.0: 1950; SSE-NEXT: movdqu (%rdi), %xmm0 1951; SSE-NEXT: movdqu 16(%rdi), %xmm1 1952; SSE-NEXT: movdqu 32(%rdi), %xmm2 1953; SSE-NEXT: movdqu 48(%rdi), %xmm3 1954; SSE-NEXT: psrlw $8, %xmm1 1955; SSE-NEXT: psrlw $8, %xmm0 1956; SSE-NEXT: packuswb %xmm1, %xmm0 1957; SSE-NEXT: psrlw $8, %xmm3 1958; SSE-NEXT: psrlw $8, %xmm2 1959; SSE-NEXT: packuswb %xmm3, %xmm2 1960; SSE-NEXT: movdqu %xmm0, (%rsi) 1961; SSE-NEXT: movdqu %xmm2, 16(%rsi) 1962; SSE-NEXT: retq 1963; 1964; AVX1-LABEL: PR34773: 1965; AVX1: # %bb.0: 1966; AVX1-NEXT: vmovdqu (%rdi), %xmm0 1967; AVX1-NEXT: vmovdqu 16(%rdi), %xmm1 1968; AVX1-NEXT: vmovdqu 32(%rdi), %xmm2 1969; AVX1-NEXT: vmovdqu 48(%rdi), %xmm3 1970; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 1971; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 1972; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1973; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm1 1974; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 1975; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 1976; AVX1-NEXT: vmovdqu %xmm0, (%rsi) 1977; AVX1-NEXT: vmovdqu %xmm1, 16(%rsi) 1978; AVX1-NEXT: retq 1979; 1980; AVX2-LABEL: PR34773: 1981; AVX2: # %bb.0: 1982; AVX2-NEXT: vmovdqu (%rdi), %ymm0 1983; AVX2-NEXT: vmovdqu 32(%rdi), %ymm1 1984; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0 1985; AVX2-NEXT: vpsrlw $8, %ymm1, %ymm1 1986; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 1987; AVX2-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 1988; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 1989; AVX2-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 1990; AVX2-NEXT: vmovdqu %xmm0, (%rsi) 1991; AVX2-NEXT: vmovdqu %xmm1, 16(%rsi) 1992; AVX2-NEXT: vzeroupper 1993; AVX2-NEXT: retq 1994; 1995; AVX512F-LABEL: PR34773: 1996; AVX512F: # %bb.0: 1997; AVX512F-NEXT: vmovdqu (%rdi), %ymm0 1998; AVX512F-NEXT: vmovdqu 32(%rdi), %ymm1 1999; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 2000; AVX512F-NEXT: vpsrlw $8, %ymm1, %ymm1 2001; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 2002; AVX512F-NEXT: vpmovdb %zmm0, (%rsi) 2003; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero 2004; AVX512F-NEXT: vpmovdb %zmm0, 16(%rsi) 2005; AVX512F-NEXT: vzeroupper 2006; AVX512F-NEXT: retq 2007; 2008; AVX512VL-LABEL: PR34773: 2009; AVX512VL: # %bb.0: 2010; AVX512VL-NEXT: vmovdqu (%rdi), %ymm0 2011; AVX512VL-NEXT: vmovdqu 32(%rdi), %ymm1 2012; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 2013; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1 2014; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 2015; AVX512VL-NEXT: vpmovdb %zmm0, (%rsi) 2016; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero 2017; AVX512VL-NEXT: vpmovdb %zmm0, 16(%rsi) 2018; AVX512VL-NEXT: vzeroupper 2019; AVX512VL-NEXT: retq 2020; 2021; AVX512BW-LABEL: PR34773: 2022; AVX512BW: # %bb.0: 2023; AVX512BW-NEXT: vmovdqu (%rdi), %ymm0 2024; AVX512BW-NEXT: vmovdqu 32(%rdi), %ymm1 2025; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 2026; AVX512BW-NEXT: vpsrlw $8, %ymm1, %ymm1 2027; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 2028; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 2029; AVX512BW-NEXT: vmovdqu %xmm0, (%rsi) 2030; AVX512BW-NEXT: vmovdqu %xmm1, 16(%rsi) 2031; AVX512BW-NEXT: vzeroupper 2032; AVX512BW-NEXT: retq 2033; 2034; AVX512BWVL-LABEL: PR34773: 2035; AVX512BWVL: # %bb.0: 2036; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %ymm0 2037; AVX512BWVL-NEXT: vpsrlw $8, 32(%rdi), %ymm1 2038; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rsi) 2039; AVX512BWVL-NEXT: vpmovwb %ymm1, 16(%rsi) 2040; AVX512BWVL-NEXT: vzeroupper 2041; AVX512BWVL-NEXT: retq 2042 %1 = getelementptr i16, i16* %a0, i64 16 2043 %2 = getelementptr i8, i8* %a1, i64 16 2044 %3 = bitcast i16* %a0 to <16 x i16>* 2045 %4 = bitcast i16* %1 to <16 x i16>* 2046 %5 = bitcast i8* %a1 to <16 x i8>* 2047 %6 = bitcast i8* %2 to <16 x i8>* 2048 %7 = load <16 x i16>, <16 x i16>* %3, align 2 2049 %8 = load <16 x i16>, <16 x i16>* %4, align 2 2050 %9 = lshr <16 x i16> %7, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8> 2051 %10 = lshr <16 x i16> %8, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8> 2052 %11 = trunc <16 x i16> %9 to <16 x i8> 2053 %12 = trunc <16 x i16> %10 to <16 x i8> 2054 store <16 x i8> %11, <16 x i8>* %5, align 1 2055 store <16 x i8> %12, <16 x i8>* %6, align 1 2056 ret void 2057} 2058 2059; Store merging must not infinitely fight store splitting. 2060 2061define void @store_merge_split(<8 x i32> %w1, <8 x i32> %w2, i64 %idx, <8 x i16>* %p) align 2 { 2062; SSE2-LABEL: store_merge_split: 2063; SSE2: # %bb.0: 2064; SSE2-NEXT: pslld $16, %xmm1 2065; SSE2-NEXT: psrad $16, %xmm1 2066; SSE2-NEXT: pslld $16, %xmm0 2067; SSE2-NEXT: psrad $16, %xmm0 2068; SSE2-NEXT: packssdw %xmm1, %xmm0 2069; SSE2-NEXT: pslld $16, %xmm3 2070; SSE2-NEXT: psrad $16, %xmm3 2071; SSE2-NEXT: pslld $16, %xmm2 2072; SSE2-NEXT: psrad $16, %xmm2 2073; SSE2-NEXT: packssdw %xmm3, %xmm2 2074; SSE2-NEXT: shlq $4, %rdi 2075; SSE2-NEXT: movdqu %xmm0, (%rsi,%rdi) 2076; SSE2-NEXT: movdqu %xmm2, 16(%rsi,%rdi) 2077; SSE2-NEXT: retq 2078; 2079; SSSE3-LABEL: store_merge_split: 2080; SSSE3: # %bb.0: 2081; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 2082; SSSE3-NEXT: pshufb %xmm4, %xmm1 2083; SSSE3-NEXT: pshufb %xmm4, %xmm0 2084; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2085; SSSE3-NEXT: pshufb %xmm4, %xmm3 2086; SSSE3-NEXT: pshufb %xmm4, %xmm2 2087; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] 2088; SSSE3-NEXT: shlq $4, %rdi 2089; SSSE3-NEXT: movdqu %xmm0, (%rsi,%rdi) 2090; SSSE3-NEXT: movdqu %xmm2, 16(%rsi,%rdi) 2091; SSSE3-NEXT: retq 2092; 2093; SSE41-LABEL: store_merge_split: 2094; SSE41: # %bb.0: 2095; SSE41-NEXT: pxor %xmm4, %xmm4 2096; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7] 2097; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7] 2098; SSE41-NEXT: packusdw %xmm1, %xmm0 2099; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7] 2100; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7] 2101; SSE41-NEXT: packusdw %xmm3, %xmm2 2102; SSE41-NEXT: shlq $4, %rdi 2103; SSE41-NEXT: movdqu %xmm0, (%rsi,%rdi) 2104; SSE41-NEXT: movdqu %xmm2, 16(%rsi,%rdi) 2105; SSE41-NEXT: retq 2106; 2107; AVX1-LABEL: store_merge_split: 2108; AVX1: # %bb.0: 2109; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 2110; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = <0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u> 2111; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2 2112; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 2113; AVX1-NEXT: vpshufb %xmm4, %xmm0, %xmm0 2114; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2115; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 2116; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2 2117; AVX1-NEXT: vpshufb %xmm4, %xmm1, %xmm1 2118; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2119; AVX1-NEXT: shlq $4, %rdi 2120; AVX1-NEXT: vmovdqu %xmm0, (%rsi,%rdi) 2121; AVX1-NEXT: vmovdqu %xmm1, 16(%rsi,%rdi) 2122; AVX1-NEXT: vzeroupper 2123; AVX1-NEXT: retq 2124; 2125; AVX2-LABEL: store_merge_split: 2126; AVX2: # %bb.0: 2127; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2128; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 2129; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2130; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 2131; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2132; AVX2-NEXT: shlq $4, %rdi 2133; AVX2-NEXT: vmovdqu %xmm0, (%rsi,%rdi) 2134; AVX2-NEXT: vmovdqu %xmm1, 16(%rsi,%rdi) 2135; AVX2-NEXT: vzeroupper 2136; AVX2-NEXT: retq 2137; 2138; AVX512F-LABEL: store_merge_split: 2139; AVX512F: # %bb.0: 2140; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 2141; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 2142; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 2143; AVX512F-NEXT: vpmovdw %zmm1, %ymm1 2144; AVX512F-NEXT: shlq $4, %rdi 2145; AVX512F-NEXT: vmovdqu %xmm0, (%rsi,%rdi) 2146; AVX512F-NEXT: vmovdqu %xmm1, 16(%rsi,%rdi) 2147; AVX512F-NEXT: vzeroupper 2148; AVX512F-NEXT: retq 2149; 2150; AVX512VL-LABEL: store_merge_split: 2151; AVX512VL: # %bb.0: 2152; AVX512VL-NEXT: shlq $4, %rdi 2153; AVX512VL-NEXT: vpmovdw %ymm0, (%rsi,%rdi) 2154; AVX512VL-NEXT: vpmovdw %ymm1, 16(%rsi,%rdi) 2155; AVX512VL-NEXT: vzeroupper 2156; AVX512VL-NEXT: retq 2157; 2158; AVX512BW-LABEL: store_merge_split: 2159; AVX512BW: # %bb.0: 2160; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 2161; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 2162; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 2163; AVX512BW-NEXT: vpmovdw %zmm1, %ymm1 2164; AVX512BW-NEXT: shlq $4, %rdi 2165; AVX512BW-NEXT: vmovdqu %xmm0, (%rsi,%rdi) 2166; AVX512BW-NEXT: vmovdqu %xmm1, 16(%rsi,%rdi) 2167; AVX512BW-NEXT: vzeroupper 2168; AVX512BW-NEXT: retq 2169; 2170; AVX512BWVL-LABEL: store_merge_split: 2171; AVX512BWVL: # %bb.0: 2172; AVX512BWVL-NEXT: shlq $4, %rdi 2173; AVX512BWVL-NEXT: vpmovdw %ymm0, (%rsi,%rdi) 2174; AVX512BWVL-NEXT: vpmovdw %ymm1, 16(%rsi,%rdi) 2175; AVX512BWVL-NEXT: vzeroupper 2176; AVX512BWVL-NEXT: retq 2177 %t1 = trunc <8 x i32> %w1 to <8 x i16> 2178 %t2 = trunc <8 x i32> %w2 to <8 x i16> 2179 %g1 = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i64 %idx 2180 %g2 = getelementptr inbounds <8 x i16>, <8 x i16>* %g1, i64 1 2181 store <8 x i16> %t1, <8 x i16>* %g1, align 2 2182 store <8 x i16> %t2, <8 x i16>* %g2, align 2 2183 ret void 2184} 2185