1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST 8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F 9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512VL 10; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BW 11; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512BWVL 12 13define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) { 14; SSE-LABEL: trunc8i64_8i32: 15; SSE: # %bb.0: # %entry 16; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 17; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2] 18; SSE-NEXT: movaps %xmm2, %xmm1 19; SSE-NEXT: retq 20; 21; AVX1-LABEL: trunc8i64_8i32: 22; AVX1: # %bb.0: # %entry 23; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 24; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 25; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6] 26; AVX1-NEXT: retq 27; 28; AVX2-SLOW-LABEL: trunc8i64_8i32: 29; AVX2-SLOW: # %bb.0: # %entry 30; AVX2-SLOW-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 31; AVX2-SLOW-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 32; AVX2-SLOW-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6] 33; AVX2-SLOW-NEXT: retq 34; 35; AVX2-FAST-LABEL: trunc8i64_8i32: 36; AVX2-FAST: # %bb.0: # %entry 37; AVX2-FAST-NEXT: vmovaps {{.*#+}} ymm2 = [0,2,4,6,4,6,6,7] 38; AVX2-FAST-NEXT: vpermps %ymm0, %ymm2, %ymm0 39; AVX2-FAST-NEXT: vpermps %ymm1, %ymm2, %ymm1 40; AVX2-FAST-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 41; AVX2-FAST-NEXT: retq 42; 43; AVX512-LABEL: trunc8i64_8i32: 44; AVX512: # %bb.0: # %entry 45; AVX512-NEXT: vpmovqd %zmm0, %ymm0 46; AVX512-NEXT: retq 47entry: 48 %0 = trunc <8 x i64> %a to <8 x i32> 49 ret <8 x i32> %0 50} 51 52define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) { 53; SSE-LABEL: trunc8i64_8i32_ashr: 54; SSE: # %bb.0: # %entry 55; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3] 56; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[1,3] 57; SSE-NEXT: movaps %xmm2, %xmm1 58; SSE-NEXT: retq 59; 60; AVX1-LABEL: trunc8i64_8i32_ashr: 61; AVX1: # %bb.0: # %entry 62; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 63; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 64; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7] 65; AVX1-NEXT: retq 66; 67; AVX2-SLOW-LABEL: trunc8i64_8i32_ashr: 68; AVX2-SLOW: # %bb.0: # %entry 69; AVX2-SLOW-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 70; AVX2-SLOW-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 71; AVX2-SLOW-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7] 72; AVX2-SLOW-NEXT: retq 73; 74; AVX2-FAST-LABEL: trunc8i64_8i32_ashr: 75; AVX2-FAST: # %bb.0: # %entry 76; AVX2-FAST-NEXT: vmovaps {{.*#+}} xmm2 = [1,3,5,7] 77; AVX2-FAST-NEXT: vpermps %ymm0, %ymm2, %ymm0 78; AVX2-FAST-NEXT: vpermps %ymm1, %ymm2, %ymm1 79; AVX2-FAST-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 80; AVX2-FAST-NEXT: retq 81; 82; AVX512-LABEL: trunc8i64_8i32_ashr: 83; AVX512: # %bb.0: # %entry 84; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 85; AVX512-NEXT: vpmovqd %zmm0, %ymm0 86; AVX512-NEXT: retq 87entry: 88 %0 = ashr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32> 89 %1 = trunc <8 x i64> %0 to <8 x i32> 90 ret <8 x i32> %1 91} 92 93define <8 x i32> @trunc8i64_8i32_lshr(<8 x i64> %a) { 94; SSE-LABEL: trunc8i64_8i32_lshr: 95; SSE: # %bb.0: # %entry 96; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3] 97; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[1,3] 98; SSE-NEXT: movaps %xmm2, %xmm1 99; SSE-NEXT: retq 100; 101; AVX1-LABEL: trunc8i64_8i32_lshr: 102; AVX1: # %bb.0: # %entry 103; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 104; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 105; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7] 106; AVX1-NEXT: retq 107; 108; AVX2-SLOW-LABEL: trunc8i64_8i32_lshr: 109; AVX2-SLOW: # %bb.0: # %entry 110; AVX2-SLOW-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 111; AVX2-SLOW-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 112; AVX2-SLOW-NEXT: vshufps {{.*#+}} ymm0 = ymm0[1,3],ymm2[1,3],ymm0[5,7],ymm2[5,7] 113; AVX2-SLOW-NEXT: retq 114; 115; AVX2-FAST-LABEL: trunc8i64_8i32_lshr: 116; AVX2-FAST: # %bb.0: # %entry 117; AVX2-FAST-NEXT: vmovaps {{.*#+}} xmm2 = [1,3,5,7] 118; AVX2-FAST-NEXT: vpermps %ymm0, %ymm2, %ymm0 119; AVX2-FAST-NEXT: vpermps %ymm1, %ymm2, %ymm1 120; AVX2-FAST-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 121; AVX2-FAST-NEXT: retq 122; 123; AVX512-LABEL: trunc8i64_8i32_lshr: 124; AVX512: # %bb.0: # %entry 125; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 126; AVX512-NEXT: vpmovqd %zmm0, %ymm0 127; AVX512-NEXT: retq 128entry: 129 %0 = lshr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32> 130 %1 = trunc <8 x i64> %0 to <8 x i32> 131 ret <8 x i32> %1 132} 133 134define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) { 135; SSE2-LABEL: trunc8i64_8i16: 136; SSE2: # %bb.0: # %entry 137; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 138; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 139; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 140; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] 141; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 142; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 143; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7] 144; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 145; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 146; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 147; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] 148; SSE2-NEXT: retq 149; 150; SSSE3-LABEL: trunc8i64_8i16: 151; SSSE3: # %bb.0: # %entry 152; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 153; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 154; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 155; SSSE3-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] 156; SSSE3-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 157; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 158; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7] 159; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 160; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 161; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 162; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] 163; SSSE3-NEXT: retq 164; 165; SSE41-LABEL: trunc8i64_8i16: 166; SSE41: # %bb.0: # %entry 167; SSE41-NEXT: pxor %xmm4, %xmm4 168; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 169; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 170; SSE41-NEXT: packusdw %xmm3, %xmm2 171; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 172; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 173; SSE41-NEXT: packusdw %xmm1, %xmm0 174; SSE41-NEXT: packusdw %xmm2, %xmm0 175; SSE41-NEXT: retq 176; 177; AVX1-LABEL: trunc8i64_8i16: 178; AVX1: # %bb.0: # %entry 179; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535] 180; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 181; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 182; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 183; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 184; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 185; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 186; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 187; AVX1-NEXT: vzeroupper 188; AVX1-NEXT: retq 189; 190; AVX2-LABEL: trunc8i64_8i16: 191; AVX2: # %bb.0: # %entry 192; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 193; AVX2-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1,2,3],ymm1[4],ymm2[5,6,7],ymm1[8],ymm2[9,10,11],ymm1[12],ymm2[13,14,15] 194; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm2[1,2,3],ymm0[4],ymm2[5,6,7],ymm0[8],ymm2[9,10,11],ymm0[12],ymm2[13,14,15] 195; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 196; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 197; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 198; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3] 199; AVX2-NEXT: vzeroupper 200; AVX2-NEXT: retq 201; 202; AVX512-LABEL: trunc8i64_8i16: 203; AVX512: # %bb.0: # %entry 204; AVX512-NEXT: vpmovqw %zmm0, %xmm0 205; AVX512-NEXT: vzeroupper 206; AVX512-NEXT: retq 207entry: 208 %0 = trunc <8 x i64> %a to <8 x i16> 209 ret <8 x i16> %0 210} 211 212define void @trunc8i64_8i8(<8 x i64> %a) { 213; SSE2-LABEL: trunc8i64_8i8: 214; SSE2: # %bb.0: # %entry 215; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 216; SSE2-NEXT: pand %xmm4, %xmm3 217; SSE2-NEXT: pand %xmm4, %xmm2 218; SSE2-NEXT: packuswb %xmm3, %xmm2 219; SSE2-NEXT: pand %xmm4, %xmm1 220; SSE2-NEXT: pand %xmm4, %xmm0 221; SSE2-NEXT: packuswb %xmm1, %xmm0 222; SSE2-NEXT: packuswb %xmm2, %xmm0 223; SSE2-NEXT: packuswb %xmm0, %xmm0 224; SSE2-NEXT: movq %xmm0, (%rax) 225; SSE2-NEXT: retq 226; 227; SSSE3-LABEL: trunc8i64_8i8: 228; SSSE3: # %bb.0: # %entry 229; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 230; SSSE3-NEXT: pand %xmm4, %xmm3 231; SSSE3-NEXT: pand %xmm4, %xmm2 232; SSSE3-NEXT: packuswb %xmm3, %xmm2 233; SSSE3-NEXT: pand %xmm4, %xmm1 234; SSSE3-NEXT: pand %xmm4, %xmm0 235; SSSE3-NEXT: packuswb %xmm1, %xmm0 236; SSSE3-NEXT: packuswb %xmm2, %xmm0 237; SSSE3-NEXT: packuswb %xmm0, %xmm0 238; SSSE3-NEXT: movq %xmm0, (%rax) 239; SSSE3-NEXT: retq 240; 241; SSE41-LABEL: trunc8i64_8i8: 242; SSE41: # %bb.0: # %entry 243; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 244; SSE41-NEXT: pand %xmm4, %xmm3 245; SSE41-NEXT: pand %xmm4, %xmm2 246; SSE41-NEXT: packusdw %xmm3, %xmm2 247; SSE41-NEXT: pand %xmm4, %xmm1 248; SSE41-NEXT: pand %xmm4, %xmm0 249; SSE41-NEXT: packusdw %xmm1, %xmm0 250; SSE41-NEXT: packusdw %xmm2, %xmm0 251; SSE41-NEXT: packuswb %xmm0, %xmm0 252; SSE41-NEXT: movq %xmm0, (%rax) 253; SSE41-NEXT: retq 254; 255; AVX1-LABEL: trunc8i64_8i8: 256; AVX1: # %bb.0: # %entry 257; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [255,255,255,255] 258; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 259; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 260; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 261; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 262; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 263; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 264; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 265; AVX1-NEXT: vpackuswb %xmm0, %xmm0, %xmm0 266; AVX1-NEXT: vmovq %xmm0, (%rax) 267; AVX1-NEXT: vzeroupper 268; AVX1-NEXT: retq 269; 270; AVX2-LABEL: trunc8i64_8i8: 271; AVX2: # %bb.0: # %entry 272; AVX2-NEXT: vpbroadcastq {{.*#+}} ymm2 = [255,255,255,255] 273; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 274; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0 275; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 276; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 277; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 278; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3] 279; AVX2-NEXT: vpackuswb %xmm0, %xmm0, %xmm0 280; AVX2-NEXT: vmovq %xmm0, (%rax) 281; AVX2-NEXT: vzeroupper 282; AVX2-NEXT: retq 283; 284; AVX512-LABEL: trunc8i64_8i8: 285; AVX512: # %bb.0: # %entry 286; AVX512-NEXT: vpmovqb %zmm0, (%rax) 287; AVX512-NEXT: vzeroupper 288; AVX512-NEXT: retq 289entry: 290 %0 = trunc <8 x i64> %a to <8 x i8> 291 store <8 x i8> %0, <8 x i8>* undef, align 4 292 ret void 293} 294 295define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { 296; SSE2-LABEL: trunc8i32_8i16: 297; SSE2: # %bb.0: # %entry 298; SSE2-NEXT: pslld $16, %xmm1 299; SSE2-NEXT: psrad $16, %xmm1 300; SSE2-NEXT: pslld $16, %xmm0 301; SSE2-NEXT: psrad $16, %xmm0 302; SSE2-NEXT: packssdw %xmm1, %xmm0 303; SSE2-NEXT: retq 304; 305; SSSE3-LABEL: trunc8i32_8i16: 306; SSSE3: # %bb.0: # %entry 307; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 308; SSSE3-NEXT: pshufb %xmm2, %xmm1 309; SSSE3-NEXT: pshufb %xmm2, %xmm0 310; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 311; SSSE3-NEXT: retq 312; 313; SSE41-LABEL: trunc8i32_8i16: 314; SSE41: # %bb.0: # %entry 315; SSE41-NEXT: pxor %xmm2, %xmm2 316; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 317; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 318; SSE41-NEXT: packusdw %xmm1, %xmm0 319; SSE41-NEXT: retq 320; 321; AVX1-LABEL: trunc8i32_8i16: 322; AVX1: # %bb.0: # %entry 323; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 324; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u> 325; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 326; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 327; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 328; AVX1-NEXT: vzeroupper 329; AVX1-NEXT: retq 330; 331; AVX2-LABEL: trunc8i32_8i16: 332; AVX2: # %bb.0: # %entry 333; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u,16,17,20,21,24,25,28,29,u,u,u,u,u,u,u,u] 334; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 335; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 336; AVX2-NEXT: vzeroupper 337; AVX2-NEXT: retq 338; 339; AVX512F-LABEL: trunc8i32_8i16: 340; AVX512F: # %bb.0: # %entry 341; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 342; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 343; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 344; AVX512F-NEXT: vzeroupper 345; AVX512F-NEXT: retq 346; 347; AVX512VL-LABEL: trunc8i32_8i16: 348; AVX512VL: # %bb.0: # %entry 349; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 350; AVX512VL-NEXT: vzeroupper 351; AVX512VL-NEXT: retq 352; 353; AVX512BW-LABEL: trunc8i32_8i16: 354; AVX512BW: # %bb.0: # %entry 355; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 356; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 357; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 358; AVX512BW-NEXT: vzeroupper 359; AVX512BW-NEXT: retq 360; 361; AVX512BWVL-LABEL: trunc8i32_8i16: 362; AVX512BWVL: # %bb.0: # %entry 363; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 364; AVX512BWVL-NEXT: vzeroupper 365; AVX512BWVL-NEXT: retq 366entry: 367 %0 = trunc <8 x i32> %a to <8 x i16> 368 ret <8 x i16> %0 369} 370 371define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) { 372; SSE2-LABEL: trunc8i32_8i16_ashr: 373; SSE2: # %bb.0: # %entry 374; SSE2-NEXT: psrad $16, %xmm1 375; SSE2-NEXT: psrad $16, %xmm0 376; SSE2-NEXT: packssdw %xmm1, %xmm0 377; SSE2-NEXT: retq 378; 379; SSSE3-LABEL: trunc8i32_8i16_ashr: 380; SSSE3: # %bb.0: # %entry 381; SSSE3-NEXT: psrad $16, %xmm1 382; SSSE3-NEXT: psrad $16, %xmm0 383; SSSE3-NEXT: packssdw %xmm1, %xmm0 384; SSSE3-NEXT: retq 385; 386; SSE41-LABEL: trunc8i32_8i16_ashr: 387; SSE41: # %bb.0: # %entry 388; SSE41-NEXT: psrld $16, %xmm1 389; SSE41-NEXT: psrld $16, %xmm0 390; SSE41-NEXT: packusdw %xmm1, %xmm0 391; SSE41-NEXT: retq 392; 393; AVX1-LABEL: trunc8i32_8i16_ashr: 394; AVX1: # %bb.0: # %entry 395; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 396; AVX1-NEXT: vpsrld $16, %xmm1, %xmm1 397; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 398; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 399; AVX1-NEXT: vzeroupper 400; AVX1-NEXT: retq 401; 402; AVX2-LABEL: trunc8i32_8i16_ashr: 403; AVX2: # %bb.0: # %entry 404; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 405; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 406; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 407; AVX2-NEXT: vzeroupper 408; AVX2-NEXT: retq 409; 410; AVX512F-LABEL: trunc8i32_8i16_ashr: 411; AVX512F: # %bb.0: # %entry 412; AVX512F-NEXT: vpsrld $16, %ymm0, %ymm0 413; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 414; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 415; AVX512F-NEXT: vzeroupper 416; AVX512F-NEXT: retq 417; 418; AVX512VL-LABEL: trunc8i32_8i16_ashr: 419; AVX512VL: # %bb.0: # %entry 420; AVX512VL-NEXT: vpsrld $16, %ymm0, %ymm0 421; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 422; AVX512VL-NEXT: vzeroupper 423; AVX512VL-NEXT: retq 424; 425; AVX512BW-LABEL: trunc8i32_8i16_ashr: 426; AVX512BW: # %bb.0: # %entry 427; AVX512BW-NEXT: vpsrld $16, %ymm0, %ymm0 428; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 429; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 430; AVX512BW-NEXT: vzeroupper 431; AVX512BW-NEXT: retq 432; 433; AVX512BWVL-LABEL: trunc8i32_8i16_ashr: 434; AVX512BWVL: # %bb.0: # %entry 435; AVX512BWVL-NEXT: vpsrld $16, %ymm0, %ymm0 436; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 437; AVX512BWVL-NEXT: vzeroupper 438; AVX512BWVL-NEXT: retq 439entry: 440 %0 = ashr <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16> 441 %1 = trunc <8 x i32> %0 to <8 x i16> 442 ret <8 x i16> %1 443} 444 445define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) { 446; SSE2-LABEL: trunc8i32_8i16_lshr: 447; SSE2: # %bb.0: # %entry 448; SSE2-NEXT: psrad $16, %xmm1 449; SSE2-NEXT: psrad $16, %xmm0 450; SSE2-NEXT: packssdw %xmm1, %xmm0 451; SSE2-NEXT: retq 452; 453; SSSE3-LABEL: trunc8i32_8i16_lshr: 454; SSSE3: # %bb.0: # %entry 455; SSSE3-NEXT: psrad $16, %xmm1 456; SSSE3-NEXT: psrad $16, %xmm0 457; SSSE3-NEXT: packssdw %xmm1, %xmm0 458; SSSE3-NEXT: retq 459; 460; SSE41-LABEL: trunc8i32_8i16_lshr: 461; SSE41: # %bb.0: # %entry 462; SSE41-NEXT: psrld $16, %xmm1 463; SSE41-NEXT: psrld $16, %xmm0 464; SSE41-NEXT: packusdw %xmm1, %xmm0 465; SSE41-NEXT: retq 466; 467; AVX1-LABEL: trunc8i32_8i16_lshr: 468; AVX1: # %bb.0: # %entry 469; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 470; AVX1-NEXT: vpsrld $16, %xmm1, %xmm1 471; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 472; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 473; AVX1-NEXT: vzeroupper 474; AVX1-NEXT: retq 475; 476; AVX2-LABEL: trunc8i32_8i16_lshr: 477; AVX2: # %bb.0: # %entry 478; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 479; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 480; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 481; AVX2-NEXT: vzeroupper 482; AVX2-NEXT: retq 483; 484; AVX512F-LABEL: trunc8i32_8i16_lshr: 485; AVX512F: # %bb.0: # %entry 486; AVX512F-NEXT: vpsrld $16, %ymm0, %ymm0 487; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 488; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 489; AVX512F-NEXT: vzeroupper 490; AVX512F-NEXT: retq 491; 492; AVX512VL-LABEL: trunc8i32_8i16_lshr: 493; AVX512VL: # %bb.0: # %entry 494; AVX512VL-NEXT: vpsrld $16, %ymm0, %ymm0 495; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 496; AVX512VL-NEXT: vzeroupper 497; AVX512VL-NEXT: retq 498; 499; AVX512BW-LABEL: trunc8i32_8i16_lshr: 500; AVX512BW: # %bb.0: # %entry 501; AVX512BW-NEXT: vpsrld $16, %ymm0, %ymm0 502; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 503; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 504; AVX512BW-NEXT: vzeroupper 505; AVX512BW-NEXT: retq 506; 507; AVX512BWVL-LABEL: trunc8i32_8i16_lshr: 508; AVX512BWVL: # %bb.0: # %entry 509; AVX512BWVL-NEXT: vpsrld $16, %ymm0, %ymm0 510; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 511; AVX512BWVL-NEXT: vzeroupper 512; AVX512BWVL-NEXT: retq 513entry: 514 %0 = lshr <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16> 515 %1 = trunc <8 x i32> %0 to <8 x i16> 516 ret <8 x i16> %1 517} 518 519define void @trunc8i32_8i8(<8 x i32> %a) { 520; SSE2-LABEL: trunc8i32_8i8: 521; SSE2: # %bb.0: # %entry 522; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 523; SSE2-NEXT: pand %xmm2, %xmm1 524; SSE2-NEXT: pand %xmm2, %xmm0 525; SSE2-NEXT: packuswb %xmm1, %xmm0 526; SSE2-NEXT: packuswb %xmm0, %xmm0 527; SSE2-NEXT: movq %xmm0, (%rax) 528; SSE2-NEXT: retq 529; 530; SSSE3-LABEL: trunc8i32_8i8: 531; SSSE3: # %bb.0: # %entry 532; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> 533; SSSE3-NEXT: pshufb %xmm2, %xmm1 534; SSSE3-NEXT: pshufb %xmm2, %xmm0 535; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 536; SSSE3-NEXT: movq %xmm0, (%rax) 537; SSSE3-NEXT: retq 538; 539; SSE41-LABEL: trunc8i32_8i8: 540; SSE41: # %bb.0: # %entry 541; SSE41-NEXT: movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> 542; SSE41-NEXT: pshufb %xmm2, %xmm1 543; SSE41-NEXT: pshufb %xmm2, %xmm0 544; SSE41-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 545; SSE41-NEXT: movq %xmm0, (%rax) 546; SSE41-NEXT: retq 547; 548; AVX1-LABEL: trunc8i32_8i8: 549; AVX1: # %bb.0: # %entry 550; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 551; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> 552; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 553; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 554; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 555; AVX1-NEXT: vmovq %xmm0, (%rax) 556; AVX1-NEXT: vzeroupper 557; AVX1-NEXT: retq 558; 559; AVX2-LABEL: trunc8i32_8i8: 560; AVX2: # %bb.0: # %entry 561; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 562; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> 563; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 564; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 565; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 566; AVX2-NEXT: vmovq %xmm0, (%rax) 567; AVX2-NEXT: vzeroupper 568; AVX2-NEXT: retq 569; 570; AVX512F-LABEL: trunc8i32_8i8: 571; AVX512F: # %bb.0: # %entry 572; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 573; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 574; AVX512F-NEXT: vmovq %xmm0, (%rax) 575; AVX512F-NEXT: vzeroupper 576; AVX512F-NEXT: retq 577; 578; AVX512VL-LABEL: trunc8i32_8i8: 579; AVX512VL: # %bb.0: # %entry 580; AVX512VL-NEXT: vpmovdb %ymm0, (%rax) 581; AVX512VL-NEXT: vzeroupper 582; AVX512VL-NEXT: retq 583; 584; AVX512BW-LABEL: trunc8i32_8i8: 585; AVX512BW: # %bb.0: # %entry 586; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 587; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 588; AVX512BW-NEXT: vmovq %xmm0, (%rax) 589; AVX512BW-NEXT: vzeroupper 590; AVX512BW-NEXT: retq 591; 592; AVX512BWVL-LABEL: trunc8i32_8i8: 593; AVX512BWVL: # %bb.0: # %entry 594; AVX512BWVL-NEXT: vpmovdb %ymm0, (%rax) 595; AVX512BWVL-NEXT: vzeroupper 596; AVX512BWVL-NEXT: retq 597entry: 598 %0 = trunc <8 x i32> %a to <8 x i8> 599 store <8 x i8> %0, <8 x i8>* undef, align 4 600 ret void 601} 602 603define void @trunc16i32_16i16(<16 x i32> %a) { 604; SSE2-LABEL: trunc16i32_16i16: 605; SSE2: # %bb.0: # %entry 606; SSE2-NEXT: pslld $16, %xmm1 607; SSE2-NEXT: psrad $16, %xmm1 608; SSE2-NEXT: pslld $16, %xmm0 609; SSE2-NEXT: psrad $16, %xmm0 610; SSE2-NEXT: packssdw %xmm1, %xmm0 611; SSE2-NEXT: pslld $16, %xmm3 612; SSE2-NEXT: psrad $16, %xmm3 613; SSE2-NEXT: pslld $16, %xmm2 614; SSE2-NEXT: psrad $16, %xmm2 615; SSE2-NEXT: packssdw %xmm3, %xmm2 616; SSE2-NEXT: movdqu %xmm2, (%rax) 617; SSE2-NEXT: movdqu %xmm0, (%rax) 618; SSE2-NEXT: retq 619; 620; SSSE3-LABEL: trunc16i32_16i16: 621; SSSE3: # %bb.0: # %entry 622; SSSE3-NEXT: pslld $16, %xmm1 623; SSSE3-NEXT: psrad $16, %xmm1 624; SSSE3-NEXT: pslld $16, %xmm0 625; SSSE3-NEXT: psrad $16, %xmm0 626; SSSE3-NEXT: packssdw %xmm1, %xmm0 627; SSSE3-NEXT: pslld $16, %xmm3 628; SSSE3-NEXT: psrad $16, %xmm3 629; SSSE3-NEXT: pslld $16, %xmm2 630; SSSE3-NEXT: psrad $16, %xmm2 631; SSSE3-NEXT: packssdw %xmm3, %xmm2 632; SSSE3-NEXT: movdqu %xmm2, (%rax) 633; SSSE3-NEXT: movdqu %xmm0, (%rax) 634; SSSE3-NEXT: retq 635; 636; SSE41-LABEL: trunc16i32_16i16: 637; SSE41: # %bb.0: # %entry 638; SSE41-NEXT: pxor %xmm4, %xmm4 639; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7] 640; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7] 641; SSE41-NEXT: packusdw %xmm1, %xmm0 642; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7] 643; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7] 644; SSE41-NEXT: packusdw %xmm3, %xmm2 645; SSE41-NEXT: movdqu %xmm2, (%rax) 646; SSE41-NEXT: movdqu %xmm0, (%rax) 647; SSE41-NEXT: retq 648; 649; AVX1-LABEL: trunc16i32_16i16: 650; AVX1: # %bb.0: # %entry 651; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [65535,65535,65535,65535,65535,65535,65535,65535] 652; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 653; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 654; AVX1-NEXT: vpackusdw %xmm3, %xmm0, %xmm0 655; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 656; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 657; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 658; AVX1-NEXT: vmovdqu %xmm1, (%rax) 659; AVX1-NEXT: vmovdqu %xmm0, (%rax) 660; AVX1-NEXT: vzeroupper 661; AVX1-NEXT: retq 662; 663; AVX2-LABEL: trunc16i32_16i16: 664; AVX2: # %bb.0: # %entry 665; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 666; AVX2-NEXT: vpblendw {{.*#+}} ymm1 = ymm1[0],ymm2[1],ymm1[2],ymm2[3],ymm1[4],ymm2[5],ymm1[6],ymm2[7],ymm1[8],ymm2[9],ymm1[10],ymm2[11],ymm1[12],ymm2[13],ymm1[14],ymm2[15] 667; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm2[1],ymm0[2],ymm2[3],ymm0[4],ymm2[5],ymm0[6],ymm2[7],ymm0[8],ymm2[9],ymm0[10],ymm2[11],ymm0[12],ymm2[13],ymm0[14],ymm2[15] 668; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 669; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] 670; AVX2-NEXT: vmovdqu %ymm0, (%rax) 671; AVX2-NEXT: vzeroupper 672; AVX2-NEXT: retq 673; 674; AVX512-LABEL: trunc16i32_16i16: 675; AVX512: # %bb.0: # %entry 676; AVX512-NEXT: vpmovdw %zmm0, (%rax) 677; AVX512-NEXT: vzeroupper 678; AVX512-NEXT: retq 679entry: 680 %0 = trunc <16 x i32> %a to <16 x i16> 681 store <16 x i16> %0, <16 x i16>* undef, align 4 682 ret void 683} 684 685define void @trunc16i32_16i16_ashr(<16 x i32> %a) { 686; SSE2-LABEL: trunc16i32_16i16_ashr: 687; SSE2: # %bb.0: # %entry 688; SSE2-NEXT: psrad $16, %xmm1 689; SSE2-NEXT: psrad $16, %xmm0 690; SSE2-NEXT: packssdw %xmm1, %xmm0 691; SSE2-NEXT: psrad $16, %xmm3 692; SSE2-NEXT: psrad $16, %xmm2 693; SSE2-NEXT: packssdw %xmm3, %xmm2 694; SSE2-NEXT: movdqu %xmm2, (%rax) 695; SSE2-NEXT: movdqu %xmm0, (%rax) 696; SSE2-NEXT: retq 697; 698; SSSE3-LABEL: trunc16i32_16i16_ashr: 699; SSSE3: # %bb.0: # %entry 700; SSSE3-NEXT: psrad $16, %xmm1 701; SSSE3-NEXT: psrad $16, %xmm0 702; SSSE3-NEXT: packssdw %xmm1, %xmm0 703; SSSE3-NEXT: psrad $16, %xmm3 704; SSSE3-NEXT: psrad $16, %xmm2 705; SSSE3-NEXT: packssdw %xmm3, %xmm2 706; SSSE3-NEXT: movdqu %xmm2, (%rax) 707; SSSE3-NEXT: movdqu %xmm0, (%rax) 708; SSSE3-NEXT: retq 709; 710; SSE41-LABEL: trunc16i32_16i16_ashr: 711; SSE41: # %bb.0: # %entry 712; SSE41-NEXT: psrld $16, %xmm3 713; SSE41-NEXT: psrld $16, %xmm2 714; SSE41-NEXT: packusdw %xmm3, %xmm2 715; SSE41-NEXT: psrld $16, %xmm1 716; SSE41-NEXT: psrld $16, %xmm0 717; SSE41-NEXT: packusdw %xmm1, %xmm0 718; SSE41-NEXT: movdqu %xmm2, (%rax) 719; SSE41-NEXT: movdqu %xmm0, (%rax) 720; SSE41-NEXT: retq 721; 722; AVX1-LABEL: trunc16i32_16i16_ashr: 723; AVX1: # %bb.0: # %entry 724; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 725; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 726; AVX1-NEXT: vpsrld $16, %xmm1, %xmm1 727; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 728; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 729; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 730; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 731; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 732; AVX1-NEXT: vmovdqu %xmm1, (%rax) 733; AVX1-NEXT: vmovdqu %xmm0, (%rax) 734; AVX1-NEXT: vzeroupper 735; AVX1-NEXT: retq 736; 737; AVX2-LABEL: trunc16i32_16i16_ashr: 738; AVX2: # %bb.0: # %entry 739; AVX2-NEXT: vpsrld $16, %ymm1, %ymm1 740; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 741; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 742; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] 743; AVX2-NEXT: vmovdqu %ymm0, (%rax) 744; AVX2-NEXT: vzeroupper 745; AVX2-NEXT: retq 746; 747; AVX512-LABEL: trunc16i32_16i16_ashr: 748; AVX512: # %bb.0: # %entry 749; AVX512-NEXT: vpsrld $16, %zmm0, %zmm0 750; AVX512-NEXT: vpmovdw %zmm0, (%rax) 751; AVX512-NEXT: vzeroupper 752; AVX512-NEXT: retq 753entry: 754 %0 = ashr <16 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16> 755 %1 = trunc <16 x i32> %0 to <16 x i16> 756 store <16 x i16> %1, <16 x i16>* undef, align 4 757 ret void 758} 759 760define void @trunc16i32_16i16_lshr(<16 x i32> %a) { 761; SSE2-LABEL: trunc16i32_16i16_lshr: 762; SSE2: # %bb.0: # %entry 763; SSE2-NEXT: psrad $16, %xmm1 764; SSE2-NEXT: psrad $16, %xmm0 765; SSE2-NEXT: packssdw %xmm1, %xmm0 766; SSE2-NEXT: psrad $16, %xmm3 767; SSE2-NEXT: psrad $16, %xmm2 768; SSE2-NEXT: packssdw %xmm3, %xmm2 769; SSE2-NEXT: movdqu %xmm2, (%rax) 770; SSE2-NEXT: movdqu %xmm0, (%rax) 771; SSE2-NEXT: retq 772; 773; SSSE3-LABEL: trunc16i32_16i16_lshr: 774; SSSE3: # %bb.0: # %entry 775; SSSE3-NEXT: psrad $16, %xmm1 776; SSSE3-NEXT: psrad $16, %xmm0 777; SSSE3-NEXT: packssdw %xmm1, %xmm0 778; SSSE3-NEXT: psrad $16, %xmm3 779; SSSE3-NEXT: psrad $16, %xmm2 780; SSSE3-NEXT: packssdw %xmm3, %xmm2 781; SSSE3-NEXT: movdqu %xmm2, (%rax) 782; SSSE3-NEXT: movdqu %xmm0, (%rax) 783; SSSE3-NEXT: retq 784; 785; SSE41-LABEL: trunc16i32_16i16_lshr: 786; SSE41: # %bb.0: # %entry 787; SSE41-NEXT: psrld $16, %xmm3 788; SSE41-NEXT: psrld $16, %xmm2 789; SSE41-NEXT: packusdw %xmm3, %xmm2 790; SSE41-NEXT: psrld $16, %xmm1 791; SSE41-NEXT: psrld $16, %xmm0 792; SSE41-NEXT: packusdw %xmm1, %xmm0 793; SSE41-NEXT: movdqu %xmm2, (%rax) 794; SSE41-NEXT: movdqu %xmm0, (%rax) 795; SSE41-NEXT: retq 796; 797; AVX1-LABEL: trunc16i32_16i16_lshr: 798; AVX1: # %bb.0: # %entry 799; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 800; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 801; AVX1-NEXT: vpsrld $16, %xmm1, %xmm1 802; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 803; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 804; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 805; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 806; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 807; AVX1-NEXT: vmovdqu %xmm1, (%rax) 808; AVX1-NEXT: vmovdqu %xmm0, (%rax) 809; AVX1-NEXT: vzeroupper 810; AVX1-NEXT: retq 811; 812; AVX2-LABEL: trunc16i32_16i16_lshr: 813; AVX2: # %bb.0: # %entry 814; AVX2-NEXT: vpsrld $16, %ymm1, %ymm1 815; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 816; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 817; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] 818; AVX2-NEXT: vmovdqu %ymm0, (%rax) 819; AVX2-NEXT: vzeroupper 820; AVX2-NEXT: retq 821; 822; AVX512-LABEL: trunc16i32_16i16_lshr: 823; AVX512: # %bb.0: # %entry 824; AVX512-NEXT: vpsrld $16, %zmm0, %zmm0 825; AVX512-NEXT: vpmovdw %zmm0, (%rax) 826; AVX512-NEXT: vzeroupper 827; AVX512-NEXT: retq 828entry: 829 %0 = lshr <16 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16> 830 %1 = trunc <16 x i32> %0 to <16 x i16> 831 store <16 x i16> %1, <16 x i16>* undef, align 4 832 ret void 833} 834 835define void @trunc16i32_16i8(<16 x i32> %a) { 836; SSE2-LABEL: trunc16i32_16i8: 837; SSE2: # %bb.0: # %entry 838; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 839; SSE2-NEXT: pand %xmm4, %xmm3 840; SSE2-NEXT: pand %xmm4, %xmm2 841; SSE2-NEXT: packuswb %xmm3, %xmm2 842; SSE2-NEXT: pand %xmm4, %xmm1 843; SSE2-NEXT: pand %xmm4, %xmm0 844; SSE2-NEXT: packuswb %xmm1, %xmm0 845; SSE2-NEXT: packuswb %xmm2, %xmm0 846; SSE2-NEXT: movdqu %xmm0, (%rax) 847; SSE2-NEXT: retq 848; 849; SSSE3-LABEL: trunc16i32_16i8: 850; SSSE3: # %bb.0: # %entry 851; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 852; SSSE3-NEXT: pand %xmm4, %xmm3 853; SSSE3-NEXT: pand %xmm4, %xmm2 854; SSSE3-NEXT: packuswb %xmm3, %xmm2 855; SSSE3-NEXT: pand %xmm4, %xmm1 856; SSSE3-NEXT: pand %xmm4, %xmm0 857; SSSE3-NEXT: packuswb %xmm1, %xmm0 858; SSSE3-NEXT: packuswb %xmm2, %xmm0 859; SSSE3-NEXT: movdqu %xmm0, (%rax) 860; SSSE3-NEXT: retq 861; 862; SSE41-LABEL: trunc16i32_16i8: 863; SSE41: # %bb.0: # %entry 864; SSE41-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 865; SSE41-NEXT: pand %xmm4, %xmm3 866; SSE41-NEXT: pand %xmm4, %xmm2 867; SSE41-NEXT: packusdw %xmm3, %xmm2 868; SSE41-NEXT: pand %xmm4, %xmm1 869; SSE41-NEXT: pand %xmm4, %xmm0 870; SSE41-NEXT: packusdw %xmm1, %xmm0 871; SSE41-NEXT: packuswb %xmm2, %xmm0 872; SSE41-NEXT: movdqu %xmm0, (%rax) 873; SSE41-NEXT: retq 874; 875; AVX1-LABEL: trunc16i32_16i8: 876; AVX1: # %bb.0: # %entry 877; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255] 878; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 879; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 880; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 881; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 882; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 883; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 884; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 885; AVX1-NEXT: vmovdqu %xmm0, (%rax) 886; AVX1-NEXT: vzeroupper 887; AVX1-NEXT: retq 888; 889; AVX2-LABEL: trunc16i32_16i8: 890; AVX2: # %bb.0: # %entry 891; AVX2-NEXT: vpbroadcastd {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255] 892; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 893; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0 894; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 895; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 896; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 897; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3] 898; AVX2-NEXT: vmovdqu %xmm0, (%rax) 899; AVX2-NEXT: vzeroupper 900; AVX2-NEXT: retq 901; 902; AVX512-LABEL: trunc16i32_16i8: 903; AVX512: # %bb.0: # %entry 904; AVX512-NEXT: vpmovdb %zmm0, (%rax) 905; AVX512-NEXT: vzeroupper 906; AVX512-NEXT: retq 907entry: 908 %0 = trunc <16 x i32> %a to <16 x i8> 909 store <16 x i8> %0, <16 x i8>* undef, align 4 910 ret void 911} 912 913define void @trunc16i32_16i8_ashr(<16 x i32> %a) { 914; SSE2-LABEL: trunc16i32_16i8_ashr: 915; SSE2: # %bb.0: # %entry 916; SSE2-NEXT: psrld $24, %xmm1 917; SSE2-NEXT: psrld $24, %xmm0 918; SSE2-NEXT: packuswb %xmm1, %xmm0 919; SSE2-NEXT: psrld $24, %xmm3 920; SSE2-NEXT: psrld $24, %xmm2 921; SSE2-NEXT: packuswb %xmm3, %xmm2 922; SSE2-NEXT: packuswb %xmm2, %xmm0 923; SSE2-NEXT: movdqu %xmm0, (%rax) 924; SSE2-NEXT: retq 925; 926; SSSE3-LABEL: trunc16i32_16i8_ashr: 927; SSSE3: # %bb.0: # %entry 928; SSSE3-NEXT: psrld $24, %xmm1 929; SSSE3-NEXT: psrld $24, %xmm0 930; SSSE3-NEXT: packuswb %xmm1, %xmm0 931; SSSE3-NEXT: psrld $24, %xmm3 932; SSSE3-NEXT: psrld $24, %xmm2 933; SSSE3-NEXT: packuswb %xmm3, %xmm2 934; SSSE3-NEXT: packuswb %xmm2, %xmm0 935; SSSE3-NEXT: movdqu %xmm0, (%rax) 936; SSSE3-NEXT: retq 937; 938; SSE41-LABEL: trunc16i32_16i8_ashr: 939; SSE41: # %bb.0: # %entry 940; SSE41-NEXT: psrld $24, %xmm1 941; SSE41-NEXT: psrld $24, %xmm0 942; SSE41-NEXT: packusdw %xmm1, %xmm0 943; SSE41-NEXT: psrld $24, %xmm3 944; SSE41-NEXT: psrld $24, %xmm2 945; SSE41-NEXT: packusdw %xmm3, %xmm2 946; SSE41-NEXT: packuswb %xmm2, %xmm0 947; SSE41-NEXT: movdqu %xmm0, (%rax) 948; SSE41-NEXT: retq 949; 950; AVX1-LABEL: trunc16i32_16i8_ashr: 951; AVX1: # %bb.0: # %entry 952; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 953; AVX1-NEXT: vpsrld $24, %xmm2, %xmm2 954; AVX1-NEXT: vpsrld $24, %xmm0, %xmm0 955; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 956; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 957; AVX1-NEXT: vpsrld $24, %xmm2, %xmm2 958; AVX1-NEXT: vpsrld $24, %xmm1, %xmm1 959; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 960; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 961; AVX1-NEXT: vmovdqu %xmm0, (%rax) 962; AVX1-NEXT: vzeroupper 963; AVX1-NEXT: retq 964; 965; AVX2-LABEL: trunc16i32_16i8_ashr: 966; AVX2: # %bb.0: # %entry 967; AVX2-NEXT: vpsrld $24, %ymm1, %ymm1 968; AVX2-NEXT: vpsrld $24, %ymm0, %ymm0 969; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 970; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 971; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 972; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3] 973; AVX2-NEXT: vmovdqu %xmm0, (%rax) 974; AVX2-NEXT: vzeroupper 975; AVX2-NEXT: retq 976; 977; AVX512-LABEL: trunc16i32_16i8_ashr: 978; AVX512: # %bb.0: # %entry 979; AVX512-NEXT: vpsrld $24, %zmm0, %zmm0 980; AVX512-NEXT: vpmovdb %zmm0, (%rax) 981; AVX512-NEXT: vzeroupper 982; AVX512-NEXT: retq 983entry: 984 %0 = ashr <16 x i32> %a, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24> 985 %1 = trunc <16 x i32> %0 to <16 x i8> 986 store <16 x i8> %1, <16 x i8>* undef, align 4 987 ret void 988} 989 990define void @trunc16i32_16i8_lshr(<16 x i32> %a) { 991; SSE2-LABEL: trunc16i32_16i8_lshr: 992; SSE2: # %bb.0: # %entry 993; SSE2-NEXT: psrld $24, %xmm1 994; SSE2-NEXT: psrld $24, %xmm0 995; SSE2-NEXT: packuswb %xmm1, %xmm0 996; SSE2-NEXT: psrld $24, %xmm3 997; SSE2-NEXT: psrld $24, %xmm2 998; SSE2-NEXT: packuswb %xmm3, %xmm2 999; SSE2-NEXT: packuswb %xmm2, %xmm0 1000; SSE2-NEXT: movdqu %xmm0, (%rax) 1001; SSE2-NEXT: retq 1002; 1003; SSSE3-LABEL: trunc16i32_16i8_lshr: 1004; SSSE3: # %bb.0: # %entry 1005; SSSE3-NEXT: psrld $24, %xmm1 1006; SSSE3-NEXT: psrld $24, %xmm0 1007; SSSE3-NEXT: packuswb %xmm1, %xmm0 1008; SSSE3-NEXT: psrld $24, %xmm3 1009; SSSE3-NEXT: psrld $24, %xmm2 1010; SSSE3-NEXT: packuswb %xmm3, %xmm2 1011; SSSE3-NEXT: packuswb %xmm2, %xmm0 1012; SSSE3-NEXT: movdqu %xmm0, (%rax) 1013; SSSE3-NEXT: retq 1014; 1015; SSE41-LABEL: trunc16i32_16i8_lshr: 1016; SSE41: # %bb.0: # %entry 1017; SSE41-NEXT: psrld $24, %xmm1 1018; SSE41-NEXT: psrld $24, %xmm0 1019; SSE41-NEXT: packusdw %xmm1, %xmm0 1020; SSE41-NEXT: psrld $24, %xmm3 1021; SSE41-NEXT: psrld $24, %xmm2 1022; SSE41-NEXT: packusdw %xmm3, %xmm2 1023; SSE41-NEXT: packuswb %xmm2, %xmm0 1024; SSE41-NEXT: movdqu %xmm0, (%rax) 1025; SSE41-NEXT: retq 1026; 1027; AVX1-LABEL: trunc16i32_16i8_lshr: 1028; AVX1: # %bb.0: # %entry 1029; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1030; AVX1-NEXT: vpsrld $24, %xmm2, %xmm2 1031; AVX1-NEXT: vpsrld $24, %xmm0, %xmm0 1032; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 1033; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1034; AVX1-NEXT: vpsrld $24, %xmm2, %xmm2 1035; AVX1-NEXT: vpsrld $24, %xmm1, %xmm1 1036; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 1037; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1038; AVX1-NEXT: vmovdqu %xmm0, (%rax) 1039; AVX1-NEXT: vzeroupper 1040; AVX1-NEXT: retq 1041; 1042; AVX2-LABEL: trunc16i32_16i8_lshr: 1043; AVX2: # %bb.0: # %entry 1044; AVX2-NEXT: vpsrld $24, %ymm1, %ymm1 1045; AVX2-NEXT: vpsrld $24, %ymm0, %ymm0 1046; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 1047; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1048; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1049; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,1,3] 1050; AVX2-NEXT: vmovdqu %xmm0, (%rax) 1051; AVX2-NEXT: vzeroupper 1052; AVX2-NEXT: retq 1053; 1054; AVX512-LABEL: trunc16i32_16i8_lshr: 1055; AVX512: # %bb.0: # %entry 1056; AVX512-NEXT: vpsrld $24, %zmm0, %zmm0 1057; AVX512-NEXT: vpmovdb %zmm0, (%rax) 1058; AVX512-NEXT: vzeroupper 1059; AVX512-NEXT: retq 1060entry: 1061 %0 = lshr <16 x i32> %a, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24> 1062 %1 = trunc <16 x i32> %0 to <16 x i8> 1063 store <16 x i8> %1, <16 x i8>* undef, align 4 1064 ret void 1065} 1066 1067;PR25684 1068define void @trunc16i16_16i8(<16 x i16> %a) { 1069; SSE-LABEL: trunc16i16_16i8: 1070; SSE: # %bb.0: # %entry 1071; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 1072; SSE-NEXT: pand %xmm2, %xmm1 1073; SSE-NEXT: pand %xmm2, %xmm0 1074; SSE-NEXT: packuswb %xmm1, %xmm0 1075; SSE-NEXT: movdqu %xmm0, (%rax) 1076; SSE-NEXT: retq 1077; 1078; AVX1-LABEL: trunc16i16_16i8: 1079; AVX1: # %bb.0: # %entry 1080; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 1081; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 1082; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1083; AVX1-NEXT: vmovdqu %xmm0, (%rax) 1084; AVX1-NEXT: vzeroupper 1085; AVX1-NEXT: retq 1086; 1087; AVX2-LABEL: trunc16i16_16i8: 1088; AVX2: # %bb.0: # %entry 1089; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 1090; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1091; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1092; AVX2-NEXT: vmovdqu %xmm0, (%rax) 1093; AVX2-NEXT: vzeroupper 1094; AVX2-NEXT: retq 1095; 1096; AVX512F-LABEL: trunc16i16_16i8: 1097; AVX512F: # %bb.0: # %entry 1098; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1099; AVX512F-NEXT: vpmovdb %zmm0, (%rax) 1100; AVX512F-NEXT: vzeroupper 1101; AVX512F-NEXT: retq 1102; 1103; AVX512VL-LABEL: trunc16i16_16i8: 1104; AVX512VL: # %bb.0: # %entry 1105; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1106; AVX512VL-NEXT: vpmovdb %zmm0, (%rax) 1107; AVX512VL-NEXT: vzeroupper 1108; AVX512VL-NEXT: retq 1109; 1110; AVX512BW-LABEL: trunc16i16_16i8: 1111; AVX512BW: # %bb.0: # %entry 1112; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1113; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1114; AVX512BW-NEXT: vmovdqu %xmm0, (%rax) 1115; AVX512BW-NEXT: vzeroupper 1116; AVX512BW-NEXT: retq 1117; 1118; AVX512BWVL-LABEL: trunc16i16_16i8: 1119; AVX512BWVL: # %bb.0: # %entry 1120; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rax) 1121; AVX512BWVL-NEXT: vzeroupper 1122; AVX512BWVL-NEXT: retq 1123entry: 1124 %0 = trunc <16 x i16> %a to <16 x i8> 1125 store <16 x i8> %0, <16 x i8>* undef, align 4 1126 ret void 1127} 1128 1129define void @trunc16i16_16i8_ashr(<16 x i16> %a) { 1130; SSE-LABEL: trunc16i16_16i8_ashr: 1131; SSE: # %bb.0: # %entry 1132; SSE-NEXT: psrlw $8, %xmm1 1133; SSE-NEXT: psrlw $8, %xmm0 1134; SSE-NEXT: packuswb %xmm1, %xmm0 1135; SSE-NEXT: movdqu %xmm0, (%rax) 1136; SSE-NEXT: retq 1137; 1138; AVX1-LABEL: trunc16i16_16i8_ashr: 1139; AVX1: # %bb.0: # %entry 1140; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 1141; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 1142; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 1143; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1144; AVX1-NEXT: vmovdqu %xmm0, (%rax) 1145; AVX1-NEXT: vzeroupper 1146; AVX1-NEXT: retq 1147; 1148; AVX2-LABEL: trunc16i16_16i8_ashr: 1149; AVX2: # %bb.0: # %entry 1150; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0 1151; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1152; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1153; AVX2-NEXT: vmovdqu %xmm0, (%rax) 1154; AVX2-NEXT: vzeroupper 1155; AVX2-NEXT: retq 1156; 1157; AVX512F-LABEL: trunc16i16_16i8_ashr: 1158; AVX512F: # %bb.0: # %entry 1159; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 1160; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1161; AVX512F-NEXT: vpmovdb %zmm0, (%rax) 1162; AVX512F-NEXT: vzeroupper 1163; AVX512F-NEXT: retq 1164; 1165; AVX512VL-LABEL: trunc16i16_16i8_ashr: 1166; AVX512VL: # %bb.0: # %entry 1167; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 1168; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1169; AVX512VL-NEXT: vpmovdb %zmm0, (%rax) 1170; AVX512VL-NEXT: vzeroupper 1171; AVX512VL-NEXT: retq 1172; 1173; AVX512BW-LABEL: trunc16i16_16i8_ashr: 1174; AVX512BW: # %bb.0: # %entry 1175; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 1176; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1177; AVX512BW-NEXT: vmovdqu %xmm0, (%rax) 1178; AVX512BW-NEXT: vzeroupper 1179; AVX512BW-NEXT: retq 1180; 1181; AVX512BWVL-LABEL: trunc16i16_16i8_ashr: 1182; AVX512BWVL: # %bb.0: # %entry 1183; AVX512BWVL-NEXT: vpsrlw $8, %ymm0, %ymm0 1184; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rax) 1185; AVX512BWVL-NEXT: vzeroupper 1186; AVX512BWVL-NEXT: retq 1187entry: 1188 %0 = ashr <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8> 1189 %1 = trunc <16 x i16> %0 to <16 x i8> 1190 store <16 x i8> %1, <16 x i8>* undef, align 4 1191 ret void 1192} 1193 1194define void @trunc16i16_16i8_lshr(<16 x i16> %a) { 1195; SSE-LABEL: trunc16i16_16i8_lshr: 1196; SSE: # %bb.0: # %entry 1197; SSE-NEXT: psrlw $8, %xmm1 1198; SSE-NEXT: psrlw $8, %xmm0 1199; SSE-NEXT: packuswb %xmm1, %xmm0 1200; SSE-NEXT: movdqu %xmm0, (%rax) 1201; SSE-NEXT: retq 1202; 1203; AVX1-LABEL: trunc16i16_16i8_lshr: 1204; AVX1: # %bb.0: # %entry 1205; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 1206; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 1207; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 1208; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1209; AVX1-NEXT: vmovdqu %xmm0, (%rax) 1210; AVX1-NEXT: vzeroupper 1211; AVX1-NEXT: retq 1212; 1213; AVX2-LABEL: trunc16i16_16i8_lshr: 1214; AVX2: # %bb.0: # %entry 1215; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0 1216; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1217; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1218; AVX2-NEXT: vmovdqu %xmm0, (%rax) 1219; AVX2-NEXT: vzeroupper 1220; AVX2-NEXT: retq 1221; 1222; AVX512F-LABEL: trunc16i16_16i8_lshr: 1223; AVX512F: # %bb.0: # %entry 1224; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 1225; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1226; AVX512F-NEXT: vpmovdb %zmm0, (%rax) 1227; AVX512F-NEXT: vzeroupper 1228; AVX512F-NEXT: retq 1229; 1230; AVX512VL-LABEL: trunc16i16_16i8_lshr: 1231; AVX512VL: # %bb.0: # %entry 1232; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 1233; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1234; AVX512VL-NEXT: vpmovdb %zmm0, (%rax) 1235; AVX512VL-NEXT: vzeroupper 1236; AVX512VL-NEXT: retq 1237; 1238; AVX512BW-LABEL: trunc16i16_16i8_lshr: 1239; AVX512BW: # %bb.0: # %entry 1240; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 1241; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1242; AVX512BW-NEXT: vmovdqu %xmm0, (%rax) 1243; AVX512BW-NEXT: vzeroupper 1244; AVX512BW-NEXT: retq 1245; 1246; AVX512BWVL-LABEL: trunc16i16_16i8_lshr: 1247; AVX512BWVL: # %bb.0: # %entry 1248; AVX512BWVL-NEXT: vpsrlw $8, %ymm0, %ymm0 1249; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rax) 1250; AVX512BWVL-NEXT: vzeroupper 1251; AVX512BWVL-NEXT: retq 1252entry: 1253 %0 = lshr <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8> 1254 %1 = trunc <16 x i16> %0 to <16 x i8> 1255 store <16 x i8> %1, <16 x i8>* undef, align 4 1256 ret void 1257} 1258 1259define void @trunc32i16_32i8(<32 x i16> %a) { 1260; SSE-LABEL: trunc32i16_32i8: 1261; SSE: # %bb.0: # %entry 1262; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 1263; SSE-NEXT: pand %xmm4, %xmm1 1264; SSE-NEXT: pand %xmm4, %xmm0 1265; SSE-NEXT: packuswb %xmm1, %xmm0 1266; SSE-NEXT: pand %xmm4, %xmm3 1267; SSE-NEXT: pand %xmm4, %xmm2 1268; SSE-NEXT: packuswb %xmm3, %xmm2 1269; SSE-NEXT: movdqu %xmm2, (%rax) 1270; SSE-NEXT: movdqu %xmm0, (%rax) 1271; SSE-NEXT: retq 1272; 1273; AVX1-LABEL: trunc32i16_32i8: 1274; AVX1: # %bb.0: # %entry 1275; AVX1-NEXT: vmovaps {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255] 1276; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 1277; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 1278; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 1279; AVX1-NEXT: vandps %ymm2, %ymm1, %ymm1 1280; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1281; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 1282; AVX1-NEXT: vmovdqu %xmm1, (%rax) 1283; AVX1-NEXT: vmovdqu %xmm0, (%rax) 1284; AVX1-NEXT: vzeroupper 1285; AVX1-NEXT: retq 1286; 1287; AVX2-LABEL: trunc32i16_32i8: 1288; AVX2: # %bb.0: # %entry 1289; AVX2-NEXT: vpbroadcastw {{.*#+}} ymm2 = [255,255,255,255,255,255,255,255,255,255,255,255,255,255,255,255] 1290; AVX2-NEXT: vpand %ymm2, %ymm1, %ymm1 1291; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0 1292; AVX2-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 1293; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] 1294; AVX2-NEXT: vmovdqu %ymm0, (%rax) 1295; AVX2-NEXT: vzeroupper 1296; AVX2-NEXT: retq 1297; 1298; AVX512F-LABEL: trunc32i16_32i8: 1299; AVX512F: # %bb.0: # %entry 1300; AVX512F-NEXT: vextracti64x4 $1, %zmm0, %ymm1 1301; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero 1302; AVX512F-NEXT: vpmovdb %zmm1, (%rax) 1303; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1304; AVX512F-NEXT: vpmovdb %zmm0, (%rax) 1305; AVX512F-NEXT: vzeroupper 1306; AVX512F-NEXT: retq 1307; 1308; AVX512VL-LABEL: trunc32i16_32i8: 1309; AVX512VL: # %bb.0: # %entry 1310; AVX512VL-NEXT: vextracti64x4 $1, %zmm0, %ymm1 1311; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero 1312; AVX512VL-NEXT: vpmovdb %zmm1, (%rax) 1313; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1314; AVX512VL-NEXT: vpmovdb %zmm0, (%rax) 1315; AVX512VL-NEXT: vzeroupper 1316; AVX512VL-NEXT: retq 1317; 1318; AVX512BW-LABEL: trunc32i16_32i8: 1319; AVX512BW: # %bb.0: # %entry 1320; AVX512BW-NEXT: vpmovwb %zmm0, (%rax) 1321; AVX512BW-NEXT: vzeroupper 1322; AVX512BW-NEXT: retq 1323; 1324; AVX512BWVL-LABEL: trunc32i16_32i8: 1325; AVX512BWVL: # %bb.0: # %entry 1326; AVX512BWVL-NEXT: vpmovwb %zmm0, (%rax) 1327; AVX512BWVL-NEXT: vzeroupper 1328; AVX512BWVL-NEXT: retq 1329entry: 1330 %0 = trunc <32 x i16> %a to <32 x i8> 1331 store <32 x i8> %0, <32 x i8>* undef, align 4 1332 ret void 1333} 1334 1335define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) { 1336; SSE-LABEL: trunc2x4i64_8i32: 1337; SSE: # %bb.0: # %entry 1338; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1339; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2] 1340; SSE-NEXT: movaps %xmm2, %xmm1 1341; SSE-NEXT: retq 1342; 1343; AVX1-LABEL: trunc2x4i64_8i32: 1344; AVX1: # %bb.0: # %entry 1345; AVX1-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 1346; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 1347; AVX1-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6] 1348; AVX1-NEXT: retq 1349; 1350; AVX2-SLOW-LABEL: trunc2x4i64_8i32: 1351; AVX2-SLOW: # %bb.0: # %entry 1352; AVX2-SLOW-NEXT: vperm2f128 {{.*#+}} ymm2 = ymm0[2,3],ymm1[2,3] 1353; AVX2-SLOW-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 1354; AVX2-SLOW-NEXT: vshufps {{.*#+}} ymm0 = ymm0[0,2],ymm2[0,2],ymm0[4,6],ymm2[4,6] 1355; AVX2-SLOW-NEXT: retq 1356; 1357; AVX2-FAST-LABEL: trunc2x4i64_8i32: 1358; AVX2-FAST: # %bb.0: # %entry 1359; AVX2-FAST-NEXT: vmovaps {{.*#+}} ymm2 = [0,2,4,6,4,6,6,7] 1360; AVX2-FAST-NEXT: vpermps %ymm0, %ymm2, %ymm0 1361; AVX2-FAST-NEXT: vpermps %ymm1, %ymm2, %ymm1 1362; AVX2-FAST-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 1363; AVX2-FAST-NEXT: retq 1364; 1365; AVX512F-LABEL: trunc2x4i64_8i32: 1366; AVX512F: # %bb.0: # %entry 1367; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 1368; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1369; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 1370; AVX512F-NEXT: vpmovqd %zmm1, %ymm1 1371; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1372; AVX512F-NEXT: retq 1373; 1374; AVX512VL-LABEL: trunc2x4i64_8i32: 1375; AVX512VL: # %bb.0: # %entry 1376; AVX512VL-NEXT: vpmovqd %ymm0, %xmm0 1377; AVX512VL-NEXT: vpmovqd %ymm1, %xmm1 1378; AVX512VL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1379; AVX512VL-NEXT: retq 1380; 1381; AVX512BW-LABEL: trunc2x4i64_8i32: 1382; AVX512BW: # %bb.0: # %entry 1383; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 1384; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1385; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 1386; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1 1387; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1388; AVX512BW-NEXT: retq 1389; 1390; AVX512BWVL-LABEL: trunc2x4i64_8i32: 1391; AVX512BWVL: # %bb.0: # %entry 1392; AVX512BWVL-NEXT: vpmovqd %ymm0, %xmm0 1393; AVX512BWVL-NEXT: vpmovqd %ymm1, %xmm1 1394; AVX512BWVL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1395; AVX512BWVL-NEXT: retq 1396entry: 1397 %0 = trunc <4 x i64> %a to <4 x i32> 1398 %1 = trunc <4 x i64> %b to <4 x i32> 1399 %2 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1400 ret <8 x i32> %2 1401} 1402 1403define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { 1404; SSE2-LABEL: trunc2x4i64_8i16: 1405; SSE2: # %bb.0: # %entry 1406; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1407; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 1408; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1409; SSE2-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] 1410; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 1411; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 1412; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7] 1413; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 1414; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 1415; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1416; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] 1417; SSE2-NEXT: retq 1418; 1419; SSSE3-LABEL: trunc2x4i64_8i16: 1420; SSSE3: # %bb.0: # %entry 1421; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1422; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 1423; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1424; SSSE3-NEXT: pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7] 1425; SSSE3-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 1426; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 1427; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7] 1428; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 1429; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 1430; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1431; SSSE3-NEXT: movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1] 1432; SSSE3-NEXT: retq 1433; 1434; SSE41-LABEL: trunc2x4i64_8i16: 1435; SSE41: # %bb.0: # %entry 1436; SSE41-NEXT: pxor %xmm4, %xmm4 1437; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 1438; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 1439; SSE41-NEXT: packusdw %xmm3, %xmm2 1440; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 1441; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 1442; SSE41-NEXT: packusdw %xmm1, %xmm0 1443; SSE41-NEXT: packusdw %xmm2, %xmm0 1444; SSE41-NEXT: retq 1445; 1446; AVX1-LABEL: trunc2x4i64_8i16: 1447; AVX1: # %bb.0: # %entry 1448; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1449; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 1450; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 1451; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 1452; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 1453; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1454; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 1455; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 1456; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 1457; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1458; AVX1-NEXT: vzeroupper 1459; AVX1-NEXT: retq 1460; 1461; AVX2-LABEL: trunc2x4i64_8i16: 1462; AVX2: # %bb.0: # %entry 1463; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 1464; AVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 1465; AVX2-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 1466; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 1467; AVX2-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 1468; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 1469; AVX2-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 1470; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 1471; AVX2-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 1472; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1473; AVX2-NEXT: vzeroupper 1474; AVX2-NEXT: retq 1475; 1476; AVX512F-LABEL: trunc2x4i64_8i16: 1477; AVX512F: # %bb.0: # %entry 1478; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 1479; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1480; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 1481; AVX512F-NEXT: vpmovqw %zmm1, %xmm1 1482; AVX512F-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1483; AVX512F-NEXT: vzeroupper 1484; AVX512F-NEXT: retq 1485; 1486; AVX512VL-LABEL: trunc2x4i64_8i16: 1487; AVX512VL: # %bb.0: # %entry 1488; AVX512VL-NEXT: vpmovqw %ymm0, %xmm0 1489; AVX512VL-NEXT: vpmovqw %ymm1, %xmm1 1490; AVX512VL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1491; AVX512VL-NEXT: vzeroupper 1492; AVX512VL-NEXT: retq 1493; 1494; AVX512BW-LABEL: trunc2x4i64_8i16: 1495; AVX512BW: # %bb.0: # %entry 1496; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 1497; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1498; AVX512BW-NEXT: vpmovqw %zmm0, %xmm0 1499; AVX512BW-NEXT: vpmovqw %zmm1, %xmm1 1500; AVX512BW-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1501; AVX512BW-NEXT: vzeroupper 1502; AVX512BW-NEXT: retq 1503; 1504; AVX512BWVL-LABEL: trunc2x4i64_8i16: 1505; AVX512BWVL: # %bb.0: # %entry 1506; AVX512BWVL-NEXT: vpmovqw %ymm0, %xmm0 1507; AVX512BWVL-NEXT: vpmovqw %ymm1, %xmm1 1508; AVX512BWVL-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1509; AVX512BWVL-NEXT: vzeroupper 1510; AVX512BWVL-NEXT: retq 1511entry: 1512 %0 = trunc <4 x i64> %a to <4 x i16> 1513 %1 = trunc <4 x i64> %b to <4 x i16> 1514 %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1515 ret <8 x i16> %2 1516} 1517 1518define <4 x i32> @trunc2x2i64_4i32(<2 x i64> %a, <2 x i64> %b) { 1519; SSE-LABEL: trunc2x2i64_4i32: 1520; SSE: # %bb.0: # %entry 1521; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1522; SSE-NEXT: retq 1523; 1524; AVX-LABEL: trunc2x2i64_4i32: 1525; AVX: # %bb.0: # %entry 1526; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1527; AVX-NEXT: retq 1528; 1529; AVX512F-LABEL: trunc2x2i64_4i32: 1530; AVX512F: # %bb.0: # %entry 1531; AVX512F-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1532; AVX512F-NEXT: retq 1533; 1534; AVX512VL-LABEL: trunc2x2i64_4i32: 1535; AVX512VL: # %bb.0: # %entry 1536; AVX512VL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1537; AVX512VL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1538; AVX512VL-NEXT: vpmovqd %ymm0, %xmm0 1539; AVX512VL-NEXT: vzeroupper 1540; AVX512VL-NEXT: retq 1541; 1542; AVX512BW-LABEL: trunc2x2i64_4i32: 1543; AVX512BW: # %bb.0: # %entry 1544; AVX512BW-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1545; AVX512BW-NEXT: retq 1546; 1547; AVX512BWVL-LABEL: trunc2x2i64_4i32: 1548; AVX512BWVL: # %bb.0: # %entry 1549; AVX512BWVL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1550; AVX512BWVL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1551; AVX512BWVL-NEXT: vpmovqd %ymm0, %xmm0 1552; AVX512BWVL-NEXT: vzeroupper 1553; AVX512BWVL-NEXT: retq 1554entry: 1555 %0 = trunc <2 x i64> %a to <2 x i32> 1556 %1 = trunc <2 x i64> %b to <2 x i32> 1557 %2 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1558 ret <4 x i32> %2 1559} 1560 1561define i64 @trunc2i64_i64(<2 x i64> %inval) { 1562; SSE-LABEL: trunc2i64_i64: 1563; SSE: # %bb.0: # %entry 1564; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1565; SSE-NEXT: movq %xmm0, %rax 1566; SSE-NEXT: retq 1567; 1568; AVX-LABEL: trunc2i64_i64: 1569; AVX: # %bb.0: # %entry 1570; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1571; AVX-NEXT: vmovq %xmm0, %rax 1572; AVX-NEXT: retq 1573; 1574; AVX512-LABEL: trunc2i64_i64: 1575; AVX512: # %bb.0: # %entry 1576; AVX512-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1577; AVX512-NEXT: vmovq %xmm0, %rax 1578; AVX512-NEXT: retq 1579entry: 1580 %0 = trunc <2 x i64> %inval to <2 x i32> 1581 %1 = bitcast <2 x i32> %0 to i64 1582 ret i64 %1 1583} 1584 1585define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { 1586; SSE2-LABEL: trunc2x4i32_8i16: 1587; SSE2: # %bb.0: # %entry 1588; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 1589; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] 1590; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1591; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 1592; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7] 1593; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1594; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1595; SSE2-NEXT: retq 1596; 1597; SSSE3-LABEL: trunc2x4i32_8i16: 1598; SSSE3: # %bb.0: # %entry 1599; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 1600; SSSE3-NEXT: pshufb %xmm2, %xmm1 1601; SSSE3-NEXT: pshufb %xmm2, %xmm0 1602; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1603; SSSE3-NEXT: retq 1604; 1605; SSE41-LABEL: trunc2x4i32_8i16: 1606; SSE41: # %bb.0: # %entry 1607; SSE41-NEXT: pxor %xmm2, %xmm2 1608; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 1609; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 1610; SSE41-NEXT: packusdw %xmm1, %xmm0 1611; SSE41-NEXT: retq 1612; 1613; AVX-LABEL: trunc2x4i32_8i16: 1614; AVX: # %bb.0: # %entry 1615; AVX-NEXT: vpxor %xmm2, %xmm2, %xmm2 1616; AVX-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 1617; AVX-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 1618; AVX-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1619; AVX-NEXT: retq 1620; 1621; AVX512F-LABEL: trunc2x4i32_8i16: 1622; AVX512F: # %bb.0: # %entry 1623; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1624; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1625; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 1626; AVX512F-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 1627; AVX512F-NEXT: vzeroupper 1628; AVX512F-NEXT: retq 1629; 1630; AVX512VL-LABEL: trunc2x4i32_8i16: 1631; AVX512VL: # %bb.0: # %entry 1632; AVX512VL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1633; AVX512VL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1634; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 1635; AVX512VL-NEXT: vzeroupper 1636; AVX512VL-NEXT: retq 1637; 1638; AVX512BW-LABEL: trunc2x4i32_8i16: 1639; AVX512BW: # %bb.0: # %entry 1640; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1641; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1642; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 1643; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 1644; AVX512BW-NEXT: vzeroupper 1645; AVX512BW-NEXT: retq 1646; 1647; AVX512BWVL-LABEL: trunc2x4i32_8i16: 1648; AVX512BWVL: # %bb.0: # %entry 1649; AVX512BWVL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1650; AVX512BWVL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1651; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 1652; AVX512BWVL-NEXT: vzeroupper 1653; AVX512BWVL-NEXT: retq 1654entry: 1655 %0 = trunc <4 x i32> %a to <4 x i16> 1656 %1 = trunc <4 x i32> %b to <4 x i16> 1657 %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1658 ret <8 x i16> %2 1659} 1660 1661; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524 1662define i64 @trunc4i32_i64(<4 x i32> %inval) { 1663; SSE2-LABEL: trunc4i32_i64: 1664; SSE2: # %bb.0: # %entry 1665; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 1666; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7] 1667; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1668; SSE2-NEXT: movq %xmm0, %rax 1669; SSE2-NEXT: retq 1670; 1671; SSSE3-LABEL: trunc4i32_i64: 1672; SSSE3: # %bb.0: # %entry 1673; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u] 1674; SSSE3-NEXT: movq %xmm0, %rax 1675; SSSE3-NEXT: retq 1676; 1677; SSE41-LABEL: trunc4i32_i64: 1678; SSE41: # %bb.0: # %entry 1679; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u] 1680; SSE41-NEXT: movq %xmm0, %rax 1681; SSE41-NEXT: retq 1682; 1683; AVX-LABEL: trunc4i32_i64: 1684; AVX: # %bb.0: # %entry 1685; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u] 1686; AVX-NEXT: vmovq %xmm0, %rax 1687; AVX-NEXT: retq 1688; 1689; AVX512F-LABEL: trunc4i32_i64: 1690; AVX512F: # %bb.0: # %entry 1691; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u] 1692; AVX512F-NEXT: vmovq %xmm0, %rax 1693; AVX512F-NEXT: retq 1694; 1695; AVX512VL-LABEL: trunc4i32_i64: 1696; AVX512VL: # %bb.0: # %entry 1697; AVX512VL-NEXT: vpmovdw %xmm0, %xmm0 1698; AVX512VL-NEXT: vmovq %xmm0, %rax 1699; AVX512VL-NEXT: retq 1700; 1701; AVX512BW-LABEL: trunc4i32_i64: 1702; AVX512BW: # %bb.0: # %entry 1703; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u] 1704; AVX512BW-NEXT: vmovq %xmm0, %rax 1705; AVX512BW-NEXT: retq 1706; 1707; AVX512BWVL-LABEL: trunc4i32_i64: 1708; AVX512BWVL: # %bb.0: # %entry 1709; AVX512BWVL-NEXT: vpmovdw %xmm0, %xmm0 1710; AVX512BWVL-NEXT: vmovq %xmm0, %rax 1711; AVX512BWVL-NEXT: retq 1712entry: 1713 %0 = trunc <4 x i32> %inval to <4 x i16> 1714 %1 = bitcast <4 x i16> %0 to i64 1715 ret i64 %1 1716} 1717 1718define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) { 1719; SSE2-LABEL: trunc2x8i16_16i8: 1720; SSE2: # %bb.0: # %entry 1721; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,0,255,0,255,0,255,0,255,0,255,0,255,0,255,0] 1722; SSE2-NEXT: pand %xmm2, %xmm0 1723; SSE2-NEXT: pand %xmm2, %xmm1 1724; SSE2-NEXT: packuswb %xmm1, %xmm0 1725; SSE2-NEXT: retq 1726; 1727; SSSE3-LABEL: trunc2x8i16_16i8: 1728; SSSE3: # %bb.0: # %entry 1729; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1730; SSSE3-NEXT: pand %xmm2, %xmm1 1731; SSSE3-NEXT: pand %xmm2, %xmm0 1732; SSSE3-NEXT: packuswb %xmm1, %xmm0 1733; SSSE3-NEXT: retq 1734; 1735; SSE41-LABEL: trunc2x8i16_16i8: 1736; SSE41: # %bb.0: # %entry 1737; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1738; SSE41-NEXT: pand %xmm2, %xmm1 1739; SSE41-NEXT: pand %xmm2, %xmm0 1740; SSE41-NEXT: packuswb %xmm1, %xmm0 1741; SSE41-NEXT: retq 1742; 1743; AVX-LABEL: trunc2x8i16_16i8: 1744; AVX: # %bb.0: # %entry 1745; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1746; AVX-NEXT: vpand %xmm2, %xmm1, %xmm1 1747; AVX-NEXT: vpand %xmm2, %xmm0, %xmm0 1748; AVX-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1749; AVX-NEXT: retq 1750; 1751; AVX512F-LABEL: trunc2x8i16_16i8: 1752; AVX512F: # %bb.0: # %entry 1753; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1754; AVX512F-NEXT: vpand %xmm2, %xmm1, %xmm1 1755; AVX512F-NEXT: vpand %xmm2, %xmm0, %xmm0 1756; AVX512F-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1757; AVX512F-NEXT: retq 1758; 1759; AVX512VL-LABEL: trunc2x8i16_16i8: 1760; AVX512VL: # %bb.0: # %entry 1761; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1762; AVX512VL-NEXT: vpand %xmm2, %xmm1, %xmm1 1763; AVX512VL-NEXT: vpand %xmm2, %xmm0, %xmm0 1764; AVX512VL-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1765; AVX512VL-NEXT: retq 1766; 1767; AVX512BW-LABEL: trunc2x8i16_16i8: 1768; AVX512BW: # %bb.0: # %entry 1769; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1770; AVX512BW-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1771; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1772; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 1773; AVX512BW-NEXT: vzeroupper 1774; AVX512BW-NEXT: retq 1775; 1776; AVX512BWVL-LABEL: trunc2x8i16_16i8: 1777; AVX512BWVL: # %bb.0: # %entry 1778; AVX512BWVL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 1779; AVX512BWVL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1780; AVX512BWVL-NEXT: vpmovwb %ymm0, %xmm0 1781; AVX512BWVL-NEXT: vzeroupper 1782; AVX512BWVL-NEXT: retq 1783entry: 1784 %0 = trunc <8 x i16> %a to <8 x i8> 1785 %1 = trunc <8 x i16> %b to <8 x i8> 1786 %2 = shufflevector <8 x i8> %0, <8 x i8> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 1787 ret <16 x i8> %2 1788} 1789 1790; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524 1791define i64 @trunc8i16_i64(<8 x i16> %inval) { 1792; SSE2-LABEL: trunc8i16_i64: 1793; SSE2: # %bb.0: # %entry 1794; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 1795; SSE2-NEXT: packuswb %xmm0, %xmm0 1796; SSE2-NEXT: movq %xmm0, %rax 1797; SSE2-NEXT: retq 1798; 1799; SSSE3-LABEL: trunc8i16_i64: 1800; SSSE3: # %bb.0: # %entry 1801; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1802; SSSE3-NEXT: movq %xmm0, %rax 1803; SSSE3-NEXT: retq 1804; 1805; SSE41-LABEL: trunc8i16_i64: 1806; SSE41: # %bb.0: # %entry 1807; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1808; SSE41-NEXT: movq %xmm0, %rax 1809; SSE41-NEXT: retq 1810; 1811; AVX-LABEL: trunc8i16_i64: 1812; AVX: # %bb.0: # %entry 1813; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1814; AVX-NEXT: vmovq %xmm0, %rax 1815; AVX-NEXT: retq 1816; 1817; AVX512F-LABEL: trunc8i16_i64: 1818; AVX512F: # %bb.0: # %entry 1819; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1820; AVX512F-NEXT: vmovq %xmm0, %rax 1821; AVX512F-NEXT: retq 1822; 1823; AVX512VL-LABEL: trunc8i16_i64: 1824; AVX512VL: # %bb.0: # %entry 1825; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1826; AVX512VL-NEXT: vmovq %xmm0, %rax 1827; AVX512VL-NEXT: retq 1828; 1829; AVX512BW-LABEL: trunc8i16_i64: 1830; AVX512BW: # %bb.0: # %entry 1831; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] 1832; AVX512BW-NEXT: vmovq %xmm0, %rax 1833; AVX512BW-NEXT: retq 1834; 1835; AVX512BWVL-LABEL: trunc8i16_i64: 1836; AVX512BWVL: # %bb.0: # %entry 1837; AVX512BWVL-NEXT: vpmovwb %xmm0, %xmm0 1838; AVX512BWVL-NEXT: vmovq %xmm0, %rax 1839; AVX512BWVL-NEXT: retq 1840entry: 1841 %0 = trunc <8 x i16> %inval to <8 x i8> 1842 %1 = bitcast <8 x i8> %0 to i64 1843 ret i64 %1 1844} 1845 1846define <16 x i8> @trunc16i64_16i8_const() { 1847; SSE-LABEL: trunc16i64_16i8_const: 1848; SSE: # %bb.0: # %entry 1849; SSE-NEXT: xorps %xmm0, %xmm0 1850; SSE-NEXT: retq 1851; 1852; AVX-LABEL: trunc16i64_16i8_const: 1853; AVX: # %bb.0: # %entry 1854; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0 1855; AVX-NEXT: retq 1856; 1857; AVX512-LABEL: trunc16i64_16i8_const: 1858; AVX512: # %bb.0: # %entry 1859; AVX512-NEXT: vxorps %xmm0, %xmm0, %xmm0 1860; AVX512-NEXT: retq 1861 1862entry: 1863 %0 = trunc <16 x i64> zeroinitializer to <16 x i8> 1864 %1 = shufflevector <16 x i8> %0, <16 x i8> %0, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 undef, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26> 1865 ret <16 x i8> %1 1866} 1867 1868define <8 x i16> @PR32160(<8 x i32> %x) { 1869; SSE-LABEL: PR32160: 1870; SSE: # %bb.0: 1871; SSE-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,4,4,4] 1872; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,2,2,2] 1873; SSE-NEXT: retq 1874; 1875; AVX1-LABEL: PR32160: 1876; AVX1: # %bb.0: 1877; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[8,9,8,9,8,9,8,9,8,9,8,9,8,9,8,9] 1878; AVX1-NEXT: vzeroupper 1879; AVX1-NEXT: retq 1880; 1881; AVX2-SLOW-LABEL: PR32160: 1882; AVX2-SLOW: # %bb.0: 1883; AVX2-SLOW-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,2,2,2] 1884; AVX2-SLOW-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[2,2,2,2,4,5,6,7] 1885; AVX2-SLOW-NEXT: vpbroadcastd %xmm0, %xmm0 1886; AVX2-SLOW-NEXT: vzeroupper 1887; AVX2-SLOW-NEXT: retq 1888; 1889; AVX2-FAST-LABEL: PR32160: 1890; AVX2-FAST: # %bb.0: 1891; AVX2-FAST-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[8,9,8,9,8,9,8,9,8,9,8,9,8,9,8,9] 1892; AVX2-FAST-NEXT: vzeroupper 1893; AVX2-FAST-NEXT: retq 1894; 1895; AVX512F-LABEL: PR32160: 1896; AVX512F: # %bb.0: 1897; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1898; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 1899; AVX512F-NEXT: vpshuflw {{.*#+}} xmm0 = xmm0[2,2,2,2,4,5,6,7] 1900; AVX512F-NEXT: vpbroadcastd %xmm0, %xmm0 1901; AVX512F-NEXT: vzeroupper 1902; AVX512F-NEXT: retq 1903; 1904; AVX512VL-LABEL: PR32160: 1905; AVX512VL: # %bb.0: 1906; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 1907; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,4,5,4,5,4,5,4,5,4,5] 1908; AVX512VL-NEXT: vzeroupper 1909; AVX512VL-NEXT: retq 1910; 1911; AVX512BW-LABEL: PR32160: 1912; AVX512BW: # %bb.0: 1913; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 1914; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 1915; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,4,5,4,5,4,5,4,5,4,5] 1916; AVX512BW-NEXT: vzeroupper 1917; AVX512BW-NEXT: retq 1918; 1919; AVX512BWVL-LABEL: PR32160: 1920; AVX512BWVL: # %bb.0: 1921; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 1922; AVX512BWVL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[4,5,4,5,4,5,4,5,4,5,4,5,4,5,4,5] 1923; AVX512BWVL-NEXT: vzeroupper 1924; AVX512BWVL-NEXT: retq 1925 %shuf = trunc <8 x i32> %x to <8 x i16> 1926 %trunc = shufflevector <8 x i16> %shuf, <8 x i16> undef, <8 x i32> <i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2, i32 2> 1927 ret <8 x i16> %trunc 1928} 1929 1930define void @PR34773(i16* %a0, i8* %a1) { 1931; SSE-LABEL: PR34773: 1932; SSE: # %bb.0: 1933; SSE-NEXT: movdqu (%rdi), %xmm0 1934; SSE-NEXT: movdqu 16(%rdi), %xmm1 1935; SSE-NEXT: movdqu 32(%rdi), %xmm2 1936; SSE-NEXT: movdqu 48(%rdi), %xmm3 1937; SSE-NEXT: psrlw $8, %xmm1 1938; SSE-NEXT: psrlw $8, %xmm0 1939; SSE-NEXT: packuswb %xmm1, %xmm0 1940; SSE-NEXT: psrlw $8, %xmm3 1941; SSE-NEXT: psrlw $8, %xmm2 1942; SSE-NEXT: packuswb %xmm3, %xmm2 1943; SSE-NEXT: movdqu %xmm0, (%rsi) 1944; SSE-NEXT: movdqu %xmm2, 16(%rsi) 1945; SSE-NEXT: retq 1946; 1947; AVX1-LABEL: PR34773: 1948; AVX1: # %bb.0: 1949; AVX1-NEXT: vmovdqu (%rdi), %xmm0 1950; AVX1-NEXT: vmovdqu 16(%rdi), %xmm1 1951; AVX1-NEXT: vmovdqu 32(%rdi), %xmm2 1952; AVX1-NEXT: vmovdqu 48(%rdi), %xmm3 1953; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 1954; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 1955; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1956; AVX1-NEXT: vpsrlw $8, %xmm3, %xmm1 1957; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 1958; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 1959; AVX1-NEXT: vmovdqu %xmm0, (%rsi) 1960; AVX1-NEXT: vmovdqu %xmm1, 16(%rsi) 1961; AVX1-NEXT: retq 1962; 1963; AVX2-LABEL: PR34773: 1964; AVX2: # %bb.0: 1965; AVX2-NEXT: vmovdqu (%rdi), %ymm0 1966; AVX2-NEXT: vmovdqu 32(%rdi), %ymm1 1967; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0 1968; AVX2-NEXT: vpsrlw $8, %ymm1, %ymm1 1969; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 1970; AVX2-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 1971; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 1972; AVX2-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 1973; AVX2-NEXT: vmovdqu %xmm0, (%rsi) 1974; AVX2-NEXT: vmovdqu %xmm1, 16(%rsi) 1975; AVX2-NEXT: vzeroupper 1976; AVX2-NEXT: retq 1977; 1978; AVX512F-LABEL: PR34773: 1979; AVX512F: # %bb.0: 1980; AVX512F-NEXT: vmovdqu (%rdi), %ymm0 1981; AVX512F-NEXT: vmovdqu 32(%rdi), %ymm1 1982; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 1983; AVX512F-NEXT: vpsrlw $8, %ymm1, %ymm1 1984; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1985; AVX512F-NEXT: vpmovdb %zmm0, (%rsi) 1986; AVX512F-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero 1987; AVX512F-NEXT: vpmovdb %zmm0, 16(%rsi) 1988; AVX512F-NEXT: vzeroupper 1989; AVX512F-NEXT: retq 1990; 1991; AVX512VL-LABEL: PR34773: 1992; AVX512VL: # %bb.0: 1993; AVX512VL-NEXT: vmovdqu (%rdi), %ymm0 1994; AVX512VL-NEXT: vmovdqu 32(%rdi), %ymm1 1995; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 1996; AVX512VL-NEXT: vpsrlw $8, %ymm1, %ymm1 1997; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1998; AVX512VL-NEXT: vpmovdb %zmm0, (%rsi) 1999; AVX512VL-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero 2000; AVX512VL-NEXT: vpmovdb %zmm0, 16(%rsi) 2001; AVX512VL-NEXT: vzeroupper 2002; AVX512VL-NEXT: retq 2003; 2004; AVX512BW-LABEL: PR34773: 2005; AVX512BW: # %bb.0: 2006; AVX512BW-NEXT: vmovdqu (%rdi), %ymm0 2007; AVX512BW-NEXT: vmovdqu 32(%rdi), %ymm1 2008; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 2009; AVX512BW-NEXT: vpsrlw $8, %ymm1, %ymm1 2010; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 2011; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1 2012; AVX512BW-NEXT: vmovdqu %xmm0, (%rsi) 2013; AVX512BW-NEXT: vmovdqu %xmm1, 16(%rsi) 2014; AVX512BW-NEXT: vzeroupper 2015; AVX512BW-NEXT: retq 2016; 2017; AVX512BWVL-LABEL: PR34773: 2018; AVX512BWVL: # %bb.0: 2019; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %ymm0 2020; AVX512BWVL-NEXT: vpsrlw $8, 32(%rdi), %ymm1 2021; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rsi) 2022; AVX512BWVL-NEXT: vpmovwb %ymm1, 16(%rsi) 2023; AVX512BWVL-NEXT: vzeroupper 2024; AVX512BWVL-NEXT: retq 2025 %1 = getelementptr i16, i16* %a0, i64 16 2026 %2 = getelementptr i8, i8* %a1, i64 16 2027 %3 = bitcast i16* %a0 to <16 x i16>* 2028 %4 = bitcast i16* %1 to <16 x i16>* 2029 %5 = bitcast i8* %a1 to <16 x i8>* 2030 %6 = bitcast i8* %2 to <16 x i8>* 2031 %7 = load <16 x i16>, <16 x i16>* %3, align 2 2032 %8 = load <16 x i16>, <16 x i16>* %4, align 2 2033 %9 = lshr <16 x i16> %7, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8> 2034 %10 = lshr <16 x i16> %8, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8> 2035 %11 = trunc <16 x i16> %9 to <16 x i8> 2036 %12 = trunc <16 x i16> %10 to <16 x i8> 2037 store <16 x i8> %11, <16 x i8>* %5, align 1 2038 store <16 x i8> %12, <16 x i8>* %6, align 1 2039 ret void 2040} 2041 2042; Store merging must not infinitely fight store splitting. 2043 2044define void @store_merge_split(<8 x i32> %w1, <8 x i32> %w2, i64 %idx, <8 x i16>* %p) align 2 { 2045; SSE2-LABEL: store_merge_split: 2046; SSE2: # %bb.0: 2047; SSE2-NEXT: pslld $16, %xmm1 2048; SSE2-NEXT: psrad $16, %xmm1 2049; SSE2-NEXT: pslld $16, %xmm0 2050; SSE2-NEXT: psrad $16, %xmm0 2051; SSE2-NEXT: packssdw %xmm1, %xmm0 2052; SSE2-NEXT: pslld $16, %xmm3 2053; SSE2-NEXT: psrad $16, %xmm3 2054; SSE2-NEXT: pslld $16, %xmm2 2055; SSE2-NEXT: psrad $16, %xmm2 2056; SSE2-NEXT: packssdw %xmm3, %xmm2 2057; SSE2-NEXT: shlq $4, %rdi 2058; SSE2-NEXT: movdqu %xmm0, (%rsi,%rdi) 2059; SSE2-NEXT: movdqu %xmm2, 16(%rsi,%rdi) 2060; SSE2-NEXT: retq 2061; 2062; SSSE3-LABEL: store_merge_split: 2063; SSSE3: # %bb.0: 2064; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 2065; SSSE3-NEXT: pshufb %xmm4, %xmm1 2066; SSSE3-NEXT: pshufb %xmm4, %xmm0 2067; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2068; SSSE3-NEXT: pshufb %xmm4, %xmm3 2069; SSSE3-NEXT: pshufb %xmm4, %xmm2 2070; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] 2071; SSSE3-NEXT: shlq $4, %rdi 2072; SSSE3-NEXT: movdqu %xmm0, (%rsi,%rdi) 2073; SSSE3-NEXT: movdqu %xmm2, 16(%rsi,%rdi) 2074; SSSE3-NEXT: retq 2075; 2076; SSE41-LABEL: store_merge_split: 2077; SSE41: # %bb.0: 2078; SSE41-NEXT: pxor %xmm4, %xmm4 2079; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7] 2080; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7] 2081; SSE41-NEXT: packusdw %xmm1, %xmm0 2082; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7] 2083; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7] 2084; SSE41-NEXT: packusdw %xmm3, %xmm2 2085; SSE41-NEXT: shlq $4, %rdi 2086; SSE41-NEXT: movdqu %xmm0, (%rsi,%rdi) 2087; SSE41-NEXT: movdqu %xmm2, 16(%rsi,%rdi) 2088; SSE41-NEXT: retq 2089; 2090; AVX1-LABEL: store_merge_split: 2091; AVX1: # %bb.0: 2092; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 2093; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = <0,1,4,5,8,9,12,13,u,u,u,u,u,u,u,u> 2094; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2 2095; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 2096; AVX1-NEXT: vpshufb %xmm4, %xmm0, %xmm0 2097; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2098; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 2099; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2 2100; AVX1-NEXT: vpshufb %xmm4, %xmm1, %xmm1 2101; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2102; AVX1-NEXT: shlq $4, %rdi 2103; AVX1-NEXT: vmovdqu %xmm0, (%rsi,%rdi) 2104; AVX1-NEXT: vmovdqu %xmm1, 16(%rsi,%rdi) 2105; AVX1-NEXT: vzeroupper 2106; AVX1-NEXT: retq 2107; 2108; AVX2-LABEL: store_merge_split: 2109; AVX2: # %bb.0: 2110; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2111; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 2112; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2113; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 2114; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2115; AVX2-NEXT: shlq $4, %rdi 2116; AVX2-NEXT: vmovdqu %xmm0, (%rsi,%rdi) 2117; AVX2-NEXT: vmovdqu %xmm1, 16(%rsi,%rdi) 2118; AVX2-NEXT: vzeroupper 2119; AVX2-NEXT: retq 2120; 2121; AVX512F-LABEL: store_merge_split: 2122; AVX512F: # %bb.0: 2123; AVX512F-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 2124; AVX512F-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 2125; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 2126; AVX512F-NEXT: vpmovdw %zmm1, %ymm1 2127; AVX512F-NEXT: shlq $4, %rdi 2128; AVX512F-NEXT: vmovdqu %xmm0, (%rsi,%rdi) 2129; AVX512F-NEXT: vmovdqu %xmm1, 16(%rsi,%rdi) 2130; AVX512F-NEXT: vzeroupper 2131; AVX512F-NEXT: retq 2132; 2133; AVX512VL-LABEL: store_merge_split: 2134; AVX512VL: # %bb.0: 2135; AVX512VL-NEXT: shlq $4, %rdi 2136; AVX512VL-NEXT: vpmovdw %ymm0, (%rsi,%rdi) 2137; AVX512VL-NEXT: vpmovdw %ymm1, 16(%rsi,%rdi) 2138; AVX512VL-NEXT: vzeroupper 2139; AVX512VL-NEXT: retq 2140; 2141; AVX512BW-LABEL: store_merge_split: 2142; AVX512BW: # %bb.0: 2143; AVX512BW-NEXT: # kill: def $ymm1 killed $ymm1 def $zmm1 2144; AVX512BW-NEXT: # kill: def $ymm0 killed $ymm0 def $zmm0 2145; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 2146; AVX512BW-NEXT: vpmovdw %zmm1, %ymm1 2147; AVX512BW-NEXT: shlq $4, %rdi 2148; AVX512BW-NEXT: vmovdqu %xmm0, (%rsi,%rdi) 2149; AVX512BW-NEXT: vmovdqu %xmm1, 16(%rsi,%rdi) 2150; AVX512BW-NEXT: vzeroupper 2151; AVX512BW-NEXT: retq 2152; 2153; AVX512BWVL-LABEL: store_merge_split: 2154; AVX512BWVL: # %bb.0: 2155; AVX512BWVL-NEXT: shlq $4, %rdi 2156; AVX512BWVL-NEXT: vpmovdw %ymm0, (%rsi,%rdi) 2157; AVX512BWVL-NEXT: vpmovdw %ymm1, 16(%rsi,%rdi) 2158; AVX512BWVL-NEXT: vzeroupper 2159; AVX512BWVL-NEXT: retq 2160 %t1 = trunc <8 x i32> %w1 to <8 x i16> 2161 %t2 = trunc <8 x i32> %w2 to <8 x i16> 2162 %g1 = getelementptr inbounds <8 x i16>, <8 x i16>* %p, i64 %idx 2163 %g2 = getelementptr inbounds <8 x i16>, <8 x i16>* %g1, i64 1 2164 store <8 x i16> %t1, <8 x i16>* %g1, align 2 2165 store <8 x i16> %t2, <8 x i16>* %g2, align 2 2166 ret void 2167} 2168