1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512VL
9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BW
10; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BWVL
11
12define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) {
13; SSE-LABEL: trunc8i64_8i32:
14; SSE:       # BB#0: # %entry
15; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
16; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
17; SSE-NEXT:    movaps %xmm2, %xmm1
18; SSE-NEXT:    retq
19;
20; AVX1-LABEL: trunc8i64_8i32:
21; AVX1:       # BB#0: # %entry
22; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
23; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
24; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
25; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
26; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
27; AVX1-NEXT:    retq
28;
29; AVX2-LABEL: trunc8i64_8i32:
30; AVX2:       # BB#0: # %entry
31; AVX2-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
32; AVX2-NEXT:    vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
33; AVX2-NEXT:    vpermilps {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
34; AVX2-NEXT:    vpermpd {{.*#+}} ymm1 = ymm1[0,2,2,3]
35; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
36; AVX2-NEXT:    retq
37;
38; AVX512-LABEL: trunc8i64_8i32:
39; AVX512:       # BB#0: # %entry
40; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
41; AVX512-NEXT:    retq
42entry:
43  %0 = trunc <8 x i64> %a to <8 x i32>
44  ret <8 x i32> %0
45}
46
47define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) {
48; SSE2-LABEL: trunc8i64_8i16:
49; SSE2:       # BB#0: # %entry
50; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
51; SSE2-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
52; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
53; SSE2-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
54; SSE2-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
55; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
56; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
57; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
58; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
59; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
60; SSE2-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
61; SSE2-NEXT:    movapd %xmm2, %xmm0
62; SSE2-NEXT:    retq
63;
64; SSSE3-LABEL: trunc8i64_8i16:
65; SSSE3:       # BB#0: # %entry
66; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
67; SSSE3-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
68; SSSE3-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
69; SSSE3-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
70; SSSE3-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
71; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
72; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
73; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
74; SSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
75; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
76; SSSE3-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
77; SSSE3-NEXT:    movapd %xmm2, %xmm0
78; SSSE3-NEXT:    retq
79;
80; SSE41-LABEL: trunc8i64_8i16:
81; SSE41:       # BB#0: # %entry
82; SSE41-NEXT:    pxor %xmm4, %xmm4
83; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
84; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7]
85; SSE41-NEXT:    packusdw %xmm3, %xmm2
86; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7]
87; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7]
88; SSE41-NEXT:    packusdw %xmm1, %xmm0
89; SSE41-NEXT:    packusdw %xmm2, %xmm0
90; SSE41-NEXT:    retq
91;
92; AVX1-LABEL: trunc8i64_8i16:
93; AVX1:       # BB#0: # %entry
94; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
95; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
96; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
97; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7]
98; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
99; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
100; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
101; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7]
102; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
103; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
104; AVX1-NEXT:    vzeroupper
105; AVX1-NEXT:    retq
106;
107; AVX2-LABEL: trunc8i64_8i16:
108; AVX2:       # BB#0: # %entry
109; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
110; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
111; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
112; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
113; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
114; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
115; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
116; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
117; AVX2-NEXT:    vzeroupper
118; AVX2-NEXT:    retq
119;
120; AVX512-LABEL: trunc8i64_8i16:
121; AVX512:       # BB#0: # %entry
122; AVX512-NEXT:    vpmovqw %zmm0, %xmm0
123; AVX512-NEXT:    vzeroupper
124; AVX512-NEXT:    retq
125entry:
126  %0 = trunc <8 x i64> %a to <8 x i16>
127  ret <8 x i16> %0
128}
129
130define void @trunc8i64_8i8(<8 x i64> %a) {
131; SSE-LABEL: trunc8i64_8i8:
132; SSE:       # BB#0: # %entry
133; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
134; SSE-NEXT:    pand %xmm4, %xmm3
135; SSE-NEXT:    pand %xmm4, %xmm2
136; SSE-NEXT:    packuswb %xmm3, %xmm2
137; SSE-NEXT:    pand %xmm4, %xmm1
138; SSE-NEXT:    pand %xmm4, %xmm0
139; SSE-NEXT:    packuswb %xmm1, %xmm0
140; SSE-NEXT:    packuswb %xmm2, %xmm0
141; SSE-NEXT:    packuswb %xmm0, %xmm0
142; SSE-NEXT:    movq %xmm0, (%rax)
143; SSE-NEXT:    retq
144;
145; AVX1-LABEL: trunc8i64_8i8:
146; AVX1:       # BB#0: # %entry
147; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
148; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
149; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
150; AVX1-NEXT:    vpand %xmm3, %xmm1, %xmm1
151; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
152; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
153; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
154; AVX1-NEXT:    vpand %xmm3, %xmm0, %xmm0
155; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
156; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
157; AVX1-NEXT:    vpackuswb %xmm0, %xmm0, %xmm0
158; AVX1-NEXT:    vmovq %xmm0, (%rax)
159; AVX1-NEXT:    vzeroupper
160; AVX1-NEXT:    retq
161;
162; AVX2-LABEL: trunc8i64_8i8:
163; AVX2:       # BB#0: # %entry
164; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
165; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
166; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
167; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
168; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
169; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
170; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
171; AVX2-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
172; AVX2-NEXT:    vmovq %xmm0, (%rax)
173; AVX2-NEXT:    vzeroupper
174; AVX2-NEXT:    retq
175;
176; AVX512-LABEL: trunc8i64_8i8:
177; AVX512:       # BB#0: # %entry
178; AVX512-NEXT:    vpmovqb %zmm0, (%rax)
179; AVX512-NEXT:    vzeroupper
180; AVX512-NEXT:    retq
181entry:
182  %0 = trunc <8 x i64> %a to <8 x i8>
183  store <8 x i8> %0, <8 x i8>* undef, align 4
184  ret void
185}
186
187define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) {
188; SSE2-LABEL: trunc8i32_8i16:
189; SSE2:       # BB#0: # %entry
190; SSE2-NEXT:    pslld $16, %xmm1
191; SSE2-NEXT:    psrad $16, %xmm1
192; SSE2-NEXT:    pslld $16, %xmm0
193; SSE2-NEXT:    psrad $16, %xmm0
194; SSE2-NEXT:    packssdw %xmm1, %xmm0
195; SSE2-NEXT:    retq
196;
197; SSSE3-LABEL: trunc8i32_8i16:
198; SSSE3:       # BB#0: # %entry
199; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
200; SSSE3-NEXT:    pshufb %xmm2, %xmm1
201; SSSE3-NEXT:    pshufb %xmm2, %xmm0
202; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
203; SSSE3-NEXT:    retq
204;
205; SSE41-LABEL: trunc8i32_8i16:
206; SSE41:       # BB#0: # %entry
207; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
208; SSE41-NEXT:    pshufb %xmm2, %xmm1
209; SSE41-NEXT:    pshufb %xmm2, %xmm0
210; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
211; SSE41-NEXT:    retq
212;
213; AVX1-LABEL: trunc8i32_8i16:
214; AVX1:       # BB#0: # %entry
215; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
216; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
217; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
218; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
219; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
220; AVX1-NEXT:    vzeroupper
221; AVX1-NEXT:    retq
222;
223; AVX2-LABEL: trunc8i32_8i16:
224; AVX2:       # BB#0: # %entry
225; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
226; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
227; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
228; AVX2-NEXT:    vzeroupper
229; AVX2-NEXT:    retq
230;
231; AVX512F-LABEL: trunc8i32_8i16:
232; AVX512F:       # BB#0: # %entry
233; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
234; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
235; AVX512F-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
236; AVX512F-NEXT:    vzeroupper
237; AVX512F-NEXT:    retq
238;
239; AVX512VL-LABEL: trunc8i32_8i16:
240; AVX512VL:       # BB#0: # %entry
241; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
242; AVX512VL-NEXT:    vzeroupper
243; AVX512VL-NEXT:    retq
244;
245; AVX512BW-LABEL: trunc8i32_8i16:
246; AVX512BW:       # BB#0: # %entry
247; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
248; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
249; AVX512BW-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
250; AVX512BW-NEXT:    vzeroupper
251; AVX512BW-NEXT:    retq
252;
253; AVX512BWVL-LABEL: trunc8i32_8i16:
254; AVX512BWVL:       # BB#0: # %entry
255; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
256; AVX512BWVL-NEXT:    vzeroupper
257; AVX512BWVL-NEXT:    retq
258entry:
259  %0 = trunc <8 x i32> %a to <8 x i16>
260  ret <8 x i16> %0
261}
262
263define void @trunc8i32_8i8(<8 x i32> %a) {
264; SSE2-LABEL: trunc8i32_8i8:
265; SSE2:       # BB#0: # %entry
266; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
267; SSE2-NEXT:    pand %xmm2, %xmm1
268; SSE2-NEXT:    pand %xmm2, %xmm0
269; SSE2-NEXT:    packuswb %xmm1, %xmm0
270; SSE2-NEXT:    packuswb %xmm0, %xmm0
271; SSE2-NEXT:    movq %xmm0, (%rax)
272; SSE2-NEXT:    retq
273;
274; SSSE3-LABEL: trunc8i32_8i8:
275; SSSE3:       # BB#0: # %entry
276; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
277; SSSE3-NEXT:    pshufb %xmm2, %xmm1
278; SSSE3-NEXT:    pshufb %xmm2, %xmm0
279; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
280; SSSE3-NEXT:    movq %xmm0, (%rax)
281; SSSE3-NEXT:    retq
282;
283; SSE41-LABEL: trunc8i32_8i8:
284; SSE41:       # BB#0: # %entry
285; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
286; SSE41-NEXT:    pshufb %xmm2, %xmm1
287; SSE41-NEXT:    pshufb %xmm2, %xmm0
288; SSE41-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
289; SSE41-NEXT:    movq %xmm0, (%rax)
290; SSE41-NEXT:    retq
291;
292; AVX1-LABEL: trunc8i32_8i8:
293; AVX1:       # BB#0: # %entry
294; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
295; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
296; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
297; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
298; AVX1-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
299; AVX1-NEXT:    vmovq %xmm0, (%rax)
300; AVX1-NEXT:    vzeroupper
301; AVX1-NEXT:    retq
302;
303; AVX2-LABEL: trunc8i32_8i8:
304; AVX2:       # BB#0: # %entry
305; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
306; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
307; AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
308; AVX2-NEXT:    vmovq %xmm0, (%rax)
309; AVX2-NEXT:    vzeroupper
310; AVX2-NEXT:    retq
311;
312; AVX512F-LABEL: trunc8i32_8i8:
313; AVX512F:       # BB#0: # %entry
314; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
315; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
316; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
317; AVX512F-NEXT:    vmovq %xmm0, (%rax)
318; AVX512F-NEXT:    vzeroupper
319; AVX512F-NEXT:    retq
320;
321; AVX512VL-LABEL: trunc8i32_8i8:
322; AVX512VL:       # BB#0: # %entry
323; AVX512VL-NEXT:    vpmovdb %ymm0, (%rax)
324; AVX512VL-NEXT:    vzeroupper
325; AVX512VL-NEXT:    retq
326;
327; AVX512BW-LABEL: trunc8i32_8i8:
328; AVX512BW:       # BB#0: # %entry
329; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
330; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
331; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
332; AVX512BW-NEXT:    vmovq %xmm0, (%rax)
333; AVX512BW-NEXT:    vzeroupper
334; AVX512BW-NEXT:    retq
335;
336; AVX512BWVL-LABEL: trunc8i32_8i8:
337; AVX512BWVL:       # BB#0: # %entry
338; AVX512BWVL-NEXT:    vpmovdb %ymm0, (%rax)
339; AVX512BWVL-NEXT:    vzeroupper
340; AVX512BWVL-NEXT:    retq
341entry:
342  %0 = trunc <8 x i32> %a to <8 x i8>
343  store <8 x i8> %0, <8 x i8>* undef, align 4
344  ret void
345}
346
347define void @trunc16i32_16i16(<16 x i32> %a) {
348; SSE2-LABEL: trunc16i32_16i16:
349; SSE2:       # BB#0: # %entry
350; SSE2-NEXT:    pslld $16, %xmm1
351; SSE2-NEXT:    psrad $16, %xmm1
352; SSE2-NEXT:    pslld $16, %xmm0
353; SSE2-NEXT:    psrad $16, %xmm0
354; SSE2-NEXT:    packssdw %xmm1, %xmm0
355; SSE2-NEXT:    pslld $16, %xmm3
356; SSE2-NEXT:    psrad $16, %xmm3
357; SSE2-NEXT:    pslld $16, %xmm2
358; SSE2-NEXT:    psrad $16, %xmm2
359; SSE2-NEXT:    packssdw %xmm3, %xmm2
360; SSE2-NEXT:    movdqu %xmm2, (%rax)
361; SSE2-NEXT:    movdqu %xmm0, (%rax)
362; SSE2-NEXT:    retq
363;
364; SSSE3-LABEL: trunc16i32_16i16:
365; SSSE3:       # BB#0: # %entry
366; SSSE3-NEXT:    pslld $16, %xmm1
367; SSSE3-NEXT:    psrad $16, %xmm1
368; SSSE3-NEXT:    pslld $16, %xmm0
369; SSSE3-NEXT:    psrad $16, %xmm0
370; SSSE3-NEXT:    packssdw %xmm1, %xmm0
371; SSSE3-NEXT:    pslld $16, %xmm3
372; SSSE3-NEXT:    psrad $16, %xmm3
373; SSSE3-NEXT:    pslld $16, %xmm2
374; SSSE3-NEXT:    psrad $16, %xmm2
375; SSSE3-NEXT:    packssdw %xmm3, %xmm2
376; SSSE3-NEXT:    movdqu %xmm2, (%rax)
377; SSSE3-NEXT:    movdqu %xmm0, (%rax)
378; SSSE3-NEXT:    retq
379;
380; SSE41-LABEL: trunc16i32_16i16:
381; SSE41:       # BB#0: # %entry
382; SSE41-NEXT:    pxor %xmm4, %xmm4
383; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7]
384; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7]
385; SSE41-NEXT:    packusdw %xmm1, %xmm0
386; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7]
387; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7]
388; SSE41-NEXT:    packusdw %xmm3, %xmm2
389; SSE41-NEXT:    movdqu %xmm2, (%rax)
390; SSE41-NEXT:    movdqu %xmm0, (%rax)
391; SSE41-NEXT:    retq
392;
393; AVX1-LABEL: trunc16i32_16i16:
394; AVX1:       # BB#0: # %entry
395; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
396; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
397; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3],xmm2[4],xmm3[5],xmm2[6],xmm3[7]
398; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1],xmm1[2],xmm3[3],xmm1[4],xmm3[5],xmm1[6],xmm3[7]
399; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
400; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
401; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3],xmm2[4],xmm3[5],xmm2[6],xmm3[7]
402; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1],xmm0[2],xmm3[3],xmm0[4],xmm3[5],xmm0[6],xmm3[7]
403; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
404; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
405; AVX1-NEXT:    vmovups %ymm0, (%rax)
406; AVX1-NEXT:    vzeroupper
407; AVX1-NEXT:    retq
408;
409; AVX2-LABEL: trunc16i32_16i16:
410; AVX2:       # BB#0: # %entry
411; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
412; AVX2-NEXT:    vpshufb %ymm2, %ymm0, %ymm0
413; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
414; AVX2-NEXT:    vpshufb %ymm2, %ymm1, %ymm1
415; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
416; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
417; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
418; AVX2-NEXT:    vzeroupper
419; AVX2-NEXT:    retq
420;
421; AVX512-LABEL: trunc16i32_16i16:
422; AVX512:       # BB#0: # %entry
423; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
424; AVX512-NEXT:    vzeroupper
425; AVX512-NEXT:    retq
426entry:
427  %0 = trunc <16 x i32> %a to <16 x i16>
428  store <16 x i16> %0, <16 x i16>* undef, align 4
429  ret void
430}
431
432define void @trunc16i32_16i8(<16 x i32> %a) {
433; SSE-LABEL: trunc16i32_16i8:
434; SSE:       # BB#0: # %entry
435; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
436; SSE-NEXT:    pand %xmm4, %xmm3
437; SSE-NEXT:    pand %xmm4, %xmm2
438; SSE-NEXT:    packuswb %xmm3, %xmm2
439; SSE-NEXT:    pand %xmm4, %xmm1
440; SSE-NEXT:    pand %xmm4, %xmm0
441; SSE-NEXT:    packuswb %xmm1, %xmm0
442; SSE-NEXT:    packuswb %xmm2, %xmm0
443; SSE-NEXT:    movdqu %xmm0, (%rax)
444; SSE-NEXT:    retq
445;
446; AVX1-LABEL: trunc16i32_16i8:
447; AVX1:       # BB#0: # %entry
448; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
449; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
450; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
451; AVX1-NEXT:    vpand %xmm3, %xmm1, %xmm1
452; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
453; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
454; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
455; AVX1-NEXT:    vpand %xmm3, %xmm0, %xmm0
456; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
457; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
458; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
459; AVX1-NEXT:    vzeroupper
460; AVX1-NEXT:    retq
461;
462; AVX2-LABEL: trunc16i32_16i8:
463; AVX2:       # BB#0: # %entry
464; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
465; AVX2-NEXT:    vpshufb %ymm2, %ymm1, %ymm1
466; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
467; AVX2-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
468; AVX2-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
469; AVX2-NEXT:    vpshufb %ymm2, %ymm0, %ymm0
470; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
471; AVX2-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
472; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
473; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
474; AVX2-NEXT:    vzeroupper
475; AVX2-NEXT:    retq
476;
477; AVX512-LABEL: trunc16i32_16i8:
478; AVX512:       # BB#0: # %entry
479; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
480; AVX512-NEXT:    vzeroupper
481; AVX512-NEXT:    retq
482entry:
483  %0 = trunc <16 x i32> %a to <16 x i8>
484  store <16 x i8> %0, <16 x i8>* undef, align 4
485  ret void
486}
487
488;PR25684
489define void @trunc16i16_16i8(<16 x i16> %a) {
490; SSE2-LABEL: trunc16i16_16i8:
491; SSE2:       # BB#0: # %entry
492; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
493; SSE2-NEXT:    pand %xmm2, %xmm1
494; SSE2-NEXT:    pand %xmm2, %xmm0
495; SSE2-NEXT:    packuswb %xmm1, %xmm0
496; SSE2-NEXT:    movdqu %xmm0, (%rax)
497; SSE2-NEXT:    retq
498;
499; SSSE3-LABEL: trunc16i16_16i8:
500; SSSE3:       # BB#0: # %entry
501; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
502; SSSE3-NEXT:    pshufb %xmm2, %xmm1
503; SSSE3-NEXT:    pshufb %xmm2, %xmm0
504; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
505; SSSE3-NEXT:    movdqu %xmm0, (%rax)
506; SSSE3-NEXT:    retq
507;
508; SSE41-LABEL: trunc16i16_16i8:
509; SSE41:       # BB#0: # %entry
510; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
511; SSE41-NEXT:    pshufb %xmm2, %xmm1
512; SSE41-NEXT:    pshufb %xmm2, %xmm0
513; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
514; SSE41-NEXT:    movdqu %xmm0, (%rax)
515; SSE41-NEXT:    retq
516;
517; AVX1-LABEL: trunc16i16_16i8:
518; AVX1:       # BB#0: # %entry
519; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
520; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
521; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
522; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
523; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
524; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
525; AVX1-NEXT:    vzeroupper
526; AVX1-NEXT:    retq
527;
528; AVX2-LABEL: trunc16i16_16i8:
529; AVX2:       # BB#0: # %entry
530; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
531; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
532; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
533; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
534; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
535; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
536; AVX2-NEXT:    vzeroupper
537; AVX2-NEXT:    retq
538;
539; AVX512F-LABEL: trunc16i16_16i8:
540; AVX512F:       # BB#0: # %entry
541; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
542; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
543; AVX512F-NEXT:    vmovdqu %xmm0, (%rax)
544; AVX512F-NEXT:    vzeroupper
545; AVX512F-NEXT:    retq
546;
547; AVX512VL-LABEL: trunc16i16_16i8:
548; AVX512VL:       # BB#0: # %entry
549; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
550; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
551; AVX512VL-NEXT:    vmovdqu %xmm0, (%rax)
552; AVX512VL-NEXT:    vzeroupper
553; AVX512VL-NEXT:    retq
554;
555; AVX512BW-LABEL: trunc16i16_16i8:
556; AVX512BW:       # BB#0: # %entry
557; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
558; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
559; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
560; AVX512BW-NEXT:    vzeroupper
561; AVX512BW-NEXT:    retq
562;
563; AVX512BWVL-LABEL: trunc16i16_16i8:
564; AVX512BWVL:       # BB#0: # %entry
565; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
566; AVX512BWVL-NEXT:    vzeroupper
567; AVX512BWVL-NEXT:    retq
568entry:
569  %0 = trunc <16 x i16> %a to <16 x i8>
570  store <16 x i8> %0, <16 x i8>* undef, align 4
571  ret void
572}
573
574define void @trunc32i16_32i8(<32 x i16> %a) {
575; SSE2-LABEL: trunc32i16_32i8:
576; SSE2:       # BB#0: # %entry
577; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
578; SSE2-NEXT:    pand %xmm4, %xmm1
579; SSE2-NEXT:    pand %xmm4, %xmm0
580; SSE2-NEXT:    packuswb %xmm1, %xmm0
581; SSE2-NEXT:    pand %xmm4, %xmm3
582; SSE2-NEXT:    pand %xmm4, %xmm2
583; SSE2-NEXT:    packuswb %xmm3, %xmm2
584; SSE2-NEXT:    movdqu %xmm2, (%rax)
585; SSE2-NEXT:    movdqu %xmm0, (%rax)
586; SSE2-NEXT:    retq
587;
588; SSSE3-LABEL: trunc32i16_32i8:
589; SSSE3:       # BB#0: # %entry
590; SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
591; SSSE3-NEXT:    pshufb %xmm4, %xmm1
592; SSSE3-NEXT:    pshufb %xmm4, %xmm0
593; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
594; SSSE3-NEXT:    pshufb %xmm4, %xmm3
595; SSSE3-NEXT:    pshufb %xmm4, %xmm2
596; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
597; SSSE3-NEXT:    movdqu %xmm2, (%rax)
598; SSSE3-NEXT:    movdqu %xmm0, (%rax)
599; SSSE3-NEXT:    retq
600;
601; SSE41-LABEL: trunc32i16_32i8:
602; SSE41:       # BB#0: # %entry
603; SSE41-NEXT:    movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
604; SSE41-NEXT:    pshufb %xmm4, %xmm1
605; SSE41-NEXT:    pshufb %xmm4, %xmm0
606; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
607; SSE41-NEXT:    pshufb %xmm4, %xmm3
608; SSE41-NEXT:    pshufb %xmm4, %xmm2
609; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
610; SSE41-NEXT:    movdqu %xmm2, (%rax)
611; SSE41-NEXT:    movdqu %xmm0, (%rax)
612; SSE41-NEXT:    retq
613;
614; AVX1-LABEL: trunc32i16_32i8:
615; AVX1:       # BB#0: # %entry
616; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
617; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
618; AVX1-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
619; AVX1-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
620; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
621; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
622; AVX1-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
623; AVX1-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
624; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
625; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
626; AVX1-NEXT:    vmovups %ymm0, (%rax)
627; AVX1-NEXT:    vzeroupper
628; AVX1-NEXT:    retq
629;
630; AVX2-LABEL: trunc32i16_32i8:
631; AVX2:       # BB#0: # %entry
632; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
633; AVX2-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
634; AVX2-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
635; AVX2-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
636; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
637; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm2
638; AVX2-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
639; AVX2-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
640; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
641; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
642; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
643; AVX2-NEXT:    vzeroupper
644; AVX2-NEXT:    retq
645;
646; AVX512F-LABEL: trunc32i16_32i8:
647; AVX512F:       # BB#0: # %entry
648; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
649; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
650; AVX512F-NEXT:    vpmovsxwd %ymm1, %zmm1
651; AVX512F-NEXT:    vpmovdb %zmm1, %xmm1
652; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
653; AVX512F-NEXT:    vmovdqu %ymm0, (%rax)
654; AVX512F-NEXT:    vzeroupper
655; AVX512F-NEXT:    retq
656;
657; AVX512VL-LABEL: trunc32i16_32i8:
658; AVX512VL:       # BB#0: # %entry
659; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
660; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
661; AVX512VL-NEXT:    vpmovsxwd %ymm1, %zmm1
662; AVX512VL-NEXT:    vpmovdb %zmm1, %xmm1
663; AVX512VL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
664; AVX512VL-NEXT:    vmovdqu %ymm0, (%rax)
665; AVX512VL-NEXT:    vzeroupper
666; AVX512VL-NEXT:    retq
667;
668; AVX512BW-LABEL: trunc32i16_32i8:
669; AVX512BW:       # BB#0: # %entry
670; AVX512BW-NEXT:    vpmovwb %zmm0, (%rax)
671; AVX512BW-NEXT:    vzeroupper
672; AVX512BW-NEXT:    retq
673;
674; AVX512BWVL-LABEL: trunc32i16_32i8:
675; AVX512BWVL:       # BB#0: # %entry
676; AVX512BWVL-NEXT:    vpmovwb %zmm0, (%rax)
677; AVX512BWVL-NEXT:    vzeroupper
678; AVX512BWVL-NEXT:    retq
679entry:
680  %0 = trunc <32 x i16> %a to <32 x i8>
681  store <32 x i8> %0, <32 x i8>* undef, align 4
682  ret void
683}
684
685define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) {
686; SSE-LABEL: trunc2x4i64_8i32:
687; SSE:       # BB#0: # %entry
688; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
689; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
690; SSE-NEXT:    movaps %xmm2, %xmm1
691; SSE-NEXT:    retq
692;
693; AVX1-LABEL: trunc2x4i64_8i32:
694; AVX1:       # BB#0: # %entry
695; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
696; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
697; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
698; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
699; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
700; AVX1-NEXT:    retq
701;
702; AVX2-LABEL: trunc2x4i64_8i32:
703; AVX2:       # BB#0: # %entry
704; AVX2-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
705; AVX2-NEXT:    vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
706; AVX2-NEXT:    vpermilps {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
707; AVX2-NEXT:    vpermpd {{.*#+}} ymm1 = ymm1[0,2,2,3]
708; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
709; AVX2-NEXT:    retq
710;
711; AVX512F-LABEL: trunc2x4i64_8i32:
712; AVX512F:       # BB#0: # %entry
713; AVX512F-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
714; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
715; AVX512F-NEXT:    vpmovqd %zmm0, %ymm0
716; AVX512F-NEXT:    vpmovqd %zmm1, %ymm1
717; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
718; AVX512F-NEXT:    retq
719;
720; AVX512VL-LABEL: trunc2x4i64_8i32:
721; AVX512VL:       # BB#0: # %entry
722; AVX512VL-NEXT:    vpmovqd %ymm0, %xmm0
723; AVX512VL-NEXT:    vpmovqd %ymm1, %xmm1
724; AVX512VL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
725; AVX512VL-NEXT:    retq
726;
727; AVX512BW-LABEL: trunc2x4i64_8i32:
728; AVX512BW:       # BB#0: # %entry
729; AVX512BW-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
730; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
731; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
732; AVX512BW-NEXT:    vpmovqd %zmm1, %ymm1
733; AVX512BW-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
734; AVX512BW-NEXT:    retq
735;
736; AVX512BWVL-LABEL: trunc2x4i64_8i32:
737; AVX512BWVL:       # BB#0: # %entry
738; AVX512BWVL-NEXT:    vpmovqd %ymm0, %xmm0
739; AVX512BWVL-NEXT:    vpmovqd %ymm1, %xmm1
740; AVX512BWVL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
741; AVX512BWVL-NEXT:    retq
742entry:
743  %0 = trunc <4 x i64> %a to <4 x i32>
744  %1 = trunc <4 x i64> %b to <4 x i32>
745  %2 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
746  ret <8 x i32> %2
747}
748
749define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) {
750; SSE2-LABEL: trunc2x4i64_8i16:
751; SSE2:       # BB#0: # %entry
752; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
753; SSE2-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
754; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
755; SSE2-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
756; SSE2-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
757; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
758; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
759; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
760; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
761; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
762; SSE2-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
763; SSE2-NEXT:    movapd %xmm2, %xmm0
764; SSE2-NEXT:    retq
765;
766; SSSE3-LABEL: trunc2x4i64_8i16:
767; SSSE3:       # BB#0: # %entry
768; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
769; SSSE3-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
770; SSSE3-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
771; SSSE3-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
772; SSSE3-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
773; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
774; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
775; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
776; SSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
777; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
778; SSSE3-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
779; SSSE3-NEXT:    movapd %xmm2, %xmm0
780; SSSE3-NEXT:    retq
781;
782; SSE41-LABEL: trunc2x4i64_8i16:
783; SSE41:       # BB#0: # %entry
784; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
785; SSE41-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
786; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
787; SSE41-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
788; SSE41-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
789; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
790; SSE41-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
791; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
792; SSE41-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
793; SSE41-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
794; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
795; SSE41-NEXT:    retq
796;
797; AVX1-LABEL: trunc2x4i64_8i16:
798; AVX1:       # BB#0: # %entry
799; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
800; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
801; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
802; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
803; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
804; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
805; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
806; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
807; AVX1-NEXT:    vzeroupper
808; AVX1-NEXT:    retq
809;
810; AVX2-LABEL: trunc2x4i64_8i16:
811; AVX2:       # BB#0: # %entry
812; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
813; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
814; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
815; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
816; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
817; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
818; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
819; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
820; AVX2-NEXT:    vzeroupper
821; AVX2-NEXT:    retq
822;
823; AVX512F-LABEL: trunc2x4i64_8i16:
824; AVX512F:       # BB#0: # %entry
825; AVX512F-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
826; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
827; AVX512F-NEXT:    vpmovqd %zmm0, %ymm0
828; AVX512F-NEXT:    vpmovqd %zmm1, %ymm1
829; AVX512F-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
830; AVX512F-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
831; AVX512F-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
832; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
833; AVX512F-NEXT:    vzeroupper
834; AVX512F-NEXT:    retq
835;
836; AVX512VL-LABEL: trunc2x4i64_8i16:
837; AVX512VL:       # BB#0: # %entry
838; AVX512VL-NEXT:    vpmovqd %ymm0, %xmm0
839; AVX512VL-NEXT:    vpmovqd %ymm1, %xmm1
840; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
841; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
842; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
843; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
844; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
845; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
846; AVX512VL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
847; AVX512VL-NEXT:    vzeroupper
848; AVX512VL-NEXT:    retq
849;
850; AVX512BW-LABEL: trunc2x4i64_8i16:
851; AVX512BW:       # BB#0: # %entry
852; AVX512BW-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
853; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
854; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
855; AVX512BW-NEXT:    vpmovqd %zmm1, %ymm1
856; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
857; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
858; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
859; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
860; AVX512BW-NEXT:    vzeroupper
861; AVX512BW-NEXT:    retq
862;
863; AVX512BWVL-LABEL: trunc2x4i64_8i16:
864; AVX512BWVL:       # BB#0: # %entry
865; AVX512BWVL-NEXT:    vpmovqd %ymm0, %xmm0
866; AVX512BWVL-NEXT:    vpmovqd %ymm1, %xmm1
867; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
868; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
869; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
870; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
871; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
872; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
873; AVX512BWVL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
874; AVX512BWVL-NEXT:    vzeroupper
875; AVX512BWVL-NEXT:    retq
876entry:
877  %0 = trunc <4 x i64> %a to <4 x i16>
878  %1 = trunc <4 x i64> %b to <4 x i16>
879  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
880  ret <8 x i16> %2
881}
882
883define <4 x i32> @trunc2x2i64_4i32(<2 x i64> %a, <2 x i64> %b) {
884; SSE-LABEL: trunc2x2i64_4i32:
885; SSE:       # BB#0: # %entry
886; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
887; SSE-NEXT:    retq
888;
889; AVX-LABEL: trunc2x2i64_4i32:
890; AVX:       # BB#0: # %entry
891; AVX-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
892; AVX-NEXT:    retq
893;
894; AVX512-LABEL: trunc2x2i64_4i32:
895; AVX512:       # BB#0: # %entry
896; AVX512-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
897; AVX512-NEXT:    retq
898entry:
899  %0 = trunc <2 x i64> %a to <2 x i32>
900  %1 = trunc <2 x i64> %b to <2 x i32>
901  %2 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
902  ret <4 x i32> %2
903}
904
905define i64 @trunc2i64_i64(<2 x i64> %inval) {
906; SSE-LABEL: trunc2i64_i64:
907; SSE:       # BB#0: # %entry
908; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
909; SSE-NEXT:    movq %xmm0, %rax
910; SSE-NEXT:    retq
911;
912; AVX-LABEL: trunc2i64_i64:
913; AVX:       # BB#0: # %entry
914; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
915; AVX-NEXT:    vmovq %xmm0, %rax
916; AVX-NEXT:    retq
917;
918; AVX512F-LABEL: trunc2i64_i64:
919; AVX512F:       # BB#0: # %entry
920; AVX512F-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
921; AVX512F-NEXT:    vmovq %xmm0, %rax
922; AVX512F-NEXT:    retq
923;
924; AVX512VL-LABEL: trunc2i64_i64:
925; AVX512VL:       # BB#0: # %entry
926; AVX512VL-NEXT:    vpmovqd %xmm0, -{{[0-9]+}}(%rsp)
927; AVX512VL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
928; AVX512VL-NEXT:    retq
929;
930; AVX512BW-LABEL: trunc2i64_i64:
931; AVX512BW:       # BB#0: # %entry
932; AVX512BW-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
933; AVX512BW-NEXT:    vmovq %xmm0, %rax
934; AVX512BW-NEXT:    retq
935;
936; AVX512BWVL-LABEL: trunc2i64_i64:
937; AVX512BWVL:       # BB#0: # %entry
938; AVX512BWVL-NEXT:    vpmovqd %xmm0, -{{[0-9]+}}(%rsp)
939; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
940; AVX512BWVL-NEXT:    retq
941entry:
942  %0 = trunc <2 x i64> %inval to <2 x i32>
943  %1 = bitcast <2 x i32> %0 to i64
944  ret i64 %1
945}
946
947define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) {
948; SSE2-LABEL: trunc2x4i32_8i16:
949; SSE2:       # BB#0: # %entry
950; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
951; SSE2-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
952; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
953; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
954; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
955; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
956; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
957; SSE2-NEXT:    retq
958;
959; SSSE3-LABEL: trunc2x4i32_8i16:
960; SSSE3:       # BB#0: # %entry
961; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
962; SSSE3-NEXT:    pshufb %xmm2, %xmm1
963; SSSE3-NEXT:    pshufb %xmm2, %xmm0
964; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
965; SSSE3-NEXT:    retq
966;
967; SSE41-LABEL: trunc2x4i32_8i16:
968; SSE41:       # BB#0: # %entry
969; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
970; SSE41-NEXT:    pshufb %xmm2, %xmm1
971; SSE41-NEXT:    pshufb %xmm2, %xmm0
972; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
973; SSE41-NEXT:    retq
974;
975; AVX-LABEL: trunc2x4i32_8i16:
976; AVX:       # BB#0: # %entry
977; AVX-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
978; AVX-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
979; AVX-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
980; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
981; AVX-NEXT:    retq
982;
983; AVX512F-LABEL: trunc2x4i32_8i16:
984; AVX512F:       # BB#0: # %entry
985; AVX512F-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
986; AVX512F-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
987; AVX512F-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
988; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
989; AVX512F-NEXT:    retq
990;
991; AVX512VL-LABEL: trunc2x4i32_8i16:
992; AVX512VL:       # BB#0: # %entry
993; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
994; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
995; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
996; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
997; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
998; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
999; AVX512VL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1000; AVX512VL-NEXT:    retq
1001;
1002; AVX512BW-LABEL: trunc2x4i32_8i16:
1003; AVX512BW:       # BB#0: # %entry
1004; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1005; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1006; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1007; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1008; AVX512BW-NEXT:    retq
1009;
1010; AVX512BWVL-LABEL: trunc2x4i32_8i16:
1011; AVX512BWVL:       # BB#0: # %entry
1012; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1013; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1014; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1015; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1016; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1017; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1018; AVX512BWVL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1019; AVX512BWVL-NEXT:    retq
1020entry:
1021  %0 = trunc <4 x i32> %a to <4 x i16>
1022  %1 = trunc <4 x i32> %b to <4 x i16>
1023  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1024  ret <8 x i16> %2
1025}
1026
1027; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
1028define i64 @trunc4i32_i64(<4 x i32> %inval) {
1029; SSE2-LABEL: trunc4i32_i64:
1030; SSE2:       # BB#0: # %entry
1031; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1032; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1033; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1034; SSE2-NEXT:    movq %xmm0, %rax
1035; SSE2-NEXT:    retq
1036;
1037; SSSE3-LABEL: trunc4i32_i64:
1038; SSSE3:       # BB#0: # %entry
1039; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1040; SSSE3-NEXT:    movq %xmm0, %rax
1041; SSSE3-NEXT:    retq
1042;
1043; SSE41-LABEL: trunc4i32_i64:
1044; SSE41:       # BB#0: # %entry
1045; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1046; SSE41-NEXT:    movq %xmm0, %rax
1047; SSE41-NEXT:    retq
1048;
1049; AVX-LABEL: trunc4i32_i64:
1050; AVX:       # BB#0: # %entry
1051; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1052; AVX-NEXT:    vmovq %xmm0, %rax
1053; AVX-NEXT:    retq
1054;
1055; AVX512F-LABEL: trunc4i32_i64:
1056; AVX512F:       # BB#0: # %entry
1057; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1058; AVX512F-NEXT:    vmovq %xmm0, %rax
1059; AVX512F-NEXT:    retq
1060;
1061; AVX512VL-LABEL: trunc4i32_i64:
1062; AVX512VL:       # BB#0: # %entry
1063; AVX512VL-NEXT:    vpmovdw %xmm0, -{{[0-9]+}}(%rsp)
1064; AVX512VL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1065; AVX512VL-NEXT:    retq
1066;
1067; AVX512BW-LABEL: trunc4i32_i64:
1068; AVX512BW:       # BB#0: # %entry
1069; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1070; AVX512BW-NEXT:    vmovq %xmm0, %rax
1071; AVX512BW-NEXT:    retq
1072;
1073; AVX512BWVL-LABEL: trunc4i32_i64:
1074; AVX512BWVL:       # BB#0: # %entry
1075; AVX512BWVL-NEXT:    vpmovdw %xmm0, -{{[0-9]+}}(%rsp)
1076; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1077; AVX512BWVL-NEXT:    retq
1078entry:
1079  %0 = trunc <4 x i32> %inval to <4 x i16>
1080  %1 = bitcast <4 x i16> %0 to i64
1081  ret i64 %1
1082}
1083
1084define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) {
1085; SSE2-LABEL: trunc2x8i16_16i8:
1086; SSE2:       # BB#0: # %entry
1087; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1088; SSE2-NEXT:    pand %xmm2, %xmm1
1089; SSE2-NEXT:    pand %xmm2, %xmm0
1090; SSE2-NEXT:    packuswb %xmm1, %xmm0
1091; SSE2-NEXT:    retq
1092;
1093; SSSE3-LABEL: trunc2x8i16_16i8:
1094; SSSE3:       # BB#0: # %entry
1095; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1096; SSSE3-NEXT:    pshufb %xmm2, %xmm1
1097; SSSE3-NEXT:    pshufb %xmm2, %xmm0
1098; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1099; SSSE3-NEXT:    retq
1100;
1101; SSE41-LABEL: trunc2x8i16_16i8:
1102; SSE41:       # BB#0: # %entry
1103; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1104; SSE41-NEXT:    pshufb %xmm2, %xmm1
1105; SSE41-NEXT:    pshufb %xmm2, %xmm0
1106; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1107; SSE41-NEXT:    retq
1108;
1109; AVX-LABEL: trunc2x8i16_16i8:
1110; AVX:       # BB#0: # %entry
1111; AVX-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1112; AVX-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1113; AVX-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1114; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1115; AVX-NEXT:    retq
1116;
1117; AVX512-LABEL: trunc2x8i16_16i8:
1118; AVX512:       # BB#0: # %entry
1119; AVX512-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1120; AVX512-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1121; AVX512-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1122; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1123; AVX512-NEXT:    retq
1124entry:
1125  %0 = trunc <8 x i16> %a to <8 x i8>
1126  %1 = trunc <8 x i16> %b to <8 x i8>
1127  %2 = shufflevector <8 x i8> %0, <8 x i8> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
1128  ret <16 x i8> %2
1129}
1130
1131; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
1132define i64 @trunc8i16_i64(<8 x i16> %inval) {
1133; SSE2-LABEL: trunc8i16_i64:
1134; SSE2:       # BB#0: # %entry
1135; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
1136; SSE2-NEXT:    packuswb %xmm0, %xmm0
1137; SSE2-NEXT:    movq %xmm0, %rax
1138; SSE2-NEXT:    retq
1139;
1140; SSSE3-LABEL: trunc8i16_i64:
1141; SSSE3:       # BB#0: # %entry
1142; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1143; SSSE3-NEXT:    movq %xmm0, %rax
1144; SSSE3-NEXT:    retq
1145;
1146; SSE41-LABEL: trunc8i16_i64:
1147; SSE41:       # BB#0: # %entry
1148; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1149; SSE41-NEXT:    movq %xmm0, %rax
1150; SSE41-NEXT:    retq
1151;
1152; AVX-LABEL: trunc8i16_i64:
1153; AVX:       # BB#0: # %entry
1154; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1155; AVX-NEXT:    vmovq %xmm0, %rax
1156; AVX-NEXT:    retq
1157;
1158; AVX512F-LABEL: trunc8i16_i64:
1159; AVX512F:       # BB#0: # %entry
1160; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1161; AVX512F-NEXT:    vmovq %xmm0, %rax
1162; AVX512F-NEXT:    retq
1163;
1164; AVX512VL-LABEL: trunc8i16_i64:
1165; AVX512VL:       # BB#0: # %entry
1166; AVX512VL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1167; AVX512VL-NEXT:    vmovq %xmm0, %rax
1168; AVX512VL-NEXT:    retq
1169;
1170; AVX512BW-LABEL: trunc8i16_i64:
1171; AVX512BW:       # BB#0: # %entry
1172; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1173; AVX512BW-NEXT:    vmovq %xmm0, %rax
1174; AVX512BW-NEXT:    retq
1175;
1176; AVX512BWVL-LABEL: trunc8i16_i64:
1177; AVX512BWVL:       # BB#0: # %entry
1178; AVX512BWVL-NEXT:    vpmovwb %xmm0, -{{[0-9]+}}(%rsp)
1179; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1180; AVX512BWVL-NEXT:    retq
1181entry:
1182  %0 = trunc <8 x i16> %inval to <8 x i8>
1183  %1 = bitcast <8 x i8> %0 to i64
1184  ret i64 %1
1185}
1186
1187define <16 x i8> @trunc16i64_16i8_const() {
1188; SSE-LABEL: trunc16i64_16i8_const:
1189; SSE:       # BB#0: # %entry
1190; SSE-NEXT:    xorps %xmm0, %xmm0
1191; SSE-NEXT:    retq
1192;
1193; AVX-LABEL: trunc16i64_16i8_const:
1194; AVX:       # BB#0: # %entry
1195; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1196; AVX-NEXT:    retq
1197;
1198; AVX512F-LABEL: trunc16i64_16i8_const:
1199; AVX512F:       # BB#0: # %entry
1200; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1201; AVX512F-NEXT:    retq
1202;
1203; AVX512VL-LABEL: trunc16i64_16i8_const:
1204; AVX512VL:       # BB#0: # %entry
1205; AVX512VL-NEXT:    vpxor %xmm0, %xmm0, %xmm0
1206; AVX512VL-NEXT:    retq
1207;
1208; AVX512BW-LABEL: trunc16i64_16i8_const:
1209; AVX512BW:       # BB#0: # %entry
1210; AVX512BW-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1211; AVX512BW-NEXT:    retq
1212;
1213; AVX512BWVL-LABEL: trunc16i64_16i8_const:
1214; AVX512BWVL:       # BB#0: # %entry
1215; AVX512BWVL-NEXT:    vpxor %xmm0, %xmm0, %xmm0
1216; AVX512BWVL-NEXT:    retq
1217
1218entry:
1219  %0 = trunc <16 x i64> zeroinitializer to <16 x i8>
1220  %1 = shufflevector <16 x i8> %0, <16 x i8> %0, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 undef, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26>
1221  ret <16 x i8> %1
1222}
1223
1224