1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512F
8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512VL
9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BW
10; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=AVX512 --check-prefix=AVX512BWVL
11
12define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) {
13; SSE-LABEL: trunc8i64_8i32:
14; SSE:       # BB#0: # %entry
15; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
16; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
17; SSE-NEXT:    movaps %xmm2, %xmm1
18; SSE-NEXT:    retq
19;
20; AVX1-LABEL: trunc8i64_8i32:
21; AVX1:       # BB#0: # %entry
22; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
23; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
24; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
25; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
26; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
27; AVX1-NEXT:    retq
28;
29; AVX2-LABEL: trunc8i64_8i32:
30; AVX2:       # BB#0: # %entry
31; AVX2-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
32; AVX2-NEXT:    vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
33; AVX2-NEXT:    vpermilps {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
34; AVX2-NEXT:    vpermpd {{.*#+}} ymm1 = ymm1[0,2,2,3]
35; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
36; AVX2-NEXT:    retq
37;
38; AVX512-LABEL: trunc8i64_8i32:
39; AVX512:       # BB#0: # %entry
40; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
41; AVX512-NEXT:    retq
42entry:
43  %0 = trunc <8 x i64> %a to <8 x i32>
44  ret <8 x i32> %0
45}
46
47define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) {
48; SSE2-LABEL: trunc8i64_8i32_ashr:
49; SSE2:       # BB#0: # %entry
50; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
51; SSE2-NEXT:    psrad $31, %xmm3
52; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,3,2,3]
53; SSE2-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
54; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]
55; SSE2-NEXT:    psrad $31, %xmm1
56; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
57; SSE2-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
58; SSE2-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,3],xmm3[0,2]
59; SSE2-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,3],xmm4[0,2]
60; SSE2-NEXT:    movaps %xmm2, %xmm1
61; SSE2-NEXT:    retq
62;
63; SSSE3-LABEL: trunc8i64_8i32_ashr:
64; SSSE3:       # BB#0: # %entry
65; SSSE3-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3]
66; SSSE3-NEXT:    psrad $31, %xmm3
67; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[1,3,2,3]
68; SSSE3-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1]
69; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm1[1,3,2,3]
70; SSSE3-NEXT:    psrad $31, %xmm1
71; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
72; SSSE3-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1]
73; SSSE3-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,3],xmm3[0,2]
74; SSSE3-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,3],xmm4[0,2]
75; SSSE3-NEXT:    movaps %xmm2, %xmm1
76; SSSE3-NEXT:    retq
77;
78; SSE41-LABEL: trunc8i64_8i32_ashr:
79; SSE41:       # BB#0: # %entry
80; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3]
81; SSE41-NEXT:    psrad $31, %xmm3
82; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm4[0,1],xmm3[2,3],xmm4[4,5],xmm3[6,7]
83; SSE41-NEXT:    pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3]
84; SSE41-NEXT:    psrad $31, %xmm1
85; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm4[0,1],xmm1[2,3],xmm4[4,5],xmm1[6,7]
86; SSE41-NEXT:    shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[0,2]
87; SSE41-NEXT:    shufps {{.*#+}} xmm2 = xmm2[1,3],xmm3[0,2]
88; SSE41-NEXT:    movaps %xmm2, %xmm1
89; SSE41-NEXT:    retq
90;
91; AVX1-LABEL: trunc8i64_8i32_ashr:
92; AVX1:       # BB#0: # %entry
93; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
94; AVX1-NEXT:    vpsrad $31, %xmm2, %xmm3
95; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
96; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm3[2,3],xmm2[4,5],xmm3[6,7]
97; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
98; AVX1-NEXT:    vpsrad $31, %xmm3, %xmm4
99; AVX1-NEXT:    vpshufd {{.*#+}} xmm3 = xmm3[1,1,3,3]
100; AVX1-NEXT:    vpblendw {{.*#+}} xmm3 = xmm3[0,1],xmm4[2,3],xmm3[4,5],xmm4[6,7]
101; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[1,3],xmm3[0,2]
102; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[1,3],xmm2[0,2]
103; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
104; AVX1-NEXT:    retq
105;
106; AVX2-LABEL: trunc8i64_8i32_ashr:
107; AVX2:       # BB#0: # %entry
108; AVX2-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[1,3,2,3,5,7,6,7]
109; AVX2-NEXT:    vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
110; AVX2-NEXT:    vpermilps {{.*#+}} ymm1 = ymm1[1,3,2,3,5,7,6,7]
111; AVX2-NEXT:    vpermpd {{.*#+}} ymm1 = ymm1[0,2,2,3]
112; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
113; AVX2-NEXT:    retq
114;
115; AVX512-LABEL: trunc8i64_8i32_ashr:
116; AVX512:       # BB#0: # %entry
117; AVX512-NEXT:    vpsraq $32, %zmm0, %zmm0
118; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
119; AVX512-NEXT:    retq
120entry:
121  %0 = ashr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>
122  %1 = trunc <8 x i64> %0 to <8 x i32>
123  ret <8 x i32> %1
124}
125
126define <8 x i32> @trunc8i64_8i32_lshr(<8 x i64> %a) {
127; SSE-LABEL: trunc8i64_8i32_lshr:
128; SSE:       # BB#0: # %entry
129; SSE-NEXT:    psrlq $32, %xmm3
130; SSE-NEXT:    psrlq $32, %xmm2
131; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
132; SSE-NEXT:    psrlq $32, %xmm1
133; SSE-NEXT:    psrlq $32, %xmm0
134; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
135; SSE-NEXT:    movaps %xmm2, %xmm1
136; SSE-NEXT:    retq
137;
138; AVX1-LABEL: trunc8i64_8i32_lshr:
139; AVX1:       # BB#0: # %entry
140; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
141; AVX1-NEXT:    vpsrlq $32, %xmm2, %xmm2
142; AVX1-NEXT:    vpsrlq $32, %xmm0, %xmm0
143; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
144; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
145; AVX1-NEXT:    vpsrlq $32, %xmm2, %xmm2
146; AVX1-NEXT:    vpsrlq $32, %xmm1, %xmm1
147; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
148; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
149; AVX1-NEXT:    retq
150;
151; AVX2-LABEL: trunc8i64_8i32_lshr:
152; AVX2:       # BB#0: # %entry
153; AVX2-NEXT:    vpsrlq $32, %ymm1, %ymm1
154; AVX2-NEXT:    vpsrlq $32, %ymm0, %ymm0
155; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
156; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
157; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
158; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
159; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
160; AVX2-NEXT:    retq
161;
162; AVX512-LABEL: trunc8i64_8i32_lshr:
163; AVX512:       # BB#0: # %entry
164; AVX512-NEXT:    vpsrlq $32, %zmm0, %zmm0
165; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
166; AVX512-NEXT:    retq
167entry:
168  %0 = lshr <8 x i64> %a, <i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32, i64 32>
169  %1 = trunc <8 x i64> %0 to <8 x i32>
170  ret <8 x i32> %1
171}
172
173define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) {
174; SSE2-LABEL: trunc8i64_8i16:
175; SSE2:       # BB#0: # %entry
176; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
177; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
178; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
179; SSE2-NEXT:    pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7]
180; SSE2-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
181; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
182; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
183; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
184; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
185; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
186; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
187; SSE2-NEXT:    retq
188;
189; SSSE3-LABEL: trunc8i64_8i16:
190; SSSE3:       # BB#0: # %entry
191; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
192; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
193; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
194; SSSE3-NEXT:    pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7]
195; SSSE3-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
196; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
197; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
198; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
199; SSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
200; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
201; SSSE3-NEXT:    movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
202; SSSE3-NEXT:    retq
203;
204; SSE41-LABEL: trunc8i64_8i16:
205; SSE41:       # BB#0: # %entry
206; SSE41-NEXT:    pxor %xmm4, %xmm4
207; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
208; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7]
209; SSE41-NEXT:    packusdw %xmm3, %xmm2
210; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7]
211; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7]
212; SSE41-NEXT:    packusdw %xmm1, %xmm0
213; SSE41-NEXT:    packusdw %xmm2, %xmm0
214; SSE41-NEXT:    retq
215;
216; AVX1-LABEL: trunc8i64_8i16:
217; AVX1:       # BB#0: # %entry
218; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
219; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
220; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
221; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7]
222; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
223; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
224; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
225; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7]
226; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
227; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
228; AVX1-NEXT:    vzeroupper
229; AVX1-NEXT:    retq
230;
231; AVX2-LABEL: trunc8i64_8i16:
232; AVX2:       # BB#0: # %entry
233; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
234; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
235; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
236; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
237; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
238; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
239; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
240; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
241; AVX2-NEXT:    vzeroupper
242; AVX2-NEXT:    retq
243;
244; AVX512-LABEL: trunc8i64_8i16:
245; AVX512:       # BB#0: # %entry
246; AVX512-NEXT:    vpmovqw %zmm0, %xmm0
247; AVX512-NEXT:    vzeroupper
248; AVX512-NEXT:    retq
249entry:
250  %0 = trunc <8 x i64> %a to <8 x i16>
251  ret <8 x i16> %0
252}
253
254define void @trunc8i64_8i8(<8 x i64> %a) {
255; SSE-LABEL: trunc8i64_8i8:
256; SSE:       # BB#0: # %entry
257; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
258; SSE-NEXT:    pand %xmm4, %xmm3
259; SSE-NEXT:    pand %xmm4, %xmm2
260; SSE-NEXT:    packuswb %xmm3, %xmm2
261; SSE-NEXT:    pand %xmm4, %xmm1
262; SSE-NEXT:    pand %xmm4, %xmm0
263; SSE-NEXT:    packuswb %xmm1, %xmm0
264; SSE-NEXT:    packuswb %xmm2, %xmm0
265; SSE-NEXT:    packuswb %xmm0, %xmm0
266; SSE-NEXT:    movq %xmm0, (%rax)
267; SSE-NEXT:    retq
268;
269; AVX1-LABEL: trunc8i64_8i8:
270; AVX1:       # BB#0: # %entry
271; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
272; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
273; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
274; AVX1-NEXT:    vpand %xmm3, %xmm1, %xmm1
275; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
276; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
277; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
278; AVX1-NEXT:    vpand %xmm3, %xmm0, %xmm0
279; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
280; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
281; AVX1-NEXT:    vpackuswb %xmm0, %xmm0, %xmm0
282; AVX1-NEXT:    vmovq %xmm0, (%rax)
283; AVX1-NEXT:    vzeroupper
284; AVX1-NEXT:    retq
285;
286; AVX2-LABEL: trunc8i64_8i8:
287; AVX2:       # BB#0: # %entry
288; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
289; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
290; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
291; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
292; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
293; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
294; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
295; AVX2-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
296; AVX2-NEXT:    vmovq %xmm0, (%rax)
297; AVX2-NEXT:    vzeroupper
298; AVX2-NEXT:    retq
299;
300; AVX512-LABEL: trunc8i64_8i8:
301; AVX512:       # BB#0: # %entry
302; AVX512-NEXT:    vpmovqb %zmm0, (%rax)
303; AVX512-NEXT:    vzeroupper
304; AVX512-NEXT:    retq
305entry:
306  %0 = trunc <8 x i64> %a to <8 x i8>
307  store <8 x i8> %0, <8 x i8>* undef, align 4
308  ret void
309}
310
311define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) {
312; SSE2-LABEL: trunc8i32_8i16:
313; SSE2:       # BB#0: # %entry
314; SSE2-NEXT:    pslld $16, %xmm1
315; SSE2-NEXT:    psrad $16, %xmm1
316; SSE2-NEXT:    pslld $16, %xmm0
317; SSE2-NEXT:    psrad $16, %xmm0
318; SSE2-NEXT:    packssdw %xmm1, %xmm0
319; SSE2-NEXT:    retq
320;
321; SSSE3-LABEL: trunc8i32_8i16:
322; SSSE3:       # BB#0: # %entry
323; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
324; SSSE3-NEXT:    pshufb %xmm2, %xmm1
325; SSSE3-NEXT:    pshufb %xmm2, %xmm0
326; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
327; SSSE3-NEXT:    retq
328;
329; SSE41-LABEL: trunc8i32_8i16:
330; SSE41:       # BB#0: # %entry
331; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
332; SSE41-NEXT:    pshufb %xmm2, %xmm1
333; SSE41-NEXT:    pshufb %xmm2, %xmm0
334; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
335; SSE41-NEXT:    retq
336;
337; AVX1-LABEL: trunc8i32_8i16:
338; AVX1:       # BB#0: # %entry
339; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
340; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
341; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
342; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
343; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
344; AVX1-NEXT:    vzeroupper
345; AVX1-NEXT:    retq
346;
347; AVX2-LABEL: trunc8i32_8i16:
348; AVX2:       # BB#0: # %entry
349; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
350; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
351; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
352; AVX2-NEXT:    vzeroupper
353; AVX2-NEXT:    retq
354;
355; AVX512F-LABEL: trunc8i32_8i16:
356; AVX512F:       # BB#0: # %entry
357; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
358; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
359; AVX512F-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
360; AVX512F-NEXT:    vzeroupper
361; AVX512F-NEXT:    retq
362;
363; AVX512VL-LABEL: trunc8i32_8i16:
364; AVX512VL:       # BB#0: # %entry
365; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
366; AVX512VL-NEXT:    vzeroupper
367; AVX512VL-NEXT:    retq
368;
369; AVX512BW-LABEL: trunc8i32_8i16:
370; AVX512BW:       # BB#0: # %entry
371; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
372; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
373; AVX512BW-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
374; AVX512BW-NEXT:    vzeroupper
375; AVX512BW-NEXT:    retq
376;
377; AVX512BWVL-LABEL: trunc8i32_8i16:
378; AVX512BWVL:       # BB#0: # %entry
379; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
380; AVX512BWVL-NEXT:    vzeroupper
381; AVX512BWVL-NEXT:    retq
382entry:
383  %0 = trunc <8 x i32> %a to <8 x i16>
384  ret <8 x i16> %0
385}
386
387define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) {
388; SSE-LABEL: trunc8i32_8i16_ashr:
389; SSE:       # BB#0: # %entry
390; SSE-NEXT:    psrad $16, %xmm1
391; SSE-NEXT:    psrad $16, %xmm0
392; SSE-NEXT:    packssdw %xmm1, %xmm0
393; SSE-NEXT:    retq
394;
395; AVX1-LABEL: trunc8i32_8i16_ashr:
396; AVX1:       # BB#0: # %entry
397; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
398; AVX1-NEXT:    vpsrad $16, %xmm1, %xmm1
399; AVX1-NEXT:    vpsrad $16, %xmm0, %xmm0
400; AVX1-NEXT:    vpackssdw %xmm1, %xmm0, %xmm0
401; AVX1-NEXT:    vzeroupper
402; AVX1-NEXT:    retq
403;
404; AVX2-LABEL: trunc8i32_8i16_ashr:
405; AVX2:       # BB#0: # %entry
406; AVX2-NEXT:    vpsrad $16, %ymm0, %ymm0
407; AVX2-NEXT:    vpackssdw %ymm0, %ymm0, %ymm0
408; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
409; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
410; AVX2-NEXT:    vzeroupper
411; AVX2-NEXT:    retq
412;
413; AVX512F-LABEL: trunc8i32_8i16_ashr:
414; AVX512F:       # BB#0: # %entry
415; AVX512F-NEXT:    vpsrad $16, %ymm0, %ymm0
416; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
417; AVX512F-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
418; AVX512F-NEXT:    vzeroupper
419; AVX512F-NEXT:    retq
420;
421; AVX512VL-LABEL: trunc8i32_8i16_ashr:
422; AVX512VL:       # BB#0: # %entry
423; AVX512VL-NEXT:    vpsrad $16, %ymm0, %ymm0
424; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
425; AVX512VL-NEXT:    vzeroupper
426; AVX512VL-NEXT:    retq
427;
428; AVX512BW-LABEL: trunc8i32_8i16_ashr:
429; AVX512BW:       # BB#0: # %entry
430; AVX512BW-NEXT:    vpsrad $16, %ymm0, %ymm0
431; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
432; AVX512BW-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
433; AVX512BW-NEXT:    vzeroupper
434; AVX512BW-NEXT:    retq
435;
436; AVX512BWVL-LABEL: trunc8i32_8i16_ashr:
437; AVX512BWVL:       # BB#0: # %entry
438; AVX512BWVL-NEXT:    vpsrad $16, %ymm0, %ymm0
439; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
440; AVX512BWVL-NEXT:    vzeroupper
441; AVX512BWVL-NEXT:    retq
442entry:
443  %0 = ashr <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
444  %1 = trunc <8 x i32> %0 to <8 x i16>
445  ret <8 x i16> %1
446}
447
448define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) {
449; SSE2-LABEL: trunc8i32_8i16_lshr:
450; SSE2:       # BB#0: # %entry
451; SSE2-NEXT:    psrld $16, %xmm0
452; SSE2-NEXT:    psrld $16, %xmm1
453; SSE2-NEXT:    pslld $16, %xmm1
454; SSE2-NEXT:    psrad $16, %xmm1
455; SSE2-NEXT:    pslld $16, %xmm0
456; SSE2-NEXT:    psrad $16, %xmm0
457; SSE2-NEXT:    packssdw %xmm1, %xmm0
458; SSE2-NEXT:    retq
459;
460; SSSE3-LABEL: trunc8i32_8i16_lshr:
461; SSSE3:       # BB#0: # %entry
462; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [2,3,6,7,10,11,14,15,10,11,14,15,14,15,255,255]
463; SSSE3-NEXT:    pshufb %xmm2, %xmm1
464; SSSE3-NEXT:    pshufb %xmm2, %xmm0
465; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
466; SSSE3-NEXT:    retq
467;
468; SSE41-LABEL: trunc8i32_8i16_lshr:
469; SSE41:       # BB#0: # %entry
470; SSE41-NEXT:    psrld $16, %xmm1
471; SSE41-NEXT:    psrld $16, %xmm0
472; SSE41-NEXT:    packusdw %xmm1, %xmm0
473; SSE41-NEXT:    retq
474;
475; AVX1-LABEL: trunc8i32_8i16_lshr:
476; AVX1:       # BB#0: # %entry
477; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
478; AVX1-NEXT:    vpsrld $16, %xmm1, %xmm1
479; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm0
480; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
481; AVX1-NEXT:    vzeroupper
482; AVX1-NEXT:    retq
483;
484; AVX2-LABEL: trunc8i32_8i16_lshr:
485; AVX2:       # BB#0: # %entry
486; AVX2-NEXT:    vpsrld $16, %ymm0, %ymm0
487; AVX2-NEXT:    vpackusdw %ymm0, %ymm0, %ymm0
488; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
489; AVX2-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
490; AVX2-NEXT:    vzeroupper
491; AVX2-NEXT:    retq
492;
493; AVX512F-LABEL: trunc8i32_8i16_lshr:
494; AVX512F:       # BB#0: # %entry
495; AVX512F-NEXT:    vpsrld $16, %ymm0, %ymm0
496; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
497; AVX512F-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
498; AVX512F-NEXT:    vzeroupper
499; AVX512F-NEXT:    retq
500;
501; AVX512VL-LABEL: trunc8i32_8i16_lshr:
502; AVX512VL:       # BB#0: # %entry
503; AVX512VL-NEXT:    vpsrld $16, %ymm0, %ymm0
504; AVX512VL-NEXT:    vpmovdw %ymm0, %xmm0
505; AVX512VL-NEXT:    vzeroupper
506; AVX512VL-NEXT:    retq
507;
508; AVX512BW-LABEL: trunc8i32_8i16_lshr:
509; AVX512BW:       # BB#0: # %entry
510; AVX512BW-NEXT:    vpsrld $16, %ymm0, %ymm0
511; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
512; AVX512BW-NEXT:    # kill: %XMM0<def> %XMM0<kill> %YMM0<kill>
513; AVX512BW-NEXT:    vzeroupper
514; AVX512BW-NEXT:    retq
515;
516; AVX512BWVL-LABEL: trunc8i32_8i16_lshr:
517; AVX512BWVL:       # BB#0: # %entry
518; AVX512BWVL-NEXT:    vpsrld $16, %ymm0, %ymm0
519; AVX512BWVL-NEXT:    vpmovdw %ymm0, %xmm0
520; AVX512BWVL-NEXT:    vzeroupper
521; AVX512BWVL-NEXT:    retq
522entry:
523  %0 = lshr <8 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
524  %1 = trunc <8 x i32> %0 to <8 x i16>
525  ret <8 x i16> %1
526}
527
528define void @trunc8i32_8i8(<8 x i32> %a) {
529; SSE2-LABEL: trunc8i32_8i8:
530; SSE2:       # BB#0: # %entry
531; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
532; SSE2-NEXT:    pand %xmm2, %xmm1
533; SSE2-NEXT:    pand %xmm2, %xmm0
534; SSE2-NEXT:    packuswb %xmm1, %xmm0
535; SSE2-NEXT:    packuswb %xmm0, %xmm0
536; SSE2-NEXT:    movq %xmm0, (%rax)
537; SSE2-NEXT:    retq
538;
539; SSSE3-LABEL: trunc8i32_8i8:
540; SSSE3:       # BB#0: # %entry
541; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
542; SSSE3-NEXT:    pshufb %xmm2, %xmm1
543; SSSE3-NEXT:    pshufb %xmm2, %xmm0
544; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
545; SSSE3-NEXT:    movq %xmm0, (%rax)
546; SSSE3-NEXT:    retq
547;
548; SSE41-LABEL: trunc8i32_8i8:
549; SSE41:       # BB#0: # %entry
550; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
551; SSE41-NEXT:    pshufb %xmm2, %xmm1
552; SSE41-NEXT:    pshufb %xmm2, %xmm0
553; SSE41-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
554; SSE41-NEXT:    movq %xmm0, (%rax)
555; SSE41-NEXT:    retq
556;
557; AVX1-LABEL: trunc8i32_8i8:
558; AVX1:       # BB#0: # %entry
559; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
560; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
561; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
562; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
563; AVX1-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
564; AVX1-NEXT:    vmovq %xmm0, (%rax)
565; AVX1-NEXT:    vzeroupper
566; AVX1-NEXT:    retq
567;
568; AVX2-LABEL: trunc8i32_8i8:
569; AVX2:       # BB#0: # %entry
570; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
571; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
572; AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
573; AVX2-NEXT:    vmovq %xmm0, (%rax)
574; AVX2-NEXT:    vzeroupper
575; AVX2-NEXT:    retq
576;
577; AVX512F-LABEL: trunc8i32_8i8:
578; AVX512F:       # BB#0: # %entry
579; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
580; AVX512F-NEXT:    vpmovdw %zmm0, %ymm0
581; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
582; AVX512F-NEXT:    vmovq %xmm0, (%rax)
583; AVX512F-NEXT:    vzeroupper
584; AVX512F-NEXT:    retq
585;
586; AVX512VL-LABEL: trunc8i32_8i8:
587; AVX512VL:       # BB#0: # %entry
588; AVX512VL-NEXT:    vpmovdb %ymm0, (%rax)
589; AVX512VL-NEXT:    vzeroupper
590; AVX512VL-NEXT:    retq
591;
592; AVX512BW-LABEL: trunc8i32_8i8:
593; AVX512BW:       # BB#0: # %entry
594; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
595; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
596; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
597; AVX512BW-NEXT:    vmovq %xmm0, (%rax)
598; AVX512BW-NEXT:    vzeroupper
599; AVX512BW-NEXT:    retq
600;
601; AVX512BWVL-LABEL: trunc8i32_8i8:
602; AVX512BWVL:       # BB#0: # %entry
603; AVX512BWVL-NEXT:    vpmovdb %ymm0, (%rax)
604; AVX512BWVL-NEXT:    vzeroupper
605; AVX512BWVL-NEXT:    retq
606entry:
607  %0 = trunc <8 x i32> %a to <8 x i8>
608  store <8 x i8> %0, <8 x i8>* undef, align 4
609  ret void
610}
611
612define void @trunc16i32_16i16(<16 x i32> %a) {
613; SSE2-LABEL: trunc16i32_16i16:
614; SSE2:       # BB#0: # %entry
615; SSE2-NEXT:    pslld $16, %xmm1
616; SSE2-NEXT:    psrad $16, %xmm1
617; SSE2-NEXT:    pslld $16, %xmm0
618; SSE2-NEXT:    psrad $16, %xmm0
619; SSE2-NEXT:    packssdw %xmm1, %xmm0
620; SSE2-NEXT:    pslld $16, %xmm3
621; SSE2-NEXT:    psrad $16, %xmm3
622; SSE2-NEXT:    pslld $16, %xmm2
623; SSE2-NEXT:    psrad $16, %xmm2
624; SSE2-NEXT:    packssdw %xmm3, %xmm2
625; SSE2-NEXT:    movdqu %xmm2, (%rax)
626; SSE2-NEXT:    movdqu %xmm0, (%rax)
627; SSE2-NEXT:    retq
628;
629; SSSE3-LABEL: trunc16i32_16i16:
630; SSSE3:       # BB#0: # %entry
631; SSSE3-NEXT:    pslld $16, %xmm1
632; SSSE3-NEXT:    psrad $16, %xmm1
633; SSSE3-NEXT:    pslld $16, %xmm0
634; SSSE3-NEXT:    psrad $16, %xmm0
635; SSSE3-NEXT:    packssdw %xmm1, %xmm0
636; SSSE3-NEXT:    pslld $16, %xmm3
637; SSSE3-NEXT:    psrad $16, %xmm3
638; SSSE3-NEXT:    pslld $16, %xmm2
639; SSSE3-NEXT:    psrad $16, %xmm2
640; SSSE3-NEXT:    packssdw %xmm3, %xmm2
641; SSSE3-NEXT:    movdqu %xmm2, (%rax)
642; SSSE3-NEXT:    movdqu %xmm0, (%rax)
643; SSSE3-NEXT:    retq
644;
645; SSE41-LABEL: trunc16i32_16i16:
646; SSE41:       # BB#0: # %entry
647; SSE41-NEXT:    pxor %xmm4, %xmm4
648; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7]
649; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7]
650; SSE41-NEXT:    packusdw %xmm1, %xmm0
651; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7]
652; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7]
653; SSE41-NEXT:    packusdw %xmm3, %xmm2
654; SSE41-NEXT:    movdqu %xmm2, (%rax)
655; SSE41-NEXT:    movdqu %xmm0, (%rax)
656; SSE41-NEXT:    retq
657;
658; AVX1-LABEL: trunc16i32_16i16:
659; AVX1:       # BB#0: # %entry
660; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
661; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
662; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3],xmm2[4],xmm3[5],xmm2[6],xmm3[7]
663; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1],xmm1[2],xmm3[3],xmm1[4],xmm3[5],xmm1[6],xmm3[7]
664; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
665; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
666; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3],xmm2[4],xmm3[5],xmm2[6],xmm3[7]
667; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1],xmm0[2],xmm3[3],xmm0[4],xmm3[5],xmm0[6],xmm3[7]
668; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
669; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
670; AVX1-NEXT:    vmovups %ymm0, (%rax)
671; AVX1-NEXT:    vzeroupper
672; AVX1-NEXT:    retq
673;
674; AVX2-LABEL: trunc16i32_16i16:
675; AVX2:       # BB#0: # %entry
676; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
677; AVX2-NEXT:    vpshufb %ymm2, %ymm0, %ymm0
678; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
679; AVX2-NEXT:    vpshufb %ymm2, %ymm1, %ymm1
680; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
681; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
682; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
683; AVX2-NEXT:    vzeroupper
684; AVX2-NEXT:    retq
685;
686; AVX512-LABEL: trunc16i32_16i16:
687; AVX512:       # BB#0: # %entry
688; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
689; AVX512-NEXT:    vzeroupper
690; AVX512-NEXT:    retq
691entry:
692  %0 = trunc <16 x i32> %a to <16 x i16>
693  store <16 x i16> %0, <16 x i16>* undef, align 4
694  ret void
695}
696
697define void @trunc16i32_16i16_ashr(<16 x i32> %a) {
698; SSE2-LABEL: trunc16i32_16i16_ashr:
699; SSE2:       # BB#0: # %entry
700; SSE2-NEXT:    psrad $16, %xmm3
701; SSE2-NEXT:    psrad $16, %xmm2
702; SSE2-NEXT:    packssdw %xmm3, %xmm2
703; SSE2-NEXT:    psrad $16, %xmm1
704; SSE2-NEXT:    psrad $16, %xmm0
705; SSE2-NEXT:    packssdw %xmm1, %xmm0
706; SSE2-NEXT:    movdqu %xmm2, (%rax)
707; SSE2-NEXT:    movdqu %xmm0, (%rax)
708; SSE2-NEXT:    retq
709;
710; SSSE3-LABEL: trunc16i32_16i16_ashr:
711; SSSE3:       # BB#0: # %entry
712; SSSE3-NEXT:    psrad $16, %xmm3
713; SSSE3-NEXT:    psrad $16, %xmm2
714; SSSE3-NEXT:    packssdw %xmm3, %xmm2
715; SSSE3-NEXT:    psrad $16, %xmm1
716; SSSE3-NEXT:    psrad $16, %xmm0
717; SSSE3-NEXT:    packssdw %xmm1, %xmm0
718; SSSE3-NEXT:    movdqu %xmm2, (%rax)
719; SSSE3-NEXT:    movdqu %xmm0, (%rax)
720; SSSE3-NEXT:    retq
721;
722; SSE41-LABEL: trunc16i32_16i16_ashr:
723; SSE41:       # BB#0: # %entry
724; SSE41-NEXT:    psrad $16, %xmm2
725; SSE41-NEXT:    psrad $16, %xmm3
726; SSE41-NEXT:    psrad $16, %xmm0
727; SSE41-NEXT:    psrad $16, %xmm1
728; SSE41-NEXT:    pxor %xmm4, %xmm4
729; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7]
730; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7]
731; SSE41-NEXT:    packusdw %xmm1, %xmm0
732; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7]
733; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7]
734; SSE41-NEXT:    packusdw %xmm3, %xmm2
735; SSE41-NEXT:    movdqu %xmm2, (%rax)
736; SSE41-NEXT:    movdqu %xmm0, (%rax)
737; SSE41-NEXT:    retq
738;
739; AVX1-LABEL: trunc16i32_16i16_ashr:
740; AVX1:       # BB#0: # %entry
741; AVX1-NEXT:    vpsrad $16, %xmm0, %xmm2
742; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
743; AVX1-NEXT:    vpsrad $16, %xmm0, %xmm0
744; AVX1-NEXT:    vpsrad $16, %xmm1, %xmm3
745; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm1
746; AVX1-NEXT:    vpsrad $16, %xmm1, %xmm1
747; AVX1-NEXT:    vpxor %xmm4, %xmm4, %xmm4
748; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7]
749; AVX1-NEXT:    vpblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1],xmm3[2],xmm4[3],xmm3[4],xmm4[5],xmm3[6],xmm4[7]
750; AVX1-NEXT:    vpackusdw %xmm1, %xmm3, %xmm1
751; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7]
752; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1],xmm2[2],xmm4[3],xmm2[4],xmm4[5],xmm2[6],xmm4[7]
753; AVX1-NEXT:    vpackusdw %xmm0, %xmm2, %xmm0
754; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
755; AVX1-NEXT:    vmovups %ymm0, (%rax)
756; AVX1-NEXT:    vzeroupper
757; AVX1-NEXT:    retq
758;
759; AVX2-LABEL: trunc16i32_16i16_ashr:
760; AVX2:       # BB#0: # %entry
761; AVX2-NEXT:    vpsrad $16, %ymm1, %ymm1
762; AVX2-NEXT:    vpsrad $16, %ymm0, %ymm0
763; AVX2-NEXT:    vpackssdw %ymm0, %ymm0, %ymm0
764; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
765; AVX2-NEXT:    vpackssdw %ymm0, %ymm1, %ymm1
766; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
767; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
768; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
769; AVX2-NEXT:    vzeroupper
770; AVX2-NEXT:    retq
771;
772; AVX512-LABEL: trunc16i32_16i16_ashr:
773; AVX512:       # BB#0: # %entry
774; AVX512-NEXT:    vpsrld $16, %zmm0, %zmm0
775; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
776; AVX512-NEXT:    vzeroupper
777; AVX512-NEXT:    retq
778entry:
779  %0 = ashr <16 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
780  %1 = trunc <16 x i32> %0 to <16 x i16>
781  store <16 x i16> %1, <16 x i16>* undef, align 4
782  ret void
783}
784
785define void @trunc16i32_16i16_lshr(<16 x i32> %a) {
786; SSE2-LABEL: trunc16i32_16i16_lshr:
787; SSE2:       # BB#0: # %entry
788; SSE2-NEXT:    psrld $16, %xmm2
789; SSE2-NEXT:    psrld $16, %xmm3
790; SSE2-NEXT:    psrld $16, %xmm0
791; SSE2-NEXT:    psrld $16, %xmm1
792; SSE2-NEXT:    pslld $16, %xmm1
793; SSE2-NEXT:    psrad $16, %xmm1
794; SSE2-NEXT:    pslld $16, %xmm0
795; SSE2-NEXT:    psrad $16, %xmm0
796; SSE2-NEXT:    packssdw %xmm1, %xmm0
797; SSE2-NEXT:    pslld $16, %xmm3
798; SSE2-NEXT:    psrad $16, %xmm3
799; SSE2-NEXT:    pslld $16, %xmm2
800; SSE2-NEXT:    psrad $16, %xmm2
801; SSE2-NEXT:    packssdw %xmm3, %xmm2
802; SSE2-NEXT:    movdqu %xmm2, (%rax)
803; SSE2-NEXT:    movdqu %xmm0, (%rax)
804; SSE2-NEXT:    retq
805;
806; SSSE3-LABEL: trunc16i32_16i16_lshr:
807; SSSE3:       # BB#0: # %entry
808; SSSE3-NEXT:    psrld $16, %xmm2
809; SSSE3-NEXT:    psrld $16, %xmm3
810; SSSE3-NEXT:    psrld $16, %xmm0
811; SSSE3-NEXT:    psrld $16, %xmm1
812; SSSE3-NEXT:    pslld $16, %xmm1
813; SSSE3-NEXT:    psrad $16, %xmm1
814; SSSE3-NEXT:    pslld $16, %xmm0
815; SSSE3-NEXT:    psrad $16, %xmm0
816; SSSE3-NEXT:    packssdw %xmm1, %xmm0
817; SSSE3-NEXT:    pslld $16, %xmm3
818; SSSE3-NEXT:    psrad $16, %xmm3
819; SSSE3-NEXT:    pslld $16, %xmm2
820; SSSE3-NEXT:    psrad $16, %xmm2
821; SSSE3-NEXT:    packssdw %xmm3, %xmm2
822; SSSE3-NEXT:    movdqu %xmm2, (%rax)
823; SSSE3-NEXT:    movdqu %xmm0, (%rax)
824; SSSE3-NEXT:    retq
825;
826; SSE41-LABEL: trunc16i32_16i16_lshr:
827; SSE41:       # BB#0: # %entry
828; SSE41-NEXT:    psrld $16, %xmm3
829; SSE41-NEXT:    psrld $16, %xmm2
830; SSE41-NEXT:    packusdw %xmm3, %xmm2
831; SSE41-NEXT:    psrld $16, %xmm1
832; SSE41-NEXT:    psrld $16, %xmm0
833; SSE41-NEXT:    packusdw %xmm1, %xmm0
834; SSE41-NEXT:    movdqu %xmm2, (%rax)
835; SSE41-NEXT:    movdqu %xmm0, (%rax)
836; SSE41-NEXT:    retq
837;
838; AVX1-LABEL: trunc16i32_16i16_lshr:
839; AVX1:       # BB#0: # %entry
840; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
841; AVX1-NEXT:    vpsrld $16, %xmm2, %xmm2
842; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm0
843; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
844; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
845; AVX1-NEXT:    vpsrld $16, %xmm2, %xmm2
846; AVX1-NEXT:    vpsrld $16, %xmm1, %xmm1
847; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
848; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
849; AVX1-NEXT:    vmovups %ymm0, (%rax)
850; AVX1-NEXT:    vzeroupper
851; AVX1-NEXT:    retq
852;
853; AVX2-LABEL: trunc16i32_16i16_lshr:
854; AVX2:       # BB#0: # %entry
855; AVX2-NEXT:    vpsrld $16, %ymm1, %ymm1
856; AVX2-NEXT:    vpsrld $16, %ymm0, %ymm0
857; AVX2-NEXT:    vpackusdw %ymm0, %ymm0, %ymm0
858; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
859; AVX2-NEXT:    vpackusdw %ymm0, %ymm1, %ymm1
860; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
861; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
862; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
863; AVX2-NEXT:    vzeroupper
864; AVX2-NEXT:    retq
865;
866; AVX512-LABEL: trunc16i32_16i16_lshr:
867; AVX512:       # BB#0: # %entry
868; AVX512-NEXT:    vpsrld $16, %zmm0, %zmm0
869; AVX512-NEXT:    vpmovdw %zmm0, (%rax)
870; AVX512-NEXT:    vzeroupper
871; AVX512-NEXT:    retq
872entry:
873  %0 = lshr <16 x i32> %a, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
874  %1 = trunc <16 x i32> %0 to <16 x i16>
875  store <16 x i16> %1, <16 x i16>* undef, align 4
876  ret void
877}
878
879define void @trunc16i32_16i8(<16 x i32> %a) {
880; SSE-LABEL: trunc16i32_16i8:
881; SSE:       # BB#0: # %entry
882; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
883; SSE-NEXT:    pand %xmm4, %xmm3
884; SSE-NEXT:    pand %xmm4, %xmm2
885; SSE-NEXT:    packuswb %xmm3, %xmm2
886; SSE-NEXT:    pand %xmm4, %xmm1
887; SSE-NEXT:    pand %xmm4, %xmm0
888; SSE-NEXT:    packuswb %xmm1, %xmm0
889; SSE-NEXT:    packuswb %xmm2, %xmm0
890; SSE-NEXT:    movdqu %xmm0, (%rax)
891; SSE-NEXT:    retq
892;
893; AVX1-LABEL: trunc16i32_16i8:
894; AVX1:       # BB#0: # %entry
895; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
896; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
897; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
898; AVX1-NEXT:    vpand %xmm3, %xmm1, %xmm1
899; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
900; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
901; AVX1-NEXT:    vpand %xmm3, %xmm2, %xmm2
902; AVX1-NEXT:    vpand %xmm3, %xmm0, %xmm0
903; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
904; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
905; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
906; AVX1-NEXT:    vzeroupper
907; AVX1-NEXT:    retq
908;
909; AVX2-LABEL: trunc16i32_16i8:
910; AVX2:       # BB#0: # %entry
911; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31]
912; AVX2-NEXT:    vpshufb %ymm2, %ymm1, %ymm1
913; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
914; AVX2-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
915; AVX2-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
916; AVX2-NEXT:    vpshufb %ymm2, %ymm0, %ymm0
917; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
918; AVX2-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
919; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
920; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
921; AVX2-NEXT:    vzeroupper
922; AVX2-NEXT:    retq
923;
924; AVX512-LABEL: trunc16i32_16i8:
925; AVX512:       # BB#0: # %entry
926; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
927; AVX512-NEXT:    vzeroupper
928; AVX512-NEXT:    retq
929entry:
930  %0 = trunc <16 x i32> %a to <16 x i8>
931  store <16 x i8> %0, <16 x i8>* undef, align 4
932  ret void
933}
934
935define void @trunc16i32_16i8_ashr(<16 x i32> %a) {
936; SSE-LABEL: trunc16i32_16i8_ashr:
937; SSE:       # BB#0: # %entry
938; SSE-NEXT:    psrad $24, %xmm0
939; SSE-NEXT:    psrad $24, %xmm1
940; SSE-NEXT:    psrad $24, %xmm2
941; SSE-NEXT:    psrad $24, %xmm3
942; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
943; SSE-NEXT:    pand %xmm4, %xmm3
944; SSE-NEXT:    pand %xmm4, %xmm2
945; SSE-NEXT:    packuswb %xmm3, %xmm2
946; SSE-NEXT:    pand %xmm4, %xmm1
947; SSE-NEXT:    pand %xmm4, %xmm0
948; SSE-NEXT:    packuswb %xmm1, %xmm0
949; SSE-NEXT:    packuswb %xmm2, %xmm0
950; SSE-NEXT:    movdqu %xmm0, (%rax)
951; SSE-NEXT:    retq
952;
953; AVX1-LABEL: trunc16i32_16i8_ashr:
954; AVX1:       # BB#0: # %entry
955; AVX1-NEXT:    vpsrad $24, %xmm0, %xmm2
956; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
957; AVX1-NEXT:    vpsrad $24, %xmm0, %xmm0
958; AVX1-NEXT:    vpsrad $24, %xmm1, %xmm3
959; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm1
960; AVX1-NEXT:    vpsrad $24, %xmm1, %xmm1
961; AVX1-NEXT:    vmovdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
962; AVX1-NEXT:    vpand %xmm4, %xmm1, %xmm1
963; AVX1-NEXT:    vpand %xmm4, %xmm3, %xmm3
964; AVX1-NEXT:    vpackuswb %xmm1, %xmm3, %xmm1
965; AVX1-NEXT:    vpand %xmm4, %xmm0, %xmm0
966; AVX1-NEXT:    vpand %xmm4, %xmm2, %xmm2
967; AVX1-NEXT:    vpackuswb %xmm0, %xmm2, %xmm0
968; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
969; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
970; AVX1-NEXT:    vzeroupper
971; AVX1-NEXT:    retq
972;
973; AVX2-LABEL: trunc16i32_16i8_ashr:
974; AVX2:       # BB#0: # %entry
975; AVX2-NEXT:    vpsrad $24, %ymm0, %ymm0
976; AVX2-NEXT:    vpsrad $24, %ymm1, %ymm1
977; AVX2-NEXT:    vpackssdw %ymm0, %ymm1, %ymm1
978; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
979; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
980; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
981; AVX2-NEXT:    vpackssdw %ymm0, %ymm0, %ymm0
982; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
983; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
984; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
985; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
986; AVX2-NEXT:    vzeroupper
987; AVX2-NEXT:    retq
988;
989; AVX512-LABEL: trunc16i32_16i8_ashr:
990; AVX512:       # BB#0: # %entry
991; AVX512-NEXT:    vpsrld $24, %zmm0, %zmm0
992; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
993; AVX512-NEXT:    vzeroupper
994; AVX512-NEXT:    retq
995entry:
996  %0 = ashr <16 x i32> %a, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
997  %1 = trunc <16 x i32> %0 to <16 x i8>
998  store <16 x i8> %1, <16 x i8>* undef, align 4
999  ret void
1000}
1001
1002define void @trunc16i32_16i8_lshr(<16 x i32> %a) {
1003; SSE-LABEL: trunc16i32_16i8_lshr:
1004; SSE:       # BB#0: # %entry
1005; SSE-NEXT:    psrld $24, %xmm1
1006; SSE-NEXT:    psrld $24, %xmm0
1007; SSE-NEXT:    packuswb %xmm1, %xmm0
1008; SSE-NEXT:    psrld $24, %xmm3
1009; SSE-NEXT:    psrld $24, %xmm2
1010; SSE-NEXT:    packuswb %xmm3, %xmm2
1011; SSE-NEXT:    packuswb %xmm2, %xmm0
1012; SSE-NEXT:    movdqu %xmm0, (%rax)
1013; SSE-NEXT:    retq
1014;
1015; AVX1-LABEL: trunc16i32_16i8_lshr:
1016; AVX1:       # BB#0: # %entry
1017; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
1018; AVX1-NEXT:    vpsrld $24, %xmm2, %xmm2
1019; AVX1-NEXT:    vpsrld $24, %xmm0, %xmm0
1020; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
1021; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1022; AVX1-NEXT:    vpsrld $24, %xmm2, %xmm2
1023; AVX1-NEXT:    vpsrld $24, %xmm1, %xmm1
1024; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
1025; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
1026; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
1027; AVX1-NEXT:    vzeroupper
1028; AVX1-NEXT:    retq
1029;
1030; AVX2-LABEL: trunc16i32_16i8_lshr:
1031; AVX2:       # BB#0: # %entry
1032; AVX2-NEXT:    vpsrld $24, %ymm0, %ymm0
1033; AVX2-NEXT:    vpsrld $24, %ymm1, %ymm1
1034; AVX2-NEXT:    vpackssdw %ymm0, %ymm1, %ymm1
1035; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
1036; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1037; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1038; AVX2-NEXT:    vpackssdw %ymm0, %ymm0, %ymm0
1039; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
1040; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1041; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1042; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
1043; AVX2-NEXT:    vzeroupper
1044; AVX2-NEXT:    retq
1045;
1046; AVX512-LABEL: trunc16i32_16i8_lshr:
1047; AVX512:       # BB#0: # %entry
1048; AVX512-NEXT:    vpsrld $24, %zmm0, %zmm0
1049; AVX512-NEXT:    vpmovdb %zmm0, (%rax)
1050; AVX512-NEXT:    vzeroupper
1051; AVX512-NEXT:    retq
1052entry:
1053  %0 = lshr <16 x i32> %a, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24>
1054  %1 = trunc <16 x i32> %0 to <16 x i8>
1055  store <16 x i8> %1, <16 x i8>* undef, align 4
1056  ret void
1057}
1058
1059;PR25684
1060define void @trunc16i16_16i8(<16 x i16> %a) {
1061; SSE2-LABEL: trunc16i16_16i8:
1062; SSE2:       # BB#0: # %entry
1063; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1064; SSE2-NEXT:    pand %xmm2, %xmm1
1065; SSE2-NEXT:    pand %xmm2, %xmm0
1066; SSE2-NEXT:    packuswb %xmm1, %xmm0
1067; SSE2-NEXT:    movdqu %xmm0, (%rax)
1068; SSE2-NEXT:    retq
1069;
1070; SSSE3-LABEL: trunc16i16_16i8:
1071; SSSE3:       # BB#0: # %entry
1072; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1073; SSSE3-NEXT:    pshufb %xmm2, %xmm1
1074; SSSE3-NEXT:    pshufb %xmm2, %xmm0
1075; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1076; SSSE3-NEXT:    movdqu %xmm0, (%rax)
1077; SSSE3-NEXT:    retq
1078;
1079; SSE41-LABEL: trunc16i16_16i8:
1080; SSE41:       # BB#0: # %entry
1081; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1082; SSE41-NEXT:    pshufb %xmm2, %xmm1
1083; SSE41-NEXT:    pshufb %xmm2, %xmm0
1084; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1085; SSE41-NEXT:    movdqu %xmm0, (%rax)
1086; SSE41-NEXT:    retq
1087;
1088; AVX1-LABEL: trunc16i16_16i8:
1089; AVX1:       # BB#0: # %entry
1090; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
1091; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1092; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1093; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1094; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1095; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
1096; AVX1-NEXT:    vzeroupper
1097; AVX1-NEXT:    retq
1098;
1099; AVX2-LABEL: trunc16i16_16i8:
1100; AVX2:       # BB#0: # %entry
1101; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
1102; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1103; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1104; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1105; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1106; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
1107; AVX2-NEXT:    vzeroupper
1108; AVX2-NEXT:    retq
1109;
1110; AVX512F-LABEL: trunc16i16_16i8:
1111; AVX512F:       # BB#0: # %entry
1112; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
1113; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
1114; AVX512F-NEXT:    vmovdqu %xmm0, (%rax)
1115; AVX512F-NEXT:    vzeroupper
1116; AVX512F-NEXT:    retq
1117;
1118; AVX512VL-LABEL: trunc16i16_16i8:
1119; AVX512VL:       # BB#0: # %entry
1120; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
1121; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
1122; AVX512VL-NEXT:    vmovdqu %xmm0, (%rax)
1123; AVX512VL-NEXT:    vzeroupper
1124; AVX512VL-NEXT:    retq
1125;
1126; AVX512BW-LABEL: trunc16i16_16i8:
1127; AVX512BW:       # BB#0: # %entry
1128; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
1129; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
1130; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
1131; AVX512BW-NEXT:    vzeroupper
1132; AVX512BW-NEXT:    retq
1133;
1134; AVX512BWVL-LABEL: trunc16i16_16i8:
1135; AVX512BWVL:       # BB#0: # %entry
1136; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
1137; AVX512BWVL-NEXT:    vzeroupper
1138; AVX512BWVL-NEXT:    retq
1139entry:
1140  %0 = trunc <16 x i16> %a to <16 x i8>
1141  store <16 x i8> %0, <16 x i8>* undef, align 4
1142  ret void
1143}
1144
1145define void @trunc16i16_16i8_ashr(<16 x i16> %a) {
1146; SSE-LABEL: trunc16i16_16i8_ashr:
1147; SSE:       # BB#0: # %entry
1148; SSE-NEXT:    psraw $8, %xmm1
1149; SSE-NEXT:    psraw $8, %xmm0
1150; SSE-NEXT:    packsswb %xmm1, %xmm0
1151; SSE-NEXT:    movdqu %xmm0, (%rax)
1152; SSE-NEXT:    retq
1153;
1154; AVX1-LABEL: trunc16i16_16i8_ashr:
1155; AVX1:       # BB#0: # %entry
1156; AVX1-NEXT:    vpsraw $8, %xmm0, %xmm1
1157; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
1158; AVX1-NEXT:    vpsraw $8, %xmm0, %xmm0
1159; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1160; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1161; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1162; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1163; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
1164; AVX1-NEXT:    vzeroupper
1165; AVX1-NEXT:    retq
1166;
1167; AVX2-LABEL: trunc16i16_16i8_ashr:
1168; AVX2:       # BB#0: # %entry
1169; AVX2-NEXT:    vpsraw $8, %ymm0, %ymm0
1170; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
1171; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1172; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1173; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1174; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1175; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
1176; AVX2-NEXT:    vzeroupper
1177; AVX2-NEXT:    retq
1178;
1179; AVX512F-LABEL: trunc16i16_16i8_ashr:
1180; AVX512F:       # BB#0: # %entry
1181; AVX512F-NEXT:    vpsraw $8, %ymm0, %ymm0
1182; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
1183; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
1184; AVX512F-NEXT:    vmovdqu %xmm0, (%rax)
1185; AVX512F-NEXT:    vzeroupper
1186; AVX512F-NEXT:    retq
1187;
1188; AVX512VL-LABEL: trunc16i16_16i8_ashr:
1189; AVX512VL:       # BB#0: # %entry
1190; AVX512VL-NEXT:    vpsraw $8, %ymm0, %ymm0
1191; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
1192; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
1193; AVX512VL-NEXT:    vmovdqu %xmm0, (%rax)
1194; AVX512VL-NEXT:    vzeroupper
1195; AVX512VL-NEXT:    retq
1196;
1197; AVX512BW-LABEL: trunc16i16_16i8_ashr:
1198; AVX512BW:       # BB#0: # %entry
1199; AVX512BW-NEXT:    vpsraw $8, %ymm0, %ymm0
1200; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
1201; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
1202; AVX512BW-NEXT:    vzeroupper
1203; AVX512BW-NEXT:    retq
1204;
1205; AVX512BWVL-LABEL: trunc16i16_16i8_ashr:
1206; AVX512BWVL:       # BB#0: # %entry
1207; AVX512BWVL-NEXT:    vpsrlw $8, %ymm0, %ymm0
1208; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
1209; AVX512BWVL-NEXT:    vzeroupper
1210; AVX512BWVL-NEXT:    retq
1211entry:
1212  %0 = ashr <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
1213  %1 = trunc <16 x i16> %0 to <16 x i8>
1214  store <16 x i8> %1, <16 x i8>* undef, align 4
1215  ret void
1216}
1217
1218define void @trunc16i16_16i8_lshr(<16 x i16> %a) {
1219; SSE-LABEL: trunc16i16_16i8_lshr:
1220; SSE:       # BB#0: # %entry
1221; SSE-NEXT:    psrlw $8, %xmm1
1222; SSE-NEXT:    psrlw $8, %xmm0
1223; SSE-NEXT:    packuswb %xmm1, %xmm0
1224; SSE-NEXT:    movdqu %xmm0, (%rax)
1225; SSE-NEXT:    retq
1226;
1227; AVX1-LABEL: trunc16i16_16i8_lshr:
1228; AVX1:       # BB#0: # %entry
1229; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
1230; AVX1-NEXT:    vpsrlw $8, %xmm1, %xmm1
1231; AVX1-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[1,3,5,7,9,11,13,15,u,u,u,u,u,u,u,u]
1232; AVX1-NEXT:    vpshufb {{.*#+}} xmm1 = xmm1[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1233; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1234; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
1235; AVX1-NEXT:    vzeroupper
1236; AVX1-NEXT:    retq
1237;
1238; AVX2-LABEL: trunc16i16_16i8_lshr:
1239; AVX2:       # BB#0: # %entry
1240; AVX2-NEXT:    vpsrlw $8, %ymm0, %ymm0
1241; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
1242; AVX2-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
1243; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
1244; AVX2-NEXT:    vzeroupper
1245; AVX2-NEXT:    retq
1246;
1247; AVX512F-LABEL: trunc16i16_16i8_lshr:
1248; AVX512F:       # BB#0: # %entry
1249; AVX512F-NEXT:    vpsrlw $8, %ymm0, %ymm0
1250; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
1251; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
1252; AVX512F-NEXT:    vmovdqu %xmm0, (%rax)
1253; AVX512F-NEXT:    vzeroupper
1254; AVX512F-NEXT:    retq
1255;
1256; AVX512VL-LABEL: trunc16i16_16i8_lshr:
1257; AVX512VL:       # BB#0: # %entry
1258; AVX512VL-NEXT:    vpsrlw $8, %ymm0, %ymm0
1259; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
1260; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
1261; AVX512VL-NEXT:    vmovdqu %xmm0, (%rax)
1262; AVX512VL-NEXT:    vzeroupper
1263; AVX512VL-NEXT:    retq
1264;
1265; AVX512BW-LABEL: trunc16i16_16i8_lshr:
1266; AVX512BW:       # BB#0: # %entry
1267; AVX512BW-NEXT:    vpsrlw $8, %ymm0, %ymm0
1268; AVX512BW-NEXT:    vpmovwb %zmm0, %ymm0
1269; AVX512BW-NEXT:    vmovdqu %xmm0, (%rax)
1270; AVX512BW-NEXT:    vzeroupper
1271; AVX512BW-NEXT:    retq
1272;
1273; AVX512BWVL-LABEL: trunc16i16_16i8_lshr:
1274; AVX512BWVL:       # BB#0: # %entry
1275; AVX512BWVL-NEXT:    vpsrlw $8, %ymm0, %ymm0
1276; AVX512BWVL-NEXT:    vpmovwb %ymm0, (%rax)
1277; AVX512BWVL-NEXT:    vzeroupper
1278; AVX512BWVL-NEXT:    retq
1279entry:
1280  %0 = lshr <16 x i16> %a, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>
1281  %1 = trunc <16 x i16> %0 to <16 x i8>
1282  store <16 x i8> %1, <16 x i8>* undef, align 4
1283  ret void
1284}
1285
1286define void @trunc32i16_32i8(<32 x i16> %a) {
1287; SSE2-LABEL: trunc32i16_32i8:
1288; SSE2:       # BB#0: # %entry
1289; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255]
1290; SSE2-NEXT:    pand %xmm4, %xmm1
1291; SSE2-NEXT:    pand %xmm4, %xmm0
1292; SSE2-NEXT:    packuswb %xmm1, %xmm0
1293; SSE2-NEXT:    pand %xmm4, %xmm3
1294; SSE2-NEXT:    pand %xmm4, %xmm2
1295; SSE2-NEXT:    packuswb %xmm3, %xmm2
1296; SSE2-NEXT:    movdqu %xmm2, (%rax)
1297; SSE2-NEXT:    movdqu %xmm0, (%rax)
1298; SSE2-NEXT:    retq
1299;
1300; SSSE3-LABEL: trunc32i16_32i8:
1301; SSSE3:       # BB#0: # %entry
1302; SSSE3-NEXT:    movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1303; SSSE3-NEXT:    pshufb %xmm4, %xmm1
1304; SSSE3-NEXT:    pshufb %xmm4, %xmm0
1305; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1306; SSSE3-NEXT:    pshufb %xmm4, %xmm3
1307; SSSE3-NEXT:    pshufb %xmm4, %xmm2
1308; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1309; SSSE3-NEXT:    movdqu %xmm2, (%rax)
1310; SSSE3-NEXT:    movdqu %xmm0, (%rax)
1311; SSSE3-NEXT:    retq
1312;
1313; SSE41-LABEL: trunc32i16_32i8:
1314; SSE41:       # BB#0: # %entry
1315; SSE41-NEXT:    movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1316; SSE41-NEXT:    pshufb %xmm4, %xmm1
1317; SSE41-NEXT:    pshufb %xmm4, %xmm0
1318; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1319; SSE41-NEXT:    pshufb %xmm4, %xmm3
1320; SSE41-NEXT:    pshufb %xmm4, %xmm2
1321; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1322; SSE41-NEXT:    movdqu %xmm2, (%rax)
1323; SSE41-NEXT:    movdqu %xmm0, (%rax)
1324; SSE41-NEXT:    retq
1325;
1326; AVX1-LABEL: trunc32i16_32i8:
1327; AVX1:       # BB#0: # %entry
1328; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1329; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1330; AVX1-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
1331; AVX1-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
1332; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
1333; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
1334; AVX1-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
1335; AVX1-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
1336; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
1337; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1338; AVX1-NEXT:    vmovups %ymm0, (%rax)
1339; AVX1-NEXT:    vzeroupper
1340; AVX1-NEXT:    retq
1341;
1342; AVX2-LABEL: trunc32i16_32i8:
1343; AVX2:       # BB#0: # %entry
1344; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
1345; AVX2-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1346; AVX2-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
1347; AVX2-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
1348; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
1349; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm2
1350; AVX2-NEXT:    vpshufb %xmm3, %xmm2, %xmm2
1351; AVX2-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
1352; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
1353; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1354; AVX2-NEXT:    vmovdqu %ymm0, (%rax)
1355; AVX2-NEXT:    vzeroupper
1356; AVX2-NEXT:    retq
1357;
1358; AVX512F-LABEL: trunc32i16_32i8:
1359; AVX512F:       # BB#0: # %entry
1360; AVX512F-NEXT:    vpmovsxwd %ymm0, %zmm0
1361; AVX512F-NEXT:    vpmovdb %zmm0, %xmm0
1362; AVX512F-NEXT:    vpmovsxwd %ymm1, %zmm1
1363; AVX512F-NEXT:    vpmovdb %zmm1, %xmm1
1364; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1365; AVX512F-NEXT:    vmovdqu %ymm0, (%rax)
1366; AVX512F-NEXT:    vzeroupper
1367; AVX512F-NEXT:    retq
1368;
1369; AVX512VL-LABEL: trunc32i16_32i8:
1370; AVX512VL:       # BB#0: # %entry
1371; AVX512VL-NEXT:    vpmovsxwd %ymm0, %zmm0
1372; AVX512VL-NEXT:    vpmovdb %zmm0, %xmm0
1373; AVX512VL-NEXT:    vpmovsxwd %ymm1, %zmm1
1374; AVX512VL-NEXT:    vpmovdb %zmm1, %xmm1
1375; AVX512VL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1376; AVX512VL-NEXT:    vmovdqu %ymm0, (%rax)
1377; AVX512VL-NEXT:    vzeroupper
1378; AVX512VL-NEXT:    retq
1379;
1380; AVX512BW-LABEL: trunc32i16_32i8:
1381; AVX512BW:       # BB#0: # %entry
1382; AVX512BW-NEXT:    vpmovwb %zmm0, (%rax)
1383; AVX512BW-NEXT:    vzeroupper
1384; AVX512BW-NEXT:    retq
1385;
1386; AVX512BWVL-LABEL: trunc32i16_32i8:
1387; AVX512BWVL:       # BB#0: # %entry
1388; AVX512BWVL-NEXT:    vpmovwb %zmm0, (%rax)
1389; AVX512BWVL-NEXT:    vzeroupper
1390; AVX512BWVL-NEXT:    retq
1391entry:
1392  %0 = trunc <32 x i16> %a to <32 x i8>
1393  store <32 x i8> %0, <32 x i8>* undef, align 4
1394  ret void
1395}
1396
1397define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) {
1398; SSE-LABEL: trunc2x4i64_8i32:
1399; SSE:       # BB#0: # %entry
1400; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
1401; SSE-NEXT:    shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2]
1402; SSE-NEXT:    movaps %xmm2, %xmm1
1403; SSE-NEXT:    retq
1404;
1405; AVX1-LABEL: trunc2x4i64_8i32:
1406; AVX1:       # BB#0: # %entry
1407; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
1408; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
1409; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1410; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
1411; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1412; AVX1-NEXT:    retq
1413;
1414; AVX2-LABEL: trunc2x4i64_8i32:
1415; AVX2:       # BB#0: # %entry
1416; AVX2-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
1417; AVX2-NEXT:    vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
1418; AVX2-NEXT:    vpermilps {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
1419; AVX2-NEXT:    vpermpd {{.*#+}} ymm1 = ymm1[0,2,2,3]
1420; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
1421; AVX2-NEXT:    retq
1422;
1423; AVX512F-LABEL: trunc2x4i64_8i32:
1424; AVX512F:       # BB#0: # %entry
1425; AVX512F-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
1426; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
1427; AVX512F-NEXT:    vpmovqd %zmm0, %ymm0
1428; AVX512F-NEXT:    vpmovqd %zmm1, %ymm1
1429; AVX512F-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1430; AVX512F-NEXT:    retq
1431;
1432; AVX512VL-LABEL: trunc2x4i64_8i32:
1433; AVX512VL:       # BB#0: # %entry
1434; AVX512VL-NEXT:    vpmovqd %ymm0, %xmm0
1435; AVX512VL-NEXT:    vpmovqd %ymm1, %xmm1
1436; AVX512VL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1437; AVX512VL-NEXT:    retq
1438;
1439; AVX512BW-LABEL: trunc2x4i64_8i32:
1440; AVX512BW:       # BB#0: # %entry
1441; AVX512BW-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
1442; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
1443; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
1444; AVX512BW-NEXT:    vpmovqd %zmm1, %ymm1
1445; AVX512BW-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1446; AVX512BW-NEXT:    retq
1447;
1448; AVX512BWVL-LABEL: trunc2x4i64_8i32:
1449; AVX512BWVL:       # BB#0: # %entry
1450; AVX512BWVL-NEXT:    vpmovqd %ymm0, %xmm0
1451; AVX512BWVL-NEXT:    vpmovqd %ymm1, %xmm1
1452; AVX512BWVL-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
1453; AVX512BWVL-NEXT:    retq
1454entry:
1455  %0 = trunc <4 x i64> %a to <4 x i32>
1456  %1 = trunc <4 x i64> %b to <4 x i32>
1457  %2 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1458  ret <8 x i32> %2
1459}
1460
1461define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) {
1462; SSE2-LABEL: trunc2x4i64_8i16:
1463; SSE2:       # BB#0: # %entry
1464; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1465; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1466; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1467; SSE2-NEXT:    pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7]
1468; SSE2-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
1469; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
1470; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
1471; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
1472; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
1473; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1474; SSE2-NEXT:    movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
1475; SSE2-NEXT:    retq
1476;
1477; SSSE3-LABEL: trunc2x4i64_8i16:
1478; SSSE3:       # BB#0: # %entry
1479; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1480; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1481; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1482; SSSE3-NEXT:    pshuflw {{.*#+}} xmm4 = xmm0[0,2,2,3,4,5,6,7]
1483; SSSE3-NEXT:    punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1]
1484; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3]
1485; SSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm0[0,1,0,2,4,5,6,7]
1486; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
1487; SSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7]
1488; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1489; SSSE3-NEXT:    movsd {{.*#+}} xmm0 = xmm4[0],xmm0[1]
1490; SSSE3-NEXT:    retq
1491;
1492; SSE41-LABEL: trunc2x4i64_8i16:
1493; SSE41:       # BB#0: # %entry
1494; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
1495; SSE41-NEXT:    pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7]
1496; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3]
1497; SSE41-NEXT:    pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7]
1498; SSE41-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1]
1499; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1500; SSE41-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1501; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1502; SSE41-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1503; SSE41-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1504; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
1505; SSE41-NEXT:    retq
1506;
1507; AVX1-LABEL: trunc2x4i64_8i16:
1508; AVX1:       # BB#0: # %entry
1509; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
1510; AVX1-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2]
1511; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1512; AVX1-NEXT:    vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2]
1513; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1514; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1515; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1516; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1517; AVX1-NEXT:    vzeroupper
1518; AVX1-NEXT:    retq
1519;
1520; AVX2-LABEL: trunc2x4i64_8i16:
1521; AVX2:       # BB#0: # %entry
1522; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
1523; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
1524; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
1525; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
1526; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1527; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1528; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1529; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1530; AVX2-NEXT:    vzeroupper
1531; AVX2-NEXT:    retq
1532;
1533; AVX512F-LABEL: trunc2x4i64_8i16:
1534; AVX512F:       # BB#0: # %entry
1535; AVX512F-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
1536; AVX512F-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
1537; AVX512F-NEXT:    vpmovqd %zmm0, %ymm0
1538; AVX512F-NEXT:    vpmovqd %zmm1, %ymm1
1539; AVX512F-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1540; AVX512F-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1541; AVX512F-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1542; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1543; AVX512F-NEXT:    vzeroupper
1544; AVX512F-NEXT:    retq
1545;
1546; AVX512VL-LABEL: trunc2x4i64_8i16:
1547; AVX512VL:       # BB#0: # %entry
1548; AVX512VL-NEXT:    vpmovqd %ymm0, %xmm0
1549; AVX512VL-NEXT:    vpmovqd %ymm1, %xmm1
1550; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1551; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1552; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1553; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1554; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1555; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1556; AVX512VL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1557; AVX512VL-NEXT:    vzeroupper
1558; AVX512VL-NEXT:    retq
1559;
1560; AVX512BW-LABEL: trunc2x4i64_8i16:
1561; AVX512BW:       # BB#0: # %entry
1562; AVX512BW-NEXT:    # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
1563; AVX512BW-NEXT:    # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
1564; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
1565; AVX512BW-NEXT:    vpmovqd %zmm1, %ymm1
1566; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1567; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1568; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1569; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1570; AVX512BW-NEXT:    vzeroupper
1571; AVX512BW-NEXT:    retq
1572;
1573; AVX512BWVL-LABEL: trunc2x4i64_8i16:
1574; AVX512BWVL:       # BB#0: # %entry
1575; AVX512BWVL-NEXT:    vpmovqd %ymm0, %xmm0
1576; AVX512BWVL-NEXT:    vpmovqd %ymm1, %xmm1
1577; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1578; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1579; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1580; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1581; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1582; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1583; AVX512BWVL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1584; AVX512BWVL-NEXT:    vzeroupper
1585; AVX512BWVL-NEXT:    retq
1586entry:
1587  %0 = trunc <4 x i64> %a to <4 x i16>
1588  %1 = trunc <4 x i64> %b to <4 x i16>
1589  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1590  ret <8 x i16> %2
1591}
1592
1593define <4 x i32> @trunc2x2i64_4i32(<2 x i64> %a, <2 x i64> %b) {
1594; SSE-LABEL: trunc2x2i64_4i32:
1595; SSE:       # BB#0: # %entry
1596; SSE-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
1597; SSE-NEXT:    retq
1598;
1599; AVX-LABEL: trunc2x2i64_4i32:
1600; AVX:       # BB#0: # %entry
1601; AVX-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
1602; AVX-NEXT:    retq
1603;
1604; AVX512-LABEL: trunc2x2i64_4i32:
1605; AVX512:       # BB#0: # %entry
1606; AVX512-NEXT:    vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2]
1607; AVX512-NEXT:    retq
1608entry:
1609  %0 = trunc <2 x i64> %a to <2 x i32>
1610  %1 = trunc <2 x i64> %b to <2 x i32>
1611  %2 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
1612  ret <4 x i32> %2
1613}
1614
1615define i64 @trunc2i64_i64(<2 x i64> %inval) {
1616; SSE-LABEL: trunc2i64_i64:
1617; SSE:       # BB#0: # %entry
1618; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1619; SSE-NEXT:    movq %xmm0, %rax
1620; SSE-NEXT:    retq
1621;
1622; AVX-LABEL: trunc2i64_i64:
1623; AVX:       # BB#0: # %entry
1624; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1625; AVX-NEXT:    vmovq %xmm0, %rax
1626; AVX-NEXT:    retq
1627;
1628; AVX512F-LABEL: trunc2i64_i64:
1629; AVX512F:       # BB#0: # %entry
1630; AVX512F-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1631; AVX512F-NEXT:    vmovq %xmm0, %rax
1632; AVX512F-NEXT:    retq
1633;
1634; AVX512VL-LABEL: trunc2i64_i64:
1635; AVX512VL:       # BB#0: # %entry
1636; AVX512VL-NEXT:    vpmovqd %xmm0, -{{[0-9]+}}(%rsp)
1637; AVX512VL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1638; AVX512VL-NEXT:    retq
1639;
1640; AVX512BW-LABEL: trunc2i64_i64:
1641; AVX512BW:       # BB#0: # %entry
1642; AVX512BW-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1643; AVX512BW-NEXT:    vmovq %xmm0, %rax
1644; AVX512BW-NEXT:    retq
1645;
1646; AVX512BWVL-LABEL: trunc2i64_i64:
1647; AVX512BWVL:       # BB#0: # %entry
1648; AVX512BWVL-NEXT:    vpmovqd %xmm0, -{{[0-9]+}}(%rsp)
1649; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1650; AVX512BWVL-NEXT:    retq
1651entry:
1652  %0 = trunc <2 x i64> %inval to <2 x i32>
1653  %1 = bitcast <2 x i32> %0 to i64
1654  ret i64 %1
1655}
1656
1657define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) {
1658; SSE2-LABEL: trunc2x4i32_8i16:
1659; SSE2:       # BB#0: # %entry
1660; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1661; SSE2-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1662; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1663; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1664; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1665; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1666; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1667; SSE2-NEXT:    retq
1668;
1669; SSSE3-LABEL: trunc2x4i32_8i16:
1670; SSSE3:       # BB#0: # %entry
1671; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1672; SSSE3-NEXT:    pshufb %xmm2, %xmm1
1673; SSSE3-NEXT:    pshufb %xmm2, %xmm0
1674; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1675; SSSE3-NEXT:    retq
1676;
1677; SSE41-LABEL: trunc2x4i32_8i16:
1678; SSE41:       # BB#0: # %entry
1679; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1680; SSE41-NEXT:    pshufb %xmm2, %xmm1
1681; SSE41-NEXT:    pshufb %xmm2, %xmm0
1682; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1683; SSE41-NEXT:    retq
1684;
1685; AVX-LABEL: trunc2x4i32_8i16:
1686; AVX:       # BB#0: # %entry
1687; AVX-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1688; AVX-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1689; AVX-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1690; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1691; AVX-NEXT:    retq
1692;
1693; AVX512F-LABEL: trunc2x4i32_8i16:
1694; AVX512F:       # BB#0: # %entry
1695; AVX512F-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1696; AVX512F-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1697; AVX512F-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1698; AVX512F-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1699; AVX512F-NEXT:    retq
1700;
1701; AVX512VL-LABEL: trunc2x4i32_8i16:
1702; AVX512VL:       # BB#0: # %entry
1703; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1704; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1705; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1706; AVX512VL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1707; AVX512VL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1708; AVX512VL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1709; AVX512VL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1710; AVX512VL-NEXT:    retq
1711;
1712; AVX512BW-LABEL: trunc2x4i32_8i16:
1713; AVX512BW:       # BB#0: # %entry
1714; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1715; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1716; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1717; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1718; AVX512BW-NEXT:    retq
1719;
1720; AVX512BWVL-LABEL: trunc2x4i32_8i16:
1721; AVX512BWVL:       # BB#0: # %entry
1722; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
1723; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
1724; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
1725; AVX512BWVL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1726; AVX512BWVL-NEXT:    vpshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1727; AVX512BWVL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1728; AVX512BWVL-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1729; AVX512BWVL-NEXT:    retq
1730entry:
1731  %0 = trunc <4 x i32> %a to <4 x i16>
1732  %1 = trunc <4 x i32> %b to <4 x i16>
1733  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1734  ret <8 x i16> %2
1735}
1736
1737; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
1738define i64 @trunc4i32_i64(<4 x i32> %inval) {
1739; SSE2-LABEL: trunc4i32_i64:
1740; SSE2:       # BB#0: # %entry
1741; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
1742; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
1743; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
1744; SSE2-NEXT:    movq %xmm0, %rax
1745; SSE2-NEXT:    retq
1746;
1747; SSSE3-LABEL: trunc4i32_i64:
1748; SSSE3:       # BB#0: # %entry
1749; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1750; SSSE3-NEXT:    movq %xmm0, %rax
1751; SSSE3-NEXT:    retq
1752;
1753; SSE41-LABEL: trunc4i32_i64:
1754; SSE41:       # BB#0: # %entry
1755; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1756; SSE41-NEXT:    movq %xmm0, %rax
1757; SSE41-NEXT:    retq
1758;
1759; AVX-LABEL: trunc4i32_i64:
1760; AVX:       # BB#0: # %entry
1761; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1762; AVX-NEXT:    vmovq %xmm0, %rax
1763; AVX-NEXT:    retq
1764;
1765; AVX512F-LABEL: trunc4i32_i64:
1766; AVX512F:       # BB#0: # %entry
1767; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1768; AVX512F-NEXT:    vmovq %xmm0, %rax
1769; AVX512F-NEXT:    retq
1770;
1771; AVX512VL-LABEL: trunc4i32_i64:
1772; AVX512VL:       # BB#0: # %entry
1773; AVX512VL-NEXT:    vpmovdw %xmm0, -{{[0-9]+}}(%rsp)
1774; AVX512VL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1775; AVX512VL-NEXT:    retq
1776;
1777; AVX512BW-LABEL: trunc4i32_i64:
1778; AVX512BW:       # BB#0: # %entry
1779; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1780; AVX512BW-NEXT:    vmovq %xmm0, %rax
1781; AVX512BW-NEXT:    retq
1782;
1783; AVX512BWVL-LABEL: trunc4i32_i64:
1784; AVX512BWVL:       # BB#0: # %entry
1785; AVX512BWVL-NEXT:    vpmovdw %xmm0, -{{[0-9]+}}(%rsp)
1786; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1787; AVX512BWVL-NEXT:    retq
1788entry:
1789  %0 = trunc <4 x i32> %inval to <4 x i16>
1790  %1 = bitcast <4 x i16> %0 to i64
1791  ret i64 %1
1792}
1793
1794define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) {
1795; SSE2-LABEL: trunc2x8i16_16i8:
1796; SSE2:       # BB#0: # %entry
1797; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
1798; SSE2-NEXT:    pand %xmm2, %xmm1
1799; SSE2-NEXT:    pand %xmm2, %xmm0
1800; SSE2-NEXT:    packuswb %xmm1, %xmm0
1801; SSE2-NEXT:    retq
1802;
1803; SSSE3-LABEL: trunc2x8i16_16i8:
1804; SSSE3:       # BB#0: # %entry
1805; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1806; SSSE3-NEXT:    pshufb %xmm2, %xmm1
1807; SSSE3-NEXT:    pshufb %xmm2, %xmm0
1808; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1809; SSSE3-NEXT:    retq
1810;
1811; SSE41-LABEL: trunc2x8i16_16i8:
1812; SSE41:       # BB#0: # %entry
1813; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1814; SSE41-NEXT:    pshufb %xmm2, %xmm1
1815; SSE41-NEXT:    pshufb %xmm2, %xmm0
1816; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1817; SSE41-NEXT:    retq
1818;
1819; AVX-LABEL: trunc2x8i16_16i8:
1820; AVX:       # BB#0: # %entry
1821; AVX-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1822; AVX-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1823; AVX-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1824; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1825; AVX-NEXT:    retq
1826;
1827; AVX512-LABEL: trunc2x8i16_16i8:
1828; AVX512:       # BB#0: # %entry
1829; AVX512-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
1830; AVX512-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
1831; AVX512-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
1832; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1833; AVX512-NEXT:    retq
1834entry:
1835  %0 = trunc <8 x i16> %a to <8 x i8>
1836  %1 = trunc <8 x i16> %b to <8 x i8>
1837  %2 = shufflevector <8 x i8> %0, <8 x i8> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
1838  ret <16 x i8> %2
1839}
1840
1841; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
1842define i64 @trunc8i16_i64(<8 x i16> %inval) {
1843; SSE2-LABEL: trunc8i16_i64:
1844; SSE2:       # BB#0: # %entry
1845; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
1846; SSE2-NEXT:    packuswb %xmm0, %xmm0
1847; SSE2-NEXT:    movq %xmm0, %rax
1848; SSE2-NEXT:    retq
1849;
1850; SSSE3-LABEL: trunc8i16_i64:
1851; SSSE3:       # BB#0: # %entry
1852; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1853; SSSE3-NEXT:    movq %xmm0, %rax
1854; SSSE3-NEXT:    retq
1855;
1856; SSE41-LABEL: trunc8i16_i64:
1857; SSE41:       # BB#0: # %entry
1858; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1859; SSE41-NEXT:    movq %xmm0, %rax
1860; SSE41-NEXT:    retq
1861;
1862; AVX-LABEL: trunc8i16_i64:
1863; AVX:       # BB#0: # %entry
1864; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1865; AVX-NEXT:    vmovq %xmm0, %rax
1866; AVX-NEXT:    retq
1867;
1868; AVX512F-LABEL: trunc8i16_i64:
1869; AVX512F:       # BB#0: # %entry
1870; AVX512F-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1871; AVX512F-NEXT:    vmovq %xmm0, %rax
1872; AVX512F-NEXT:    retq
1873;
1874; AVX512VL-LABEL: trunc8i16_i64:
1875; AVX512VL:       # BB#0: # %entry
1876; AVX512VL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1877; AVX512VL-NEXT:    vmovq %xmm0, %rax
1878; AVX512VL-NEXT:    retq
1879;
1880; AVX512BW-LABEL: trunc8i16_i64:
1881; AVX512BW:       # BB#0: # %entry
1882; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
1883; AVX512BW-NEXT:    vmovq %xmm0, %rax
1884; AVX512BW-NEXT:    retq
1885;
1886; AVX512BWVL-LABEL: trunc8i16_i64:
1887; AVX512BWVL:       # BB#0: # %entry
1888; AVX512BWVL-NEXT:    vpmovwb %xmm0, -{{[0-9]+}}(%rsp)
1889; AVX512BWVL-NEXT:    movq -{{[0-9]+}}(%rsp), %rax
1890; AVX512BWVL-NEXT:    retq
1891entry:
1892  %0 = trunc <8 x i16> %inval to <8 x i8>
1893  %1 = bitcast <8 x i8> %0 to i64
1894  ret i64 %1
1895}
1896
1897define <16 x i8> @trunc16i64_16i8_const() {
1898; SSE-LABEL: trunc16i64_16i8_const:
1899; SSE:       # BB#0: # %entry
1900; SSE-NEXT:    xorps %xmm0, %xmm0
1901; SSE-NEXT:    retq
1902;
1903; AVX-LABEL: trunc16i64_16i8_const:
1904; AVX:       # BB#0: # %entry
1905; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1906; AVX-NEXT:    retq
1907;
1908; AVX512F-LABEL: trunc16i64_16i8_const:
1909; AVX512F:       # BB#0: # %entry
1910; AVX512F-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1911; AVX512F-NEXT:    retq
1912;
1913; AVX512VL-LABEL: trunc16i64_16i8_const:
1914; AVX512VL:       # BB#0: # %entry
1915; AVX512VL-NEXT:    vpxor %xmm0, %xmm0, %xmm0
1916; AVX512VL-NEXT:    retq
1917;
1918; AVX512BW-LABEL: trunc16i64_16i8_const:
1919; AVX512BW:       # BB#0: # %entry
1920; AVX512BW-NEXT:    vxorps %xmm0, %xmm0, %xmm0
1921; AVX512BW-NEXT:    retq
1922;
1923; AVX512BWVL-LABEL: trunc16i64_16i8_const:
1924; AVX512BWVL:       # BB#0: # %entry
1925; AVX512BWVL-NEXT:    vpxor %xmm0, %xmm0, %xmm0
1926; AVX512BWVL-NEXT:    retq
1927
1928entry:
1929  %0 = trunc <16 x i64> zeroinitializer to <16 x i8>
1930  %1 = shufflevector <16 x i8> %0, <16 x i8> %0, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 undef, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26>
1931  ret <16 x i8> %1
1932}
1933
1934