1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx512bw | FileCheck %s --check-prefix=AVX512BW
8
9define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) {
10; SSE2-LABEL: trunc8i64_8i32:
11; SSE2:       # BB#0: # %entry
12; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
13; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
14; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
15; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
16; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
17; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]
18; SSE2-NEXT:    retq
19;
20; SSSE3-LABEL: trunc8i64_8i32:
21; SSSE3:       # BB#0: # %entry
22; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
23; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
24; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
25; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
26; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
27; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]
28; SSSE3-NEXT:    retq
29;
30; SSE41-LABEL: trunc8i64_8i32:
31; SSE41:       # BB#0: # %entry
32; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
33; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
34; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
35; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,1,0,2]
36; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
37; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm3[4,5,6,7]
38; SSE41-NEXT:    retq
39;
40; AVX1-LABEL: trunc8i64_8i32:
41; AVX1:       # BB#0: # %entry
42; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
43; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
44; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
45; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7]
46; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
47; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
48; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
49; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
50; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
51; AVX1-NEXT:    retq
52;
53; AVX2-LABEL: trunc8i64_8i32:
54; AVX2:       # BB#0: # %entry
55; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6]
56; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
57; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6]
58; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3]
59; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
60; AVX2-NEXT:    retq
61;
62; AVX512BW-LABEL: trunc8i64_8i32:
63; AVX512BW:       # BB#0: # %entry
64; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
65; AVX512BW-NEXT:    retq
66entry:
67  %0 = trunc <8 x i64> %a to <8 x i32>
68  ret <8 x i32> %0
69}
70
71define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) {
72; SSE2-LABEL: trunc8i64_8i16:
73; SSE2:       # BB#0: # %entry
74; SSE2-NEXT:    pextrw $4, %xmm1, %eax
75; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
76; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
77; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
78; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
79; SSE2-NEXT:    pextrw $4, %xmm3, %edx
80; SSE2-NEXT:    movd %edx, %xmm1
81; SSE2-NEXT:    movd %eax, %xmm3
82; SSE2-NEXT:    punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
83; SSE2-NEXT:    pextrw $4, %xmm2, %eax
84; SSE2-NEXT:    movd %eax, %xmm1
85; SSE2-NEXT:    movd %ecx, %xmm2
86; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
87; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
88; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
89; SSE2-NEXT:    retq
90;
91; SSSE3-LABEL: trunc8i64_8i16:
92; SSSE3:       # BB#0: # %entry
93; SSSE3-NEXT:    pextrw $4, %xmm1, %eax
94; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
95; SSSE3-NEXT:    pextrw $4, %xmm0, %ecx
96; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
97; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
98; SSSE3-NEXT:    pextrw $4, %xmm3, %edx
99; SSSE3-NEXT:    movd %edx, %xmm1
100; SSSE3-NEXT:    movd %eax, %xmm3
101; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
102; SSSE3-NEXT:    pextrw $4, %xmm2, %eax
103; SSSE3-NEXT:    movd %eax, %xmm1
104; SSSE3-NEXT:    movd %ecx, %xmm2
105; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
106; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
107; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
108; SSSE3-NEXT:    retq
109;
110; SSE41-LABEL: trunc8i64_8i16:
111; SSE41:       # BB#0: # %entry
112; SSE41-NEXT:    pxor %xmm4, %xmm4
113; SSE41-NEXT:    pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7]
114; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7]
115; SSE41-NEXT:    packusdw %xmm3, %xmm2
116; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7]
117; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7]
118; SSE41-NEXT:    packusdw %xmm1, %xmm0
119; SSE41-NEXT:    packusdw %xmm2, %xmm0
120; SSE41-NEXT:    retq
121;
122; AVX1-LABEL: trunc8i64_8i16:
123; AVX1:       # BB#0: # %entry
124; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
125; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
126; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
127; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7]
128; AVX1-NEXT:    vpackusdw %xmm2, %xmm1, %xmm1
129; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
130; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7]
131; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7]
132; AVX1-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
133; AVX1-NEXT:    vpackusdw %xmm1, %xmm0, %xmm0
134; AVX1-NEXT:    vzeroupper
135; AVX1-NEXT:    retq
136;
137; AVX2-LABEL: trunc8i64_8i16:
138; AVX2:       # BB#0: # %entry
139; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6]
140; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
141; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6]
142; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3]
143; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
144; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
145; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
146; AVX2-NEXT:    vzeroupper
147; AVX2-NEXT:    retq
148;
149; AVX512BW-LABEL: trunc8i64_8i16:
150; AVX512BW:       # BB#0: # %entry
151; AVX512BW-NEXT:    vpmovqw %zmm0, %xmm0
152; AVX512BW-NEXT:    retq
153entry:
154  %0 = trunc <8 x i64> %a to <8 x i16>
155  ret <8 x i16> %0
156}
157
158define void @trunc8i64_8i8(<8 x i64> %a) {
159; SSE-LABEL: trunc8i64_8i8:
160; SSE:       # BB#0: # %entry
161; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
162; SSE-NEXT:    pand %xmm4, %xmm3
163; SSE-NEXT:    pand %xmm4, %xmm2
164; SSE-NEXT:    packuswb %xmm3, %xmm2
165; SSE-NEXT:    pand %xmm4, %xmm1
166; SSE-NEXT:    pand %xmm4, %xmm0
167; SSE-NEXT:    packuswb %xmm1, %xmm0
168; SSE-NEXT:    packuswb %xmm2, %xmm0
169; SSE-NEXT:    packuswb %xmm0, %xmm0
170; SSE-NEXT:    movq %xmm0, (%rax)
171; SSE-NEXT:    retq
172;
173; AVX1-LABEL: trunc8i64_8i8:
174; AVX1:       # BB#0: # %entry
175; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
176; AVX1-NEXT:    vmovaps {{.*#+}} xmm3 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0]
177; AVX1-NEXT:    vandps %xmm3, %xmm2, %xmm2
178; AVX1-NEXT:    vandps %xmm3, %xmm1, %xmm1
179; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
180; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
181; AVX1-NEXT:    vandps %xmm3, %xmm2, %xmm2
182; AVX1-NEXT:    vandps %xmm3, %xmm0, %xmm0
183; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
184; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
185; AVX1-NEXT:    vpackuswb %xmm0, %xmm0, %xmm0
186; AVX1-NEXT:    vmovq %xmm0, (%rax)
187; AVX1-NEXT:    vzeroupper
188; AVX1-NEXT:    retq
189;
190; AVX2-LABEL: trunc8i64_8i8:
191; AVX2:       # BB#0: # %entry
192; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6]
193; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
194; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6]
195; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3]
196; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
197; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
198; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
199; AVX2-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
200; AVX2-NEXT:    vmovq %xmm0, (%rax)
201; AVX2-NEXT:    vzeroupper
202; AVX2-NEXT:    retq
203;
204; AVX512BW-LABEL: trunc8i64_8i8:
205; AVX512BW:       # BB#0: # %entry
206; AVX512BW-NEXT:    vpmovqb %zmm0, (%rax)
207; AVX512BW-NEXT:    retq
208entry:
209  %0 = trunc <8 x i64> %a to <8 x i8>
210  store <8 x i8> %0, <8 x i8>* undef, align 4
211  ret void
212}
213
214define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) {
215; SSE2-LABEL: trunc8i32_8i16:
216; SSE2:       # BB#0: # %entry
217; SSE2-NEXT:    pslld $16, %xmm1
218; SSE2-NEXT:    psrad $16, %xmm1
219; SSE2-NEXT:    pslld $16, %xmm0
220; SSE2-NEXT:    psrad $16, %xmm0
221; SSE2-NEXT:    packssdw %xmm1, %xmm0
222; SSE2-NEXT:    retq
223;
224; SSSE3-LABEL: trunc8i32_8i16:
225; SSSE3:       # BB#0: # %entry
226; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
227; SSSE3-NEXT:    pshufb %xmm2, %xmm1
228; SSSE3-NEXT:    pshufb %xmm2, %xmm0
229; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
230; SSSE3-NEXT:    retq
231;
232; SSE41-LABEL: trunc8i32_8i16:
233; SSE41:       # BB#0: # %entry
234; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
235; SSE41-NEXT:    pshufb %xmm2, %xmm1
236; SSE41-NEXT:    pshufb %xmm2, %xmm0
237; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
238; SSE41-NEXT:    retq
239;
240; AVX1-LABEL: trunc8i32_8i16:
241; AVX1:       # BB#0: # %entry
242; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
243; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
244; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
245; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
246; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
247; AVX1-NEXT:    vzeroupper
248; AVX1-NEXT:    retq
249;
250; AVX2-LABEL: trunc8i32_8i16:
251; AVX2:       # BB#0: # %entry
252; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
253; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
254; AVX2-NEXT:    vzeroupper
255; AVX2-NEXT:    retq
256;
257; AVX512BW-LABEL: trunc8i32_8i16:
258; AVX512BW:       # BB#0: # %entry
259; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
260; AVX512BW-NEXT:    retq
261entry:
262  %0 = trunc <8 x i32> %a to <8 x i16>
263  ret <8 x i16> %0
264}
265
266define void @trunc8i32_8i8(<8 x i32> %a) {
267; SSE2-LABEL: trunc8i32_8i8:
268; SSE2:       # BB#0: # %entry
269; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
270; SSE2-NEXT:    pand %xmm2, %xmm1
271; SSE2-NEXT:    pand %xmm2, %xmm0
272; SSE2-NEXT:    packuswb %xmm1, %xmm0
273; SSE2-NEXT:    packuswb %xmm0, %xmm0
274; SSE2-NEXT:    movq %xmm0, (%rax)
275; SSE2-NEXT:    retq
276;
277; SSSE3-LABEL: trunc8i32_8i8:
278; SSSE3:       # BB#0: # %entry
279; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
280; SSSE3-NEXT:    pshufb %xmm2, %xmm1
281; SSSE3-NEXT:    pshufb %xmm2, %xmm0
282; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
283; SSSE3-NEXT:    movq %xmm0, (%rax)
284; SSSE3-NEXT:    retq
285;
286; SSE41-LABEL: trunc8i32_8i8:
287; SSE41:       # BB#0: # %entry
288; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
289; SSE41-NEXT:    pshufb %xmm2, %xmm1
290; SSE41-NEXT:    pshufb %xmm2, %xmm0
291; SSE41-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
292; SSE41-NEXT:    movq %xmm0, (%rax)
293; SSE41-NEXT:    retq
294;
295; AVX1-LABEL: trunc8i32_8i8:
296; AVX1:       # BB#0: # %entry
297; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
298; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u>
299; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
300; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
301; AVX1-NEXT:    vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
302; AVX1-NEXT:    vmovq %xmm0, (%rax)
303; AVX1-NEXT:    vzeroupper
304; AVX1-NEXT:    retq
305;
306; AVX2-LABEL: trunc8i32_8i8:
307; AVX2:       # BB#0: # %entry
308; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
309; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
310; AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
311; AVX2-NEXT:    vmovq %xmm0, (%rax)
312; AVX2-NEXT:    vzeroupper
313; AVX2-NEXT:    retq
314;
315; AVX512BW-LABEL: trunc8i32_8i8:
316; AVX512BW:       # BB#0: # %entry
317; AVX512BW-NEXT:    vpmovdw %zmm0, %ymm0
318; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
319; AVX512BW-NEXT:    vmovq %xmm0, (%rax)
320; AVX512BW-NEXT:    retq
321entry:
322  %0 = trunc <8 x i32> %a to <8 x i8>
323  store <8 x i8> %0, <8 x i8>* undef, align 4
324  ret void
325}
326
327define void @trunc16i32_16i8(<16 x i32> %a) {
328; SSE-LABEL: trunc16i32_16i8:
329; SSE:       # BB#0: # %entry
330; SSE-NEXT:    movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
331; SSE-NEXT:    pand %xmm4, %xmm3
332; SSE-NEXT:    pand %xmm4, %xmm2
333; SSE-NEXT:    packuswb %xmm3, %xmm2
334; SSE-NEXT:    pand %xmm4, %xmm1
335; SSE-NEXT:    pand %xmm4, %xmm0
336; SSE-NEXT:    packuswb %xmm1, %xmm0
337; SSE-NEXT:    packuswb %xmm2, %xmm0
338; SSE-NEXT:    movdqu %xmm0, (%rax)
339; SSE-NEXT:    retq
340;
341; AVX1-LABEL: trunc16i32_16i8:
342; AVX1:       # BB#0: # %entry
343; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
344; AVX1-NEXT:    vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0]
345; AVX1-NEXT:    vandps %xmm3, %xmm2, %xmm2
346; AVX1-NEXT:    vandps %xmm3, %xmm1, %xmm1
347; AVX1-NEXT:    vpackuswb %xmm2, %xmm1, %xmm1
348; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
349; AVX1-NEXT:    vandps %xmm3, %xmm2, %xmm2
350; AVX1-NEXT:    vandps %xmm3, %xmm0, %xmm0
351; AVX1-NEXT:    vpackuswb %xmm2, %xmm0, %xmm0
352; AVX1-NEXT:    vpackuswb %xmm1, %xmm0, %xmm0
353; AVX1-NEXT:    vmovdqu %xmm0, (%rax)
354; AVX1-NEXT:    vzeroupper
355; AVX1-NEXT:    retq
356;
357; AVX2-LABEL: trunc16i32_16i8:
358; AVX2:       # BB#0: # %entry
359; AVX2-NEXT:    vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128]
360; AVX2-NEXT:    vpshufb %ymm2, %ymm1, %ymm1
361; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3]
362; AVX2-NEXT:    vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
363; AVX2-NEXT:    vpshufb %xmm3, %xmm1, %xmm1
364; AVX2-NEXT:    vpshufb %ymm2, %ymm0, %ymm0
365; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
366; AVX2-NEXT:    vpshufb %xmm3, %xmm0, %xmm0
367; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
368; AVX2-NEXT:    vmovdqu %xmm0, (%rax)
369; AVX2-NEXT:    vzeroupper
370; AVX2-NEXT:    retq
371;
372; AVX512BW-LABEL: trunc16i32_16i8:
373; AVX512BW:       # BB#0: # %entry
374; AVX512BW-NEXT:    vpmovdb %zmm0, (%rax)
375; AVX512BW-NEXT:    retq
376entry:
377  %0 = trunc <16 x i32> %a to <16 x i8>
378  store <16 x i8> %0, <16 x i8>* undef, align 4
379  ret void
380}
381
382define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) {
383; SSE2-LABEL: trunc2x4i64_8i32:
384; SSE2:       # BB#0: # %entry
385; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
386; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
387; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
388; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
389; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
390; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]
391; SSE2-NEXT:    retq
392;
393; SSSE3-LABEL: trunc2x4i64_8i32:
394; SSSE3:       # BB#0: # %entry
395; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
396; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
397; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
398; SSSE3-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3]
399; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
400; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0]
401; SSSE3-NEXT:    retq
402;
403; SSE41-LABEL: trunc2x4i64_8i32:
404; SSE41:       # BB#0: # %entry
405; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
406; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
407; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
408; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[0,1,0,2]
409; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
410; SSE41-NEXT:    pblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm3[4,5,6,7]
411; SSE41-NEXT:    retq
412;
413; AVX1-LABEL: trunc2x4i64_8i32:
414; AVX1:       # BB#0: # %entry
415; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
416; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
417; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
418; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
419; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
420; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
421; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
422; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7]
423; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
424; AVX1-NEXT:    retq
425;
426; AVX2-LABEL: trunc2x4i64_8i32:
427; AVX2:       # BB#0: # %entry
428; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6]
429; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
430; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6]
431; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3]
432; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
433; AVX2-NEXT:    retq
434;
435; AVX512BW-LABEL: trunc2x4i64_8i32:
436; AVX512BW:       # BB#0: # %entry
437; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
438; AVX512BW-NEXT:    vpmovqd %zmm1, %ymm1
439; AVX512BW-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
440; AVX512BW-NEXT:    retq
441entry:
442  %0 = trunc <4 x i64> %a to <4 x i32>
443  %1 = trunc <4 x i64> %b to <4 x i32>
444  %2 = shufflevector <4 x i32> %0, <4 x i32> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
445  ret <8 x i32> %2
446}
447
448define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) {
449; SSE2-LABEL: trunc2x4i64_8i16:
450; SSE2:       # BB#0: # %entry
451; SSE2-NEXT:    pextrw $4, %xmm1, %eax
452; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
453; SSE2-NEXT:    pextrw $4, %xmm0, %ecx
454; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
455; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
456; SSE2-NEXT:    pextrw $4, %xmm3, %edx
457; SSE2-NEXT:    movd %edx, %xmm1
458; SSE2-NEXT:    movd %eax, %xmm3
459; SSE2-NEXT:    punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
460; SSE2-NEXT:    pextrw $4, %xmm2, %eax
461; SSE2-NEXT:    movd %eax, %xmm1
462; SSE2-NEXT:    movd %ecx, %xmm2
463; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
464; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
465; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
466; SSE2-NEXT:    retq
467;
468; SSSE3-LABEL: trunc2x4i64_8i16:
469; SSSE3:       # BB#0: # %entry
470; SSSE3-NEXT:    pextrw $4, %xmm1, %eax
471; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3]
472; SSSE3-NEXT:    pextrw $4, %xmm0, %ecx
473; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
474; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
475; SSSE3-NEXT:    pextrw $4, %xmm3, %edx
476; SSSE3-NEXT:    movd %edx, %xmm1
477; SSSE3-NEXT:    movd %eax, %xmm3
478; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3]
479; SSSE3-NEXT:    pextrw $4, %xmm2, %eax
480; SSSE3-NEXT:    movd %eax, %xmm1
481; SSSE3-NEXT:    movd %ecx, %xmm2
482; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
483; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3]
484; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
485; SSSE3-NEXT:    retq
486;
487; SSE41-LABEL: trunc2x4i64_8i16:
488; SSE41:       # BB#0: # %entry
489; SSE41-NEXT:    pextrw $4, %xmm0, %eax
490; SSE41-NEXT:    pinsrw $1, %eax, %xmm0
491; SSE41-NEXT:    movd %xmm1, %eax
492; SSE41-NEXT:    pinsrw $2, %eax, %xmm0
493; SSE41-NEXT:    pextrw $4, %xmm1, %eax
494; SSE41-NEXT:    pinsrw $3, %eax, %xmm0
495; SSE41-NEXT:    movd %xmm2, %eax
496; SSE41-NEXT:    pinsrw $4, %eax, %xmm0
497; SSE41-NEXT:    pextrw $4, %xmm2, %eax
498; SSE41-NEXT:    pinsrw $5, %eax, %xmm0
499; SSE41-NEXT:    movd %xmm3, %eax
500; SSE41-NEXT:    pinsrw $6, %eax, %xmm0
501; SSE41-NEXT:    pextrw $4, %xmm3, %eax
502; SSE41-NEXT:    pinsrw $7, %eax, %xmm0
503; SSE41-NEXT:    retq
504;
505; AVX1-LABEL: trunc2x4i64_8i16:
506; AVX1:       # BB#0: # %entry
507; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
508; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
509; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
510; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
511; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
512; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm2[0,1,0,2]
513; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
514; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7]
515; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
516; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
517; AVX1-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
518; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
519; AVX1-NEXT:    vzeroupper
520; AVX1-NEXT:    retq
521;
522; AVX2-LABEL: trunc2x4i64_8i16:
523; AVX2:       # BB#0: # %entry
524; AVX2-NEXT:    vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6]
525; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3]
526; AVX2-NEXT:    vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6]
527; AVX2-NEXT:    vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3]
528; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
529; AVX2-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
530; AVX2-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
531; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
532; AVX2-NEXT:    vzeroupper
533; AVX2-NEXT:    retq
534;
535; AVX512BW-LABEL: trunc2x4i64_8i16:
536; AVX512BW:       # BB#0: # %entry
537; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
538; AVX512BW-NEXT:    vpmovqd %zmm1, %ymm1
539; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
540; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
541; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
542; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
543; AVX512BW-NEXT:    retq
544entry:
545  %0 = trunc <4 x i64> %a to <4 x i16>
546  %1 = trunc <4 x i64> %b to <4 x i16>
547  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
548  ret <8 x i16> %2
549}
550
551define <4 x i32> @trunc2x2i64_4i32(<2 x i64> %a, <2 x i64> %b) {
552; SSE2-LABEL: trunc2x2i64_4i32:
553; SSE2:       # BB#0: # %entry
554; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
555; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
556; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
557; SSE2-NEXT:    retq
558;
559; SSSE3-LABEL: trunc2x2i64_4i32:
560; SSSE3:       # BB#0: # %entry
561; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
562; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
563; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
564; SSSE3-NEXT:    retq
565;
566; SSE41-LABEL: trunc2x2i64_4i32:
567; SSE41:       # BB#0: # %entry
568; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
569; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
570; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
571; SSE41-NEXT:    retq
572;
573; AVX1-LABEL: trunc2x2i64_4i32:
574; AVX1:       # BB#0: # %entry
575; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
576; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
577; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
578; AVX1-NEXT:    retq
579;
580; AVX2-LABEL: trunc2x2i64_4i32:
581; AVX2:       # BB#0: # %entry
582; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
583; AVX2-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
584; AVX2-NEXT:    vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
585; AVX2-NEXT:    retq
586;
587; AVX512BW-LABEL: trunc2x2i64_4i32:
588; AVX512BW:       # BB#0: # %entry
589; AVX512BW-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2]
590; AVX512BW-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
591; AVX512BW-NEXT:    vpblendd {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3]
592; AVX512BW-NEXT:    retq
593entry:
594  %0 = trunc <2 x i64> %a to <2 x i32>
595  %1 = trunc <2 x i64> %b to <2 x i32>
596  %2 = shufflevector <2 x i32> %0, <2 x i32> %1, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
597  ret <4 x i32> %2
598}
599
600define i64 @trunc2i64_i64(<2 x i64> %inval) {
601; SSE-LABEL: trunc2i64_i64:
602; SSE:       # BB#0: # %entry
603; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
604; SSE-NEXT:    movd %xmm0, %rax
605; SSE-NEXT:    retq
606;
607; AVX-LABEL: trunc2i64_i64:
608; AVX:       # BB#0: # %entry
609; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
610; AVX-NEXT:    vmovq %xmm0, %rax
611; AVX-NEXT:    retq
612;
613; AVX512BW-LABEL: trunc2i64_i64:
614; AVX512BW:       # BB#0: # %entry
615; AVX512BW-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
616; AVX512BW-NEXT:    vmovq %xmm0, %rax
617; AVX512BW-NEXT:    retq
618entry:
619  %0 = trunc <2 x i64> %inval to <2 x i32>
620  %1 = bitcast <2 x i32> %0 to i64
621  ret i64 %1
622}
623
624define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) {
625; SSE2-LABEL: trunc2x4i32_8i16:
626; SSE2:       # BB#0: # %entry
627; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7]
628; SSE2-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7]
629; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3]
630; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
631; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
632; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
633; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
634; SSE2-NEXT:    retq
635;
636; SSSE3-LABEL: trunc2x4i32_8i16:
637; SSSE3:       # BB#0: # %entry
638; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
639; SSSE3-NEXT:    pshufb %xmm2, %xmm1
640; SSSE3-NEXT:    pshufb %xmm2, %xmm0
641; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
642; SSSE3-NEXT:    retq
643;
644; SSE41-LABEL: trunc2x4i32_8i16:
645; SSE41:       # BB#0: # %entry
646; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
647; SSE41-NEXT:    pshufb %xmm2, %xmm1
648; SSE41-NEXT:    pshufb %xmm2, %xmm0
649; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
650; SSE41-NEXT:    retq
651;
652; AVX-LABEL: trunc2x4i32_8i16:
653; AVX:       # BB#0: # %entry
654; AVX-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
655; AVX-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
656; AVX-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
657; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
658; AVX-NEXT:    retq
659;
660; AVX512BW-LABEL: trunc2x4i32_8i16:
661; AVX512BW:       # BB#0: # %entry
662; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
663; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
664; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
665; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
666; AVX512BW-NEXT:    retq
667entry:
668  %0 = trunc <4 x i32> %a to <4 x i16>
669  %1 = trunc <4 x i32> %b to <4 x i16>
670  %2 = shufflevector <4 x i16> %0, <4 x i16> %1, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
671  ret <8 x i16> %2
672}
673
674; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
675define i64 @trunc4i32_i64(<4 x i32> %inval) {
676; SSE2-LABEL: trunc4i32_i64:
677; SSE2:       # BB#0: # %entry
678; SSE2-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
679; SSE2-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7]
680; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
681; SSE2-NEXT:    movd %xmm0, %rax
682; SSE2-NEXT:    retq
683;
684; SSSE3-LABEL: trunc4i32_i64:
685; SSSE3:       # BB#0: # %entry
686; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
687; SSSE3-NEXT:    movd %xmm0, %rax
688; SSSE3-NEXT:    retq
689;
690; SSE41-LABEL: trunc4i32_i64:
691; SSE41:       # BB#0: # %entry
692; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
693; SSE41-NEXT:    movd %xmm0, %rax
694; SSE41-NEXT:    retq
695;
696; AVX-LABEL: trunc4i32_i64:
697; AVX:       # BB#0: # %entry
698; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
699; AVX-NEXT:    vmovq %xmm0, %rax
700; AVX-NEXT:    retq
701;
702; AVX512BW-LABEL: trunc4i32_i64:
703; AVX512BW:       # BB#0: # %entry
704; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
705; AVX512BW-NEXT:    vmovq %xmm0, %rax
706; AVX512BW-NEXT:    retq
707entry:
708  %0 = trunc <4 x i32> %inval to <4 x i16>
709  %1 = bitcast <4 x i16> %0 to i64
710  ret i64 %1
711}
712
713define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) {
714; SSE2-LABEL: trunc2x8i16_16i8:
715; SSE2:       # BB#0: # %entry
716; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255]
717; SSE2-NEXT:    pand %xmm2, %xmm1
718; SSE2-NEXT:    pand %xmm2, %xmm0
719; SSE2-NEXT:    packuswb %xmm1, %xmm0
720; SSE2-NEXT:    retq
721;
722; SSSE3-LABEL: trunc2x8i16_16i8:
723; SSSE3:       # BB#0: # %entry
724; SSSE3-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
725; SSSE3-NEXT:    pshufb %xmm2, %xmm1
726; SSSE3-NEXT:    pshufb %xmm2, %xmm0
727; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
728; SSSE3-NEXT:    retq
729;
730; SSE41-LABEL: trunc2x8i16_16i8:
731; SSE41:       # BB#0: # %entry
732; SSE41-NEXT:    movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
733; SSE41-NEXT:    pshufb %xmm2, %xmm1
734; SSE41-NEXT:    pshufb %xmm2, %xmm0
735; SSE41-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
736; SSE41-NEXT:    retq
737;
738; AVX-LABEL: trunc2x8i16_16i8:
739; AVX:       # BB#0: # %entry
740; AVX-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
741; AVX-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
742; AVX-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
743; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
744; AVX-NEXT:    retq
745;
746; AVX512BW-LABEL: trunc2x8i16_16i8:
747; AVX512BW:       # BB#0: # %entry
748; AVX512BW-NEXT:    vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u>
749; AVX512BW-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
750; AVX512BW-NEXT:    vpshufb %xmm2, %xmm0, %xmm0
751; AVX512BW-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
752; AVX512BW-NEXT:    retq
753entry:
754  %0 = trunc <8 x i16> %a to <8 x i8>
755  %1 = trunc <8 x i16> %b to <8 x i8>
756  %2 = shufflevector <8 x i8> %0, <8 x i8> %1, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
757  ret <16 x i8> %2
758}
759
760; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524
761define i64 @trunc8i16_i64(<8 x i16> %inval) {
762; SSE2-LABEL: trunc8i16_i64:
763; SSE2:       # BB#0: # %entry
764; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
765; SSE2-NEXT:    packuswb %xmm0, %xmm0
766; SSE2-NEXT:    movd %xmm0, %rax
767; SSE2-NEXT:    retq
768;
769; SSSE3-LABEL: trunc8i16_i64:
770; SSSE3:       # BB#0: # %entry
771; SSSE3-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
772; SSSE3-NEXT:    movd %xmm0, %rax
773; SSSE3-NEXT:    retq
774;
775; SSE41-LABEL: trunc8i16_i64:
776; SSE41:       # BB#0: # %entry
777; SSE41-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
778; SSE41-NEXT:    movd %xmm0, %rax
779; SSE41-NEXT:    retq
780;
781; AVX-LABEL: trunc8i16_i64:
782; AVX:       # BB#0: # %entry
783; AVX-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
784; AVX-NEXT:    vmovq %xmm0, %rax
785; AVX-NEXT:    retq
786;
787; AVX512BW-LABEL: trunc8i16_i64:
788; AVX512BW:       # BB#0: # %entry
789; AVX512BW-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u]
790; AVX512BW-NEXT:    vmovq %xmm0, %rax
791; AVX512BW-NEXT:    retq
792entry:
793  %0 = trunc <8 x i16> %inval to <8 x i8>
794  %1 = bitcast <8 x i8> %0 to i64
795  ret i64 %1
796}
797
798define <16 x i8> @trunc16i64_16i8_const() {
799; SSE-LABEL: trunc16i64_16i8_const:
800; SSE:       # BB#0: # %entry
801; SSE-NEXT:    xorps %xmm0, %xmm0
802; SSE-NEXT:    retq
803;
804; AVX-LABEL: trunc16i64_16i8_const:
805; AVX:       # BB#0: # %entry
806; AVX-NEXT:    vxorps %xmm0, %xmm0, %xmm0
807; AVX-NEXT:    retq
808;
809; AVX512BW-LABEL: trunc16i64_16i8_const:
810; AVX512BW:       # BB#0: # %entry
811; AVX512BW-NEXT:    vxorps %xmm0, %xmm0, %xmm0
812; AVX512BW-NEXT:    retq
813
814entry:
815  %0 = trunc <16 x i64> zeroinitializer to <16 x i8>
816  %1 = shufflevector <16 x i8> %0, <16 x i8> %0, <16 x i32> <i32 28, i32 30, i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 undef, i32 14, i32 16, i32 18, i32 20, i32 22, i32 24, i32 26>
817  ret <16 x i8> %1
818}
819