1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW 7 8; 9; add 10; 11 12define <4 x i32> @trunc_add_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 13; SSE-LABEL: trunc_add_v4i64_4i32: 14; SSE: # BB#0: 15; SSE-NEXT: paddq %xmm2, %xmm0 16; SSE-NEXT: paddq %xmm3, %xmm1 17; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 18; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 19; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 20; SSE-NEXT: retq 21; 22; AVX1-LABEL: trunc_add_v4i64_4i32: 23; AVX1: # BB#0: 24; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm2 25; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 26; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 27; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0 28; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 29; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[0,2,2,3] 30; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 31; AVX1-NEXT: vzeroupper 32; AVX1-NEXT: retq 33; 34; AVX2-LABEL: trunc_add_v4i64_4i32: 35; AVX2: # BB#0: 36; AVX2-NEXT: vpaddq %ymm1, %ymm0, %ymm0 37; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 38; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 39; AVX2-NEXT: vzeroupper 40; AVX2-NEXT: retq 41; 42; AVX512-LABEL: trunc_add_v4i64_4i32: 43; AVX512: # BB#0: 44; AVX512-NEXT: vpaddq %ymm1, %ymm0, %ymm0 45; AVX512-NEXT: vpmovqd %zmm0, %ymm0 46; AVX512-NEXT: retq 47 %1 = add <4 x i64> %a0, %a1 48 %2 = trunc <4 x i64> %1 to <4 x i32> 49 ret <4 x i32> %2 50} 51 52define <8 x i16> @trunc_add_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 53; SSE-LABEL: trunc_add_v8i64_8i16: 54; SSE: # BB#0: 55; SSE-NEXT: paddq %xmm6, %xmm2 56; SSE-NEXT: paddq %xmm4, %xmm0 57; SSE-NEXT: paddq %xmm7, %xmm3 58; SSE-NEXT: paddq %xmm5, %xmm1 59; SSE-NEXT: pextrw $4, %xmm1, %eax 60; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 61; SSE-NEXT: pextrw $4, %xmm0, %ecx 62; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 63; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 64; SSE-NEXT: pextrw $4, %xmm3, %edx 65; SSE-NEXT: movd %edx, %xmm1 66; SSE-NEXT: movd %eax, %xmm3 67; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 68; SSE-NEXT: pextrw $4, %xmm2, %eax 69; SSE-NEXT: movd %eax, %xmm1 70; SSE-NEXT: movd %ecx, %xmm2 71; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 72; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] 73; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 74; SSE-NEXT: retq 75; 76; AVX1-LABEL: trunc_add_v8i64_8i16: 77; AVX1: # BB#0: 78; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm4 79; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 80; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 81; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0 82; AVX1-NEXT: vpaddq %xmm3, %xmm1, %xmm2 83; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 84; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 85; AVX1-NEXT: vpaddq %xmm3, %xmm1, %xmm1 86; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 87; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 88; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 89; AVX1-NEXT: vpackusdw %xmm1, %xmm2, %xmm1 90; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 91; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1,2,3],xmm4[4],xmm3[5,6,7] 92; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 93; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 94; AVX1-NEXT: vzeroupper 95; AVX1-NEXT: retq 96; 97; AVX2-LABEL: trunc_add_v8i64_8i16: 98; AVX2: # BB#0: 99; AVX2-NEXT: vpaddq %ymm3, %ymm1, %ymm1 100; AVX2-NEXT: vpaddq %ymm2, %ymm0, %ymm0 101; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 102; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 103; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 104; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 105; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 106; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 107; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 108; AVX2-NEXT: vzeroupper 109; AVX2-NEXT: retq 110; 111; AVX512-LABEL: trunc_add_v8i64_8i16: 112; AVX512: # BB#0: 113; AVX512-NEXT: vpaddq %zmm1, %zmm0, %zmm0 114; AVX512-NEXT: vpmovqw %zmm0, %xmm0 115; AVX512-NEXT: retq 116 %1 = add <8 x i64> %a0, %a1 117 %2 = trunc <8 x i64> %1 to <8 x i16> 118 ret <8 x i16> %2 119} 120 121define <8 x i16> @trunc_add_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 122; SSE-LABEL: trunc_add_v8i32_8i16: 123; SSE: # BB#0: 124; SSE-NEXT: paddd %xmm2, %xmm0 125; SSE-NEXT: paddd %xmm3, %xmm1 126; SSE-NEXT: pslld $16, %xmm1 127; SSE-NEXT: psrad $16, %xmm1 128; SSE-NEXT: pslld $16, %xmm0 129; SSE-NEXT: psrad $16, %xmm0 130; SSE-NEXT: packssdw %xmm1, %xmm0 131; SSE-NEXT: retq 132; 133; AVX1-LABEL: trunc_add_v8i32_8i16: 134; AVX1: # BB#0: 135; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm2 136; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 137; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 138; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0 139; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 140; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 141; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 142; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 143; AVX1-NEXT: vzeroupper 144; AVX1-NEXT: retq 145; 146; AVX2-LABEL: trunc_add_v8i32_8i16: 147; AVX2: # BB#0: 148; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm0 149; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 150; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 151; AVX2-NEXT: vzeroupper 152; AVX2-NEXT: retq 153; 154; AVX512-LABEL: trunc_add_v8i32_8i16: 155; AVX512: # BB#0: 156; AVX512-NEXT: vpaddd %ymm1, %ymm0, %ymm0 157; AVX512-NEXT: vpmovdw %zmm0, %ymm0 158; AVX512-NEXT: retq 159 %1 = add <8 x i32> %a0, %a1 160 %2 = trunc <8 x i32> %1 to <8 x i16> 161 ret <8 x i16> %2 162} 163 164define <16 x i8> @trunc_add_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 165; SSE-LABEL: trunc_add_v16i64_v16i8: 166; SSE: # BB#0: 167; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm0 168; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm1 169; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm2 170; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm3 171; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm4 172; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm5 173; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm6 174; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm7 175; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 176; SSE-NEXT: pand %xmm8, %xmm7 177; SSE-NEXT: pand %xmm8, %xmm6 178; SSE-NEXT: packuswb %xmm7, %xmm6 179; SSE-NEXT: pand %xmm8, %xmm5 180; SSE-NEXT: pand %xmm8, %xmm4 181; SSE-NEXT: packuswb %xmm5, %xmm4 182; SSE-NEXT: packuswb %xmm6, %xmm4 183; SSE-NEXT: pand %xmm8, %xmm3 184; SSE-NEXT: pand %xmm8, %xmm2 185; SSE-NEXT: packuswb %xmm3, %xmm2 186; SSE-NEXT: pand %xmm8, %xmm1 187; SSE-NEXT: pand %xmm8, %xmm0 188; SSE-NEXT: packuswb %xmm1, %xmm0 189; SSE-NEXT: packuswb %xmm2, %xmm0 190; SSE-NEXT: packuswb %xmm4, %xmm0 191; SSE-NEXT: retq 192; 193; AVX1-LABEL: trunc_add_v16i64_v16i8: 194; AVX1: # BB#0: 195; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm8 196; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm4 197; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 198; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm0 199; AVX1-NEXT: vpaddq %xmm5, %xmm1, %xmm4 200; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm5 201; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 202; AVX1-NEXT: vpaddq %xmm5, %xmm1, %xmm1 203; AVX1-NEXT: vpaddq %xmm6, %xmm2, %xmm5 204; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm6 205; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 206; AVX1-NEXT: vpaddq %xmm6, %xmm2, %xmm2 207; AVX1-NEXT: vpaddq %xmm7, %xmm3, %xmm6 208; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm7 209; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 210; AVX1-NEXT: vpaddq %xmm7, %xmm3, %xmm3 211; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 212; AVX1-NEXT: vpand %xmm7, %xmm3, %xmm3 213; AVX1-NEXT: vpand %xmm7, %xmm6, %xmm6 214; AVX1-NEXT: vpackuswb %xmm3, %xmm6, %xmm3 215; AVX1-NEXT: vpand %xmm7, %xmm2, %xmm2 216; AVX1-NEXT: vpand %xmm7, %xmm5, %xmm5 217; AVX1-NEXT: vpackuswb %xmm2, %xmm5, %xmm2 218; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 219; AVX1-NEXT: vpand %xmm7, %xmm1, %xmm1 220; AVX1-NEXT: vpand %xmm7, %xmm4, %xmm3 221; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 222; AVX1-NEXT: vpand %xmm7, %xmm0, %xmm0 223; AVX1-NEXT: vpand %xmm7, %xmm8, %xmm3 224; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 225; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 226; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 227; AVX1-NEXT: vzeroupper 228; AVX1-NEXT: retq 229; 230; AVX2-LABEL: trunc_add_v16i64_v16i8: 231; AVX2: # BB#0: 232; AVX2-NEXT: vpaddq %ymm5, %ymm1, %ymm1 233; AVX2-NEXT: vpaddq %ymm4, %ymm0, %ymm0 234; AVX2-NEXT: vpaddq %ymm7, %ymm3, %ymm3 235; AVX2-NEXT: vpaddq %ymm6, %ymm2, %ymm2 236; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 237; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 238; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 239; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 240; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 241; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 242; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 243; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 244; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 245; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 246; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 247; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 248; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 249; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 250; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 251; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 252; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 253; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 254; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 255; AVX2-NEXT: vzeroupper 256; AVX2-NEXT: retq 257; 258; AVX512-LABEL: trunc_add_v16i64_v16i8: 259; AVX512: # BB#0: 260; AVX512-NEXT: vpaddq %zmm3, %zmm1, %zmm1 261; AVX512-NEXT: vpaddq %zmm2, %zmm0, %zmm0 262; AVX512-NEXT: vpmovqd %zmm0, %ymm0 263; AVX512-NEXT: vpmovqd %zmm1, %ymm1 264; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 265; AVX512-NEXT: vpmovdb %zmm0, %xmm0 266; AVX512-NEXT: retq 267 %1 = add <16 x i64> %a0, %a1 268 %2 = trunc <16 x i64> %1 to <16 x i8> 269 ret <16 x i8> %2 270} 271 272define <16 x i8> @trunc_add_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 273; SSE-LABEL: trunc_add_v16i32_v16i8: 274; SSE: # BB#0: 275; SSE-NEXT: paddd %xmm4, %xmm0 276; SSE-NEXT: paddd %xmm5, %xmm1 277; SSE-NEXT: paddd %xmm6, %xmm2 278; SSE-NEXT: paddd %xmm7, %xmm3 279; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 280; SSE-NEXT: pand %xmm4, %xmm3 281; SSE-NEXT: pand %xmm4, %xmm2 282; SSE-NEXT: packuswb %xmm3, %xmm2 283; SSE-NEXT: pand %xmm4, %xmm1 284; SSE-NEXT: pand %xmm4, %xmm0 285; SSE-NEXT: packuswb %xmm1, %xmm0 286; SSE-NEXT: packuswb %xmm2, %xmm0 287; SSE-NEXT: retq 288; 289; AVX1-LABEL: trunc_add_v16i32_v16i8: 290; AVX1: # BB#0: 291; AVX1-NEXT: vpaddd %xmm2, %xmm0, %xmm4 292; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 293; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 294; AVX1-NEXT: vpaddd %xmm2, %xmm0, %xmm0 295; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm2 296; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 297; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 298; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1 299; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 300; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 301; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 302; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 303; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 304; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm2 305; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 306; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 307; AVX1-NEXT: vzeroupper 308; AVX1-NEXT: retq 309; 310; AVX2-LABEL: trunc_add_v16i32_v16i8: 311; AVX2: # BB#0: 312; AVX2-NEXT: vpaddd %ymm2, %ymm0, %ymm0 313; AVX2-NEXT: vpaddd %ymm3, %ymm1, %ymm1 314; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 315; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 316; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 317; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 318; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 319; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 320; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 321; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 322; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 323; AVX2-NEXT: vzeroupper 324; AVX2-NEXT: retq 325; 326; AVX512-LABEL: trunc_add_v16i32_v16i8: 327; AVX512: # BB#0: 328; AVX512-NEXT: vpaddd %zmm1, %zmm0, %zmm0 329; AVX512-NEXT: vpmovdb %zmm0, %xmm0 330; AVX512-NEXT: retq 331 %1 = add <16 x i32> %a0, %a1 332 %2 = trunc <16 x i32> %1 to <16 x i8> 333 ret <16 x i8> %2 334} 335 336define <16 x i8> @trunc_add_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 337; SSE-LABEL: trunc_add_v16i16_v16i8: 338; SSE: # BB#0: 339; SSE-NEXT: paddw %xmm2, %xmm0 340; SSE-NEXT: paddw %xmm3, %xmm1 341; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 342; SSE-NEXT: pand %xmm2, %xmm1 343; SSE-NEXT: pand %xmm2, %xmm0 344; SSE-NEXT: packuswb %xmm1, %xmm0 345; SSE-NEXT: retq 346; 347; AVX1-LABEL: trunc_add_v16i16_v16i8: 348; AVX1: # BB#0: 349; AVX1-NEXT: vpaddw %xmm1, %xmm0, %xmm2 350; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 351; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 352; AVX1-NEXT: vpaddw %xmm1, %xmm0, %xmm0 353; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 354; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 355; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 356; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 357; AVX1-NEXT: vzeroupper 358; AVX1-NEXT: retq 359; 360; AVX2-LABEL: trunc_add_v16i16_v16i8: 361; AVX2: # BB#0: 362; AVX2-NEXT: vpaddw %ymm1, %ymm0, %ymm0 363; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 364; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 365; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 366; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 367; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 368; AVX2-NEXT: vzeroupper 369; AVX2-NEXT: retq 370; 371; AVX512F-LABEL: trunc_add_v16i16_v16i8: 372; AVX512F: # BB#0: 373; AVX512F-NEXT: vpaddw %ymm1, %ymm0, %ymm0 374; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 375; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 376; AVX512F-NEXT: retq 377; 378; AVX512BW-LABEL: trunc_add_v16i16_v16i8: 379; AVX512BW: # BB#0: 380; AVX512BW-NEXT: vpaddw %ymm1, %ymm0, %ymm0 381; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 382; AVX512BW-NEXT: retq 383 %1 = add <16 x i16> %a0, %a1 384 %2 = trunc <16 x i16> %1 to <16 x i8> 385 ret <16 x i8> %2 386} 387 388; 389; add to constant 390; 391 392define <4 x i32> @trunc_add_const_v4i64_4i32(<4 x i64> %a0) nounwind { 393; SSE-LABEL: trunc_add_const_v4i64_4i32: 394; SSE: # BB#0: 395; SSE-NEXT: movl $1, %eax 396; SSE-NEXT: movd %rax, %xmm2 397; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 398; SSE-NEXT: paddq %xmm0, %xmm2 399; SSE-NEXT: paddq {{.*}}(%rip), %xmm1 400; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 401; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 402; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 403; SSE-NEXT: retq 404; 405; AVX1-LABEL: trunc_add_const_v4i64_4i32: 406; AVX1: # BB#0: 407; AVX1-NEXT: movl $1, %eax 408; AVX1-NEXT: vmovq %rax, %xmm1 409; AVX1-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] 410; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm1 411; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 412; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0 413; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 414; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 415; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 416; AVX1-NEXT: vzeroupper 417; AVX1-NEXT: retq 418; 419; AVX2-LABEL: trunc_add_const_v4i64_4i32: 420; AVX2: # BB#0: 421; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 422; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 423; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 424; AVX2-NEXT: vzeroupper 425; AVX2-NEXT: retq 426; 427; AVX512-LABEL: trunc_add_const_v4i64_4i32: 428; AVX512: # BB#0: 429; AVX512-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 430; AVX512-NEXT: vpmovqd %zmm0, %ymm0 431; AVX512-NEXT: retq 432 %1 = add <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 433 %2 = trunc <4 x i64> %1 to <4 x i32> 434 ret <4 x i32> %2 435} 436 437define <8 x i16> @trunc_add_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 438; SSE-LABEL: trunc_add_const_v16i64_v16i16: 439; SSE: # BB#0: 440; SSE-NEXT: movdqa %xmm0, %xmm4 441; SSE-NEXT: movl $1, %eax 442; SSE-NEXT: movd %rax, %xmm0 443; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7] 444; SSE-NEXT: paddq %xmm4, %xmm0 445; SSE-NEXT: paddq {{.*}}(%rip), %xmm2 446; SSE-NEXT: paddq {{.*}}(%rip), %xmm3 447; SSE-NEXT: paddq {{.*}}(%rip), %xmm1 448; SSE-NEXT: pextrw $4, %xmm1, %eax 449; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 450; SSE-NEXT: pextrw $4, %xmm0, %ecx 451; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 452; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 453; SSE-NEXT: pextrw $4, %xmm3, %edx 454; SSE-NEXT: movd %edx, %xmm1 455; SSE-NEXT: movd %eax, %xmm3 456; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 457; SSE-NEXT: movd %ecx, %xmm1 458; SSE-NEXT: pextrw $4, %xmm2, %eax 459; SSE-NEXT: movd %eax, %xmm2 460; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 461; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 462; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 463; SSE-NEXT: retq 464; 465; AVX1-LABEL: trunc_add_const_v16i64_v16i16: 466; AVX1: # BB#0: 467; AVX1-NEXT: movl $1, %eax 468; AVX1-NEXT: vmovq %rax, %xmm2 469; AVX1-NEXT: vpslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 470; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm2 471; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 472; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0 473; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm3 474; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 475; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm1 476; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 477; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 478; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 479; AVX1-NEXT: vpackusdw %xmm1, %xmm3, %xmm1 480; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 481; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 482; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 483; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 484; AVX1-NEXT: vzeroupper 485; AVX1-NEXT: retq 486; 487; AVX2-LABEL: trunc_add_const_v16i64_v16i16: 488; AVX2: # BB#0: 489; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm1, %ymm1 490; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 491; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 492; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 493; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 494; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 495; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 496; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 497; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 498; AVX2-NEXT: vzeroupper 499; AVX2-NEXT: retq 500; 501; AVX512-LABEL: trunc_add_const_v16i64_v16i16: 502; AVX512: # BB#0: 503; AVX512-NEXT: vpaddq {{.*}}(%rip), %zmm0, %zmm0 504; AVX512-NEXT: vpmovqw %zmm0, %xmm0 505; AVX512-NEXT: retq 506 %1 = add <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 507 %2 = trunc <8 x i64> %1 to <8 x i16> 508 ret <8 x i16> %2 509} 510 511define <8 x i16> @trunc_add_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 512; SSE-LABEL: trunc_add_const_v16i32_v16i16: 513; SSE: # BB#0: 514; SSE-NEXT: paddd {{.*}}(%rip), %xmm0 515; SSE-NEXT: paddd {{.*}}(%rip), %xmm1 516; SSE-NEXT: pslld $16, %xmm1 517; SSE-NEXT: psrad $16, %xmm1 518; SSE-NEXT: pslld $16, %xmm0 519; SSE-NEXT: psrad $16, %xmm0 520; SSE-NEXT: packssdw %xmm1, %xmm0 521; SSE-NEXT: retq 522; 523; AVX1-LABEL: trunc_add_const_v16i32_v16i16: 524; AVX1: # BB#0: 525; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm1 526; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 527; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0 528; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 529; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 530; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 531; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 532; AVX1-NEXT: vzeroupper 533; AVX1-NEXT: retq 534; 535; AVX2-LABEL: trunc_add_const_v16i32_v16i16: 536; AVX2: # BB#0: 537; AVX2-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0 538; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 539; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 540; AVX2-NEXT: vzeroupper 541; AVX2-NEXT: retq 542; 543; AVX512-LABEL: trunc_add_const_v16i32_v16i16: 544; AVX512: # BB#0: 545; AVX512-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0 546; AVX512-NEXT: vpmovdw %zmm0, %ymm0 547; AVX512-NEXT: retq 548 %1 = add <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 549 %2 = trunc <8 x i32> %1 to <8 x i16> 550 ret <8 x i16> %2 551} 552 553define <16 x i8> @trunc_add_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 554; SSE-LABEL: trunc_add_const_v16i64_v16i8: 555; SSE: # BB#0: 556; SSE-NEXT: movl $1, %eax 557; SSE-NEXT: movd %rax, %xmm8 558; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 559; SSE-NEXT: paddq %xmm8, %xmm0 560; SSE-NEXT: paddq {{.*}}(%rip), %xmm1 561; SSE-NEXT: paddq {{.*}}(%rip), %xmm2 562; SSE-NEXT: paddq {{.*}}(%rip), %xmm3 563; SSE-NEXT: paddq {{.*}}(%rip), %xmm4 564; SSE-NEXT: paddq {{.*}}(%rip), %xmm5 565; SSE-NEXT: paddq {{.*}}(%rip), %xmm6 566; SSE-NEXT: paddq {{.*}}(%rip), %xmm7 567; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 568; SSE-NEXT: pand %xmm8, %xmm7 569; SSE-NEXT: pand %xmm8, %xmm6 570; SSE-NEXT: packuswb %xmm7, %xmm6 571; SSE-NEXT: pand %xmm8, %xmm5 572; SSE-NEXT: pand %xmm8, %xmm4 573; SSE-NEXT: packuswb %xmm5, %xmm4 574; SSE-NEXT: packuswb %xmm6, %xmm4 575; SSE-NEXT: pand %xmm8, %xmm3 576; SSE-NEXT: pand %xmm8, %xmm2 577; SSE-NEXT: packuswb %xmm3, %xmm2 578; SSE-NEXT: pand %xmm8, %xmm1 579; SSE-NEXT: pand %xmm8, %xmm0 580; SSE-NEXT: packuswb %xmm1, %xmm0 581; SSE-NEXT: packuswb %xmm2, %xmm0 582; SSE-NEXT: packuswb %xmm4, %xmm0 583; SSE-NEXT: retq 584; 585; AVX1-LABEL: trunc_add_const_v16i64_v16i8: 586; AVX1: # BB#0: 587; AVX1-NEXT: movl $1, %eax 588; AVX1-NEXT: vmovq %rax, %xmm4 589; AVX1-NEXT: vpslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 590; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm8 591; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 592; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0 593; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm5 594; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 595; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm1 596; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm2, %xmm6 597; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 598; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm2, %xmm2 599; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm3, %xmm7 600; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 601; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm3, %xmm3 602; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 603; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 604; AVX1-NEXT: vpand %xmm4, %xmm7, %xmm7 605; AVX1-NEXT: vpackuswb %xmm3, %xmm7, %xmm3 606; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 607; AVX1-NEXT: vpand %xmm4, %xmm6, %xmm6 608; AVX1-NEXT: vpackuswb %xmm2, %xmm6, %xmm2 609; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 610; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 611; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm3 612; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 613; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 614; AVX1-NEXT: vpand %xmm4, %xmm8, %xmm3 615; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 616; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 617; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 618; AVX1-NEXT: vzeroupper 619; AVX1-NEXT: retq 620; 621; AVX2-LABEL: trunc_add_const_v16i64_v16i8: 622; AVX2: # BB#0: 623; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm1, %ymm1 624; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 625; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm3, %ymm3 626; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm2, %ymm2 627; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 628; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 629; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 630; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 631; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 632; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 633; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 634; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 635; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 636; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 637; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 638; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 639; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 640; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 641; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 642; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 643; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 644; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 645; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 646; AVX2-NEXT: vzeroupper 647; AVX2-NEXT: retq 648; 649; AVX512-LABEL: trunc_add_const_v16i64_v16i8: 650; AVX512: # BB#0: 651; AVX512-NEXT: vpaddq {{.*}}(%rip), %zmm1, %zmm1 652; AVX512-NEXT: vpaddq {{.*}}(%rip), %zmm0, %zmm0 653; AVX512-NEXT: vpmovqd %zmm0, %ymm0 654; AVX512-NEXT: vpmovqd %zmm1, %ymm1 655; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 656; AVX512-NEXT: vpmovdb %zmm0, %xmm0 657; AVX512-NEXT: retq 658 %1 = add <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 659 %2 = trunc <16 x i64> %1 to <16 x i8> 660 ret <16 x i8> %2 661} 662 663define <16 x i8> @trunc_add_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 664; SSE-LABEL: trunc_add_const_v16i32_v16i8: 665; SSE: # BB#0: 666; SSE-NEXT: paddd {{.*}}(%rip), %xmm0 667; SSE-NEXT: paddd {{.*}}(%rip), %xmm1 668; SSE-NEXT: paddd {{.*}}(%rip), %xmm2 669; SSE-NEXT: paddd {{.*}}(%rip), %xmm3 670; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 671; SSE-NEXT: pand %xmm4, %xmm3 672; SSE-NEXT: pand %xmm4, %xmm2 673; SSE-NEXT: packuswb %xmm3, %xmm2 674; SSE-NEXT: pand %xmm4, %xmm1 675; SSE-NEXT: pand %xmm4, %xmm0 676; SSE-NEXT: packuswb %xmm1, %xmm0 677; SSE-NEXT: packuswb %xmm2, %xmm0 678; SSE-NEXT: retq 679; 680; AVX1-LABEL: trunc_add_const_v16i32_v16i8: 681; AVX1: # BB#0: 682; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm2 683; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 684; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0 685; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm3 686; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 687; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm1 688; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 689; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 690; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 691; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 692; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 693; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 694; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 695; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 696; AVX1-NEXT: vzeroupper 697; AVX1-NEXT: retq 698; 699; AVX2-LABEL: trunc_add_const_v16i32_v16i8: 700; AVX2: # BB#0: 701; AVX2-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0 702; AVX2-NEXT: vpaddd {{.*}}(%rip), %ymm1, %ymm1 703; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 704; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 705; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 706; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 707; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 708; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 709; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 710; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 711; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 712; AVX2-NEXT: vzeroupper 713; AVX2-NEXT: retq 714; 715; AVX512-LABEL: trunc_add_const_v16i32_v16i8: 716; AVX512: # BB#0: 717; AVX512-NEXT: vpaddd {{.*}}(%rip), %zmm0, %zmm0 718; AVX512-NEXT: vpmovdb %zmm0, %xmm0 719; AVX512-NEXT: retq 720 %1 = add <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 721 %2 = trunc <16 x i32> %1 to <16 x i8> 722 ret <16 x i8> %2 723} 724 725define <16 x i8> @trunc_add_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 726; SSE-LABEL: trunc_add_const_v16i16_v16i8: 727; SSE: # BB#0: 728; SSE-NEXT: paddw {{.*}}(%rip), %xmm0 729; SSE-NEXT: paddw {{.*}}(%rip), %xmm1 730; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 731; SSE-NEXT: pand %xmm2, %xmm1 732; SSE-NEXT: pand %xmm2, %xmm0 733; SSE-NEXT: packuswb %xmm1, %xmm0 734; SSE-NEXT: retq 735; 736; AVX1-LABEL: trunc_add_const_v16i16_v16i8: 737; AVX1: # BB#0: 738; AVX1-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm1 739; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 740; AVX1-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0 741; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 742; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 743; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 744; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 745; AVX1-NEXT: vzeroupper 746; AVX1-NEXT: retq 747; 748; AVX2-LABEL: trunc_add_const_v16i16_v16i8: 749; AVX2: # BB#0: 750; AVX2-NEXT: vpaddw {{.*}}(%rip), %ymm0, %ymm0 751; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 752; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 753; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 754; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 755; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 756; AVX2-NEXT: vzeroupper 757; AVX2-NEXT: retq 758; 759; AVX512F-LABEL: trunc_add_const_v16i16_v16i8: 760; AVX512F: # BB#0: 761; AVX512F-NEXT: vpaddw {{.*}}(%rip), %ymm0, %ymm0 762; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 763; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 764; AVX512F-NEXT: retq 765; 766; AVX512BW-LABEL: trunc_add_const_v16i16_v16i8: 767; AVX512BW: # BB#0: 768; AVX512BW-NEXT: vpaddw {{.*}}(%rip), %ymm0, %ymm0 769; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 770; AVX512BW-NEXT: retq 771 %1 = add <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 772 %2 = trunc <16 x i16> %1 to <16 x i8> 773 ret <16 x i8> %2 774} 775 776; 777; sub 778; 779 780define <4 x i32> @trunc_sub_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 781; SSE-LABEL: trunc_sub_v4i64_4i32: 782; SSE: # BB#0: 783; SSE-NEXT: psubq %xmm2, %xmm0 784; SSE-NEXT: psubq %xmm3, %xmm1 785; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 786; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 787; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 788; SSE-NEXT: retq 789; 790; AVX1-LABEL: trunc_sub_v4i64_4i32: 791; AVX1: # BB#0: 792; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm2 793; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 794; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 795; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0 796; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 797; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[0,2,2,3] 798; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 799; AVX1-NEXT: vzeroupper 800; AVX1-NEXT: retq 801; 802; AVX2-LABEL: trunc_sub_v4i64_4i32: 803; AVX2: # BB#0: 804; AVX2-NEXT: vpsubq %ymm1, %ymm0, %ymm0 805; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 806; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 807; AVX2-NEXT: vzeroupper 808; AVX2-NEXT: retq 809; 810; AVX512-LABEL: trunc_sub_v4i64_4i32: 811; AVX512: # BB#0: 812; AVX512-NEXT: vpsubq %ymm1, %ymm0, %ymm0 813; AVX512-NEXT: vpmovqd %zmm0, %ymm0 814; AVX512-NEXT: retq 815 %1 = sub <4 x i64> %a0, %a1 816 %2 = trunc <4 x i64> %1 to <4 x i32> 817 ret <4 x i32> %2 818} 819 820define <8 x i16> @trunc_sub_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 821; SSE-LABEL: trunc_sub_v8i64_8i16: 822; SSE: # BB#0: 823; SSE-NEXT: psubq %xmm6, %xmm2 824; SSE-NEXT: psubq %xmm4, %xmm0 825; SSE-NEXT: psubq %xmm7, %xmm3 826; SSE-NEXT: psubq %xmm5, %xmm1 827; SSE-NEXT: pextrw $4, %xmm1, %eax 828; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 829; SSE-NEXT: pextrw $4, %xmm0, %ecx 830; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 831; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 832; SSE-NEXT: pextrw $4, %xmm3, %edx 833; SSE-NEXT: movd %edx, %xmm1 834; SSE-NEXT: movd %eax, %xmm3 835; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 836; SSE-NEXT: pextrw $4, %xmm2, %eax 837; SSE-NEXT: movd %eax, %xmm1 838; SSE-NEXT: movd %ecx, %xmm2 839; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 840; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] 841; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 842; SSE-NEXT: retq 843; 844; AVX1-LABEL: trunc_sub_v8i64_8i16: 845; AVX1: # BB#0: 846; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm4 847; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 848; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 849; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm0 850; AVX1-NEXT: vpsubq %xmm3, %xmm1, %xmm2 851; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 852; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 853; AVX1-NEXT: vpsubq %xmm3, %xmm1, %xmm1 854; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 855; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 856; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 857; AVX1-NEXT: vpackusdw %xmm1, %xmm2, %xmm1 858; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 859; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1,2,3],xmm4[4],xmm3[5,6,7] 860; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 861; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 862; AVX1-NEXT: vzeroupper 863; AVX1-NEXT: retq 864; 865; AVX2-LABEL: trunc_sub_v8i64_8i16: 866; AVX2: # BB#0: 867; AVX2-NEXT: vpsubq %ymm3, %ymm1, %ymm1 868; AVX2-NEXT: vpsubq %ymm2, %ymm0, %ymm0 869; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 870; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 871; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 872; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 873; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 874; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 875; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 876; AVX2-NEXT: vzeroupper 877; AVX2-NEXT: retq 878; 879; AVX512-LABEL: trunc_sub_v8i64_8i16: 880; AVX512: # BB#0: 881; AVX512-NEXT: vpsubq %zmm1, %zmm0, %zmm0 882; AVX512-NEXT: vpmovqw %zmm0, %xmm0 883; AVX512-NEXT: retq 884 %1 = sub <8 x i64> %a0, %a1 885 %2 = trunc <8 x i64> %1 to <8 x i16> 886 ret <8 x i16> %2 887} 888 889define <8 x i16> @trunc_sub_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 890; SSE-LABEL: trunc_sub_v8i32_8i16: 891; SSE: # BB#0: 892; SSE-NEXT: psubd %xmm2, %xmm0 893; SSE-NEXT: psubd %xmm3, %xmm1 894; SSE-NEXT: pslld $16, %xmm1 895; SSE-NEXT: psrad $16, %xmm1 896; SSE-NEXT: pslld $16, %xmm0 897; SSE-NEXT: psrad $16, %xmm0 898; SSE-NEXT: packssdw %xmm1, %xmm0 899; SSE-NEXT: retq 900; 901; AVX1-LABEL: trunc_sub_v8i32_8i16: 902; AVX1: # BB#0: 903; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm2 904; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 905; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 906; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm0 907; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 908; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 909; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 910; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 911; AVX1-NEXT: vzeroupper 912; AVX1-NEXT: retq 913; 914; AVX2-LABEL: trunc_sub_v8i32_8i16: 915; AVX2: # BB#0: 916; AVX2-NEXT: vpsubd %ymm1, %ymm0, %ymm0 917; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 918; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 919; AVX2-NEXT: vzeroupper 920; AVX2-NEXT: retq 921; 922; AVX512-LABEL: trunc_sub_v8i32_8i16: 923; AVX512: # BB#0: 924; AVX512-NEXT: vpsubd %ymm1, %ymm0, %ymm0 925; AVX512-NEXT: vpmovdw %zmm0, %ymm0 926; AVX512-NEXT: retq 927 %1 = sub <8 x i32> %a0, %a1 928 %2 = trunc <8 x i32> %1 to <8 x i16> 929 ret <8 x i16> %2 930} 931 932define <16 x i8> @trunc_sub_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 933; SSE-LABEL: trunc_sub_v16i64_v16i8: 934; SSE: # BB#0: 935; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm0 936; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm1 937; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm2 938; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm3 939; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm4 940; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm5 941; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm6 942; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm7 943; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 944; SSE-NEXT: pand %xmm8, %xmm7 945; SSE-NEXT: pand %xmm8, %xmm6 946; SSE-NEXT: packuswb %xmm7, %xmm6 947; SSE-NEXT: pand %xmm8, %xmm5 948; SSE-NEXT: pand %xmm8, %xmm4 949; SSE-NEXT: packuswb %xmm5, %xmm4 950; SSE-NEXT: packuswb %xmm6, %xmm4 951; SSE-NEXT: pand %xmm8, %xmm3 952; SSE-NEXT: pand %xmm8, %xmm2 953; SSE-NEXT: packuswb %xmm3, %xmm2 954; SSE-NEXT: pand %xmm8, %xmm1 955; SSE-NEXT: pand %xmm8, %xmm0 956; SSE-NEXT: packuswb %xmm1, %xmm0 957; SSE-NEXT: packuswb %xmm2, %xmm0 958; SSE-NEXT: packuswb %xmm4, %xmm0 959; SSE-NEXT: retq 960; 961; AVX1-LABEL: trunc_sub_v16i64_v16i8: 962; AVX1: # BB#0: 963; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm8 964; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm4 965; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 966; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm0 967; AVX1-NEXT: vpsubq %xmm5, %xmm1, %xmm4 968; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm5 969; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 970; AVX1-NEXT: vpsubq %xmm5, %xmm1, %xmm1 971; AVX1-NEXT: vpsubq %xmm6, %xmm2, %xmm5 972; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm6 973; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 974; AVX1-NEXT: vpsubq %xmm6, %xmm2, %xmm2 975; AVX1-NEXT: vpsubq %xmm7, %xmm3, %xmm6 976; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm7 977; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 978; AVX1-NEXT: vpsubq %xmm7, %xmm3, %xmm3 979; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 980; AVX1-NEXT: vpand %xmm7, %xmm3, %xmm3 981; AVX1-NEXT: vpand %xmm7, %xmm6, %xmm6 982; AVX1-NEXT: vpackuswb %xmm3, %xmm6, %xmm3 983; AVX1-NEXT: vpand %xmm7, %xmm2, %xmm2 984; AVX1-NEXT: vpand %xmm7, %xmm5, %xmm5 985; AVX1-NEXT: vpackuswb %xmm2, %xmm5, %xmm2 986; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 987; AVX1-NEXT: vpand %xmm7, %xmm1, %xmm1 988; AVX1-NEXT: vpand %xmm7, %xmm4, %xmm3 989; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 990; AVX1-NEXT: vpand %xmm7, %xmm0, %xmm0 991; AVX1-NEXT: vpand %xmm7, %xmm8, %xmm3 992; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 993; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 994; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 995; AVX1-NEXT: vzeroupper 996; AVX1-NEXT: retq 997; 998; AVX2-LABEL: trunc_sub_v16i64_v16i8: 999; AVX2: # BB#0: 1000; AVX2-NEXT: vpsubq %ymm5, %ymm1, %ymm1 1001; AVX2-NEXT: vpsubq %ymm4, %ymm0, %ymm0 1002; AVX2-NEXT: vpsubq %ymm7, %ymm3, %ymm3 1003; AVX2-NEXT: vpsubq %ymm6, %ymm2, %ymm2 1004; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 1005; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 1006; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 1007; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 1008; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 1009; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 1010; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 1011; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1012; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1013; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 1014; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 1015; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 1016; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 1017; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 1018; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1019; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 1020; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1021; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 1022; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 1023; AVX2-NEXT: vzeroupper 1024; AVX2-NEXT: retq 1025; 1026; AVX512-LABEL: trunc_sub_v16i64_v16i8: 1027; AVX512: # BB#0: 1028; AVX512-NEXT: vpsubq %zmm3, %zmm1, %zmm1 1029; AVX512-NEXT: vpsubq %zmm2, %zmm0, %zmm0 1030; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1031; AVX512-NEXT: vpmovqd %zmm1, %ymm1 1032; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 1033; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1034; AVX512-NEXT: retq 1035 %1 = sub <16 x i64> %a0, %a1 1036 %2 = trunc <16 x i64> %1 to <16 x i8> 1037 ret <16 x i8> %2 1038} 1039 1040define <16 x i8> @trunc_sub_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 1041; SSE-LABEL: trunc_sub_v16i32_v16i8: 1042; SSE: # BB#0: 1043; SSE-NEXT: psubd %xmm4, %xmm0 1044; SSE-NEXT: psubd %xmm5, %xmm1 1045; SSE-NEXT: psubd %xmm6, %xmm2 1046; SSE-NEXT: psubd %xmm7, %xmm3 1047; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1048; SSE-NEXT: pand %xmm4, %xmm3 1049; SSE-NEXT: pand %xmm4, %xmm2 1050; SSE-NEXT: packuswb %xmm3, %xmm2 1051; SSE-NEXT: pand %xmm4, %xmm1 1052; SSE-NEXT: pand %xmm4, %xmm0 1053; SSE-NEXT: packuswb %xmm1, %xmm0 1054; SSE-NEXT: packuswb %xmm2, %xmm0 1055; SSE-NEXT: retq 1056; 1057; AVX1-LABEL: trunc_sub_v16i32_v16i8: 1058; AVX1: # BB#0: 1059; AVX1-NEXT: vpsubd %xmm2, %xmm0, %xmm4 1060; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 1061; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1062; AVX1-NEXT: vpsubd %xmm2, %xmm0, %xmm0 1063; AVX1-NEXT: vpsubd %xmm3, %xmm1, %xmm2 1064; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 1065; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1066; AVX1-NEXT: vpsubd %xmm3, %xmm1, %xmm1 1067; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1068; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 1069; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 1070; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 1071; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 1072; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm2 1073; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 1074; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1075; AVX1-NEXT: vzeroupper 1076; AVX1-NEXT: retq 1077; 1078; AVX2-LABEL: trunc_sub_v16i32_v16i8: 1079; AVX2: # BB#0: 1080; AVX2-NEXT: vpsubd %ymm2, %ymm0, %ymm0 1081; AVX2-NEXT: vpsubd %ymm3, %ymm1, %ymm1 1082; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 1083; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 1084; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1085; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1086; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 1087; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 1088; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1089; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 1090; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1091; AVX2-NEXT: vzeroupper 1092; AVX2-NEXT: retq 1093; 1094; AVX512-LABEL: trunc_sub_v16i32_v16i8: 1095; AVX512: # BB#0: 1096; AVX512-NEXT: vpsubd %zmm1, %zmm0, %zmm0 1097; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1098; AVX512-NEXT: retq 1099 %1 = sub <16 x i32> %a0, %a1 1100 %2 = trunc <16 x i32> %1 to <16 x i8> 1101 ret <16 x i8> %2 1102} 1103 1104define <16 x i8> @trunc_sub_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 1105; SSE-LABEL: trunc_sub_v16i16_v16i8: 1106; SSE: # BB#0: 1107; SSE-NEXT: psubw %xmm2, %xmm0 1108; SSE-NEXT: psubw %xmm3, %xmm1 1109; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1110; SSE-NEXT: pand %xmm2, %xmm1 1111; SSE-NEXT: pand %xmm2, %xmm0 1112; SSE-NEXT: packuswb %xmm1, %xmm0 1113; SSE-NEXT: retq 1114; 1115; AVX1-LABEL: trunc_sub_v16i16_v16i8: 1116; AVX1: # BB#0: 1117; AVX1-NEXT: vpsubw %xmm1, %xmm0, %xmm2 1118; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1119; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1120; AVX1-NEXT: vpsubw %xmm1, %xmm0, %xmm0 1121; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1122; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 1123; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 1124; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1125; AVX1-NEXT: vzeroupper 1126; AVX1-NEXT: retq 1127; 1128; AVX2-LABEL: trunc_sub_v16i16_v16i8: 1129; AVX2: # BB#0: 1130; AVX2-NEXT: vpsubw %ymm1, %ymm0, %ymm0 1131; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1132; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1133; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1134; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1135; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1136; AVX2-NEXT: vzeroupper 1137; AVX2-NEXT: retq 1138; 1139; AVX512F-LABEL: trunc_sub_v16i16_v16i8: 1140; AVX512F: # BB#0: 1141; AVX512F-NEXT: vpsubw %ymm1, %ymm0, %ymm0 1142; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 1143; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 1144; AVX512F-NEXT: retq 1145; 1146; AVX512BW-LABEL: trunc_sub_v16i16_v16i8: 1147; AVX512BW: # BB#0: 1148; AVX512BW-NEXT: vpsubw %ymm1, %ymm0, %ymm0 1149; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1150; AVX512BW-NEXT: retq 1151 %1 = sub <16 x i16> %a0, %a1 1152 %2 = trunc <16 x i16> %1 to <16 x i8> 1153 ret <16 x i8> %2 1154} 1155 1156; 1157; sub to constant 1158; 1159 1160define <4 x i32> @trunc_sub_const_v4i64_4i32(<4 x i64> %a0) nounwind { 1161; SSE-LABEL: trunc_sub_const_v4i64_4i32: 1162; SSE: # BB#0: 1163; SSE-NEXT: movl $1, %eax 1164; SSE-NEXT: movd %rax, %xmm2 1165; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 1166; SSE-NEXT: psubq %xmm2, %xmm0 1167; SSE-NEXT: psubq {{.*}}(%rip), %xmm1 1168; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1169; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1170; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1171; SSE-NEXT: retq 1172; 1173; AVX1-LABEL: trunc_sub_const_v4i64_4i32: 1174; AVX1: # BB#0: 1175; AVX1-NEXT: movl $1, %eax 1176; AVX1-NEXT: vmovq %rax, %xmm1 1177; AVX1-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] 1178; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm1 1179; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1180; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm0, %xmm0 1181; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1182; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 1183; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 1184; AVX1-NEXT: vzeroupper 1185; AVX1-NEXT: retq 1186; 1187; AVX2-LABEL: trunc_sub_const_v4i64_4i32: 1188; AVX2: # BB#0: 1189; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1190; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 1191; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 1192; AVX2-NEXT: vzeroupper 1193; AVX2-NEXT: retq 1194; 1195; AVX512-LABEL: trunc_sub_const_v4i64_4i32: 1196; AVX512: # BB#0: 1197; AVX512-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1198; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1199; AVX512-NEXT: retq 1200 %1 = sub <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 1201 %2 = trunc <4 x i64> %1 to <4 x i32> 1202 ret <4 x i32> %2 1203} 1204 1205define <8 x i16> @trunc_sub_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 1206; SSE-LABEL: trunc_sub_const_v16i64_v16i16: 1207; SSE: # BB#0: 1208; SSE-NEXT: movl $1, %eax 1209; SSE-NEXT: movd %rax, %xmm4 1210; SSE-NEXT: pslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 1211; SSE-NEXT: psubq %xmm4, %xmm0 1212; SSE-NEXT: psubq {{.*}}(%rip), %xmm2 1213; SSE-NEXT: psubq {{.*}}(%rip), %xmm3 1214; SSE-NEXT: psubq {{.*}}(%rip), %xmm1 1215; SSE-NEXT: pextrw $4, %xmm1, %eax 1216; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 1217; SSE-NEXT: pextrw $4, %xmm0, %ecx 1218; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 1219; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 1220; SSE-NEXT: pextrw $4, %xmm3, %edx 1221; SSE-NEXT: movd %edx, %xmm1 1222; SSE-NEXT: movd %eax, %xmm3 1223; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 1224; SSE-NEXT: movd %ecx, %xmm1 1225; SSE-NEXT: pextrw $4, %xmm2, %eax 1226; SSE-NEXT: movd %eax, %xmm2 1227; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 1228; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 1229; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 1230; SSE-NEXT: retq 1231; 1232; AVX1-LABEL: trunc_sub_const_v16i64_v16i16: 1233; AVX1: # BB#0: 1234; AVX1-NEXT: movl $1, %eax 1235; AVX1-NEXT: vmovq %rax, %xmm2 1236; AVX1-NEXT: vpslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 1237; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm2 1238; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1239; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm0, %xmm0 1240; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm3 1241; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1242; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm1 1243; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 1244; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 1245; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 1246; AVX1-NEXT: vpackusdw %xmm1, %xmm3, %xmm1 1247; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 1248; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 1249; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 1250; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1251; AVX1-NEXT: vzeroupper 1252; AVX1-NEXT: retq 1253; 1254; AVX2-LABEL: trunc_sub_const_v16i64_v16i16: 1255; AVX2: # BB#0: 1256; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm1, %ymm1 1257; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1258; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 1259; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 1260; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 1261; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 1262; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1263; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 1264; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1265; AVX2-NEXT: vzeroupper 1266; AVX2-NEXT: retq 1267; 1268; AVX512-LABEL: trunc_sub_const_v16i64_v16i16: 1269; AVX512: # BB#0: 1270; AVX512-NEXT: vpsubq {{.*}}(%rip), %zmm0, %zmm0 1271; AVX512-NEXT: vpmovqw %zmm0, %xmm0 1272; AVX512-NEXT: retq 1273 %1 = sub <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 1274 %2 = trunc <8 x i64> %1 to <8 x i16> 1275 ret <8 x i16> %2 1276} 1277 1278define <8 x i16> @trunc_sub_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 1279; SSE-LABEL: trunc_sub_const_v16i32_v16i16: 1280; SSE: # BB#0: 1281; SSE-NEXT: psubd {{.*}}(%rip), %xmm0 1282; SSE-NEXT: psubd {{.*}}(%rip), %xmm1 1283; SSE-NEXT: pslld $16, %xmm1 1284; SSE-NEXT: psrad $16, %xmm1 1285; SSE-NEXT: pslld $16, %xmm0 1286; SSE-NEXT: psrad $16, %xmm0 1287; SSE-NEXT: packssdw %xmm1, %xmm0 1288; SSE-NEXT: retq 1289; 1290; AVX1-LABEL: trunc_sub_const_v16i32_v16i16: 1291; AVX1: # BB#0: 1292; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm1 1293; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1294; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm0 1295; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 1296; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1297; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1298; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1299; AVX1-NEXT: vzeroupper 1300; AVX1-NEXT: retq 1301; 1302; AVX2-LABEL: trunc_sub_const_v16i32_v16i16: 1303; AVX2: # BB#0: 1304; AVX2-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0 1305; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 1306; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1307; AVX2-NEXT: vzeroupper 1308; AVX2-NEXT: retq 1309; 1310; AVX512-LABEL: trunc_sub_const_v16i32_v16i16: 1311; AVX512: # BB#0: 1312; AVX512-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0 1313; AVX512-NEXT: vpmovdw %zmm0, %ymm0 1314; AVX512-NEXT: retq 1315 %1 = sub <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1316 %2 = trunc <8 x i32> %1 to <8 x i16> 1317 ret <8 x i16> %2 1318} 1319 1320define <16 x i8> @trunc_sub_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 1321; SSE-LABEL: trunc_sub_const_v16i64_v16i8: 1322; SSE: # BB#0: 1323; SSE-NEXT: movl $1, %eax 1324; SSE-NEXT: movd %rax, %xmm8 1325; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 1326; SSE-NEXT: psubq %xmm8, %xmm0 1327; SSE-NEXT: psubq {{.*}}(%rip), %xmm1 1328; SSE-NEXT: psubq {{.*}}(%rip), %xmm2 1329; SSE-NEXT: psubq {{.*}}(%rip), %xmm3 1330; SSE-NEXT: psubq {{.*}}(%rip), %xmm4 1331; SSE-NEXT: psubq {{.*}}(%rip), %xmm5 1332; SSE-NEXT: psubq {{.*}}(%rip), %xmm6 1333; SSE-NEXT: psubq {{.*}}(%rip), %xmm7 1334; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 1335; SSE-NEXT: pand %xmm8, %xmm7 1336; SSE-NEXT: pand %xmm8, %xmm6 1337; SSE-NEXT: packuswb %xmm7, %xmm6 1338; SSE-NEXT: pand %xmm8, %xmm5 1339; SSE-NEXT: pand %xmm8, %xmm4 1340; SSE-NEXT: packuswb %xmm5, %xmm4 1341; SSE-NEXT: packuswb %xmm6, %xmm4 1342; SSE-NEXT: pand %xmm8, %xmm3 1343; SSE-NEXT: pand %xmm8, %xmm2 1344; SSE-NEXT: packuswb %xmm3, %xmm2 1345; SSE-NEXT: pand %xmm8, %xmm1 1346; SSE-NEXT: pand %xmm8, %xmm0 1347; SSE-NEXT: packuswb %xmm1, %xmm0 1348; SSE-NEXT: packuswb %xmm2, %xmm0 1349; SSE-NEXT: packuswb %xmm4, %xmm0 1350; SSE-NEXT: retq 1351; 1352; AVX1-LABEL: trunc_sub_const_v16i64_v16i8: 1353; AVX1: # BB#0: 1354; AVX1-NEXT: movl $1, %eax 1355; AVX1-NEXT: vmovq %rax, %xmm4 1356; AVX1-NEXT: vpslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 1357; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm8 1358; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1359; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm0, %xmm0 1360; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm5 1361; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1362; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm1 1363; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm2, %xmm6 1364; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 1365; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm2, %xmm2 1366; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm3, %xmm7 1367; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 1368; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm3, %xmm3 1369; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 1370; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 1371; AVX1-NEXT: vpand %xmm4, %xmm7, %xmm7 1372; AVX1-NEXT: vpackuswb %xmm3, %xmm7, %xmm3 1373; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 1374; AVX1-NEXT: vpand %xmm4, %xmm6, %xmm6 1375; AVX1-NEXT: vpackuswb %xmm2, %xmm6, %xmm2 1376; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 1377; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 1378; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm3 1379; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 1380; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 1381; AVX1-NEXT: vpand %xmm4, %xmm8, %xmm3 1382; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 1383; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1384; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 1385; AVX1-NEXT: vzeroupper 1386; AVX1-NEXT: retq 1387; 1388; AVX2-LABEL: trunc_sub_const_v16i64_v16i8: 1389; AVX2: # BB#0: 1390; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm1, %ymm1 1391; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1392; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm3, %ymm3 1393; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm2, %ymm2 1394; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 1395; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 1396; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 1397; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 1398; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 1399; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 1400; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 1401; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1402; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1403; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 1404; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 1405; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 1406; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 1407; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 1408; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1409; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 1410; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1411; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 1412; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 1413; AVX2-NEXT: vzeroupper 1414; AVX2-NEXT: retq 1415; 1416; AVX512-LABEL: trunc_sub_const_v16i64_v16i8: 1417; AVX512: # BB#0: 1418; AVX512-NEXT: vpsubq {{.*}}(%rip), %zmm1, %zmm1 1419; AVX512-NEXT: vpsubq {{.*}}(%rip), %zmm0, %zmm0 1420; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1421; AVX512-NEXT: vpmovqd %zmm1, %ymm1 1422; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 1423; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1424; AVX512-NEXT: retq 1425 %1 = sub <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 1426 %2 = trunc <16 x i64> %1 to <16 x i8> 1427 ret <16 x i8> %2 1428} 1429 1430define <16 x i8> @trunc_sub_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 1431; SSE-LABEL: trunc_sub_const_v16i32_v16i8: 1432; SSE: # BB#0: 1433; SSE-NEXT: psubd {{.*}}(%rip), %xmm0 1434; SSE-NEXT: psubd {{.*}}(%rip), %xmm1 1435; SSE-NEXT: psubd {{.*}}(%rip), %xmm2 1436; SSE-NEXT: psubd {{.*}}(%rip), %xmm3 1437; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1438; SSE-NEXT: pand %xmm4, %xmm3 1439; SSE-NEXT: pand %xmm4, %xmm2 1440; SSE-NEXT: packuswb %xmm3, %xmm2 1441; SSE-NEXT: pand %xmm4, %xmm1 1442; SSE-NEXT: pand %xmm4, %xmm0 1443; SSE-NEXT: packuswb %xmm1, %xmm0 1444; SSE-NEXT: packuswb %xmm2, %xmm0 1445; SSE-NEXT: retq 1446; 1447; AVX1-LABEL: trunc_sub_const_v16i32_v16i8: 1448; AVX1: # BB#0: 1449; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm2 1450; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1451; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm0 1452; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm1, %xmm3 1453; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1454; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm1, %xmm1 1455; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1456; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 1457; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 1458; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 1459; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 1460; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 1461; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 1462; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1463; AVX1-NEXT: vzeroupper 1464; AVX1-NEXT: retq 1465; 1466; AVX2-LABEL: trunc_sub_const_v16i32_v16i8: 1467; AVX2: # BB#0: 1468; AVX2-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0 1469; AVX2-NEXT: vpsubd {{.*}}(%rip), %ymm1, %ymm1 1470; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 1471; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 1472; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1473; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1474; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 1475; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 1476; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1477; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 1478; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1479; AVX2-NEXT: vzeroupper 1480; AVX2-NEXT: retq 1481; 1482; AVX512-LABEL: trunc_sub_const_v16i32_v16i8: 1483; AVX512: # BB#0: 1484; AVX512-NEXT: vpsubd {{.*}}(%rip), %zmm0, %zmm0 1485; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1486; AVX512-NEXT: retq 1487 %1 = sub <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 1488 %2 = trunc <16 x i32> %1 to <16 x i8> 1489 ret <16 x i8> %2 1490} 1491 1492define <16 x i8> @trunc_sub_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 1493; SSE-LABEL: trunc_sub_const_v16i16_v16i8: 1494; SSE: # BB#0: 1495; SSE-NEXT: psubw {{.*}}(%rip), %xmm0 1496; SSE-NEXT: psubw {{.*}}(%rip), %xmm1 1497; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1498; SSE-NEXT: pand %xmm2, %xmm1 1499; SSE-NEXT: pand %xmm2, %xmm0 1500; SSE-NEXT: packuswb %xmm1, %xmm0 1501; SSE-NEXT: retq 1502; 1503; AVX1-LABEL: trunc_sub_const_v16i16_v16i8: 1504; AVX1: # BB#0: 1505; AVX1-NEXT: vpsubw {{.*}}(%rip), %xmm0, %xmm1 1506; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1507; AVX1-NEXT: vpsubw {{.*}}(%rip), %xmm0, %xmm0 1508; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1509; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1510; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1511; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1512; AVX1-NEXT: vzeroupper 1513; AVX1-NEXT: retq 1514; 1515; AVX2-LABEL: trunc_sub_const_v16i16_v16i8: 1516; AVX2: # BB#0: 1517; AVX2-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 1518; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1519; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1520; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1521; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1522; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1523; AVX2-NEXT: vzeroupper 1524; AVX2-NEXT: retq 1525; 1526; AVX512F-LABEL: trunc_sub_const_v16i16_v16i8: 1527; AVX512F: # BB#0: 1528; AVX512F-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 1529; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 1530; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 1531; AVX512F-NEXT: retq 1532; 1533; AVX512BW-LABEL: trunc_sub_const_v16i16_v16i8: 1534; AVX512BW: # BB#0: 1535; AVX512BW-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 1536; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1537; AVX512BW-NEXT: retq 1538 %1 = sub <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 1539 %2 = trunc <16 x i16> %1 to <16 x i8> 1540 ret <16 x i8> %2 1541} 1542 1543; 1544; mul 1545; 1546 1547define <4 x i32> @trunc_mul_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 1548; SSE-LABEL: trunc_mul_v4i64_4i32: 1549; SSE: # BB#0: 1550; SSE-NEXT: movdqa %xmm0, %xmm4 1551; SSE-NEXT: pmuludq %xmm2, %xmm4 1552; SSE-NEXT: movdqa %xmm2, %xmm5 1553; SSE-NEXT: psrlq $32, %xmm5 1554; SSE-NEXT: pmuludq %xmm0, %xmm5 1555; SSE-NEXT: psllq $32, %xmm5 1556; SSE-NEXT: paddq %xmm4, %xmm5 1557; SSE-NEXT: psrlq $32, %xmm0 1558; SSE-NEXT: pmuludq %xmm2, %xmm0 1559; SSE-NEXT: psllq $32, %xmm0 1560; SSE-NEXT: paddq %xmm5, %xmm0 1561; SSE-NEXT: movdqa %xmm1, %xmm2 1562; SSE-NEXT: pmuludq %xmm3, %xmm2 1563; SSE-NEXT: movdqa %xmm3, %xmm4 1564; SSE-NEXT: psrlq $32, %xmm4 1565; SSE-NEXT: pmuludq %xmm1, %xmm4 1566; SSE-NEXT: psllq $32, %xmm4 1567; SSE-NEXT: paddq %xmm2, %xmm4 1568; SSE-NEXT: psrlq $32, %xmm1 1569; SSE-NEXT: pmuludq %xmm3, %xmm1 1570; SSE-NEXT: psllq $32, %xmm1 1571; SSE-NEXT: paddq %xmm4, %xmm1 1572; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1573; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1574; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1575; SSE-NEXT: retq 1576; 1577; AVX1-LABEL: trunc_mul_v4i64_4i32: 1578; AVX1: # BB#0: 1579; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 1580; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm3 1581; AVX1-NEXT: vpmuludq %xmm3, %xmm0, %xmm3 1582; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3 1583; AVX1-NEXT: vpaddq %xmm3, %xmm2, %xmm2 1584; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm3 1585; AVX1-NEXT: vpmuludq %xmm1, %xmm3, %xmm3 1586; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3 1587; AVX1-NEXT: vpaddq %xmm3, %xmm2, %xmm2 1588; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1589; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1590; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm3 1591; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm4 1592; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm4 1593; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 1594; AVX1-NEXT: vpaddq %xmm4, %xmm3, %xmm3 1595; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 1596; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 1597; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 1598; AVX1-NEXT: vpaddq %xmm0, %xmm3, %xmm0 1599; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 1600; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[0,2,2,3] 1601; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 1602; AVX1-NEXT: vzeroupper 1603; AVX1-NEXT: retq 1604; 1605; AVX2-LABEL: trunc_mul_v4i64_4i32: 1606; AVX2: # BB#0: 1607; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm2 1608; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm3 1609; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3 1610; AVX2-NEXT: vpsllq $32, %ymm3, %ymm3 1611; AVX2-NEXT: vpaddq %ymm3, %ymm2, %ymm2 1612; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 1613; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 1614; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 1615; AVX2-NEXT: vpaddq %ymm0, %ymm2, %ymm0 1616; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 1617; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 1618; AVX2-NEXT: vzeroupper 1619; AVX2-NEXT: retq 1620; 1621; AVX512-LABEL: trunc_mul_v4i64_4i32: 1622; AVX512: # BB#0: 1623; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm2 1624; AVX512-NEXT: vpsrlq $32, %ymm1, %ymm3 1625; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3 1626; AVX512-NEXT: vpsllq $32, %ymm3, %ymm3 1627; AVX512-NEXT: vpaddq %ymm3, %ymm2, %ymm2 1628; AVX512-NEXT: vpsrlq $32, %ymm0, %ymm0 1629; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 1630; AVX512-NEXT: vpsllq $32, %ymm0, %ymm0 1631; AVX512-NEXT: vpaddq %ymm0, %ymm2, %ymm0 1632; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1633; AVX512-NEXT: retq 1634 %1 = mul <4 x i64> %a0, %a1 1635 %2 = trunc <4 x i64> %1 to <4 x i32> 1636 ret <4 x i32> %2 1637} 1638 1639define <8 x i16> @trunc_mul_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 1640; SSE-LABEL: trunc_mul_v8i64_8i16: 1641; SSE: # BB#0: 1642; SSE-NEXT: movdqa %xmm2, %xmm8 1643; SSE-NEXT: pmuludq %xmm6, %xmm8 1644; SSE-NEXT: movdqa %xmm6, %xmm9 1645; SSE-NEXT: psrlq $32, %xmm9 1646; SSE-NEXT: pmuludq %xmm2, %xmm9 1647; SSE-NEXT: psllq $32, %xmm9 1648; SSE-NEXT: paddq %xmm8, %xmm9 1649; SSE-NEXT: psrlq $32, %xmm2 1650; SSE-NEXT: pmuludq %xmm6, %xmm2 1651; SSE-NEXT: psllq $32, %xmm2 1652; SSE-NEXT: paddq %xmm9, %xmm2 1653; SSE-NEXT: movdqa %xmm0, %xmm8 1654; SSE-NEXT: pmuludq %xmm4, %xmm8 1655; SSE-NEXT: movdqa %xmm4, %xmm6 1656; SSE-NEXT: psrlq $32, %xmm6 1657; SSE-NEXT: pmuludq %xmm0, %xmm6 1658; SSE-NEXT: psllq $32, %xmm6 1659; SSE-NEXT: paddq %xmm8, %xmm6 1660; SSE-NEXT: psrlq $32, %xmm0 1661; SSE-NEXT: pmuludq %xmm4, %xmm0 1662; SSE-NEXT: psllq $32, %xmm0 1663; SSE-NEXT: paddq %xmm6, %xmm0 1664; SSE-NEXT: movdqa %xmm3, %xmm4 1665; SSE-NEXT: pmuludq %xmm7, %xmm4 1666; SSE-NEXT: movdqa %xmm7, %xmm6 1667; SSE-NEXT: psrlq $32, %xmm6 1668; SSE-NEXT: pmuludq %xmm3, %xmm6 1669; SSE-NEXT: psllq $32, %xmm6 1670; SSE-NEXT: paddq %xmm4, %xmm6 1671; SSE-NEXT: psrlq $32, %xmm3 1672; SSE-NEXT: pmuludq %xmm7, %xmm3 1673; SSE-NEXT: psllq $32, %xmm3 1674; SSE-NEXT: paddq %xmm6, %xmm3 1675; SSE-NEXT: movdqa %xmm1, %xmm4 1676; SSE-NEXT: pmuludq %xmm5, %xmm4 1677; SSE-NEXT: movdqa %xmm5, %xmm6 1678; SSE-NEXT: psrlq $32, %xmm6 1679; SSE-NEXT: pmuludq %xmm1, %xmm6 1680; SSE-NEXT: psllq $32, %xmm6 1681; SSE-NEXT: paddq %xmm4, %xmm6 1682; SSE-NEXT: psrlq $32, %xmm1 1683; SSE-NEXT: pmuludq %xmm5, %xmm1 1684; SSE-NEXT: psllq $32, %xmm1 1685; SSE-NEXT: paddq %xmm6, %xmm1 1686; SSE-NEXT: pextrw $4, %xmm1, %eax 1687; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 1688; SSE-NEXT: pextrw $4, %xmm0, %ecx 1689; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 1690; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 1691; SSE-NEXT: pextrw $4, %xmm3, %edx 1692; SSE-NEXT: movd %edx, %xmm1 1693; SSE-NEXT: movd %eax, %xmm3 1694; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 1695; SSE-NEXT: pextrw $4, %xmm2, %eax 1696; SSE-NEXT: movd %eax, %xmm1 1697; SSE-NEXT: movd %ecx, %xmm2 1698; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 1699; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] 1700; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 1701; SSE-NEXT: retq 1702; 1703; AVX1-LABEL: trunc_mul_v8i64_8i16: 1704; AVX1: # BB#0: 1705; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm4 1706; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm5 1707; AVX1-NEXT: vpmuludq %xmm5, %xmm0, %xmm5 1708; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 1709; AVX1-NEXT: vpaddq %xmm5, %xmm4, %xmm4 1710; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm5 1711; AVX1-NEXT: vpmuludq %xmm2, %xmm5, %xmm5 1712; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 1713; AVX1-NEXT: vpaddq %xmm5, %xmm4, %xmm4 1714; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 1715; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1716; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm5 1717; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm6 1718; AVX1-NEXT: vpmuludq %xmm6, %xmm0, %xmm6 1719; AVX1-NEXT: vpsllq $32, %xmm6, %xmm6 1720; AVX1-NEXT: vpaddq %xmm6, %xmm5, %xmm5 1721; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 1722; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm0 1723; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 1724; AVX1-NEXT: vpaddq %xmm0, %xmm5, %xmm0 1725; AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm2 1726; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm5 1727; AVX1-NEXT: vpmuludq %xmm5, %xmm1, %xmm5 1728; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 1729; AVX1-NEXT: vpaddq %xmm5, %xmm2, %xmm2 1730; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm5 1731; AVX1-NEXT: vpmuludq %xmm3, %xmm5, %xmm5 1732; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 1733; AVX1-NEXT: vpaddq %xmm5, %xmm2, %xmm2 1734; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 1735; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1736; AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm5 1737; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm6 1738; AVX1-NEXT: vpmuludq %xmm6, %xmm1, %xmm6 1739; AVX1-NEXT: vpsllq $32, %xmm6, %xmm6 1740; AVX1-NEXT: vpaddq %xmm6, %xmm5, %xmm5 1741; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1 1742; AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm1 1743; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1 1744; AVX1-NEXT: vpaddq %xmm1, %xmm5, %xmm1 1745; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 1746; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 1747; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 1748; AVX1-NEXT: vpackusdw %xmm1, %xmm2, %xmm1 1749; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 1750; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1,2,3],xmm4[4],xmm3[5,6,7] 1751; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 1752; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1753; AVX1-NEXT: vzeroupper 1754; AVX1-NEXT: retq 1755; 1756; AVX2-LABEL: trunc_mul_v8i64_8i16: 1757; AVX2: # BB#0: 1758; AVX2-NEXT: vpmuludq %ymm3, %ymm1, %ymm4 1759; AVX2-NEXT: vpsrlq $32, %ymm3, %ymm5 1760; AVX2-NEXT: vpmuludq %ymm5, %ymm1, %ymm5 1761; AVX2-NEXT: vpsllq $32, %ymm5, %ymm5 1762; AVX2-NEXT: vpaddq %ymm5, %ymm4, %ymm4 1763; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm1 1764; AVX2-NEXT: vpmuludq %ymm3, %ymm1, %ymm1 1765; AVX2-NEXT: vpsllq $32, %ymm1, %ymm1 1766; AVX2-NEXT: vpaddq %ymm1, %ymm4, %ymm1 1767; AVX2-NEXT: vpmuludq %ymm2, %ymm0, %ymm3 1768; AVX2-NEXT: vpsrlq $32, %ymm2, %ymm4 1769; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4 1770; AVX2-NEXT: vpsllq $32, %ymm4, %ymm4 1771; AVX2-NEXT: vpaddq %ymm4, %ymm3, %ymm3 1772; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 1773; AVX2-NEXT: vpmuludq %ymm2, %ymm0, %ymm0 1774; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 1775; AVX2-NEXT: vpaddq %ymm0, %ymm3, %ymm0 1776; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 1777; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 1778; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 1779; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 1780; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1781; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 1782; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1783; AVX2-NEXT: vzeroupper 1784; AVX2-NEXT: retq 1785; 1786; AVX512-LABEL: trunc_mul_v8i64_8i16: 1787; AVX512: # BB#0: 1788; AVX512-NEXT: vpmuludq %zmm1, %zmm0, %zmm2 1789; AVX512-NEXT: vpsrlq $32, %zmm1, %zmm3 1790; AVX512-NEXT: vpmuludq %zmm3, %zmm0, %zmm3 1791; AVX512-NEXT: vpsllq $32, %zmm3, %zmm3 1792; AVX512-NEXT: vpaddq %zmm3, %zmm2, %zmm2 1793; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 1794; AVX512-NEXT: vpmuludq %zmm1, %zmm0, %zmm0 1795; AVX512-NEXT: vpsllq $32, %zmm0, %zmm0 1796; AVX512-NEXT: vpaddq %zmm0, %zmm2, %zmm0 1797; AVX512-NEXT: vpmovqw %zmm0, %xmm0 1798; AVX512-NEXT: retq 1799 %1 = mul <8 x i64> %a0, %a1 1800 %2 = trunc <8 x i64> %1 to <8 x i16> 1801 ret <8 x i16> %2 1802} 1803 1804define <8 x i16> @trunc_mul_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 1805; SSE-LABEL: trunc_mul_v8i32_8i16: 1806; SSE: # BB#0: 1807; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3] 1808; SSE-NEXT: pmuludq %xmm2, %xmm0 1809; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1810; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 1811; SSE-NEXT: pmuludq %xmm4, %xmm2 1812; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 1813; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1814; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3] 1815; SSE-NEXT: pmuludq %xmm3, %xmm1 1816; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1817; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] 1818; SSE-NEXT: pmuludq %xmm2, %xmm3 1819; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3] 1820; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1821; SSE-NEXT: pslld $16, %xmm1 1822; SSE-NEXT: psrad $16, %xmm1 1823; SSE-NEXT: pslld $16, %xmm0 1824; SSE-NEXT: psrad $16, %xmm0 1825; SSE-NEXT: packssdw %xmm1, %xmm0 1826; SSE-NEXT: retq 1827; 1828; AVX1-LABEL: trunc_mul_v8i32_8i16: 1829; AVX1: # BB#0: 1830; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm2 1831; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1832; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1833; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm0 1834; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 1835; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 1836; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 1837; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1838; AVX1-NEXT: vzeroupper 1839; AVX1-NEXT: retq 1840; 1841; AVX2-LABEL: trunc_mul_v8i32_8i16: 1842; AVX2: # BB#0: 1843; AVX2-NEXT: vpmulld %ymm1, %ymm0, %ymm0 1844; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 1845; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1846; AVX2-NEXT: vzeroupper 1847; AVX2-NEXT: retq 1848; 1849; AVX512-LABEL: trunc_mul_v8i32_8i16: 1850; AVX512: # BB#0: 1851; AVX512-NEXT: vpmulld %ymm1, %ymm0, %ymm0 1852; AVX512-NEXT: vpmovdw %zmm0, %ymm0 1853; AVX512-NEXT: retq 1854 %1 = mul <8 x i32> %a0, %a1 1855 %2 = trunc <8 x i32> %1 to <8 x i16> 1856 ret <8 x i16> %2 1857} 1858 1859define <16 x i8> @trunc_mul_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 1860; SSE-LABEL: trunc_mul_v16i64_v16i8: 1861; SSE: # BB#0: 1862; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1863; SSE-NEXT: movdqa %xmm0, %xmm9 1864; SSE-NEXT: pmuludq %xmm8, %xmm9 1865; SSE-NEXT: movdqa %xmm8, %xmm10 1866; SSE-NEXT: psrlq $32, %xmm10 1867; SSE-NEXT: pmuludq %xmm0, %xmm10 1868; SSE-NEXT: psllq $32, %xmm10 1869; SSE-NEXT: paddq %xmm10, %xmm9 1870; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm10 1871; SSE-NEXT: psrlq $32, %xmm0 1872; SSE-NEXT: pmuludq %xmm8, %xmm0 1873; SSE-NEXT: psllq $32, %xmm0 1874; SSE-NEXT: paddq %xmm9, %xmm0 1875; SSE-NEXT: movdqa %xmm1, %xmm8 1876; SSE-NEXT: pmuludq %xmm10, %xmm8 1877; SSE-NEXT: movdqa %xmm10, %xmm9 1878; SSE-NEXT: psrlq $32, %xmm9 1879; SSE-NEXT: pmuludq %xmm1, %xmm9 1880; SSE-NEXT: psllq $32, %xmm9 1881; SSE-NEXT: paddq %xmm8, %xmm9 1882; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1883; SSE-NEXT: psrlq $32, %xmm1 1884; SSE-NEXT: pmuludq %xmm10, %xmm1 1885; SSE-NEXT: psllq $32, %xmm1 1886; SSE-NEXT: paddq %xmm9, %xmm1 1887; SSE-NEXT: movdqa %xmm2, %xmm9 1888; SSE-NEXT: pmuludq %xmm8, %xmm9 1889; SSE-NEXT: movdqa %xmm8, %xmm10 1890; SSE-NEXT: psrlq $32, %xmm10 1891; SSE-NEXT: pmuludq %xmm2, %xmm10 1892; SSE-NEXT: psllq $32, %xmm10 1893; SSE-NEXT: paddq %xmm9, %xmm10 1894; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9 1895; SSE-NEXT: psrlq $32, %xmm2 1896; SSE-NEXT: pmuludq %xmm8, %xmm2 1897; SSE-NEXT: psllq $32, %xmm2 1898; SSE-NEXT: paddq %xmm10, %xmm2 1899; SSE-NEXT: movdqa %xmm3, %xmm8 1900; SSE-NEXT: pmuludq %xmm9, %xmm8 1901; SSE-NEXT: movdqa %xmm9, %xmm10 1902; SSE-NEXT: psrlq $32, %xmm10 1903; SSE-NEXT: pmuludq %xmm3, %xmm10 1904; SSE-NEXT: psllq $32, %xmm10 1905; SSE-NEXT: paddq %xmm8, %xmm10 1906; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1907; SSE-NEXT: psrlq $32, %xmm3 1908; SSE-NEXT: pmuludq %xmm9, %xmm3 1909; SSE-NEXT: psllq $32, %xmm3 1910; SSE-NEXT: paddq %xmm10, %xmm3 1911; SSE-NEXT: movdqa %xmm4, %xmm9 1912; SSE-NEXT: pmuludq %xmm8, %xmm9 1913; SSE-NEXT: movdqa %xmm8, %xmm10 1914; SSE-NEXT: psrlq $32, %xmm10 1915; SSE-NEXT: pmuludq %xmm4, %xmm10 1916; SSE-NEXT: psllq $32, %xmm10 1917; SSE-NEXT: paddq %xmm9, %xmm10 1918; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9 1919; SSE-NEXT: psrlq $32, %xmm4 1920; SSE-NEXT: pmuludq %xmm8, %xmm4 1921; SSE-NEXT: psllq $32, %xmm4 1922; SSE-NEXT: paddq %xmm10, %xmm4 1923; SSE-NEXT: movdqa %xmm5, %xmm8 1924; SSE-NEXT: pmuludq %xmm9, %xmm8 1925; SSE-NEXT: movdqa %xmm9, %xmm10 1926; SSE-NEXT: psrlq $32, %xmm10 1927; SSE-NEXT: pmuludq %xmm5, %xmm10 1928; SSE-NEXT: psllq $32, %xmm10 1929; SSE-NEXT: paddq %xmm8, %xmm10 1930; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1931; SSE-NEXT: psrlq $32, %xmm5 1932; SSE-NEXT: pmuludq %xmm9, %xmm5 1933; SSE-NEXT: psllq $32, %xmm5 1934; SSE-NEXT: paddq %xmm10, %xmm5 1935; SSE-NEXT: movdqa %xmm6, %xmm9 1936; SSE-NEXT: pmuludq %xmm8, %xmm9 1937; SSE-NEXT: movdqa %xmm8, %xmm10 1938; SSE-NEXT: psrlq $32, %xmm10 1939; SSE-NEXT: pmuludq %xmm6, %xmm10 1940; SSE-NEXT: psllq $32, %xmm10 1941; SSE-NEXT: paddq %xmm9, %xmm10 1942; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9 1943; SSE-NEXT: psrlq $32, %xmm6 1944; SSE-NEXT: pmuludq %xmm8, %xmm6 1945; SSE-NEXT: psllq $32, %xmm6 1946; SSE-NEXT: paddq %xmm10, %xmm6 1947; SSE-NEXT: movdqa %xmm7, %xmm8 1948; SSE-NEXT: pmuludq %xmm9, %xmm8 1949; SSE-NEXT: movdqa %xmm9, %xmm10 1950; SSE-NEXT: psrlq $32, %xmm10 1951; SSE-NEXT: pmuludq %xmm7, %xmm10 1952; SSE-NEXT: psllq $32, %xmm10 1953; SSE-NEXT: paddq %xmm8, %xmm10 1954; SSE-NEXT: psrlq $32, %xmm7 1955; SSE-NEXT: pmuludq %xmm9, %xmm7 1956; SSE-NEXT: psllq $32, %xmm7 1957; SSE-NEXT: paddq %xmm10, %xmm7 1958; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 1959; SSE-NEXT: pand %xmm8, %xmm7 1960; SSE-NEXT: pand %xmm8, %xmm6 1961; SSE-NEXT: packuswb %xmm7, %xmm6 1962; SSE-NEXT: pand %xmm8, %xmm5 1963; SSE-NEXT: pand %xmm8, %xmm4 1964; SSE-NEXT: packuswb %xmm5, %xmm4 1965; SSE-NEXT: packuswb %xmm6, %xmm4 1966; SSE-NEXT: pand %xmm8, %xmm3 1967; SSE-NEXT: pand %xmm8, %xmm2 1968; SSE-NEXT: packuswb %xmm3, %xmm2 1969; SSE-NEXT: pand %xmm8, %xmm1 1970; SSE-NEXT: pand %xmm8, %xmm0 1971; SSE-NEXT: packuswb %xmm1, %xmm0 1972; SSE-NEXT: packuswb %xmm2, %xmm0 1973; SSE-NEXT: packuswb %xmm4, %xmm0 1974; SSE-NEXT: retq 1975; 1976; AVX1-LABEL: trunc_mul_v16i64_v16i8: 1977; AVX1: # BB#0: 1978; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm8 1979; AVX1-NEXT: vpsrlq $32, %xmm4, %xmm9 1980; AVX1-NEXT: vpmuludq %xmm9, %xmm0, %xmm9 1981; AVX1-NEXT: vpsllq $32, %xmm9, %xmm9 1982; AVX1-NEXT: vpaddq %xmm9, %xmm8, %xmm8 1983; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm9 1984; AVX1-NEXT: vpmuludq %xmm4, %xmm9, %xmm9 1985; AVX1-NEXT: vpsllq $32, %xmm9, %xmm9 1986; AVX1-NEXT: vpaddq %xmm9, %xmm8, %xmm8 1987; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm10 1988; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1989; AVX1-NEXT: vpmuludq %xmm10, %xmm0, %xmm9 1990; AVX1-NEXT: vpsrlq $32, %xmm10, %xmm4 1991; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm4 1992; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 1993; AVX1-NEXT: vpaddq %xmm4, %xmm9, %xmm4 1994; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 1995; AVX1-NEXT: vpmuludq %xmm10, %xmm0, %xmm0 1996; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 1997; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm9 1998; AVX1-NEXT: vpmuludq %xmm5, %xmm1, %xmm4 1999; AVX1-NEXT: vpsrlq $32, %xmm5, %xmm0 2000; AVX1-NEXT: vpmuludq %xmm0, %xmm1, %xmm0 2001; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2002; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm0 2003; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm4 2004; AVX1-NEXT: vpmuludq %xmm5, %xmm4, %xmm4 2005; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2006; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm10 2007; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm0 2008; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2009; AVX1-NEXT: vpmuludq %xmm0, %xmm1, %xmm5 2010; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm4 2011; AVX1-NEXT: vpmuludq %xmm4, %xmm1, %xmm4 2012; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2013; AVX1-NEXT: vpaddq %xmm4, %xmm5, %xmm4 2014; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1 2015; AVX1-NEXT: vpmuludq %xmm0, %xmm1, %xmm0 2016; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2017; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm1 2018; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm0 2019; AVX1-NEXT: vpsrlq $32, %xmm6, %xmm4 2020; AVX1-NEXT: vpmuludq %xmm4, %xmm2, %xmm4 2021; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2022; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm0 2023; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm4 2024; AVX1-NEXT: vpmuludq %xmm6, %xmm4, %xmm4 2025; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2026; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm5 2027; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm0 2028; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 2029; AVX1-NEXT: vpmuludq %xmm0, %xmm2, %xmm4 2030; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm6 2031; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm6 2032; AVX1-NEXT: vpsllq $32, %xmm6, %xmm6 2033; AVX1-NEXT: vpaddq %xmm6, %xmm4, %xmm4 2034; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm2 2035; AVX1-NEXT: vpmuludq %xmm0, %xmm2, %xmm0 2036; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2037; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm0 2038; AVX1-NEXT: vpmuludq %xmm7, %xmm3, %xmm2 2039; AVX1-NEXT: vpsrlq $32, %xmm7, %xmm4 2040; AVX1-NEXT: vpmuludq %xmm4, %xmm3, %xmm4 2041; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2042; AVX1-NEXT: vpaddq %xmm4, %xmm2, %xmm2 2043; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm4 2044; AVX1-NEXT: vpmuludq %xmm7, %xmm4, %xmm4 2045; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2046; AVX1-NEXT: vpaddq %xmm4, %xmm2, %xmm2 2047; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm4 2048; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 2049; AVX1-NEXT: vpmuludq %xmm4, %xmm3, %xmm6 2050; AVX1-NEXT: vpsrlq $32, %xmm4, %xmm7 2051; AVX1-NEXT: vpmuludq %xmm7, %xmm3, %xmm7 2052; AVX1-NEXT: vpsllq $32, %xmm7, %xmm7 2053; AVX1-NEXT: vpaddq %xmm7, %xmm6, %xmm6 2054; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm3 2055; AVX1-NEXT: vpmuludq %xmm4, %xmm3, %xmm3 2056; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3 2057; AVX1-NEXT: vpaddq %xmm3, %xmm6, %xmm3 2058; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 2059; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 2060; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 2061; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 2062; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 2063; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm3 2064; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 2065; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 2066; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 2067; AVX1-NEXT: vpand %xmm4, %xmm10, %xmm2 2068; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2069; AVX1-NEXT: vpand %xmm4, %xmm9, %xmm2 2070; AVX1-NEXT: vpand %xmm4, %xmm8, %xmm3 2071; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 2072; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2073; AVX1-NEXT: vpackuswb %xmm0, %xmm1, %xmm0 2074; AVX1-NEXT: vzeroupper 2075; AVX1-NEXT: retq 2076; 2077; AVX2-LABEL: trunc_mul_v16i64_v16i8: 2078; AVX2: # BB#0: 2079; AVX2-NEXT: vpmuludq %ymm5, %ymm1, %ymm8 2080; AVX2-NEXT: vpsrlq $32, %ymm5, %ymm9 2081; AVX2-NEXT: vpmuludq %ymm9, %ymm1, %ymm9 2082; AVX2-NEXT: vpsllq $32, %ymm9, %ymm9 2083; AVX2-NEXT: vpaddq %ymm9, %ymm8, %ymm8 2084; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm1 2085; AVX2-NEXT: vpmuludq %ymm5, %ymm1, %ymm1 2086; AVX2-NEXT: vpsllq $32, %ymm1, %ymm1 2087; AVX2-NEXT: vpaddq %ymm1, %ymm8, %ymm1 2088; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm5 2089; AVX2-NEXT: vpsrlq $32, %ymm4, %ymm8 2090; AVX2-NEXT: vpmuludq %ymm8, %ymm0, %ymm8 2091; AVX2-NEXT: vpsllq $32, %ymm8, %ymm8 2092; AVX2-NEXT: vpaddq %ymm8, %ymm5, %ymm5 2093; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 2094; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm0 2095; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 2096; AVX2-NEXT: vpaddq %ymm0, %ymm5, %ymm0 2097; AVX2-NEXT: vpmuludq %ymm7, %ymm3, %ymm4 2098; AVX2-NEXT: vpsrlq $32, %ymm7, %ymm5 2099; AVX2-NEXT: vpmuludq %ymm5, %ymm3, %ymm5 2100; AVX2-NEXT: vpsllq $32, %ymm5, %ymm5 2101; AVX2-NEXT: vpaddq %ymm5, %ymm4, %ymm4 2102; AVX2-NEXT: vpsrlq $32, %ymm3, %ymm3 2103; AVX2-NEXT: vpmuludq %ymm7, %ymm3, %ymm3 2104; AVX2-NEXT: vpsllq $32, %ymm3, %ymm3 2105; AVX2-NEXT: vpaddq %ymm3, %ymm4, %ymm3 2106; AVX2-NEXT: vpmuludq %ymm6, %ymm2, %ymm4 2107; AVX2-NEXT: vpsrlq $32, %ymm6, %ymm5 2108; AVX2-NEXT: vpmuludq %ymm5, %ymm2, %ymm5 2109; AVX2-NEXT: vpsllq $32, %ymm5, %ymm5 2110; AVX2-NEXT: vpaddq %ymm5, %ymm4, %ymm4 2111; AVX2-NEXT: vpsrlq $32, %ymm2, %ymm2 2112; AVX2-NEXT: vpmuludq %ymm6, %ymm2, %ymm2 2113; AVX2-NEXT: vpsllq $32, %ymm2, %ymm2 2114; AVX2-NEXT: vpaddq %ymm2, %ymm4, %ymm2 2115; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 2116; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 2117; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 2118; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 2119; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 2120; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 2121; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 2122; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 2123; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2124; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 2125; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 2126; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 2127; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 2128; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 2129; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 2130; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 2131; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2132; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 2133; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2134; AVX2-NEXT: vzeroupper 2135; AVX2-NEXT: retq 2136; 2137; AVX512-LABEL: trunc_mul_v16i64_v16i8: 2138; AVX512: # BB#0: 2139; AVX512-NEXT: vpmuludq %zmm3, %zmm1, %zmm4 2140; AVX512-NEXT: vpsrlq $32, %zmm3, %zmm5 2141; AVX512-NEXT: vpmuludq %zmm5, %zmm1, %zmm5 2142; AVX512-NEXT: vpsllq $32, %zmm5, %zmm5 2143; AVX512-NEXT: vpaddq %zmm5, %zmm4, %zmm4 2144; AVX512-NEXT: vpsrlq $32, %zmm1, %zmm1 2145; AVX512-NEXT: vpmuludq %zmm3, %zmm1, %zmm1 2146; AVX512-NEXT: vpsllq $32, %zmm1, %zmm1 2147; AVX512-NEXT: vpaddq %zmm1, %zmm4, %zmm1 2148; AVX512-NEXT: vpmuludq %zmm2, %zmm0, %zmm3 2149; AVX512-NEXT: vpsrlq $32, %zmm2, %zmm4 2150; AVX512-NEXT: vpmuludq %zmm4, %zmm0, %zmm4 2151; AVX512-NEXT: vpsllq $32, %zmm4, %zmm4 2152; AVX512-NEXT: vpaddq %zmm4, %zmm3, %zmm3 2153; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 2154; AVX512-NEXT: vpmuludq %zmm2, %zmm0, %zmm0 2155; AVX512-NEXT: vpsllq $32, %zmm0, %zmm0 2156; AVX512-NEXT: vpaddq %zmm0, %zmm3, %zmm0 2157; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2158; AVX512-NEXT: vpmovqd %zmm1, %ymm1 2159; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 2160; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2161; AVX512-NEXT: retq 2162 %1 = mul <16 x i64> %a0, %a1 2163 %2 = trunc <16 x i64> %1 to <16 x i8> 2164 ret <16 x i8> %2 2165} 2166 2167define <16 x i8> @trunc_mul_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 2168; SSE-LABEL: trunc_mul_v16i32_v16i8: 2169; SSE: # BB#0: 2170; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm0[1,1,3,3] 2171; SSE-NEXT: pmuludq %xmm4, %xmm0 2172; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2173; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2174; SSE-NEXT: pmuludq %xmm8, %xmm4 2175; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2176; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1] 2177; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3] 2178; SSE-NEXT: pmuludq %xmm5, %xmm1 2179; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2180; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3] 2181; SSE-NEXT: pmuludq %xmm4, %xmm5 2182; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3] 2183; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 2184; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3] 2185; SSE-NEXT: pmuludq %xmm6, %xmm2 2186; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2187; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3] 2188; SSE-NEXT: pmuludq %xmm4, %xmm5 2189; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3] 2190; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 2191; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3] 2192; SSE-NEXT: pmuludq %xmm7, %xmm3 2193; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 2194; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3] 2195; SSE-NEXT: pmuludq %xmm4, %xmm5 2196; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3] 2197; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 2198; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2199; SSE-NEXT: pand %xmm4, %xmm3 2200; SSE-NEXT: pand %xmm4, %xmm2 2201; SSE-NEXT: packuswb %xmm3, %xmm2 2202; SSE-NEXT: pand %xmm4, %xmm1 2203; SSE-NEXT: pand %xmm4, %xmm0 2204; SSE-NEXT: packuswb %xmm1, %xmm0 2205; SSE-NEXT: packuswb %xmm2, %xmm0 2206; SSE-NEXT: retq 2207; 2208; AVX1-LABEL: trunc_mul_v16i32_v16i8: 2209; AVX1: # BB#0: 2210; AVX1-NEXT: vpmulld %xmm2, %xmm0, %xmm4 2211; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 2212; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2213; AVX1-NEXT: vpmulld %xmm2, %xmm0, %xmm0 2214; AVX1-NEXT: vpmulld %xmm3, %xmm1, %xmm2 2215; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 2216; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2217; AVX1-NEXT: vpmulld %xmm3, %xmm1, %xmm1 2218; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2219; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 2220; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 2221; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2222; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 2223; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm2 2224; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 2225; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 2226; AVX1-NEXT: vzeroupper 2227; AVX1-NEXT: retq 2228; 2229; AVX2-LABEL: trunc_mul_v16i32_v16i8: 2230; AVX2: # BB#0: 2231; AVX2-NEXT: vpmulld %ymm2, %ymm0, %ymm0 2232; AVX2-NEXT: vpmulld %ymm3, %ymm1, %ymm1 2233; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 2234; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 2235; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2236; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2237; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 2238; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 2239; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2240; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 2241; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2242; AVX2-NEXT: vzeroupper 2243; AVX2-NEXT: retq 2244; 2245; AVX512-LABEL: trunc_mul_v16i32_v16i8: 2246; AVX512: # BB#0: 2247; AVX512-NEXT: vpmulld %zmm1, %zmm0, %zmm0 2248; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2249; AVX512-NEXT: retq 2250 %1 = mul <16 x i32> %a0, %a1 2251 %2 = trunc <16 x i32> %1 to <16 x i8> 2252 ret <16 x i8> %2 2253} 2254 2255define <16 x i8> @trunc_mul_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 2256; SSE-LABEL: trunc_mul_v16i16_v16i8: 2257; SSE: # BB#0: 2258; SSE-NEXT: pmullw %xmm2, %xmm0 2259; SSE-NEXT: pmullw %xmm3, %xmm1 2260; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 2261; SSE-NEXT: pand %xmm2, %xmm1 2262; SSE-NEXT: pand %xmm2, %xmm0 2263; SSE-NEXT: packuswb %xmm1, %xmm0 2264; SSE-NEXT: retq 2265; 2266; AVX1-LABEL: trunc_mul_v16i16_v16i8: 2267; AVX1: # BB#0: 2268; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm2 2269; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2270; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2271; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm0 2272; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2273; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 2274; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 2275; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 2276; AVX1-NEXT: vzeroupper 2277; AVX1-NEXT: retq 2278; 2279; AVX2-LABEL: trunc_mul_v16i16_v16i8: 2280; AVX2: # BB#0: 2281; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0 2282; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 2283; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2284; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2285; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2286; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2287; AVX2-NEXT: vzeroupper 2288; AVX2-NEXT: retq 2289; 2290; AVX512F-LABEL: trunc_mul_v16i16_v16i8: 2291; AVX512F: # BB#0: 2292; AVX512F-NEXT: vpmullw %ymm1, %ymm0, %ymm0 2293; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 2294; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 2295; AVX512F-NEXT: retq 2296; 2297; AVX512BW-LABEL: trunc_mul_v16i16_v16i8: 2298; AVX512BW: # BB#0: 2299; AVX512BW-NEXT: vpmullw %ymm1, %ymm0, %ymm0 2300; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 2301; AVX512BW-NEXT: retq 2302 %1 = mul <16 x i16> %a0, %a1 2303 %2 = trunc <16 x i16> %1 to <16 x i8> 2304 ret <16 x i8> %2 2305} 2306 2307; 2308; mul to constant 2309; 2310 2311define <4 x i32> @trunc_mul_const_v4i64_4i32(<4 x i64> %a0) nounwind { 2312; SSE-LABEL: trunc_mul_const_v4i64_4i32: 2313; SSE: # BB#0: 2314; SSE-NEXT: movl $1, %eax 2315; SSE-NEXT: movd %rax, %xmm2 2316; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 2317; SSE-NEXT: movdqa %xmm0, %xmm3 2318; SSE-NEXT: pmuludq %xmm2, %xmm3 2319; SSE-NEXT: psrlq $32, %xmm0 2320; SSE-NEXT: pmuludq %xmm2, %xmm0 2321; SSE-NEXT: psllq $32, %xmm0 2322; SSE-NEXT: paddq %xmm3, %xmm0 2323; SSE-NEXT: movdqa {{.*#+}} xmm2 = [2,3] 2324; SSE-NEXT: movdqa %xmm1, %xmm3 2325; SSE-NEXT: pmuludq %xmm2, %xmm3 2326; SSE-NEXT: psrlq $32, %xmm1 2327; SSE-NEXT: pmuludq %xmm2, %xmm1 2328; SSE-NEXT: psllq $32, %xmm1 2329; SSE-NEXT: paddq %xmm3, %xmm1 2330; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2331; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2332; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2333; SSE-NEXT: retq 2334; 2335; AVX1-LABEL: trunc_mul_const_v4i64_4i32: 2336; AVX1: # BB#0: 2337; AVX1-NEXT: movl $1, %eax 2338; AVX1-NEXT: vmovq %rax, %xmm1 2339; AVX1-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] 2340; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 2341; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm3 2342; AVX1-NEXT: vpmuludq %xmm1, %xmm3, %xmm1 2343; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1 2344; AVX1-NEXT: vpaddq %xmm1, %xmm2, %xmm1 2345; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2346; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [2,3] 2347; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm3 2348; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 2349; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm0 2350; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2351; AVX1-NEXT: vpaddq %xmm0, %xmm3, %xmm0 2352; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 2353; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2354; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 2355; AVX1-NEXT: vzeroupper 2356; AVX1-NEXT: retq 2357; 2358; AVX2-LABEL: trunc_mul_const_v4i64_4i32: 2359; AVX2: # BB#0: 2360; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3] 2361; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm2 2362; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 2363; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 2364; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 2365; AVX2-NEXT: vpaddq %ymm0, %ymm2, %ymm0 2366; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 2367; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 2368; AVX2-NEXT: vzeroupper 2369; AVX2-NEXT: retq 2370; 2371; AVX512-LABEL: trunc_mul_const_v4i64_4i32: 2372; AVX512: # BB#0: 2373; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3] 2374; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm2 2375; AVX512-NEXT: vpsrlq $32, %ymm0, %ymm0 2376; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 2377; AVX512-NEXT: vpsllq $32, %ymm0, %ymm0 2378; AVX512-NEXT: vpaddq %ymm0, %ymm2, %ymm0 2379; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2380; AVX512-NEXT: retq 2381 %1 = mul <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 2382 %2 = trunc <4 x i64> %1 to <4 x i32> 2383 ret <4 x i32> %2 2384} 2385 2386define <8 x i16> @trunc_mul_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 2387; SSE-LABEL: trunc_mul_const_v16i64_v16i16: 2388; SSE: # BB#0: 2389; SSE-NEXT: movdqa {{.*#+}} xmm4 = [4,5] 2390; SSE-NEXT: movdqa %xmm2, %xmm5 2391; SSE-NEXT: pmuludq %xmm4, %xmm5 2392; SSE-NEXT: psrlq $32, %xmm2 2393; SSE-NEXT: pmuludq %xmm4, %xmm2 2394; SSE-NEXT: psllq $32, %xmm2 2395; SSE-NEXT: paddq %xmm5, %xmm2 2396; SSE-NEXT: movl $1, %eax 2397; SSE-NEXT: movd %rax, %xmm4 2398; SSE-NEXT: pslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 2399; SSE-NEXT: movdqa %xmm0, %xmm5 2400; SSE-NEXT: pmuludq %xmm4, %xmm5 2401; SSE-NEXT: psrlq $32, %xmm0 2402; SSE-NEXT: pmuludq %xmm4, %xmm0 2403; SSE-NEXT: psllq $32, %xmm0 2404; SSE-NEXT: paddq %xmm5, %xmm0 2405; SSE-NEXT: movdqa {{.*#+}} xmm4 = [6,7] 2406; SSE-NEXT: movdqa %xmm3, %xmm5 2407; SSE-NEXT: pmuludq %xmm4, %xmm5 2408; SSE-NEXT: psrlq $32, %xmm3 2409; SSE-NEXT: pmuludq %xmm4, %xmm3 2410; SSE-NEXT: psllq $32, %xmm3 2411; SSE-NEXT: paddq %xmm5, %xmm3 2412; SSE-NEXT: movdqa {{.*#+}} xmm4 = [2,3] 2413; SSE-NEXT: movdqa %xmm1, %xmm5 2414; SSE-NEXT: pmuludq %xmm4, %xmm5 2415; SSE-NEXT: psrlq $32, %xmm1 2416; SSE-NEXT: pmuludq %xmm4, %xmm1 2417; SSE-NEXT: psllq $32, %xmm1 2418; SSE-NEXT: paddq %xmm5, %xmm1 2419; SSE-NEXT: pextrw $4, %xmm1, %eax 2420; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 2421; SSE-NEXT: pextrw $4, %xmm0, %ecx 2422; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 2423; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 2424; SSE-NEXT: pextrw $4, %xmm3, %edx 2425; SSE-NEXT: movd %edx, %xmm1 2426; SSE-NEXT: movd %eax, %xmm3 2427; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 2428; SSE-NEXT: pextrw $4, %xmm2, %eax 2429; SSE-NEXT: movd %eax, %xmm1 2430; SSE-NEXT: movd %ecx, %xmm2 2431; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 2432; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] 2433; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 2434; SSE-NEXT: retq 2435; 2436; AVX1-LABEL: trunc_mul_const_v16i64_v16i16: 2437; AVX1: # BB#0: 2438; AVX1-NEXT: movl $1, %eax 2439; AVX1-NEXT: vmovq %rax, %xmm2 2440; AVX1-NEXT: vpslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 2441; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm3 2442; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm4 2443; AVX1-NEXT: vpmuludq %xmm2, %xmm4, %xmm2 2444; AVX1-NEXT: vpsllq $32, %xmm2, %xmm2 2445; AVX1-NEXT: vpaddq %xmm2, %xmm3, %xmm2 2446; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2447; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [2,3] 2448; AVX1-NEXT: vpmuludq %xmm3, %xmm0, %xmm4 2449; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 2450; AVX1-NEXT: vpmuludq %xmm3, %xmm0, %xmm0 2451; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2452; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm0 2453; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [4,5] 2454; AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm4 2455; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm5 2456; AVX1-NEXT: vpmuludq %xmm3, %xmm5, %xmm3 2457; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3 2458; AVX1-NEXT: vpaddq %xmm3, %xmm4, %xmm3 2459; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2460; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [6,7] 2461; AVX1-NEXT: vpmuludq %xmm4, %xmm1, %xmm5 2462; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1 2463; AVX1-NEXT: vpmuludq %xmm4, %xmm1, %xmm1 2464; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1 2465; AVX1-NEXT: vpaddq %xmm1, %xmm5, %xmm1 2466; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 2467; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 2468; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 2469; AVX1-NEXT: vpackusdw %xmm1, %xmm3, %xmm1 2470; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 2471; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 2472; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 2473; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 2474; AVX1-NEXT: vzeroupper 2475; AVX1-NEXT: retq 2476; 2477; AVX2-LABEL: trunc_mul_const_v16i64_v16i16: 2478; AVX2: # BB#0: 2479; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [4,5,6,7] 2480; AVX2-NEXT: vpmuludq %ymm2, %ymm1, %ymm3 2481; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm1 2482; AVX2-NEXT: vpmuludq %ymm2, %ymm1, %ymm1 2483; AVX2-NEXT: vpsllq $32, %ymm1, %ymm1 2484; AVX2-NEXT: vpaddq %ymm1, %ymm3, %ymm1 2485; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3] 2486; AVX2-NEXT: vpmuludq %ymm2, %ymm0, %ymm3 2487; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 2488; AVX2-NEXT: vpmuludq %ymm2, %ymm0, %ymm0 2489; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 2490; AVX2-NEXT: vpaddq %ymm0, %ymm3, %ymm0 2491; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 2492; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 2493; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 2494; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 2495; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 2496; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 2497; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2498; AVX2-NEXT: vzeroupper 2499; AVX2-NEXT: retq 2500; 2501; AVX512-LABEL: trunc_mul_const_v16i64_v16i16: 2502; AVX512: # BB#0: 2503; AVX512-NEXT: vmovdqa32 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7] 2504; AVX512-NEXT: vpmuludq %zmm1, %zmm0, %zmm2 2505; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 2506; AVX512-NEXT: vpmuludq %zmm1, %zmm0, %zmm0 2507; AVX512-NEXT: vpsllq $32, %zmm0, %zmm0 2508; AVX512-NEXT: vpaddq %zmm0, %zmm2, %zmm0 2509; AVX512-NEXT: vpmovqw %zmm0, %xmm0 2510; AVX512-NEXT: retq 2511 %1 = mul <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 2512 %2 = trunc <8 x i64> %1 to <8 x i16> 2513 ret <8 x i16> %2 2514} 2515 2516define <8 x i16> @trunc_mul_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 2517; SSE-LABEL: trunc_mul_const_v16i32_v16i16: 2518; SSE: # BB#0: 2519; SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,1,2,3] 2520; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] 2521; SSE-NEXT: pmuludq %xmm2, %xmm0 2522; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2523; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 2524; SSE-NEXT: pmuludq %xmm3, %xmm2 2525; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2526; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 2527; SSE-NEXT: movdqa {{.*#+}} xmm2 = [4,5,6,7] 2528; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3] 2529; SSE-NEXT: pmuludq %xmm2, %xmm1 2530; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2531; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 2532; SSE-NEXT: pmuludq %xmm3, %xmm2 2533; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2534; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 2535; SSE-NEXT: pslld $16, %xmm1 2536; SSE-NEXT: psrad $16, %xmm1 2537; SSE-NEXT: pslld $16, %xmm0 2538; SSE-NEXT: psrad $16, %xmm0 2539; SSE-NEXT: packssdw %xmm1, %xmm0 2540; SSE-NEXT: retq 2541; 2542; AVX1-LABEL: trunc_mul_const_v16i32_v16i16: 2543; AVX1: # BB#0: 2544; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm1 2545; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2546; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 2547; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 2548; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2549; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2550; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 2551; AVX1-NEXT: vzeroupper 2552; AVX1-NEXT: retq 2553; 2554; AVX2-LABEL: trunc_mul_const_v16i32_v16i16: 2555; AVX2: # BB#0: 2556; AVX2-NEXT: vpmulld {{.*}}(%rip), %ymm0, %ymm0 2557; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 2558; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2559; AVX2-NEXT: vzeroupper 2560; AVX2-NEXT: retq 2561; 2562; AVX512-LABEL: trunc_mul_const_v16i32_v16i16: 2563; AVX512: # BB#0: 2564; AVX512-NEXT: vpmulld {{.*}}(%rip), %ymm0, %ymm0 2565; AVX512-NEXT: vpmovdw %zmm0, %ymm0 2566; AVX512-NEXT: retq 2567 %1 = mul <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 2568 %2 = trunc <8 x i32> %1 to <8 x i16> 2569 ret <8 x i16> %2 2570} 2571 2572define <16 x i8> @trunc_mul_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 2573; SSE-LABEL: trunc_mul_const_v16i64_v16i8: 2574; SSE: # BB#0: 2575; SSE-NEXT: movl $1, %eax 2576; SSE-NEXT: movd %rax, %xmm8 2577; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 2578; SSE-NEXT: movdqa %xmm0, %xmm9 2579; SSE-NEXT: pmuludq %xmm8, %xmm9 2580; SSE-NEXT: psrlq $32, %xmm0 2581; SSE-NEXT: pmuludq %xmm8, %xmm0 2582; SSE-NEXT: psllq $32, %xmm0 2583; SSE-NEXT: paddq %xmm9, %xmm0 2584; SSE-NEXT: movdqa {{.*#+}} xmm8 = [2,3] 2585; SSE-NEXT: movdqa %xmm1, %xmm9 2586; SSE-NEXT: pmuludq %xmm8, %xmm9 2587; SSE-NEXT: psrlq $32, %xmm1 2588; SSE-NEXT: pmuludq %xmm8, %xmm1 2589; SSE-NEXT: psllq $32, %xmm1 2590; SSE-NEXT: paddq %xmm9, %xmm1 2591; SSE-NEXT: movdqa {{.*#+}} xmm8 = [4,5] 2592; SSE-NEXT: movdqa %xmm2, %xmm9 2593; SSE-NEXT: pmuludq %xmm8, %xmm9 2594; SSE-NEXT: psrlq $32, %xmm2 2595; SSE-NEXT: pmuludq %xmm8, %xmm2 2596; SSE-NEXT: psllq $32, %xmm2 2597; SSE-NEXT: paddq %xmm9, %xmm2 2598; SSE-NEXT: movdqa {{.*#+}} xmm8 = [6,7] 2599; SSE-NEXT: movdqa %xmm3, %xmm9 2600; SSE-NEXT: pmuludq %xmm8, %xmm9 2601; SSE-NEXT: psrlq $32, %xmm3 2602; SSE-NEXT: pmuludq %xmm8, %xmm3 2603; SSE-NEXT: psllq $32, %xmm3 2604; SSE-NEXT: paddq %xmm9, %xmm3 2605; SSE-NEXT: movdqa {{.*#+}} xmm8 = [8,9] 2606; SSE-NEXT: movdqa %xmm4, %xmm9 2607; SSE-NEXT: pmuludq %xmm8, %xmm9 2608; SSE-NEXT: psrlq $32, %xmm4 2609; SSE-NEXT: pmuludq %xmm8, %xmm4 2610; SSE-NEXT: psllq $32, %xmm4 2611; SSE-NEXT: paddq %xmm9, %xmm4 2612; SSE-NEXT: movdqa {{.*#+}} xmm8 = [10,11] 2613; SSE-NEXT: movdqa %xmm5, %xmm9 2614; SSE-NEXT: pmuludq %xmm8, %xmm9 2615; SSE-NEXT: psrlq $32, %xmm5 2616; SSE-NEXT: pmuludq %xmm8, %xmm5 2617; SSE-NEXT: psllq $32, %xmm5 2618; SSE-NEXT: paddq %xmm9, %xmm5 2619; SSE-NEXT: movdqa {{.*#+}} xmm8 = [12,13] 2620; SSE-NEXT: movdqa %xmm6, %xmm9 2621; SSE-NEXT: pmuludq %xmm8, %xmm9 2622; SSE-NEXT: psrlq $32, %xmm6 2623; SSE-NEXT: pmuludq %xmm8, %xmm6 2624; SSE-NEXT: psllq $32, %xmm6 2625; SSE-NEXT: paddq %xmm9, %xmm6 2626; SSE-NEXT: movdqa {{.*#+}} xmm8 = [14,15] 2627; SSE-NEXT: movdqa %xmm7, %xmm9 2628; SSE-NEXT: pmuludq %xmm8, %xmm9 2629; SSE-NEXT: psrlq $32, %xmm7 2630; SSE-NEXT: pmuludq %xmm8, %xmm7 2631; SSE-NEXT: psllq $32, %xmm7 2632; SSE-NEXT: paddq %xmm9, %xmm7 2633; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 2634; SSE-NEXT: pand %xmm8, %xmm7 2635; SSE-NEXT: pand %xmm8, %xmm6 2636; SSE-NEXT: packuswb %xmm7, %xmm6 2637; SSE-NEXT: pand %xmm8, %xmm5 2638; SSE-NEXT: pand %xmm8, %xmm4 2639; SSE-NEXT: packuswb %xmm5, %xmm4 2640; SSE-NEXT: packuswb %xmm6, %xmm4 2641; SSE-NEXT: pand %xmm8, %xmm3 2642; SSE-NEXT: pand %xmm8, %xmm2 2643; SSE-NEXT: packuswb %xmm3, %xmm2 2644; SSE-NEXT: pand %xmm8, %xmm1 2645; SSE-NEXT: pand %xmm8, %xmm0 2646; SSE-NEXT: packuswb %xmm1, %xmm0 2647; SSE-NEXT: packuswb %xmm2, %xmm0 2648; SSE-NEXT: packuswb %xmm4, %xmm0 2649; SSE-NEXT: retq 2650; 2651; AVX1-LABEL: trunc_mul_const_v16i64_v16i8: 2652; AVX1: # BB#0: 2653; AVX1-NEXT: movl $1, %eax 2654; AVX1-NEXT: vmovq %rax, %xmm4 2655; AVX1-NEXT: vpslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 2656; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm5 2657; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm6 2658; AVX1-NEXT: vpmuludq %xmm4, %xmm6, %xmm4 2659; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2660; AVX1-NEXT: vpaddq %xmm4, %xmm5, %xmm8 2661; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2662; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [2,3] 2663; AVX1-NEXT: vpmuludq %xmm5, %xmm0, %xmm6 2664; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 2665; AVX1-NEXT: vpmuludq %xmm5, %xmm0, %xmm0 2666; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2667; AVX1-NEXT: vpaddq %xmm0, %xmm6, %xmm9 2668; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [4,5] 2669; AVX1-NEXT: vpmuludq %xmm5, %xmm1, %xmm6 2670; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm7 2671; AVX1-NEXT: vpmuludq %xmm5, %xmm7, %xmm5 2672; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 2673; AVX1-NEXT: vpaddq %xmm5, %xmm6, %xmm5 2674; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2675; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [6,7] 2676; AVX1-NEXT: vpmuludq %xmm6, %xmm1, %xmm7 2677; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1 2678; AVX1-NEXT: vpmuludq %xmm6, %xmm1, %xmm1 2679; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1 2680; AVX1-NEXT: vpaddq %xmm1, %xmm7, %xmm1 2681; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [8,9] 2682; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm7 2683; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm4 2684; AVX1-NEXT: vpmuludq %xmm6, %xmm4, %xmm4 2685; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2686; AVX1-NEXT: vpaddq %xmm4, %xmm7, %xmm4 2687; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 2688; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [10,11] 2689; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm7 2690; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm2 2691; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm2 2692; AVX1-NEXT: vpsllq $32, %xmm2, %xmm2 2693; AVX1-NEXT: vpaddq %xmm2, %xmm7, %xmm2 2694; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [12,13] 2695; AVX1-NEXT: vpmuludq %xmm6, %xmm3, %xmm7 2696; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm0 2697; AVX1-NEXT: vpmuludq %xmm6, %xmm0, %xmm0 2698; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2699; AVX1-NEXT: vpaddq %xmm0, %xmm7, %xmm0 2700; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 2701; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [14,15] 2702; AVX1-NEXT: vpmuludq %xmm6, %xmm3, %xmm7 2703; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm3 2704; AVX1-NEXT: vpmuludq %xmm6, %xmm3, %xmm3 2705; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3 2706; AVX1-NEXT: vpaddq %xmm3, %xmm7, %xmm3 2707; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 2708; AVX1-NEXT: vpand %xmm6, %xmm3, %xmm3 2709; AVX1-NEXT: vpand %xmm6, %xmm0, %xmm0 2710; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 2711; AVX1-NEXT: vpand %xmm6, %xmm2, %xmm2 2712; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm3 2713; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 2714; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 2715; AVX1-NEXT: vpand %xmm6, %xmm1, %xmm1 2716; AVX1-NEXT: vpand %xmm6, %xmm5, %xmm2 2717; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2718; AVX1-NEXT: vpand %xmm6, %xmm9, %xmm2 2719; AVX1-NEXT: vpand %xmm6, %xmm8, %xmm3 2720; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 2721; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2722; AVX1-NEXT: vpackuswb %xmm0, %xmm1, %xmm0 2723; AVX1-NEXT: vzeroupper 2724; AVX1-NEXT: retq 2725; 2726; AVX2-LABEL: trunc_mul_const_v16i64_v16i8: 2727; AVX2: # BB#0: 2728; AVX2-NEXT: vmovdqa {{.*#+}} ymm4 = [4,5,6,7] 2729; AVX2-NEXT: vpmuludq %ymm4, %ymm1, %ymm5 2730; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm1 2731; AVX2-NEXT: vpmuludq %ymm4, %ymm1, %ymm1 2732; AVX2-NEXT: vpsllq $32, %ymm1, %ymm1 2733; AVX2-NEXT: vpaddq %ymm1, %ymm5, %ymm1 2734; AVX2-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,2,3] 2735; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm5 2736; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 2737; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm0 2738; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 2739; AVX2-NEXT: vpaddq %ymm0, %ymm5, %ymm0 2740; AVX2-NEXT: vmovdqa {{.*#+}} ymm4 = [12,13,14,15] 2741; AVX2-NEXT: vpmuludq %ymm4, %ymm3, %ymm5 2742; AVX2-NEXT: vpsrlq $32, %ymm3, %ymm3 2743; AVX2-NEXT: vpmuludq %ymm4, %ymm3, %ymm3 2744; AVX2-NEXT: vpsllq $32, %ymm3, %ymm3 2745; AVX2-NEXT: vpaddq %ymm3, %ymm5, %ymm3 2746; AVX2-NEXT: vmovdqa {{.*#+}} ymm4 = [8,9,10,11] 2747; AVX2-NEXT: vpmuludq %ymm4, %ymm2, %ymm5 2748; AVX2-NEXT: vpsrlq $32, %ymm2, %ymm2 2749; AVX2-NEXT: vpmuludq %ymm4, %ymm2, %ymm2 2750; AVX2-NEXT: vpsllq $32, %ymm2, %ymm2 2751; AVX2-NEXT: vpaddq %ymm2, %ymm5, %ymm2 2752; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 2753; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 2754; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 2755; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 2756; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 2757; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 2758; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 2759; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 2760; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2761; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 2762; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 2763; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 2764; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 2765; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 2766; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 2767; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 2768; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2769; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 2770; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2771; AVX2-NEXT: vzeroupper 2772; AVX2-NEXT: retq 2773; 2774; AVX512-LABEL: trunc_mul_const_v16i64_v16i8: 2775; AVX512: # BB#0: 2776; AVX512-NEXT: vmovdqa32 {{.*#+}} zmm2 = [8,9,10,11,12,13,14,15] 2777; AVX512-NEXT: vpmuludq %zmm2, %zmm1, %zmm3 2778; AVX512-NEXT: vpsrlq $32, %zmm1, %zmm1 2779; AVX512-NEXT: vpmuludq %zmm2, %zmm1, %zmm1 2780; AVX512-NEXT: vpsllq $32, %zmm1, %zmm1 2781; AVX512-NEXT: vpaddq %zmm1, %zmm3, %zmm1 2782; AVX512-NEXT: vmovdqa32 {{.*#+}} zmm2 = [0,1,2,3,4,5,6,7] 2783; AVX512-NEXT: vpmuludq %zmm2, %zmm0, %zmm3 2784; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 2785; AVX512-NEXT: vpmuludq %zmm2, %zmm0, %zmm0 2786; AVX512-NEXT: vpsllq $32, %zmm0, %zmm0 2787; AVX512-NEXT: vpaddq %zmm0, %zmm3, %zmm0 2788; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2789; AVX512-NEXT: vpmovqd %zmm1, %ymm1 2790; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 2791; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2792; AVX512-NEXT: retq 2793 %1 = mul <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 2794 %2 = trunc <16 x i64> %1 to <16 x i8> 2795 ret <16 x i8> %2 2796} 2797 2798define <16 x i8> @trunc_mul_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 2799; SSE-LABEL: trunc_mul_const_v16i32_v16i8: 2800; SSE: # BB#0: 2801; SSE-NEXT: movdqa {{.*#+}} xmm4 = [0,1,2,3] 2802; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3] 2803; SSE-NEXT: pmuludq %xmm4, %xmm0 2804; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2805; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2806; SSE-NEXT: pmuludq %xmm5, %xmm4 2807; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2808; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1] 2809; SSE-NEXT: movdqa {{.*#+}} xmm4 = [4,5,6,7] 2810; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,1,3,3] 2811; SSE-NEXT: pmuludq %xmm4, %xmm1 2812; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2813; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2814; SSE-NEXT: pmuludq %xmm5, %xmm4 2815; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2816; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 2817; SSE-NEXT: movdqa {{.*#+}} xmm4 = [8,9,10,11] 2818; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3] 2819; SSE-NEXT: pmuludq %xmm4, %xmm2 2820; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2821; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2822; SSE-NEXT: pmuludq %xmm5, %xmm4 2823; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2824; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 2825; SSE-NEXT: movdqa {{.*#+}} xmm4 = [12,13,14,15] 2826; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,3,3] 2827; SSE-NEXT: pmuludq %xmm4, %xmm3 2828; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 2829; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2830; SSE-NEXT: pmuludq %xmm5, %xmm4 2831; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2832; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 2833; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2834; SSE-NEXT: pand %xmm4, %xmm3 2835; SSE-NEXT: pand %xmm4, %xmm2 2836; SSE-NEXT: packuswb %xmm3, %xmm2 2837; SSE-NEXT: pand %xmm4, %xmm1 2838; SSE-NEXT: pand %xmm4, %xmm0 2839; SSE-NEXT: packuswb %xmm1, %xmm0 2840; SSE-NEXT: packuswb %xmm2, %xmm0 2841; SSE-NEXT: retq 2842; 2843; AVX1-LABEL: trunc_mul_const_v16i32_v16i8: 2844; AVX1: # BB#0: 2845; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm2 2846; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2847; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 2848; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm1, %xmm3 2849; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2850; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm1, %xmm1 2851; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2852; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 2853; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 2854; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 2855; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 2856; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 2857; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 2858; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 2859; AVX1-NEXT: vzeroupper 2860; AVX1-NEXT: retq 2861; 2862; AVX2-LABEL: trunc_mul_const_v16i32_v16i8: 2863; AVX2: # BB#0: 2864; AVX2-NEXT: vpmulld {{.*}}(%rip), %ymm0, %ymm0 2865; AVX2-NEXT: vpmulld {{.*}}(%rip), %ymm1, %ymm1 2866; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 2867; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 2868; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2869; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2870; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 2871; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 2872; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2873; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 2874; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2875; AVX2-NEXT: vzeroupper 2876; AVX2-NEXT: retq 2877; 2878; AVX512-LABEL: trunc_mul_const_v16i32_v16i8: 2879; AVX512: # BB#0: 2880; AVX512-NEXT: vpmulld {{.*}}(%rip), %zmm0, %zmm0 2881; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2882; AVX512-NEXT: retq 2883 %1 = mul <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 2884 %2 = trunc <16 x i32> %1 to <16 x i8> 2885 ret <16 x i8> %2 2886} 2887 2888define <16 x i8> @trunc_mul_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 2889; SSE-LABEL: trunc_mul_const_v16i16_v16i8: 2890; SSE: # BB#0: 2891; SSE-NEXT: pmullw {{.*}}(%rip), %xmm0 2892; SSE-NEXT: pmullw {{.*}}(%rip), %xmm1 2893; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 2894; SSE-NEXT: pand %xmm2, %xmm1 2895; SSE-NEXT: pand %xmm2, %xmm0 2896; SSE-NEXT: packuswb %xmm1, %xmm0 2897; SSE-NEXT: retq 2898; 2899; AVX1-LABEL: trunc_mul_const_v16i16_v16i8: 2900; AVX1: # BB#0: 2901; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm1 2902; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2903; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 2904; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2905; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2906; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2907; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 2908; AVX1-NEXT: vzeroupper 2909; AVX1-NEXT: retq 2910; 2911; AVX2-LABEL: trunc_mul_const_v16i16_v16i8: 2912; AVX2: # BB#0: 2913; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 2914; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 2915; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2916; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2917; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2918; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2919; AVX2-NEXT: vzeroupper 2920; AVX2-NEXT: retq 2921; 2922; AVX512F-LABEL: trunc_mul_const_v16i16_v16i8: 2923; AVX512F: # BB#0: 2924; AVX512F-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 2925; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 2926; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 2927; AVX512F-NEXT: retq 2928; 2929; AVX512BW-LABEL: trunc_mul_const_v16i16_v16i8: 2930; AVX512BW: # BB#0: 2931; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 2932; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 2933; AVX512BW-NEXT: retq 2934 %1 = mul <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 2935 %2 = trunc <16 x i16> %1 to <16 x i8> 2936 ret <16 x i8> %2 2937} 2938 2939; 2940; and 2941; 2942 2943define <4 x i32> @trunc_and_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 2944; SSE-LABEL: trunc_and_v4i64_4i32: 2945; SSE: # BB#0: 2946; SSE-NEXT: pand %xmm2, %xmm0 2947; SSE-NEXT: pand %xmm3, %xmm1 2948; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2949; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2950; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2951; SSE-NEXT: retq 2952; 2953; AVX1-LABEL: trunc_and_v4i64_4i32: 2954; AVX1: # BB#0: 2955; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 2956; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 2957; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 2958; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2959; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 2960; AVX1-NEXT: vzeroupper 2961; AVX1-NEXT: retq 2962; 2963; AVX2-LABEL: trunc_and_v4i64_4i32: 2964; AVX2: # BB#0: 2965; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 2966; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 2967; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 2968; AVX2-NEXT: vzeroupper 2969; AVX2-NEXT: retq 2970; 2971; AVX512-LABEL: trunc_and_v4i64_4i32: 2972; AVX512: # BB#0: 2973; AVX512-NEXT: vandps %ymm1, %ymm0, %ymm0 2974; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2975; AVX512-NEXT: retq 2976 %1 = and <4 x i64> %a0, %a1 2977 %2 = trunc <4 x i64> %1 to <4 x i32> 2978 ret <4 x i32> %2 2979} 2980 2981define <8 x i16> @trunc_and_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 2982; SSE-LABEL: trunc_and_v8i64_8i16: 2983; SSE: # BB#0: 2984; SSE-NEXT: pand %xmm6, %xmm2 2985; SSE-NEXT: pand %xmm4, %xmm0 2986; SSE-NEXT: pand %xmm7, %xmm3 2987; SSE-NEXT: pand %xmm5, %xmm1 2988; SSE-NEXT: pextrw $4, %xmm1, %eax 2989; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 2990; SSE-NEXT: pextrw $4, %xmm0, %ecx 2991; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 2992; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 2993; SSE-NEXT: pextrw $4, %xmm3, %edx 2994; SSE-NEXT: movd %edx, %xmm1 2995; SSE-NEXT: movd %eax, %xmm3 2996; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 2997; SSE-NEXT: pextrw $4, %xmm2, %eax 2998; SSE-NEXT: movd %eax, %xmm1 2999; SSE-NEXT: movd %ecx, %xmm2 3000; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 3001; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] 3002; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 3003; SSE-NEXT: retq 3004; 3005; AVX1-LABEL: trunc_and_v8i64_8i16: 3006; AVX1: # BB#0: 3007; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 3008; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1 3009; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3010; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 3011; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3012; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 3013; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 3014; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3015; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3016; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 3017; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 3018; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 3019; AVX1-NEXT: vzeroupper 3020; AVX1-NEXT: retq 3021; 3022; AVX2-LABEL: trunc_and_v8i64_8i16: 3023; AVX2: # BB#0: 3024; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm1 3025; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0 3026; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 3027; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 3028; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 3029; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 3030; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3031; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3032; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3033; AVX2-NEXT: vzeroupper 3034; AVX2-NEXT: retq 3035; 3036; AVX512-LABEL: trunc_and_v8i64_8i16: 3037; AVX512: # BB#0: 3038; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm0 3039; AVX512-NEXT: vpmovqw %zmm0, %xmm0 3040; AVX512-NEXT: retq 3041 %1 = and <8 x i64> %a0, %a1 3042 %2 = trunc <8 x i64> %1 to <8 x i16> 3043 ret <8 x i16> %2 3044} 3045 3046define <8 x i16> @trunc_and_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 3047; SSE-LABEL: trunc_and_v8i32_8i16: 3048; SSE: # BB#0: 3049; SSE-NEXT: pand %xmm2, %xmm0 3050; SSE-NEXT: pand %xmm3, %xmm1 3051; SSE-NEXT: pslld $16, %xmm1 3052; SSE-NEXT: psrad $16, %xmm1 3053; SSE-NEXT: pslld $16, %xmm0 3054; SSE-NEXT: psrad $16, %xmm0 3055; SSE-NEXT: packssdw %xmm1, %xmm0 3056; SSE-NEXT: retq 3057; 3058; AVX1-LABEL: trunc_and_v8i32_8i16: 3059; AVX1: # BB#0: 3060; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 3061; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3062; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 3063; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3064; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3065; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3066; AVX1-NEXT: vzeroupper 3067; AVX1-NEXT: retq 3068; 3069; AVX2-LABEL: trunc_and_v8i32_8i16: 3070; AVX2: # BB#0: 3071; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 3072; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3073; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3074; AVX2-NEXT: vzeroupper 3075; AVX2-NEXT: retq 3076; 3077; AVX512-LABEL: trunc_and_v8i32_8i16: 3078; AVX512: # BB#0: 3079; AVX512-NEXT: vandps %ymm1, %ymm0, %ymm0 3080; AVX512-NEXT: vpmovdw %zmm0, %ymm0 3081; AVX512-NEXT: retq 3082 %1 = and <8 x i32> %a0, %a1 3083 %2 = trunc <8 x i32> %1 to <8 x i16> 3084 ret <8 x i16> %2 3085} 3086 3087define <16 x i8> @trunc_and_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 3088; SSE-LABEL: trunc_and_v16i64_v16i8: 3089; SSE: # BB#0: 3090; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm0 3091; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm1 3092; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm2 3093; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm3 3094; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm4 3095; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm5 3096; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm6 3097; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm7 3098; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3099; SSE-NEXT: pand %xmm8, %xmm7 3100; SSE-NEXT: pand %xmm8, %xmm6 3101; SSE-NEXT: packuswb %xmm7, %xmm6 3102; SSE-NEXT: pand %xmm8, %xmm5 3103; SSE-NEXT: pand %xmm8, %xmm4 3104; SSE-NEXT: packuswb %xmm5, %xmm4 3105; SSE-NEXT: packuswb %xmm6, %xmm4 3106; SSE-NEXT: pand %xmm8, %xmm3 3107; SSE-NEXT: pand %xmm8, %xmm2 3108; SSE-NEXT: packuswb %xmm3, %xmm2 3109; SSE-NEXT: pand %xmm8, %xmm1 3110; SSE-NEXT: pand %xmm8, %xmm0 3111; SSE-NEXT: packuswb %xmm1, %xmm0 3112; SSE-NEXT: packuswb %xmm2, %xmm0 3113; SSE-NEXT: packuswb %xmm4, %xmm0 3114; SSE-NEXT: retq 3115; 3116; AVX1-LABEL: trunc_and_v16i64_v16i8: 3117; AVX1: # BB#0: 3118; AVX1-NEXT: vandps %ymm4, %ymm0, %ymm0 3119; AVX1-NEXT: vandps %ymm5, %ymm1, %ymm1 3120; AVX1-NEXT: vandps %ymm6, %ymm2, %ymm2 3121; AVX1-NEXT: vandps %ymm7, %ymm3, %ymm3 3122; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 3123; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3124; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3125; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3126; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 3127; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 3128; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3129; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 3130; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 3131; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 3132; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 3133; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3134; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 3135; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 3136; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 3137; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3138; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 3139; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 3140; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3141; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3142; AVX1-NEXT: vzeroupper 3143; AVX1-NEXT: retq 3144; 3145; AVX2-LABEL: trunc_and_v16i64_v16i8: 3146; AVX2: # BB#0: 3147; AVX2-NEXT: vpand %ymm5, %ymm1, %ymm1 3148; AVX2-NEXT: vpand %ymm4, %ymm0, %ymm0 3149; AVX2-NEXT: vpand %ymm7, %ymm3, %ymm3 3150; AVX2-NEXT: vpand %ymm6, %ymm2, %ymm2 3151; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 3152; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 3153; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 3154; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 3155; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 3156; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3157; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 3158; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3159; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3160; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 3161; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 3162; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 3163; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 3164; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 3165; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3166; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 3167; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3168; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 3169; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3170; AVX2-NEXT: vzeroupper 3171; AVX2-NEXT: retq 3172; 3173; AVX512-LABEL: trunc_and_v16i64_v16i8: 3174; AVX512: # BB#0: 3175; AVX512-NEXT: vpandq %zmm3, %zmm1, %zmm1 3176; AVX512-NEXT: vpandq %zmm2, %zmm0, %zmm0 3177; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3178; AVX512-NEXT: vpmovqd %zmm1, %ymm1 3179; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 3180; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3181; AVX512-NEXT: retq 3182 %1 = and <16 x i64> %a0, %a1 3183 %2 = trunc <16 x i64> %1 to <16 x i8> 3184 ret <16 x i8> %2 3185} 3186 3187define <16 x i8> @trunc_and_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 3188; SSE-LABEL: trunc_and_v16i32_v16i8: 3189; SSE: # BB#0: 3190; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3191; SSE-NEXT: pand %xmm8, %xmm7 3192; SSE-NEXT: pand %xmm3, %xmm7 3193; SSE-NEXT: pand %xmm8, %xmm6 3194; SSE-NEXT: pand %xmm2, %xmm6 3195; SSE-NEXT: packuswb %xmm7, %xmm6 3196; SSE-NEXT: pand %xmm8, %xmm5 3197; SSE-NEXT: pand %xmm1, %xmm5 3198; SSE-NEXT: pand %xmm8, %xmm4 3199; SSE-NEXT: pand %xmm4, %xmm0 3200; SSE-NEXT: packuswb %xmm5, %xmm0 3201; SSE-NEXT: packuswb %xmm6, %xmm0 3202; SSE-NEXT: retq 3203; 3204; AVX1-LABEL: trunc_and_v16i32_v16i8: 3205; AVX1: # BB#0: 3206; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 3207; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1 3208; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3209; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3210; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3211; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 3212; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 3213; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3214; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3215; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 3216; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3217; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3218; AVX1-NEXT: vzeroupper 3219; AVX1-NEXT: retq 3220; 3221; AVX2-LABEL: trunc_and_v16i32_v16i8: 3222; AVX2: # BB#0: 3223; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0 3224; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm1 3225; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3226; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 3227; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3228; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3229; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 3230; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 3231; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3232; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 3233; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3234; AVX2-NEXT: vzeroupper 3235; AVX2-NEXT: retq 3236; 3237; AVX512-LABEL: trunc_and_v16i32_v16i8: 3238; AVX512: # BB#0: 3239; AVX512-NEXT: vpandd %zmm1, %zmm0, %zmm0 3240; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3241; AVX512-NEXT: retq 3242 %1 = and <16 x i32> %a0, %a1 3243 %2 = trunc <16 x i32> %1 to <16 x i8> 3244 ret <16 x i8> %2 3245} 3246 3247define <16 x i8> @trunc_and_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 3248; SSE-LABEL: trunc_and_v16i16_v16i8: 3249; SSE: # BB#0: 3250; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255] 3251; SSE-NEXT: pand %xmm4, %xmm3 3252; SSE-NEXT: pand %xmm1, %xmm3 3253; SSE-NEXT: pand %xmm4, %xmm2 3254; SSE-NEXT: pand %xmm2, %xmm0 3255; SSE-NEXT: packuswb %xmm3, %xmm0 3256; SSE-NEXT: retq 3257; 3258; AVX1-LABEL: trunc_and_v16i16_v16i8: 3259; AVX1: # BB#0: 3260; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 3261; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3262; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3263; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3264; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3265; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3266; AVX1-NEXT: vzeroupper 3267; AVX1-NEXT: retq 3268; 3269; AVX2-LABEL: trunc_and_v16i16_v16i8: 3270; AVX2: # BB#0: 3271; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 3272; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 3273; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3274; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3275; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3276; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3277; AVX2-NEXT: vzeroupper 3278; AVX2-NEXT: retq 3279; 3280; AVX512F-LABEL: trunc_and_v16i16_v16i8: 3281; AVX512F: # BB#0: 3282; AVX512F-NEXT: vandps %ymm1, %ymm0, %ymm0 3283; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 3284; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 3285; AVX512F-NEXT: retq 3286; 3287; AVX512BW-LABEL: trunc_and_v16i16_v16i8: 3288; AVX512BW: # BB#0: 3289; AVX512BW-NEXT: vandps %ymm1, %ymm0, %ymm0 3290; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 3291; AVX512BW-NEXT: retq 3292 %1 = and <16 x i16> %a0, %a1 3293 %2 = trunc <16 x i16> %1 to <16 x i8> 3294 ret <16 x i8> %2 3295} 3296 3297; 3298; and to constant 3299; 3300 3301define <4 x i32> @trunc_and_const_v4i64_4i32(<4 x i64> %a0) nounwind { 3302; SSE-LABEL: trunc_and_const_v4i64_4i32: 3303; SSE: # BB#0: 3304; SSE-NEXT: movl $1, %eax 3305; SSE-NEXT: movd %rax, %xmm2 3306; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 3307; SSE-NEXT: pand %xmm0, %xmm2 3308; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3309; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 3310; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 3311; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3312; SSE-NEXT: retq 3313; 3314; AVX1-LABEL: trunc_and_const_v4i64_4i32: 3315; AVX1: # BB#0: 3316; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3317; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3318; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 3319; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3320; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 3321; AVX1-NEXT: vzeroupper 3322; AVX1-NEXT: retq 3323; 3324; AVX2-LABEL: trunc_and_const_v4i64_4i32: 3325; AVX2: # BB#0: 3326; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3327; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 3328; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 3329; AVX2-NEXT: vzeroupper 3330; AVX2-NEXT: retq 3331; 3332; AVX512-LABEL: trunc_and_const_v4i64_4i32: 3333; AVX512: # BB#0: 3334; AVX512-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3335; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3336; AVX512-NEXT: retq 3337 %1 = and <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 3338 %2 = trunc <4 x i64> %1 to <4 x i32> 3339 ret <4 x i32> %2 3340} 3341 3342define <8 x i16> @trunc_and_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 3343; SSE-LABEL: trunc_and_const_v16i64_v16i16: 3344; SSE: # BB#0: 3345; SSE-NEXT: movdqa %xmm0, %xmm4 3346; SSE-NEXT: movl $1, %eax 3347; SSE-NEXT: movd %rax, %xmm0 3348; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7] 3349; SSE-NEXT: pand %xmm4, %xmm0 3350; SSE-NEXT: pand {{.*}}(%rip), %xmm2 3351; SSE-NEXT: pand {{.*}}(%rip), %xmm3 3352; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3353; SSE-NEXT: pextrw $4, %xmm1, %eax 3354; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 3355; SSE-NEXT: pextrw $4, %xmm0, %ecx 3356; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 3357; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 3358; SSE-NEXT: pextrw $4, %xmm3, %edx 3359; SSE-NEXT: movd %edx, %xmm1 3360; SSE-NEXT: movd %eax, %xmm3 3361; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 3362; SSE-NEXT: movd %ecx, %xmm1 3363; SSE-NEXT: pextrw $4, %xmm2, %eax 3364; SSE-NEXT: movd %eax, %xmm2 3365; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 3366; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 3367; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 3368; SSE-NEXT: retq 3369; 3370; AVX1-LABEL: trunc_and_const_v16i64_v16i16: 3371; AVX1: # BB#0: 3372; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3373; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 3374; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3375; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 3376; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3377; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 3378; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 3379; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3380; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3381; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 3382; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 3383; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 3384; AVX1-NEXT: vzeroupper 3385; AVX1-NEXT: retq 3386; 3387; AVX2-LABEL: trunc_and_const_v16i64_v16i16: 3388; AVX2: # BB#0: 3389; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 3390; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3391; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 3392; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 3393; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 3394; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 3395; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3396; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3397; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3398; AVX2-NEXT: vzeroupper 3399; AVX2-NEXT: retq 3400; 3401; AVX512-LABEL: trunc_and_const_v16i64_v16i16: 3402; AVX512: # BB#0: 3403; AVX512-NEXT: vpandq {{.*}}(%rip), %zmm0, %zmm0 3404; AVX512-NEXT: vpmovqw %zmm0, %xmm0 3405; AVX512-NEXT: retq 3406 %1 = and <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 3407 %2 = trunc <8 x i64> %1 to <8 x i16> 3408 ret <8 x i16> %2 3409} 3410 3411define <8 x i16> @trunc_and_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 3412; SSE-LABEL: trunc_and_const_v16i32_v16i16: 3413; SSE: # BB#0: 3414; SSE-NEXT: pand {{.*}}(%rip), %xmm0 3415; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3416; SSE-NEXT: pslld $16, %xmm1 3417; SSE-NEXT: psrad $16, %xmm1 3418; SSE-NEXT: pslld $16, %xmm0 3419; SSE-NEXT: psrad $16, %xmm0 3420; SSE-NEXT: packssdw %xmm1, %xmm0 3421; SSE-NEXT: retq 3422; 3423; AVX1-LABEL: trunc_and_const_v16i32_v16i16: 3424; AVX1: # BB#0: 3425; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3426; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3427; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 3428; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3429; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3430; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3431; AVX1-NEXT: vzeroupper 3432; AVX1-NEXT: retq 3433; 3434; AVX2-LABEL: trunc_and_const_v16i32_v16i16: 3435; AVX2: # BB#0: 3436; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3437; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3438; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3439; AVX2-NEXT: vzeroupper 3440; AVX2-NEXT: retq 3441; 3442; AVX512-LABEL: trunc_and_const_v16i32_v16i16: 3443; AVX512: # BB#0: 3444; AVX512-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3445; AVX512-NEXT: vpmovdw %zmm0, %ymm0 3446; AVX512-NEXT: retq 3447 %1 = and <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 3448 %2 = trunc <8 x i32> %1 to <8 x i16> 3449 ret <8 x i16> %2 3450} 3451 3452define <16 x i8> @trunc_and_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 3453; SSE-LABEL: trunc_and_const_v16i64_v16i8: 3454; SSE: # BB#0: 3455; SSE-NEXT: movl $1, %eax 3456; SSE-NEXT: movd %rax, %xmm8 3457; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 3458; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3459; SSE-NEXT: pand {{.*}}(%rip), %xmm2 3460; SSE-NEXT: pand {{.*}}(%rip), %xmm3 3461; SSE-NEXT: pand {{.*}}(%rip), %xmm4 3462; SSE-NEXT: pand {{.*}}(%rip), %xmm5 3463; SSE-NEXT: pand {{.*}}(%rip), %xmm6 3464; SSE-NEXT: pand {{.*}}(%rip), %xmm7 3465; SSE-NEXT: movdqa {{.*#+}} xmm9 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3466; SSE-NEXT: pand %xmm9, %xmm7 3467; SSE-NEXT: pand %xmm9, %xmm6 3468; SSE-NEXT: packuswb %xmm7, %xmm6 3469; SSE-NEXT: pand %xmm9, %xmm5 3470; SSE-NEXT: pand %xmm9, %xmm4 3471; SSE-NEXT: packuswb %xmm5, %xmm4 3472; SSE-NEXT: packuswb %xmm6, %xmm4 3473; SSE-NEXT: pand %xmm9, %xmm3 3474; SSE-NEXT: pand %xmm9, %xmm2 3475; SSE-NEXT: packuswb %xmm3, %xmm2 3476; SSE-NEXT: pand %xmm9, %xmm1 3477; SSE-NEXT: pand %xmm9, %xmm8 3478; SSE-NEXT: pand %xmm8, %xmm0 3479; SSE-NEXT: packuswb %xmm1, %xmm0 3480; SSE-NEXT: packuswb %xmm2, %xmm0 3481; SSE-NEXT: packuswb %xmm4, %xmm0 3482; SSE-NEXT: retq 3483; 3484; AVX1-LABEL: trunc_and_const_v16i64_v16i8: 3485; AVX1: # BB#0: 3486; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3487; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 3488; AVX1-NEXT: vandps {{.*}}(%rip), %ymm2, %ymm2 3489; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3 3490; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 3491; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3492; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3493; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3494; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 3495; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 3496; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3497; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 3498; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 3499; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 3500; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 3501; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3502; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 3503; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 3504; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 3505; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3506; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 3507; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 3508; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3509; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3510; AVX1-NEXT: vzeroupper 3511; AVX1-NEXT: retq 3512; 3513; AVX2-LABEL: trunc_and_const_v16i64_v16i8: 3514; AVX2: # BB#0: 3515; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 3516; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3517; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3 3518; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 3519; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 3520; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 3521; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 3522; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 3523; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 3524; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3525; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 3526; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3527; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3528; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 3529; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 3530; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 3531; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 3532; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 3533; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3534; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 3535; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3536; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 3537; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3538; AVX2-NEXT: vzeroupper 3539; AVX2-NEXT: retq 3540; 3541; AVX512-LABEL: trunc_and_const_v16i64_v16i8: 3542; AVX512: # BB#0: 3543; AVX512-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm1 3544; AVX512-NEXT: vpandq {{.*}}(%rip), %zmm0, %zmm0 3545; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3546; AVX512-NEXT: vpmovqd %zmm1, %ymm1 3547; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 3548; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3549; AVX512-NEXT: retq 3550 %1 = and <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 3551 %2 = trunc <16 x i64> %1 to <16 x i8> 3552 ret <16 x i8> %2 3553} 3554 3555define <16 x i8> @trunc_and_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 3556; SSE-LABEL: trunc_and_const_v16i32_v16i8: 3557; SSE: # BB#0: 3558; SSE-NEXT: pand {{.*}}(%rip), %xmm0 3559; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3560; SSE-NEXT: pand {{.*}}(%rip), %xmm2 3561; SSE-NEXT: pand {{.*}}(%rip), %xmm3 3562; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3563; SSE-NEXT: pand %xmm4, %xmm3 3564; SSE-NEXT: pand %xmm4, %xmm2 3565; SSE-NEXT: packuswb %xmm3, %xmm2 3566; SSE-NEXT: pand %xmm4, %xmm1 3567; SSE-NEXT: pand %xmm4, %xmm0 3568; SSE-NEXT: packuswb %xmm1, %xmm0 3569; SSE-NEXT: packuswb %xmm2, %xmm0 3570; SSE-NEXT: retq 3571; 3572; AVX1-LABEL: trunc_and_const_v16i32_v16i8: 3573; AVX1: # BB#0: 3574; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3575; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 3576; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3577; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3578; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3579; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 3580; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 3581; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3582; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3583; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 3584; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3585; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3586; AVX1-NEXT: vzeroupper 3587; AVX1-NEXT: retq 3588; 3589; AVX2-LABEL: trunc_and_const_v16i32_v16i8: 3590; AVX2: # BB#0: 3591; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3592; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 3593; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3594; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 3595; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3596; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3597; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 3598; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 3599; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3600; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 3601; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3602; AVX2-NEXT: vzeroupper 3603; AVX2-NEXT: retq 3604; 3605; AVX512-LABEL: trunc_and_const_v16i32_v16i8: 3606; AVX512: # BB#0: 3607; AVX512-NEXT: vpandd {{.*}}(%rip), %zmm0, %zmm0 3608; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3609; AVX512-NEXT: retq 3610 %1 = and <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 3611 %2 = trunc <16 x i32> %1 to <16 x i8> 3612 ret <16 x i8> %2 3613} 3614 3615define <16 x i8> @trunc_and_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 3616; SSE-LABEL: trunc_and_const_v16i16_v16i8: 3617; SSE: # BB#0: 3618; SSE-NEXT: pand {{.*}}(%rip), %xmm0 3619; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3620; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 3621; SSE-NEXT: pand %xmm2, %xmm1 3622; SSE-NEXT: pand %xmm2, %xmm0 3623; SSE-NEXT: packuswb %xmm1, %xmm0 3624; SSE-NEXT: retq 3625; 3626; AVX1-LABEL: trunc_and_const_v16i16_v16i8: 3627; AVX1: # BB#0: 3628; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3629; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3630; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3631; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3632; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3633; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3634; AVX1-NEXT: vzeroupper 3635; AVX1-NEXT: retq 3636; 3637; AVX2-LABEL: trunc_and_const_v16i16_v16i8: 3638; AVX2: # BB#0: 3639; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3640; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 3641; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3642; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3643; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3644; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3645; AVX2-NEXT: vzeroupper 3646; AVX2-NEXT: retq 3647; 3648; AVX512F-LABEL: trunc_and_const_v16i16_v16i8: 3649; AVX512F: # BB#0: 3650; AVX512F-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3651; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 3652; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 3653; AVX512F-NEXT: retq 3654; 3655; AVX512BW-LABEL: trunc_and_const_v16i16_v16i8: 3656; AVX512BW: # BB#0: 3657; AVX512BW-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3658; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 3659; AVX512BW-NEXT: retq 3660 %1 = and <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 3661 %2 = trunc <16 x i16> %1 to <16 x i8> 3662 ret <16 x i8> %2 3663} 3664 3665; 3666; xor 3667; 3668 3669define <4 x i32> @trunc_xor_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 3670; SSE-LABEL: trunc_xor_v4i64_4i32: 3671; SSE: # BB#0: 3672; SSE-NEXT: pxor %xmm2, %xmm0 3673; SSE-NEXT: pxor %xmm3, %xmm1 3674; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 3675; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3676; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3677; SSE-NEXT: retq 3678; 3679; AVX1-LABEL: trunc_xor_v4i64_4i32: 3680; AVX1: # BB#0: 3681; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 3682; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3683; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 3684; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3685; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 3686; AVX1-NEXT: vzeroupper 3687; AVX1-NEXT: retq 3688; 3689; AVX2-LABEL: trunc_xor_v4i64_4i32: 3690; AVX2: # BB#0: 3691; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 3692; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 3693; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 3694; AVX2-NEXT: vzeroupper 3695; AVX2-NEXT: retq 3696; 3697; AVX512-LABEL: trunc_xor_v4i64_4i32: 3698; AVX512: # BB#0: 3699; AVX512-NEXT: vxorps %ymm1, %ymm0, %ymm0 3700; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3701; AVX512-NEXT: retq 3702 %1 = xor <4 x i64> %a0, %a1 3703 %2 = trunc <4 x i64> %1 to <4 x i32> 3704 ret <4 x i32> %2 3705} 3706 3707define <8 x i16> @trunc_xor_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 3708; SSE-LABEL: trunc_xor_v8i64_8i16: 3709; SSE: # BB#0: 3710; SSE-NEXT: pxor %xmm6, %xmm2 3711; SSE-NEXT: pxor %xmm4, %xmm0 3712; SSE-NEXT: pxor %xmm7, %xmm3 3713; SSE-NEXT: pxor %xmm5, %xmm1 3714; SSE-NEXT: pextrw $4, %xmm1, %eax 3715; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 3716; SSE-NEXT: pextrw $4, %xmm0, %ecx 3717; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 3718; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 3719; SSE-NEXT: pextrw $4, %xmm3, %edx 3720; SSE-NEXT: movd %edx, %xmm1 3721; SSE-NEXT: movd %eax, %xmm3 3722; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 3723; SSE-NEXT: pextrw $4, %xmm2, %eax 3724; SSE-NEXT: movd %eax, %xmm1 3725; SSE-NEXT: movd %ecx, %xmm2 3726; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 3727; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] 3728; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 3729; SSE-NEXT: retq 3730; 3731; AVX1-LABEL: trunc_xor_v8i64_8i16: 3732; AVX1: # BB#0: 3733; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0 3734; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1 3735; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3736; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 3737; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3738; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 3739; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 3740; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3741; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3742; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 3743; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 3744; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 3745; AVX1-NEXT: vzeroupper 3746; AVX1-NEXT: retq 3747; 3748; AVX2-LABEL: trunc_xor_v8i64_8i16: 3749; AVX2: # BB#0: 3750; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1 3751; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0 3752; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 3753; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 3754; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 3755; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 3756; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3757; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3758; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3759; AVX2-NEXT: vzeroupper 3760; AVX2-NEXT: retq 3761; 3762; AVX512-LABEL: trunc_xor_v8i64_8i16: 3763; AVX512: # BB#0: 3764; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0 3765; AVX512-NEXT: vpmovqw %zmm0, %xmm0 3766; AVX512-NEXT: retq 3767 %1 = xor <8 x i64> %a0, %a1 3768 %2 = trunc <8 x i64> %1 to <8 x i16> 3769 ret <8 x i16> %2 3770} 3771 3772define <8 x i16> @trunc_xor_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 3773; SSE-LABEL: trunc_xor_v8i32_8i16: 3774; SSE: # BB#0: 3775; SSE-NEXT: pxor %xmm2, %xmm0 3776; SSE-NEXT: pxor %xmm3, %xmm1 3777; SSE-NEXT: pslld $16, %xmm1 3778; SSE-NEXT: psrad $16, %xmm1 3779; SSE-NEXT: pslld $16, %xmm0 3780; SSE-NEXT: psrad $16, %xmm0 3781; SSE-NEXT: packssdw %xmm1, %xmm0 3782; SSE-NEXT: retq 3783; 3784; AVX1-LABEL: trunc_xor_v8i32_8i16: 3785; AVX1: # BB#0: 3786; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 3787; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3788; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 3789; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3790; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3791; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3792; AVX1-NEXT: vzeroupper 3793; AVX1-NEXT: retq 3794; 3795; AVX2-LABEL: trunc_xor_v8i32_8i16: 3796; AVX2: # BB#0: 3797; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 3798; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3799; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3800; AVX2-NEXT: vzeroupper 3801; AVX2-NEXT: retq 3802; 3803; AVX512-LABEL: trunc_xor_v8i32_8i16: 3804; AVX512: # BB#0: 3805; AVX512-NEXT: vxorps %ymm1, %ymm0, %ymm0 3806; AVX512-NEXT: vpmovdw %zmm0, %ymm0 3807; AVX512-NEXT: retq 3808 %1 = xor <8 x i32> %a0, %a1 3809 %2 = trunc <8 x i32> %1 to <8 x i16> 3810 ret <8 x i16> %2 3811} 3812 3813define <16 x i8> @trunc_xor_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 3814; SSE-LABEL: trunc_xor_v16i64_v16i8: 3815; SSE: # BB#0: 3816; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm0 3817; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm1 3818; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm2 3819; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm3 3820; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm4 3821; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm5 3822; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm6 3823; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm7 3824; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3825; SSE-NEXT: pand %xmm8, %xmm7 3826; SSE-NEXT: pand %xmm8, %xmm6 3827; SSE-NEXT: packuswb %xmm7, %xmm6 3828; SSE-NEXT: pand %xmm8, %xmm5 3829; SSE-NEXT: pand %xmm8, %xmm4 3830; SSE-NEXT: packuswb %xmm5, %xmm4 3831; SSE-NEXT: packuswb %xmm6, %xmm4 3832; SSE-NEXT: pand %xmm8, %xmm3 3833; SSE-NEXT: pand %xmm8, %xmm2 3834; SSE-NEXT: packuswb %xmm3, %xmm2 3835; SSE-NEXT: pand %xmm8, %xmm1 3836; SSE-NEXT: pand %xmm8, %xmm0 3837; SSE-NEXT: packuswb %xmm1, %xmm0 3838; SSE-NEXT: packuswb %xmm2, %xmm0 3839; SSE-NEXT: packuswb %xmm4, %xmm0 3840; SSE-NEXT: retq 3841; 3842; AVX1-LABEL: trunc_xor_v16i64_v16i8: 3843; AVX1: # BB#0: 3844; AVX1-NEXT: vxorps %ymm4, %ymm0, %ymm0 3845; AVX1-NEXT: vxorps %ymm5, %ymm1, %ymm1 3846; AVX1-NEXT: vxorps %ymm6, %ymm2, %ymm2 3847; AVX1-NEXT: vxorps %ymm7, %ymm3, %ymm3 3848; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 3849; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3850; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3851; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3852; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 3853; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 3854; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3855; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 3856; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 3857; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 3858; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 3859; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3860; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 3861; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 3862; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 3863; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3864; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 3865; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 3866; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3867; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3868; AVX1-NEXT: vzeroupper 3869; AVX1-NEXT: retq 3870; 3871; AVX2-LABEL: trunc_xor_v16i64_v16i8: 3872; AVX2: # BB#0: 3873; AVX2-NEXT: vpxor %ymm5, %ymm1, %ymm1 3874; AVX2-NEXT: vpxor %ymm4, %ymm0, %ymm0 3875; AVX2-NEXT: vpxor %ymm7, %ymm3, %ymm3 3876; AVX2-NEXT: vpxor %ymm6, %ymm2, %ymm2 3877; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 3878; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 3879; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 3880; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 3881; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 3882; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3883; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 3884; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3885; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3886; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 3887; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 3888; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 3889; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 3890; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 3891; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3892; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 3893; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3894; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 3895; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3896; AVX2-NEXT: vzeroupper 3897; AVX2-NEXT: retq 3898; 3899; AVX512-LABEL: trunc_xor_v16i64_v16i8: 3900; AVX512: # BB#0: 3901; AVX512-NEXT: vpxorq %zmm3, %zmm1, %zmm1 3902; AVX512-NEXT: vpxorq %zmm2, %zmm0, %zmm0 3903; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3904; AVX512-NEXT: vpmovqd %zmm1, %ymm1 3905; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 3906; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3907; AVX512-NEXT: retq 3908 %1 = xor <16 x i64> %a0, %a1 3909 %2 = trunc <16 x i64> %1 to <16 x i8> 3910 ret <16 x i8> %2 3911} 3912 3913define <16 x i8> @trunc_xor_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 3914; SSE-LABEL: trunc_xor_v16i32_v16i8: 3915; SSE: # BB#0: 3916; SSE-NEXT: pxor %xmm4, %xmm0 3917; SSE-NEXT: pxor %xmm5, %xmm1 3918; SSE-NEXT: pxor %xmm6, %xmm2 3919; SSE-NEXT: pxor %xmm7, %xmm3 3920; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3921; SSE-NEXT: pand %xmm4, %xmm3 3922; SSE-NEXT: pand %xmm4, %xmm2 3923; SSE-NEXT: packuswb %xmm3, %xmm2 3924; SSE-NEXT: pand %xmm4, %xmm1 3925; SSE-NEXT: pand %xmm4, %xmm0 3926; SSE-NEXT: packuswb %xmm1, %xmm0 3927; SSE-NEXT: packuswb %xmm2, %xmm0 3928; SSE-NEXT: retq 3929; 3930; AVX1-LABEL: trunc_xor_v16i32_v16i8: 3931; AVX1: # BB#0: 3932; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0 3933; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1 3934; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3935; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3936; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3937; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 3938; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 3939; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3940; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3941; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 3942; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3943; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3944; AVX1-NEXT: vzeroupper 3945; AVX1-NEXT: retq 3946; 3947; AVX2-LABEL: trunc_xor_v16i32_v16i8: 3948; AVX2: # BB#0: 3949; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0 3950; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1 3951; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3952; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 3953; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3954; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3955; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 3956; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 3957; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3958; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 3959; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3960; AVX2-NEXT: vzeroupper 3961; AVX2-NEXT: retq 3962; 3963; AVX512-LABEL: trunc_xor_v16i32_v16i8: 3964; AVX512: # BB#0: 3965; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm0 3966; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3967; AVX512-NEXT: retq 3968 %1 = xor <16 x i32> %a0, %a1 3969 %2 = trunc <16 x i32> %1 to <16 x i8> 3970 ret <16 x i8> %2 3971} 3972 3973define <16 x i8> @trunc_xor_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 3974; SSE-LABEL: trunc_xor_v16i16_v16i8: 3975; SSE: # BB#0: 3976; SSE-NEXT: pxor %xmm2, %xmm0 3977; SSE-NEXT: pxor %xmm3, %xmm1 3978; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 3979; SSE-NEXT: pand %xmm2, %xmm1 3980; SSE-NEXT: pand %xmm2, %xmm0 3981; SSE-NEXT: packuswb %xmm1, %xmm0 3982; SSE-NEXT: retq 3983; 3984; AVX1-LABEL: trunc_xor_v16i16_v16i8: 3985; AVX1: # BB#0: 3986; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 3987; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3988; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3989; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3990; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3991; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3992; AVX1-NEXT: vzeroupper 3993; AVX1-NEXT: retq 3994; 3995; AVX2-LABEL: trunc_xor_v16i16_v16i8: 3996; AVX2: # BB#0: 3997; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 3998; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 3999; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4000; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4001; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4002; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4003; AVX2-NEXT: vzeroupper 4004; AVX2-NEXT: retq 4005; 4006; AVX512F-LABEL: trunc_xor_v16i16_v16i8: 4007; AVX512F: # BB#0: 4008; AVX512F-NEXT: vxorps %ymm1, %ymm0, %ymm0 4009; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 4010; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4011; AVX512F-NEXT: retq 4012; 4013; AVX512BW-LABEL: trunc_xor_v16i16_v16i8: 4014; AVX512BW: # BB#0: 4015; AVX512BW-NEXT: vxorps %ymm1, %ymm0, %ymm0 4016; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 4017; AVX512BW-NEXT: retq 4018 %1 = xor <16 x i16> %a0, %a1 4019 %2 = trunc <16 x i16> %1 to <16 x i8> 4020 ret <16 x i8> %2 4021} 4022 4023; 4024; xor to constant 4025; 4026 4027define <4 x i32> @trunc_xor_const_v4i64_4i32(<4 x i64> %a0) nounwind { 4028; SSE-LABEL: trunc_xor_const_v4i64_4i32: 4029; SSE: # BB#0: 4030; SSE-NEXT: movl $1, %eax 4031; SSE-NEXT: movd %rax, %xmm2 4032; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 4033; SSE-NEXT: pxor %xmm0, %xmm2 4034; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4035; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 4036; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4037; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4038; SSE-NEXT: retq 4039; 4040; AVX1-LABEL: trunc_xor_const_v4i64_4i32: 4041; AVX1: # BB#0: 4042; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4043; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4044; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 4045; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4046; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 4047; AVX1-NEXT: vzeroupper 4048; AVX1-NEXT: retq 4049; 4050; AVX2-LABEL: trunc_xor_const_v4i64_4i32: 4051; AVX2: # BB#0: 4052; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4053; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 4054; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 4055; AVX2-NEXT: vzeroupper 4056; AVX2-NEXT: retq 4057; 4058; AVX512-LABEL: trunc_xor_const_v4i64_4i32: 4059; AVX512: # BB#0: 4060; AVX512-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4061; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4062; AVX512-NEXT: retq 4063 %1 = xor <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 4064 %2 = trunc <4 x i64> %1 to <4 x i32> 4065 ret <4 x i32> %2 4066} 4067 4068define <8 x i16> @trunc_xor_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 4069; SSE-LABEL: trunc_xor_const_v16i64_v16i16: 4070; SSE: # BB#0: 4071; SSE-NEXT: movdqa %xmm0, %xmm4 4072; SSE-NEXT: movl $1, %eax 4073; SSE-NEXT: movd %rax, %xmm0 4074; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7] 4075; SSE-NEXT: pxor %xmm4, %xmm0 4076; SSE-NEXT: pxor {{.*}}(%rip), %xmm2 4077; SSE-NEXT: pxor {{.*}}(%rip), %xmm3 4078; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4079; SSE-NEXT: pextrw $4, %xmm1, %eax 4080; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 4081; SSE-NEXT: pextrw $4, %xmm0, %ecx 4082; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 4083; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 4084; SSE-NEXT: pextrw $4, %xmm3, %edx 4085; SSE-NEXT: movd %edx, %xmm1 4086; SSE-NEXT: movd %eax, %xmm3 4087; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 4088; SSE-NEXT: movd %ecx, %xmm1 4089; SSE-NEXT: pextrw $4, %xmm2, %eax 4090; SSE-NEXT: movd %eax, %xmm2 4091; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 4092; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 4093; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 4094; SSE-NEXT: retq 4095; 4096; AVX1-LABEL: trunc_xor_const_v16i64_v16i16: 4097; AVX1: # BB#0: 4098; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4099; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm1, %ymm1 4100; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4101; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 4102; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4103; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 4104; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 4105; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4106; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4107; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 4108; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 4109; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 4110; AVX1-NEXT: vzeroupper 4111; AVX1-NEXT: retq 4112; 4113; AVX2-LABEL: trunc_xor_const_v16i64_v16i16: 4114; AVX2: # BB#0: 4115; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm1, %ymm1 4116; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4117; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 4118; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 4119; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 4120; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 4121; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4122; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4123; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4124; AVX2-NEXT: vzeroupper 4125; AVX2-NEXT: retq 4126; 4127; AVX512-LABEL: trunc_xor_const_v16i64_v16i16: 4128; AVX512: # BB#0: 4129; AVX512-NEXT: vpxorq {{.*}}(%rip), %zmm0, %zmm0 4130; AVX512-NEXT: vpmovqw %zmm0, %xmm0 4131; AVX512-NEXT: retq 4132 %1 = xor <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 4133 %2 = trunc <8 x i64> %1 to <8 x i16> 4134 ret <8 x i16> %2 4135} 4136 4137define <8 x i16> @trunc_xor_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 4138; SSE-LABEL: trunc_xor_const_v16i32_v16i16: 4139; SSE: # BB#0: 4140; SSE-NEXT: pxor {{.*}}(%rip), %xmm0 4141; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4142; SSE-NEXT: pslld $16, %xmm1 4143; SSE-NEXT: psrad $16, %xmm1 4144; SSE-NEXT: pslld $16, %xmm0 4145; SSE-NEXT: psrad $16, %xmm0 4146; SSE-NEXT: packssdw %xmm1, %xmm0 4147; SSE-NEXT: retq 4148; 4149; AVX1-LABEL: trunc_xor_const_v16i32_v16i16: 4150; AVX1: # BB#0: 4151; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4152; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4153; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 4154; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4155; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4156; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4157; AVX1-NEXT: vzeroupper 4158; AVX1-NEXT: retq 4159; 4160; AVX2-LABEL: trunc_xor_const_v16i32_v16i16: 4161; AVX2: # BB#0: 4162; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4163; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4164; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4165; AVX2-NEXT: vzeroupper 4166; AVX2-NEXT: retq 4167; 4168; AVX512-LABEL: trunc_xor_const_v16i32_v16i16: 4169; AVX512: # BB#0: 4170; AVX512-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4171; AVX512-NEXT: vpmovdw %zmm0, %ymm0 4172; AVX512-NEXT: retq 4173 %1 = xor <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 4174 %2 = trunc <8 x i32> %1 to <8 x i16> 4175 ret <8 x i16> %2 4176} 4177 4178define <16 x i8> @trunc_xor_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 4179; SSE-LABEL: trunc_xor_const_v16i64_v16i8: 4180; SSE: # BB#0: 4181; SSE-NEXT: movl $1, %eax 4182; SSE-NEXT: movd %rax, %xmm8 4183; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 4184; SSE-NEXT: pxor %xmm8, %xmm0 4185; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4186; SSE-NEXT: pxor {{.*}}(%rip), %xmm2 4187; SSE-NEXT: pxor {{.*}}(%rip), %xmm3 4188; SSE-NEXT: pxor {{.*}}(%rip), %xmm4 4189; SSE-NEXT: pxor {{.*}}(%rip), %xmm5 4190; SSE-NEXT: pxor {{.*}}(%rip), %xmm6 4191; SSE-NEXT: pxor {{.*}}(%rip), %xmm7 4192; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4193; SSE-NEXT: pand %xmm8, %xmm7 4194; SSE-NEXT: pand %xmm8, %xmm6 4195; SSE-NEXT: packuswb %xmm7, %xmm6 4196; SSE-NEXT: pand %xmm8, %xmm5 4197; SSE-NEXT: pand %xmm8, %xmm4 4198; SSE-NEXT: packuswb %xmm5, %xmm4 4199; SSE-NEXT: packuswb %xmm6, %xmm4 4200; SSE-NEXT: pand %xmm8, %xmm3 4201; SSE-NEXT: pand %xmm8, %xmm2 4202; SSE-NEXT: packuswb %xmm3, %xmm2 4203; SSE-NEXT: pand %xmm8, %xmm1 4204; SSE-NEXT: pand %xmm8, %xmm0 4205; SSE-NEXT: packuswb %xmm1, %xmm0 4206; SSE-NEXT: packuswb %xmm2, %xmm0 4207; SSE-NEXT: packuswb %xmm4, %xmm0 4208; SSE-NEXT: retq 4209; 4210; AVX1-LABEL: trunc_xor_const_v16i64_v16i8: 4211; AVX1: # BB#0: 4212; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4213; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm1, %ymm1 4214; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm2, %ymm2 4215; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm3, %ymm3 4216; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 4217; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4218; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4219; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4220; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 4221; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 4222; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4223; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 4224; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 4225; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 4226; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 4227; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4228; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 4229; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 4230; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 4231; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4232; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 4233; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 4234; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4235; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4236; AVX1-NEXT: vzeroupper 4237; AVX1-NEXT: retq 4238; 4239; AVX2-LABEL: trunc_xor_const_v16i64_v16i8: 4240; AVX2: # BB#0: 4241; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm1, %ymm1 4242; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4243; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm3, %ymm3 4244; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm2, %ymm2 4245; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 4246; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 4247; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 4248; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 4249; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 4250; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 4251; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 4252; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4253; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4254; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 4255; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 4256; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 4257; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 4258; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 4259; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4260; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 4261; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4262; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 4263; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 4264; AVX2-NEXT: vzeroupper 4265; AVX2-NEXT: retq 4266; 4267; AVX512-LABEL: trunc_xor_const_v16i64_v16i8: 4268; AVX512: # BB#0: 4269; AVX512-NEXT: vpxorq {{.*}}(%rip), %zmm1, %zmm1 4270; AVX512-NEXT: vpxorq {{.*}}(%rip), %zmm0, %zmm0 4271; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4272; AVX512-NEXT: vpmovqd %zmm1, %ymm1 4273; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 4274; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4275; AVX512-NEXT: retq 4276 %1 = xor <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 4277 %2 = trunc <16 x i64> %1 to <16 x i8> 4278 ret <16 x i8> %2 4279} 4280 4281define <16 x i8> @trunc_xor_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 4282; SSE-LABEL: trunc_xor_const_v16i32_v16i8: 4283; SSE: # BB#0: 4284; SSE-NEXT: pxor {{.*}}(%rip), %xmm0 4285; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4286; SSE-NEXT: pxor {{.*}}(%rip), %xmm2 4287; SSE-NEXT: pxor {{.*}}(%rip), %xmm3 4288; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4289; SSE-NEXT: pand %xmm4, %xmm3 4290; SSE-NEXT: pand %xmm4, %xmm2 4291; SSE-NEXT: packuswb %xmm3, %xmm2 4292; SSE-NEXT: pand %xmm4, %xmm1 4293; SSE-NEXT: pand %xmm4, %xmm0 4294; SSE-NEXT: packuswb %xmm1, %xmm0 4295; SSE-NEXT: packuswb %xmm2, %xmm0 4296; SSE-NEXT: retq 4297; 4298; AVX1-LABEL: trunc_xor_const_v16i32_v16i8: 4299; AVX1: # BB#0: 4300; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4301; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm1, %ymm1 4302; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4303; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4304; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 4305; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 4306; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 4307; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4308; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 4309; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 4310; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4311; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4312; AVX1-NEXT: vzeroupper 4313; AVX1-NEXT: retq 4314; 4315; AVX2-LABEL: trunc_xor_const_v16i32_v16i8: 4316; AVX2: # BB#0: 4317; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4318; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm1, %ymm1 4319; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 4320; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 4321; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4322; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4323; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 4324; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 4325; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4326; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 4327; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4328; AVX2-NEXT: vzeroupper 4329; AVX2-NEXT: retq 4330; 4331; AVX512-LABEL: trunc_xor_const_v16i32_v16i8: 4332; AVX512: # BB#0: 4333; AVX512-NEXT: vpxord {{.*}}(%rip), %zmm0, %zmm0 4334; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4335; AVX512-NEXT: retq 4336 %1 = xor <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 4337 %2 = trunc <16 x i32> %1 to <16 x i8> 4338 ret <16 x i8> %2 4339} 4340 4341define <16 x i8> @trunc_xor_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 4342; SSE-LABEL: trunc_xor_const_v16i16_v16i8: 4343; SSE: # BB#0: 4344; SSE-NEXT: pxor {{.*}}(%rip), %xmm0 4345; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4346; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 4347; SSE-NEXT: pand %xmm2, %xmm1 4348; SSE-NEXT: pand %xmm2, %xmm0 4349; SSE-NEXT: packuswb %xmm1, %xmm0 4350; SSE-NEXT: retq 4351; 4352; AVX1-LABEL: trunc_xor_const_v16i16_v16i8: 4353; AVX1: # BB#0: 4354; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4355; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4356; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4357; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4358; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4359; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4360; AVX1-NEXT: vzeroupper 4361; AVX1-NEXT: retq 4362; 4363; AVX2-LABEL: trunc_xor_const_v16i16_v16i8: 4364; AVX2: # BB#0: 4365; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4366; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 4367; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4368; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4369; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4370; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4371; AVX2-NEXT: vzeroupper 4372; AVX2-NEXT: retq 4373; 4374; AVX512F-LABEL: trunc_xor_const_v16i16_v16i8: 4375; AVX512F: # BB#0: 4376; AVX512F-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4377; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 4378; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4379; AVX512F-NEXT: retq 4380; 4381; AVX512BW-LABEL: trunc_xor_const_v16i16_v16i8: 4382; AVX512BW: # BB#0: 4383; AVX512BW-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4384; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 4385; AVX512BW-NEXT: retq 4386 %1 = xor <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 4387 %2 = trunc <16 x i16> %1 to <16 x i8> 4388 ret <16 x i8> %2 4389} 4390 4391; 4392; or 4393; 4394 4395define <4 x i32> @trunc_or_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 4396; SSE-LABEL: trunc_or_v4i64_4i32: 4397; SSE: # BB#0: 4398; SSE-NEXT: por %xmm2, %xmm0 4399; SSE-NEXT: por %xmm3, %xmm1 4400; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4401; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4402; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4403; SSE-NEXT: retq 4404; 4405; AVX1-LABEL: trunc_or_v4i64_4i32: 4406; AVX1: # BB#0: 4407; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 4408; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4409; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 4410; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4411; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 4412; AVX1-NEXT: vzeroupper 4413; AVX1-NEXT: retq 4414; 4415; AVX2-LABEL: trunc_or_v4i64_4i32: 4416; AVX2: # BB#0: 4417; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 4418; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 4419; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 4420; AVX2-NEXT: vzeroupper 4421; AVX2-NEXT: retq 4422; 4423; AVX512-LABEL: trunc_or_v4i64_4i32: 4424; AVX512: # BB#0: 4425; AVX512-NEXT: vorps %ymm1, %ymm0, %ymm0 4426; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4427; AVX512-NEXT: retq 4428 %1 = or <4 x i64> %a0, %a1 4429 %2 = trunc <4 x i64> %1 to <4 x i32> 4430 ret <4 x i32> %2 4431} 4432 4433define <8 x i16> @trunc_or_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 4434; SSE-LABEL: trunc_or_v8i64_8i16: 4435; SSE: # BB#0: 4436; SSE-NEXT: por %xmm6, %xmm2 4437; SSE-NEXT: por %xmm4, %xmm0 4438; SSE-NEXT: por %xmm7, %xmm3 4439; SSE-NEXT: por %xmm5, %xmm1 4440; SSE-NEXT: pextrw $4, %xmm1, %eax 4441; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 4442; SSE-NEXT: pextrw $4, %xmm0, %ecx 4443; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 4444; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 4445; SSE-NEXT: pextrw $4, %xmm3, %edx 4446; SSE-NEXT: movd %edx, %xmm1 4447; SSE-NEXT: movd %eax, %xmm3 4448; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 4449; SSE-NEXT: pextrw $4, %xmm2, %eax 4450; SSE-NEXT: movd %eax, %xmm1 4451; SSE-NEXT: movd %ecx, %xmm2 4452; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 4453; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] 4454; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 4455; SSE-NEXT: retq 4456; 4457; AVX1-LABEL: trunc_or_v8i64_8i16: 4458; AVX1: # BB#0: 4459; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 4460; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1 4461; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4462; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 4463; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4464; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 4465; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 4466; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4467; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4468; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 4469; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 4470; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 4471; AVX1-NEXT: vzeroupper 4472; AVX1-NEXT: retq 4473; 4474; AVX2-LABEL: trunc_or_v8i64_8i16: 4475; AVX2: # BB#0: 4476; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm1 4477; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm0 4478; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 4479; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 4480; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 4481; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 4482; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4483; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4484; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4485; AVX2-NEXT: vzeroupper 4486; AVX2-NEXT: retq 4487; 4488; AVX512-LABEL: trunc_or_v8i64_8i16: 4489; AVX512: # BB#0: 4490; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0 4491; AVX512-NEXT: vpmovqw %zmm0, %xmm0 4492; AVX512-NEXT: retq 4493 %1 = or <8 x i64> %a0, %a1 4494 %2 = trunc <8 x i64> %1 to <8 x i16> 4495 ret <8 x i16> %2 4496} 4497 4498define <8 x i16> @trunc_or_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 4499; SSE-LABEL: trunc_or_v8i32_8i16: 4500; SSE: # BB#0: 4501; SSE-NEXT: por %xmm2, %xmm0 4502; SSE-NEXT: por %xmm3, %xmm1 4503; SSE-NEXT: pslld $16, %xmm1 4504; SSE-NEXT: psrad $16, %xmm1 4505; SSE-NEXT: pslld $16, %xmm0 4506; SSE-NEXT: psrad $16, %xmm0 4507; SSE-NEXT: packssdw %xmm1, %xmm0 4508; SSE-NEXT: retq 4509; 4510; AVX1-LABEL: trunc_or_v8i32_8i16: 4511; AVX1: # BB#0: 4512; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 4513; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4514; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 4515; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4516; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4517; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4518; AVX1-NEXT: vzeroupper 4519; AVX1-NEXT: retq 4520; 4521; AVX2-LABEL: trunc_or_v8i32_8i16: 4522; AVX2: # BB#0: 4523; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 4524; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4525; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4526; AVX2-NEXT: vzeroupper 4527; AVX2-NEXT: retq 4528; 4529; AVX512-LABEL: trunc_or_v8i32_8i16: 4530; AVX512: # BB#0: 4531; AVX512-NEXT: vorps %ymm1, %ymm0, %ymm0 4532; AVX512-NEXT: vpmovdw %zmm0, %ymm0 4533; AVX512-NEXT: retq 4534 %1 = or <8 x i32> %a0, %a1 4535 %2 = trunc <8 x i32> %1 to <8 x i16> 4536 ret <8 x i16> %2 4537} 4538 4539define <16 x i8> @trunc_or_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 4540; SSE-LABEL: trunc_or_v16i64_v16i8: 4541; SSE: # BB#0: 4542; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm0 4543; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm1 4544; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm2 4545; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm3 4546; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm4 4547; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm5 4548; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm6 4549; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm7 4550; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4551; SSE-NEXT: pand %xmm8, %xmm7 4552; SSE-NEXT: pand %xmm8, %xmm6 4553; SSE-NEXT: packuswb %xmm7, %xmm6 4554; SSE-NEXT: pand %xmm8, %xmm5 4555; SSE-NEXT: pand %xmm8, %xmm4 4556; SSE-NEXT: packuswb %xmm5, %xmm4 4557; SSE-NEXT: packuswb %xmm6, %xmm4 4558; SSE-NEXT: pand %xmm8, %xmm3 4559; SSE-NEXT: pand %xmm8, %xmm2 4560; SSE-NEXT: packuswb %xmm3, %xmm2 4561; SSE-NEXT: pand %xmm8, %xmm1 4562; SSE-NEXT: pand %xmm8, %xmm0 4563; SSE-NEXT: packuswb %xmm1, %xmm0 4564; SSE-NEXT: packuswb %xmm2, %xmm0 4565; SSE-NEXT: packuswb %xmm4, %xmm0 4566; SSE-NEXT: retq 4567; 4568; AVX1-LABEL: trunc_or_v16i64_v16i8: 4569; AVX1: # BB#0: 4570; AVX1-NEXT: vorps %ymm4, %ymm0, %ymm0 4571; AVX1-NEXT: vorps %ymm5, %ymm1, %ymm1 4572; AVX1-NEXT: vorps %ymm6, %ymm2, %ymm2 4573; AVX1-NEXT: vorps %ymm7, %ymm3, %ymm3 4574; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 4575; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4576; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4577; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4578; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 4579; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 4580; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4581; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 4582; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 4583; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 4584; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 4585; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4586; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 4587; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 4588; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 4589; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4590; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 4591; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 4592; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4593; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4594; AVX1-NEXT: vzeroupper 4595; AVX1-NEXT: retq 4596; 4597; AVX2-LABEL: trunc_or_v16i64_v16i8: 4598; AVX2: # BB#0: 4599; AVX2-NEXT: vpor %ymm5, %ymm1, %ymm1 4600; AVX2-NEXT: vpor %ymm4, %ymm0, %ymm0 4601; AVX2-NEXT: vpor %ymm7, %ymm3, %ymm3 4602; AVX2-NEXT: vpor %ymm6, %ymm2, %ymm2 4603; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 4604; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 4605; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 4606; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 4607; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 4608; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 4609; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 4610; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4611; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4612; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 4613; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 4614; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 4615; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 4616; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 4617; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4618; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 4619; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4620; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 4621; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 4622; AVX2-NEXT: vzeroupper 4623; AVX2-NEXT: retq 4624; 4625; AVX512-LABEL: trunc_or_v16i64_v16i8: 4626; AVX512: # BB#0: 4627; AVX512-NEXT: vporq %zmm3, %zmm1, %zmm1 4628; AVX512-NEXT: vporq %zmm2, %zmm0, %zmm0 4629; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4630; AVX512-NEXT: vpmovqd %zmm1, %ymm1 4631; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 4632; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4633; AVX512-NEXT: retq 4634 %1 = or <16 x i64> %a0, %a1 4635 %2 = trunc <16 x i64> %1 to <16 x i8> 4636 ret <16 x i8> %2 4637} 4638 4639define <16 x i8> @trunc_or_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 4640; SSE-LABEL: trunc_or_v16i32_v16i8: 4641; SSE: # BB#0: 4642; SSE-NEXT: por %xmm4, %xmm0 4643; SSE-NEXT: por %xmm5, %xmm1 4644; SSE-NEXT: por %xmm6, %xmm2 4645; SSE-NEXT: por %xmm7, %xmm3 4646; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4647; SSE-NEXT: pand %xmm4, %xmm3 4648; SSE-NEXT: pand %xmm4, %xmm2 4649; SSE-NEXT: packuswb %xmm3, %xmm2 4650; SSE-NEXT: pand %xmm4, %xmm1 4651; SSE-NEXT: pand %xmm4, %xmm0 4652; SSE-NEXT: packuswb %xmm1, %xmm0 4653; SSE-NEXT: packuswb %xmm2, %xmm0 4654; SSE-NEXT: retq 4655; 4656; AVX1-LABEL: trunc_or_v16i32_v16i8: 4657; AVX1: # BB#0: 4658; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 4659; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1 4660; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4661; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4662; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 4663; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 4664; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 4665; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4666; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 4667; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 4668; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4669; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4670; AVX1-NEXT: vzeroupper 4671; AVX1-NEXT: retq 4672; 4673; AVX2-LABEL: trunc_or_v16i32_v16i8: 4674; AVX2: # BB#0: 4675; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm0 4676; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm1 4677; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 4678; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 4679; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4680; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4681; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 4682; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 4683; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4684; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 4685; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4686; AVX2-NEXT: vzeroupper 4687; AVX2-NEXT: retq 4688; 4689; AVX512-LABEL: trunc_or_v16i32_v16i8: 4690; AVX512: # BB#0: 4691; AVX512-NEXT: vpord %zmm1, %zmm0, %zmm0 4692; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4693; AVX512-NEXT: retq 4694 %1 = or <16 x i32> %a0, %a1 4695 %2 = trunc <16 x i32> %1 to <16 x i8> 4696 ret <16 x i8> %2 4697} 4698 4699define <16 x i8> @trunc_or_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 4700; SSE-LABEL: trunc_or_v16i16_v16i8: 4701; SSE: # BB#0: 4702; SSE-NEXT: por %xmm2, %xmm0 4703; SSE-NEXT: por %xmm3, %xmm1 4704; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 4705; SSE-NEXT: pand %xmm2, %xmm1 4706; SSE-NEXT: pand %xmm2, %xmm0 4707; SSE-NEXT: packuswb %xmm1, %xmm0 4708; SSE-NEXT: retq 4709; 4710; AVX1-LABEL: trunc_or_v16i16_v16i8: 4711; AVX1: # BB#0: 4712; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 4713; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4714; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4715; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4716; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4717; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4718; AVX1-NEXT: vzeroupper 4719; AVX1-NEXT: retq 4720; 4721; AVX2-LABEL: trunc_or_v16i16_v16i8: 4722; AVX2: # BB#0: 4723; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 4724; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 4725; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4726; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4727; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4728; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4729; AVX2-NEXT: vzeroupper 4730; AVX2-NEXT: retq 4731; 4732; AVX512F-LABEL: trunc_or_v16i16_v16i8: 4733; AVX512F: # BB#0: 4734; AVX512F-NEXT: vorps %ymm1, %ymm0, %ymm0 4735; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 4736; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4737; AVX512F-NEXT: retq 4738; 4739; AVX512BW-LABEL: trunc_or_v16i16_v16i8: 4740; AVX512BW: # BB#0: 4741; AVX512BW-NEXT: vorps %ymm1, %ymm0, %ymm0 4742; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 4743; AVX512BW-NEXT: retq 4744 %1 = or <16 x i16> %a0, %a1 4745 %2 = trunc <16 x i16> %1 to <16 x i8> 4746 ret <16 x i8> %2 4747} 4748 4749; 4750; or to constant 4751; 4752 4753define <4 x i32> @trunc_or_const_v4i64_4i32(<4 x i64> %a0) nounwind { 4754; SSE-LABEL: trunc_or_const_v4i64_4i32: 4755; SSE: # BB#0: 4756; SSE-NEXT: movl $1, %eax 4757; SSE-NEXT: movd %rax, %xmm2 4758; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 4759; SSE-NEXT: por %xmm0, %xmm2 4760; SSE-NEXT: por {{.*}}(%rip), %xmm1 4761; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 4762; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4763; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4764; SSE-NEXT: retq 4765; 4766; AVX1-LABEL: trunc_or_const_v4i64_4i32: 4767; AVX1: # BB#0: 4768; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 4769; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4770; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 4771; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4772; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 4773; AVX1-NEXT: vzeroupper 4774; AVX1-NEXT: retq 4775; 4776; AVX2-LABEL: trunc_or_const_v4i64_4i32: 4777; AVX2: # BB#0: 4778; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 4779; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 4780; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 4781; AVX2-NEXT: vzeroupper 4782; AVX2-NEXT: retq 4783; 4784; AVX512-LABEL: trunc_or_const_v4i64_4i32: 4785; AVX512: # BB#0: 4786; AVX512-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 4787; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4788; AVX512-NEXT: retq 4789 %1 = or <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 4790 %2 = trunc <4 x i64> %1 to <4 x i32> 4791 ret <4 x i32> %2 4792} 4793 4794define <8 x i16> @trunc_or_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 4795; SSE-LABEL: trunc_or_const_v16i64_v16i16: 4796; SSE: # BB#0: 4797; SSE-NEXT: movdqa %xmm0, %xmm4 4798; SSE-NEXT: movl $1, %eax 4799; SSE-NEXT: movd %rax, %xmm0 4800; SSE-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7] 4801; SSE-NEXT: por %xmm4, %xmm0 4802; SSE-NEXT: por {{.*}}(%rip), %xmm2 4803; SSE-NEXT: por {{.*}}(%rip), %xmm3 4804; SSE-NEXT: por {{.*}}(%rip), %xmm1 4805; SSE-NEXT: pextrw $4, %xmm1, %eax 4806; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 4807; SSE-NEXT: pextrw $4, %xmm0, %ecx 4808; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 4809; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 4810; SSE-NEXT: pextrw $4, %xmm3, %edx 4811; SSE-NEXT: movd %edx, %xmm1 4812; SSE-NEXT: movd %eax, %xmm3 4813; SSE-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 4814; SSE-NEXT: movd %ecx, %xmm1 4815; SSE-NEXT: pextrw $4, %xmm2, %eax 4816; SSE-NEXT: movd %eax, %xmm2 4817; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 4818; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 4819; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 4820; SSE-NEXT: retq 4821; 4822; AVX1-LABEL: trunc_or_const_v16i64_v16i16: 4823; AVX1: # BB#0: 4824; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 4825; AVX1-NEXT: vorps {{.*}}(%rip), %ymm1, %ymm1 4826; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4827; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 4828; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4829; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 4830; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 4831; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4832; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4833; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 4834; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 4835; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 4836; AVX1-NEXT: vzeroupper 4837; AVX1-NEXT: retq 4838; 4839; AVX2-LABEL: trunc_or_const_v16i64_v16i16: 4840; AVX2: # BB#0: 4841; AVX2-NEXT: vpor {{.*}}(%rip), %ymm1, %ymm1 4842; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 4843; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 4844; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 4845; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 4846; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 4847; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4848; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4849; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4850; AVX2-NEXT: vzeroupper 4851; AVX2-NEXT: retq 4852; 4853; AVX512-LABEL: trunc_or_const_v16i64_v16i16: 4854; AVX512: # BB#0: 4855; AVX512-NEXT: vporq {{.*}}(%rip), %zmm0, %zmm0 4856; AVX512-NEXT: vpmovqw %zmm0, %xmm0 4857; AVX512-NEXT: retq 4858 %1 = or <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 4859 %2 = trunc <8 x i64> %1 to <8 x i16> 4860 ret <8 x i16> %2 4861} 4862 4863define <8 x i16> @trunc_or_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 4864; SSE-LABEL: trunc_or_const_v16i32_v16i16: 4865; SSE: # BB#0: 4866; SSE-NEXT: por {{.*}}(%rip), %xmm0 4867; SSE-NEXT: por {{.*}}(%rip), %xmm1 4868; SSE-NEXT: pslld $16, %xmm1 4869; SSE-NEXT: psrad $16, %xmm1 4870; SSE-NEXT: pslld $16, %xmm0 4871; SSE-NEXT: psrad $16, %xmm0 4872; SSE-NEXT: packssdw %xmm1, %xmm0 4873; SSE-NEXT: retq 4874; 4875; AVX1-LABEL: trunc_or_const_v16i32_v16i16: 4876; AVX1: # BB#0: 4877; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 4878; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4879; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 4880; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4881; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4882; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4883; AVX1-NEXT: vzeroupper 4884; AVX1-NEXT: retq 4885; 4886; AVX2-LABEL: trunc_or_const_v16i32_v16i16: 4887; AVX2: # BB#0: 4888; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 4889; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4890; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4891; AVX2-NEXT: vzeroupper 4892; AVX2-NEXT: retq 4893; 4894; AVX512-LABEL: trunc_or_const_v16i32_v16i16: 4895; AVX512: # BB#0: 4896; AVX512-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 4897; AVX512-NEXT: vpmovdw %zmm0, %ymm0 4898; AVX512-NEXT: retq 4899 %1 = or <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 4900 %2 = trunc <8 x i32> %1 to <8 x i16> 4901 ret <8 x i16> %2 4902} 4903 4904define <16 x i8> @trunc_or_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 4905; SSE-LABEL: trunc_or_const_v16i64_v16i8: 4906; SSE: # BB#0: 4907; SSE-NEXT: movl $1, %eax 4908; SSE-NEXT: movd %rax, %xmm8 4909; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 4910; SSE-NEXT: por %xmm8, %xmm0 4911; SSE-NEXT: por {{.*}}(%rip), %xmm1 4912; SSE-NEXT: por {{.*}}(%rip), %xmm2 4913; SSE-NEXT: por {{.*}}(%rip), %xmm3 4914; SSE-NEXT: por {{.*}}(%rip), %xmm4 4915; SSE-NEXT: por {{.*}}(%rip), %xmm5 4916; SSE-NEXT: por {{.*}}(%rip), %xmm6 4917; SSE-NEXT: por {{.*}}(%rip), %xmm7 4918; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4919; SSE-NEXT: pand %xmm8, %xmm7 4920; SSE-NEXT: pand %xmm8, %xmm6 4921; SSE-NEXT: packuswb %xmm7, %xmm6 4922; SSE-NEXT: pand %xmm8, %xmm5 4923; SSE-NEXT: pand %xmm8, %xmm4 4924; SSE-NEXT: packuswb %xmm5, %xmm4 4925; SSE-NEXT: packuswb %xmm6, %xmm4 4926; SSE-NEXT: pand %xmm8, %xmm3 4927; SSE-NEXT: pand %xmm8, %xmm2 4928; SSE-NEXT: packuswb %xmm3, %xmm2 4929; SSE-NEXT: pand %xmm8, %xmm1 4930; SSE-NEXT: pand %xmm8, %xmm0 4931; SSE-NEXT: packuswb %xmm1, %xmm0 4932; SSE-NEXT: packuswb %xmm2, %xmm0 4933; SSE-NEXT: packuswb %xmm4, %xmm0 4934; SSE-NEXT: retq 4935; 4936; AVX1-LABEL: trunc_or_const_v16i64_v16i8: 4937; AVX1: # BB#0: 4938; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 4939; AVX1-NEXT: vorps {{.*}}(%rip), %ymm1, %ymm1 4940; AVX1-NEXT: vorps {{.*}}(%rip), %ymm2, %ymm2 4941; AVX1-NEXT: vorps {{.*}}(%rip), %ymm3, %ymm3 4942; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 4943; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4944; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4945; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4946; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 4947; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 4948; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4949; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 4950; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 4951; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 4952; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 4953; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4954; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 4955; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 4956; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 4957; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4958; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 4959; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 4960; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4961; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4962; AVX1-NEXT: vzeroupper 4963; AVX1-NEXT: retq 4964; 4965; AVX2-LABEL: trunc_or_const_v16i64_v16i8: 4966; AVX2: # BB#0: 4967; AVX2-NEXT: vpor {{.*}}(%rip), %ymm1, %ymm1 4968; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 4969; AVX2-NEXT: vpor {{.*}}(%rip), %ymm3, %ymm3 4970; AVX2-NEXT: vpor {{.*}}(%rip), %ymm2, %ymm2 4971; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,0,2,4,6,4,6] 4972; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,3,2,3] 4973; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,0,2,4,6,4,6] 4974; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,3,2,3] 4975; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 4976; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 4977; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 4978; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4979; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4980; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 4981; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 4982; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 4983; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,0,2,4,6,4,6] 4984; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,3,2,3] 4985; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4986; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 4987; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4988; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 4989; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 4990; AVX2-NEXT: vzeroupper 4991; AVX2-NEXT: retq 4992; 4993; AVX512-LABEL: trunc_or_const_v16i64_v16i8: 4994; AVX512: # BB#0: 4995; AVX512-NEXT: vporq {{.*}}(%rip), %zmm1, %zmm1 4996; AVX512-NEXT: vporq {{.*}}(%rip), %zmm0, %zmm0 4997; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4998; AVX512-NEXT: vpmovqd %zmm1, %ymm1 4999; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 5000; AVX512-NEXT: vpmovdb %zmm0, %xmm0 5001; AVX512-NEXT: retq 5002 %1 = or <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 5003 %2 = trunc <16 x i64> %1 to <16 x i8> 5004 ret <16 x i8> %2 5005} 5006 5007define <16 x i8> @trunc_or_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 5008; SSE-LABEL: trunc_or_const_v16i32_v16i8: 5009; SSE: # BB#0: 5010; SSE-NEXT: por {{.*}}(%rip), %xmm0 5011; SSE-NEXT: por {{.*}}(%rip), %xmm1 5012; SSE-NEXT: por {{.*}}(%rip), %xmm2 5013; SSE-NEXT: por {{.*}}(%rip), %xmm3 5014; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 5015; SSE-NEXT: pand %xmm4, %xmm3 5016; SSE-NEXT: pand %xmm4, %xmm2 5017; SSE-NEXT: packuswb %xmm3, %xmm2 5018; SSE-NEXT: pand %xmm4, %xmm1 5019; SSE-NEXT: pand %xmm4, %xmm0 5020; SSE-NEXT: packuswb %xmm1, %xmm0 5021; SSE-NEXT: packuswb %xmm2, %xmm0 5022; SSE-NEXT: retq 5023; 5024; AVX1-LABEL: trunc_or_const_v16i32_v16i8: 5025; AVX1: # BB#0: 5026; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 5027; AVX1-NEXT: vorps {{.*}}(%rip), %ymm1, %ymm1 5028; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 5029; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 5030; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 5031; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 5032; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 5033; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 5034; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 5035; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 5036; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 5037; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 5038; AVX1-NEXT: vzeroupper 5039; AVX1-NEXT: retq 5040; 5041; AVX2-LABEL: trunc_or_const_v16i32_v16i8: 5042; AVX2: # BB#0: 5043; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 5044; AVX2-NEXT: vpor {{.*}}(%rip), %ymm1, %ymm1 5045; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 5046; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 5047; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 5048; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 5049; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 5050; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 5051; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 5052; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 5053; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 5054; AVX2-NEXT: vzeroupper 5055; AVX2-NEXT: retq 5056; 5057; AVX512-LABEL: trunc_or_const_v16i32_v16i8: 5058; AVX512: # BB#0: 5059; AVX512-NEXT: vpord {{.*}}(%rip), %zmm0, %zmm0 5060; AVX512-NEXT: vpmovdb %zmm0, %xmm0 5061; AVX512-NEXT: retq 5062 %1 = or <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 5063 %2 = trunc <16 x i32> %1 to <16 x i8> 5064 ret <16 x i8> %2 5065} 5066 5067define <16 x i8> @trunc_or_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 5068; SSE-LABEL: trunc_or_const_v16i16_v16i8: 5069; SSE: # BB#0: 5070; SSE-NEXT: por {{.*}}(%rip), %xmm0 5071; SSE-NEXT: por {{.*}}(%rip), %xmm1 5072; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 5073; SSE-NEXT: pand %xmm2, %xmm1 5074; SSE-NEXT: pand %xmm2, %xmm0 5075; SSE-NEXT: packuswb %xmm1, %xmm0 5076; SSE-NEXT: retq 5077; 5078; AVX1-LABEL: trunc_or_const_v16i16_v16i8: 5079; AVX1: # BB#0: 5080; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 5081; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 5082; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 5083; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 5084; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 5085; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 5086; AVX1-NEXT: vzeroupper 5087; AVX1-NEXT: retq 5088; 5089; AVX2-LABEL: trunc_or_const_v16i16_v16i8: 5090; AVX2: # BB#0: 5091; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 5092; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 5093; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 5094; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 5095; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 5096; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 5097; AVX2-NEXT: vzeroupper 5098; AVX2-NEXT: retq 5099; 5100; AVX512F-LABEL: trunc_or_const_v16i16_v16i8: 5101; AVX512F: # BB#0: 5102; AVX512F-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 5103; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 5104; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 5105; AVX512F-NEXT: retq 5106; 5107; AVX512BW-LABEL: trunc_or_const_v16i16_v16i8: 5108; AVX512BW: # BB#0: 5109; AVX512BW-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 5110; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 5111; AVX512BW-NEXT: retq 5112 %1 = or <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 5113 %2 = trunc <16 x i16> %1 to <16 x i8> 5114 ret <16 x i8> %2 5115} 5116 5117; 5118; complex patterns - often created by vectorizer 5119; 5120 5121define <4 x i32> @mul_add_v4i64_v4i32(<4 x i32> %a0, <4 x i32> %a1) nounwind { 5122; SSE-LABEL: mul_add_v4i64_v4i32: 5123; SSE: # BB#0: 5124; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 5125; SSE-NEXT: movdqa %xmm2, %xmm3 5126; SSE-NEXT: psrad $31, %xmm3 5127; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 5128; SSE-NEXT: movdqa %xmm0, %xmm3 5129; SSE-NEXT: psrad $31, %xmm3 5130; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 5131; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] 5132; SSE-NEXT: movdqa %xmm3, %xmm4 5133; SSE-NEXT: psrad $31, %xmm4 5134; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 5135; SSE-NEXT: movdqa %xmm1, %xmm4 5136; SSE-NEXT: psrad $31, %xmm4 5137; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 5138; SSE-NEXT: movdqa %xmm0, %xmm4 5139; SSE-NEXT: pmuludq %xmm1, %xmm4 5140; SSE-NEXT: movdqa %xmm1, %xmm5 5141; SSE-NEXT: psrlq $32, %xmm5 5142; SSE-NEXT: pmuludq %xmm0, %xmm5 5143; SSE-NEXT: psllq $32, %xmm5 5144; SSE-NEXT: paddq %xmm4, %xmm5 5145; SSE-NEXT: psrlq $32, %xmm0 5146; SSE-NEXT: pmuludq %xmm1, %xmm0 5147; SSE-NEXT: psllq $32, %xmm0 5148; SSE-NEXT: paddq %xmm5, %xmm0 5149; SSE-NEXT: movdqa %xmm2, %xmm1 5150; SSE-NEXT: pmuludq %xmm3, %xmm1 5151; SSE-NEXT: movdqa %xmm3, %xmm4 5152; SSE-NEXT: psrlq $32, %xmm4 5153; SSE-NEXT: pmuludq %xmm2, %xmm4 5154; SSE-NEXT: psllq $32, %xmm4 5155; SSE-NEXT: paddq %xmm1, %xmm4 5156; SSE-NEXT: psrlq $32, %xmm2 5157; SSE-NEXT: pmuludq %xmm3, %xmm2 5158; SSE-NEXT: psllq $32, %xmm2 5159; SSE-NEXT: paddq %xmm4, %xmm2 5160; SSE-NEXT: paddq {{.*}}(%rip), %xmm2 5161; SSE-NEXT: paddq {{.*}}(%rip), %xmm0 5162; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 5163; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3] 5164; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 5165; SSE-NEXT: retq 5166; 5167; AVX1-LABEL: mul_add_v4i64_v4i32: 5168; AVX1: # BB#0: 5169; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 5170; AVX1-NEXT: vpmovsxdq %xmm2, %xmm2 5171; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 5172; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] 5173; AVX1-NEXT: vpmovsxdq %xmm3, %xmm3 5174; AVX1-NEXT: vpmovsxdq %xmm1, %xmm1 5175; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm4 5176; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm5 5177; AVX1-NEXT: vpmuludq %xmm5, %xmm0, %xmm5 5178; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 5179; AVX1-NEXT: vpaddq %xmm5, %xmm4, %xmm4 5180; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 5181; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 5182; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 5183; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm0 5184; AVX1-NEXT: vpmuludq %xmm3, %xmm2, %xmm1 5185; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm4 5186; AVX1-NEXT: vpmuludq %xmm4, %xmm2, %xmm4 5187; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 5188; AVX1-NEXT: vpaddq %xmm4, %xmm1, %xmm1 5189; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm2 5190; AVX1-NEXT: vpmuludq %xmm3, %xmm2, %xmm2 5191; AVX1-NEXT: vpsllq $32, %xmm2, %xmm2 5192; AVX1-NEXT: vpaddq %xmm2, %xmm1, %xmm1 5193; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm1 5194; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0 5195; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 5196; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 5197; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 5198; AVX1-NEXT: retq 5199; 5200; AVX2-LABEL: mul_add_v4i64_v4i32: 5201; AVX2: # BB#0: 5202; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 5203; AVX2-NEXT: vpmovsxdq %xmm1, %ymm1 5204; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm2 5205; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm3 5206; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3 5207; AVX2-NEXT: vpsllq $32, %ymm3, %ymm3 5208; AVX2-NEXT: vpaddq %ymm3, %ymm2, %ymm2 5209; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 5210; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 5211; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 5212; AVX2-NEXT: vpaddq %ymm0, %ymm2, %ymm0 5213; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 5214; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,0,2,4,6,4,6] 5215; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,3,2,3] 5216; AVX2-NEXT: vzeroupper 5217; AVX2-NEXT: retq 5218; 5219; AVX512-LABEL: mul_add_v4i64_v4i32: 5220; AVX512: # BB#0: 5221; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 5222; AVX512-NEXT: vpmovsxdq %xmm1, %ymm1 5223; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm2 5224; AVX512-NEXT: vpsrlq $32, %ymm1, %ymm3 5225; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3 5226; AVX512-NEXT: vpsllq $32, %ymm3, %ymm3 5227; AVX512-NEXT: vpaddq %ymm3, %ymm2, %ymm2 5228; AVX512-NEXT: vpsrlq $32, %ymm0, %ymm0 5229; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 5230; AVX512-NEXT: vpsllq $32, %ymm0, %ymm0 5231; AVX512-NEXT: vpaddq %ymm0, %ymm2, %ymm0 5232; AVX512-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 5233; AVX512-NEXT: vpmovqd %zmm0, %ymm0 5234; AVX512-NEXT: retq 5235 %1 = sext <4 x i32> %a0 to <4 x i64> 5236 %2 = sext <4 x i32> %a1 to <4 x i64> 5237 %3 = mul <4 x i64> %1, %2 5238 %4 = add <4 x i64> %3, <i64 -3, i64 -1, i64 1, i64 3> 5239 %5 = trunc <4 x i64> %4 to <4 x i32> 5240 ret <4 x i32> %5 5241} 5242