1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW 7 8; 9; add 10; 11 12define <4 x i32> @trunc_add_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 13; SSE-LABEL: trunc_add_v4i64_4i32: 14; SSE: # BB#0: 15; SSE-NEXT: paddq %xmm2, %xmm0 16; SSE-NEXT: paddq %xmm3, %xmm1 17; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 18; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 19; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 20; SSE-NEXT: retq 21; 22; AVX1-LABEL: trunc_add_v4i64_4i32: 23; AVX1: # BB#0: 24; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm2 25; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 26; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 27; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0 28; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 29; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[0,2,2,3] 30; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 31; AVX1-NEXT: vzeroupper 32; AVX1-NEXT: retq 33; 34; AVX2-LABEL: trunc_add_v4i64_4i32: 35; AVX2: # BB#0: 36; AVX2-NEXT: vpaddq %ymm1, %ymm0, %ymm0 37; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 38; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 39; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 40; AVX2-NEXT: vzeroupper 41; AVX2-NEXT: retq 42; 43; AVX512-LABEL: trunc_add_v4i64_4i32: 44; AVX512: # BB#0: 45; AVX512-NEXT: vpaddq %ymm1, %ymm0, %ymm0 46; AVX512-NEXT: vpmovqd %zmm0, %ymm0 47; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 48; AVX512-NEXT: retq 49 %1 = add <4 x i64> %a0, %a1 50 %2 = trunc <4 x i64> %1 to <4 x i32> 51 ret <4 x i32> %2 52} 53 54define <8 x i16> @trunc_add_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 55; SSE-LABEL: trunc_add_v8i64_8i16: 56; SSE: # BB#0: 57; SSE-NEXT: paddq %xmm4, %xmm0 58; SSE-NEXT: paddq %xmm5, %xmm1 59; SSE-NEXT: paddq %xmm6, %xmm2 60; SSE-NEXT: paddq %xmm7, %xmm3 61; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 62; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 63; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 64; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 65; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 66; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 67; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 68; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 69; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 70; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 71; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 72; SSE-NEXT: movapd %xmm2, %xmm0 73; SSE-NEXT: retq 74; 75; AVX1-LABEL: trunc_add_v8i64_8i16: 76; AVX1: # BB#0: 77; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm4 78; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 79; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 80; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0 81; AVX1-NEXT: vpaddq %xmm3, %xmm1, %xmm2 82; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 83; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 84; AVX1-NEXT: vpaddq %xmm3, %xmm1, %xmm1 85; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 86; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 87; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 88; AVX1-NEXT: vpackusdw %xmm1, %xmm2, %xmm1 89; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 90; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1,2,3],xmm4[4],xmm3[5,6,7] 91; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 92; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 93; AVX1-NEXT: vzeroupper 94; AVX1-NEXT: retq 95; 96; AVX2-LABEL: trunc_add_v8i64_8i16: 97; AVX2: # BB#0: 98; AVX2-NEXT: vpaddq %ymm3, %ymm1, %ymm1 99; AVX2-NEXT: vpaddq %ymm2, %ymm0, %ymm0 100; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 101; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 102; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 103; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 104; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 105; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 106; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 107; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 108; AVX2-NEXT: vzeroupper 109; AVX2-NEXT: retq 110; 111; AVX512-LABEL: trunc_add_v8i64_8i16: 112; AVX512: # BB#0: 113; AVX512-NEXT: vpaddq %zmm1, %zmm0, %zmm0 114; AVX512-NEXT: vpmovqw %zmm0, %xmm0 115; AVX512-NEXT: retq 116 %1 = add <8 x i64> %a0, %a1 117 %2 = trunc <8 x i64> %1 to <8 x i16> 118 ret <8 x i16> %2 119} 120 121define <8 x i16> @trunc_add_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 122; SSE-LABEL: trunc_add_v8i32_8i16: 123; SSE: # BB#0: 124; SSE-NEXT: paddd %xmm2, %xmm0 125; SSE-NEXT: paddd %xmm3, %xmm1 126; SSE-NEXT: pslld $16, %xmm1 127; SSE-NEXT: psrad $16, %xmm1 128; SSE-NEXT: pslld $16, %xmm0 129; SSE-NEXT: psrad $16, %xmm0 130; SSE-NEXT: packssdw %xmm1, %xmm0 131; SSE-NEXT: retq 132; 133; AVX1-LABEL: trunc_add_v8i32_8i16: 134; AVX1: # BB#0: 135; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm2 136; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 137; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 138; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0 139; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 140; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 141; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 142; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 143; AVX1-NEXT: vzeroupper 144; AVX1-NEXT: retq 145; 146; AVX2-LABEL: trunc_add_v8i32_8i16: 147; AVX2: # BB#0: 148; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm0 149; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 150; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 151; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 152; AVX2-NEXT: vzeroupper 153; AVX2-NEXT: retq 154; 155; AVX512-LABEL: trunc_add_v8i32_8i16: 156; AVX512: # BB#0: 157; AVX512-NEXT: vpaddd %ymm1, %ymm0, %ymm0 158; AVX512-NEXT: vpmovdw %zmm0, %ymm0 159; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 160; AVX512-NEXT: retq 161 %1 = add <8 x i32> %a0, %a1 162 %2 = trunc <8 x i32> %1 to <8 x i16> 163 ret <8 x i16> %2 164} 165 166define <16 x i8> @trunc_add_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 167; SSE-LABEL: trunc_add_v16i64_v16i8: 168; SSE: # BB#0: 169; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm0 170; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm1 171; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm2 172; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm3 173; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm4 174; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm5 175; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm6 176; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm7 177; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 178; SSE-NEXT: pand %xmm8, %xmm7 179; SSE-NEXT: pand %xmm8, %xmm6 180; SSE-NEXT: packuswb %xmm7, %xmm6 181; SSE-NEXT: pand %xmm8, %xmm5 182; SSE-NEXT: pand %xmm8, %xmm4 183; SSE-NEXT: packuswb %xmm5, %xmm4 184; SSE-NEXT: packuswb %xmm6, %xmm4 185; SSE-NEXT: pand %xmm8, %xmm3 186; SSE-NEXT: pand %xmm8, %xmm2 187; SSE-NEXT: packuswb %xmm3, %xmm2 188; SSE-NEXT: pand %xmm8, %xmm1 189; SSE-NEXT: pand %xmm8, %xmm0 190; SSE-NEXT: packuswb %xmm1, %xmm0 191; SSE-NEXT: packuswb %xmm2, %xmm0 192; SSE-NEXT: packuswb %xmm4, %xmm0 193; SSE-NEXT: retq 194; 195; AVX1-LABEL: trunc_add_v16i64_v16i8: 196; AVX1: # BB#0: 197; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm8 198; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm4 199; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 200; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm0 201; AVX1-NEXT: vpaddq %xmm5, %xmm1, %xmm4 202; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm5 203; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 204; AVX1-NEXT: vpaddq %xmm5, %xmm1, %xmm1 205; AVX1-NEXT: vpaddq %xmm6, %xmm2, %xmm5 206; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm6 207; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 208; AVX1-NEXT: vpaddq %xmm6, %xmm2, %xmm2 209; AVX1-NEXT: vpaddq %xmm7, %xmm3, %xmm6 210; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm7 211; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 212; AVX1-NEXT: vpaddq %xmm7, %xmm3, %xmm3 213; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 214; AVX1-NEXT: vpand %xmm7, %xmm3, %xmm3 215; AVX1-NEXT: vpand %xmm7, %xmm6, %xmm6 216; AVX1-NEXT: vpackuswb %xmm3, %xmm6, %xmm3 217; AVX1-NEXT: vpand %xmm7, %xmm2, %xmm2 218; AVX1-NEXT: vpand %xmm7, %xmm5, %xmm5 219; AVX1-NEXT: vpackuswb %xmm2, %xmm5, %xmm2 220; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 221; AVX1-NEXT: vpand %xmm7, %xmm1, %xmm1 222; AVX1-NEXT: vpand %xmm7, %xmm4, %xmm3 223; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 224; AVX1-NEXT: vpand %xmm7, %xmm0, %xmm0 225; AVX1-NEXT: vpand %xmm7, %xmm8, %xmm3 226; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 227; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 228; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 229; AVX1-NEXT: vzeroupper 230; AVX1-NEXT: retq 231; 232; AVX2-LABEL: trunc_add_v16i64_v16i8: 233; AVX2: # BB#0: 234; AVX2-NEXT: vpaddq %ymm5, %ymm1, %ymm1 235; AVX2-NEXT: vpaddq %ymm4, %ymm0, %ymm0 236; AVX2-NEXT: vpaddq %ymm7, %ymm3, %ymm3 237; AVX2-NEXT: vpaddq %ymm6, %ymm2, %ymm2 238; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 239; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 240; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 241; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 242; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 243; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 244; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 245; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 246; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 247; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 248; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 249; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 250; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 251; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 252; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 253; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 254; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 255; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 256; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 257; AVX2-NEXT: vzeroupper 258; AVX2-NEXT: retq 259; 260; AVX512-LABEL: trunc_add_v16i64_v16i8: 261; AVX512: # BB#0: 262; AVX512-NEXT: vpaddq %zmm3, %zmm1, %zmm1 263; AVX512-NEXT: vpaddq %zmm2, %zmm0, %zmm0 264; AVX512-NEXT: vpmovqd %zmm0, %ymm0 265; AVX512-NEXT: vpmovqd %zmm1, %ymm1 266; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 267; AVX512-NEXT: vpmovdb %zmm0, %xmm0 268; AVX512-NEXT: retq 269 %1 = add <16 x i64> %a0, %a1 270 %2 = trunc <16 x i64> %1 to <16 x i8> 271 ret <16 x i8> %2 272} 273 274define <16 x i8> @trunc_add_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 275; SSE-LABEL: trunc_add_v16i32_v16i8: 276; SSE: # BB#0: 277; SSE-NEXT: paddd %xmm4, %xmm0 278; SSE-NEXT: paddd %xmm5, %xmm1 279; SSE-NEXT: paddd %xmm6, %xmm2 280; SSE-NEXT: paddd %xmm7, %xmm3 281; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 282; SSE-NEXT: pand %xmm4, %xmm3 283; SSE-NEXT: pand %xmm4, %xmm2 284; SSE-NEXT: packuswb %xmm3, %xmm2 285; SSE-NEXT: pand %xmm4, %xmm1 286; SSE-NEXT: pand %xmm4, %xmm0 287; SSE-NEXT: packuswb %xmm1, %xmm0 288; SSE-NEXT: packuswb %xmm2, %xmm0 289; SSE-NEXT: retq 290; 291; AVX1-LABEL: trunc_add_v16i32_v16i8: 292; AVX1: # BB#0: 293; AVX1-NEXT: vpaddd %xmm2, %xmm0, %xmm4 294; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 295; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 296; AVX1-NEXT: vpaddd %xmm2, %xmm0, %xmm0 297; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm2 298; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 299; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 300; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1 301; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 302; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 303; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 304; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 305; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 306; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm2 307; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 308; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 309; AVX1-NEXT: vzeroupper 310; AVX1-NEXT: retq 311; 312; AVX2-LABEL: trunc_add_v16i32_v16i8: 313; AVX2: # BB#0: 314; AVX2-NEXT: vpaddd %ymm2, %ymm0, %ymm0 315; AVX2-NEXT: vpaddd %ymm3, %ymm1, %ymm1 316; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 317; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 318; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 319; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 320; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 321; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 322; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 323; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 324; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 325; AVX2-NEXT: vzeroupper 326; AVX2-NEXT: retq 327; 328; AVX512-LABEL: trunc_add_v16i32_v16i8: 329; AVX512: # BB#0: 330; AVX512-NEXT: vpaddd %zmm1, %zmm0, %zmm0 331; AVX512-NEXT: vpmovdb %zmm0, %xmm0 332; AVX512-NEXT: retq 333 %1 = add <16 x i32> %a0, %a1 334 %2 = trunc <16 x i32> %1 to <16 x i8> 335 ret <16 x i8> %2 336} 337 338define <16 x i8> @trunc_add_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 339; SSE-LABEL: trunc_add_v16i16_v16i8: 340; SSE: # BB#0: 341; SSE-NEXT: paddw %xmm2, %xmm0 342; SSE-NEXT: paddw %xmm3, %xmm1 343; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 344; SSE-NEXT: pand %xmm2, %xmm1 345; SSE-NEXT: pand %xmm2, %xmm0 346; SSE-NEXT: packuswb %xmm1, %xmm0 347; SSE-NEXT: retq 348; 349; AVX1-LABEL: trunc_add_v16i16_v16i8: 350; AVX1: # BB#0: 351; AVX1-NEXT: vpaddw %xmm1, %xmm0, %xmm2 352; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 353; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 354; AVX1-NEXT: vpaddw %xmm1, %xmm0, %xmm0 355; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 356; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 357; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 358; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 359; AVX1-NEXT: vzeroupper 360; AVX1-NEXT: retq 361; 362; AVX2-LABEL: trunc_add_v16i16_v16i8: 363; AVX2: # BB#0: 364; AVX2-NEXT: vpaddw %ymm1, %ymm0, %ymm0 365; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 366; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 367; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 368; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 369; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 370; AVX2-NEXT: vzeroupper 371; AVX2-NEXT: retq 372; 373; AVX512F-LABEL: trunc_add_v16i16_v16i8: 374; AVX512F: # BB#0: 375; AVX512F-NEXT: vpaddw %ymm1, %ymm0, %ymm0 376; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 377; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 378; AVX512F-NEXT: retq 379; 380; AVX512BW-LABEL: trunc_add_v16i16_v16i8: 381; AVX512BW: # BB#0: 382; AVX512BW-NEXT: vpaddw %ymm1, %ymm0, %ymm0 383; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 384; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 385; AVX512BW-NEXT: retq 386 %1 = add <16 x i16> %a0, %a1 387 %2 = trunc <16 x i16> %1 to <16 x i8> 388 ret <16 x i8> %2 389} 390 391; 392; add to constant 393; 394 395define <4 x i32> @trunc_add_const_v4i64_4i32(<4 x i64> %a0) nounwind { 396; SSE-LABEL: trunc_add_const_v4i64_4i32: 397; SSE: # BB#0: 398; SSE-NEXT: movl $1, %eax 399; SSE-NEXT: movd %rax, %xmm2 400; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 401; SSE-NEXT: paddq %xmm0, %xmm2 402; SSE-NEXT: paddq {{.*}}(%rip), %xmm1 403; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 404; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 405; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 406; SSE-NEXT: retq 407; 408; AVX1-LABEL: trunc_add_const_v4i64_4i32: 409; AVX1: # BB#0: 410; AVX1-NEXT: movl $1, %eax 411; AVX1-NEXT: vmovq %rax, %xmm1 412; AVX1-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] 413; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm1 414; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 415; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0 416; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 417; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 418; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 419; AVX1-NEXT: vzeroupper 420; AVX1-NEXT: retq 421; 422; AVX2-LABEL: trunc_add_const_v4i64_4i32: 423; AVX2: # BB#0: 424; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 425; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 426; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 427; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 428; AVX2-NEXT: vzeroupper 429; AVX2-NEXT: retq 430; 431; AVX512-LABEL: trunc_add_const_v4i64_4i32: 432; AVX512: # BB#0: 433; AVX512-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 434; AVX512-NEXT: vpmovqd %zmm0, %ymm0 435; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 436; AVX512-NEXT: retq 437 %1 = add <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 438 %2 = trunc <4 x i64> %1 to <4 x i32> 439 ret <4 x i32> %2 440} 441 442define <8 x i16> @trunc_add_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 443; SSE-LABEL: trunc_add_const_v16i64_v16i16: 444; SSE: # BB#0: 445; SSE-NEXT: movl $1, %eax 446; SSE-NEXT: movd %rax, %xmm4 447; SSE-NEXT: pslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 448; SSE-NEXT: paddq %xmm0, %xmm4 449; SSE-NEXT: paddq {{.*}}(%rip), %xmm1 450; SSE-NEXT: paddq {{.*}}(%rip), %xmm2 451; SSE-NEXT: paddq {{.*}}(%rip), %xmm3 452; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 453; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm0[0,1,0,2,4,5,6,7] 454; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 455; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 456; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 457; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm4[0,2,2,3] 458; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7] 459; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 460; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 461; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 462; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 463; SSE-NEXT: retq 464; 465; AVX1-LABEL: trunc_add_const_v16i64_v16i16: 466; AVX1: # BB#0: 467; AVX1-NEXT: movl $1, %eax 468; AVX1-NEXT: vmovq %rax, %xmm2 469; AVX1-NEXT: vpslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 470; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm2 471; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 472; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0 473; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm3 474; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 475; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm1 476; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 477; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 478; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 479; AVX1-NEXT: vpackusdw %xmm1, %xmm3, %xmm1 480; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 481; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 482; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 483; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 484; AVX1-NEXT: vzeroupper 485; AVX1-NEXT: retq 486; 487; AVX2-LABEL: trunc_add_const_v16i64_v16i16: 488; AVX2: # BB#0: 489; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm1, %ymm1 490; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 491; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 492; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 493; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 494; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 495; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 496; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 497; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 498; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 499; AVX2-NEXT: vzeroupper 500; AVX2-NEXT: retq 501; 502; AVX512-LABEL: trunc_add_const_v16i64_v16i16: 503; AVX512: # BB#0: 504; AVX512-NEXT: vpaddq {{.*}}(%rip), %zmm0, %zmm0 505; AVX512-NEXT: vpmovqw %zmm0, %xmm0 506; AVX512-NEXT: retq 507 %1 = add <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 508 %2 = trunc <8 x i64> %1 to <8 x i16> 509 ret <8 x i16> %2 510} 511 512define <8 x i16> @trunc_add_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 513; SSE-LABEL: trunc_add_const_v16i32_v16i16: 514; SSE: # BB#0: 515; SSE-NEXT: paddd {{.*}}(%rip), %xmm0 516; SSE-NEXT: paddd {{.*}}(%rip), %xmm1 517; SSE-NEXT: pslld $16, %xmm1 518; SSE-NEXT: psrad $16, %xmm1 519; SSE-NEXT: pslld $16, %xmm0 520; SSE-NEXT: psrad $16, %xmm0 521; SSE-NEXT: packssdw %xmm1, %xmm0 522; SSE-NEXT: retq 523; 524; AVX1-LABEL: trunc_add_const_v16i32_v16i16: 525; AVX1: # BB#0: 526; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm1 527; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 528; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0 529; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 530; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 531; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 532; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 533; AVX1-NEXT: vzeroupper 534; AVX1-NEXT: retq 535; 536; AVX2-LABEL: trunc_add_const_v16i32_v16i16: 537; AVX2: # BB#0: 538; AVX2-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0 539; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 540; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 541; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 542; AVX2-NEXT: vzeroupper 543; AVX2-NEXT: retq 544; 545; AVX512-LABEL: trunc_add_const_v16i32_v16i16: 546; AVX512: # BB#0: 547; AVX512-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0 548; AVX512-NEXT: vpmovdw %zmm0, %ymm0 549; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 550; AVX512-NEXT: retq 551 %1 = add <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 552 %2 = trunc <8 x i32> %1 to <8 x i16> 553 ret <8 x i16> %2 554} 555 556define <16 x i8> @trunc_add_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 557; SSE-LABEL: trunc_add_const_v16i64_v16i8: 558; SSE: # BB#0: 559; SSE-NEXT: movl $1, %eax 560; SSE-NEXT: movd %rax, %xmm8 561; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 562; SSE-NEXT: paddq %xmm8, %xmm0 563; SSE-NEXT: paddq {{.*}}(%rip), %xmm1 564; SSE-NEXT: paddq {{.*}}(%rip), %xmm2 565; SSE-NEXT: paddq {{.*}}(%rip), %xmm3 566; SSE-NEXT: paddq {{.*}}(%rip), %xmm4 567; SSE-NEXT: paddq {{.*}}(%rip), %xmm5 568; SSE-NEXT: paddq {{.*}}(%rip), %xmm6 569; SSE-NEXT: paddq {{.*}}(%rip), %xmm7 570; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 571; SSE-NEXT: pand %xmm8, %xmm7 572; SSE-NEXT: pand %xmm8, %xmm6 573; SSE-NEXT: packuswb %xmm7, %xmm6 574; SSE-NEXT: pand %xmm8, %xmm5 575; SSE-NEXT: pand %xmm8, %xmm4 576; SSE-NEXT: packuswb %xmm5, %xmm4 577; SSE-NEXT: packuswb %xmm6, %xmm4 578; SSE-NEXT: pand %xmm8, %xmm3 579; SSE-NEXT: pand %xmm8, %xmm2 580; SSE-NEXT: packuswb %xmm3, %xmm2 581; SSE-NEXT: pand %xmm8, %xmm1 582; SSE-NEXT: pand %xmm8, %xmm0 583; SSE-NEXT: packuswb %xmm1, %xmm0 584; SSE-NEXT: packuswb %xmm2, %xmm0 585; SSE-NEXT: packuswb %xmm4, %xmm0 586; SSE-NEXT: retq 587; 588; AVX1-LABEL: trunc_add_const_v16i64_v16i8: 589; AVX1: # BB#0: 590; AVX1-NEXT: movl $1, %eax 591; AVX1-NEXT: vmovq %rax, %xmm4 592; AVX1-NEXT: vpslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 593; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm8 594; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 595; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0 596; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm5 597; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 598; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm1 599; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm2, %xmm6 600; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 601; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm2, %xmm2 602; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm3, %xmm7 603; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 604; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm3, %xmm3 605; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 606; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 607; AVX1-NEXT: vpand %xmm4, %xmm7, %xmm7 608; AVX1-NEXT: vpackuswb %xmm3, %xmm7, %xmm3 609; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 610; AVX1-NEXT: vpand %xmm4, %xmm6, %xmm6 611; AVX1-NEXT: vpackuswb %xmm2, %xmm6, %xmm2 612; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 613; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 614; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm3 615; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 616; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 617; AVX1-NEXT: vpand %xmm4, %xmm8, %xmm3 618; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 619; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 620; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 621; AVX1-NEXT: vzeroupper 622; AVX1-NEXT: retq 623; 624; AVX2-LABEL: trunc_add_const_v16i64_v16i8: 625; AVX2: # BB#0: 626; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm1, %ymm1 627; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 628; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm3, %ymm3 629; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm2, %ymm2 630; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 631; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 632; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 633; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 634; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 635; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 636; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 637; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 638; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 639; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 640; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 641; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 642; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 643; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 644; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 645; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 646; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 647; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 648; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 649; AVX2-NEXT: vzeroupper 650; AVX2-NEXT: retq 651; 652; AVX512-LABEL: trunc_add_const_v16i64_v16i8: 653; AVX512: # BB#0: 654; AVX512-NEXT: vpaddq {{.*}}(%rip), %zmm1, %zmm1 655; AVX512-NEXT: vpaddq {{.*}}(%rip), %zmm0, %zmm0 656; AVX512-NEXT: vpmovqd %zmm0, %ymm0 657; AVX512-NEXT: vpmovqd %zmm1, %ymm1 658; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 659; AVX512-NEXT: vpmovdb %zmm0, %xmm0 660; AVX512-NEXT: retq 661 %1 = add <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 662 %2 = trunc <16 x i64> %1 to <16 x i8> 663 ret <16 x i8> %2 664} 665 666define <16 x i8> @trunc_add_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 667; SSE-LABEL: trunc_add_const_v16i32_v16i8: 668; SSE: # BB#0: 669; SSE-NEXT: paddd {{.*}}(%rip), %xmm0 670; SSE-NEXT: paddd {{.*}}(%rip), %xmm1 671; SSE-NEXT: paddd {{.*}}(%rip), %xmm2 672; SSE-NEXT: paddd {{.*}}(%rip), %xmm3 673; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 674; SSE-NEXT: pand %xmm4, %xmm3 675; SSE-NEXT: pand %xmm4, %xmm2 676; SSE-NEXT: packuswb %xmm3, %xmm2 677; SSE-NEXT: pand %xmm4, %xmm1 678; SSE-NEXT: pand %xmm4, %xmm0 679; SSE-NEXT: packuswb %xmm1, %xmm0 680; SSE-NEXT: packuswb %xmm2, %xmm0 681; SSE-NEXT: retq 682; 683; AVX1-LABEL: trunc_add_const_v16i32_v16i8: 684; AVX1: # BB#0: 685; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm2 686; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 687; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0 688; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm3 689; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 690; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm1 691; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 692; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 693; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 694; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 695; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 696; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 697; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 698; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 699; AVX1-NEXT: vzeroupper 700; AVX1-NEXT: retq 701; 702; AVX2-LABEL: trunc_add_const_v16i32_v16i8: 703; AVX2: # BB#0: 704; AVX2-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0 705; AVX2-NEXT: vpaddd {{.*}}(%rip), %ymm1, %ymm1 706; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 707; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 708; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 709; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 710; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 711; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 712; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 713; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 714; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 715; AVX2-NEXT: vzeroupper 716; AVX2-NEXT: retq 717; 718; AVX512-LABEL: trunc_add_const_v16i32_v16i8: 719; AVX512: # BB#0: 720; AVX512-NEXT: vpaddd {{.*}}(%rip), %zmm0, %zmm0 721; AVX512-NEXT: vpmovdb %zmm0, %xmm0 722; AVX512-NEXT: retq 723 %1 = add <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 724 %2 = trunc <16 x i32> %1 to <16 x i8> 725 ret <16 x i8> %2 726} 727 728define <16 x i8> @trunc_add_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 729; SSE-LABEL: trunc_add_const_v16i16_v16i8: 730; SSE: # BB#0: 731; SSE-NEXT: paddw {{.*}}(%rip), %xmm0 732; SSE-NEXT: paddw {{.*}}(%rip), %xmm1 733; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 734; SSE-NEXT: pand %xmm2, %xmm1 735; SSE-NEXT: pand %xmm2, %xmm0 736; SSE-NEXT: packuswb %xmm1, %xmm0 737; SSE-NEXT: retq 738; 739; AVX1-LABEL: trunc_add_const_v16i16_v16i8: 740; AVX1: # BB#0: 741; AVX1-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm1 742; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 743; AVX1-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0 744; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 745; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 746; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 747; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 748; AVX1-NEXT: vzeroupper 749; AVX1-NEXT: retq 750; 751; AVX2-LABEL: trunc_add_const_v16i16_v16i8: 752; AVX2: # BB#0: 753; AVX2-NEXT: vpaddw {{.*}}(%rip), %ymm0, %ymm0 754; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 755; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 756; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 757; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 758; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 759; AVX2-NEXT: vzeroupper 760; AVX2-NEXT: retq 761; 762; AVX512F-LABEL: trunc_add_const_v16i16_v16i8: 763; AVX512F: # BB#0: 764; AVX512F-NEXT: vpaddw {{.*}}(%rip), %ymm0, %ymm0 765; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 766; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 767; AVX512F-NEXT: retq 768; 769; AVX512BW-LABEL: trunc_add_const_v16i16_v16i8: 770; AVX512BW: # BB#0: 771; AVX512BW-NEXT: vpaddw {{.*}}(%rip), %ymm0, %ymm0 772; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 773; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 774; AVX512BW-NEXT: retq 775 %1 = add <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 776 %2 = trunc <16 x i16> %1 to <16 x i8> 777 ret <16 x i8> %2 778} 779 780; 781; sub 782; 783 784define <4 x i32> @trunc_sub_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 785; SSE-LABEL: trunc_sub_v4i64_4i32: 786; SSE: # BB#0: 787; SSE-NEXT: psubq %xmm2, %xmm0 788; SSE-NEXT: psubq %xmm3, %xmm1 789; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 790; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 791; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 792; SSE-NEXT: retq 793; 794; AVX1-LABEL: trunc_sub_v4i64_4i32: 795; AVX1: # BB#0: 796; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm2 797; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 798; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 799; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0 800; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 801; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[0,2,2,3] 802; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 803; AVX1-NEXT: vzeroupper 804; AVX1-NEXT: retq 805; 806; AVX2-LABEL: trunc_sub_v4i64_4i32: 807; AVX2: # BB#0: 808; AVX2-NEXT: vpsubq %ymm1, %ymm0, %ymm0 809; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 810; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 811; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 812; AVX2-NEXT: vzeroupper 813; AVX2-NEXT: retq 814; 815; AVX512-LABEL: trunc_sub_v4i64_4i32: 816; AVX512: # BB#0: 817; AVX512-NEXT: vpsubq %ymm1, %ymm0, %ymm0 818; AVX512-NEXT: vpmovqd %zmm0, %ymm0 819; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 820; AVX512-NEXT: retq 821 %1 = sub <4 x i64> %a0, %a1 822 %2 = trunc <4 x i64> %1 to <4 x i32> 823 ret <4 x i32> %2 824} 825 826define <8 x i16> @trunc_sub_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 827; SSE-LABEL: trunc_sub_v8i64_8i16: 828; SSE: # BB#0: 829; SSE-NEXT: psubq %xmm4, %xmm0 830; SSE-NEXT: psubq %xmm5, %xmm1 831; SSE-NEXT: psubq %xmm6, %xmm2 832; SSE-NEXT: psubq %xmm7, %xmm3 833; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 834; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 835; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 836; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 837; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 838; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 839; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 840; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 841; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 842; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 843; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 844; SSE-NEXT: movapd %xmm2, %xmm0 845; SSE-NEXT: retq 846; 847; AVX1-LABEL: trunc_sub_v8i64_8i16: 848; AVX1: # BB#0: 849; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm4 850; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 851; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 852; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm0 853; AVX1-NEXT: vpsubq %xmm3, %xmm1, %xmm2 854; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 855; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 856; AVX1-NEXT: vpsubq %xmm3, %xmm1, %xmm1 857; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 858; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 859; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 860; AVX1-NEXT: vpackusdw %xmm1, %xmm2, %xmm1 861; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 862; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1,2,3],xmm4[4],xmm3[5,6,7] 863; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 864; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 865; AVX1-NEXT: vzeroupper 866; AVX1-NEXT: retq 867; 868; AVX2-LABEL: trunc_sub_v8i64_8i16: 869; AVX2: # BB#0: 870; AVX2-NEXT: vpsubq %ymm3, %ymm1, %ymm1 871; AVX2-NEXT: vpsubq %ymm2, %ymm0, %ymm0 872; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 873; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 874; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 875; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 876; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 877; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 878; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 879; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 880; AVX2-NEXT: vzeroupper 881; AVX2-NEXT: retq 882; 883; AVX512-LABEL: trunc_sub_v8i64_8i16: 884; AVX512: # BB#0: 885; AVX512-NEXT: vpsubq %zmm1, %zmm0, %zmm0 886; AVX512-NEXT: vpmovqw %zmm0, %xmm0 887; AVX512-NEXT: retq 888 %1 = sub <8 x i64> %a0, %a1 889 %2 = trunc <8 x i64> %1 to <8 x i16> 890 ret <8 x i16> %2 891} 892 893define <8 x i16> @trunc_sub_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 894; SSE-LABEL: trunc_sub_v8i32_8i16: 895; SSE: # BB#0: 896; SSE-NEXT: psubd %xmm2, %xmm0 897; SSE-NEXT: psubd %xmm3, %xmm1 898; SSE-NEXT: pslld $16, %xmm1 899; SSE-NEXT: psrad $16, %xmm1 900; SSE-NEXT: pslld $16, %xmm0 901; SSE-NEXT: psrad $16, %xmm0 902; SSE-NEXT: packssdw %xmm1, %xmm0 903; SSE-NEXT: retq 904; 905; AVX1-LABEL: trunc_sub_v8i32_8i16: 906; AVX1: # BB#0: 907; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm2 908; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 909; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 910; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm0 911; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 912; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 913; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 914; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 915; AVX1-NEXT: vzeroupper 916; AVX1-NEXT: retq 917; 918; AVX2-LABEL: trunc_sub_v8i32_8i16: 919; AVX2: # BB#0: 920; AVX2-NEXT: vpsubd %ymm1, %ymm0, %ymm0 921; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 922; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 923; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 924; AVX2-NEXT: vzeroupper 925; AVX2-NEXT: retq 926; 927; AVX512-LABEL: trunc_sub_v8i32_8i16: 928; AVX512: # BB#0: 929; AVX512-NEXT: vpsubd %ymm1, %ymm0, %ymm0 930; AVX512-NEXT: vpmovdw %zmm0, %ymm0 931; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 932; AVX512-NEXT: retq 933 %1 = sub <8 x i32> %a0, %a1 934 %2 = trunc <8 x i32> %1 to <8 x i16> 935 ret <8 x i16> %2 936} 937 938define <16 x i8> @trunc_sub_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 939; SSE-LABEL: trunc_sub_v16i64_v16i8: 940; SSE: # BB#0: 941; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm0 942; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm1 943; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm2 944; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm3 945; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm4 946; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm5 947; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm6 948; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm7 949; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 950; SSE-NEXT: pand %xmm8, %xmm7 951; SSE-NEXT: pand %xmm8, %xmm6 952; SSE-NEXT: packuswb %xmm7, %xmm6 953; SSE-NEXT: pand %xmm8, %xmm5 954; SSE-NEXT: pand %xmm8, %xmm4 955; SSE-NEXT: packuswb %xmm5, %xmm4 956; SSE-NEXT: packuswb %xmm6, %xmm4 957; SSE-NEXT: pand %xmm8, %xmm3 958; SSE-NEXT: pand %xmm8, %xmm2 959; SSE-NEXT: packuswb %xmm3, %xmm2 960; SSE-NEXT: pand %xmm8, %xmm1 961; SSE-NEXT: pand %xmm8, %xmm0 962; SSE-NEXT: packuswb %xmm1, %xmm0 963; SSE-NEXT: packuswb %xmm2, %xmm0 964; SSE-NEXT: packuswb %xmm4, %xmm0 965; SSE-NEXT: retq 966; 967; AVX1-LABEL: trunc_sub_v16i64_v16i8: 968; AVX1: # BB#0: 969; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm8 970; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm4 971; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 972; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm0 973; AVX1-NEXT: vpsubq %xmm5, %xmm1, %xmm4 974; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm5 975; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 976; AVX1-NEXT: vpsubq %xmm5, %xmm1, %xmm1 977; AVX1-NEXT: vpsubq %xmm6, %xmm2, %xmm5 978; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm6 979; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 980; AVX1-NEXT: vpsubq %xmm6, %xmm2, %xmm2 981; AVX1-NEXT: vpsubq %xmm7, %xmm3, %xmm6 982; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm7 983; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 984; AVX1-NEXT: vpsubq %xmm7, %xmm3, %xmm3 985; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 986; AVX1-NEXT: vpand %xmm7, %xmm3, %xmm3 987; AVX1-NEXT: vpand %xmm7, %xmm6, %xmm6 988; AVX1-NEXT: vpackuswb %xmm3, %xmm6, %xmm3 989; AVX1-NEXT: vpand %xmm7, %xmm2, %xmm2 990; AVX1-NEXT: vpand %xmm7, %xmm5, %xmm5 991; AVX1-NEXT: vpackuswb %xmm2, %xmm5, %xmm2 992; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 993; AVX1-NEXT: vpand %xmm7, %xmm1, %xmm1 994; AVX1-NEXT: vpand %xmm7, %xmm4, %xmm3 995; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 996; AVX1-NEXT: vpand %xmm7, %xmm0, %xmm0 997; AVX1-NEXT: vpand %xmm7, %xmm8, %xmm3 998; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 999; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1000; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 1001; AVX1-NEXT: vzeroupper 1002; AVX1-NEXT: retq 1003; 1004; AVX2-LABEL: trunc_sub_v16i64_v16i8: 1005; AVX2: # BB#0: 1006; AVX2-NEXT: vpsubq %ymm5, %ymm1, %ymm1 1007; AVX2-NEXT: vpsubq %ymm4, %ymm0, %ymm0 1008; AVX2-NEXT: vpsubq %ymm7, %ymm3, %ymm3 1009; AVX2-NEXT: vpsubq %ymm6, %ymm2, %ymm2 1010; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 1011; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1012; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 1013; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 1014; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 1015; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 1016; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 1017; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1018; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1019; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 1020; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1021; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1022; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 1023; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1024; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1025; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 1026; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1027; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 1028; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 1029; AVX2-NEXT: vzeroupper 1030; AVX2-NEXT: retq 1031; 1032; AVX512-LABEL: trunc_sub_v16i64_v16i8: 1033; AVX512: # BB#0: 1034; AVX512-NEXT: vpsubq %zmm3, %zmm1, %zmm1 1035; AVX512-NEXT: vpsubq %zmm2, %zmm0, %zmm0 1036; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1037; AVX512-NEXT: vpmovqd %zmm1, %ymm1 1038; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 1039; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1040; AVX512-NEXT: retq 1041 %1 = sub <16 x i64> %a0, %a1 1042 %2 = trunc <16 x i64> %1 to <16 x i8> 1043 ret <16 x i8> %2 1044} 1045 1046define <16 x i8> @trunc_sub_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 1047; SSE-LABEL: trunc_sub_v16i32_v16i8: 1048; SSE: # BB#0: 1049; SSE-NEXT: psubd %xmm4, %xmm0 1050; SSE-NEXT: psubd %xmm5, %xmm1 1051; SSE-NEXT: psubd %xmm6, %xmm2 1052; SSE-NEXT: psubd %xmm7, %xmm3 1053; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1054; SSE-NEXT: pand %xmm4, %xmm3 1055; SSE-NEXT: pand %xmm4, %xmm2 1056; SSE-NEXT: packuswb %xmm3, %xmm2 1057; SSE-NEXT: pand %xmm4, %xmm1 1058; SSE-NEXT: pand %xmm4, %xmm0 1059; SSE-NEXT: packuswb %xmm1, %xmm0 1060; SSE-NEXT: packuswb %xmm2, %xmm0 1061; SSE-NEXT: retq 1062; 1063; AVX1-LABEL: trunc_sub_v16i32_v16i8: 1064; AVX1: # BB#0: 1065; AVX1-NEXT: vpsubd %xmm2, %xmm0, %xmm4 1066; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 1067; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1068; AVX1-NEXT: vpsubd %xmm2, %xmm0, %xmm0 1069; AVX1-NEXT: vpsubd %xmm3, %xmm1, %xmm2 1070; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 1071; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1072; AVX1-NEXT: vpsubd %xmm3, %xmm1, %xmm1 1073; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1074; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 1075; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 1076; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 1077; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 1078; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm2 1079; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 1080; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1081; AVX1-NEXT: vzeroupper 1082; AVX1-NEXT: retq 1083; 1084; AVX2-LABEL: trunc_sub_v16i32_v16i8: 1085; AVX2: # BB#0: 1086; AVX2-NEXT: vpsubd %ymm2, %ymm0, %ymm0 1087; AVX2-NEXT: vpsubd %ymm3, %ymm1, %ymm1 1088; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 1089; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 1090; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1091; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1092; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 1093; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 1094; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1095; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 1096; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1097; AVX2-NEXT: vzeroupper 1098; AVX2-NEXT: retq 1099; 1100; AVX512-LABEL: trunc_sub_v16i32_v16i8: 1101; AVX512: # BB#0: 1102; AVX512-NEXT: vpsubd %zmm1, %zmm0, %zmm0 1103; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1104; AVX512-NEXT: retq 1105 %1 = sub <16 x i32> %a0, %a1 1106 %2 = trunc <16 x i32> %1 to <16 x i8> 1107 ret <16 x i8> %2 1108} 1109 1110define <16 x i8> @trunc_sub_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 1111; SSE-LABEL: trunc_sub_v16i16_v16i8: 1112; SSE: # BB#0: 1113; SSE-NEXT: psubw %xmm2, %xmm0 1114; SSE-NEXT: psubw %xmm3, %xmm1 1115; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1116; SSE-NEXT: pand %xmm2, %xmm1 1117; SSE-NEXT: pand %xmm2, %xmm0 1118; SSE-NEXT: packuswb %xmm1, %xmm0 1119; SSE-NEXT: retq 1120; 1121; AVX1-LABEL: trunc_sub_v16i16_v16i8: 1122; AVX1: # BB#0: 1123; AVX1-NEXT: vpsubw %xmm1, %xmm0, %xmm2 1124; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1125; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1126; AVX1-NEXT: vpsubw %xmm1, %xmm0, %xmm0 1127; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1128; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 1129; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 1130; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1131; AVX1-NEXT: vzeroupper 1132; AVX1-NEXT: retq 1133; 1134; AVX2-LABEL: trunc_sub_v16i16_v16i8: 1135; AVX2: # BB#0: 1136; AVX2-NEXT: vpsubw %ymm1, %ymm0, %ymm0 1137; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1138; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1139; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1140; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1141; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1142; AVX2-NEXT: vzeroupper 1143; AVX2-NEXT: retq 1144; 1145; AVX512F-LABEL: trunc_sub_v16i16_v16i8: 1146; AVX512F: # BB#0: 1147; AVX512F-NEXT: vpsubw %ymm1, %ymm0, %ymm0 1148; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 1149; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 1150; AVX512F-NEXT: retq 1151; 1152; AVX512BW-LABEL: trunc_sub_v16i16_v16i8: 1153; AVX512BW: # BB#0: 1154; AVX512BW-NEXT: vpsubw %ymm1, %ymm0, %ymm0 1155; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1156; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1157; AVX512BW-NEXT: retq 1158 %1 = sub <16 x i16> %a0, %a1 1159 %2 = trunc <16 x i16> %1 to <16 x i8> 1160 ret <16 x i8> %2 1161} 1162 1163; 1164; sub to constant 1165; 1166 1167define <4 x i32> @trunc_sub_const_v4i64_4i32(<4 x i64> %a0) nounwind { 1168; SSE-LABEL: trunc_sub_const_v4i64_4i32: 1169; SSE: # BB#0: 1170; SSE-NEXT: movl $1, %eax 1171; SSE-NEXT: movd %rax, %xmm2 1172; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 1173; SSE-NEXT: psubq %xmm2, %xmm0 1174; SSE-NEXT: psubq {{.*}}(%rip), %xmm1 1175; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1176; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1177; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1178; SSE-NEXT: retq 1179; 1180; AVX1-LABEL: trunc_sub_const_v4i64_4i32: 1181; AVX1: # BB#0: 1182; AVX1-NEXT: movl $1, %eax 1183; AVX1-NEXT: vmovq %rax, %xmm1 1184; AVX1-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] 1185; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm1 1186; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1187; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm0, %xmm0 1188; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1189; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 1190; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 1191; AVX1-NEXT: vzeroupper 1192; AVX1-NEXT: retq 1193; 1194; AVX2-LABEL: trunc_sub_const_v4i64_4i32: 1195; AVX2: # BB#0: 1196; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1197; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1198; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1199; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1200; AVX2-NEXT: vzeroupper 1201; AVX2-NEXT: retq 1202; 1203; AVX512-LABEL: trunc_sub_const_v4i64_4i32: 1204; AVX512: # BB#0: 1205; AVX512-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1206; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1207; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1208; AVX512-NEXT: retq 1209 %1 = sub <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 1210 %2 = trunc <4 x i64> %1 to <4 x i32> 1211 ret <4 x i32> %2 1212} 1213 1214define <8 x i16> @trunc_sub_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 1215; SSE-LABEL: trunc_sub_const_v16i64_v16i16: 1216; SSE: # BB#0: 1217; SSE-NEXT: movl $1, %eax 1218; SSE-NEXT: movd %rax, %xmm4 1219; SSE-NEXT: pslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 1220; SSE-NEXT: psubq %xmm4, %xmm0 1221; SSE-NEXT: psubq {{.*}}(%rip), %xmm1 1222; SSE-NEXT: psubq {{.*}}(%rip), %xmm2 1223; SSE-NEXT: psubq {{.*}}(%rip), %xmm3 1224; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 1225; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 1226; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 1227; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 1228; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 1229; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1230; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 1231; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1232; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 1233; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1234; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 1235; SSE-NEXT: movapd %xmm2, %xmm0 1236; SSE-NEXT: retq 1237; 1238; AVX1-LABEL: trunc_sub_const_v16i64_v16i16: 1239; AVX1: # BB#0: 1240; AVX1-NEXT: movl $1, %eax 1241; AVX1-NEXT: vmovq %rax, %xmm2 1242; AVX1-NEXT: vpslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 1243; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm2 1244; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1245; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm0, %xmm0 1246; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm3 1247; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1248; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm1 1249; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 1250; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 1251; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 1252; AVX1-NEXT: vpackusdw %xmm1, %xmm3, %xmm1 1253; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 1254; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 1255; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 1256; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1257; AVX1-NEXT: vzeroupper 1258; AVX1-NEXT: retq 1259; 1260; AVX2-LABEL: trunc_sub_const_v16i64_v16i16: 1261; AVX2: # BB#0: 1262; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm1, %ymm1 1263; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1264; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1265; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1266; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 1267; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1268; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1269; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 1270; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1271; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1272; AVX2-NEXT: vzeroupper 1273; AVX2-NEXT: retq 1274; 1275; AVX512-LABEL: trunc_sub_const_v16i64_v16i16: 1276; AVX512: # BB#0: 1277; AVX512-NEXT: vpsubq {{.*}}(%rip), %zmm0, %zmm0 1278; AVX512-NEXT: vpmovqw %zmm0, %xmm0 1279; AVX512-NEXT: retq 1280 %1 = sub <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 1281 %2 = trunc <8 x i64> %1 to <8 x i16> 1282 ret <8 x i16> %2 1283} 1284 1285define <8 x i16> @trunc_sub_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 1286; SSE-LABEL: trunc_sub_const_v16i32_v16i16: 1287; SSE: # BB#0: 1288; SSE-NEXT: psubd {{.*}}(%rip), %xmm0 1289; SSE-NEXT: psubd {{.*}}(%rip), %xmm1 1290; SSE-NEXT: pslld $16, %xmm1 1291; SSE-NEXT: psrad $16, %xmm1 1292; SSE-NEXT: pslld $16, %xmm0 1293; SSE-NEXT: psrad $16, %xmm0 1294; SSE-NEXT: packssdw %xmm1, %xmm0 1295; SSE-NEXT: retq 1296; 1297; AVX1-LABEL: trunc_sub_const_v16i32_v16i16: 1298; AVX1: # BB#0: 1299; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm1 1300; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1301; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm0 1302; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 1303; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1304; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1305; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1306; AVX1-NEXT: vzeroupper 1307; AVX1-NEXT: retq 1308; 1309; AVX2-LABEL: trunc_sub_const_v16i32_v16i16: 1310; AVX2: # BB#0: 1311; AVX2-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0 1312; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 1313; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1314; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1315; AVX2-NEXT: vzeroupper 1316; AVX2-NEXT: retq 1317; 1318; AVX512-LABEL: trunc_sub_const_v16i32_v16i16: 1319; AVX512: # BB#0: 1320; AVX512-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0 1321; AVX512-NEXT: vpmovdw %zmm0, %ymm0 1322; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1323; AVX512-NEXT: retq 1324 %1 = sub <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1325 %2 = trunc <8 x i32> %1 to <8 x i16> 1326 ret <8 x i16> %2 1327} 1328 1329define <16 x i8> @trunc_sub_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 1330; SSE-LABEL: trunc_sub_const_v16i64_v16i8: 1331; SSE: # BB#0: 1332; SSE-NEXT: movl $1, %eax 1333; SSE-NEXT: movd %rax, %xmm8 1334; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 1335; SSE-NEXT: psubq %xmm8, %xmm0 1336; SSE-NEXT: psubq {{.*}}(%rip), %xmm1 1337; SSE-NEXT: psubq {{.*}}(%rip), %xmm2 1338; SSE-NEXT: psubq {{.*}}(%rip), %xmm3 1339; SSE-NEXT: psubq {{.*}}(%rip), %xmm4 1340; SSE-NEXT: psubq {{.*}}(%rip), %xmm5 1341; SSE-NEXT: psubq {{.*}}(%rip), %xmm6 1342; SSE-NEXT: psubq {{.*}}(%rip), %xmm7 1343; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 1344; SSE-NEXT: pand %xmm8, %xmm7 1345; SSE-NEXT: pand %xmm8, %xmm6 1346; SSE-NEXT: packuswb %xmm7, %xmm6 1347; SSE-NEXT: pand %xmm8, %xmm5 1348; SSE-NEXT: pand %xmm8, %xmm4 1349; SSE-NEXT: packuswb %xmm5, %xmm4 1350; SSE-NEXT: packuswb %xmm6, %xmm4 1351; SSE-NEXT: pand %xmm8, %xmm3 1352; SSE-NEXT: pand %xmm8, %xmm2 1353; SSE-NEXT: packuswb %xmm3, %xmm2 1354; SSE-NEXT: pand %xmm8, %xmm1 1355; SSE-NEXT: pand %xmm8, %xmm0 1356; SSE-NEXT: packuswb %xmm1, %xmm0 1357; SSE-NEXT: packuswb %xmm2, %xmm0 1358; SSE-NEXT: packuswb %xmm4, %xmm0 1359; SSE-NEXT: retq 1360; 1361; AVX1-LABEL: trunc_sub_const_v16i64_v16i8: 1362; AVX1: # BB#0: 1363; AVX1-NEXT: movl $1, %eax 1364; AVX1-NEXT: vmovq %rax, %xmm4 1365; AVX1-NEXT: vpslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 1366; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm8 1367; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1368; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm0, %xmm0 1369; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm5 1370; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1371; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm1 1372; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm2, %xmm6 1373; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 1374; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm2, %xmm2 1375; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm3, %xmm7 1376; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 1377; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm3, %xmm3 1378; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 1379; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 1380; AVX1-NEXT: vpand %xmm4, %xmm7, %xmm7 1381; AVX1-NEXT: vpackuswb %xmm3, %xmm7, %xmm3 1382; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 1383; AVX1-NEXT: vpand %xmm4, %xmm6, %xmm6 1384; AVX1-NEXT: vpackuswb %xmm2, %xmm6, %xmm2 1385; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 1386; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 1387; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm3 1388; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 1389; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 1390; AVX1-NEXT: vpand %xmm4, %xmm8, %xmm3 1391; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 1392; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1393; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 1394; AVX1-NEXT: vzeroupper 1395; AVX1-NEXT: retq 1396; 1397; AVX2-LABEL: trunc_sub_const_v16i64_v16i8: 1398; AVX2: # BB#0: 1399; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm1, %ymm1 1400; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1401; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm3, %ymm3 1402; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm2, %ymm2 1403; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 1404; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1405; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 1406; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 1407; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 1408; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 1409; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 1410; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1411; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1412; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 1413; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1414; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1415; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 1416; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1417; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1418; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 1419; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1420; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 1421; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 1422; AVX2-NEXT: vzeroupper 1423; AVX2-NEXT: retq 1424; 1425; AVX512-LABEL: trunc_sub_const_v16i64_v16i8: 1426; AVX512: # BB#0: 1427; AVX512-NEXT: vpsubq {{.*}}(%rip), %zmm1, %zmm1 1428; AVX512-NEXT: vpsubq {{.*}}(%rip), %zmm0, %zmm0 1429; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1430; AVX512-NEXT: vpmovqd %zmm1, %ymm1 1431; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 1432; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1433; AVX512-NEXT: retq 1434 %1 = sub <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 1435 %2 = trunc <16 x i64> %1 to <16 x i8> 1436 ret <16 x i8> %2 1437} 1438 1439define <16 x i8> @trunc_sub_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 1440; SSE-LABEL: trunc_sub_const_v16i32_v16i8: 1441; SSE: # BB#0: 1442; SSE-NEXT: psubd {{.*}}(%rip), %xmm0 1443; SSE-NEXT: psubd {{.*}}(%rip), %xmm1 1444; SSE-NEXT: psubd {{.*}}(%rip), %xmm2 1445; SSE-NEXT: psubd {{.*}}(%rip), %xmm3 1446; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1447; SSE-NEXT: pand %xmm4, %xmm3 1448; SSE-NEXT: pand %xmm4, %xmm2 1449; SSE-NEXT: packuswb %xmm3, %xmm2 1450; SSE-NEXT: pand %xmm4, %xmm1 1451; SSE-NEXT: pand %xmm4, %xmm0 1452; SSE-NEXT: packuswb %xmm1, %xmm0 1453; SSE-NEXT: packuswb %xmm2, %xmm0 1454; SSE-NEXT: retq 1455; 1456; AVX1-LABEL: trunc_sub_const_v16i32_v16i8: 1457; AVX1: # BB#0: 1458; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm2 1459; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1460; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm0 1461; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm1, %xmm3 1462; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1463; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm1, %xmm1 1464; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1465; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 1466; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 1467; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 1468; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 1469; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 1470; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 1471; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1472; AVX1-NEXT: vzeroupper 1473; AVX1-NEXT: retq 1474; 1475; AVX2-LABEL: trunc_sub_const_v16i32_v16i8: 1476; AVX2: # BB#0: 1477; AVX2-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0 1478; AVX2-NEXT: vpsubd {{.*}}(%rip), %ymm1, %ymm1 1479; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 1480; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 1481; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1482; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1483; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 1484; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 1485; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1486; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 1487; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1488; AVX2-NEXT: vzeroupper 1489; AVX2-NEXT: retq 1490; 1491; AVX512-LABEL: trunc_sub_const_v16i32_v16i8: 1492; AVX512: # BB#0: 1493; AVX512-NEXT: vpsubd {{.*}}(%rip), %zmm0, %zmm0 1494; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1495; AVX512-NEXT: retq 1496 %1 = sub <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 1497 %2 = trunc <16 x i32> %1 to <16 x i8> 1498 ret <16 x i8> %2 1499} 1500 1501define <16 x i8> @trunc_sub_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 1502; SSE-LABEL: trunc_sub_const_v16i16_v16i8: 1503; SSE: # BB#0: 1504; SSE-NEXT: psubw {{.*}}(%rip), %xmm0 1505; SSE-NEXT: psubw {{.*}}(%rip), %xmm1 1506; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1507; SSE-NEXT: pand %xmm2, %xmm1 1508; SSE-NEXT: pand %xmm2, %xmm0 1509; SSE-NEXT: packuswb %xmm1, %xmm0 1510; SSE-NEXT: retq 1511; 1512; AVX1-LABEL: trunc_sub_const_v16i16_v16i8: 1513; AVX1: # BB#0: 1514; AVX1-NEXT: vpsubw {{.*}}(%rip), %xmm0, %xmm1 1515; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1516; AVX1-NEXT: vpsubw {{.*}}(%rip), %xmm0, %xmm0 1517; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1518; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1519; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1520; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1521; AVX1-NEXT: vzeroupper 1522; AVX1-NEXT: retq 1523; 1524; AVX2-LABEL: trunc_sub_const_v16i16_v16i8: 1525; AVX2: # BB#0: 1526; AVX2-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 1527; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1528; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1529; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1530; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1531; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1532; AVX2-NEXT: vzeroupper 1533; AVX2-NEXT: retq 1534; 1535; AVX512F-LABEL: trunc_sub_const_v16i16_v16i8: 1536; AVX512F: # BB#0: 1537; AVX512F-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 1538; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 1539; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 1540; AVX512F-NEXT: retq 1541; 1542; AVX512BW-LABEL: trunc_sub_const_v16i16_v16i8: 1543; AVX512BW: # BB#0: 1544; AVX512BW-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 1545; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1546; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1547; AVX512BW-NEXT: retq 1548 %1 = sub <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 1549 %2 = trunc <16 x i16> %1 to <16 x i8> 1550 ret <16 x i8> %2 1551} 1552 1553; 1554; mul 1555; 1556 1557define <4 x i32> @trunc_mul_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 1558; SSE-LABEL: trunc_mul_v4i64_4i32: 1559; SSE: # BB#0: 1560; SSE-NEXT: movdqa %xmm0, %xmm4 1561; SSE-NEXT: pmuludq %xmm2, %xmm4 1562; SSE-NEXT: movdqa %xmm2, %xmm5 1563; SSE-NEXT: psrlq $32, %xmm5 1564; SSE-NEXT: pmuludq %xmm0, %xmm5 1565; SSE-NEXT: psllq $32, %xmm5 1566; SSE-NEXT: psrlq $32, %xmm0 1567; SSE-NEXT: pmuludq %xmm2, %xmm0 1568; SSE-NEXT: psllq $32, %xmm0 1569; SSE-NEXT: paddq %xmm5, %xmm0 1570; SSE-NEXT: paddq %xmm4, %xmm0 1571; SSE-NEXT: movdqa %xmm1, %xmm2 1572; SSE-NEXT: pmuludq %xmm3, %xmm2 1573; SSE-NEXT: movdqa %xmm3, %xmm4 1574; SSE-NEXT: psrlq $32, %xmm4 1575; SSE-NEXT: pmuludq %xmm1, %xmm4 1576; SSE-NEXT: psllq $32, %xmm4 1577; SSE-NEXT: psrlq $32, %xmm1 1578; SSE-NEXT: pmuludq %xmm3, %xmm1 1579; SSE-NEXT: psllq $32, %xmm1 1580; SSE-NEXT: paddq %xmm4, %xmm1 1581; SSE-NEXT: paddq %xmm2, %xmm1 1582; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1583; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1584; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1585; SSE-NEXT: retq 1586; 1587; AVX1-LABEL: trunc_mul_v4i64_4i32: 1588; AVX1: # BB#0: 1589; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 1590; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm3 1591; AVX1-NEXT: vpmuludq %xmm3, %xmm0, %xmm3 1592; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3 1593; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm4 1594; AVX1-NEXT: vpmuludq %xmm1, %xmm4, %xmm4 1595; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 1596; AVX1-NEXT: vpaddq %xmm4, %xmm3, %xmm3 1597; AVX1-NEXT: vpaddq %xmm3, %xmm2, %xmm2 1598; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1599; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1600; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm3 1601; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm4 1602; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm4 1603; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 1604; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 1605; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 1606; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 1607; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm0 1608; AVX1-NEXT: vpaddq %xmm0, %xmm3, %xmm0 1609; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 1610; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm2[0,2,2,3] 1611; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 1612; AVX1-NEXT: vzeroupper 1613; AVX1-NEXT: retq 1614; 1615; AVX2-LABEL: trunc_mul_v4i64_4i32: 1616; AVX2: # BB#0: 1617; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm2 1618; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm3 1619; AVX2-NEXT: vpmuludq %ymm3, %ymm0, %ymm3 1620; AVX2-NEXT: vpsllq $32, %ymm3, %ymm3 1621; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 1622; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 1623; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 1624; AVX2-NEXT: vpaddq %ymm0, %ymm3, %ymm0 1625; AVX2-NEXT: vpaddq %ymm0, %ymm2, %ymm0 1626; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1627; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1628; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1629; AVX2-NEXT: vzeroupper 1630; AVX2-NEXT: retq 1631; 1632; AVX512-LABEL: trunc_mul_v4i64_4i32: 1633; AVX512: # BB#0: 1634; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm2 1635; AVX512-NEXT: vpsrlq $32, %ymm1, %ymm3 1636; AVX512-NEXT: vpmuludq %ymm3, %ymm0, %ymm3 1637; AVX512-NEXT: vpsllq $32, %ymm3, %ymm3 1638; AVX512-NEXT: vpsrlq $32, %ymm0, %ymm0 1639; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 1640; AVX512-NEXT: vpsllq $32, %ymm0, %ymm0 1641; AVX512-NEXT: vpaddq %ymm0, %ymm3, %ymm0 1642; AVX512-NEXT: vpaddq %ymm0, %ymm2, %ymm0 1643; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1644; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1645; AVX512-NEXT: retq 1646 %1 = mul <4 x i64> %a0, %a1 1647 %2 = trunc <4 x i64> %1 to <4 x i32> 1648 ret <4 x i32> %2 1649} 1650 1651define <8 x i16> @trunc_mul_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 1652; SSE-LABEL: trunc_mul_v8i64_8i16: 1653; SSE: # BB#0: 1654; SSE-NEXT: movdqa %xmm0, %xmm8 1655; SSE-NEXT: pmuludq %xmm4, %xmm8 1656; SSE-NEXT: movdqa %xmm4, %xmm9 1657; SSE-NEXT: psrlq $32, %xmm9 1658; SSE-NEXT: pmuludq %xmm0, %xmm9 1659; SSE-NEXT: psllq $32, %xmm9 1660; SSE-NEXT: psrlq $32, %xmm0 1661; SSE-NEXT: pmuludq %xmm4, %xmm0 1662; SSE-NEXT: psllq $32, %xmm0 1663; SSE-NEXT: paddq %xmm9, %xmm0 1664; SSE-NEXT: paddq %xmm8, %xmm0 1665; SSE-NEXT: movdqa %xmm1, %xmm8 1666; SSE-NEXT: pmuludq %xmm5, %xmm8 1667; SSE-NEXT: movdqa %xmm5, %xmm4 1668; SSE-NEXT: psrlq $32, %xmm4 1669; SSE-NEXT: pmuludq %xmm1, %xmm4 1670; SSE-NEXT: psllq $32, %xmm4 1671; SSE-NEXT: psrlq $32, %xmm1 1672; SSE-NEXT: pmuludq %xmm5, %xmm1 1673; SSE-NEXT: psllq $32, %xmm1 1674; SSE-NEXT: paddq %xmm4, %xmm1 1675; SSE-NEXT: paddq %xmm8, %xmm1 1676; SSE-NEXT: movdqa %xmm2, %xmm4 1677; SSE-NEXT: pmuludq %xmm6, %xmm4 1678; SSE-NEXT: movdqa %xmm6, %xmm5 1679; SSE-NEXT: psrlq $32, %xmm5 1680; SSE-NEXT: pmuludq %xmm2, %xmm5 1681; SSE-NEXT: psllq $32, %xmm5 1682; SSE-NEXT: psrlq $32, %xmm2 1683; SSE-NEXT: pmuludq %xmm6, %xmm2 1684; SSE-NEXT: psllq $32, %xmm2 1685; SSE-NEXT: paddq %xmm5, %xmm2 1686; SSE-NEXT: paddq %xmm4, %xmm2 1687; SSE-NEXT: movdqa %xmm3, %xmm4 1688; SSE-NEXT: pmuludq %xmm7, %xmm4 1689; SSE-NEXT: movdqa %xmm7, %xmm5 1690; SSE-NEXT: psrlq $32, %xmm5 1691; SSE-NEXT: pmuludq %xmm3, %xmm5 1692; SSE-NEXT: psllq $32, %xmm5 1693; SSE-NEXT: psrlq $32, %xmm3 1694; SSE-NEXT: pmuludq %xmm7, %xmm3 1695; SSE-NEXT: psllq $32, %xmm3 1696; SSE-NEXT: paddq %xmm5, %xmm3 1697; SSE-NEXT: paddq %xmm4, %xmm3 1698; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 1699; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 1700; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 1701; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 1702; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 1703; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1704; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 1705; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1706; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 1707; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1708; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 1709; SSE-NEXT: movapd %xmm2, %xmm0 1710; SSE-NEXT: retq 1711; 1712; AVX1-LABEL: trunc_mul_v8i64_8i16: 1713; AVX1: # BB#0: 1714; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm4 1715; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm5 1716; AVX1-NEXT: vpmuludq %xmm5, %xmm0, %xmm5 1717; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 1718; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm6 1719; AVX1-NEXT: vpmuludq %xmm2, %xmm6, %xmm6 1720; AVX1-NEXT: vpsllq $32, %xmm6, %xmm6 1721; AVX1-NEXT: vpaddq %xmm6, %xmm5, %xmm5 1722; AVX1-NEXT: vpaddq %xmm5, %xmm4, %xmm4 1723; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 1724; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1725; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm5 1726; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm6 1727; AVX1-NEXT: vpmuludq %xmm6, %xmm0, %xmm6 1728; AVX1-NEXT: vpsllq $32, %xmm6, %xmm6 1729; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 1730; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm0 1731; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 1732; AVX1-NEXT: vpaddq %xmm0, %xmm6, %xmm0 1733; AVX1-NEXT: vpaddq %xmm0, %xmm5, %xmm0 1734; AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm2 1735; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm5 1736; AVX1-NEXT: vpmuludq %xmm5, %xmm1, %xmm5 1737; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 1738; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm6 1739; AVX1-NEXT: vpmuludq %xmm3, %xmm6, %xmm6 1740; AVX1-NEXT: vpsllq $32, %xmm6, %xmm6 1741; AVX1-NEXT: vpaddq %xmm6, %xmm5, %xmm5 1742; AVX1-NEXT: vpaddq %xmm5, %xmm2, %xmm2 1743; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 1744; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1745; AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm5 1746; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm6 1747; AVX1-NEXT: vpmuludq %xmm6, %xmm1, %xmm6 1748; AVX1-NEXT: vpsllq $32, %xmm6, %xmm6 1749; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1 1750; AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm1 1751; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1 1752; AVX1-NEXT: vpaddq %xmm1, %xmm6, %xmm1 1753; AVX1-NEXT: vpaddq %xmm1, %xmm5, %xmm1 1754; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 1755; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 1756; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 1757; AVX1-NEXT: vpackusdw %xmm1, %xmm2, %xmm1 1758; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 1759; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1,2,3],xmm4[4],xmm3[5,6,7] 1760; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 1761; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1762; AVX1-NEXT: vzeroupper 1763; AVX1-NEXT: retq 1764; 1765; AVX2-LABEL: trunc_mul_v8i64_8i16: 1766; AVX2: # BB#0: 1767; AVX2-NEXT: vpmuludq %ymm3, %ymm1, %ymm4 1768; AVX2-NEXT: vpsrlq $32, %ymm3, %ymm5 1769; AVX2-NEXT: vpmuludq %ymm5, %ymm1, %ymm5 1770; AVX2-NEXT: vpsllq $32, %ymm5, %ymm5 1771; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm1 1772; AVX2-NEXT: vpmuludq %ymm3, %ymm1, %ymm1 1773; AVX2-NEXT: vpsllq $32, %ymm1, %ymm1 1774; AVX2-NEXT: vpaddq %ymm1, %ymm5, %ymm1 1775; AVX2-NEXT: vpaddq %ymm1, %ymm4, %ymm1 1776; AVX2-NEXT: vpmuludq %ymm2, %ymm0, %ymm3 1777; AVX2-NEXT: vpsrlq $32, %ymm2, %ymm4 1778; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm4 1779; AVX2-NEXT: vpsllq $32, %ymm4, %ymm4 1780; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 1781; AVX2-NEXT: vpmuludq %ymm2, %ymm0, %ymm0 1782; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 1783; AVX2-NEXT: vpaddq %ymm0, %ymm4, %ymm0 1784; AVX2-NEXT: vpaddq %ymm0, %ymm3, %ymm0 1785; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1786; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1787; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 1788; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1789; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1790; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 1791; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1792; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1793; AVX2-NEXT: vzeroupper 1794; AVX2-NEXT: retq 1795; 1796; AVX512-LABEL: trunc_mul_v8i64_8i16: 1797; AVX512: # BB#0: 1798; AVX512-NEXT: vpmuludq %zmm1, %zmm0, %zmm2 1799; AVX512-NEXT: vpsrlq $32, %zmm1, %zmm3 1800; AVX512-NEXT: vpmuludq %zmm3, %zmm0, %zmm3 1801; AVX512-NEXT: vpsllq $32, %zmm3, %zmm3 1802; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 1803; AVX512-NEXT: vpmuludq %zmm1, %zmm0, %zmm0 1804; AVX512-NEXT: vpsllq $32, %zmm0, %zmm0 1805; AVX512-NEXT: vpaddq %zmm0, %zmm3, %zmm0 1806; AVX512-NEXT: vpaddq %zmm0, %zmm2, %zmm0 1807; AVX512-NEXT: vpmovqw %zmm0, %xmm0 1808; AVX512-NEXT: retq 1809 %1 = mul <8 x i64> %a0, %a1 1810 %2 = trunc <8 x i64> %1 to <8 x i16> 1811 ret <8 x i16> %2 1812} 1813 1814define <8 x i16> @trunc_mul_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 1815; SSE-LABEL: trunc_mul_v8i32_8i16: 1816; SSE: # BB#0: 1817; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3] 1818; SSE-NEXT: pmuludq %xmm2, %xmm0 1819; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1820; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 1821; SSE-NEXT: pmuludq %xmm4, %xmm2 1822; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 1823; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1824; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3] 1825; SSE-NEXT: pmuludq %xmm3, %xmm1 1826; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1827; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] 1828; SSE-NEXT: pmuludq %xmm2, %xmm3 1829; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3] 1830; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1831; SSE-NEXT: pslld $16, %xmm1 1832; SSE-NEXT: psrad $16, %xmm1 1833; SSE-NEXT: pslld $16, %xmm0 1834; SSE-NEXT: psrad $16, %xmm0 1835; SSE-NEXT: packssdw %xmm1, %xmm0 1836; SSE-NEXT: retq 1837; 1838; AVX1-LABEL: trunc_mul_v8i32_8i16: 1839; AVX1: # BB#0: 1840; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm2 1841; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1842; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1843; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm0 1844; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 1845; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 1846; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 1847; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1848; AVX1-NEXT: vzeroupper 1849; AVX1-NEXT: retq 1850; 1851; AVX2-LABEL: trunc_mul_v8i32_8i16: 1852; AVX2: # BB#0: 1853; AVX2-NEXT: vpmulld %ymm1, %ymm0, %ymm0 1854; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 1855; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1856; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1857; AVX2-NEXT: vzeroupper 1858; AVX2-NEXT: retq 1859; 1860; AVX512-LABEL: trunc_mul_v8i32_8i16: 1861; AVX512: # BB#0: 1862; AVX512-NEXT: vpmulld %ymm1, %ymm0, %ymm0 1863; AVX512-NEXT: vpmovdw %zmm0, %ymm0 1864; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1865; AVX512-NEXT: retq 1866 %1 = mul <8 x i32> %a0, %a1 1867 %2 = trunc <8 x i32> %1 to <8 x i16> 1868 ret <8 x i16> %2 1869} 1870 1871define <16 x i8> @trunc_mul_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 1872; SSE-LABEL: trunc_mul_v16i64_v16i8: 1873; SSE: # BB#0: 1874; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1875; SSE-NEXT: movdqa %xmm0, %xmm9 1876; SSE-NEXT: pmuludq %xmm8, %xmm9 1877; SSE-NEXT: movdqa %xmm8, %xmm10 1878; SSE-NEXT: psrlq $32, %xmm10 1879; SSE-NEXT: pmuludq %xmm0, %xmm10 1880; SSE-NEXT: psrlq $32, %xmm0 1881; SSE-NEXT: pmuludq %xmm8, %xmm0 1882; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1883; SSE-NEXT: psllq $32, %xmm10 1884; SSE-NEXT: psllq $32, %xmm0 1885; SSE-NEXT: paddq %xmm10, %xmm0 1886; SSE-NEXT: paddq %xmm9, %xmm0 1887; SSE-NEXT: movdqa %xmm1, %xmm9 1888; SSE-NEXT: pmuludq %xmm8, %xmm9 1889; SSE-NEXT: movdqa %xmm8, %xmm10 1890; SSE-NEXT: psrlq $32, %xmm10 1891; SSE-NEXT: pmuludq %xmm1, %xmm10 1892; SSE-NEXT: psrlq $32, %xmm1 1893; SSE-NEXT: pmuludq %xmm8, %xmm1 1894; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1895; SSE-NEXT: psllq $32, %xmm10 1896; SSE-NEXT: psllq $32, %xmm1 1897; SSE-NEXT: paddq %xmm10, %xmm1 1898; SSE-NEXT: paddq %xmm9, %xmm1 1899; SSE-NEXT: movdqa %xmm2, %xmm9 1900; SSE-NEXT: pmuludq %xmm8, %xmm9 1901; SSE-NEXT: movdqa %xmm8, %xmm10 1902; SSE-NEXT: psrlq $32, %xmm10 1903; SSE-NEXT: pmuludq %xmm2, %xmm10 1904; SSE-NEXT: psrlq $32, %xmm2 1905; SSE-NEXT: pmuludq %xmm8, %xmm2 1906; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1907; SSE-NEXT: psllq $32, %xmm10 1908; SSE-NEXT: psllq $32, %xmm2 1909; SSE-NEXT: paddq %xmm10, %xmm2 1910; SSE-NEXT: paddq %xmm9, %xmm2 1911; SSE-NEXT: movdqa %xmm3, %xmm9 1912; SSE-NEXT: pmuludq %xmm8, %xmm9 1913; SSE-NEXT: movdqa %xmm8, %xmm10 1914; SSE-NEXT: psrlq $32, %xmm10 1915; SSE-NEXT: pmuludq %xmm3, %xmm10 1916; SSE-NEXT: psrlq $32, %xmm3 1917; SSE-NEXT: pmuludq %xmm8, %xmm3 1918; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1919; SSE-NEXT: psllq $32, %xmm10 1920; SSE-NEXT: psllq $32, %xmm3 1921; SSE-NEXT: paddq %xmm10, %xmm3 1922; SSE-NEXT: paddq %xmm9, %xmm3 1923; SSE-NEXT: movdqa %xmm4, %xmm9 1924; SSE-NEXT: pmuludq %xmm8, %xmm9 1925; SSE-NEXT: movdqa %xmm8, %xmm10 1926; SSE-NEXT: psrlq $32, %xmm10 1927; SSE-NEXT: pmuludq %xmm4, %xmm10 1928; SSE-NEXT: psrlq $32, %xmm4 1929; SSE-NEXT: pmuludq %xmm8, %xmm4 1930; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1931; SSE-NEXT: psllq $32, %xmm10 1932; SSE-NEXT: psllq $32, %xmm4 1933; SSE-NEXT: paddq %xmm10, %xmm4 1934; SSE-NEXT: paddq %xmm9, %xmm4 1935; SSE-NEXT: movdqa %xmm5, %xmm9 1936; SSE-NEXT: pmuludq %xmm8, %xmm9 1937; SSE-NEXT: movdqa %xmm8, %xmm10 1938; SSE-NEXT: psrlq $32, %xmm10 1939; SSE-NEXT: pmuludq %xmm5, %xmm10 1940; SSE-NEXT: psrlq $32, %xmm5 1941; SSE-NEXT: pmuludq %xmm8, %xmm5 1942; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1943; SSE-NEXT: psllq $32, %xmm10 1944; SSE-NEXT: psllq $32, %xmm5 1945; SSE-NEXT: paddq %xmm10, %xmm5 1946; SSE-NEXT: paddq %xmm9, %xmm5 1947; SSE-NEXT: movdqa %xmm6, %xmm9 1948; SSE-NEXT: pmuludq %xmm8, %xmm9 1949; SSE-NEXT: movdqa %xmm8, %xmm10 1950; SSE-NEXT: psrlq $32, %xmm10 1951; SSE-NEXT: pmuludq %xmm6, %xmm10 1952; SSE-NEXT: psrlq $32, %xmm6 1953; SSE-NEXT: pmuludq %xmm8, %xmm6 1954; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1955; SSE-NEXT: psllq $32, %xmm10 1956; SSE-NEXT: psllq $32, %xmm6 1957; SSE-NEXT: paddq %xmm10, %xmm6 1958; SSE-NEXT: paddq %xmm9, %xmm6 1959; SSE-NEXT: movdqa %xmm7, %xmm9 1960; SSE-NEXT: pmuludq %xmm8, %xmm9 1961; SSE-NEXT: movdqa %xmm8, %xmm10 1962; SSE-NEXT: psrlq $32, %xmm10 1963; SSE-NEXT: pmuludq %xmm7, %xmm10 1964; SSE-NEXT: psrlq $32, %xmm7 1965; SSE-NEXT: pmuludq %xmm8, %xmm7 1966; SSE-NEXT: psllq $32, %xmm10 1967; SSE-NEXT: psllq $32, %xmm7 1968; SSE-NEXT: paddq %xmm10, %xmm7 1969; SSE-NEXT: paddq %xmm9, %xmm7 1970; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 1971; SSE-NEXT: pand %xmm8, %xmm7 1972; SSE-NEXT: pand %xmm8, %xmm6 1973; SSE-NEXT: packuswb %xmm7, %xmm6 1974; SSE-NEXT: pand %xmm8, %xmm5 1975; SSE-NEXT: pand %xmm8, %xmm4 1976; SSE-NEXT: packuswb %xmm5, %xmm4 1977; SSE-NEXT: packuswb %xmm6, %xmm4 1978; SSE-NEXT: pand %xmm8, %xmm3 1979; SSE-NEXT: pand %xmm8, %xmm2 1980; SSE-NEXT: packuswb %xmm3, %xmm2 1981; SSE-NEXT: pand %xmm8, %xmm1 1982; SSE-NEXT: pand %xmm8, %xmm0 1983; SSE-NEXT: packuswb %xmm1, %xmm0 1984; SSE-NEXT: packuswb %xmm2, %xmm0 1985; SSE-NEXT: packuswb %xmm4, %xmm0 1986; SSE-NEXT: retq 1987; 1988; AVX1-LABEL: trunc_mul_v16i64_v16i8: 1989; AVX1: # BB#0: 1990; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm8 1991; AVX1-NEXT: vpsrlq $32, %xmm4, %xmm9 1992; AVX1-NEXT: vpmuludq %xmm9, %xmm0, %xmm9 1993; AVX1-NEXT: vpsllq $32, %xmm9, %xmm9 1994; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm10 1995; AVX1-NEXT: vpmuludq %xmm4, %xmm10, %xmm10 1996; AVX1-NEXT: vpsllq $32, %xmm10, %xmm10 1997; AVX1-NEXT: vpaddq %xmm10, %xmm9, %xmm9 1998; AVX1-NEXT: vpaddq %xmm9, %xmm8, %xmm8 1999; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm10 2000; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2001; AVX1-NEXT: vpmuludq %xmm10, %xmm0, %xmm9 2002; AVX1-NEXT: vpsrlq $32, %xmm10, %xmm4 2003; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm4 2004; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2005; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 2006; AVX1-NEXT: vpmuludq %xmm10, %xmm0, %xmm0 2007; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2008; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm0 2009; AVX1-NEXT: vpaddq %xmm0, %xmm9, %xmm9 2010; AVX1-NEXT: vpmuludq %xmm5, %xmm1, %xmm10 2011; AVX1-NEXT: vpsrlq $32, %xmm5, %xmm0 2012; AVX1-NEXT: vpmuludq %xmm0, %xmm1, %xmm0 2013; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2014; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm4 2015; AVX1-NEXT: vpmuludq %xmm5, %xmm4, %xmm4 2016; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2017; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm0 2018; AVX1-NEXT: vpaddq %xmm0, %xmm10, %xmm10 2019; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm0 2020; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2021; AVX1-NEXT: vpmuludq %xmm0, %xmm1, %xmm5 2022; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm4 2023; AVX1-NEXT: vpmuludq %xmm4, %xmm1, %xmm4 2024; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2025; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1 2026; AVX1-NEXT: vpmuludq %xmm0, %xmm1, %xmm0 2027; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2028; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm0 2029; AVX1-NEXT: vpaddq %xmm0, %xmm5, %xmm1 2030; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm0 2031; AVX1-NEXT: vpsrlq $32, %xmm6, %xmm4 2032; AVX1-NEXT: vpmuludq %xmm4, %xmm2, %xmm4 2033; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2034; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm5 2035; AVX1-NEXT: vpmuludq %xmm6, %xmm5, %xmm5 2036; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 2037; AVX1-NEXT: vpaddq %xmm5, %xmm4, %xmm4 2038; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm5 2039; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm0 2040; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 2041; AVX1-NEXT: vpmuludq %xmm0, %xmm2, %xmm4 2042; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm6 2043; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm6 2044; AVX1-NEXT: vpsllq $32, %xmm6, %xmm6 2045; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm2 2046; AVX1-NEXT: vpmuludq %xmm0, %xmm2, %xmm0 2047; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2048; AVX1-NEXT: vpaddq %xmm0, %xmm6, %xmm0 2049; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm0 2050; AVX1-NEXT: vpmuludq %xmm7, %xmm3, %xmm2 2051; AVX1-NEXT: vpsrlq $32, %xmm7, %xmm4 2052; AVX1-NEXT: vpmuludq %xmm4, %xmm3, %xmm4 2053; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2054; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm6 2055; AVX1-NEXT: vpmuludq %xmm7, %xmm6, %xmm6 2056; AVX1-NEXT: vpsllq $32, %xmm6, %xmm6 2057; AVX1-NEXT: vpaddq %xmm6, %xmm4, %xmm4 2058; AVX1-NEXT: vpaddq %xmm4, %xmm2, %xmm2 2059; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm4 2060; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 2061; AVX1-NEXT: vpmuludq %xmm4, %xmm3, %xmm6 2062; AVX1-NEXT: vpsrlq $32, %xmm4, %xmm7 2063; AVX1-NEXT: vpmuludq %xmm7, %xmm3, %xmm7 2064; AVX1-NEXT: vpsllq $32, %xmm7, %xmm7 2065; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm3 2066; AVX1-NEXT: vpmuludq %xmm4, %xmm3, %xmm3 2067; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3 2068; AVX1-NEXT: vpaddq %xmm3, %xmm7, %xmm3 2069; AVX1-NEXT: vpaddq %xmm3, %xmm6, %xmm3 2070; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 2071; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 2072; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 2073; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 2074; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 2075; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm3 2076; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 2077; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 2078; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 2079; AVX1-NEXT: vpand %xmm4, %xmm10, %xmm2 2080; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2081; AVX1-NEXT: vpand %xmm4, %xmm9, %xmm2 2082; AVX1-NEXT: vpand %xmm4, %xmm8, %xmm3 2083; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 2084; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2085; AVX1-NEXT: vpackuswb %xmm0, %xmm1, %xmm0 2086; AVX1-NEXT: vzeroupper 2087; AVX1-NEXT: retq 2088; 2089; AVX2-LABEL: trunc_mul_v16i64_v16i8: 2090; AVX2: # BB#0: 2091; AVX2-NEXT: vpmuludq %ymm5, %ymm1, %ymm8 2092; AVX2-NEXT: vpsrlq $32, %ymm5, %ymm9 2093; AVX2-NEXT: vpmuludq %ymm9, %ymm1, %ymm9 2094; AVX2-NEXT: vpsllq $32, %ymm9, %ymm9 2095; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm1 2096; AVX2-NEXT: vpmuludq %ymm5, %ymm1, %ymm1 2097; AVX2-NEXT: vpsllq $32, %ymm1, %ymm1 2098; AVX2-NEXT: vpaddq %ymm1, %ymm9, %ymm1 2099; AVX2-NEXT: vpaddq %ymm1, %ymm8, %ymm1 2100; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm5 2101; AVX2-NEXT: vpsrlq $32, %ymm4, %ymm8 2102; AVX2-NEXT: vpmuludq %ymm8, %ymm0, %ymm8 2103; AVX2-NEXT: vpsllq $32, %ymm8, %ymm8 2104; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 2105; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm0 2106; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 2107; AVX2-NEXT: vpaddq %ymm0, %ymm8, %ymm0 2108; AVX2-NEXT: vpaddq %ymm0, %ymm5, %ymm0 2109; AVX2-NEXT: vpmuludq %ymm7, %ymm3, %ymm4 2110; AVX2-NEXT: vpsrlq $32, %ymm7, %ymm5 2111; AVX2-NEXT: vpmuludq %ymm5, %ymm3, %ymm5 2112; AVX2-NEXT: vpsllq $32, %ymm5, %ymm5 2113; AVX2-NEXT: vpsrlq $32, %ymm3, %ymm3 2114; AVX2-NEXT: vpmuludq %ymm7, %ymm3, %ymm3 2115; AVX2-NEXT: vpsllq $32, %ymm3, %ymm3 2116; AVX2-NEXT: vpaddq %ymm3, %ymm5, %ymm3 2117; AVX2-NEXT: vpaddq %ymm3, %ymm4, %ymm3 2118; AVX2-NEXT: vpmuludq %ymm6, %ymm2, %ymm4 2119; AVX2-NEXT: vpsrlq $32, %ymm6, %ymm5 2120; AVX2-NEXT: vpmuludq %ymm5, %ymm2, %ymm5 2121; AVX2-NEXT: vpsllq $32, %ymm5, %ymm5 2122; AVX2-NEXT: vpsrlq $32, %ymm2, %ymm2 2123; AVX2-NEXT: vpmuludq %ymm6, %ymm2, %ymm2 2124; AVX2-NEXT: vpsllq $32, %ymm2, %ymm2 2125; AVX2-NEXT: vpaddq %ymm2, %ymm5, %ymm2 2126; AVX2-NEXT: vpaddq %ymm2, %ymm4, %ymm2 2127; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 2128; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 2129; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 2130; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 2131; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 2132; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 2133; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 2134; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 2135; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2136; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 2137; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2138; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2139; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 2140; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2141; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 2142; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 2143; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2144; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 2145; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2146; AVX2-NEXT: vzeroupper 2147; AVX2-NEXT: retq 2148; 2149; AVX512-LABEL: trunc_mul_v16i64_v16i8: 2150; AVX512: # BB#0: 2151; AVX512-NEXT: vpmuludq %zmm3, %zmm1, %zmm4 2152; AVX512-NEXT: vpsrlq $32, %zmm3, %zmm5 2153; AVX512-NEXT: vpmuludq %zmm5, %zmm1, %zmm5 2154; AVX512-NEXT: vpsllq $32, %zmm5, %zmm5 2155; AVX512-NEXT: vpsrlq $32, %zmm1, %zmm1 2156; AVX512-NEXT: vpmuludq %zmm3, %zmm1, %zmm1 2157; AVX512-NEXT: vpsllq $32, %zmm1, %zmm1 2158; AVX512-NEXT: vpaddq %zmm1, %zmm5, %zmm1 2159; AVX512-NEXT: vpaddq %zmm1, %zmm4, %zmm1 2160; AVX512-NEXT: vpmuludq %zmm2, %zmm0, %zmm3 2161; AVX512-NEXT: vpsrlq $32, %zmm2, %zmm4 2162; AVX512-NEXT: vpmuludq %zmm4, %zmm0, %zmm4 2163; AVX512-NEXT: vpsllq $32, %zmm4, %zmm4 2164; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 2165; AVX512-NEXT: vpmuludq %zmm2, %zmm0, %zmm0 2166; AVX512-NEXT: vpsllq $32, %zmm0, %zmm0 2167; AVX512-NEXT: vpaddq %zmm0, %zmm4, %zmm0 2168; AVX512-NEXT: vpaddq %zmm0, %zmm3, %zmm0 2169; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2170; AVX512-NEXT: vpmovqd %zmm1, %ymm1 2171; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 2172; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2173; AVX512-NEXT: retq 2174 %1 = mul <16 x i64> %a0, %a1 2175 %2 = trunc <16 x i64> %1 to <16 x i8> 2176 ret <16 x i8> %2 2177} 2178 2179define <16 x i8> @trunc_mul_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 2180; SSE-LABEL: trunc_mul_v16i32_v16i8: 2181; SSE: # BB#0: 2182; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm0[1,1,3,3] 2183; SSE-NEXT: pmuludq %xmm4, %xmm0 2184; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2185; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2186; SSE-NEXT: pmuludq %xmm8, %xmm4 2187; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2188; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1] 2189; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3] 2190; SSE-NEXT: pmuludq %xmm5, %xmm1 2191; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2192; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3] 2193; SSE-NEXT: pmuludq %xmm4, %xmm5 2194; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3] 2195; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 2196; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3] 2197; SSE-NEXT: pmuludq %xmm6, %xmm2 2198; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2199; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3] 2200; SSE-NEXT: pmuludq %xmm4, %xmm5 2201; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3] 2202; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 2203; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3] 2204; SSE-NEXT: pmuludq %xmm7, %xmm3 2205; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 2206; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3] 2207; SSE-NEXT: pmuludq %xmm4, %xmm5 2208; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3] 2209; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 2210; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2211; SSE-NEXT: pand %xmm4, %xmm3 2212; SSE-NEXT: pand %xmm4, %xmm2 2213; SSE-NEXT: packuswb %xmm3, %xmm2 2214; SSE-NEXT: pand %xmm4, %xmm1 2215; SSE-NEXT: pand %xmm4, %xmm0 2216; SSE-NEXT: packuswb %xmm1, %xmm0 2217; SSE-NEXT: packuswb %xmm2, %xmm0 2218; SSE-NEXT: retq 2219; 2220; AVX1-LABEL: trunc_mul_v16i32_v16i8: 2221; AVX1: # BB#0: 2222; AVX1-NEXT: vpmulld %xmm2, %xmm0, %xmm4 2223; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 2224; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2225; AVX1-NEXT: vpmulld %xmm2, %xmm0, %xmm0 2226; AVX1-NEXT: vpmulld %xmm3, %xmm1, %xmm2 2227; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 2228; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2229; AVX1-NEXT: vpmulld %xmm3, %xmm1, %xmm1 2230; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2231; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 2232; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 2233; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2234; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 2235; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm2 2236; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 2237; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 2238; AVX1-NEXT: vzeroupper 2239; AVX1-NEXT: retq 2240; 2241; AVX2-LABEL: trunc_mul_v16i32_v16i8: 2242; AVX2: # BB#0: 2243; AVX2-NEXT: vpmulld %ymm2, %ymm0, %ymm0 2244; AVX2-NEXT: vpmulld %ymm3, %ymm1, %ymm1 2245; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 2246; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 2247; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2248; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2249; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 2250; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 2251; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2252; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 2253; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2254; AVX2-NEXT: vzeroupper 2255; AVX2-NEXT: retq 2256; 2257; AVX512-LABEL: trunc_mul_v16i32_v16i8: 2258; AVX512: # BB#0: 2259; AVX512-NEXT: vpmulld %zmm1, %zmm0, %zmm0 2260; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2261; AVX512-NEXT: retq 2262 %1 = mul <16 x i32> %a0, %a1 2263 %2 = trunc <16 x i32> %1 to <16 x i8> 2264 ret <16 x i8> %2 2265} 2266 2267define <16 x i8> @trunc_mul_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 2268; SSE-LABEL: trunc_mul_v16i16_v16i8: 2269; SSE: # BB#0: 2270; SSE-NEXT: pmullw %xmm2, %xmm0 2271; SSE-NEXT: pmullw %xmm3, %xmm1 2272; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 2273; SSE-NEXT: pand %xmm2, %xmm1 2274; SSE-NEXT: pand %xmm2, %xmm0 2275; SSE-NEXT: packuswb %xmm1, %xmm0 2276; SSE-NEXT: retq 2277; 2278; AVX1-LABEL: trunc_mul_v16i16_v16i8: 2279; AVX1: # BB#0: 2280; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm2 2281; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2282; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2283; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm0 2284; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2285; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 2286; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 2287; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 2288; AVX1-NEXT: vzeroupper 2289; AVX1-NEXT: retq 2290; 2291; AVX2-LABEL: trunc_mul_v16i16_v16i8: 2292; AVX2: # BB#0: 2293; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0 2294; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 2295; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2296; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2297; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2298; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2299; AVX2-NEXT: vzeroupper 2300; AVX2-NEXT: retq 2301; 2302; AVX512F-LABEL: trunc_mul_v16i16_v16i8: 2303; AVX512F: # BB#0: 2304; AVX512F-NEXT: vpmullw %ymm1, %ymm0, %ymm0 2305; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 2306; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 2307; AVX512F-NEXT: retq 2308; 2309; AVX512BW-LABEL: trunc_mul_v16i16_v16i8: 2310; AVX512BW: # BB#0: 2311; AVX512BW-NEXT: vpmullw %ymm1, %ymm0, %ymm0 2312; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 2313; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2314; AVX512BW-NEXT: retq 2315 %1 = mul <16 x i16> %a0, %a1 2316 %2 = trunc <16 x i16> %1 to <16 x i8> 2317 ret <16 x i8> %2 2318} 2319 2320; 2321; mul to constant 2322; 2323 2324define <4 x i32> @trunc_mul_const_v4i64_4i32(<4 x i64> %a0) nounwind { 2325; SSE-LABEL: trunc_mul_const_v4i64_4i32: 2326; SSE: # BB#0: 2327; SSE-NEXT: movl $1, %eax 2328; SSE-NEXT: movd %rax, %xmm2 2329; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 2330; SSE-NEXT: movdqa %xmm0, %xmm3 2331; SSE-NEXT: pmuludq %xmm2, %xmm3 2332; SSE-NEXT: psrlq $32, %xmm0 2333; SSE-NEXT: pmuludq %xmm2, %xmm0 2334; SSE-NEXT: psllq $32, %xmm0 2335; SSE-NEXT: paddq %xmm3, %xmm0 2336; SSE-NEXT: movdqa {{.*#+}} xmm2 = [2,3] 2337; SSE-NEXT: movdqa %xmm1, %xmm3 2338; SSE-NEXT: pmuludq %xmm2, %xmm3 2339; SSE-NEXT: psrlq $32, %xmm1 2340; SSE-NEXT: pmuludq %xmm2, %xmm1 2341; SSE-NEXT: psllq $32, %xmm1 2342; SSE-NEXT: paddq %xmm3, %xmm1 2343; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2344; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2345; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2346; SSE-NEXT: retq 2347; 2348; AVX1-LABEL: trunc_mul_const_v4i64_4i32: 2349; AVX1: # BB#0: 2350; AVX1-NEXT: movl $1, %eax 2351; AVX1-NEXT: vmovq %rax, %xmm1 2352; AVX1-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] 2353; AVX1-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 2354; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm3 2355; AVX1-NEXT: vpmuludq %xmm1, %xmm3, %xmm1 2356; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1 2357; AVX1-NEXT: vpaddq %xmm1, %xmm2, %xmm1 2358; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2359; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [2,3] 2360; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm3 2361; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 2362; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm0 2363; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2364; AVX1-NEXT: vpaddq %xmm0, %xmm3, %xmm0 2365; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,1,0,2] 2366; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2367; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 2368; AVX1-NEXT: vzeroupper 2369; AVX1-NEXT: retq 2370; 2371; AVX2-LABEL: trunc_mul_const_v4i64_4i32: 2372; AVX2: # BB#0: 2373; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3] 2374; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm2 2375; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 2376; AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 2377; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 2378; AVX2-NEXT: vpaddq %ymm0, %ymm2, %ymm0 2379; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2380; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2381; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2382; AVX2-NEXT: vzeroupper 2383; AVX2-NEXT: retq 2384; 2385; AVX512-LABEL: trunc_mul_const_v4i64_4i32: 2386; AVX512: # BB#0: 2387; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3] 2388; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm2 2389; AVX512-NEXT: vpsrlq $32, %ymm0, %ymm0 2390; AVX512-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 2391; AVX512-NEXT: vpsllq $32, %ymm0, %ymm0 2392; AVX512-NEXT: vpaddq %ymm0, %ymm2, %ymm0 2393; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2394; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2395; AVX512-NEXT: retq 2396 %1 = mul <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 2397 %2 = trunc <4 x i64> %1 to <4 x i32> 2398 ret <4 x i32> %2 2399} 2400 2401define <8 x i16> @trunc_mul_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 2402; SSE-LABEL: trunc_mul_const_v16i64_v16i16: 2403; SSE: # BB#0: 2404; SSE-NEXT: movl $1, %eax 2405; SSE-NEXT: movd %rax, %xmm4 2406; SSE-NEXT: pslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 2407; SSE-NEXT: movdqa %xmm0, %xmm5 2408; SSE-NEXT: pmuludq %xmm4, %xmm5 2409; SSE-NEXT: psrlq $32, %xmm0 2410; SSE-NEXT: pmuludq %xmm4, %xmm0 2411; SSE-NEXT: psllq $32, %xmm0 2412; SSE-NEXT: paddq %xmm5, %xmm0 2413; SSE-NEXT: movdqa {{.*#+}} xmm4 = [2,3] 2414; SSE-NEXT: movdqa %xmm1, %xmm5 2415; SSE-NEXT: pmuludq %xmm4, %xmm5 2416; SSE-NEXT: psrlq $32, %xmm1 2417; SSE-NEXT: pmuludq %xmm4, %xmm1 2418; SSE-NEXT: psllq $32, %xmm1 2419; SSE-NEXT: paddq %xmm5, %xmm1 2420; SSE-NEXT: movdqa {{.*#+}} xmm4 = [4,5] 2421; SSE-NEXT: movdqa %xmm2, %xmm5 2422; SSE-NEXT: pmuludq %xmm4, %xmm5 2423; SSE-NEXT: psrlq $32, %xmm2 2424; SSE-NEXT: pmuludq %xmm4, %xmm2 2425; SSE-NEXT: psllq $32, %xmm2 2426; SSE-NEXT: paddq %xmm5, %xmm2 2427; SSE-NEXT: movdqa {{.*#+}} xmm4 = [6,7] 2428; SSE-NEXT: movdqa %xmm3, %xmm5 2429; SSE-NEXT: pmuludq %xmm4, %xmm5 2430; SSE-NEXT: psrlq $32, %xmm3 2431; SSE-NEXT: pmuludq %xmm4, %xmm3 2432; SSE-NEXT: psllq $32, %xmm3 2433; SSE-NEXT: paddq %xmm5, %xmm3 2434; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 2435; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 2436; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2437; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 2438; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 2439; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2440; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 2441; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2442; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 2443; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 2444; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 2445; SSE-NEXT: movapd %xmm2, %xmm0 2446; SSE-NEXT: retq 2447; 2448; AVX1-LABEL: trunc_mul_const_v16i64_v16i16: 2449; AVX1: # BB#0: 2450; AVX1-NEXT: movl $1, %eax 2451; AVX1-NEXT: vmovq %rax, %xmm2 2452; AVX1-NEXT: vpslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 2453; AVX1-NEXT: vpmuludq %xmm2, %xmm0, %xmm3 2454; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm4 2455; AVX1-NEXT: vpmuludq %xmm2, %xmm4, %xmm2 2456; AVX1-NEXT: vpsllq $32, %xmm2, %xmm2 2457; AVX1-NEXT: vpaddq %xmm2, %xmm3, %xmm2 2458; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2459; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [2,3] 2460; AVX1-NEXT: vpmuludq %xmm3, %xmm0, %xmm4 2461; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 2462; AVX1-NEXT: vpmuludq %xmm3, %xmm0, %xmm0 2463; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2464; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm0 2465; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [4,5] 2466; AVX1-NEXT: vpmuludq %xmm3, %xmm1, %xmm4 2467; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm5 2468; AVX1-NEXT: vpmuludq %xmm3, %xmm5, %xmm3 2469; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3 2470; AVX1-NEXT: vpaddq %xmm3, %xmm4, %xmm3 2471; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2472; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [6,7] 2473; AVX1-NEXT: vpmuludq %xmm4, %xmm1, %xmm5 2474; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1 2475; AVX1-NEXT: vpmuludq %xmm4, %xmm1, %xmm1 2476; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1 2477; AVX1-NEXT: vpaddq %xmm1, %xmm5, %xmm1 2478; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 2479; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 2480; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 2481; AVX1-NEXT: vpackusdw %xmm1, %xmm3, %xmm1 2482; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 2483; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 2484; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 2485; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 2486; AVX1-NEXT: vzeroupper 2487; AVX1-NEXT: retq 2488; 2489; AVX2-LABEL: trunc_mul_const_v16i64_v16i16: 2490; AVX2: # BB#0: 2491; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [4,5,6,7] 2492; AVX2-NEXT: vpmuludq %ymm2, %ymm1, %ymm3 2493; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm1 2494; AVX2-NEXT: vpmuludq %ymm2, %ymm1, %ymm1 2495; AVX2-NEXT: vpsllq $32, %ymm1, %ymm1 2496; AVX2-NEXT: vpaddq %ymm1, %ymm3, %ymm1 2497; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3] 2498; AVX2-NEXT: vpmuludq %ymm2, %ymm0, %ymm3 2499; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 2500; AVX2-NEXT: vpmuludq %ymm2, %ymm0, %ymm0 2501; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 2502; AVX2-NEXT: vpaddq %ymm0, %ymm3, %ymm0 2503; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2504; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2505; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 2506; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2507; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 2508; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 2509; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2510; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2511; AVX2-NEXT: vzeroupper 2512; AVX2-NEXT: retq 2513; 2514; AVX512-LABEL: trunc_mul_const_v16i64_v16i16: 2515; AVX512: # BB#0: 2516; AVX512-NEXT: vmovdqa32 {{.*#+}} zmm1 = [0,1,2,3,4,5,6,7] 2517; AVX512-NEXT: vpmuludq %zmm1, %zmm0, %zmm2 2518; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 2519; AVX512-NEXT: vpmuludq %zmm1, %zmm0, %zmm0 2520; AVX512-NEXT: vpsllq $32, %zmm0, %zmm0 2521; AVX512-NEXT: vpaddq %zmm0, %zmm2, %zmm0 2522; AVX512-NEXT: vpmovqw %zmm0, %xmm0 2523; AVX512-NEXT: retq 2524 %1 = mul <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 2525 %2 = trunc <8 x i64> %1 to <8 x i16> 2526 ret <8 x i16> %2 2527} 2528 2529define <8 x i16> @trunc_mul_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 2530; SSE-LABEL: trunc_mul_const_v16i32_v16i16: 2531; SSE: # BB#0: 2532; SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,1,2,3] 2533; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,3,3] 2534; SSE-NEXT: pmuludq %xmm2, %xmm0 2535; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2536; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 2537; SSE-NEXT: pmuludq %xmm3, %xmm2 2538; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2539; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 2540; SSE-NEXT: movdqa {{.*#+}} xmm2 = [4,5,6,7] 2541; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,3,3] 2542; SSE-NEXT: pmuludq %xmm2, %xmm1 2543; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2544; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 2545; SSE-NEXT: pmuludq %xmm3, %xmm2 2546; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2547; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 2548; SSE-NEXT: pslld $16, %xmm1 2549; SSE-NEXT: psrad $16, %xmm1 2550; SSE-NEXT: pslld $16, %xmm0 2551; SSE-NEXT: psrad $16, %xmm0 2552; SSE-NEXT: packssdw %xmm1, %xmm0 2553; SSE-NEXT: retq 2554; 2555; AVX1-LABEL: trunc_mul_const_v16i32_v16i16: 2556; AVX1: # BB#0: 2557; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm1 2558; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2559; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 2560; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 2561; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2562; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2563; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 2564; AVX1-NEXT: vzeroupper 2565; AVX1-NEXT: retq 2566; 2567; AVX2-LABEL: trunc_mul_const_v16i32_v16i16: 2568; AVX2: # BB#0: 2569; AVX2-NEXT: vpmulld {{.*}}(%rip), %ymm0, %ymm0 2570; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 2571; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2572; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2573; AVX2-NEXT: vzeroupper 2574; AVX2-NEXT: retq 2575; 2576; AVX512-LABEL: trunc_mul_const_v16i32_v16i16: 2577; AVX512: # BB#0: 2578; AVX512-NEXT: vpmulld {{.*}}(%rip), %ymm0, %ymm0 2579; AVX512-NEXT: vpmovdw %zmm0, %ymm0 2580; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2581; AVX512-NEXT: retq 2582 %1 = mul <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 2583 %2 = trunc <8 x i32> %1 to <8 x i16> 2584 ret <8 x i16> %2 2585} 2586 2587define <16 x i8> @trunc_mul_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 2588; SSE-LABEL: trunc_mul_const_v16i64_v16i8: 2589; SSE: # BB#0: 2590; SSE-NEXT: movl $1, %eax 2591; SSE-NEXT: movd %rax, %xmm8 2592; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 2593; SSE-NEXT: movdqa %xmm0, %xmm9 2594; SSE-NEXT: pmuludq %xmm8, %xmm9 2595; SSE-NEXT: psrlq $32, %xmm0 2596; SSE-NEXT: pmuludq %xmm8, %xmm0 2597; SSE-NEXT: psllq $32, %xmm0 2598; SSE-NEXT: paddq %xmm9, %xmm0 2599; SSE-NEXT: movdqa {{.*#+}} xmm8 = [2,3] 2600; SSE-NEXT: movdqa %xmm1, %xmm9 2601; SSE-NEXT: pmuludq %xmm8, %xmm9 2602; SSE-NEXT: psrlq $32, %xmm1 2603; SSE-NEXT: pmuludq %xmm8, %xmm1 2604; SSE-NEXT: psllq $32, %xmm1 2605; SSE-NEXT: paddq %xmm9, %xmm1 2606; SSE-NEXT: movdqa {{.*#+}} xmm8 = [4,5] 2607; SSE-NEXT: movdqa %xmm2, %xmm9 2608; SSE-NEXT: pmuludq %xmm8, %xmm9 2609; SSE-NEXT: psrlq $32, %xmm2 2610; SSE-NEXT: pmuludq %xmm8, %xmm2 2611; SSE-NEXT: psllq $32, %xmm2 2612; SSE-NEXT: paddq %xmm9, %xmm2 2613; SSE-NEXT: movdqa {{.*#+}} xmm8 = [6,7] 2614; SSE-NEXT: movdqa %xmm3, %xmm9 2615; SSE-NEXT: pmuludq %xmm8, %xmm9 2616; SSE-NEXT: psrlq $32, %xmm3 2617; SSE-NEXT: pmuludq %xmm8, %xmm3 2618; SSE-NEXT: psllq $32, %xmm3 2619; SSE-NEXT: paddq %xmm9, %xmm3 2620; SSE-NEXT: movdqa {{.*#+}} xmm8 = [8,9] 2621; SSE-NEXT: movdqa %xmm4, %xmm9 2622; SSE-NEXT: pmuludq %xmm8, %xmm9 2623; SSE-NEXT: psrlq $32, %xmm4 2624; SSE-NEXT: pmuludq %xmm8, %xmm4 2625; SSE-NEXT: psllq $32, %xmm4 2626; SSE-NEXT: paddq %xmm9, %xmm4 2627; SSE-NEXT: movdqa {{.*#+}} xmm8 = [10,11] 2628; SSE-NEXT: movdqa %xmm5, %xmm9 2629; SSE-NEXT: pmuludq %xmm8, %xmm9 2630; SSE-NEXT: psrlq $32, %xmm5 2631; SSE-NEXT: pmuludq %xmm8, %xmm5 2632; SSE-NEXT: psllq $32, %xmm5 2633; SSE-NEXT: paddq %xmm9, %xmm5 2634; SSE-NEXT: movdqa {{.*#+}} xmm8 = [12,13] 2635; SSE-NEXT: movdqa %xmm6, %xmm9 2636; SSE-NEXT: pmuludq %xmm8, %xmm9 2637; SSE-NEXT: psrlq $32, %xmm6 2638; SSE-NEXT: pmuludq %xmm8, %xmm6 2639; SSE-NEXT: psllq $32, %xmm6 2640; SSE-NEXT: paddq %xmm9, %xmm6 2641; SSE-NEXT: movdqa {{.*#+}} xmm8 = [14,15] 2642; SSE-NEXT: movdqa %xmm7, %xmm9 2643; SSE-NEXT: pmuludq %xmm8, %xmm9 2644; SSE-NEXT: psrlq $32, %xmm7 2645; SSE-NEXT: pmuludq %xmm8, %xmm7 2646; SSE-NEXT: psllq $32, %xmm7 2647; SSE-NEXT: paddq %xmm9, %xmm7 2648; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 2649; SSE-NEXT: pand %xmm8, %xmm7 2650; SSE-NEXT: pand %xmm8, %xmm6 2651; SSE-NEXT: packuswb %xmm7, %xmm6 2652; SSE-NEXT: pand %xmm8, %xmm5 2653; SSE-NEXT: pand %xmm8, %xmm4 2654; SSE-NEXT: packuswb %xmm5, %xmm4 2655; SSE-NEXT: packuswb %xmm6, %xmm4 2656; SSE-NEXT: pand %xmm8, %xmm3 2657; SSE-NEXT: pand %xmm8, %xmm2 2658; SSE-NEXT: packuswb %xmm3, %xmm2 2659; SSE-NEXT: pand %xmm8, %xmm1 2660; SSE-NEXT: pand %xmm8, %xmm0 2661; SSE-NEXT: packuswb %xmm1, %xmm0 2662; SSE-NEXT: packuswb %xmm2, %xmm0 2663; SSE-NEXT: packuswb %xmm4, %xmm0 2664; SSE-NEXT: retq 2665; 2666; AVX1-LABEL: trunc_mul_const_v16i64_v16i8: 2667; AVX1: # BB#0: 2668; AVX1-NEXT: movl $1, %eax 2669; AVX1-NEXT: vmovq %rax, %xmm4 2670; AVX1-NEXT: vpslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 2671; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm5 2672; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm6 2673; AVX1-NEXT: vpmuludq %xmm4, %xmm6, %xmm4 2674; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2675; AVX1-NEXT: vpaddq %xmm4, %xmm5, %xmm8 2676; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2677; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [2,3] 2678; AVX1-NEXT: vpmuludq %xmm5, %xmm0, %xmm6 2679; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 2680; AVX1-NEXT: vpmuludq %xmm5, %xmm0, %xmm0 2681; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2682; AVX1-NEXT: vpaddq %xmm0, %xmm6, %xmm9 2683; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [4,5] 2684; AVX1-NEXT: vpmuludq %xmm5, %xmm1, %xmm6 2685; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm7 2686; AVX1-NEXT: vpmuludq %xmm5, %xmm7, %xmm5 2687; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 2688; AVX1-NEXT: vpaddq %xmm5, %xmm6, %xmm5 2689; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2690; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [6,7] 2691; AVX1-NEXT: vpmuludq %xmm6, %xmm1, %xmm7 2692; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1 2693; AVX1-NEXT: vpmuludq %xmm6, %xmm1, %xmm1 2694; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1 2695; AVX1-NEXT: vpaddq %xmm1, %xmm7, %xmm1 2696; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [8,9] 2697; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm7 2698; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm4 2699; AVX1-NEXT: vpmuludq %xmm6, %xmm4, %xmm4 2700; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2701; AVX1-NEXT: vpaddq %xmm4, %xmm7, %xmm4 2702; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 2703; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [10,11] 2704; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm7 2705; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm2 2706; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm2 2707; AVX1-NEXT: vpsllq $32, %xmm2, %xmm2 2708; AVX1-NEXT: vpaddq %xmm2, %xmm7, %xmm2 2709; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [12,13] 2710; AVX1-NEXT: vpmuludq %xmm6, %xmm3, %xmm7 2711; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm0 2712; AVX1-NEXT: vpmuludq %xmm6, %xmm0, %xmm0 2713; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2714; AVX1-NEXT: vpaddq %xmm0, %xmm7, %xmm0 2715; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 2716; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [14,15] 2717; AVX1-NEXT: vpmuludq %xmm6, %xmm3, %xmm7 2718; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm3 2719; AVX1-NEXT: vpmuludq %xmm6, %xmm3, %xmm3 2720; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3 2721; AVX1-NEXT: vpaddq %xmm3, %xmm7, %xmm3 2722; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 2723; AVX1-NEXT: vpand %xmm6, %xmm3, %xmm3 2724; AVX1-NEXT: vpand %xmm6, %xmm0, %xmm0 2725; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 2726; AVX1-NEXT: vpand %xmm6, %xmm2, %xmm2 2727; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm3 2728; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 2729; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 2730; AVX1-NEXT: vpand %xmm6, %xmm1, %xmm1 2731; AVX1-NEXT: vpand %xmm6, %xmm5, %xmm2 2732; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2733; AVX1-NEXT: vpand %xmm6, %xmm9, %xmm2 2734; AVX1-NEXT: vpand %xmm6, %xmm8, %xmm3 2735; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 2736; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2737; AVX1-NEXT: vpackuswb %xmm0, %xmm1, %xmm0 2738; AVX1-NEXT: vzeroupper 2739; AVX1-NEXT: retq 2740; 2741; AVX2-LABEL: trunc_mul_const_v16i64_v16i8: 2742; AVX2: # BB#0: 2743; AVX2-NEXT: vmovdqa {{.*#+}} ymm4 = [4,5,6,7] 2744; AVX2-NEXT: vpmuludq %ymm4, %ymm1, %ymm5 2745; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm1 2746; AVX2-NEXT: vpmuludq %ymm4, %ymm1, %ymm1 2747; AVX2-NEXT: vpsllq $32, %ymm1, %ymm1 2748; AVX2-NEXT: vpaddq %ymm1, %ymm5, %ymm1 2749; AVX2-NEXT: vmovdqa {{.*#+}} ymm4 = [0,1,2,3] 2750; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm5 2751; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 2752; AVX2-NEXT: vpmuludq %ymm4, %ymm0, %ymm0 2753; AVX2-NEXT: vpsllq $32, %ymm0, %ymm0 2754; AVX2-NEXT: vpaddq %ymm0, %ymm5, %ymm0 2755; AVX2-NEXT: vmovdqa {{.*#+}} ymm4 = [12,13,14,15] 2756; AVX2-NEXT: vpmuludq %ymm4, %ymm3, %ymm5 2757; AVX2-NEXT: vpsrlq $32, %ymm3, %ymm3 2758; AVX2-NEXT: vpmuludq %ymm4, %ymm3, %ymm3 2759; AVX2-NEXT: vpsllq $32, %ymm3, %ymm3 2760; AVX2-NEXT: vpaddq %ymm3, %ymm5, %ymm3 2761; AVX2-NEXT: vmovdqa {{.*#+}} ymm4 = [8,9,10,11] 2762; AVX2-NEXT: vpmuludq %ymm4, %ymm2, %ymm5 2763; AVX2-NEXT: vpsrlq $32, %ymm2, %ymm2 2764; AVX2-NEXT: vpmuludq %ymm4, %ymm2, %ymm2 2765; AVX2-NEXT: vpsllq $32, %ymm2, %ymm2 2766; AVX2-NEXT: vpaddq %ymm2, %ymm5, %ymm2 2767; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 2768; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 2769; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 2770; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 2771; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 2772; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 2773; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 2774; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 2775; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2776; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 2777; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2778; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2779; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 2780; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2781; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 2782; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 2783; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2784; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 2785; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2786; AVX2-NEXT: vzeroupper 2787; AVX2-NEXT: retq 2788; 2789; AVX512-LABEL: trunc_mul_const_v16i64_v16i8: 2790; AVX512: # BB#0: 2791; AVX512-NEXT: vmovdqa32 {{.*#+}} zmm2 = [8,9,10,11,12,13,14,15] 2792; AVX512-NEXT: vpmuludq %zmm2, %zmm1, %zmm3 2793; AVX512-NEXT: vpsrlq $32, %zmm1, %zmm1 2794; AVX512-NEXT: vpmuludq %zmm2, %zmm1, %zmm1 2795; AVX512-NEXT: vpsllq $32, %zmm1, %zmm1 2796; AVX512-NEXT: vpaddq %zmm1, %zmm3, %zmm1 2797; AVX512-NEXT: vmovdqa32 {{.*#+}} zmm2 = [0,1,2,3,4,5,6,7] 2798; AVX512-NEXT: vpmuludq %zmm2, %zmm0, %zmm3 2799; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 2800; AVX512-NEXT: vpmuludq %zmm2, %zmm0, %zmm0 2801; AVX512-NEXT: vpsllq $32, %zmm0, %zmm0 2802; AVX512-NEXT: vpaddq %zmm0, %zmm3, %zmm0 2803; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2804; AVX512-NEXT: vpmovqd %zmm1, %ymm1 2805; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 2806; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2807; AVX512-NEXT: retq 2808 %1 = mul <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 2809 %2 = trunc <16 x i64> %1 to <16 x i8> 2810 ret <16 x i8> %2 2811} 2812 2813define <16 x i8> @trunc_mul_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 2814; SSE-LABEL: trunc_mul_const_v16i32_v16i8: 2815; SSE: # BB#0: 2816; SSE-NEXT: movdqa {{.*#+}} xmm4 = [0,1,2,3] 2817; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3] 2818; SSE-NEXT: pmuludq %xmm4, %xmm0 2819; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2820; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2821; SSE-NEXT: pmuludq %xmm5, %xmm4 2822; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2823; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1] 2824; SSE-NEXT: movdqa {{.*#+}} xmm4 = [4,5,6,7] 2825; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,1,3,3] 2826; SSE-NEXT: pmuludq %xmm4, %xmm1 2827; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2828; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2829; SSE-NEXT: pmuludq %xmm5, %xmm4 2830; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2831; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 2832; SSE-NEXT: movdqa {{.*#+}} xmm4 = [8,9,10,11] 2833; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3] 2834; SSE-NEXT: pmuludq %xmm4, %xmm2 2835; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2836; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2837; SSE-NEXT: pmuludq %xmm5, %xmm4 2838; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2839; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 2840; SSE-NEXT: movdqa {{.*#+}} xmm4 = [12,13,14,15] 2841; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,3,3] 2842; SSE-NEXT: pmuludq %xmm4, %xmm3 2843; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 2844; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2845; SSE-NEXT: pmuludq %xmm5, %xmm4 2846; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2847; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 2848; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2849; SSE-NEXT: pand %xmm4, %xmm3 2850; SSE-NEXT: pand %xmm4, %xmm2 2851; SSE-NEXT: packuswb %xmm3, %xmm2 2852; SSE-NEXT: pand %xmm4, %xmm1 2853; SSE-NEXT: pand %xmm4, %xmm0 2854; SSE-NEXT: packuswb %xmm1, %xmm0 2855; SSE-NEXT: packuswb %xmm2, %xmm0 2856; SSE-NEXT: retq 2857; 2858; AVX1-LABEL: trunc_mul_const_v16i32_v16i8: 2859; AVX1: # BB#0: 2860; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm2 2861; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2862; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 2863; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm1, %xmm3 2864; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2865; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm1, %xmm1 2866; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2867; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 2868; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 2869; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 2870; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 2871; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 2872; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 2873; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 2874; AVX1-NEXT: vzeroupper 2875; AVX1-NEXT: retq 2876; 2877; AVX2-LABEL: trunc_mul_const_v16i32_v16i8: 2878; AVX2: # BB#0: 2879; AVX2-NEXT: vpmulld {{.*}}(%rip), %ymm0, %ymm0 2880; AVX2-NEXT: vpmulld {{.*}}(%rip), %ymm1, %ymm1 2881; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 2882; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 2883; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2884; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2885; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 2886; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 2887; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2888; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 2889; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2890; AVX2-NEXT: vzeroupper 2891; AVX2-NEXT: retq 2892; 2893; AVX512-LABEL: trunc_mul_const_v16i32_v16i8: 2894; AVX512: # BB#0: 2895; AVX512-NEXT: vpmulld {{.*}}(%rip), %zmm0, %zmm0 2896; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2897; AVX512-NEXT: retq 2898 %1 = mul <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 2899 %2 = trunc <16 x i32> %1 to <16 x i8> 2900 ret <16 x i8> %2 2901} 2902 2903define <16 x i8> @trunc_mul_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 2904; SSE-LABEL: trunc_mul_const_v16i16_v16i8: 2905; SSE: # BB#0: 2906; SSE-NEXT: pmullw {{.*}}(%rip), %xmm0 2907; SSE-NEXT: pmullw {{.*}}(%rip), %xmm1 2908; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 2909; SSE-NEXT: pand %xmm2, %xmm1 2910; SSE-NEXT: pand %xmm2, %xmm0 2911; SSE-NEXT: packuswb %xmm1, %xmm0 2912; SSE-NEXT: retq 2913; 2914; AVX1-LABEL: trunc_mul_const_v16i16_v16i8: 2915; AVX1: # BB#0: 2916; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm1 2917; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2918; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 2919; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2920; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2921; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2922; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 2923; AVX1-NEXT: vzeroupper 2924; AVX1-NEXT: retq 2925; 2926; AVX2-LABEL: trunc_mul_const_v16i16_v16i8: 2927; AVX2: # BB#0: 2928; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 2929; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 2930; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2931; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2932; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2933; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2934; AVX2-NEXT: vzeroupper 2935; AVX2-NEXT: retq 2936; 2937; AVX512F-LABEL: trunc_mul_const_v16i16_v16i8: 2938; AVX512F: # BB#0: 2939; AVX512F-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 2940; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 2941; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 2942; AVX512F-NEXT: retq 2943; 2944; AVX512BW-LABEL: trunc_mul_const_v16i16_v16i8: 2945; AVX512BW: # BB#0: 2946; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 2947; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 2948; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2949; AVX512BW-NEXT: retq 2950 %1 = mul <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 2951 %2 = trunc <16 x i16> %1 to <16 x i8> 2952 ret <16 x i8> %2 2953} 2954 2955; 2956; and 2957; 2958 2959define <4 x i32> @trunc_and_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 2960; SSE-LABEL: trunc_and_v4i64_4i32: 2961; SSE: # BB#0: 2962; SSE-NEXT: pand %xmm2, %xmm0 2963; SSE-NEXT: pand %xmm3, %xmm1 2964; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2965; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2966; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2967; SSE-NEXT: retq 2968; 2969; AVX1-LABEL: trunc_and_v4i64_4i32: 2970; AVX1: # BB#0: 2971; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 2972; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 2973; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 2974; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2975; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 2976; AVX1-NEXT: vzeroupper 2977; AVX1-NEXT: retq 2978; 2979; AVX2-LABEL: trunc_and_v4i64_4i32: 2980; AVX2: # BB#0: 2981; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 2982; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2983; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2984; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2985; AVX2-NEXT: vzeroupper 2986; AVX2-NEXT: retq 2987; 2988; AVX512-LABEL: trunc_and_v4i64_4i32: 2989; AVX512: # BB#0: 2990; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0 2991; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2992; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2993; AVX512-NEXT: retq 2994 %1 = and <4 x i64> %a0, %a1 2995 %2 = trunc <4 x i64> %1 to <4 x i32> 2996 ret <4 x i32> %2 2997} 2998 2999define <8 x i16> @trunc_and_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 3000; SSE-LABEL: trunc_and_v8i64_8i16: 3001; SSE: # BB#0: 3002; SSE-NEXT: pand %xmm4, %xmm0 3003; SSE-NEXT: pand %xmm5, %xmm1 3004; SSE-NEXT: pand %xmm6, %xmm2 3005; SSE-NEXT: pand %xmm7, %xmm3 3006; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 3007; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 3008; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 3009; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 3010; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 3011; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 3012; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 3013; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3014; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 3015; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 3016; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 3017; SSE-NEXT: movapd %xmm2, %xmm0 3018; SSE-NEXT: retq 3019; 3020; AVX1-LABEL: trunc_and_v8i64_8i16: 3021; AVX1: # BB#0: 3022; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 3023; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1 3024; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3025; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 3026; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3027; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 3028; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 3029; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3030; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3031; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 3032; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 3033; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 3034; AVX1-NEXT: vzeroupper 3035; AVX1-NEXT: retq 3036; 3037; AVX2-LABEL: trunc_and_v8i64_8i16: 3038; AVX2: # BB#0: 3039; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm1 3040; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0 3041; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3042; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3043; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3044; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3045; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3046; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3047; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3048; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3049; AVX2-NEXT: vzeroupper 3050; AVX2-NEXT: retq 3051; 3052; AVX512-LABEL: trunc_and_v8i64_8i16: 3053; AVX512: # BB#0: 3054; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm0 3055; AVX512-NEXT: vpmovqw %zmm0, %xmm0 3056; AVX512-NEXT: retq 3057 %1 = and <8 x i64> %a0, %a1 3058 %2 = trunc <8 x i64> %1 to <8 x i16> 3059 ret <8 x i16> %2 3060} 3061 3062define <8 x i16> @trunc_and_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 3063; SSE-LABEL: trunc_and_v8i32_8i16: 3064; SSE: # BB#0: 3065; SSE-NEXT: pand %xmm2, %xmm0 3066; SSE-NEXT: pand %xmm3, %xmm1 3067; SSE-NEXT: pslld $16, %xmm1 3068; SSE-NEXT: psrad $16, %xmm1 3069; SSE-NEXT: pslld $16, %xmm0 3070; SSE-NEXT: psrad $16, %xmm0 3071; SSE-NEXT: packssdw %xmm1, %xmm0 3072; SSE-NEXT: retq 3073; 3074; AVX1-LABEL: trunc_and_v8i32_8i16: 3075; AVX1: # BB#0: 3076; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 3077; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3078; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 3079; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3080; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3081; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3082; AVX1-NEXT: vzeroupper 3083; AVX1-NEXT: retq 3084; 3085; AVX2-LABEL: trunc_and_v8i32_8i16: 3086; AVX2: # BB#0: 3087; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 3088; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3089; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3090; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3091; AVX2-NEXT: vzeroupper 3092; AVX2-NEXT: retq 3093; 3094; AVX512-LABEL: trunc_and_v8i32_8i16: 3095; AVX512: # BB#0: 3096; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0 3097; AVX512-NEXT: vpmovdw %zmm0, %ymm0 3098; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3099; AVX512-NEXT: retq 3100 %1 = and <8 x i32> %a0, %a1 3101 %2 = trunc <8 x i32> %1 to <8 x i16> 3102 ret <8 x i16> %2 3103} 3104 3105define <16 x i8> @trunc_and_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 3106; SSE-LABEL: trunc_and_v16i64_v16i8: 3107; SSE: # BB#0: 3108; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm0 3109; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm1 3110; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm2 3111; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm3 3112; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm4 3113; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm5 3114; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm6 3115; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm7 3116; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3117; SSE-NEXT: pand %xmm8, %xmm7 3118; SSE-NEXT: pand %xmm8, %xmm6 3119; SSE-NEXT: packuswb %xmm7, %xmm6 3120; SSE-NEXT: pand %xmm8, %xmm5 3121; SSE-NEXT: pand %xmm8, %xmm4 3122; SSE-NEXT: packuswb %xmm5, %xmm4 3123; SSE-NEXT: packuswb %xmm6, %xmm4 3124; SSE-NEXT: pand %xmm8, %xmm3 3125; SSE-NEXT: pand %xmm8, %xmm2 3126; SSE-NEXT: packuswb %xmm3, %xmm2 3127; SSE-NEXT: pand %xmm8, %xmm1 3128; SSE-NEXT: pand %xmm8, %xmm0 3129; SSE-NEXT: packuswb %xmm1, %xmm0 3130; SSE-NEXT: packuswb %xmm2, %xmm0 3131; SSE-NEXT: packuswb %xmm4, %xmm0 3132; SSE-NEXT: retq 3133; 3134; AVX1-LABEL: trunc_and_v16i64_v16i8: 3135; AVX1: # BB#0: 3136; AVX1-NEXT: vandps %ymm4, %ymm0, %ymm0 3137; AVX1-NEXT: vandps %ymm5, %ymm1, %ymm1 3138; AVX1-NEXT: vandps %ymm6, %ymm2, %ymm2 3139; AVX1-NEXT: vandps %ymm7, %ymm3, %ymm3 3140; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 3141; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3142; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3143; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3144; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 3145; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 3146; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3147; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 3148; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 3149; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 3150; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 3151; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3152; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 3153; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 3154; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 3155; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3156; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 3157; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 3158; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3159; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3160; AVX1-NEXT: vzeroupper 3161; AVX1-NEXT: retq 3162; 3163; AVX2-LABEL: trunc_and_v16i64_v16i8: 3164; AVX2: # BB#0: 3165; AVX2-NEXT: vpand %ymm5, %ymm1, %ymm1 3166; AVX2-NEXT: vpand %ymm4, %ymm0, %ymm0 3167; AVX2-NEXT: vpand %ymm7, %ymm3, %ymm3 3168; AVX2-NEXT: vpand %ymm6, %ymm2, %ymm2 3169; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 3170; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3171; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 3172; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 3173; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 3174; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3175; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 3176; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3177; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3178; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 3179; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3180; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3181; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3182; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3183; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3184; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 3185; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3186; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 3187; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3188; AVX2-NEXT: vzeroupper 3189; AVX2-NEXT: retq 3190; 3191; AVX512-LABEL: trunc_and_v16i64_v16i8: 3192; AVX512: # BB#0: 3193; AVX512-NEXT: vpandq %zmm3, %zmm1, %zmm1 3194; AVX512-NEXT: vpandq %zmm2, %zmm0, %zmm0 3195; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3196; AVX512-NEXT: vpmovqd %zmm1, %ymm1 3197; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 3198; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3199; AVX512-NEXT: retq 3200 %1 = and <16 x i64> %a0, %a1 3201 %2 = trunc <16 x i64> %1 to <16 x i8> 3202 ret <16 x i8> %2 3203} 3204 3205define <16 x i8> @trunc_and_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 3206; SSE-LABEL: trunc_and_v16i32_v16i8: 3207; SSE: # BB#0: 3208; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3209; SSE-NEXT: pand %xmm8, %xmm7 3210; SSE-NEXT: pand %xmm3, %xmm7 3211; SSE-NEXT: pand %xmm8, %xmm6 3212; SSE-NEXT: pand %xmm2, %xmm6 3213; SSE-NEXT: packuswb %xmm7, %xmm6 3214; SSE-NEXT: pand %xmm8, %xmm5 3215; SSE-NEXT: pand %xmm1, %xmm5 3216; SSE-NEXT: pand %xmm8, %xmm4 3217; SSE-NEXT: pand %xmm4, %xmm0 3218; SSE-NEXT: packuswb %xmm5, %xmm0 3219; SSE-NEXT: packuswb %xmm6, %xmm0 3220; SSE-NEXT: retq 3221; 3222; AVX1-LABEL: trunc_and_v16i32_v16i8: 3223; AVX1: # BB#0: 3224; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 3225; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1 3226; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3227; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3228; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3229; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 3230; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 3231; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3232; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3233; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 3234; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3235; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3236; AVX1-NEXT: vzeroupper 3237; AVX1-NEXT: retq 3238; 3239; AVX2-LABEL: trunc_and_v16i32_v16i8: 3240; AVX2: # BB#0: 3241; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0 3242; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm1 3243; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3244; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 3245; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3246; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3247; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 3248; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 3249; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3250; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 3251; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3252; AVX2-NEXT: vzeroupper 3253; AVX2-NEXT: retq 3254; 3255; AVX512-LABEL: trunc_and_v16i32_v16i8: 3256; AVX512: # BB#0: 3257; AVX512-NEXT: vpandd %zmm1, %zmm0, %zmm0 3258; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3259; AVX512-NEXT: retq 3260 %1 = and <16 x i32> %a0, %a1 3261 %2 = trunc <16 x i32> %1 to <16 x i8> 3262 ret <16 x i8> %2 3263} 3264 3265define <16 x i8> @trunc_and_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 3266; SSE-LABEL: trunc_and_v16i16_v16i8: 3267; SSE: # BB#0: 3268; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255] 3269; SSE-NEXT: pand %xmm4, %xmm3 3270; SSE-NEXT: pand %xmm1, %xmm3 3271; SSE-NEXT: pand %xmm4, %xmm2 3272; SSE-NEXT: pand %xmm2, %xmm0 3273; SSE-NEXT: packuswb %xmm3, %xmm0 3274; SSE-NEXT: retq 3275; 3276; AVX1-LABEL: trunc_and_v16i16_v16i8: 3277; AVX1: # BB#0: 3278; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 3279; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3280; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3281; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3282; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3283; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3284; AVX1-NEXT: vzeroupper 3285; AVX1-NEXT: retq 3286; 3287; AVX2-LABEL: trunc_and_v16i16_v16i8: 3288; AVX2: # BB#0: 3289; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 3290; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 3291; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3292; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3293; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3294; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3295; AVX2-NEXT: vzeroupper 3296; AVX2-NEXT: retq 3297; 3298; AVX512F-LABEL: trunc_and_v16i16_v16i8: 3299; AVX512F: # BB#0: 3300; AVX512F-NEXT: vpand %ymm1, %ymm0, %ymm0 3301; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 3302; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 3303; AVX512F-NEXT: retq 3304; 3305; AVX512BW-LABEL: trunc_and_v16i16_v16i8: 3306; AVX512BW: # BB#0: 3307; AVX512BW-NEXT: vpand %ymm1, %ymm0, %ymm0 3308; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 3309; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3310; AVX512BW-NEXT: retq 3311 %1 = and <16 x i16> %a0, %a1 3312 %2 = trunc <16 x i16> %1 to <16 x i8> 3313 ret <16 x i8> %2 3314} 3315 3316; 3317; and to constant 3318; 3319 3320define <4 x i32> @trunc_and_const_v4i64_4i32(<4 x i64> %a0) nounwind { 3321; SSE-LABEL: trunc_and_const_v4i64_4i32: 3322; SSE: # BB#0: 3323; SSE-NEXT: movl $1, %eax 3324; SSE-NEXT: movd %rax, %xmm2 3325; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 3326; SSE-NEXT: pand %xmm0, %xmm2 3327; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3328; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 3329; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 3330; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3331; SSE-NEXT: retq 3332; 3333; AVX1-LABEL: trunc_and_const_v4i64_4i32: 3334; AVX1: # BB#0: 3335; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3336; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3337; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 3338; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3339; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 3340; AVX1-NEXT: vzeroupper 3341; AVX1-NEXT: retq 3342; 3343; AVX2-LABEL: trunc_and_const_v4i64_4i32: 3344; AVX2: # BB#0: 3345; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3346; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3347; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3348; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3349; AVX2-NEXT: vzeroupper 3350; AVX2-NEXT: retq 3351; 3352; AVX512-LABEL: trunc_and_const_v4i64_4i32: 3353; AVX512: # BB#0: 3354; AVX512-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3355; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3356; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3357; AVX512-NEXT: retq 3358 %1 = and <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 3359 %2 = trunc <4 x i64> %1 to <4 x i32> 3360 ret <4 x i32> %2 3361} 3362 3363define <8 x i16> @trunc_and_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 3364; SSE-LABEL: trunc_and_const_v16i64_v16i16: 3365; SSE: # BB#0: 3366; SSE-NEXT: movl $1, %eax 3367; SSE-NEXT: movd %rax, %xmm4 3368; SSE-NEXT: pslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 3369; SSE-NEXT: pand %xmm0, %xmm4 3370; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3371; SSE-NEXT: pand {{.*}}(%rip), %xmm2 3372; SSE-NEXT: pand {{.*}}(%rip), %xmm3 3373; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 3374; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm0[0,1,0,2,4,5,6,7] 3375; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 3376; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 3377; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 3378; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm4[0,2,2,3] 3379; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7] 3380; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 3381; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 3382; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 3383; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 3384; SSE-NEXT: retq 3385; 3386; AVX1-LABEL: trunc_and_const_v16i64_v16i16: 3387; AVX1: # BB#0: 3388; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3389; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 3390; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3391; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 3392; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3393; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 3394; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 3395; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3396; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3397; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 3398; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 3399; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 3400; AVX1-NEXT: vzeroupper 3401; AVX1-NEXT: retq 3402; 3403; AVX2-LABEL: trunc_and_const_v16i64_v16i16: 3404; AVX2: # BB#0: 3405; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 3406; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3407; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3408; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3409; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3410; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3411; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3412; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3413; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3414; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3415; AVX2-NEXT: vzeroupper 3416; AVX2-NEXT: retq 3417; 3418; AVX512-LABEL: trunc_and_const_v16i64_v16i16: 3419; AVX512: # BB#0: 3420; AVX512-NEXT: vpandq {{.*}}(%rip), %zmm0, %zmm0 3421; AVX512-NEXT: vpmovqw %zmm0, %xmm0 3422; AVX512-NEXT: retq 3423 %1 = and <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 3424 %2 = trunc <8 x i64> %1 to <8 x i16> 3425 ret <8 x i16> %2 3426} 3427 3428define <8 x i16> @trunc_and_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 3429; SSE-LABEL: trunc_and_const_v16i32_v16i16: 3430; SSE: # BB#0: 3431; SSE-NEXT: pand {{.*}}(%rip), %xmm0 3432; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3433; SSE-NEXT: pslld $16, %xmm1 3434; SSE-NEXT: psrad $16, %xmm1 3435; SSE-NEXT: pslld $16, %xmm0 3436; SSE-NEXT: psrad $16, %xmm0 3437; SSE-NEXT: packssdw %xmm1, %xmm0 3438; SSE-NEXT: retq 3439; 3440; AVX1-LABEL: trunc_and_const_v16i32_v16i16: 3441; AVX1: # BB#0: 3442; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3443; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3444; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 3445; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3446; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3447; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3448; AVX1-NEXT: vzeroupper 3449; AVX1-NEXT: retq 3450; 3451; AVX2-LABEL: trunc_and_const_v16i32_v16i16: 3452; AVX2: # BB#0: 3453; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3454; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3455; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3456; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3457; AVX2-NEXT: vzeroupper 3458; AVX2-NEXT: retq 3459; 3460; AVX512-LABEL: trunc_and_const_v16i32_v16i16: 3461; AVX512: # BB#0: 3462; AVX512-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3463; AVX512-NEXT: vpmovdw %zmm0, %ymm0 3464; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3465; AVX512-NEXT: retq 3466 %1 = and <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 3467 %2 = trunc <8 x i32> %1 to <8 x i16> 3468 ret <8 x i16> %2 3469} 3470 3471define <16 x i8> @trunc_and_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 3472; SSE-LABEL: trunc_and_const_v16i64_v16i8: 3473; SSE: # BB#0: 3474; SSE-NEXT: movl $1, %eax 3475; SSE-NEXT: movd %rax, %xmm8 3476; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 3477; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3478; SSE-NEXT: pand {{.*}}(%rip), %xmm2 3479; SSE-NEXT: pand {{.*}}(%rip), %xmm3 3480; SSE-NEXT: pand {{.*}}(%rip), %xmm4 3481; SSE-NEXT: pand {{.*}}(%rip), %xmm5 3482; SSE-NEXT: pand {{.*}}(%rip), %xmm6 3483; SSE-NEXT: pand {{.*}}(%rip), %xmm7 3484; SSE-NEXT: movdqa {{.*#+}} xmm9 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3485; SSE-NEXT: pand %xmm9, %xmm7 3486; SSE-NEXT: pand %xmm9, %xmm6 3487; SSE-NEXT: packuswb %xmm7, %xmm6 3488; SSE-NEXT: pand %xmm9, %xmm5 3489; SSE-NEXT: pand %xmm9, %xmm4 3490; SSE-NEXT: packuswb %xmm5, %xmm4 3491; SSE-NEXT: packuswb %xmm6, %xmm4 3492; SSE-NEXT: pand %xmm9, %xmm3 3493; SSE-NEXT: pand %xmm9, %xmm2 3494; SSE-NEXT: packuswb %xmm3, %xmm2 3495; SSE-NEXT: pand %xmm9, %xmm1 3496; SSE-NEXT: pand %xmm9, %xmm8 3497; SSE-NEXT: pand %xmm8, %xmm0 3498; SSE-NEXT: packuswb %xmm1, %xmm0 3499; SSE-NEXT: packuswb %xmm2, %xmm0 3500; SSE-NEXT: packuswb %xmm4, %xmm0 3501; SSE-NEXT: retq 3502; 3503; AVX1-LABEL: trunc_and_const_v16i64_v16i8: 3504; AVX1: # BB#0: 3505; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3506; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 3507; AVX1-NEXT: vandps {{.*}}(%rip), %ymm2, %ymm2 3508; AVX1-NEXT: vandps {{.*}}(%rip), %ymm3, %ymm3 3509; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 3510; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3511; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3512; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3513; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 3514; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 3515; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3516; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 3517; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 3518; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 3519; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 3520; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3521; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 3522; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 3523; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 3524; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3525; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 3526; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 3527; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3528; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3529; AVX1-NEXT: vzeroupper 3530; AVX1-NEXT: retq 3531; 3532; AVX2-LABEL: trunc_and_const_v16i64_v16i8: 3533; AVX2: # BB#0: 3534; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 3535; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3536; AVX2-NEXT: vpand {{.*}}(%rip), %ymm3, %ymm3 3537; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 3538; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 3539; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3540; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 3541; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 3542; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 3543; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3544; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 3545; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3546; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3547; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 3548; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3549; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3550; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3551; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3552; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3553; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 3554; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3555; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 3556; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3557; AVX2-NEXT: vzeroupper 3558; AVX2-NEXT: retq 3559; 3560; AVX512-LABEL: trunc_and_const_v16i64_v16i8: 3561; AVX512: # BB#0: 3562; AVX512-NEXT: vpandq {{.*}}(%rip), %zmm1, %zmm1 3563; AVX512-NEXT: vpandq {{.*}}(%rip), %zmm0, %zmm0 3564; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3565; AVX512-NEXT: vpmovqd %zmm1, %ymm1 3566; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 3567; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3568; AVX512-NEXT: retq 3569 %1 = and <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 3570 %2 = trunc <16 x i64> %1 to <16 x i8> 3571 ret <16 x i8> %2 3572} 3573 3574define <16 x i8> @trunc_and_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 3575; SSE-LABEL: trunc_and_const_v16i32_v16i8: 3576; SSE: # BB#0: 3577; SSE-NEXT: pand {{.*}}(%rip), %xmm0 3578; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3579; SSE-NEXT: pand {{.*}}(%rip), %xmm2 3580; SSE-NEXT: pand {{.*}}(%rip), %xmm3 3581; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3582; SSE-NEXT: pand %xmm4, %xmm3 3583; SSE-NEXT: pand %xmm4, %xmm2 3584; SSE-NEXT: packuswb %xmm3, %xmm2 3585; SSE-NEXT: pand %xmm4, %xmm1 3586; SSE-NEXT: pand %xmm4, %xmm0 3587; SSE-NEXT: packuswb %xmm1, %xmm0 3588; SSE-NEXT: packuswb %xmm2, %xmm0 3589; SSE-NEXT: retq 3590; 3591; AVX1-LABEL: trunc_and_const_v16i32_v16i8: 3592; AVX1: # BB#0: 3593; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3594; AVX1-NEXT: vandps {{.*}}(%rip), %ymm1, %ymm1 3595; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3596; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3597; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3598; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 3599; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 3600; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3601; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3602; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 3603; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3604; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3605; AVX1-NEXT: vzeroupper 3606; AVX1-NEXT: retq 3607; 3608; AVX2-LABEL: trunc_and_const_v16i32_v16i8: 3609; AVX2: # BB#0: 3610; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3611; AVX2-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1 3612; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3613; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 3614; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3615; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3616; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 3617; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 3618; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3619; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 3620; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3621; AVX2-NEXT: vzeroupper 3622; AVX2-NEXT: retq 3623; 3624; AVX512-LABEL: trunc_and_const_v16i32_v16i8: 3625; AVX512: # BB#0: 3626; AVX512-NEXT: vpandd {{.*}}(%rip), %zmm0, %zmm0 3627; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3628; AVX512-NEXT: retq 3629 %1 = and <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 3630 %2 = trunc <16 x i32> %1 to <16 x i8> 3631 ret <16 x i8> %2 3632} 3633 3634define <16 x i8> @trunc_and_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 3635; SSE-LABEL: trunc_and_const_v16i16_v16i8: 3636; SSE: # BB#0: 3637; SSE-NEXT: pand {{.*}}(%rip), %xmm0 3638; SSE-NEXT: pand {{.*}}(%rip), %xmm1 3639; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 3640; SSE-NEXT: pand %xmm2, %xmm1 3641; SSE-NEXT: pand %xmm2, %xmm0 3642; SSE-NEXT: packuswb %xmm1, %xmm0 3643; SSE-NEXT: retq 3644; 3645; AVX1-LABEL: trunc_and_const_v16i16_v16i8: 3646; AVX1: # BB#0: 3647; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 3648; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3649; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3650; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3651; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3652; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3653; AVX1-NEXT: vzeroupper 3654; AVX1-NEXT: retq 3655; 3656; AVX2-LABEL: trunc_and_const_v16i16_v16i8: 3657; AVX2: # BB#0: 3658; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3659; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 3660; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3661; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3662; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3663; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3664; AVX2-NEXT: vzeroupper 3665; AVX2-NEXT: retq 3666; 3667; AVX512F-LABEL: trunc_and_const_v16i16_v16i8: 3668; AVX512F: # BB#0: 3669; AVX512F-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3670; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 3671; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 3672; AVX512F-NEXT: retq 3673; 3674; AVX512BW-LABEL: trunc_and_const_v16i16_v16i8: 3675; AVX512BW: # BB#0: 3676; AVX512BW-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 3677; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 3678; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3679; AVX512BW-NEXT: retq 3680 %1 = and <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 3681 %2 = trunc <16 x i16> %1 to <16 x i8> 3682 ret <16 x i8> %2 3683} 3684 3685; 3686; xor 3687; 3688 3689define <4 x i32> @trunc_xor_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 3690; SSE-LABEL: trunc_xor_v4i64_4i32: 3691; SSE: # BB#0: 3692; SSE-NEXT: pxor %xmm2, %xmm0 3693; SSE-NEXT: pxor %xmm3, %xmm1 3694; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 3695; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3696; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3697; SSE-NEXT: retq 3698; 3699; AVX1-LABEL: trunc_xor_v4i64_4i32: 3700; AVX1: # BB#0: 3701; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 3702; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3703; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 3704; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3705; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 3706; AVX1-NEXT: vzeroupper 3707; AVX1-NEXT: retq 3708; 3709; AVX2-LABEL: trunc_xor_v4i64_4i32: 3710; AVX2: # BB#0: 3711; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 3712; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3713; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3714; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3715; AVX2-NEXT: vzeroupper 3716; AVX2-NEXT: retq 3717; 3718; AVX512-LABEL: trunc_xor_v4i64_4i32: 3719; AVX512: # BB#0: 3720; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0 3721; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3722; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3723; AVX512-NEXT: retq 3724 %1 = xor <4 x i64> %a0, %a1 3725 %2 = trunc <4 x i64> %1 to <4 x i32> 3726 ret <4 x i32> %2 3727} 3728 3729define <8 x i16> @trunc_xor_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 3730; SSE-LABEL: trunc_xor_v8i64_8i16: 3731; SSE: # BB#0: 3732; SSE-NEXT: pxor %xmm4, %xmm0 3733; SSE-NEXT: pxor %xmm5, %xmm1 3734; SSE-NEXT: pxor %xmm6, %xmm2 3735; SSE-NEXT: pxor %xmm7, %xmm3 3736; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 3737; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 3738; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 3739; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 3740; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 3741; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 3742; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 3743; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3744; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 3745; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 3746; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 3747; SSE-NEXT: movapd %xmm2, %xmm0 3748; SSE-NEXT: retq 3749; 3750; AVX1-LABEL: trunc_xor_v8i64_8i16: 3751; AVX1: # BB#0: 3752; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0 3753; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1 3754; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3755; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 3756; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3757; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 3758; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 3759; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3760; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3761; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 3762; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 3763; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 3764; AVX1-NEXT: vzeroupper 3765; AVX1-NEXT: retq 3766; 3767; AVX2-LABEL: trunc_xor_v8i64_8i16: 3768; AVX2: # BB#0: 3769; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1 3770; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0 3771; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3772; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3773; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3774; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3775; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3776; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3777; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3778; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3779; AVX2-NEXT: vzeroupper 3780; AVX2-NEXT: retq 3781; 3782; AVX512-LABEL: trunc_xor_v8i64_8i16: 3783; AVX512: # BB#0: 3784; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0 3785; AVX512-NEXT: vpmovqw %zmm0, %xmm0 3786; AVX512-NEXT: retq 3787 %1 = xor <8 x i64> %a0, %a1 3788 %2 = trunc <8 x i64> %1 to <8 x i16> 3789 ret <8 x i16> %2 3790} 3791 3792define <8 x i16> @trunc_xor_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 3793; SSE-LABEL: trunc_xor_v8i32_8i16: 3794; SSE: # BB#0: 3795; SSE-NEXT: pxor %xmm2, %xmm0 3796; SSE-NEXT: pxor %xmm3, %xmm1 3797; SSE-NEXT: pslld $16, %xmm1 3798; SSE-NEXT: psrad $16, %xmm1 3799; SSE-NEXT: pslld $16, %xmm0 3800; SSE-NEXT: psrad $16, %xmm0 3801; SSE-NEXT: packssdw %xmm1, %xmm0 3802; SSE-NEXT: retq 3803; 3804; AVX1-LABEL: trunc_xor_v8i32_8i16: 3805; AVX1: # BB#0: 3806; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 3807; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3808; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 3809; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3810; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3811; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3812; AVX1-NEXT: vzeroupper 3813; AVX1-NEXT: retq 3814; 3815; AVX2-LABEL: trunc_xor_v8i32_8i16: 3816; AVX2: # BB#0: 3817; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 3818; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 3819; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3820; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3821; AVX2-NEXT: vzeroupper 3822; AVX2-NEXT: retq 3823; 3824; AVX512-LABEL: trunc_xor_v8i32_8i16: 3825; AVX512: # BB#0: 3826; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0 3827; AVX512-NEXT: vpmovdw %zmm0, %ymm0 3828; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3829; AVX512-NEXT: retq 3830 %1 = xor <8 x i32> %a0, %a1 3831 %2 = trunc <8 x i32> %1 to <8 x i16> 3832 ret <8 x i16> %2 3833} 3834 3835define <16 x i8> @trunc_xor_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 3836; SSE-LABEL: trunc_xor_v16i64_v16i8: 3837; SSE: # BB#0: 3838; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm0 3839; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm1 3840; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm2 3841; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm3 3842; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm4 3843; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm5 3844; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm6 3845; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm7 3846; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3847; SSE-NEXT: pand %xmm8, %xmm7 3848; SSE-NEXT: pand %xmm8, %xmm6 3849; SSE-NEXT: packuswb %xmm7, %xmm6 3850; SSE-NEXT: pand %xmm8, %xmm5 3851; SSE-NEXT: pand %xmm8, %xmm4 3852; SSE-NEXT: packuswb %xmm5, %xmm4 3853; SSE-NEXT: packuswb %xmm6, %xmm4 3854; SSE-NEXT: pand %xmm8, %xmm3 3855; SSE-NEXT: pand %xmm8, %xmm2 3856; SSE-NEXT: packuswb %xmm3, %xmm2 3857; SSE-NEXT: pand %xmm8, %xmm1 3858; SSE-NEXT: pand %xmm8, %xmm0 3859; SSE-NEXT: packuswb %xmm1, %xmm0 3860; SSE-NEXT: packuswb %xmm2, %xmm0 3861; SSE-NEXT: packuswb %xmm4, %xmm0 3862; SSE-NEXT: retq 3863; 3864; AVX1-LABEL: trunc_xor_v16i64_v16i8: 3865; AVX1: # BB#0: 3866; AVX1-NEXT: vxorps %ymm4, %ymm0, %ymm0 3867; AVX1-NEXT: vxorps %ymm5, %ymm1, %ymm1 3868; AVX1-NEXT: vxorps %ymm6, %ymm2, %ymm2 3869; AVX1-NEXT: vxorps %ymm7, %ymm3, %ymm3 3870; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 3871; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3872; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3873; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3874; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 3875; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 3876; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3877; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 3878; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 3879; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 3880; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 3881; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3882; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 3883; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 3884; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 3885; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3886; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 3887; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 3888; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3889; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3890; AVX1-NEXT: vzeroupper 3891; AVX1-NEXT: retq 3892; 3893; AVX2-LABEL: trunc_xor_v16i64_v16i8: 3894; AVX2: # BB#0: 3895; AVX2-NEXT: vpxor %ymm5, %ymm1, %ymm1 3896; AVX2-NEXT: vpxor %ymm4, %ymm0, %ymm0 3897; AVX2-NEXT: vpxor %ymm7, %ymm3, %ymm3 3898; AVX2-NEXT: vpxor %ymm6, %ymm2, %ymm2 3899; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 3900; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3901; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 3902; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 3903; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 3904; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3905; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 3906; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3907; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3908; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 3909; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3910; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3911; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3912; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3913; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3914; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 3915; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3916; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 3917; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3918; AVX2-NEXT: vzeroupper 3919; AVX2-NEXT: retq 3920; 3921; AVX512-LABEL: trunc_xor_v16i64_v16i8: 3922; AVX512: # BB#0: 3923; AVX512-NEXT: vpxorq %zmm3, %zmm1, %zmm1 3924; AVX512-NEXT: vpxorq %zmm2, %zmm0, %zmm0 3925; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3926; AVX512-NEXT: vpmovqd %zmm1, %ymm1 3927; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 3928; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3929; AVX512-NEXT: retq 3930 %1 = xor <16 x i64> %a0, %a1 3931 %2 = trunc <16 x i64> %1 to <16 x i8> 3932 ret <16 x i8> %2 3933} 3934 3935define <16 x i8> @trunc_xor_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 3936; SSE-LABEL: trunc_xor_v16i32_v16i8: 3937; SSE: # BB#0: 3938; SSE-NEXT: pxor %xmm4, %xmm0 3939; SSE-NEXT: pxor %xmm5, %xmm1 3940; SSE-NEXT: pxor %xmm6, %xmm2 3941; SSE-NEXT: pxor %xmm7, %xmm3 3942; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3943; SSE-NEXT: pand %xmm4, %xmm3 3944; SSE-NEXT: pand %xmm4, %xmm2 3945; SSE-NEXT: packuswb %xmm3, %xmm2 3946; SSE-NEXT: pand %xmm4, %xmm1 3947; SSE-NEXT: pand %xmm4, %xmm0 3948; SSE-NEXT: packuswb %xmm1, %xmm0 3949; SSE-NEXT: packuswb %xmm2, %xmm0 3950; SSE-NEXT: retq 3951; 3952; AVX1-LABEL: trunc_xor_v16i32_v16i8: 3953; AVX1: # BB#0: 3954; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0 3955; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1 3956; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3957; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3958; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3959; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 3960; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 3961; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3962; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3963; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 3964; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3965; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3966; AVX1-NEXT: vzeroupper 3967; AVX1-NEXT: retq 3968; 3969; AVX2-LABEL: trunc_xor_v16i32_v16i8: 3970; AVX2: # BB#0: 3971; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0 3972; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1 3973; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 3974; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 3975; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3976; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3977; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 3978; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 3979; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3980; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 3981; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3982; AVX2-NEXT: vzeroupper 3983; AVX2-NEXT: retq 3984; 3985; AVX512-LABEL: trunc_xor_v16i32_v16i8: 3986; AVX512: # BB#0: 3987; AVX512-NEXT: vpxord %zmm1, %zmm0, %zmm0 3988; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3989; AVX512-NEXT: retq 3990 %1 = xor <16 x i32> %a0, %a1 3991 %2 = trunc <16 x i32> %1 to <16 x i8> 3992 ret <16 x i8> %2 3993} 3994 3995define <16 x i8> @trunc_xor_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 3996; SSE-LABEL: trunc_xor_v16i16_v16i8: 3997; SSE: # BB#0: 3998; SSE-NEXT: pxor %xmm2, %xmm0 3999; SSE-NEXT: pxor %xmm3, %xmm1 4000; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 4001; SSE-NEXT: pand %xmm2, %xmm1 4002; SSE-NEXT: pand %xmm2, %xmm0 4003; SSE-NEXT: packuswb %xmm1, %xmm0 4004; SSE-NEXT: retq 4005; 4006; AVX1-LABEL: trunc_xor_v16i16_v16i8: 4007; AVX1: # BB#0: 4008; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 4009; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4010; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4011; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4012; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4013; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4014; AVX1-NEXT: vzeroupper 4015; AVX1-NEXT: retq 4016; 4017; AVX2-LABEL: trunc_xor_v16i16_v16i8: 4018; AVX2: # BB#0: 4019; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 4020; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 4021; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4022; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4023; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4024; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4025; AVX2-NEXT: vzeroupper 4026; AVX2-NEXT: retq 4027; 4028; AVX512F-LABEL: trunc_xor_v16i16_v16i8: 4029; AVX512F: # BB#0: 4030; AVX512F-NEXT: vpxor %ymm1, %ymm0, %ymm0 4031; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 4032; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4033; AVX512F-NEXT: retq 4034; 4035; AVX512BW-LABEL: trunc_xor_v16i16_v16i8: 4036; AVX512BW: # BB#0: 4037; AVX512BW-NEXT: vpxor %ymm1, %ymm0, %ymm0 4038; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 4039; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4040; AVX512BW-NEXT: retq 4041 %1 = xor <16 x i16> %a0, %a1 4042 %2 = trunc <16 x i16> %1 to <16 x i8> 4043 ret <16 x i8> %2 4044} 4045 4046; 4047; xor to constant 4048; 4049 4050define <4 x i32> @trunc_xor_const_v4i64_4i32(<4 x i64> %a0) nounwind { 4051; SSE-LABEL: trunc_xor_const_v4i64_4i32: 4052; SSE: # BB#0: 4053; SSE-NEXT: movl $1, %eax 4054; SSE-NEXT: movd %rax, %xmm2 4055; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 4056; SSE-NEXT: pxor %xmm0, %xmm2 4057; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4058; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 4059; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4060; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4061; SSE-NEXT: retq 4062; 4063; AVX1-LABEL: trunc_xor_const_v4i64_4i32: 4064; AVX1: # BB#0: 4065; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4066; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4067; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 4068; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4069; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 4070; AVX1-NEXT: vzeroupper 4071; AVX1-NEXT: retq 4072; 4073; AVX2-LABEL: trunc_xor_const_v4i64_4i32: 4074; AVX2: # BB#0: 4075; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4076; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4077; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4078; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4079; AVX2-NEXT: vzeroupper 4080; AVX2-NEXT: retq 4081; 4082; AVX512-LABEL: trunc_xor_const_v4i64_4i32: 4083; AVX512: # BB#0: 4084; AVX512-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4085; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4086; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4087; AVX512-NEXT: retq 4088 %1 = xor <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 4089 %2 = trunc <4 x i64> %1 to <4 x i32> 4090 ret <4 x i32> %2 4091} 4092 4093define <8 x i16> @trunc_xor_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 4094; SSE-LABEL: trunc_xor_const_v16i64_v16i16: 4095; SSE: # BB#0: 4096; SSE-NEXT: movl $1, %eax 4097; SSE-NEXT: movd %rax, %xmm4 4098; SSE-NEXT: pslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 4099; SSE-NEXT: pxor %xmm0, %xmm4 4100; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4101; SSE-NEXT: pxor {{.*}}(%rip), %xmm2 4102; SSE-NEXT: pxor {{.*}}(%rip), %xmm3 4103; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 4104; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm0[0,1,0,2,4,5,6,7] 4105; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 4106; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 4107; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 4108; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm4[0,2,2,3] 4109; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7] 4110; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4111; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 4112; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 4113; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 4114; SSE-NEXT: retq 4115; 4116; AVX1-LABEL: trunc_xor_const_v16i64_v16i16: 4117; AVX1: # BB#0: 4118; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4119; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm1, %ymm1 4120; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4121; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 4122; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4123; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 4124; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 4125; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4126; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4127; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 4128; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 4129; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 4130; AVX1-NEXT: vzeroupper 4131; AVX1-NEXT: retq 4132; 4133; AVX2-LABEL: trunc_xor_const_v16i64_v16i16: 4134; AVX2: # BB#0: 4135; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm1, %ymm1 4136; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4137; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4138; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4139; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 4140; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4141; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4142; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4143; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4144; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4145; AVX2-NEXT: vzeroupper 4146; AVX2-NEXT: retq 4147; 4148; AVX512-LABEL: trunc_xor_const_v16i64_v16i16: 4149; AVX512: # BB#0: 4150; AVX512-NEXT: vpxorq {{.*}}(%rip), %zmm0, %zmm0 4151; AVX512-NEXT: vpmovqw %zmm0, %xmm0 4152; AVX512-NEXT: retq 4153 %1 = xor <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 4154 %2 = trunc <8 x i64> %1 to <8 x i16> 4155 ret <8 x i16> %2 4156} 4157 4158define <8 x i16> @trunc_xor_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 4159; SSE-LABEL: trunc_xor_const_v16i32_v16i16: 4160; SSE: # BB#0: 4161; SSE-NEXT: pxor {{.*}}(%rip), %xmm0 4162; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4163; SSE-NEXT: pslld $16, %xmm1 4164; SSE-NEXT: psrad $16, %xmm1 4165; SSE-NEXT: pslld $16, %xmm0 4166; SSE-NEXT: psrad $16, %xmm0 4167; SSE-NEXT: packssdw %xmm1, %xmm0 4168; SSE-NEXT: retq 4169; 4170; AVX1-LABEL: trunc_xor_const_v16i32_v16i16: 4171; AVX1: # BB#0: 4172; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4173; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4174; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 4175; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4176; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4177; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4178; AVX1-NEXT: vzeroupper 4179; AVX1-NEXT: retq 4180; 4181; AVX2-LABEL: trunc_xor_const_v16i32_v16i16: 4182; AVX2: # BB#0: 4183; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4184; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4185; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4186; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4187; AVX2-NEXT: vzeroupper 4188; AVX2-NEXT: retq 4189; 4190; AVX512-LABEL: trunc_xor_const_v16i32_v16i16: 4191; AVX512: # BB#0: 4192; AVX512-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4193; AVX512-NEXT: vpmovdw %zmm0, %ymm0 4194; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4195; AVX512-NEXT: retq 4196 %1 = xor <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 4197 %2 = trunc <8 x i32> %1 to <8 x i16> 4198 ret <8 x i16> %2 4199} 4200 4201define <16 x i8> @trunc_xor_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 4202; SSE-LABEL: trunc_xor_const_v16i64_v16i8: 4203; SSE: # BB#0: 4204; SSE-NEXT: movl $1, %eax 4205; SSE-NEXT: movd %rax, %xmm8 4206; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 4207; SSE-NEXT: pxor %xmm8, %xmm0 4208; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4209; SSE-NEXT: pxor {{.*}}(%rip), %xmm2 4210; SSE-NEXT: pxor {{.*}}(%rip), %xmm3 4211; SSE-NEXT: pxor {{.*}}(%rip), %xmm4 4212; SSE-NEXT: pxor {{.*}}(%rip), %xmm5 4213; SSE-NEXT: pxor {{.*}}(%rip), %xmm6 4214; SSE-NEXT: pxor {{.*}}(%rip), %xmm7 4215; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4216; SSE-NEXT: pand %xmm8, %xmm7 4217; SSE-NEXT: pand %xmm8, %xmm6 4218; SSE-NEXT: packuswb %xmm7, %xmm6 4219; SSE-NEXT: pand %xmm8, %xmm5 4220; SSE-NEXT: pand %xmm8, %xmm4 4221; SSE-NEXT: packuswb %xmm5, %xmm4 4222; SSE-NEXT: packuswb %xmm6, %xmm4 4223; SSE-NEXT: pand %xmm8, %xmm3 4224; SSE-NEXT: pand %xmm8, %xmm2 4225; SSE-NEXT: packuswb %xmm3, %xmm2 4226; SSE-NEXT: pand %xmm8, %xmm1 4227; SSE-NEXT: pand %xmm8, %xmm0 4228; SSE-NEXT: packuswb %xmm1, %xmm0 4229; SSE-NEXT: packuswb %xmm2, %xmm0 4230; SSE-NEXT: packuswb %xmm4, %xmm0 4231; SSE-NEXT: retq 4232; 4233; AVX1-LABEL: trunc_xor_const_v16i64_v16i8: 4234; AVX1: # BB#0: 4235; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4236; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm1, %ymm1 4237; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm2, %ymm2 4238; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm3, %ymm3 4239; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 4240; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4241; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4242; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4243; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 4244; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 4245; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4246; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 4247; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 4248; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 4249; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 4250; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4251; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 4252; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 4253; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 4254; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4255; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 4256; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 4257; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4258; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4259; AVX1-NEXT: vzeroupper 4260; AVX1-NEXT: retq 4261; 4262; AVX2-LABEL: trunc_xor_const_v16i64_v16i8: 4263; AVX2: # BB#0: 4264; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm1, %ymm1 4265; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4266; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm3, %ymm3 4267; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm2, %ymm2 4268; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 4269; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4270; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 4271; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 4272; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 4273; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 4274; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 4275; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4276; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4277; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 4278; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4279; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4280; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 4281; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4282; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4283; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 4284; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4285; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 4286; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 4287; AVX2-NEXT: vzeroupper 4288; AVX2-NEXT: retq 4289; 4290; AVX512-LABEL: trunc_xor_const_v16i64_v16i8: 4291; AVX512: # BB#0: 4292; AVX512-NEXT: vpxorq {{.*}}(%rip), %zmm1, %zmm1 4293; AVX512-NEXT: vpxorq {{.*}}(%rip), %zmm0, %zmm0 4294; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4295; AVX512-NEXT: vpmovqd %zmm1, %ymm1 4296; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 4297; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4298; AVX512-NEXT: retq 4299 %1 = xor <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 4300 %2 = trunc <16 x i64> %1 to <16 x i8> 4301 ret <16 x i8> %2 4302} 4303 4304define <16 x i8> @trunc_xor_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 4305; SSE-LABEL: trunc_xor_const_v16i32_v16i8: 4306; SSE: # BB#0: 4307; SSE-NEXT: pxor {{.*}}(%rip), %xmm0 4308; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4309; SSE-NEXT: pxor {{.*}}(%rip), %xmm2 4310; SSE-NEXT: pxor {{.*}}(%rip), %xmm3 4311; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4312; SSE-NEXT: pand %xmm4, %xmm3 4313; SSE-NEXT: pand %xmm4, %xmm2 4314; SSE-NEXT: packuswb %xmm3, %xmm2 4315; SSE-NEXT: pand %xmm4, %xmm1 4316; SSE-NEXT: pand %xmm4, %xmm0 4317; SSE-NEXT: packuswb %xmm1, %xmm0 4318; SSE-NEXT: packuswb %xmm2, %xmm0 4319; SSE-NEXT: retq 4320; 4321; AVX1-LABEL: trunc_xor_const_v16i32_v16i8: 4322; AVX1: # BB#0: 4323; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4324; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm1, %ymm1 4325; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4326; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4327; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 4328; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 4329; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 4330; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4331; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 4332; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 4333; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4334; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4335; AVX1-NEXT: vzeroupper 4336; AVX1-NEXT: retq 4337; 4338; AVX2-LABEL: trunc_xor_const_v16i32_v16i8: 4339; AVX2: # BB#0: 4340; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4341; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm1, %ymm1 4342; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 4343; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 4344; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4345; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4346; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 4347; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 4348; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4349; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 4350; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4351; AVX2-NEXT: vzeroupper 4352; AVX2-NEXT: retq 4353; 4354; AVX512-LABEL: trunc_xor_const_v16i32_v16i8: 4355; AVX512: # BB#0: 4356; AVX512-NEXT: vpxord {{.*}}(%rip), %zmm0, %zmm0 4357; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4358; AVX512-NEXT: retq 4359 %1 = xor <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 4360 %2 = trunc <16 x i32> %1 to <16 x i8> 4361 ret <16 x i8> %2 4362} 4363 4364define <16 x i8> @trunc_xor_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 4365; SSE-LABEL: trunc_xor_const_v16i16_v16i8: 4366; SSE: # BB#0: 4367; SSE-NEXT: pxor {{.*}}(%rip), %xmm0 4368; SSE-NEXT: pxor {{.*}}(%rip), %xmm1 4369; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 4370; SSE-NEXT: pand %xmm2, %xmm1 4371; SSE-NEXT: pand %xmm2, %xmm0 4372; SSE-NEXT: packuswb %xmm1, %xmm0 4373; SSE-NEXT: retq 4374; 4375; AVX1-LABEL: trunc_xor_const_v16i16_v16i8: 4376; AVX1: # BB#0: 4377; AVX1-NEXT: vxorps {{.*}}(%rip), %ymm0, %ymm0 4378; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4379; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4380; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4381; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4382; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4383; AVX1-NEXT: vzeroupper 4384; AVX1-NEXT: retq 4385; 4386; AVX2-LABEL: trunc_xor_const_v16i16_v16i8: 4387; AVX2: # BB#0: 4388; AVX2-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4389; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 4390; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4391; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4392; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4393; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4394; AVX2-NEXT: vzeroupper 4395; AVX2-NEXT: retq 4396; 4397; AVX512F-LABEL: trunc_xor_const_v16i16_v16i8: 4398; AVX512F: # BB#0: 4399; AVX512F-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4400; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 4401; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4402; AVX512F-NEXT: retq 4403; 4404; AVX512BW-LABEL: trunc_xor_const_v16i16_v16i8: 4405; AVX512BW: # BB#0: 4406; AVX512BW-NEXT: vpxor {{.*}}(%rip), %ymm0, %ymm0 4407; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 4408; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4409; AVX512BW-NEXT: retq 4410 %1 = xor <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 4411 %2 = trunc <16 x i16> %1 to <16 x i8> 4412 ret <16 x i8> %2 4413} 4414 4415; 4416; or 4417; 4418 4419define <4 x i32> @trunc_or_v4i64_4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 4420; SSE-LABEL: trunc_or_v4i64_4i32: 4421; SSE: # BB#0: 4422; SSE-NEXT: por %xmm2, %xmm0 4423; SSE-NEXT: por %xmm3, %xmm1 4424; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4425; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4426; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4427; SSE-NEXT: retq 4428; 4429; AVX1-LABEL: trunc_or_v4i64_4i32: 4430; AVX1: # BB#0: 4431; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 4432; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4433; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 4434; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4435; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 4436; AVX1-NEXT: vzeroupper 4437; AVX1-NEXT: retq 4438; 4439; AVX2-LABEL: trunc_or_v4i64_4i32: 4440; AVX2: # BB#0: 4441; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 4442; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4443; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4444; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4445; AVX2-NEXT: vzeroupper 4446; AVX2-NEXT: retq 4447; 4448; AVX512-LABEL: trunc_or_v4i64_4i32: 4449; AVX512: # BB#0: 4450; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0 4451; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4452; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4453; AVX512-NEXT: retq 4454 %1 = or <4 x i64> %a0, %a1 4455 %2 = trunc <4 x i64> %1 to <4 x i32> 4456 ret <4 x i32> %2 4457} 4458 4459define <8 x i16> @trunc_or_v8i64_8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 4460; SSE-LABEL: trunc_or_v8i64_8i16: 4461; SSE: # BB#0: 4462; SSE-NEXT: por %xmm4, %xmm0 4463; SSE-NEXT: por %xmm5, %xmm1 4464; SSE-NEXT: por %xmm6, %xmm2 4465; SSE-NEXT: por %xmm7, %xmm3 4466; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 4467; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 4468; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 4469; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 4470; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 4471; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4472; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 4473; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4474; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 4475; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4476; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 4477; SSE-NEXT: movapd %xmm2, %xmm0 4478; SSE-NEXT: retq 4479; 4480; AVX1-LABEL: trunc_or_v8i64_8i16: 4481; AVX1: # BB#0: 4482; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 4483; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1 4484; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4485; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 4486; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4487; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 4488; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 4489; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4490; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4491; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 4492; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 4493; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 4494; AVX1-NEXT: vzeroupper 4495; AVX1-NEXT: retq 4496; 4497; AVX2-LABEL: trunc_or_v8i64_8i16: 4498; AVX2: # BB#0: 4499; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm1 4500; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm0 4501; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4502; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4503; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 4504; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4505; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4506; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4507; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4508; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4509; AVX2-NEXT: vzeroupper 4510; AVX2-NEXT: retq 4511; 4512; AVX512-LABEL: trunc_or_v8i64_8i16: 4513; AVX512: # BB#0: 4514; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0 4515; AVX512-NEXT: vpmovqw %zmm0, %xmm0 4516; AVX512-NEXT: retq 4517 %1 = or <8 x i64> %a0, %a1 4518 %2 = trunc <8 x i64> %1 to <8 x i16> 4519 ret <8 x i16> %2 4520} 4521 4522define <8 x i16> @trunc_or_v8i32_8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 4523; SSE-LABEL: trunc_or_v8i32_8i16: 4524; SSE: # BB#0: 4525; SSE-NEXT: por %xmm2, %xmm0 4526; SSE-NEXT: por %xmm3, %xmm1 4527; SSE-NEXT: pslld $16, %xmm1 4528; SSE-NEXT: psrad $16, %xmm1 4529; SSE-NEXT: pslld $16, %xmm0 4530; SSE-NEXT: psrad $16, %xmm0 4531; SSE-NEXT: packssdw %xmm1, %xmm0 4532; SSE-NEXT: retq 4533; 4534; AVX1-LABEL: trunc_or_v8i32_8i16: 4535; AVX1: # BB#0: 4536; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 4537; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4538; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 4539; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4540; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4541; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4542; AVX1-NEXT: vzeroupper 4543; AVX1-NEXT: retq 4544; 4545; AVX2-LABEL: trunc_or_v8i32_8i16: 4546; AVX2: # BB#0: 4547; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 4548; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4549; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4550; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4551; AVX2-NEXT: vzeroupper 4552; AVX2-NEXT: retq 4553; 4554; AVX512-LABEL: trunc_or_v8i32_8i16: 4555; AVX512: # BB#0: 4556; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0 4557; AVX512-NEXT: vpmovdw %zmm0, %ymm0 4558; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4559; AVX512-NEXT: retq 4560 %1 = or <8 x i32> %a0, %a1 4561 %2 = trunc <8 x i32> %1 to <8 x i16> 4562 ret <8 x i16> %2 4563} 4564 4565define <16 x i8> @trunc_or_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 4566; SSE-LABEL: trunc_or_v16i64_v16i8: 4567; SSE: # BB#0: 4568; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm0 4569; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm1 4570; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm2 4571; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm3 4572; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm4 4573; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm5 4574; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm6 4575; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm7 4576; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4577; SSE-NEXT: pand %xmm8, %xmm7 4578; SSE-NEXT: pand %xmm8, %xmm6 4579; SSE-NEXT: packuswb %xmm7, %xmm6 4580; SSE-NEXT: pand %xmm8, %xmm5 4581; SSE-NEXT: pand %xmm8, %xmm4 4582; SSE-NEXT: packuswb %xmm5, %xmm4 4583; SSE-NEXT: packuswb %xmm6, %xmm4 4584; SSE-NEXT: pand %xmm8, %xmm3 4585; SSE-NEXT: pand %xmm8, %xmm2 4586; SSE-NEXT: packuswb %xmm3, %xmm2 4587; SSE-NEXT: pand %xmm8, %xmm1 4588; SSE-NEXT: pand %xmm8, %xmm0 4589; SSE-NEXT: packuswb %xmm1, %xmm0 4590; SSE-NEXT: packuswb %xmm2, %xmm0 4591; SSE-NEXT: packuswb %xmm4, %xmm0 4592; SSE-NEXT: retq 4593; 4594; AVX1-LABEL: trunc_or_v16i64_v16i8: 4595; AVX1: # BB#0: 4596; AVX1-NEXT: vorps %ymm4, %ymm0, %ymm0 4597; AVX1-NEXT: vorps %ymm5, %ymm1, %ymm1 4598; AVX1-NEXT: vorps %ymm6, %ymm2, %ymm2 4599; AVX1-NEXT: vorps %ymm7, %ymm3, %ymm3 4600; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 4601; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4602; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4603; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4604; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 4605; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 4606; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4607; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 4608; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 4609; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 4610; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 4611; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4612; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 4613; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 4614; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 4615; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4616; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 4617; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 4618; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4619; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4620; AVX1-NEXT: vzeroupper 4621; AVX1-NEXT: retq 4622; 4623; AVX2-LABEL: trunc_or_v16i64_v16i8: 4624; AVX2: # BB#0: 4625; AVX2-NEXT: vpor %ymm5, %ymm1, %ymm1 4626; AVX2-NEXT: vpor %ymm4, %ymm0, %ymm0 4627; AVX2-NEXT: vpor %ymm7, %ymm3, %ymm3 4628; AVX2-NEXT: vpor %ymm6, %ymm2, %ymm2 4629; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 4630; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4631; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 4632; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 4633; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 4634; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 4635; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 4636; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4637; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4638; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 4639; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4640; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4641; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 4642; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4643; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4644; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 4645; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4646; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 4647; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 4648; AVX2-NEXT: vzeroupper 4649; AVX2-NEXT: retq 4650; 4651; AVX512-LABEL: trunc_or_v16i64_v16i8: 4652; AVX512: # BB#0: 4653; AVX512-NEXT: vporq %zmm3, %zmm1, %zmm1 4654; AVX512-NEXT: vporq %zmm2, %zmm0, %zmm0 4655; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4656; AVX512-NEXT: vpmovqd %zmm1, %ymm1 4657; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 4658; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4659; AVX512-NEXT: retq 4660 %1 = or <16 x i64> %a0, %a1 4661 %2 = trunc <16 x i64> %1 to <16 x i8> 4662 ret <16 x i8> %2 4663} 4664 4665define <16 x i8> @trunc_or_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 4666; SSE-LABEL: trunc_or_v16i32_v16i8: 4667; SSE: # BB#0: 4668; SSE-NEXT: por %xmm4, %xmm0 4669; SSE-NEXT: por %xmm5, %xmm1 4670; SSE-NEXT: por %xmm6, %xmm2 4671; SSE-NEXT: por %xmm7, %xmm3 4672; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4673; SSE-NEXT: pand %xmm4, %xmm3 4674; SSE-NEXT: pand %xmm4, %xmm2 4675; SSE-NEXT: packuswb %xmm3, %xmm2 4676; SSE-NEXT: pand %xmm4, %xmm1 4677; SSE-NEXT: pand %xmm4, %xmm0 4678; SSE-NEXT: packuswb %xmm1, %xmm0 4679; SSE-NEXT: packuswb %xmm2, %xmm0 4680; SSE-NEXT: retq 4681; 4682; AVX1-LABEL: trunc_or_v16i32_v16i8: 4683; AVX1: # BB#0: 4684; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 4685; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1 4686; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4687; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4688; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 4689; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 4690; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 4691; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4692; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 4693; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 4694; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4695; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4696; AVX1-NEXT: vzeroupper 4697; AVX1-NEXT: retq 4698; 4699; AVX2-LABEL: trunc_or_v16i32_v16i8: 4700; AVX2: # BB#0: 4701; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm0 4702; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm1 4703; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 4704; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 4705; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4706; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4707; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 4708; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 4709; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4710; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 4711; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4712; AVX2-NEXT: vzeroupper 4713; AVX2-NEXT: retq 4714; 4715; AVX512-LABEL: trunc_or_v16i32_v16i8: 4716; AVX512: # BB#0: 4717; AVX512-NEXT: vpord %zmm1, %zmm0, %zmm0 4718; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4719; AVX512-NEXT: retq 4720 %1 = or <16 x i32> %a0, %a1 4721 %2 = trunc <16 x i32> %1 to <16 x i8> 4722 ret <16 x i8> %2 4723} 4724 4725define <16 x i8> @trunc_or_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 4726; SSE-LABEL: trunc_or_v16i16_v16i8: 4727; SSE: # BB#0: 4728; SSE-NEXT: por %xmm2, %xmm0 4729; SSE-NEXT: por %xmm3, %xmm1 4730; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 4731; SSE-NEXT: pand %xmm2, %xmm1 4732; SSE-NEXT: pand %xmm2, %xmm0 4733; SSE-NEXT: packuswb %xmm1, %xmm0 4734; SSE-NEXT: retq 4735; 4736; AVX1-LABEL: trunc_or_v16i16_v16i8: 4737; AVX1: # BB#0: 4738; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 4739; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4740; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4741; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4742; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4743; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4744; AVX1-NEXT: vzeroupper 4745; AVX1-NEXT: retq 4746; 4747; AVX2-LABEL: trunc_or_v16i16_v16i8: 4748; AVX2: # BB#0: 4749; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 4750; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 4751; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4752; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4753; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4754; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4755; AVX2-NEXT: vzeroupper 4756; AVX2-NEXT: retq 4757; 4758; AVX512F-LABEL: trunc_or_v16i16_v16i8: 4759; AVX512F: # BB#0: 4760; AVX512F-NEXT: vpor %ymm1, %ymm0, %ymm0 4761; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 4762; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4763; AVX512F-NEXT: retq 4764; 4765; AVX512BW-LABEL: trunc_or_v16i16_v16i8: 4766; AVX512BW: # BB#0: 4767; AVX512BW-NEXT: vpor %ymm1, %ymm0, %ymm0 4768; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 4769; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4770; AVX512BW-NEXT: retq 4771 %1 = or <16 x i16> %a0, %a1 4772 %2 = trunc <16 x i16> %1 to <16 x i8> 4773 ret <16 x i8> %2 4774} 4775 4776; 4777; or to constant 4778; 4779 4780define <4 x i32> @trunc_or_const_v4i64_4i32(<4 x i64> %a0) nounwind { 4781; SSE-LABEL: trunc_or_const_v4i64_4i32: 4782; SSE: # BB#0: 4783; SSE-NEXT: movl $1, %eax 4784; SSE-NEXT: movd %rax, %xmm2 4785; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 4786; SSE-NEXT: por %xmm0, %xmm2 4787; SSE-NEXT: por {{.*}}(%rip), %xmm1 4788; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 4789; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4790; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4791; SSE-NEXT: retq 4792; 4793; AVX1-LABEL: trunc_or_const_v4i64_4i32: 4794; AVX1: # BB#0: 4795; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 4796; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4797; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 4798; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4799; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 4800; AVX1-NEXT: vzeroupper 4801; AVX1-NEXT: retq 4802; 4803; AVX2-LABEL: trunc_or_const_v4i64_4i32: 4804; AVX2: # BB#0: 4805; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 4806; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4807; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4808; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4809; AVX2-NEXT: vzeroupper 4810; AVX2-NEXT: retq 4811; 4812; AVX512-LABEL: trunc_or_const_v4i64_4i32: 4813; AVX512: # BB#0: 4814; AVX512-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 4815; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4816; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4817; AVX512-NEXT: retq 4818 %1 = or <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 4819 %2 = trunc <4 x i64> %1 to <4 x i32> 4820 ret <4 x i32> %2 4821} 4822 4823define <8 x i16> @trunc_or_const_v16i64_v16i16(<8 x i64> %a0) nounwind { 4824; SSE-LABEL: trunc_or_const_v16i64_v16i16: 4825; SSE: # BB#0: 4826; SSE-NEXT: movl $1, %eax 4827; SSE-NEXT: movd %rax, %xmm4 4828; SSE-NEXT: pslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 4829; SSE-NEXT: por %xmm0, %xmm4 4830; SSE-NEXT: por {{.*}}(%rip), %xmm1 4831; SSE-NEXT: por {{.*}}(%rip), %xmm2 4832; SSE-NEXT: por {{.*}}(%rip), %xmm3 4833; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm3[0,2,2,3] 4834; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm0[0,1,0,2,4,5,6,7] 4835; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 4836; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,1,0,2,4,5,6,7] 4837; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 4838; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm4[0,2,2,3] 4839; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,2,2,3,4,5,6,7] 4840; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4841; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 4842; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 4843; SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 4844; SSE-NEXT: retq 4845; 4846; AVX1-LABEL: trunc_or_const_v16i64_v16i16: 4847; AVX1: # BB#0: 4848; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 4849; AVX1-NEXT: vorps {{.*}}(%rip), %ymm1, %ymm1 4850; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4851; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 4852; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4853; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 4854; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 4855; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4856; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4857; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 4858; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 4859; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 4860; AVX1-NEXT: vzeroupper 4861; AVX1-NEXT: retq 4862; 4863; AVX2-LABEL: trunc_or_const_v16i64_v16i16: 4864; AVX2: # BB#0: 4865; AVX2-NEXT: vpor {{.*}}(%rip), %ymm1, %ymm1 4866; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 4867; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4868; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4869; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 4870; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4871; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4872; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4873; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4874; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4875; AVX2-NEXT: vzeroupper 4876; AVX2-NEXT: retq 4877; 4878; AVX512-LABEL: trunc_or_const_v16i64_v16i16: 4879; AVX512: # BB#0: 4880; AVX512-NEXT: vporq {{.*}}(%rip), %zmm0, %zmm0 4881; AVX512-NEXT: vpmovqw %zmm0, %xmm0 4882; AVX512-NEXT: retq 4883 %1 = or <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 4884 %2 = trunc <8 x i64> %1 to <8 x i16> 4885 ret <8 x i16> %2 4886} 4887 4888define <8 x i16> @trunc_or_const_v16i32_v16i16(<8 x i32> %a0) nounwind { 4889; SSE-LABEL: trunc_or_const_v16i32_v16i16: 4890; SSE: # BB#0: 4891; SSE-NEXT: por {{.*}}(%rip), %xmm0 4892; SSE-NEXT: por {{.*}}(%rip), %xmm1 4893; SSE-NEXT: pslld $16, %xmm1 4894; SSE-NEXT: psrad $16, %xmm1 4895; SSE-NEXT: pslld $16, %xmm0 4896; SSE-NEXT: psrad $16, %xmm0 4897; SSE-NEXT: packssdw %xmm1, %xmm0 4898; SSE-NEXT: retq 4899; 4900; AVX1-LABEL: trunc_or_const_v16i32_v16i16: 4901; AVX1: # BB#0: 4902; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 4903; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4904; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 4905; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4906; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4907; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4908; AVX1-NEXT: vzeroupper 4909; AVX1-NEXT: retq 4910; 4911; AVX2-LABEL: trunc_or_const_v16i32_v16i16: 4912; AVX2: # BB#0: 4913; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 4914; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 4915; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4916; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4917; AVX2-NEXT: vzeroupper 4918; AVX2-NEXT: retq 4919; 4920; AVX512-LABEL: trunc_or_const_v16i32_v16i16: 4921; AVX512: # BB#0: 4922; AVX512-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 4923; AVX512-NEXT: vpmovdw %zmm0, %ymm0 4924; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4925; AVX512-NEXT: retq 4926 %1 = or <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 4927 %2 = trunc <8 x i32> %1 to <8 x i16> 4928 ret <8 x i16> %2 4929} 4930 4931define <16 x i8> @trunc_or_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 4932; SSE-LABEL: trunc_or_const_v16i64_v16i8: 4933; SSE: # BB#0: 4934; SSE-NEXT: movl $1, %eax 4935; SSE-NEXT: movd %rax, %xmm8 4936; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 4937; SSE-NEXT: por %xmm8, %xmm0 4938; SSE-NEXT: por {{.*}}(%rip), %xmm1 4939; SSE-NEXT: por {{.*}}(%rip), %xmm2 4940; SSE-NEXT: por {{.*}}(%rip), %xmm3 4941; SSE-NEXT: por {{.*}}(%rip), %xmm4 4942; SSE-NEXT: por {{.*}}(%rip), %xmm5 4943; SSE-NEXT: por {{.*}}(%rip), %xmm6 4944; SSE-NEXT: por {{.*}}(%rip), %xmm7 4945; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4946; SSE-NEXT: pand %xmm8, %xmm7 4947; SSE-NEXT: pand %xmm8, %xmm6 4948; SSE-NEXT: packuswb %xmm7, %xmm6 4949; SSE-NEXT: pand %xmm8, %xmm5 4950; SSE-NEXT: pand %xmm8, %xmm4 4951; SSE-NEXT: packuswb %xmm5, %xmm4 4952; SSE-NEXT: packuswb %xmm6, %xmm4 4953; SSE-NEXT: pand %xmm8, %xmm3 4954; SSE-NEXT: pand %xmm8, %xmm2 4955; SSE-NEXT: packuswb %xmm3, %xmm2 4956; SSE-NEXT: pand %xmm8, %xmm1 4957; SSE-NEXT: pand %xmm8, %xmm0 4958; SSE-NEXT: packuswb %xmm1, %xmm0 4959; SSE-NEXT: packuswb %xmm2, %xmm0 4960; SSE-NEXT: packuswb %xmm4, %xmm0 4961; SSE-NEXT: retq 4962; 4963; AVX1-LABEL: trunc_or_const_v16i64_v16i8: 4964; AVX1: # BB#0: 4965; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 4966; AVX1-NEXT: vorps {{.*}}(%rip), %ymm1, %ymm1 4967; AVX1-NEXT: vorps {{.*}}(%rip), %ymm2, %ymm2 4968; AVX1-NEXT: vorps {{.*}}(%rip), %ymm3, %ymm3 4969; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 4970; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4971; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4972; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4973; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 4974; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 4975; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4976; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 4977; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 4978; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 4979; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 4980; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4981; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 4982; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 4983; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 4984; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4985; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 4986; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 4987; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4988; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4989; AVX1-NEXT: vzeroupper 4990; AVX1-NEXT: retq 4991; 4992; AVX2-LABEL: trunc_or_const_v16i64_v16i8: 4993; AVX2: # BB#0: 4994; AVX2-NEXT: vpor {{.*}}(%rip), %ymm1, %ymm1 4995; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 4996; AVX2-NEXT: vpor {{.*}}(%rip), %ymm3, %ymm3 4997; AVX2-NEXT: vpor {{.*}}(%rip), %ymm2, %ymm2 4998; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 4999; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 5000; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 5001; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 5002; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 5003; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 5004; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 5005; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 5006; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 5007; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 5008; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 5009; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 5010; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 5011; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 5012; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 5013; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 5014; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 5015; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 5016; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 5017; AVX2-NEXT: vzeroupper 5018; AVX2-NEXT: retq 5019; 5020; AVX512-LABEL: trunc_or_const_v16i64_v16i8: 5021; AVX512: # BB#0: 5022; AVX512-NEXT: vporq {{.*}}(%rip), %zmm1, %zmm1 5023; AVX512-NEXT: vporq {{.*}}(%rip), %zmm0, %zmm0 5024; AVX512-NEXT: vpmovqd %zmm0, %ymm0 5025; AVX512-NEXT: vpmovqd %zmm1, %ymm1 5026; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 5027; AVX512-NEXT: vpmovdb %zmm0, %xmm0 5028; AVX512-NEXT: retq 5029 %1 = or <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 5030 %2 = trunc <16 x i64> %1 to <16 x i8> 5031 ret <16 x i8> %2 5032} 5033 5034define <16 x i8> @trunc_or_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 5035; SSE-LABEL: trunc_or_const_v16i32_v16i8: 5036; SSE: # BB#0: 5037; SSE-NEXT: por {{.*}}(%rip), %xmm0 5038; SSE-NEXT: por {{.*}}(%rip), %xmm1 5039; SSE-NEXT: por {{.*}}(%rip), %xmm2 5040; SSE-NEXT: por {{.*}}(%rip), %xmm3 5041; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 5042; SSE-NEXT: pand %xmm4, %xmm3 5043; SSE-NEXT: pand %xmm4, %xmm2 5044; SSE-NEXT: packuswb %xmm3, %xmm2 5045; SSE-NEXT: pand %xmm4, %xmm1 5046; SSE-NEXT: pand %xmm4, %xmm0 5047; SSE-NEXT: packuswb %xmm1, %xmm0 5048; SSE-NEXT: packuswb %xmm2, %xmm0 5049; SSE-NEXT: retq 5050; 5051; AVX1-LABEL: trunc_or_const_v16i32_v16i8: 5052; AVX1: # BB#0: 5053; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 5054; AVX1-NEXT: vorps {{.*}}(%rip), %ymm1, %ymm1 5055; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 5056; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 5057; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 5058; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 5059; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 5060; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 5061; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 5062; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 5063; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 5064; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 5065; AVX1-NEXT: vzeroupper 5066; AVX1-NEXT: retq 5067; 5068; AVX2-LABEL: trunc_or_const_v16i32_v16i8: 5069; AVX2: # BB#0: 5070; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 5071; AVX2-NEXT: vpor {{.*}}(%rip), %ymm1, %ymm1 5072; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128,0,1,4,5,8,9,12,13,128,128,128,128,128,128,128,128] 5073; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 5074; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 5075; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 5076; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 5077; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 5078; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 5079; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 5080; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 5081; AVX2-NEXT: vzeroupper 5082; AVX2-NEXT: retq 5083; 5084; AVX512-LABEL: trunc_or_const_v16i32_v16i8: 5085; AVX512: # BB#0: 5086; AVX512-NEXT: vpord {{.*}}(%rip), %zmm0, %zmm0 5087; AVX512-NEXT: vpmovdb %zmm0, %xmm0 5088; AVX512-NEXT: retq 5089 %1 = or <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 5090 %2 = trunc <16 x i32> %1 to <16 x i8> 5091 ret <16 x i8> %2 5092} 5093 5094define <16 x i8> @trunc_or_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 5095; SSE-LABEL: trunc_or_const_v16i16_v16i8: 5096; SSE: # BB#0: 5097; SSE-NEXT: por {{.*}}(%rip), %xmm0 5098; SSE-NEXT: por {{.*}}(%rip), %xmm1 5099; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 5100; SSE-NEXT: pand %xmm2, %xmm1 5101; SSE-NEXT: pand %xmm2, %xmm0 5102; SSE-NEXT: packuswb %xmm1, %xmm0 5103; SSE-NEXT: retq 5104; 5105; AVX1-LABEL: trunc_or_const_v16i16_v16i8: 5106; AVX1: # BB#0: 5107; AVX1-NEXT: vorps {{.*}}(%rip), %ymm0, %ymm0 5108; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 5109; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 5110; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 5111; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 5112; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 5113; AVX1-NEXT: vzeroupper 5114; AVX1-NEXT: retq 5115; 5116; AVX2-LABEL: trunc_or_const_v16i16_v16i8: 5117; AVX2: # BB#0: 5118; AVX2-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 5119; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 5120; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 5121; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 5122; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 5123; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 5124; AVX2-NEXT: vzeroupper 5125; AVX2-NEXT: retq 5126; 5127; AVX512F-LABEL: trunc_or_const_v16i16_v16i8: 5128; AVX512F: # BB#0: 5129; AVX512F-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 5130; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 5131; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 5132; AVX512F-NEXT: retq 5133; 5134; AVX512BW-LABEL: trunc_or_const_v16i16_v16i8: 5135; AVX512BW: # BB#0: 5136; AVX512BW-NEXT: vpor {{.*}}(%rip), %ymm0, %ymm0 5137; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 5138; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 5139; AVX512BW-NEXT: retq 5140 %1 = or <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 5141 %2 = trunc <16 x i16> %1 to <16 x i8> 5142 ret <16 x i8> %2 5143} 5144 5145; 5146; complex patterns - often created by vectorizer 5147; 5148 5149define <4 x i32> @mul_add_v4i64_v4i32(<4 x i32> %a0, <4 x i32> %a1) nounwind { 5150; SSE-LABEL: mul_add_v4i64_v4i32: 5151; SSE: # BB#0: 5152; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 5153; SSE-NEXT: movdqa %xmm2, %xmm3 5154; SSE-NEXT: psrad $31, %xmm3 5155; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 5156; SSE-NEXT: movdqa %xmm0, %xmm3 5157; SSE-NEXT: psrad $31, %xmm3 5158; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 5159; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] 5160; SSE-NEXT: movdqa %xmm3, %xmm4 5161; SSE-NEXT: psrad $31, %xmm4 5162; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 5163; SSE-NEXT: movdqa %xmm1, %xmm4 5164; SSE-NEXT: psrad $31, %xmm4 5165; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 5166; SSE-NEXT: movdqa %xmm0, %xmm4 5167; SSE-NEXT: pmuludq %xmm1, %xmm4 5168; SSE-NEXT: movdqa %xmm1, %xmm5 5169; SSE-NEXT: psrlq $32, %xmm5 5170; SSE-NEXT: pmuludq %xmm0, %xmm5 5171; SSE-NEXT: psllq $32, %xmm5 5172; SSE-NEXT: psrlq $32, %xmm0 5173; SSE-NEXT: pmuludq %xmm1, %xmm0 5174; SSE-NEXT: psllq $32, %xmm0 5175; SSE-NEXT: paddq %xmm5, %xmm0 5176; SSE-NEXT: paddq %xmm4, %xmm0 5177; SSE-NEXT: movdqa %xmm2, %xmm1 5178; SSE-NEXT: pmuludq %xmm3, %xmm1 5179; SSE-NEXT: movdqa %xmm3, %xmm4 5180; SSE-NEXT: psrlq $32, %xmm4 5181; SSE-NEXT: pmuludq %xmm2, %xmm4 5182; SSE-NEXT: psllq $32, %xmm4 5183; SSE-NEXT: psrlq $32, %xmm2 5184; SSE-NEXT: pmuludq %xmm3, %xmm2 5185; SSE-NEXT: psllq $32, %xmm2 5186; SSE-NEXT: paddq %xmm4, %xmm2 5187; SSE-NEXT: paddq %xmm1, %xmm2 5188; SSE-NEXT: paddq {{.*}}(%rip), %xmm2 5189; SSE-NEXT: paddq {{.*}}(%rip), %xmm0 5190; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 5191; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3] 5192; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 5193; SSE-NEXT: retq 5194; 5195; AVX1-LABEL: mul_add_v4i64_v4i32: 5196; AVX1: # BB#0: 5197; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 5198; AVX1-NEXT: vpmovsxdq %xmm2, %xmm2 5199; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 5200; AVX1-NEXT: vpshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] 5201; AVX1-NEXT: vpmovsxdq %xmm3, %xmm3 5202; AVX1-NEXT: vpmovsxdq %xmm1, %xmm1 5203; AVX1-NEXT: vpmuldq %xmm1, %xmm0, %xmm0 5204; AVX1-NEXT: vpmuldq %xmm3, %xmm2, %xmm1 5205; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm1, %xmm1 5206; AVX1-NEXT: vpaddq {{.*}}(%rip), %xmm0, %xmm0 5207; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 5208; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,2] 5209; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 5210; AVX1-NEXT: retq 5211; 5212; AVX2-LABEL: mul_add_v4i64_v4i32: 5213; AVX2: # BB#0: 5214; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 5215; AVX2-NEXT: vpmovsxdq %xmm1, %ymm1 5216; AVX2-NEXT: vpmuldq %ymm1, %ymm0, %ymm0 5217; AVX2-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 5218; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 5219; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 5220; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 5221; AVX2-NEXT: vzeroupper 5222; AVX2-NEXT: retq 5223; 5224; AVX512-LABEL: mul_add_v4i64_v4i32: 5225; AVX512: # BB#0: 5226; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 5227; AVX512-NEXT: vpmovsxdq %xmm1, %ymm1 5228; AVX512-NEXT: vpmuldq %ymm1, %ymm0, %ymm0 5229; AVX512-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 5230; AVX512-NEXT: vpmovqd %zmm0, %ymm0 5231; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 5232; AVX512-NEXT: retq 5233 %1 = sext <4 x i32> %a0 to <4 x i64> 5234 %2 = sext <4 x i32> %a1 to <4 x i64> 5235 %3 = mul <4 x i64> %1, %2 5236 %4 = add <4 x i64> %3, <i64 -3, i64 -1, i64 1, i64 3> 5237 %5 = trunc <4 x i64> %4 to <4 x i32> 5238 ret <4 x i32> %5 5239} 5240