1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512DQ 8 9; 10; add 11; 12 13define <4 x i32> @trunc_add_v4i64_v4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 14; SSE-LABEL: trunc_add_v4i64_v4i32: 15; SSE: # BB#0: 16; SSE-NEXT: paddq %xmm3, %xmm1 17; SSE-NEXT: paddq %xmm2, %xmm0 18; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 19; SSE-NEXT: retq 20; 21; AVX1-LABEL: trunc_add_v4i64_v4i32: 22; AVX1: # BB#0: 23; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 24; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 25; AVX1-NEXT: vpaddq %xmm2, %xmm3, %xmm2 26; AVX1-NEXT: vpaddq %xmm1, %xmm0, %xmm0 27; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2] 28; AVX1-NEXT: vzeroupper 29; AVX1-NEXT: retq 30; 31; AVX2-LABEL: trunc_add_v4i64_v4i32: 32; AVX2: # BB#0: 33; AVX2-NEXT: vpaddq %ymm1, %ymm0, %ymm0 34; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 35; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 36; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 37; AVX2-NEXT: vzeroupper 38; AVX2-NEXT: retq 39; 40; AVX512-LABEL: trunc_add_v4i64_v4i32: 41; AVX512: # BB#0: 42; AVX512-NEXT: vpaddq %ymm1, %ymm0, %ymm0 43; AVX512-NEXT: vpmovqd %zmm0, %ymm0 44; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 45; AVX512-NEXT: vzeroupper 46; AVX512-NEXT: retq 47 %1 = add <4 x i64> %a0, %a1 48 %2 = trunc <4 x i64> %1 to <4 x i32> 49 ret <4 x i32> %2 50} 51 52define <8 x i16> @trunc_add_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 53; SSE-LABEL: trunc_add_v8i64_v8i16: 54; SSE: # BB#0: 55; SSE-NEXT: paddq %xmm4, %xmm0 56; SSE-NEXT: paddq %xmm5, %xmm1 57; SSE-NEXT: paddq %xmm6, %xmm2 58; SSE-NEXT: paddq %xmm7, %xmm3 59; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 60; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 61; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 62; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 63; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 64; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 65; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 66; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 67; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 68; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 69; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 70; SSE-NEXT: movapd %xmm2, %xmm0 71; SSE-NEXT: retq 72; 73; AVX1-LABEL: trunc_add_v8i64_v8i16: 74; AVX1: # BB#0: 75; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm4 76; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 77; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 78; AVX1-NEXT: vpaddq %xmm2, %xmm0, %xmm0 79; AVX1-NEXT: vpaddq %xmm3, %xmm1, %xmm2 80; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 81; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 82; AVX1-NEXT: vpaddq %xmm3, %xmm1, %xmm1 83; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 84; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 85; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 86; AVX1-NEXT: vpackusdw %xmm1, %xmm2, %xmm1 87; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 88; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1,2,3],xmm4[4],xmm3[5,6,7] 89; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 90; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 91; AVX1-NEXT: vzeroupper 92; AVX1-NEXT: retq 93; 94; AVX2-LABEL: trunc_add_v8i64_v8i16: 95; AVX2: # BB#0: 96; AVX2-NEXT: vpaddq %ymm3, %ymm1, %ymm1 97; AVX2-NEXT: vpaddq %ymm2, %ymm0, %ymm0 98; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 99; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 100; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 101; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 102; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 103; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 104; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 105; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 106; AVX2-NEXT: vzeroupper 107; AVX2-NEXT: retq 108; 109; AVX512-LABEL: trunc_add_v8i64_v8i16: 110; AVX512: # BB#0: 111; AVX512-NEXT: vpaddq %zmm1, %zmm0, %zmm0 112; AVX512-NEXT: vpmovqw %zmm0, %xmm0 113; AVX512-NEXT: vzeroupper 114; AVX512-NEXT: retq 115 %1 = add <8 x i64> %a0, %a1 116 %2 = trunc <8 x i64> %1 to <8 x i16> 117 ret <8 x i16> %2 118} 119 120define <8 x i16> @trunc_add_v8i32_v8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 121; SSE-LABEL: trunc_add_v8i32_v8i16: 122; SSE: # BB#0: 123; SSE-NEXT: paddd %xmm2, %xmm0 124; SSE-NEXT: paddd %xmm3, %xmm1 125; SSE-NEXT: pslld $16, %xmm1 126; SSE-NEXT: psrad $16, %xmm1 127; SSE-NEXT: pslld $16, %xmm0 128; SSE-NEXT: psrad $16, %xmm0 129; SSE-NEXT: packssdw %xmm1, %xmm0 130; SSE-NEXT: retq 131; 132; AVX1-LABEL: trunc_add_v8i32_v8i16: 133; AVX1: # BB#0: 134; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm2 135; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 136; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 137; AVX1-NEXT: vpaddd %xmm1, %xmm0, %xmm0 138; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 139; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 140; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 141; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 142; AVX1-NEXT: vzeroupper 143; AVX1-NEXT: retq 144; 145; AVX2-LABEL: trunc_add_v8i32_v8i16: 146; AVX2: # BB#0: 147; AVX2-NEXT: vpaddd %ymm1, %ymm0, %ymm0 148; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 149; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 150; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 151; AVX2-NEXT: vzeroupper 152; AVX2-NEXT: retq 153; 154; AVX512-LABEL: trunc_add_v8i32_v8i16: 155; AVX512: # BB#0: 156; AVX512-NEXT: vpaddd %ymm1, %ymm0, %ymm0 157; AVX512-NEXT: vpmovdw %zmm0, %ymm0 158; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 159; AVX512-NEXT: vzeroupper 160; AVX512-NEXT: retq 161 %1 = add <8 x i32> %a0, %a1 162 %2 = trunc <8 x i32> %1 to <8 x i16> 163 ret <8 x i16> %2 164} 165 166define <16 x i8> @trunc_add_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 167; SSE-LABEL: trunc_add_v16i64_v16i8: 168; SSE: # BB#0: 169; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm0 170; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm1 171; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm2 172; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm3 173; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm4 174; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm5 175; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm6 176; SSE-NEXT: paddq {{[0-9]+}}(%rsp), %xmm7 177; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 178; SSE-NEXT: pand %xmm8, %xmm7 179; SSE-NEXT: pand %xmm8, %xmm6 180; SSE-NEXT: packuswb %xmm7, %xmm6 181; SSE-NEXT: pand %xmm8, %xmm5 182; SSE-NEXT: pand %xmm8, %xmm4 183; SSE-NEXT: packuswb %xmm5, %xmm4 184; SSE-NEXT: packuswb %xmm6, %xmm4 185; SSE-NEXT: pand %xmm8, %xmm3 186; SSE-NEXT: pand %xmm8, %xmm2 187; SSE-NEXT: packuswb %xmm3, %xmm2 188; SSE-NEXT: pand %xmm8, %xmm1 189; SSE-NEXT: pand %xmm8, %xmm0 190; SSE-NEXT: packuswb %xmm1, %xmm0 191; SSE-NEXT: packuswb %xmm2, %xmm0 192; SSE-NEXT: packuswb %xmm4, %xmm0 193; SSE-NEXT: retq 194; 195; AVX1-LABEL: trunc_add_v16i64_v16i8: 196; AVX1: # BB#0: 197; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm8 198; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm4 199; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 200; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm0 201; AVX1-NEXT: vpaddq %xmm5, %xmm1, %xmm4 202; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm5 203; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 204; AVX1-NEXT: vpaddq %xmm5, %xmm1, %xmm1 205; AVX1-NEXT: vpaddq %xmm6, %xmm2, %xmm5 206; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm6 207; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 208; AVX1-NEXT: vpaddq %xmm6, %xmm2, %xmm2 209; AVX1-NEXT: vpaddq %xmm7, %xmm3, %xmm6 210; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm7 211; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 212; AVX1-NEXT: vpaddq %xmm7, %xmm3, %xmm3 213; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 214; AVX1-NEXT: vpand %xmm7, %xmm3, %xmm3 215; AVX1-NEXT: vpand %xmm7, %xmm6, %xmm6 216; AVX1-NEXT: vpackuswb %xmm3, %xmm6, %xmm3 217; AVX1-NEXT: vpand %xmm7, %xmm2, %xmm2 218; AVX1-NEXT: vpand %xmm7, %xmm5, %xmm5 219; AVX1-NEXT: vpackuswb %xmm2, %xmm5, %xmm2 220; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 221; AVX1-NEXT: vpand %xmm7, %xmm1, %xmm1 222; AVX1-NEXT: vpand %xmm7, %xmm4, %xmm3 223; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 224; AVX1-NEXT: vpand %xmm7, %xmm0, %xmm0 225; AVX1-NEXT: vpand %xmm7, %xmm8, %xmm3 226; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 227; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 228; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 229; AVX1-NEXT: vzeroupper 230; AVX1-NEXT: retq 231; 232; AVX2-LABEL: trunc_add_v16i64_v16i8: 233; AVX2: # BB#0: 234; AVX2-NEXT: vpaddq %ymm5, %ymm1, %ymm1 235; AVX2-NEXT: vpaddq %ymm4, %ymm0, %ymm0 236; AVX2-NEXT: vpaddq %ymm7, %ymm3, %ymm3 237; AVX2-NEXT: vpaddq %ymm6, %ymm2, %ymm2 238; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 239; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 240; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 241; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 242; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 243; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 244; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 245; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 246; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 247; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 248; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 249; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 250; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 251; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 252; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 253; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 254; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 255; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 256; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 257; AVX2-NEXT: vzeroupper 258; AVX2-NEXT: retq 259; 260; AVX512-LABEL: trunc_add_v16i64_v16i8: 261; AVX512: # BB#0: 262; AVX512-NEXT: vpaddq %zmm3, %zmm1, %zmm1 263; AVX512-NEXT: vpaddq %zmm2, %zmm0, %zmm0 264; AVX512-NEXT: vpmovqd %zmm0, %ymm0 265; AVX512-NEXT: vpmovqd %zmm1, %ymm1 266; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 267; AVX512-NEXT: vpmovdb %zmm0, %xmm0 268; AVX512-NEXT: vzeroupper 269; AVX512-NEXT: retq 270 %1 = add <16 x i64> %a0, %a1 271 %2 = trunc <16 x i64> %1 to <16 x i8> 272 ret <16 x i8> %2 273} 274 275define <16 x i8> @trunc_add_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 276; SSE-LABEL: trunc_add_v16i32_v16i8: 277; SSE: # BB#0: 278; SSE-NEXT: paddd %xmm4, %xmm0 279; SSE-NEXT: paddd %xmm5, %xmm1 280; SSE-NEXT: paddd %xmm6, %xmm2 281; SSE-NEXT: paddd %xmm7, %xmm3 282; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 283; SSE-NEXT: pand %xmm4, %xmm3 284; SSE-NEXT: pand %xmm4, %xmm2 285; SSE-NEXT: packuswb %xmm3, %xmm2 286; SSE-NEXT: pand %xmm4, %xmm1 287; SSE-NEXT: pand %xmm4, %xmm0 288; SSE-NEXT: packuswb %xmm1, %xmm0 289; SSE-NEXT: packuswb %xmm2, %xmm0 290; SSE-NEXT: retq 291; 292; AVX1-LABEL: trunc_add_v16i32_v16i8: 293; AVX1: # BB#0: 294; AVX1-NEXT: vpaddd %xmm2, %xmm0, %xmm4 295; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 296; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 297; AVX1-NEXT: vpaddd %xmm2, %xmm0, %xmm0 298; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm2 299; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 300; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 301; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1 302; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 303; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 304; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 305; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 306; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 307; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm2 308; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 309; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 310; AVX1-NEXT: vzeroupper 311; AVX1-NEXT: retq 312; 313; AVX2-LABEL: trunc_add_v16i32_v16i8: 314; AVX2: # BB#0: 315; AVX2-NEXT: vpaddd %ymm2, %ymm0, %ymm0 316; AVX2-NEXT: vpaddd %ymm3, %ymm1, %ymm1 317; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 318; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 319; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 320; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 321; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 322; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 323; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 324; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 325; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 326; AVX2-NEXT: vzeroupper 327; AVX2-NEXT: retq 328; 329; AVX512-LABEL: trunc_add_v16i32_v16i8: 330; AVX512: # BB#0: 331; AVX512-NEXT: vpaddd %zmm1, %zmm0, %zmm0 332; AVX512-NEXT: vpmovdb %zmm0, %xmm0 333; AVX512-NEXT: vzeroupper 334; AVX512-NEXT: retq 335 %1 = add <16 x i32> %a0, %a1 336 %2 = trunc <16 x i32> %1 to <16 x i8> 337 ret <16 x i8> %2 338} 339 340define <16 x i8> @trunc_add_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 341; SSE-LABEL: trunc_add_v16i16_v16i8: 342; SSE: # BB#0: 343; SSE-NEXT: paddw %xmm2, %xmm0 344; SSE-NEXT: paddw %xmm3, %xmm1 345; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 346; SSE-NEXT: pand %xmm2, %xmm1 347; SSE-NEXT: pand %xmm2, %xmm0 348; SSE-NEXT: packuswb %xmm1, %xmm0 349; SSE-NEXT: retq 350; 351; AVX1-LABEL: trunc_add_v16i16_v16i8: 352; AVX1: # BB#0: 353; AVX1-NEXT: vpaddw %xmm1, %xmm0, %xmm2 354; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 355; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 356; AVX1-NEXT: vpaddw %xmm1, %xmm0, %xmm0 357; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 358; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 359; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 360; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 361; AVX1-NEXT: vzeroupper 362; AVX1-NEXT: retq 363; 364; AVX2-LABEL: trunc_add_v16i16_v16i8: 365; AVX2: # BB#0: 366; AVX2-NEXT: vpaddw %ymm1, %ymm0, %ymm0 367; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 368; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 369; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 370; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 371; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 372; AVX2-NEXT: vzeroupper 373; AVX2-NEXT: retq 374; 375; AVX512F-LABEL: trunc_add_v16i16_v16i8: 376; AVX512F: # BB#0: 377; AVX512F-NEXT: vpaddw %ymm1, %ymm0, %ymm0 378; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 379; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 380; AVX512F-NEXT: vzeroupper 381; AVX512F-NEXT: retq 382; 383; AVX512BW-LABEL: trunc_add_v16i16_v16i8: 384; AVX512BW: # BB#0: 385; AVX512BW-NEXT: vpaddw %ymm1, %ymm0, %ymm0 386; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 387; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 388; AVX512BW-NEXT: vzeroupper 389; AVX512BW-NEXT: retq 390; 391; AVX512DQ-LABEL: trunc_add_v16i16_v16i8: 392; AVX512DQ: # BB#0: 393; AVX512DQ-NEXT: vpaddw %ymm1, %ymm0, %ymm0 394; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 395; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 396; AVX512DQ-NEXT: vzeroupper 397; AVX512DQ-NEXT: retq 398 %1 = add <16 x i16> %a0, %a1 399 %2 = trunc <16 x i16> %1 to <16 x i8> 400 ret <16 x i8> %2 401} 402 403define <8 x i16> @trunc_add_v8i32_v8i16_sext_8i8(<16 x i8> %a0, <8 x i32> %a1) { 404; SSE-LABEL: trunc_add_v8i32_v8i16_sext_8i8: 405; SSE: # BB#0: 406; SSE-NEXT: pslld $16, %xmm2 407; SSE-NEXT: psrad $16, %xmm2 408; SSE-NEXT: pslld $16, %xmm1 409; SSE-NEXT: psrad $16, %xmm1 410; SSE-NEXT: packssdw %xmm2, %xmm1 411; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 412; SSE-NEXT: psraw $8, %xmm0 413; SSE-NEXT: paddw %xmm1, %xmm0 414; SSE-NEXT: retq 415; 416; AVX1-LABEL: trunc_add_v8i32_v8i16_sext_8i8: 417; AVX1: # BB#0: 418; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 419; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 420; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2 421; AVX1-NEXT: vpshufb %xmm3, %xmm1, %xmm1 422; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 423; AVX1-NEXT: vpmovsxbw %xmm0, %xmm0 424; AVX1-NEXT: vpaddw %xmm1, %xmm0, %xmm0 425; AVX1-NEXT: vzeroupper 426; AVX1-NEXT: retq 427; 428; AVX2-LABEL: trunc_add_v8i32_v8i16_sext_8i8: 429; AVX2: # BB#0: 430; AVX2-NEXT: vpmovsxbw %xmm0, %xmm0 431; AVX2-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 432; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 433; AVX2-NEXT: vpaddw %xmm1, %xmm0, %xmm0 434; AVX2-NEXT: vzeroupper 435; AVX2-NEXT: retq 436; 437; AVX512-LABEL: trunc_add_v8i32_v8i16_sext_8i8: 438; AVX512: # BB#0: 439; AVX512-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def> 440; AVX512-NEXT: vpmovdw %zmm1, %ymm1 441; AVX512-NEXT: vpmovsxbw %xmm0, %xmm0 442; AVX512-NEXT: vpaddw %xmm1, %xmm0, %xmm0 443; AVX512-NEXT: vzeroupper 444; AVX512-NEXT: retq 445 %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 446 %2 = sext <8 x i8> %1 to <8 x i32> 447 %3 = add <8 x i32> %2, %a1 448 %4 = trunc <8 x i32> %3 to <8 x i16> 449 ret <8 x i16> %4 450} 451 452; 453; add to constant 454; 455 456define <4 x i32> @trunc_add_const_v4i64_v4i32(<4 x i64> %a0) nounwind { 457; SSE-LABEL: trunc_add_const_v4i64_v4i32: 458; SSE: # BB#0: 459; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 460; SSE-NEXT: paddd {{.*}}(%rip), %xmm0 461; SSE-NEXT: retq 462; 463; AVX1-LABEL: trunc_add_const_v4i64_v4i32: 464; AVX1: # BB#0: 465; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 466; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 467; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0 468; AVX1-NEXT: vzeroupper 469; AVX1-NEXT: retq 470; 471; AVX2-LABEL: trunc_add_const_v4i64_v4i32: 472; AVX2: # BB#0: 473; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 474; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 475; AVX2-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0 476; AVX2-NEXT: vzeroupper 477; AVX2-NEXT: retq 478; 479; AVX512-LABEL: trunc_add_const_v4i64_v4i32: 480; AVX512: # BB#0: 481; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 482; AVX512-NEXT: vpmovqd %zmm0, %ymm0 483; AVX512-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0 484; AVX512-NEXT: vzeroupper 485; AVX512-NEXT: retq 486 %1 = add <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 487 %2 = trunc <4 x i64> %1 to <4 x i32> 488 ret <4 x i32> %2 489} 490 491define <8 x i16> @trunc_add_const_v8i64_v8i16(<8 x i64> %a0) nounwind { 492; SSE-LABEL: trunc_add_const_v8i64_v8i16: 493; SSE: # BB#0: 494; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 495; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 496; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 497; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 498; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 499; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 500; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 501; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 502; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 503; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 504; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 505; SSE-NEXT: paddw {{.*}}(%rip), %xmm2 506; SSE-NEXT: movdqa %xmm2, %xmm0 507; SSE-NEXT: retq 508; 509; AVX1-LABEL: trunc_add_const_v8i64_v8i16: 510; AVX1: # BB#0: 511; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 512; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 513; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 514; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 515; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 516; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 517; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 518; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 519; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 520; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 521; AVX1-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0 522; AVX1-NEXT: vzeroupper 523; AVX1-NEXT: retq 524; 525; AVX2-LABEL: trunc_add_const_v8i64_v8i16: 526; AVX2: # BB#0: 527; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 528; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 529; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 530; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 531; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 532; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 533; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 534; AVX2-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0 535; AVX2-NEXT: vzeroupper 536; AVX2-NEXT: retq 537; 538; AVX512-LABEL: trunc_add_const_v8i64_v8i16: 539; AVX512: # BB#0: 540; AVX512-NEXT: vpmovqw %zmm0, %xmm0 541; AVX512-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0 542; AVX512-NEXT: vzeroupper 543; AVX512-NEXT: retq 544 %1 = add <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 545 %2 = trunc <8 x i64> %1 to <8 x i16> 546 ret <8 x i16> %2 547} 548 549define <8 x i16> @trunc_add_const_v8i32_v8i16(<8 x i32> %a0) nounwind { 550; SSE-LABEL: trunc_add_const_v8i32_v8i16: 551; SSE: # BB#0: 552; SSE-NEXT: pslld $16, %xmm1 553; SSE-NEXT: psrad $16, %xmm1 554; SSE-NEXT: pslld $16, %xmm0 555; SSE-NEXT: psrad $16, %xmm0 556; SSE-NEXT: packssdw %xmm1, %xmm0 557; SSE-NEXT: paddw {{.*}}(%rip), %xmm0 558; SSE-NEXT: retq 559; 560; AVX1-LABEL: trunc_add_const_v8i32_v8i16: 561; AVX1: # BB#0: 562; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 563; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 564; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 565; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 566; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 567; AVX1-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0 568; AVX1-NEXT: vzeroupper 569; AVX1-NEXT: retq 570; 571; AVX2-LABEL: trunc_add_const_v8i32_v8i16: 572; AVX2: # BB#0: 573; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 574; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 575; AVX2-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0 576; AVX2-NEXT: vzeroupper 577; AVX2-NEXT: retq 578; 579; AVX512-LABEL: trunc_add_const_v8i32_v8i16: 580; AVX512: # BB#0: 581; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 582; AVX512-NEXT: vpmovdw %zmm0, %ymm0 583; AVX512-NEXT: vpaddw {{.*}}(%rip), %xmm0, %xmm0 584; AVX512-NEXT: vzeroupper 585; AVX512-NEXT: retq 586 %1 = add <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 587 %2 = trunc <8 x i32> %1 to <8 x i16> 588 ret <8 x i16> %2 589} 590 591define <16 x i8> @trunc_add_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 592; SSE-LABEL: trunc_add_const_v16i64_v16i8: 593; SSE: # BB#0: 594; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 595; SSE-NEXT: pand %xmm8, %xmm7 596; SSE-NEXT: pand %xmm8, %xmm6 597; SSE-NEXT: packuswb %xmm7, %xmm6 598; SSE-NEXT: pand %xmm8, %xmm5 599; SSE-NEXT: pand %xmm8, %xmm4 600; SSE-NEXT: packuswb %xmm5, %xmm4 601; SSE-NEXT: packuswb %xmm6, %xmm4 602; SSE-NEXT: pand %xmm8, %xmm3 603; SSE-NEXT: pand %xmm8, %xmm2 604; SSE-NEXT: packuswb %xmm3, %xmm2 605; SSE-NEXT: pand %xmm8, %xmm1 606; SSE-NEXT: pand %xmm8, %xmm0 607; SSE-NEXT: packuswb %xmm1, %xmm0 608; SSE-NEXT: packuswb %xmm2, %xmm0 609; SSE-NEXT: packuswb %xmm4, %xmm0 610; SSE-NEXT: paddb {{.*}}(%rip), %xmm0 611; SSE-NEXT: retq 612; 613; AVX1-LABEL: trunc_add_const_v16i64_v16i8: 614; AVX1: # BB#0: 615; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 616; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 617; AVX1-NEXT: vpand %xmm5, %xmm4, %xmm4 618; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 619; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 620; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 621; AVX1-NEXT: vpand %xmm5, %xmm4, %xmm4 622; AVX1-NEXT: vpand %xmm5, %xmm2, %xmm2 623; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 624; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 625; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 626; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 627; AVX1-NEXT: vpand %xmm5, %xmm1, %xmm1 628; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 629; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 630; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 631; AVX1-NEXT: vpand %xmm5, %xmm0, %xmm0 632; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 633; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 634; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 635; AVX1-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 636; AVX1-NEXT: vzeroupper 637; AVX1-NEXT: retq 638; 639; AVX2-LABEL: trunc_add_const_v16i64_v16i8: 640; AVX2: # BB#0: 641; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 642; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 643; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 644; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 645; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 646; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 647; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 648; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 649; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 650; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 651; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 652; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 653; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 654; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 655; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 656; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 657; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 658; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 659; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 660; AVX2-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 661; AVX2-NEXT: vzeroupper 662; AVX2-NEXT: retq 663; 664; AVX512-LABEL: trunc_add_const_v16i64_v16i8: 665; AVX512: # BB#0: 666; AVX512-NEXT: vpmovqd %zmm0, %ymm0 667; AVX512-NEXT: vpmovqd %zmm1, %ymm1 668; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 669; AVX512-NEXT: vpmovdb %zmm0, %xmm0 670; AVX512-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 671; AVX512-NEXT: vzeroupper 672; AVX512-NEXT: retq 673 %1 = add <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 674 %2 = trunc <16 x i64> %1 to <16 x i8> 675 ret <16 x i8> %2 676} 677 678define <16 x i8> @trunc_add_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 679; SSE-LABEL: trunc_add_const_v16i32_v16i8: 680; SSE: # BB#0: 681; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 682; SSE-NEXT: pand %xmm4, %xmm3 683; SSE-NEXT: pand %xmm4, %xmm2 684; SSE-NEXT: packuswb %xmm3, %xmm2 685; SSE-NEXT: pand %xmm4, %xmm1 686; SSE-NEXT: pand %xmm4, %xmm0 687; SSE-NEXT: packuswb %xmm1, %xmm0 688; SSE-NEXT: packuswb %xmm2, %xmm0 689; SSE-NEXT: paddb {{.*}}(%rip), %xmm0 690; SSE-NEXT: retq 691; 692; AVX1-LABEL: trunc_add_const_v16i32_v16i8: 693; AVX1: # BB#0: 694; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 695; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 696; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 697; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 698; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 699; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 700; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 701; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 702; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 703; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 704; AVX1-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 705; AVX1-NEXT: vzeroupper 706; AVX1-NEXT: retq 707; 708; AVX2-LABEL: trunc_add_const_v16i32_v16i8: 709; AVX2: # BB#0: 710; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 711; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 712; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 713; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 714; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 715; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 716; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 717; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 718; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 719; AVX2-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 720; AVX2-NEXT: vzeroupper 721; AVX2-NEXT: retq 722; 723; AVX512-LABEL: trunc_add_const_v16i32_v16i8: 724; AVX512: # BB#0: 725; AVX512-NEXT: vpmovdb %zmm0, %xmm0 726; AVX512-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 727; AVX512-NEXT: vzeroupper 728; AVX512-NEXT: retq 729 %1 = add <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 730 %2 = trunc <16 x i32> %1 to <16 x i8> 731 ret <16 x i8> %2 732} 733 734define <16 x i8> @trunc_add_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 735; SSE-LABEL: trunc_add_const_v16i16_v16i8: 736; SSE: # BB#0: 737; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 738; SSE-NEXT: pand %xmm2, %xmm1 739; SSE-NEXT: pand %xmm2, %xmm0 740; SSE-NEXT: packuswb %xmm1, %xmm0 741; SSE-NEXT: paddb {{.*}}(%rip), %xmm0 742; SSE-NEXT: retq 743; 744; AVX1-LABEL: trunc_add_const_v16i16_v16i8: 745; AVX1: # BB#0: 746; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 747; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 748; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 749; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 750; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 751; AVX1-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 752; AVX1-NEXT: vzeroupper 753; AVX1-NEXT: retq 754; 755; AVX2-LABEL: trunc_add_const_v16i16_v16i8: 756; AVX2: # BB#0: 757; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 758; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 759; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 760; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 761; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 762; AVX2-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 763; AVX2-NEXT: vzeroupper 764; AVX2-NEXT: retq 765; 766; AVX512F-LABEL: trunc_add_const_v16i16_v16i8: 767; AVX512F: # BB#0: 768; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 769; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 770; AVX512F-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 771; AVX512F-NEXT: vzeroupper 772; AVX512F-NEXT: retq 773; 774; AVX512BW-LABEL: trunc_add_const_v16i16_v16i8: 775; AVX512BW: # BB#0: 776; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 777; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 778; AVX512BW-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 779; AVX512BW-NEXT: vzeroupper 780; AVX512BW-NEXT: retq 781; 782; AVX512DQ-LABEL: trunc_add_const_v16i16_v16i8: 783; AVX512DQ: # BB#0: 784; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 785; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 786; AVX512DQ-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 787; AVX512DQ-NEXT: vzeroupper 788; AVX512DQ-NEXT: retq 789 %1 = add <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 790 %2 = trunc <16 x i16> %1 to <16 x i8> 791 ret <16 x i8> %2 792} 793 794; 795; sub 796; 797 798define <4 x i32> @trunc_sub_v4i64_v4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 799; SSE-LABEL: trunc_sub_v4i64_v4i32: 800; SSE: # BB#0: 801; SSE-NEXT: psubq %xmm3, %xmm1 802; SSE-NEXT: psubq %xmm2, %xmm0 803; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 804; SSE-NEXT: retq 805; 806; AVX1-LABEL: trunc_sub_v4i64_v4i32: 807; AVX1: # BB#0: 808; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 809; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 810; AVX1-NEXT: vpsubq %xmm2, %xmm3, %xmm2 811; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0 812; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2] 813; AVX1-NEXT: vzeroupper 814; AVX1-NEXT: retq 815; 816; AVX2-LABEL: trunc_sub_v4i64_v4i32: 817; AVX2: # BB#0: 818; AVX2-NEXT: vpsubq %ymm1, %ymm0, %ymm0 819; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 820; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 821; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 822; AVX2-NEXT: vzeroupper 823; AVX2-NEXT: retq 824; 825; AVX512-LABEL: trunc_sub_v4i64_v4i32: 826; AVX512: # BB#0: 827; AVX512-NEXT: vpsubq %ymm1, %ymm0, %ymm0 828; AVX512-NEXT: vpmovqd %zmm0, %ymm0 829; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 830; AVX512-NEXT: vzeroupper 831; AVX512-NEXT: retq 832 %1 = sub <4 x i64> %a0, %a1 833 %2 = trunc <4 x i64> %1 to <4 x i32> 834 ret <4 x i32> %2 835} 836 837define <8 x i16> @trunc_sub_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 838; SSE-LABEL: trunc_sub_v8i64_v8i16: 839; SSE: # BB#0: 840; SSE-NEXT: psubq %xmm4, %xmm0 841; SSE-NEXT: psubq %xmm5, %xmm1 842; SSE-NEXT: psubq %xmm6, %xmm2 843; SSE-NEXT: psubq %xmm7, %xmm3 844; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 845; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 846; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 847; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 848; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 849; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 850; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 851; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 852; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 853; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 854; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 855; SSE-NEXT: movapd %xmm2, %xmm0 856; SSE-NEXT: retq 857; 858; AVX1-LABEL: trunc_sub_v8i64_v8i16: 859; AVX1: # BB#0: 860; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm4 861; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 862; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 863; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm0 864; AVX1-NEXT: vpsubq %xmm3, %xmm1, %xmm2 865; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 866; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 867; AVX1-NEXT: vpsubq %xmm3, %xmm1, %xmm1 868; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 869; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 870; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 871; AVX1-NEXT: vpackusdw %xmm1, %xmm2, %xmm1 872; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 873; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0],xmm3[1,2,3],xmm4[4],xmm3[5,6,7] 874; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 875; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 876; AVX1-NEXT: vzeroupper 877; AVX1-NEXT: retq 878; 879; AVX2-LABEL: trunc_sub_v8i64_v8i16: 880; AVX2: # BB#0: 881; AVX2-NEXT: vpsubq %ymm3, %ymm1, %ymm1 882; AVX2-NEXT: vpsubq %ymm2, %ymm0, %ymm0 883; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 884; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 885; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 886; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 887; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 888; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 889; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 890; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 891; AVX2-NEXT: vzeroupper 892; AVX2-NEXT: retq 893; 894; AVX512-LABEL: trunc_sub_v8i64_v8i16: 895; AVX512: # BB#0: 896; AVX512-NEXT: vpsubq %zmm1, %zmm0, %zmm0 897; AVX512-NEXT: vpmovqw %zmm0, %xmm0 898; AVX512-NEXT: vzeroupper 899; AVX512-NEXT: retq 900 %1 = sub <8 x i64> %a0, %a1 901 %2 = trunc <8 x i64> %1 to <8 x i16> 902 ret <8 x i16> %2 903} 904 905define <8 x i16> @trunc_sub_v8i32_v8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 906; SSE-LABEL: trunc_sub_v8i32_v8i16: 907; SSE: # BB#0: 908; SSE-NEXT: psubd %xmm2, %xmm0 909; SSE-NEXT: psubd %xmm3, %xmm1 910; SSE-NEXT: pslld $16, %xmm1 911; SSE-NEXT: psrad $16, %xmm1 912; SSE-NEXT: pslld $16, %xmm0 913; SSE-NEXT: psrad $16, %xmm0 914; SSE-NEXT: packssdw %xmm1, %xmm0 915; SSE-NEXT: retq 916; 917; AVX1-LABEL: trunc_sub_v8i32_v8i16: 918; AVX1: # BB#0: 919; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm2 920; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 921; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 922; AVX1-NEXT: vpsubd %xmm1, %xmm0, %xmm0 923; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 924; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 925; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 926; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 927; AVX1-NEXT: vzeroupper 928; AVX1-NEXT: retq 929; 930; AVX2-LABEL: trunc_sub_v8i32_v8i16: 931; AVX2: # BB#0: 932; AVX2-NEXT: vpsubd %ymm1, %ymm0, %ymm0 933; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 934; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 935; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 936; AVX2-NEXT: vzeroupper 937; AVX2-NEXT: retq 938; 939; AVX512-LABEL: trunc_sub_v8i32_v8i16: 940; AVX512: # BB#0: 941; AVX512-NEXT: vpsubd %ymm1, %ymm0, %ymm0 942; AVX512-NEXT: vpmovdw %zmm0, %ymm0 943; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 944; AVX512-NEXT: vzeroupper 945; AVX512-NEXT: retq 946 %1 = sub <8 x i32> %a0, %a1 947 %2 = trunc <8 x i32> %1 to <8 x i16> 948 ret <8 x i16> %2 949} 950 951define <16 x i8> @trunc_sub_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 952; SSE-LABEL: trunc_sub_v16i64_v16i8: 953; SSE: # BB#0: 954; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm0 955; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm1 956; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm2 957; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm3 958; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm4 959; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm5 960; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm6 961; SSE-NEXT: psubq {{[0-9]+}}(%rsp), %xmm7 962; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 963; SSE-NEXT: pand %xmm8, %xmm7 964; SSE-NEXT: pand %xmm8, %xmm6 965; SSE-NEXT: packuswb %xmm7, %xmm6 966; SSE-NEXT: pand %xmm8, %xmm5 967; SSE-NEXT: pand %xmm8, %xmm4 968; SSE-NEXT: packuswb %xmm5, %xmm4 969; SSE-NEXT: packuswb %xmm6, %xmm4 970; SSE-NEXT: pand %xmm8, %xmm3 971; SSE-NEXT: pand %xmm8, %xmm2 972; SSE-NEXT: packuswb %xmm3, %xmm2 973; SSE-NEXT: pand %xmm8, %xmm1 974; SSE-NEXT: pand %xmm8, %xmm0 975; SSE-NEXT: packuswb %xmm1, %xmm0 976; SSE-NEXT: packuswb %xmm2, %xmm0 977; SSE-NEXT: packuswb %xmm4, %xmm0 978; SSE-NEXT: retq 979; 980; AVX1-LABEL: trunc_sub_v16i64_v16i8: 981; AVX1: # BB#0: 982; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm8 983; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm4 984; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 985; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm0 986; AVX1-NEXT: vpsubq %xmm5, %xmm1, %xmm4 987; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm5 988; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 989; AVX1-NEXT: vpsubq %xmm5, %xmm1, %xmm1 990; AVX1-NEXT: vpsubq %xmm6, %xmm2, %xmm5 991; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm6 992; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 993; AVX1-NEXT: vpsubq %xmm6, %xmm2, %xmm2 994; AVX1-NEXT: vpsubq %xmm7, %xmm3, %xmm6 995; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm7 996; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 997; AVX1-NEXT: vpsubq %xmm7, %xmm3, %xmm3 998; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 999; AVX1-NEXT: vpand %xmm7, %xmm3, %xmm3 1000; AVX1-NEXT: vpand %xmm7, %xmm6, %xmm6 1001; AVX1-NEXT: vpackuswb %xmm3, %xmm6, %xmm3 1002; AVX1-NEXT: vpand %xmm7, %xmm2, %xmm2 1003; AVX1-NEXT: vpand %xmm7, %xmm5, %xmm5 1004; AVX1-NEXT: vpackuswb %xmm2, %xmm5, %xmm2 1005; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 1006; AVX1-NEXT: vpand %xmm7, %xmm1, %xmm1 1007; AVX1-NEXT: vpand %xmm7, %xmm4, %xmm3 1008; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 1009; AVX1-NEXT: vpand %xmm7, %xmm0, %xmm0 1010; AVX1-NEXT: vpand %xmm7, %xmm8, %xmm3 1011; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 1012; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1013; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 1014; AVX1-NEXT: vzeroupper 1015; AVX1-NEXT: retq 1016; 1017; AVX2-LABEL: trunc_sub_v16i64_v16i8: 1018; AVX2: # BB#0: 1019; AVX2-NEXT: vpsubq %ymm5, %ymm1, %ymm1 1020; AVX2-NEXT: vpsubq %ymm4, %ymm0, %ymm0 1021; AVX2-NEXT: vpsubq %ymm7, %ymm3, %ymm3 1022; AVX2-NEXT: vpsubq %ymm6, %ymm2, %ymm2 1023; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 1024; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1025; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 1026; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 1027; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 1028; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 1029; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 1030; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1031; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1032; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 1033; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1034; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1035; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 1036; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1037; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1038; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 1039; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1040; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 1041; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 1042; AVX2-NEXT: vzeroupper 1043; AVX2-NEXT: retq 1044; 1045; AVX512-LABEL: trunc_sub_v16i64_v16i8: 1046; AVX512: # BB#0: 1047; AVX512-NEXT: vpsubq %zmm3, %zmm1, %zmm1 1048; AVX512-NEXT: vpsubq %zmm2, %zmm0, %zmm0 1049; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1050; AVX512-NEXT: vpmovqd %zmm1, %ymm1 1051; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 1052; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1053; AVX512-NEXT: vzeroupper 1054; AVX512-NEXT: retq 1055 %1 = sub <16 x i64> %a0, %a1 1056 %2 = trunc <16 x i64> %1 to <16 x i8> 1057 ret <16 x i8> %2 1058} 1059 1060define <16 x i8> @trunc_sub_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 1061; SSE-LABEL: trunc_sub_v16i32_v16i8: 1062; SSE: # BB#0: 1063; SSE-NEXT: psubd %xmm4, %xmm0 1064; SSE-NEXT: psubd %xmm5, %xmm1 1065; SSE-NEXT: psubd %xmm6, %xmm2 1066; SSE-NEXT: psubd %xmm7, %xmm3 1067; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1068; SSE-NEXT: pand %xmm4, %xmm3 1069; SSE-NEXT: pand %xmm4, %xmm2 1070; SSE-NEXT: packuswb %xmm3, %xmm2 1071; SSE-NEXT: pand %xmm4, %xmm1 1072; SSE-NEXT: pand %xmm4, %xmm0 1073; SSE-NEXT: packuswb %xmm1, %xmm0 1074; SSE-NEXT: packuswb %xmm2, %xmm0 1075; SSE-NEXT: retq 1076; 1077; AVX1-LABEL: trunc_sub_v16i32_v16i8: 1078; AVX1: # BB#0: 1079; AVX1-NEXT: vpsubd %xmm2, %xmm0, %xmm4 1080; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 1081; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1082; AVX1-NEXT: vpsubd %xmm2, %xmm0, %xmm0 1083; AVX1-NEXT: vpsubd %xmm3, %xmm1, %xmm2 1084; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 1085; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1086; AVX1-NEXT: vpsubd %xmm3, %xmm1, %xmm1 1087; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1088; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 1089; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 1090; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 1091; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 1092; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm2 1093; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 1094; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1095; AVX1-NEXT: vzeroupper 1096; AVX1-NEXT: retq 1097; 1098; AVX2-LABEL: trunc_sub_v16i32_v16i8: 1099; AVX2: # BB#0: 1100; AVX2-NEXT: vpsubd %ymm2, %ymm0, %ymm0 1101; AVX2-NEXT: vpsubd %ymm3, %ymm1, %ymm1 1102; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 1103; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 1104; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1105; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1106; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 1107; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 1108; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1109; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 1110; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1111; AVX2-NEXT: vzeroupper 1112; AVX2-NEXT: retq 1113; 1114; AVX512-LABEL: trunc_sub_v16i32_v16i8: 1115; AVX512: # BB#0: 1116; AVX512-NEXT: vpsubd %zmm1, %zmm0, %zmm0 1117; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1118; AVX512-NEXT: vzeroupper 1119; AVX512-NEXT: retq 1120 %1 = sub <16 x i32> %a0, %a1 1121 %2 = trunc <16 x i32> %1 to <16 x i8> 1122 ret <16 x i8> %2 1123} 1124 1125define <16 x i8> @trunc_sub_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 1126; SSE-LABEL: trunc_sub_v16i16_v16i8: 1127; SSE: # BB#0: 1128; SSE-NEXT: psubw %xmm2, %xmm0 1129; SSE-NEXT: psubw %xmm3, %xmm1 1130; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1131; SSE-NEXT: pand %xmm2, %xmm1 1132; SSE-NEXT: pand %xmm2, %xmm0 1133; SSE-NEXT: packuswb %xmm1, %xmm0 1134; SSE-NEXT: retq 1135; 1136; AVX1-LABEL: trunc_sub_v16i16_v16i8: 1137; AVX1: # BB#0: 1138; AVX1-NEXT: vpsubw %xmm1, %xmm0, %xmm2 1139; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1140; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1141; AVX1-NEXT: vpsubw %xmm1, %xmm0, %xmm0 1142; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1143; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 1144; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 1145; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1146; AVX1-NEXT: vzeroupper 1147; AVX1-NEXT: retq 1148; 1149; AVX2-LABEL: trunc_sub_v16i16_v16i8: 1150; AVX2: # BB#0: 1151; AVX2-NEXT: vpsubw %ymm1, %ymm0, %ymm0 1152; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1153; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1154; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1155; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1156; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1157; AVX2-NEXT: vzeroupper 1158; AVX2-NEXT: retq 1159; 1160; AVX512F-LABEL: trunc_sub_v16i16_v16i8: 1161; AVX512F: # BB#0: 1162; AVX512F-NEXT: vpsubw %ymm1, %ymm0, %ymm0 1163; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 1164; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 1165; AVX512F-NEXT: vzeroupper 1166; AVX512F-NEXT: retq 1167; 1168; AVX512BW-LABEL: trunc_sub_v16i16_v16i8: 1169; AVX512BW: # BB#0: 1170; AVX512BW-NEXT: vpsubw %ymm1, %ymm0, %ymm0 1171; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1172; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1173; AVX512BW-NEXT: vzeroupper 1174; AVX512BW-NEXT: retq 1175; 1176; AVX512DQ-LABEL: trunc_sub_v16i16_v16i8: 1177; AVX512DQ: # BB#0: 1178; AVX512DQ-NEXT: vpsubw %ymm1, %ymm0, %ymm0 1179; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 1180; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 1181; AVX512DQ-NEXT: vzeroupper 1182; AVX512DQ-NEXT: retq 1183 %1 = sub <16 x i16> %a0, %a1 1184 %2 = trunc <16 x i16> %1 to <16 x i8> 1185 ret <16 x i8> %2 1186} 1187 1188; 1189; sub to constant 1190; 1191 1192define <4 x i32> @trunc_sub_const_v4i64_v4i32(<4 x i64> %a0) nounwind { 1193; SSE-LABEL: trunc_sub_const_v4i64_v4i32: 1194; SSE: # BB#0: 1195; SSE-NEXT: movl $1, %eax 1196; SSE-NEXT: movq %rax, %xmm2 1197; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 1198; SSE-NEXT: psubq %xmm2, %xmm0 1199; SSE-NEXT: psubq {{.*}}(%rip), %xmm1 1200; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1201; SSE-NEXT: retq 1202; 1203; AVX1-LABEL: trunc_sub_const_v4i64_v4i32: 1204; AVX1: # BB#0: 1205; AVX1-NEXT: movl $1, %eax 1206; AVX1-NEXT: vmovq %rax, %xmm1 1207; AVX1-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] 1208; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm1 1209; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1210; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm0, %xmm0 1211; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm1[0,2],xmm0[0,2] 1212; AVX1-NEXT: vzeroupper 1213; AVX1-NEXT: retq 1214; 1215; AVX2-LABEL: trunc_sub_const_v4i64_v4i32: 1216; AVX2: # BB#0: 1217; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1218; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1219; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1220; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1221; AVX2-NEXT: vzeroupper 1222; AVX2-NEXT: retq 1223; 1224; AVX512-LABEL: trunc_sub_const_v4i64_v4i32: 1225; AVX512: # BB#0: 1226; AVX512-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1227; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1228; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1229; AVX512-NEXT: vzeroupper 1230; AVX512-NEXT: retq 1231 %1 = sub <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 1232 %2 = trunc <4 x i64> %1 to <4 x i32> 1233 ret <4 x i32> %2 1234} 1235 1236define <8 x i16> @trunc_sub_const_v8i64_v8i16(<8 x i64> %a0) nounwind { 1237; SSE-LABEL: trunc_sub_const_v8i64_v8i16: 1238; SSE: # BB#0: 1239; SSE-NEXT: movl $1, %eax 1240; SSE-NEXT: movq %rax, %xmm4 1241; SSE-NEXT: pslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 1242; SSE-NEXT: psubq %xmm4, %xmm0 1243; SSE-NEXT: psubq {{.*}}(%rip), %xmm1 1244; SSE-NEXT: psubq {{.*}}(%rip), %xmm2 1245; SSE-NEXT: psubq {{.*}}(%rip), %xmm3 1246; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 1247; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 1248; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 1249; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 1250; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 1251; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1252; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 1253; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1254; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 1255; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1256; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 1257; SSE-NEXT: movapd %xmm2, %xmm0 1258; SSE-NEXT: retq 1259; 1260; AVX1-LABEL: trunc_sub_const_v8i64_v8i16: 1261; AVX1: # BB#0: 1262; AVX1-NEXT: movl $1, %eax 1263; AVX1-NEXT: vmovq %rax, %xmm2 1264; AVX1-NEXT: vpslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 1265; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm2 1266; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1267; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm0, %xmm0 1268; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm3 1269; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1270; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm1 1271; AVX1-NEXT: vpxor %xmm4, %xmm4, %xmm4 1272; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1,2,3],xmm1[4],xmm4[5,6,7] 1273; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] 1274; AVX1-NEXT: vpackusdw %xmm1, %xmm3, %xmm1 1275; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1,2,3],xmm0[4],xmm4[5,6,7] 1276; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] 1277; AVX1-NEXT: vpackusdw %xmm0, %xmm2, %xmm0 1278; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1279; AVX1-NEXT: vzeroupper 1280; AVX1-NEXT: retq 1281; 1282; AVX2-LABEL: trunc_sub_const_v8i64_v8i16: 1283; AVX2: # BB#0: 1284; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm1, %ymm1 1285; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1286; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1287; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1288; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 1289; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1290; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1291; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 1292; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1293; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1294; AVX2-NEXT: vzeroupper 1295; AVX2-NEXT: retq 1296; 1297; AVX512-LABEL: trunc_sub_const_v8i64_v8i16: 1298; AVX512: # BB#0: 1299; AVX512-NEXT: vpsubq {{.*}}(%rip), %zmm0, %zmm0 1300; AVX512-NEXT: vpmovqw %zmm0, %xmm0 1301; AVX512-NEXT: vzeroupper 1302; AVX512-NEXT: retq 1303 %1 = sub <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 1304 %2 = trunc <8 x i64> %1 to <8 x i16> 1305 ret <8 x i16> %2 1306} 1307 1308define <8 x i16> @trunc_sub_const_v8i32_v8i16(<8 x i32> %a0) nounwind { 1309; SSE-LABEL: trunc_sub_const_v8i32_v8i16: 1310; SSE: # BB#0: 1311; SSE-NEXT: psubd {{.*}}(%rip), %xmm0 1312; SSE-NEXT: psubd {{.*}}(%rip), %xmm1 1313; SSE-NEXT: pslld $16, %xmm1 1314; SSE-NEXT: psrad $16, %xmm1 1315; SSE-NEXT: pslld $16, %xmm0 1316; SSE-NEXT: psrad $16, %xmm0 1317; SSE-NEXT: packssdw %xmm1, %xmm0 1318; SSE-NEXT: retq 1319; 1320; AVX1-LABEL: trunc_sub_const_v8i32_v8i16: 1321; AVX1: # BB#0: 1322; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm1 1323; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1324; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm0 1325; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 1326; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1327; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1328; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1329; AVX1-NEXT: vzeroupper 1330; AVX1-NEXT: retq 1331; 1332; AVX2-LABEL: trunc_sub_const_v8i32_v8i16: 1333; AVX2: # BB#0: 1334; AVX2-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0 1335; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 1336; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1337; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1338; AVX2-NEXT: vzeroupper 1339; AVX2-NEXT: retq 1340; 1341; AVX512-LABEL: trunc_sub_const_v8i32_v8i16: 1342; AVX512: # BB#0: 1343; AVX512-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0 1344; AVX512-NEXT: vpmovdw %zmm0, %ymm0 1345; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1346; AVX512-NEXT: vzeroupper 1347; AVX512-NEXT: retq 1348 %1 = sub <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1349 %2 = trunc <8 x i32> %1 to <8 x i16> 1350 ret <8 x i16> %2 1351} 1352 1353define <16 x i8> @trunc_sub_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 1354; SSE-LABEL: trunc_sub_const_v16i64_v16i8: 1355; SSE: # BB#0: 1356; SSE-NEXT: movl $1, %eax 1357; SSE-NEXT: movq %rax, %xmm8 1358; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 1359; SSE-NEXT: psubq %xmm8, %xmm0 1360; SSE-NEXT: psubq {{.*}}(%rip), %xmm1 1361; SSE-NEXT: psubq {{.*}}(%rip), %xmm2 1362; SSE-NEXT: psubq {{.*}}(%rip), %xmm3 1363; SSE-NEXT: psubq {{.*}}(%rip), %xmm4 1364; SSE-NEXT: psubq {{.*}}(%rip), %xmm5 1365; SSE-NEXT: psubq {{.*}}(%rip), %xmm6 1366; SSE-NEXT: psubq {{.*}}(%rip), %xmm7 1367; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 1368; SSE-NEXT: pand %xmm8, %xmm7 1369; SSE-NEXT: pand %xmm8, %xmm6 1370; SSE-NEXT: packuswb %xmm7, %xmm6 1371; SSE-NEXT: pand %xmm8, %xmm5 1372; SSE-NEXT: pand %xmm8, %xmm4 1373; SSE-NEXT: packuswb %xmm5, %xmm4 1374; SSE-NEXT: packuswb %xmm6, %xmm4 1375; SSE-NEXT: pand %xmm8, %xmm3 1376; SSE-NEXT: pand %xmm8, %xmm2 1377; SSE-NEXT: packuswb %xmm3, %xmm2 1378; SSE-NEXT: pand %xmm8, %xmm1 1379; SSE-NEXT: pand %xmm8, %xmm0 1380; SSE-NEXT: packuswb %xmm1, %xmm0 1381; SSE-NEXT: packuswb %xmm2, %xmm0 1382; SSE-NEXT: packuswb %xmm4, %xmm0 1383; SSE-NEXT: retq 1384; 1385; AVX1-LABEL: trunc_sub_const_v16i64_v16i8: 1386; AVX1: # BB#0: 1387; AVX1-NEXT: movl $1, %eax 1388; AVX1-NEXT: vmovq %rax, %xmm4 1389; AVX1-NEXT: vpslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 1390; AVX1-NEXT: vpsubq %xmm4, %xmm0, %xmm8 1391; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1392; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm0, %xmm0 1393; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm5 1394; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1395; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm1 1396; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm2, %xmm6 1397; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 1398; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm2, %xmm2 1399; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm3, %xmm7 1400; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 1401; AVX1-NEXT: vpsubq {{.*}}(%rip), %xmm3, %xmm3 1402; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 1403; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 1404; AVX1-NEXT: vpand %xmm4, %xmm7, %xmm7 1405; AVX1-NEXT: vpackuswb %xmm3, %xmm7, %xmm3 1406; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 1407; AVX1-NEXT: vpand %xmm4, %xmm6, %xmm6 1408; AVX1-NEXT: vpackuswb %xmm2, %xmm6, %xmm2 1409; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 1410; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 1411; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm3 1412; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 1413; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 1414; AVX1-NEXT: vpand %xmm4, %xmm8, %xmm3 1415; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 1416; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1417; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 1418; AVX1-NEXT: vzeroupper 1419; AVX1-NEXT: retq 1420; 1421; AVX2-LABEL: trunc_sub_const_v16i64_v16i8: 1422; AVX2: # BB#0: 1423; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm1, %ymm1 1424; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm0, %ymm0 1425; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm3, %ymm3 1426; AVX2-NEXT: vpsubq {{.*}}(%rip), %ymm2, %ymm2 1427; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 1428; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1429; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 1430; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 1431; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 1432; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 1433; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 1434; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1435; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1436; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 1437; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1438; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1439; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 1440; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1441; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1442; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 1443; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1444; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 1445; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 1446; AVX2-NEXT: vzeroupper 1447; AVX2-NEXT: retq 1448; 1449; AVX512-LABEL: trunc_sub_const_v16i64_v16i8: 1450; AVX512: # BB#0: 1451; AVX512-NEXT: vpsubq {{.*}}(%rip), %zmm1, %zmm1 1452; AVX512-NEXT: vpsubq {{.*}}(%rip), %zmm0, %zmm0 1453; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1454; AVX512-NEXT: vpmovqd %zmm1, %ymm1 1455; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 1456; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1457; AVX512-NEXT: vzeroupper 1458; AVX512-NEXT: retq 1459 %1 = sub <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 1460 %2 = trunc <16 x i64> %1 to <16 x i8> 1461 ret <16 x i8> %2 1462} 1463 1464define <16 x i8> @trunc_sub_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 1465; SSE-LABEL: trunc_sub_const_v16i32_v16i8: 1466; SSE: # BB#0: 1467; SSE-NEXT: psubd {{.*}}(%rip), %xmm0 1468; SSE-NEXT: psubd {{.*}}(%rip), %xmm1 1469; SSE-NEXT: psubd {{.*}}(%rip), %xmm2 1470; SSE-NEXT: psubd {{.*}}(%rip), %xmm3 1471; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1472; SSE-NEXT: pand %xmm4, %xmm3 1473; SSE-NEXT: pand %xmm4, %xmm2 1474; SSE-NEXT: packuswb %xmm3, %xmm2 1475; SSE-NEXT: pand %xmm4, %xmm1 1476; SSE-NEXT: pand %xmm4, %xmm0 1477; SSE-NEXT: packuswb %xmm1, %xmm0 1478; SSE-NEXT: packuswb %xmm2, %xmm0 1479; SSE-NEXT: retq 1480; 1481; AVX1-LABEL: trunc_sub_const_v16i32_v16i8: 1482; AVX1: # BB#0: 1483; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm2 1484; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1485; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm0, %xmm0 1486; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm1, %xmm3 1487; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1488; AVX1-NEXT: vpsubd {{.*}}(%rip), %xmm1, %xmm1 1489; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 1490; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 1491; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 1492; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 1493; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 1494; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 1495; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 1496; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1497; AVX1-NEXT: vzeroupper 1498; AVX1-NEXT: retq 1499; 1500; AVX2-LABEL: trunc_sub_const_v16i32_v16i8: 1501; AVX2: # BB#0: 1502; AVX2-NEXT: vpsubd {{.*}}(%rip), %ymm0, %ymm0 1503; AVX2-NEXT: vpsubd {{.*}}(%rip), %ymm1, %ymm1 1504; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 1505; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 1506; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1507; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1508; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 1509; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 1510; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1511; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 1512; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1513; AVX2-NEXT: vzeroupper 1514; AVX2-NEXT: retq 1515; 1516; AVX512-LABEL: trunc_sub_const_v16i32_v16i8: 1517; AVX512: # BB#0: 1518; AVX512-NEXT: vpsubd {{.*}}(%rip), %zmm0, %zmm0 1519; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1520; AVX512-NEXT: vzeroupper 1521; AVX512-NEXT: retq 1522 %1 = sub <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 1523 %2 = trunc <16 x i32> %1 to <16 x i8> 1524 ret <16 x i8> %2 1525} 1526 1527define <16 x i8> @trunc_sub_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 1528; SSE-LABEL: trunc_sub_const_v16i16_v16i8: 1529; SSE: # BB#0: 1530; SSE-NEXT: psubw {{.*}}(%rip), %xmm0 1531; SSE-NEXT: psubw {{.*}}(%rip), %xmm1 1532; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 1533; SSE-NEXT: pand %xmm2, %xmm1 1534; SSE-NEXT: pand %xmm2, %xmm0 1535; SSE-NEXT: packuswb %xmm1, %xmm0 1536; SSE-NEXT: retq 1537; 1538; AVX1-LABEL: trunc_sub_const_v16i16_v16i8: 1539; AVX1: # BB#0: 1540; AVX1-NEXT: vpsubw {{.*}}(%rip), %xmm0, %xmm1 1541; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1542; AVX1-NEXT: vpsubw {{.*}}(%rip), %xmm0, %xmm0 1543; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1544; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1545; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1546; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1547; AVX1-NEXT: vzeroupper 1548; AVX1-NEXT: retq 1549; 1550; AVX2-LABEL: trunc_sub_const_v16i16_v16i8: 1551; AVX2: # BB#0: 1552; AVX2-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 1553; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1554; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 1555; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 1556; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 1557; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1558; AVX2-NEXT: vzeroupper 1559; AVX2-NEXT: retq 1560; 1561; AVX512F-LABEL: trunc_sub_const_v16i16_v16i8: 1562; AVX512F: # BB#0: 1563; AVX512F-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 1564; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 1565; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 1566; AVX512F-NEXT: vzeroupper 1567; AVX512F-NEXT: retq 1568; 1569; AVX512BW-LABEL: trunc_sub_const_v16i16_v16i8: 1570; AVX512BW: # BB#0: 1571; AVX512BW-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 1572; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 1573; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1574; AVX512BW-NEXT: vzeroupper 1575; AVX512BW-NEXT: retq 1576; 1577; AVX512DQ-LABEL: trunc_sub_const_v16i16_v16i8: 1578; AVX512DQ: # BB#0: 1579; AVX512DQ-NEXT: vpsubw {{.*}}(%rip), %ymm0, %ymm0 1580; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 1581; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 1582; AVX512DQ-NEXT: vzeroupper 1583; AVX512DQ-NEXT: retq 1584 %1 = sub <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 1585 %2 = trunc <16 x i16> %1 to <16 x i8> 1586 ret <16 x i8> %2 1587} 1588 1589; 1590; mul 1591; 1592 1593define <4 x i32> @trunc_mul_v4i64_v4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 1594; SSE-LABEL: trunc_mul_v4i64_v4i32: 1595; SSE: # BB#0: 1596; SSE-NEXT: movdqa %xmm1, %xmm4 1597; SSE-NEXT: psrlq $32, %xmm4 1598; SSE-NEXT: pmuludq %xmm3, %xmm4 1599; SSE-NEXT: movdqa %xmm3, %xmm5 1600; SSE-NEXT: psrlq $32, %xmm5 1601; SSE-NEXT: pmuludq %xmm1, %xmm5 1602; SSE-NEXT: paddq %xmm4, %xmm5 1603; SSE-NEXT: psllq $32, %xmm5 1604; SSE-NEXT: pmuludq %xmm3, %xmm1 1605; SSE-NEXT: paddq %xmm5, %xmm1 1606; SSE-NEXT: movdqa %xmm0, %xmm3 1607; SSE-NEXT: psrlq $32, %xmm3 1608; SSE-NEXT: pmuludq %xmm2, %xmm3 1609; SSE-NEXT: movdqa %xmm2, %xmm4 1610; SSE-NEXT: psrlq $32, %xmm4 1611; SSE-NEXT: pmuludq %xmm0, %xmm4 1612; SSE-NEXT: paddq %xmm3, %xmm4 1613; SSE-NEXT: psllq $32, %xmm4 1614; SSE-NEXT: pmuludq %xmm2, %xmm0 1615; SSE-NEXT: paddq %xmm4, %xmm0 1616; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1617; SSE-NEXT: retq 1618; 1619; AVX1-LABEL: trunc_mul_v4i64_v4i32: 1620; AVX1: # BB#0: 1621; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 1622; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2] 1623; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1624; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2] 1625; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm0 1626; AVX1-NEXT: vzeroupper 1627; AVX1-NEXT: retq 1628; 1629; AVX2-LABEL: trunc_mul_v4i64_v4i32: 1630; AVX2: # BB#0: 1631; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 1632; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1633; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1634; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1635; AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0 1636; AVX2-NEXT: vzeroupper 1637; AVX2-NEXT: retq 1638; 1639; AVX512F-LABEL: trunc_mul_v4i64_v4i32: 1640; AVX512F: # BB#0: 1641; AVX512F-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def> 1642; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 1643; AVX512F-NEXT: vpmovqd %zmm1, %ymm1 1644; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 1645; AVX512F-NEXT: vpmulld %xmm1, %xmm0, %xmm0 1646; AVX512F-NEXT: vzeroupper 1647; AVX512F-NEXT: retq 1648; 1649; AVX512BW-LABEL: trunc_mul_v4i64_v4i32: 1650; AVX512BW: # BB#0: 1651; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def> 1652; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 1653; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1 1654; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 1655; AVX512BW-NEXT: vpmulld %xmm1, %xmm0, %xmm0 1656; AVX512BW-NEXT: vzeroupper 1657; AVX512BW-NEXT: retq 1658; 1659; AVX512DQ-LABEL: trunc_mul_v4i64_v4i32: 1660; AVX512DQ: # BB#0: 1661; AVX512DQ-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def> 1662; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 1663; AVX512DQ-NEXT: vpmullq %zmm1, %zmm0, %zmm0 1664; AVX512DQ-NEXT: vpmovqd %zmm0, %ymm0 1665; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1666; AVX512DQ-NEXT: vzeroupper 1667; AVX512DQ-NEXT: retq 1668 %1 = mul <4 x i64> %a0, %a1 1669 %2 = trunc <4 x i64> %1 to <4 x i32> 1670 ret <4 x i32> %2 1671} 1672 1673define <8 x i16> @trunc_mul_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 1674; SSE-LABEL: trunc_mul_v8i64_v8i16: 1675; SSE: # BB#0: 1676; SSE-NEXT: pshufd {{.*#+}} xmm7 = xmm7[0,2,2,3] 1677; SSE-NEXT: pshuflw {{.*#+}} xmm7 = xmm7[0,1,0,2,4,5,6,7] 1678; SSE-NEXT: pshufd {{.*#+}} xmm6 = xmm6[0,2,2,3] 1679; SSE-NEXT: pshuflw {{.*#+}} xmm6 = xmm6[0,1,0,2,4,5,6,7] 1680; SSE-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1] 1681; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm5[0,2,2,3] 1682; SSE-NEXT: pshuflw {{.*#+}} xmm5 = xmm5[0,2,2,3,4,5,6,7] 1683; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 1684; SSE-NEXT: pshuflw {{.*#+}} xmm4 = xmm4[0,2,2,3,4,5,6,7] 1685; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1] 1686; SSE-NEXT: movsd {{.*#+}} xmm6 = xmm4[0],xmm6[1] 1687; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 1688; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 1689; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 1690; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 1691; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 1692; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1693; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 1694; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1695; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 1696; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1697; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 1698; SSE-NEXT: pmullw %xmm6, %xmm2 1699; SSE-NEXT: movdqa %xmm2, %xmm0 1700; SSE-NEXT: retq 1701; 1702; AVX1-LABEL: trunc_mul_v8i64_v8i16: 1703; AVX1: # BB#0: 1704; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 1705; AVX1-NEXT: vpxor %xmm5, %xmm5, %xmm5 1706; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0],xmm5[1,2,3],xmm4[4],xmm5[5,6,7] 1707; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm5[1,2,3],xmm3[4],xmm5[5,6,7] 1708; AVX1-NEXT: vpackusdw %xmm4, %xmm3, %xmm3 1709; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 1710; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm4[0],xmm5[1,2,3],xmm4[4],xmm5[5,6,7] 1711; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm5[1,2,3],xmm2[4],xmm5[5,6,7] 1712; AVX1-NEXT: vpackusdw %xmm4, %xmm2, %xmm2 1713; AVX1-NEXT: vpackusdw %xmm3, %xmm2, %xmm2 1714; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 1715; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm5[1,2,3],xmm3[4],xmm5[5,6,7] 1716; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm5[1,2,3],xmm1[4],xmm5[5,6,7] 1717; AVX1-NEXT: vpackusdw %xmm3, %xmm1, %xmm1 1718; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 1719; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm3[0],xmm5[1,2,3],xmm3[4],xmm5[5,6,7] 1720; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm5[1,2,3],xmm0[4],xmm5[5,6,7] 1721; AVX1-NEXT: vpackusdw %xmm3, %xmm0, %xmm0 1722; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 1723; AVX1-NEXT: vpmullw %xmm2, %xmm0, %xmm0 1724; AVX1-NEXT: vzeroupper 1725; AVX1-NEXT: retq 1726; 1727; AVX2-LABEL: trunc_mul_v8i64_v8i16: 1728; AVX2: # BB#0: 1729; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 1730; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1731; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 1732; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 1733; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 1734; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 1735; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 1736; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 1737; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 1738; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1739; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 1740; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 1741; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 1742; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 1743; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1744; AVX2-NEXT: vpmullw %xmm2, %xmm0, %xmm0 1745; AVX2-NEXT: vzeroupper 1746; AVX2-NEXT: retq 1747; 1748; AVX512F-LABEL: trunc_mul_v8i64_v8i16: 1749; AVX512F: # BB#0: 1750; AVX512F-NEXT: vpmovqw %zmm1, %xmm1 1751; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 1752; AVX512F-NEXT: vpmullw %xmm1, %xmm0, %xmm0 1753; AVX512F-NEXT: vzeroupper 1754; AVX512F-NEXT: retq 1755; 1756; AVX512BW-LABEL: trunc_mul_v8i64_v8i16: 1757; AVX512BW: # BB#0: 1758; AVX512BW-NEXT: vpmovqw %zmm1, %xmm1 1759; AVX512BW-NEXT: vpmovqw %zmm0, %xmm0 1760; AVX512BW-NEXT: vpmullw %xmm1, %xmm0, %xmm0 1761; AVX512BW-NEXT: vzeroupper 1762; AVX512BW-NEXT: retq 1763; 1764; AVX512DQ-LABEL: trunc_mul_v8i64_v8i16: 1765; AVX512DQ: # BB#0: 1766; AVX512DQ-NEXT: vpmullq %zmm1, %zmm0, %zmm0 1767; AVX512DQ-NEXT: vpmovqw %zmm0, %xmm0 1768; AVX512DQ-NEXT: vzeroupper 1769; AVX512DQ-NEXT: retq 1770 %1 = mul <8 x i64> %a0, %a1 1771 %2 = trunc <8 x i64> %1 to <8 x i16> 1772 ret <8 x i16> %2 1773} 1774 1775define <8 x i16> @trunc_mul_v8i32_v8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 1776; SSE-LABEL: trunc_mul_v8i32_v8i16: 1777; SSE: # BB#0: 1778; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,3,3] 1779; SSE-NEXT: pmuludq %xmm2, %xmm0 1780; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1781; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] 1782; SSE-NEXT: pmuludq %xmm4, %xmm2 1783; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 1784; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1785; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,1,3,3] 1786; SSE-NEXT: pmuludq %xmm3, %xmm1 1787; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1788; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,1,3,3] 1789; SSE-NEXT: pmuludq %xmm2, %xmm3 1790; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[0,2,2,3] 1791; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1792; SSE-NEXT: pslld $16, %xmm1 1793; SSE-NEXT: psrad $16, %xmm1 1794; SSE-NEXT: pslld $16, %xmm0 1795; SSE-NEXT: psrad $16, %xmm0 1796; SSE-NEXT: packssdw %xmm1, %xmm0 1797; SSE-NEXT: retq 1798; 1799; AVX1-LABEL: trunc_mul_v8i32_v8i16: 1800; AVX1: # BB#0: 1801; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm2 1802; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1803; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1804; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm0 1805; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 1806; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 1807; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 1808; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1809; AVX1-NEXT: vzeroupper 1810; AVX1-NEXT: retq 1811; 1812; AVX2-LABEL: trunc_mul_v8i32_v8i16: 1813; AVX2: # BB#0: 1814; AVX2-NEXT: vpmulld %ymm1, %ymm0, %ymm0 1815; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 1816; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1817; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1818; AVX2-NEXT: vzeroupper 1819; AVX2-NEXT: retq 1820; 1821; AVX512-LABEL: trunc_mul_v8i32_v8i16: 1822; AVX512: # BB#0: 1823; AVX512-NEXT: vpmulld %ymm1, %ymm0, %ymm0 1824; AVX512-NEXT: vpmovdw %zmm0, %ymm0 1825; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1826; AVX512-NEXT: vzeroupper 1827; AVX512-NEXT: retq 1828 %1 = mul <8 x i32> %a0, %a1 1829 %2 = trunc <8 x i32> %1 to <8 x i16> 1830 ret <8 x i16> %2 1831} 1832 1833define <16 x i8> @trunc_mul_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 1834; SSE-LABEL: trunc_mul_v16i64_v16i8: 1835; SSE: # BB#0: 1836; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1837; SSE-NEXT: movdqa %xmm0, %xmm9 1838; SSE-NEXT: psrlq $32, %xmm9 1839; SSE-NEXT: pmuludq %xmm8, %xmm9 1840; SSE-NEXT: movdqa %xmm8, %xmm10 1841; SSE-NEXT: psrlq $32, %xmm10 1842; SSE-NEXT: pmuludq %xmm0, %xmm10 1843; SSE-NEXT: paddq %xmm9, %xmm10 1844; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9 1845; SSE-NEXT: psllq $32, %xmm10 1846; SSE-NEXT: pmuludq %xmm8, %xmm0 1847; SSE-NEXT: paddq %xmm10, %xmm0 1848; SSE-NEXT: movdqa %xmm1, %xmm8 1849; SSE-NEXT: psrlq $32, %xmm8 1850; SSE-NEXT: pmuludq %xmm9, %xmm8 1851; SSE-NEXT: movdqa %xmm9, %xmm10 1852; SSE-NEXT: psrlq $32, %xmm10 1853; SSE-NEXT: pmuludq %xmm1, %xmm10 1854; SSE-NEXT: paddq %xmm8, %xmm10 1855; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1856; SSE-NEXT: psllq $32, %xmm10 1857; SSE-NEXT: pmuludq %xmm9, %xmm1 1858; SSE-NEXT: paddq %xmm10, %xmm1 1859; SSE-NEXT: movdqa %xmm2, %xmm9 1860; SSE-NEXT: psrlq $32, %xmm9 1861; SSE-NEXT: pmuludq %xmm8, %xmm9 1862; SSE-NEXT: movdqa %xmm8, %xmm10 1863; SSE-NEXT: psrlq $32, %xmm10 1864; SSE-NEXT: pmuludq %xmm2, %xmm10 1865; SSE-NEXT: paddq %xmm9, %xmm10 1866; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9 1867; SSE-NEXT: psllq $32, %xmm10 1868; SSE-NEXT: pmuludq %xmm8, %xmm2 1869; SSE-NEXT: paddq %xmm10, %xmm2 1870; SSE-NEXT: movdqa %xmm3, %xmm8 1871; SSE-NEXT: psrlq $32, %xmm8 1872; SSE-NEXT: pmuludq %xmm9, %xmm8 1873; SSE-NEXT: movdqa %xmm9, %xmm10 1874; SSE-NEXT: psrlq $32, %xmm10 1875; SSE-NEXT: pmuludq %xmm3, %xmm10 1876; SSE-NEXT: paddq %xmm8, %xmm10 1877; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1878; SSE-NEXT: psllq $32, %xmm10 1879; SSE-NEXT: pmuludq %xmm9, %xmm3 1880; SSE-NEXT: paddq %xmm10, %xmm3 1881; SSE-NEXT: movdqa %xmm4, %xmm9 1882; SSE-NEXT: psrlq $32, %xmm9 1883; SSE-NEXT: pmuludq %xmm8, %xmm9 1884; SSE-NEXT: movdqa %xmm8, %xmm10 1885; SSE-NEXT: psrlq $32, %xmm10 1886; SSE-NEXT: pmuludq %xmm4, %xmm10 1887; SSE-NEXT: paddq %xmm9, %xmm10 1888; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9 1889; SSE-NEXT: psllq $32, %xmm10 1890; SSE-NEXT: pmuludq %xmm8, %xmm4 1891; SSE-NEXT: paddq %xmm10, %xmm4 1892; SSE-NEXT: movdqa %xmm5, %xmm8 1893; SSE-NEXT: psrlq $32, %xmm8 1894; SSE-NEXT: pmuludq %xmm9, %xmm8 1895; SSE-NEXT: movdqa %xmm9, %xmm10 1896; SSE-NEXT: psrlq $32, %xmm10 1897; SSE-NEXT: pmuludq %xmm5, %xmm10 1898; SSE-NEXT: paddq %xmm8, %xmm10 1899; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm8 1900; SSE-NEXT: psllq $32, %xmm10 1901; SSE-NEXT: pmuludq %xmm9, %xmm5 1902; SSE-NEXT: paddq %xmm10, %xmm5 1903; SSE-NEXT: movdqa %xmm6, %xmm9 1904; SSE-NEXT: psrlq $32, %xmm9 1905; SSE-NEXT: pmuludq %xmm8, %xmm9 1906; SSE-NEXT: movdqa %xmm8, %xmm10 1907; SSE-NEXT: psrlq $32, %xmm10 1908; SSE-NEXT: pmuludq %xmm6, %xmm10 1909; SSE-NEXT: paddq %xmm9, %xmm10 1910; SSE-NEXT: movdqa {{[0-9]+}}(%rsp), %xmm9 1911; SSE-NEXT: psllq $32, %xmm10 1912; SSE-NEXT: pmuludq %xmm8, %xmm6 1913; SSE-NEXT: paddq %xmm10, %xmm6 1914; SSE-NEXT: movdqa %xmm7, %xmm8 1915; SSE-NEXT: psrlq $32, %xmm8 1916; SSE-NEXT: pmuludq %xmm9, %xmm8 1917; SSE-NEXT: movdqa %xmm9, %xmm10 1918; SSE-NEXT: psrlq $32, %xmm10 1919; SSE-NEXT: pmuludq %xmm7, %xmm10 1920; SSE-NEXT: paddq %xmm8, %xmm10 1921; SSE-NEXT: pmuludq %xmm9, %xmm7 1922; SSE-NEXT: psllq $32, %xmm10 1923; SSE-NEXT: paddq %xmm10, %xmm7 1924; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 1925; SSE-NEXT: pand %xmm8, %xmm7 1926; SSE-NEXT: pand %xmm8, %xmm6 1927; SSE-NEXT: packuswb %xmm7, %xmm6 1928; SSE-NEXT: pand %xmm8, %xmm5 1929; SSE-NEXT: pand %xmm8, %xmm4 1930; SSE-NEXT: packuswb %xmm5, %xmm4 1931; SSE-NEXT: packuswb %xmm6, %xmm4 1932; SSE-NEXT: pand %xmm8, %xmm3 1933; SSE-NEXT: pand %xmm8, %xmm2 1934; SSE-NEXT: packuswb %xmm3, %xmm2 1935; SSE-NEXT: pand %xmm8, %xmm1 1936; SSE-NEXT: pand %xmm8, %xmm0 1937; SSE-NEXT: packuswb %xmm1, %xmm0 1938; SSE-NEXT: packuswb %xmm2, %xmm0 1939; SSE-NEXT: packuswb %xmm4, %xmm0 1940; SSE-NEXT: retq 1941; 1942; AVX1-LABEL: trunc_mul_v16i64_v16i8: 1943; AVX1: # BB#0: 1944; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm8 1945; AVX1-NEXT: vpmuludq %xmm4, %xmm8, %xmm8 1946; AVX1-NEXT: vpsrlq $32, %xmm4, %xmm9 1947; AVX1-NEXT: vpmuludq %xmm9, %xmm0, %xmm9 1948; AVX1-NEXT: vpaddq %xmm8, %xmm9, %xmm8 1949; AVX1-NEXT: vpsllq $32, %xmm8, %xmm8 1950; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm9 1951; AVX1-NEXT: vpaddq %xmm8, %xmm9, %xmm8 1952; AVX1-NEXT: vextractf128 $1, %ymm4, %xmm9 1953; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1954; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm4 1955; AVX1-NEXT: vpmuludq %xmm9, %xmm4, %xmm10 1956; AVX1-NEXT: vpsrlq $32, %xmm9, %xmm4 1957; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm4 1958; AVX1-NEXT: vpaddq %xmm10, %xmm4, %xmm4 1959; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 1960; AVX1-NEXT: vpmuludq %xmm9, %xmm0, %xmm0 1961; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm9 1962; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm4 1963; AVX1-NEXT: vpmuludq %xmm5, %xmm4, %xmm4 1964; AVX1-NEXT: vpsrlq $32, %xmm5, %xmm0 1965; AVX1-NEXT: vpmuludq %xmm0, %xmm1, %xmm0 1966; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm0 1967; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 1968; AVX1-NEXT: vpmuludq %xmm5, %xmm1, %xmm4 1969; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm10 1970; AVX1-NEXT: vextractf128 $1, %ymm5, %xmm0 1971; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 1972; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm5 1973; AVX1-NEXT: vpmuludq %xmm0, %xmm5, %xmm5 1974; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm4 1975; AVX1-NEXT: vpmuludq %xmm4, %xmm1, %xmm4 1976; AVX1-NEXT: vpaddq %xmm5, %xmm4, %xmm4 1977; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 1978; AVX1-NEXT: vpmuludq %xmm0, %xmm1, %xmm0 1979; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm1 1980; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm0 1981; AVX1-NEXT: vpmuludq %xmm6, %xmm0, %xmm0 1982; AVX1-NEXT: vpsrlq $32, %xmm6, %xmm4 1983; AVX1-NEXT: vpmuludq %xmm4, %xmm2, %xmm4 1984; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm0 1985; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 1986; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm4 1987; AVX1-NEXT: vpaddq %xmm0, %xmm4, %xmm5 1988; AVX1-NEXT: vextractf128 $1, %ymm6, %xmm0 1989; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 1990; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm4 1991; AVX1-NEXT: vpmuludq %xmm0, %xmm4, %xmm4 1992; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm6 1993; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm6 1994; AVX1-NEXT: vpaddq %xmm4, %xmm6, %xmm4 1995; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 1996; AVX1-NEXT: vpmuludq %xmm0, %xmm2, %xmm0 1997; AVX1-NEXT: vpaddq %xmm4, %xmm0, %xmm0 1998; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm2 1999; AVX1-NEXT: vpmuludq %xmm7, %xmm2, %xmm2 2000; AVX1-NEXT: vpsrlq $32, %xmm7, %xmm4 2001; AVX1-NEXT: vpmuludq %xmm4, %xmm3, %xmm4 2002; AVX1-NEXT: vpaddq %xmm2, %xmm4, %xmm2 2003; AVX1-NEXT: vpsllq $32, %xmm2, %xmm2 2004; AVX1-NEXT: vpmuludq %xmm7, %xmm3, %xmm4 2005; AVX1-NEXT: vpaddq %xmm2, %xmm4, %xmm2 2006; AVX1-NEXT: vextractf128 $1, %ymm7, %xmm4 2007; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 2008; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm6 2009; AVX1-NEXT: vpmuludq %xmm4, %xmm6, %xmm6 2010; AVX1-NEXT: vpsrlq $32, %xmm4, %xmm7 2011; AVX1-NEXT: vpmuludq %xmm7, %xmm3, %xmm7 2012; AVX1-NEXT: vpaddq %xmm6, %xmm7, %xmm6 2013; AVX1-NEXT: vpsllq $32, %xmm6, %xmm6 2014; AVX1-NEXT: vpmuludq %xmm4, %xmm3, %xmm3 2015; AVX1-NEXT: vpaddq %xmm6, %xmm3, %xmm3 2016; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 2017; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 2018; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 2019; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 2020; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 2021; AVX1-NEXT: vpand %xmm4, %xmm5, %xmm3 2022; AVX1-NEXT: vpackuswb %xmm0, %xmm3, %xmm0 2023; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 2024; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 2025; AVX1-NEXT: vpand %xmm4, %xmm10, %xmm2 2026; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2027; AVX1-NEXT: vpand %xmm4, %xmm9, %xmm2 2028; AVX1-NEXT: vpand %xmm4, %xmm8, %xmm3 2029; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 2030; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2031; AVX1-NEXT: vpackuswb %xmm0, %xmm1, %xmm0 2032; AVX1-NEXT: vzeroupper 2033; AVX1-NEXT: retq 2034; 2035; AVX2-LABEL: trunc_mul_v16i64_v16i8: 2036; AVX2: # BB#0: 2037; AVX2-NEXT: vpshufd {{.*#+}} ymm7 = ymm7[0,2,2,3,4,6,6,7] 2038; AVX2-NEXT: vpermq {{.*#+}} ymm7 = ymm7[0,2,2,3] 2039; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 2040; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 2041; AVX2-NEXT: vpmulld %xmm7, %xmm3, %xmm3 2042; AVX2-NEXT: vpshufd {{.*#+}} ymm6 = ymm6[0,2,2,3,4,6,6,7] 2043; AVX2-NEXT: vpermq {{.*#+}} ymm6 = ymm6[0,2,2,3] 2044; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 2045; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 2046; AVX2-NEXT: vpmulld %xmm6, %xmm2, %xmm2 2047; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 2048; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2049; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 2050; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 2051; AVX2-NEXT: vmovdqa {{.*#+}} xmm6 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2052; AVX2-NEXT: vpshufb %xmm6, %xmm2, %xmm2 2053; AVX2-NEXT: vpshufd {{.*#+}} ymm5 = ymm5[0,2,2,3,4,6,6,7] 2054; AVX2-NEXT: vpermq {{.*#+}} ymm5 = ymm5[0,2,2,3] 2055; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 2056; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2057; AVX2-NEXT: vpmulld %xmm5, %xmm1, %xmm1 2058; AVX2-NEXT: vpshufd {{.*#+}} ymm4 = ymm4[0,2,2,3,4,6,6,7] 2059; AVX2-NEXT: vpermq {{.*#+}} ymm4 = ymm4[0,2,2,3] 2060; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2061; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2062; AVX2-NEXT: vpmulld %xmm4, %xmm0, %xmm0 2063; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 2064; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 2065; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2066; AVX2-NEXT: vpshufb %xmm6, %xmm0, %xmm0 2067; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2068; AVX2-NEXT: vzeroupper 2069; AVX2-NEXT: retq 2070; 2071; AVX512F-LABEL: trunc_mul_v16i64_v16i8: 2072; AVX512F: # BB#0: 2073; AVX512F-NEXT: vpmovqd %zmm3, %ymm3 2074; AVX512F-NEXT: vpmovqd %zmm1, %ymm1 2075; AVX512F-NEXT: vpmulld %ymm3, %ymm1, %ymm1 2076; AVX512F-NEXT: vpmovqd %zmm2, %ymm2 2077; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 2078; AVX512F-NEXT: vpmulld %ymm2, %ymm0, %ymm0 2079; AVX512F-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 2080; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 2081; AVX512F-NEXT: vzeroupper 2082; AVX512F-NEXT: retq 2083; 2084; AVX512BW-LABEL: trunc_mul_v16i64_v16i8: 2085; AVX512BW: # BB#0: 2086; AVX512BW-NEXT: vpmovqd %zmm3, %ymm3 2087; AVX512BW-NEXT: vpmovqd %zmm1, %ymm1 2088; AVX512BW-NEXT: vpmulld %ymm3, %ymm1, %ymm1 2089; AVX512BW-NEXT: vpmovqd %zmm2, %ymm2 2090; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 2091; AVX512BW-NEXT: vpmulld %ymm2, %ymm0, %ymm0 2092; AVX512BW-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 2093; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0 2094; AVX512BW-NEXT: vzeroupper 2095; AVX512BW-NEXT: retq 2096; 2097; AVX512DQ-LABEL: trunc_mul_v16i64_v16i8: 2098; AVX512DQ: # BB#0: 2099; AVX512DQ-NEXT: vpmullq %zmm3, %zmm1, %zmm1 2100; AVX512DQ-NEXT: vpmullq %zmm2, %zmm0, %zmm0 2101; AVX512DQ-NEXT: vpmovqd %zmm0, %ymm0 2102; AVX512DQ-NEXT: vpmovqd %zmm1, %ymm1 2103; AVX512DQ-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 2104; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 2105; AVX512DQ-NEXT: vzeroupper 2106; AVX512DQ-NEXT: retq 2107 %1 = mul <16 x i64> %a0, %a1 2108 %2 = trunc <16 x i64> %1 to <16 x i8> 2109 ret <16 x i8> %2 2110} 2111 2112define <16 x i8> @trunc_mul_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 2113; SSE-LABEL: trunc_mul_v16i32_v16i8: 2114; SSE: # BB#0: 2115; SSE-NEXT: pshufd {{.*#+}} xmm8 = xmm0[1,1,3,3] 2116; SSE-NEXT: pmuludq %xmm4, %xmm0 2117; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2118; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2119; SSE-NEXT: pmuludq %xmm8, %xmm4 2120; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2121; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1] 2122; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm1[1,1,3,3] 2123; SSE-NEXT: pmuludq %xmm5, %xmm1 2124; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2125; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm5[1,1,3,3] 2126; SSE-NEXT: pmuludq %xmm4, %xmm5 2127; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3] 2128; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 2129; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[1,1,3,3] 2130; SSE-NEXT: pmuludq %xmm6, %xmm2 2131; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2132; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3] 2133; SSE-NEXT: pmuludq %xmm4, %xmm5 2134; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3] 2135; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 2136; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3] 2137; SSE-NEXT: pmuludq %xmm7, %xmm3 2138; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 2139; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm7[1,1,3,3] 2140; SSE-NEXT: pmuludq %xmm4, %xmm5 2141; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm5[0,2,2,3] 2142; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 2143; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2144; SSE-NEXT: pand %xmm4, %xmm3 2145; SSE-NEXT: pand %xmm4, %xmm2 2146; SSE-NEXT: packuswb %xmm3, %xmm2 2147; SSE-NEXT: pand %xmm4, %xmm1 2148; SSE-NEXT: pand %xmm4, %xmm0 2149; SSE-NEXT: packuswb %xmm1, %xmm0 2150; SSE-NEXT: packuswb %xmm2, %xmm0 2151; SSE-NEXT: retq 2152; 2153; AVX1-LABEL: trunc_mul_v16i32_v16i8: 2154; AVX1: # BB#0: 2155; AVX1-NEXT: vpmulld %xmm2, %xmm0, %xmm4 2156; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 2157; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2158; AVX1-NEXT: vpmulld %xmm2, %xmm0, %xmm0 2159; AVX1-NEXT: vpmulld %xmm3, %xmm1, %xmm2 2160; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 2161; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2162; AVX1-NEXT: vpmulld %xmm3, %xmm1, %xmm1 2163; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2164; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 2165; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 2166; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2167; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 2168; AVX1-NEXT: vpand %xmm3, %xmm4, %xmm2 2169; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 2170; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 2171; AVX1-NEXT: vzeroupper 2172; AVX1-NEXT: retq 2173; 2174; AVX2-LABEL: trunc_mul_v16i32_v16i8: 2175; AVX2: # BB#0: 2176; AVX2-NEXT: vpmulld %ymm2, %ymm0, %ymm0 2177; AVX2-NEXT: vpmulld %ymm3, %ymm1, %ymm1 2178; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2179; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 2180; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2181; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2182; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 2183; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 2184; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2185; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 2186; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2187; AVX2-NEXT: vzeroupper 2188; AVX2-NEXT: retq 2189; 2190; AVX512-LABEL: trunc_mul_v16i32_v16i8: 2191; AVX512: # BB#0: 2192; AVX512-NEXT: vpmulld %zmm1, %zmm0, %zmm0 2193; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2194; AVX512-NEXT: vzeroupper 2195; AVX512-NEXT: retq 2196 %1 = mul <16 x i32> %a0, %a1 2197 %2 = trunc <16 x i32> %1 to <16 x i8> 2198 ret <16 x i8> %2 2199} 2200 2201define <16 x i8> @trunc_mul_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 2202; SSE-LABEL: trunc_mul_v16i16_v16i8: 2203; SSE: # BB#0: 2204; SSE-NEXT: pmullw %xmm2, %xmm0 2205; SSE-NEXT: pmullw %xmm3, %xmm1 2206; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 2207; SSE-NEXT: pand %xmm2, %xmm1 2208; SSE-NEXT: pand %xmm2, %xmm0 2209; SSE-NEXT: packuswb %xmm1, %xmm0 2210; SSE-NEXT: retq 2211; 2212; AVX1-LABEL: trunc_mul_v16i16_v16i8: 2213; AVX1: # BB#0: 2214; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm2 2215; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2216; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2217; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm0 2218; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2219; AVX1-NEXT: vpshufb %xmm1, %xmm0, %xmm0 2220; AVX1-NEXT: vpshufb %xmm1, %xmm2, %xmm1 2221; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 2222; AVX1-NEXT: vzeroupper 2223; AVX1-NEXT: retq 2224; 2225; AVX2-LABEL: trunc_mul_v16i16_v16i8: 2226; AVX2: # BB#0: 2227; AVX2-NEXT: vpmullw %ymm1, %ymm0, %ymm0 2228; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 2229; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2230; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2231; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2232; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2233; AVX2-NEXT: vzeroupper 2234; AVX2-NEXT: retq 2235; 2236; AVX512F-LABEL: trunc_mul_v16i16_v16i8: 2237; AVX512F: # BB#0: 2238; AVX512F-NEXT: vpmullw %ymm1, %ymm0, %ymm0 2239; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 2240; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 2241; AVX512F-NEXT: vzeroupper 2242; AVX512F-NEXT: retq 2243; 2244; AVX512BW-LABEL: trunc_mul_v16i16_v16i8: 2245; AVX512BW: # BB#0: 2246; AVX512BW-NEXT: vpmullw %ymm1, %ymm0, %ymm0 2247; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 2248; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2249; AVX512BW-NEXT: vzeroupper 2250; AVX512BW-NEXT: retq 2251; 2252; AVX512DQ-LABEL: trunc_mul_v16i16_v16i8: 2253; AVX512DQ: # BB#0: 2254; AVX512DQ-NEXT: vpmullw %ymm1, %ymm0, %ymm0 2255; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 2256; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 2257; AVX512DQ-NEXT: vzeroupper 2258; AVX512DQ-NEXT: retq 2259 %1 = mul <16 x i16> %a0, %a1 2260 %2 = trunc <16 x i16> %1 to <16 x i8> 2261 ret <16 x i8> %2 2262} 2263 2264define <8 x i16> @trunc_mul_v8i32_v8i16_zext_8i8(<16 x i8> %a0, <8 x i32> %a1) { 2265; SSE-LABEL: trunc_mul_v8i32_v8i16_zext_8i8: 2266; SSE: # BB#0: 2267; SSE-NEXT: pxor %xmm3, %xmm3 2268; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2269; SSE-NEXT: pslld $16, %xmm2 2270; SSE-NEXT: psrad $16, %xmm2 2271; SSE-NEXT: pslld $16, %xmm1 2272; SSE-NEXT: psrad $16, %xmm1 2273; SSE-NEXT: packssdw %xmm2, %xmm1 2274; SSE-NEXT: pmullw %xmm1, %xmm0 2275; SSE-NEXT: retq 2276; 2277; AVX1-LABEL: trunc_mul_v8i32_v8i16_zext_8i8: 2278; AVX1: # BB#0: 2279; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 2280; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 2281; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2 2282; AVX1-NEXT: vpshufb %xmm3, %xmm1, %xmm1 2283; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2284; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 2285; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm0 2286; AVX1-NEXT: vzeroupper 2287; AVX1-NEXT: retq 2288; 2289; AVX2-LABEL: trunc_mul_v8i32_v8i16_zext_8i8: 2290; AVX2: # BB#0: 2291; AVX2-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 2292; AVX2-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2293; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2294; AVX2-NEXT: vpmullw %xmm1, %xmm0, %xmm0 2295; AVX2-NEXT: vzeroupper 2296; AVX2-NEXT: retq 2297; 2298; AVX512-LABEL: trunc_mul_v8i32_v8i16_zext_8i8: 2299; AVX512: # BB#0: 2300; AVX512-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def> 2301; AVX512-NEXT: vpmovdw %zmm1, %ymm1 2302; AVX512-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 2303; AVX512-NEXT: vpmullw %xmm1, %xmm0, %xmm0 2304; AVX512-NEXT: vzeroupper 2305; AVX512-NEXT: retq 2306 %1 = shufflevector <16 x i8> %a0, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 2307 %2 = zext <8 x i8> %1 to <8 x i32> 2308 %3 = mul <8 x i32> %2, %a1 2309 %4 = trunc <8 x i32> %3 to <8 x i16> 2310 ret <8 x i16> %4 2311} 2312 2313; 2314; mul to constant 2315; 2316 2317define <4 x i32> @trunc_mul_const_v4i64_v4i32(<4 x i64> %a0) nounwind { 2318; SSE-LABEL: trunc_mul_const_v4i64_v4i32: 2319; SSE: # BB#0: 2320; SSE-NEXT: movdqa {{.*#+}} xmm2 = [2,3] 2321; SSE-NEXT: movdqa %xmm1, %xmm3 2322; SSE-NEXT: pmuludq %xmm2, %xmm3 2323; SSE-NEXT: psrlq $32, %xmm1 2324; SSE-NEXT: pmuludq %xmm2, %xmm1 2325; SSE-NEXT: psllq $32, %xmm1 2326; SSE-NEXT: paddq %xmm3, %xmm1 2327; SSE-NEXT: movl $1, %eax 2328; SSE-NEXT: movq %rax, %xmm2 2329; SSE-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 2330; SSE-NEXT: movdqa %xmm0, %xmm3 2331; SSE-NEXT: pmuludq %xmm2, %xmm3 2332; SSE-NEXT: psrlq $32, %xmm0 2333; SSE-NEXT: pmuludq %xmm2, %xmm0 2334; SSE-NEXT: psllq $32, %xmm0 2335; SSE-NEXT: paddq %xmm3, %xmm0 2336; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 2337; SSE-NEXT: retq 2338; 2339; AVX1-LABEL: trunc_mul_const_v4i64_v4i32: 2340; AVX1: # BB#0: 2341; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 2342; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 2343; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 2344; AVX1-NEXT: vzeroupper 2345; AVX1-NEXT: retq 2346; 2347; AVX2-LABEL: trunc_mul_const_v4i64_v4i32: 2348; AVX2: # BB#0: 2349; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2350; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2351; AVX2-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 2352; AVX2-NEXT: vzeroupper 2353; AVX2-NEXT: retq 2354; 2355; AVX512-LABEL: trunc_mul_const_v4i64_v4i32: 2356; AVX512: # BB#0: 2357; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 2358; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2359; AVX512-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 2360; AVX512-NEXT: vzeroupper 2361; AVX512-NEXT: retq 2362 %1 = mul <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 2363 %2 = trunc <4 x i64> %1 to <4 x i32> 2364 ret <4 x i32> %2 2365} 2366 2367define <8 x i16> @trunc_mul_const_v8i64_v8i16(<8 x i64> %a0) nounwind { 2368; SSE-LABEL: trunc_mul_const_v8i64_v8i16: 2369; SSE: # BB#0: 2370; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 2371; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 2372; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2373; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 2374; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 2375; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2376; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 2377; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2378; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 2379; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 2380; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 2381; SSE-NEXT: pmullw {{.*}}(%rip), %xmm2 2382; SSE-NEXT: movdqa %xmm2, %xmm0 2383; SSE-NEXT: retq 2384; 2385; AVX1-LABEL: trunc_mul_const_v8i64_v8i16: 2386; AVX1: # BB#0: 2387; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 2388; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 2389; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 2390; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 2391; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 2392; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 2393; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 2394; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 2395; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 2396; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 2397; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 2398; AVX1-NEXT: vzeroupper 2399; AVX1-NEXT: retq 2400; 2401; AVX2-LABEL: trunc_mul_const_v8i64_v8i16: 2402; AVX2: # BB#0: 2403; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2404; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2405; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 2406; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2407; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 2408; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2409; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2410; AVX2-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 2411; AVX2-NEXT: vzeroupper 2412; AVX2-NEXT: retq 2413; 2414; AVX512-LABEL: trunc_mul_const_v8i64_v8i16: 2415; AVX512: # BB#0: 2416; AVX512-NEXT: vpmovqw %zmm0, %xmm0 2417; AVX512-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 2418; AVX512-NEXT: vzeroupper 2419; AVX512-NEXT: retq 2420 %1 = mul <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 2421 %2 = trunc <8 x i64> %1 to <8 x i16> 2422 ret <8 x i16> %2 2423} 2424 2425define <8 x i16> @trunc_mul_const_v8i32_v8i16(<8 x i32> %a0) nounwind { 2426; SSE-LABEL: trunc_mul_const_v8i32_v8i16: 2427; SSE: # BB#0: 2428; SSE-NEXT: pslld $16, %xmm1 2429; SSE-NEXT: psrad $16, %xmm1 2430; SSE-NEXT: pslld $16, %xmm0 2431; SSE-NEXT: psrad $16, %xmm0 2432; SSE-NEXT: packssdw %xmm1, %xmm0 2433; SSE-NEXT: pmullw {{.*}}(%rip), %xmm0 2434; SSE-NEXT: retq 2435; 2436; AVX1-LABEL: trunc_mul_const_v8i32_v8i16: 2437; AVX1: # BB#0: 2438; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 2439; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 2440; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2441; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2442; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2443; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 2444; AVX1-NEXT: vzeroupper 2445; AVX1-NEXT: retq 2446; 2447; AVX2-LABEL: trunc_mul_const_v8i32_v8i16: 2448; AVX2: # BB#0: 2449; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2450; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2451; AVX2-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 2452; AVX2-NEXT: vzeroupper 2453; AVX2-NEXT: retq 2454; 2455; AVX512-LABEL: trunc_mul_const_v8i32_v8i16: 2456; AVX512: # BB#0: 2457; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 2458; AVX512-NEXT: vpmovdw %zmm0, %ymm0 2459; AVX512-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 2460; AVX512-NEXT: vzeroupper 2461; AVX512-NEXT: retq 2462 %1 = mul <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 2463 %2 = trunc <8 x i32> %1 to <8 x i16> 2464 ret <8 x i16> %2 2465} 2466 2467define <16 x i8> @trunc_mul_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 2468; SSE-LABEL: trunc_mul_const_v16i64_v16i8: 2469; SSE: # BB#0: 2470; SSE-NEXT: movl $1, %eax 2471; SSE-NEXT: movq %rax, %xmm8 2472; SSE-NEXT: pslldq {{.*#+}} xmm8 = zero,zero,zero,zero,zero,zero,zero,zero,xmm8[0,1,2,3,4,5,6,7] 2473; SSE-NEXT: movdqa %xmm0, %xmm9 2474; SSE-NEXT: pmuludq %xmm8, %xmm9 2475; SSE-NEXT: psrlq $32, %xmm0 2476; SSE-NEXT: pmuludq %xmm8, %xmm0 2477; SSE-NEXT: psllq $32, %xmm0 2478; SSE-NEXT: paddq %xmm9, %xmm0 2479; SSE-NEXT: movdqa {{.*#+}} xmm8 = [2,3] 2480; SSE-NEXT: movdqa %xmm1, %xmm9 2481; SSE-NEXT: pmuludq %xmm8, %xmm9 2482; SSE-NEXT: psrlq $32, %xmm1 2483; SSE-NEXT: pmuludq %xmm8, %xmm1 2484; SSE-NEXT: psllq $32, %xmm1 2485; SSE-NEXT: paddq %xmm9, %xmm1 2486; SSE-NEXT: movdqa {{.*#+}} xmm8 = [4,5] 2487; SSE-NEXT: movdqa %xmm2, %xmm9 2488; SSE-NEXT: pmuludq %xmm8, %xmm9 2489; SSE-NEXT: psrlq $32, %xmm2 2490; SSE-NEXT: pmuludq %xmm8, %xmm2 2491; SSE-NEXT: psllq $32, %xmm2 2492; SSE-NEXT: paddq %xmm9, %xmm2 2493; SSE-NEXT: movdqa {{.*#+}} xmm8 = [6,7] 2494; SSE-NEXT: movdqa %xmm3, %xmm9 2495; SSE-NEXT: pmuludq %xmm8, %xmm9 2496; SSE-NEXT: psrlq $32, %xmm3 2497; SSE-NEXT: pmuludq %xmm8, %xmm3 2498; SSE-NEXT: psllq $32, %xmm3 2499; SSE-NEXT: paddq %xmm9, %xmm3 2500; SSE-NEXT: movdqa {{.*#+}} xmm8 = [8,9] 2501; SSE-NEXT: movdqa %xmm4, %xmm9 2502; SSE-NEXT: pmuludq %xmm8, %xmm9 2503; SSE-NEXT: psrlq $32, %xmm4 2504; SSE-NEXT: pmuludq %xmm8, %xmm4 2505; SSE-NEXT: psllq $32, %xmm4 2506; SSE-NEXT: paddq %xmm9, %xmm4 2507; SSE-NEXT: movdqa {{.*#+}} xmm8 = [10,11] 2508; SSE-NEXT: movdqa %xmm5, %xmm9 2509; SSE-NEXT: pmuludq %xmm8, %xmm9 2510; SSE-NEXT: psrlq $32, %xmm5 2511; SSE-NEXT: pmuludq %xmm8, %xmm5 2512; SSE-NEXT: psllq $32, %xmm5 2513; SSE-NEXT: paddq %xmm9, %xmm5 2514; SSE-NEXT: movdqa {{.*#+}} xmm8 = [12,13] 2515; SSE-NEXT: movdqa %xmm6, %xmm9 2516; SSE-NEXT: pmuludq %xmm8, %xmm9 2517; SSE-NEXT: psrlq $32, %xmm6 2518; SSE-NEXT: pmuludq %xmm8, %xmm6 2519; SSE-NEXT: psllq $32, %xmm6 2520; SSE-NEXT: paddq %xmm9, %xmm6 2521; SSE-NEXT: movdqa {{.*#+}} xmm8 = [14,15] 2522; SSE-NEXT: movdqa %xmm7, %xmm9 2523; SSE-NEXT: pmuludq %xmm8, %xmm9 2524; SSE-NEXT: psrlq $32, %xmm7 2525; SSE-NEXT: pmuludq %xmm8, %xmm7 2526; SSE-NEXT: psllq $32, %xmm7 2527; SSE-NEXT: paddq %xmm9, %xmm7 2528; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 2529; SSE-NEXT: pand %xmm8, %xmm7 2530; SSE-NEXT: pand %xmm8, %xmm6 2531; SSE-NEXT: packuswb %xmm7, %xmm6 2532; SSE-NEXT: pand %xmm8, %xmm5 2533; SSE-NEXT: pand %xmm8, %xmm4 2534; SSE-NEXT: packuswb %xmm5, %xmm4 2535; SSE-NEXT: packuswb %xmm6, %xmm4 2536; SSE-NEXT: pand %xmm8, %xmm3 2537; SSE-NEXT: pand %xmm8, %xmm2 2538; SSE-NEXT: packuswb %xmm3, %xmm2 2539; SSE-NEXT: pand %xmm8, %xmm1 2540; SSE-NEXT: pand %xmm8, %xmm0 2541; SSE-NEXT: packuswb %xmm1, %xmm0 2542; SSE-NEXT: packuswb %xmm2, %xmm0 2543; SSE-NEXT: packuswb %xmm4, %xmm0 2544; SSE-NEXT: retq 2545; 2546; AVX1-LABEL: trunc_mul_const_v16i64_v16i8: 2547; AVX1: # BB#0: 2548; AVX1-NEXT: movl $1, %eax 2549; AVX1-NEXT: vmovq %rax, %xmm4 2550; AVX1-NEXT: vpslldq {{.*#+}} xmm4 = zero,zero,zero,zero,zero,zero,zero,zero,xmm4[0,1,2,3,4,5,6,7] 2551; AVX1-NEXT: vpmuludq %xmm4, %xmm0, %xmm5 2552; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm6 2553; AVX1-NEXT: vpmuludq %xmm4, %xmm6, %xmm4 2554; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2555; AVX1-NEXT: vpaddq %xmm4, %xmm5, %xmm8 2556; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2557; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [2,3] 2558; AVX1-NEXT: vpmuludq %xmm5, %xmm0, %xmm6 2559; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 2560; AVX1-NEXT: vpmuludq %xmm5, %xmm0, %xmm0 2561; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2562; AVX1-NEXT: vpaddq %xmm0, %xmm6, %xmm9 2563; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [4,5] 2564; AVX1-NEXT: vpmuludq %xmm5, %xmm1, %xmm6 2565; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm7 2566; AVX1-NEXT: vpmuludq %xmm5, %xmm7, %xmm5 2567; AVX1-NEXT: vpsllq $32, %xmm5, %xmm5 2568; AVX1-NEXT: vpaddq %xmm5, %xmm6, %xmm5 2569; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2570; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [6,7] 2571; AVX1-NEXT: vpmuludq %xmm6, %xmm1, %xmm7 2572; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm1 2573; AVX1-NEXT: vpmuludq %xmm6, %xmm1, %xmm1 2574; AVX1-NEXT: vpsllq $32, %xmm1, %xmm1 2575; AVX1-NEXT: vpaddq %xmm1, %xmm7, %xmm1 2576; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [8,9] 2577; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm7 2578; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm4 2579; AVX1-NEXT: vpmuludq %xmm6, %xmm4, %xmm4 2580; AVX1-NEXT: vpsllq $32, %xmm4, %xmm4 2581; AVX1-NEXT: vpaddq %xmm4, %xmm7, %xmm4 2582; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 2583; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [10,11] 2584; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm7 2585; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm2 2586; AVX1-NEXT: vpmuludq %xmm6, %xmm2, %xmm2 2587; AVX1-NEXT: vpsllq $32, %xmm2, %xmm2 2588; AVX1-NEXT: vpaddq %xmm2, %xmm7, %xmm2 2589; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [12,13] 2590; AVX1-NEXT: vpmuludq %xmm6, %xmm3, %xmm7 2591; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm0 2592; AVX1-NEXT: vpmuludq %xmm6, %xmm0, %xmm0 2593; AVX1-NEXT: vpsllq $32, %xmm0, %xmm0 2594; AVX1-NEXT: vpaddq %xmm0, %xmm7, %xmm0 2595; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm3 2596; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [14,15] 2597; AVX1-NEXT: vpmuludq %xmm6, %xmm3, %xmm7 2598; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm3 2599; AVX1-NEXT: vpmuludq %xmm6, %xmm3, %xmm3 2600; AVX1-NEXT: vpsllq $32, %xmm3, %xmm3 2601; AVX1-NEXT: vpaddq %xmm3, %xmm7, %xmm3 2602; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 2603; AVX1-NEXT: vpand %xmm6, %xmm3, %xmm3 2604; AVX1-NEXT: vpand %xmm6, %xmm0, %xmm0 2605; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 2606; AVX1-NEXT: vpand %xmm6, %xmm2, %xmm2 2607; AVX1-NEXT: vpand %xmm6, %xmm4, %xmm3 2608; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 2609; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 2610; AVX1-NEXT: vpand %xmm6, %xmm1, %xmm1 2611; AVX1-NEXT: vpand %xmm6, %xmm5, %xmm2 2612; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2613; AVX1-NEXT: vpand %xmm6, %xmm9, %xmm2 2614; AVX1-NEXT: vpand %xmm6, %xmm8, %xmm3 2615; AVX1-NEXT: vpackuswb %xmm2, %xmm3, %xmm2 2616; AVX1-NEXT: vpackuswb %xmm1, %xmm2, %xmm1 2617; AVX1-NEXT: vpackuswb %xmm0, %xmm1, %xmm0 2618; AVX1-NEXT: vzeroupper 2619; AVX1-NEXT: retq 2620; 2621; AVX2-LABEL: trunc_mul_const_v16i64_v16i8: 2622; AVX2: # BB#0: 2623; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 2624; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 2625; AVX2-NEXT: vpmulld {{.*}}(%rip), %xmm2, %xmm2 2626; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 2627; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 2628; AVX2-NEXT: vpmulld {{.*}}(%rip), %xmm3, %xmm3 2629; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 2630; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2631; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 2632; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 2633; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2634; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 2635; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2636; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2637; AVX2-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 2638; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 2639; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2640; AVX2-NEXT: vpmulld {{.*}}(%rip), %xmm1, %xmm1 2641; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 2642; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 2643; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2644; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 2645; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2646; AVX2-NEXT: vzeroupper 2647; AVX2-NEXT: retq 2648; 2649; AVX512-LABEL: trunc_mul_const_v16i64_v16i8: 2650; AVX512: # BB#0: 2651; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2652; AVX512-NEXT: vpmulld {{.*}}(%rip), %ymm0, %ymm0 2653; AVX512-NEXT: vpmovqd %zmm1, %ymm1 2654; AVX512-NEXT: vpmulld {{.*}}(%rip), %ymm1, %ymm1 2655; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 2656; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2657; AVX512-NEXT: vzeroupper 2658; AVX512-NEXT: retq 2659 %1 = mul <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 2660 %2 = trunc <16 x i64> %1 to <16 x i8> 2661 ret <16 x i8> %2 2662} 2663 2664define <16 x i8> @trunc_mul_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 2665; SSE-LABEL: trunc_mul_const_v16i32_v16i8: 2666; SSE: # BB#0: 2667; SSE-NEXT: movdqa {{.*#+}} xmm4 = [0,1,2,3] 2668; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm0[1,1,3,3] 2669; SSE-NEXT: pmuludq %xmm4, %xmm0 2670; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2671; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2672; SSE-NEXT: pmuludq %xmm5, %xmm4 2673; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2674; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1] 2675; SSE-NEXT: movdqa {{.*#+}} xmm4 = [4,5,6,7] 2676; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[1,1,3,3] 2677; SSE-NEXT: pmuludq %xmm4, %xmm1 2678; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2679; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2680; SSE-NEXT: pmuludq %xmm5, %xmm4 2681; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2682; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 2683; SSE-NEXT: movdqa {{.*#+}} xmm4 = [8,9,10,11] 2684; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm2[1,1,3,3] 2685; SSE-NEXT: pmuludq %xmm4, %xmm2 2686; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2687; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2688; SSE-NEXT: pmuludq %xmm5, %xmm4 2689; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2690; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 2691; SSE-NEXT: movdqa {{.*#+}} xmm4 = [12,13,14,15] 2692; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[1,1,3,3] 2693; SSE-NEXT: pmuludq %xmm4, %xmm3 2694; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 2695; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[1,1,3,3] 2696; SSE-NEXT: pmuludq %xmm5, %xmm4 2697; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm4[0,2,2,3] 2698; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 2699; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2700; SSE-NEXT: pand %xmm4, %xmm3 2701; SSE-NEXT: pand %xmm4, %xmm2 2702; SSE-NEXT: packuswb %xmm3, %xmm2 2703; SSE-NEXT: pand %xmm4, %xmm1 2704; SSE-NEXT: pand %xmm4, %xmm0 2705; SSE-NEXT: packuswb %xmm1, %xmm0 2706; SSE-NEXT: packuswb %xmm2, %xmm0 2707; SSE-NEXT: retq 2708; 2709; AVX1-LABEL: trunc_mul_const_v16i32_v16i8: 2710; AVX1: # BB#0: 2711; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm2 2712; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2713; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 2714; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm1, %xmm3 2715; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 2716; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm1, %xmm1 2717; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 2718; AVX1-NEXT: vpand %xmm4, %xmm1, %xmm1 2719; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 2720; AVX1-NEXT: vpackuswb %xmm1, %xmm3, %xmm1 2721; AVX1-NEXT: vpand %xmm4, %xmm0, %xmm0 2722; AVX1-NEXT: vpand %xmm4, %xmm2, %xmm2 2723; AVX1-NEXT: vpackuswb %xmm0, %xmm2, %xmm0 2724; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 2725; AVX1-NEXT: vzeroupper 2726; AVX1-NEXT: retq 2727; 2728; AVX2-LABEL: trunc_mul_const_v16i32_v16i8: 2729; AVX2: # BB#0: 2730; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2731; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 2732; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2733; AVX2-NEXT: vpmullw {{.*}}(%rip), %xmm1, %xmm1 2734; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2735; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 2736; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 2737; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2738; AVX2-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 2739; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 2740; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2741; AVX2-NEXT: vzeroupper 2742; AVX2-NEXT: retq 2743; 2744; AVX512-LABEL: trunc_mul_const_v16i32_v16i8: 2745; AVX512: # BB#0: 2746; AVX512-NEXT: vpmulld {{.*}}(%rip), %zmm0, %zmm0 2747; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2748; AVX512-NEXT: vzeroupper 2749; AVX512-NEXT: retq 2750 %1 = mul <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 2751 %2 = trunc <16 x i32> %1 to <16 x i8> 2752 ret <16 x i8> %2 2753} 2754 2755define <16 x i8> @trunc_mul_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 2756; SSE-LABEL: trunc_mul_const_v16i16_v16i8: 2757; SSE: # BB#0: 2758; SSE-NEXT: pmullw {{.*}}(%rip), %xmm0 2759; SSE-NEXT: pmullw {{.*}}(%rip), %xmm1 2760; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 2761; SSE-NEXT: pand %xmm2, %xmm1 2762; SSE-NEXT: pand %xmm2, %xmm0 2763; SSE-NEXT: packuswb %xmm1, %xmm0 2764; SSE-NEXT: retq 2765; 2766; AVX1-LABEL: trunc_mul_const_v16i16_v16i8: 2767; AVX1: # BB#0: 2768; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm1 2769; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2770; AVX1-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 2771; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2772; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2773; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2774; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 2775; AVX1-NEXT: vzeroupper 2776; AVX1-NEXT: retq 2777; 2778; AVX2-LABEL: trunc_mul_const_v16i16_v16i8: 2779; AVX2: # BB#0: 2780; AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 2781; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 2782; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 2783; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2784; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2785; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2786; AVX2-NEXT: vzeroupper 2787; AVX2-NEXT: retq 2788; 2789; AVX512F-LABEL: trunc_mul_const_v16i16_v16i8: 2790; AVX512F: # BB#0: 2791; AVX512F-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 2792; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 2793; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 2794; AVX512F-NEXT: vzeroupper 2795; AVX512F-NEXT: retq 2796; 2797; AVX512BW-LABEL: trunc_mul_const_v16i16_v16i8: 2798; AVX512BW: # BB#0: 2799; AVX512BW-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 2800; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 2801; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2802; AVX512BW-NEXT: vzeroupper 2803; AVX512BW-NEXT: retq 2804; 2805; AVX512DQ-LABEL: trunc_mul_const_v16i16_v16i8: 2806; AVX512DQ: # BB#0: 2807; AVX512DQ-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 2808; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 2809; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 2810; AVX512DQ-NEXT: vzeroupper 2811; AVX512DQ-NEXT: retq 2812 %1 = mul <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 2813 %2 = trunc <16 x i16> %1 to <16 x i8> 2814 ret <16 x i8> %2 2815} 2816 2817; 2818; and 2819; 2820 2821define <4 x i32> @trunc_and_v4i64_v4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 2822; SSE-LABEL: trunc_and_v4i64_v4i32: 2823; SSE: # BB#0: 2824; SSE-NEXT: andps %xmm3, %xmm1 2825; SSE-NEXT: andps %xmm2, %xmm0 2826; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 2827; SSE-NEXT: retq 2828; 2829; AVX1-LABEL: trunc_and_v4i64_v4i32: 2830; AVX1: # BB#0: 2831; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 2832; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 2833; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 2834; AVX1-NEXT: vzeroupper 2835; AVX1-NEXT: retq 2836; 2837; AVX2-LABEL: trunc_and_v4i64_v4i32: 2838; AVX2: # BB#0: 2839; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 2840; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2841; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2842; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2843; AVX2-NEXT: vzeroupper 2844; AVX2-NEXT: retq 2845; 2846; AVX512-LABEL: trunc_and_v4i64_v4i32: 2847; AVX512: # BB#0: 2848; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0 2849; AVX512-NEXT: vpmovqd %zmm0, %ymm0 2850; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2851; AVX512-NEXT: vzeroupper 2852; AVX512-NEXT: retq 2853 %1 = and <4 x i64> %a0, %a1 2854 %2 = trunc <4 x i64> %1 to <4 x i32> 2855 ret <4 x i32> %2 2856} 2857 2858define <8 x i16> @trunc_and_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 2859; SSE-LABEL: trunc_and_v8i64_v8i16: 2860; SSE: # BB#0: 2861; SSE-NEXT: pand %xmm4, %xmm0 2862; SSE-NEXT: pand %xmm5, %xmm1 2863; SSE-NEXT: pand %xmm6, %xmm2 2864; SSE-NEXT: pand %xmm7, %xmm3 2865; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 2866; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 2867; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 2868; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 2869; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 2870; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 2871; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 2872; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2873; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 2874; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 2875; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 2876; SSE-NEXT: movapd %xmm2, %xmm0 2877; SSE-NEXT: retq 2878; 2879; AVX1-LABEL: trunc_and_v8i64_v8i16: 2880; AVX1: # BB#0: 2881; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 2882; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1 2883; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 2884; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 2885; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 2886; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 2887; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 2888; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 2889; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 2890; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 2891; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 2892; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 2893; AVX1-NEXT: vzeroupper 2894; AVX1-NEXT: retq 2895; 2896; AVX2-LABEL: trunc_and_v8i64_v8i16: 2897; AVX2: # BB#0: 2898; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm1 2899; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0 2900; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 2901; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2902; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 2903; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 2904; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 2905; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2906; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2907; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2908; AVX2-NEXT: vzeroupper 2909; AVX2-NEXT: retq 2910; 2911; AVX512-LABEL: trunc_and_v8i64_v8i16: 2912; AVX512: # BB#0: 2913; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm0 2914; AVX512-NEXT: vpmovqw %zmm0, %xmm0 2915; AVX512-NEXT: vzeroupper 2916; AVX512-NEXT: retq 2917 %1 = and <8 x i64> %a0, %a1 2918 %2 = trunc <8 x i64> %1 to <8 x i16> 2919 ret <8 x i16> %2 2920} 2921 2922define <8 x i16> @trunc_and_v8i32_v8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 2923; SSE-LABEL: trunc_and_v8i32_v8i16: 2924; SSE: # BB#0: 2925; SSE-NEXT: pand %xmm3, %xmm1 2926; SSE-NEXT: pslld $16, %xmm1 2927; SSE-NEXT: psrad $16, %xmm1 2928; SSE-NEXT: pand %xmm2, %xmm0 2929; SSE-NEXT: pslld $16, %xmm0 2930; SSE-NEXT: psrad $16, %xmm0 2931; SSE-NEXT: packssdw %xmm1, %xmm0 2932; SSE-NEXT: retq 2933; 2934; AVX1-LABEL: trunc_and_v8i32_v8i16: 2935; AVX1: # BB#0: 2936; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 2937; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 2938; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 2939; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 2940; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 2941; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2942; AVX1-NEXT: vzeroupper 2943; AVX1-NEXT: retq 2944; 2945; AVX2-LABEL: trunc_and_v8i32_v8i16: 2946; AVX2: # BB#0: 2947; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 2948; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 2949; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 2950; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2951; AVX2-NEXT: vzeroupper 2952; AVX2-NEXT: retq 2953; 2954; AVX512-LABEL: trunc_and_v8i32_v8i16: 2955; AVX512: # BB#0: 2956; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0 2957; AVX512-NEXT: vpmovdw %zmm0, %ymm0 2958; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2959; AVX512-NEXT: vzeroupper 2960; AVX512-NEXT: retq 2961 %1 = and <8 x i32> %a0, %a1 2962 %2 = trunc <8 x i32> %1 to <8 x i16> 2963 ret <8 x i16> %2 2964} 2965 2966define <16 x i8> @trunc_and_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 2967; SSE-LABEL: trunc_and_v16i64_v16i8: 2968; SSE: # BB#0: 2969; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm0 2970; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm1 2971; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm2 2972; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm3 2973; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm4 2974; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm5 2975; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm6 2976; SSE-NEXT: pand {{[0-9]+}}(%rsp), %xmm7 2977; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 2978; SSE-NEXT: pand %xmm8, %xmm7 2979; SSE-NEXT: pand %xmm8, %xmm6 2980; SSE-NEXT: packuswb %xmm7, %xmm6 2981; SSE-NEXT: pand %xmm8, %xmm5 2982; SSE-NEXT: pand %xmm8, %xmm4 2983; SSE-NEXT: packuswb %xmm5, %xmm4 2984; SSE-NEXT: packuswb %xmm6, %xmm4 2985; SSE-NEXT: pand %xmm8, %xmm3 2986; SSE-NEXT: pand %xmm8, %xmm2 2987; SSE-NEXT: packuswb %xmm3, %xmm2 2988; SSE-NEXT: pand %xmm8, %xmm1 2989; SSE-NEXT: pand %xmm8, %xmm0 2990; SSE-NEXT: packuswb %xmm1, %xmm0 2991; SSE-NEXT: packuswb %xmm2, %xmm0 2992; SSE-NEXT: packuswb %xmm4, %xmm0 2993; SSE-NEXT: retq 2994; 2995; AVX1-LABEL: trunc_and_v16i64_v16i8: 2996; AVX1: # BB#0: 2997; AVX1-NEXT: vandps %ymm4, %ymm0, %ymm0 2998; AVX1-NEXT: vandps %ymm5, %ymm1, %ymm1 2999; AVX1-NEXT: vandps %ymm6, %ymm2, %ymm2 3000; AVX1-NEXT: vandps %ymm7, %ymm3, %ymm3 3001; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 3002; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3003; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3004; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3005; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 3006; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 3007; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3008; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 3009; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 3010; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 3011; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 3012; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3013; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 3014; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 3015; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 3016; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3017; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 3018; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 3019; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3020; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3021; AVX1-NEXT: vzeroupper 3022; AVX1-NEXT: retq 3023; 3024; AVX2-LABEL: trunc_and_v16i64_v16i8: 3025; AVX2: # BB#0: 3026; AVX2-NEXT: vpand %ymm5, %ymm1, %ymm1 3027; AVX2-NEXT: vpand %ymm4, %ymm0, %ymm0 3028; AVX2-NEXT: vpand %ymm7, %ymm3, %ymm3 3029; AVX2-NEXT: vpand %ymm6, %ymm2, %ymm2 3030; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 3031; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3032; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 3033; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 3034; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 3035; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3036; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 3037; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3038; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3039; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 3040; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3041; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3042; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3043; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3044; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3045; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 3046; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3047; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 3048; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3049; AVX2-NEXT: vzeroupper 3050; AVX2-NEXT: retq 3051; 3052; AVX512-LABEL: trunc_and_v16i64_v16i8: 3053; AVX512: # BB#0: 3054; AVX512-NEXT: vpandq %zmm3, %zmm1, %zmm1 3055; AVX512-NEXT: vpandq %zmm2, %zmm0, %zmm0 3056; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3057; AVX512-NEXT: vpmovqd %zmm1, %ymm1 3058; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 3059; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3060; AVX512-NEXT: vzeroupper 3061; AVX512-NEXT: retq 3062 %1 = and <16 x i64> %a0, %a1 3063 %2 = trunc <16 x i64> %1 to <16 x i8> 3064 ret <16 x i8> %2 3065} 3066 3067define <16 x i8> @trunc_and_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 3068; SSE-LABEL: trunc_and_v16i32_v16i8: 3069; SSE: # BB#0: 3070; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3071; SSE-NEXT: pand %xmm8, %xmm7 3072; SSE-NEXT: pand %xmm3, %xmm7 3073; SSE-NEXT: pand %xmm8, %xmm6 3074; SSE-NEXT: pand %xmm2, %xmm6 3075; SSE-NEXT: packuswb %xmm7, %xmm6 3076; SSE-NEXT: pand %xmm8, %xmm5 3077; SSE-NEXT: pand %xmm1, %xmm5 3078; SSE-NEXT: pand %xmm8, %xmm4 3079; SSE-NEXT: pand %xmm4, %xmm0 3080; SSE-NEXT: packuswb %xmm5, %xmm0 3081; SSE-NEXT: packuswb %xmm6, %xmm0 3082; SSE-NEXT: retq 3083; 3084; AVX1-LABEL: trunc_and_v16i32_v16i8: 3085; AVX1: # BB#0: 3086; AVX1-NEXT: vandps %ymm2, %ymm0, %ymm0 3087; AVX1-NEXT: vandps %ymm3, %ymm1, %ymm1 3088; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3089; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3090; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3091; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 3092; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 3093; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3094; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3095; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 3096; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3097; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3098; AVX1-NEXT: vzeroupper 3099; AVX1-NEXT: retq 3100; 3101; AVX2-LABEL: trunc_and_v16i32_v16i8: 3102; AVX2: # BB#0: 3103; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0 3104; AVX2-NEXT: vpand %ymm3, %ymm1, %ymm1 3105; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3106; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 3107; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3108; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3109; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 3110; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 3111; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3112; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 3113; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3114; AVX2-NEXT: vzeroupper 3115; AVX2-NEXT: retq 3116; 3117; AVX512-LABEL: trunc_and_v16i32_v16i8: 3118; AVX512: # BB#0: 3119; AVX512-NEXT: vpandq %zmm1, %zmm0, %zmm0 3120; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3121; AVX512-NEXT: vzeroupper 3122; AVX512-NEXT: retq 3123 %1 = and <16 x i32> %a0, %a1 3124 %2 = trunc <16 x i32> %1 to <16 x i8> 3125 ret <16 x i8> %2 3126} 3127 3128define <16 x i8> @trunc_and_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 3129; SSE-LABEL: trunc_and_v16i16_v16i8: 3130; SSE: # BB#0: 3131; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255] 3132; SSE-NEXT: pand %xmm4, %xmm3 3133; SSE-NEXT: pand %xmm1, %xmm3 3134; SSE-NEXT: pand %xmm4, %xmm2 3135; SSE-NEXT: pand %xmm2, %xmm0 3136; SSE-NEXT: packuswb %xmm3, %xmm0 3137; SSE-NEXT: retq 3138; 3139; AVX1-LABEL: trunc_and_v16i16_v16i8: 3140; AVX1: # BB#0: 3141; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 3142; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3143; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3144; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3145; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3146; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3147; AVX1-NEXT: vzeroupper 3148; AVX1-NEXT: retq 3149; 3150; AVX2-LABEL: trunc_and_v16i16_v16i8: 3151; AVX2: # BB#0: 3152; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 3153; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 3154; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3155; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3156; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3157; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3158; AVX2-NEXT: vzeroupper 3159; AVX2-NEXT: retq 3160; 3161; AVX512F-LABEL: trunc_and_v16i16_v16i8: 3162; AVX512F: # BB#0: 3163; AVX512F-NEXT: vpand %ymm1, %ymm0, %ymm0 3164; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 3165; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 3166; AVX512F-NEXT: vzeroupper 3167; AVX512F-NEXT: retq 3168; 3169; AVX512BW-LABEL: trunc_and_v16i16_v16i8: 3170; AVX512BW: # BB#0: 3171; AVX512BW-NEXT: vpand %ymm1, %ymm0, %ymm0 3172; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 3173; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3174; AVX512BW-NEXT: vzeroupper 3175; AVX512BW-NEXT: retq 3176; 3177; AVX512DQ-LABEL: trunc_and_v16i16_v16i8: 3178; AVX512DQ: # BB#0: 3179; AVX512DQ-NEXT: vpand %ymm1, %ymm0, %ymm0 3180; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 3181; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 3182; AVX512DQ-NEXT: vzeroupper 3183; AVX512DQ-NEXT: retq 3184 %1 = and <16 x i16> %a0, %a1 3185 %2 = trunc <16 x i16> %1 to <16 x i8> 3186 ret <16 x i8> %2 3187} 3188 3189; 3190; and to constant 3191; 3192 3193define <4 x i32> @trunc_and_const_v4i64_v4i32(<4 x i64> %a0) nounwind { 3194; SSE-LABEL: trunc_and_const_v4i64_v4i32: 3195; SSE: # BB#0: 3196; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 3197; SSE-NEXT: andps {{.*}}(%rip), %xmm0 3198; SSE-NEXT: retq 3199; 3200; AVX1-LABEL: trunc_and_const_v4i64_v4i32: 3201; AVX1: # BB#0: 3202; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3203; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 3204; AVX1-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 3205; AVX1-NEXT: vzeroupper 3206; AVX1-NEXT: retq 3207; 3208; AVX2-LABEL: trunc_and_const_v4i64_v4i32: 3209; AVX2: # BB#0: 3210; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3211; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3212; AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3213; AVX2-NEXT: vzeroupper 3214; AVX2-NEXT: retq 3215; 3216; AVX512-LABEL: trunc_and_const_v4i64_v4i32: 3217; AVX512: # BB#0: 3218; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 3219; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3220; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3221; AVX512-NEXT: vzeroupper 3222; AVX512-NEXT: retq 3223 %1 = and <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 3224 %2 = trunc <4 x i64> %1 to <4 x i32> 3225 ret <4 x i32> %2 3226} 3227 3228define <8 x i16> @trunc_and_const_v8i64_v8i16(<8 x i64> %a0) nounwind { 3229; SSE-LABEL: trunc_and_const_v8i64_v8i16: 3230; SSE: # BB#0: 3231; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 3232; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 3233; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 3234; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 3235; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 3236; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 3237; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 3238; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3239; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 3240; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 3241; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 3242; SSE-NEXT: andpd {{.*}}(%rip), %xmm2 3243; SSE-NEXT: movapd %xmm2, %xmm0 3244; SSE-NEXT: retq 3245; 3246; AVX1-LABEL: trunc_and_const_v8i64_v8i16: 3247; AVX1: # BB#0: 3248; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3249; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 3250; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3251; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 3252; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 3253; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3254; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3255; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 3256; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 3257; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 3258; AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3259; AVX1-NEXT: vzeroupper 3260; AVX1-NEXT: retq 3261; 3262; AVX2-LABEL: trunc_and_const_v8i64_v8i16: 3263; AVX2: # BB#0: 3264; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3265; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3266; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3267; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3268; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3269; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3270; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3271; AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3272; AVX2-NEXT: vzeroupper 3273; AVX2-NEXT: retq 3274; 3275; AVX512-LABEL: trunc_and_const_v8i64_v8i16: 3276; AVX512: # BB#0: 3277; AVX512-NEXT: vpmovqw %zmm0, %xmm0 3278; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3279; AVX512-NEXT: vzeroupper 3280; AVX512-NEXT: retq 3281 %1 = and <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 3282 %2 = trunc <8 x i64> %1 to <8 x i16> 3283 ret <8 x i16> %2 3284} 3285 3286define <8 x i16> @trunc_and_const_v8i32_v8i16(<8 x i32> %a0) nounwind { 3287; SSE-LABEL: trunc_and_const_v8i32_v8i16: 3288; SSE: # BB#0: 3289; SSE-NEXT: pslld $16, %xmm1 3290; SSE-NEXT: psrad $16, %xmm1 3291; SSE-NEXT: pslld $16, %xmm0 3292; SSE-NEXT: psrad $16, %xmm0 3293; SSE-NEXT: packssdw %xmm1, %xmm0 3294; SSE-NEXT: pand {{.*}}(%rip), %xmm0 3295; SSE-NEXT: retq 3296; 3297; AVX1-LABEL: trunc_and_const_v8i32_v8i16: 3298; AVX1: # BB#0: 3299; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3300; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 3301; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3302; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3303; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3304; AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3305; AVX1-NEXT: vzeroupper 3306; AVX1-NEXT: retq 3307; 3308; AVX2-LABEL: trunc_and_const_v8i32_v8i16: 3309; AVX2: # BB#0: 3310; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3311; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3312; AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3313; AVX2-NEXT: vzeroupper 3314; AVX2-NEXT: retq 3315; 3316; AVX512-LABEL: trunc_and_const_v8i32_v8i16: 3317; AVX512: # BB#0: 3318; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 3319; AVX512-NEXT: vpmovdw %zmm0, %ymm0 3320; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3321; AVX512-NEXT: vzeroupper 3322; AVX512-NEXT: retq 3323 %1 = and <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 3324 %2 = trunc <8 x i32> %1 to <8 x i16> 3325 ret <8 x i16> %2 3326} 3327 3328define <16 x i8> @trunc_and_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 3329; SSE-LABEL: trunc_and_const_v16i64_v16i8: 3330; SSE: # BB#0: 3331; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3332; SSE-NEXT: pand %xmm8, %xmm7 3333; SSE-NEXT: pand %xmm8, %xmm6 3334; SSE-NEXT: packuswb %xmm7, %xmm6 3335; SSE-NEXT: pand %xmm8, %xmm5 3336; SSE-NEXT: pand %xmm8, %xmm4 3337; SSE-NEXT: packuswb %xmm5, %xmm4 3338; SSE-NEXT: packuswb %xmm6, %xmm4 3339; SSE-NEXT: pand %xmm8, %xmm3 3340; SSE-NEXT: pand %xmm8, %xmm2 3341; SSE-NEXT: packuswb %xmm3, %xmm2 3342; SSE-NEXT: pand %xmm8, %xmm1 3343; SSE-NEXT: pand %xmm8, %xmm0 3344; SSE-NEXT: packuswb %xmm1, %xmm0 3345; SSE-NEXT: packuswb %xmm2, %xmm0 3346; SSE-NEXT: packuswb %xmm4, %xmm0 3347; SSE-NEXT: pand {{.*}}(%rip), %xmm0 3348; SSE-NEXT: retq 3349; 3350; AVX1-LABEL: trunc_and_const_v16i64_v16i8: 3351; AVX1: # BB#0: 3352; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 3353; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3354; AVX1-NEXT: vpand %xmm5, %xmm4, %xmm4 3355; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 3356; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 3357; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 3358; AVX1-NEXT: vpand %xmm5, %xmm4, %xmm4 3359; AVX1-NEXT: vpand %xmm5, %xmm2, %xmm2 3360; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 3361; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 3362; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 3363; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 3364; AVX1-NEXT: vpand %xmm5, %xmm1, %xmm1 3365; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 3366; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 3367; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 3368; AVX1-NEXT: vpand %xmm5, %xmm0, %xmm0 3369; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 3370; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3371; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3372; AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3373; AVX1-NEXT: vzeroupper 3374; AVX1-NEXT: retq 3375; 3376; AVX2-LABEL: trunc_and_const_v16i64_v16i8: 3377; AVX2: # BB#0: 3378; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 3379; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3380; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 3381; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 3382; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 3383; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3384; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 3385; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3386; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3387; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 3388; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3389; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3390; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3391; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3392; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3393; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 3394; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3395; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 3396; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3397; AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3398; AVX2-NEXT: vzeroupper 3399; AVX2-NEXT: retq 3400; 3401; AVX512-LABEL: trunc_and_const_v16i64_v16i8: 3402; AVX512: # BB#0: 3403; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3404; AVX512-NEXT: vpmovqd %zmm1, %ymm1 3405; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 3406; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3407; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3408; AVX512-NEXT: vzeroupper 3409; AVX512-NEXT: retq 3410 %1 = and <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 3411 %2 = trunc <16 x i64> %1 to <16 x i8> 3412 ret <16 x i8> %2 3413} 3414 3415define <16 x i8> @trunc_and_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 3416; SSE-LABEL: trunc_and_const_v16i32_v16i8: 3417; SSE: # BB#0: 3418; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3419; SSE-NEXT: pand %xmm4, %xmm3 3420; SSE-NEXT: pand %xmm4, %xmm2 3421; SSE-NEXT: packuswb %xmm3, %xmm2 3422; SSE-NEXT: pand %xmm4, %xmm1 3423; SSE-NEXT: pand %xmm4, %xmm0 3424; SSE-NEXT: packuswb %xmm1, %xmm0 3425; SSE-NEXT: packuswb %xmm2, %xmm0 3426; SSE-NEXT: pand {{.*}}(%rip), %xmm0 3427; SSE-NEXT: retq 3428; 3429; AVX1-LABEL: trunc_and_const_v16i32_v16i8: 3430; AVX1: # BB#0: 3431; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3432; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3433; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 3434; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 3435; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 3436; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3437; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 3438; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 3439; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3440; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3441; AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3442; AVX1-NEXT: vzeroupper 3443; AVX1-NEXT: retq 3444; 3445; AVX2-LABEL: trunc_and_const_v16i32_v16i8: 3446; AVX2: # BB#0: 3447; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3448; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 3449; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3450; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3451; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 3452; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 3453; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3454; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 3455; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3456; AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3457; AVX2-NEXT: vzeroupper 3458; AVX2-NEXT: retq 3459; 3460; AVX512-LABEL: trunc_and_const_v16i32_v16i8: 3461; AVX512: # BB#0: 3462; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3463; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3464; AVX512-NEXT: vzeroupper 3465; AVX512-NEXT: retq 3466 %1 = and <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 3467 %2 = trunc <16 x i32> %1 to <16 x i8> 3468 ret <16 x i8> %2 3469} 3470 3471define <16 x i8> @trunc_and_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 3472; SSE-LABEL: trunc_and_const_v16i16_v16i8: 3473; SSE: # BB#0: 3474; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 3475; SSE-NEXT: pand %xmm2, %xmm1 3476; SSE-NEXT: pand %xmm2, %xmm0 3477; SSE-NEXT: packuswb %xmm1, %xmm0 3478; SSE-NEXT: pand {{.*}}(%rip), %xmm0 3479; SSE-NEXT: retq 3480; 3481; AVX1-LABEL: trunc_and_const_v16i16_v16i8: 3482; AVX1: # BB#0: 3483; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3484; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3485; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3486; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3487; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3488; AVX1-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3489; AVX1-NEXT: vzeroupper 3490; AVX1-NEXT: retq 3491; 3492; AVX2-LABEL: trunc_and_const_v16i16_v16i8: 3493; AVX2: # BB#0: 3494; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 3495; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3496; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3497; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3498; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3499; AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3500; AVX2-NEXT: vzeroupper 3501; AVX2-NEXT: retq 3502; 3503; AVX512F-LABEL: trunc_and_const_v16i16_v16i8: 3504; AVX512F: # BB#0: 3505; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 3506; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 3507; AVX512F-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3508; AVX512F-NEXT: vzeroupper 3509; AVX512F-NEXT: retq 3510; 3511; AVX512BW-LABEL: trunc_and_const_v16i16_v16i8: 3512; AVX512BW: # BB#0: 3513; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 3514; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 3515; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3516; AVX512BW-NEXT: vzeroupper 3517; AVX512BW-NEXT: retq 3518; 3519; AVX512DQ-LABEL: trunc_and_const_v16i16_v16i8: 3520; AVX512DQ: # BB#0: 3521; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 3522; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 3523; AVX512DQ-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 3524; AVX512DQ-NEXT: vzeroupper 3525; AVX512DQ-NEXT: retq 3526 %1 = and <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 3527 %2 = trunc <16 x i16> %1 to <16 x i8> 3528 ret <16 x i8> %2 3529} 3530 3531; 3532; xor 3533; 3534 3535define <4 x i32> @trunc_xor_v4i64_v4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 3536; SSE-LABEL: trunc_xor_v4i64_v4i32: 3537; SSE: # BB#0: 3538; SSE-NEXT: xorps %xmm3, %xmm1 3539; SSE-NEXT: xorps %xmm2, %xmm0 3540; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 3541; SSE-NEXT: retq 3542; 3543; AVX1-LABEL: trunc_xor_v4i64_v4i32: 3544; AVX1: # BB#0: 3545; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 3546; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3547; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 3548; AVX1-NEXT: vzeroupper 3549; AVX1-NEXT: retq 3550; 3551; AVX2-LABEL: trunc_xor_v4i64_v4i32: 3552; AVX2: # BB#0: 3553; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 3554; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3555; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3556; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3557; AVX2-NEXT: vzeroupper 3558; AVX2-NEXT: retq 3559; 3560; AVX512-LABEL: trunc_xor_v4i64_v4i32: 3561; AVX512: # BB#0: 3562; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0 3563; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3564; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3565; AVX512-NEXT: vzeroupper 3566; AVX512-NEXT: retq 3567 %1 = xor <4 x i64> %a0, %a1 3568 %2 = trunc <4 x i64> %1 to <4 x i32> 3569 ret <4 x i32> %2 3570} 3571 3572define <8 x i16> @trunc_xor_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 3573; SSE-LABEL: trunc_xor_v8i64_v8i16: 3574; SSE: # BB#0: 3575; SSE-NEXT: pxor %xmm4, %xmm0 3576; SSE-NEXT: pxor %xmm5, %xmm1 3577; SSE-NEXT: pxor %xmm6, %xmm2 3578; SSE-NEXT: pxor %xmm7, %xmm3 3579; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 3580; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 3581; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 3582; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 3583; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 3584; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 3585; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 3586; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3587; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 3588; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 3589; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 3590; SSE-NEXT: movapd %xmm2, %xmm0 3591; SSE-NEXT: retq 3592; 3593; AVX1-LABEL: trunc_xor_v8i64_v8i16: 3594; AVX1: # BB#0: 3595; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0 3596; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1 3597; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3598; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 3599; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3600; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 3601; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 3602; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3603; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3604; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 3605; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 3606; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 3607; AVX1-NEXT: vzeroupper 3608; AVX1-NEXT: retq 3609; 3610; AVX2-LABEL: trunc_xor_v8i64_v8i16: 3611; AVX2: # BB#0: 3612; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1 3613; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0 3614; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3615; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3616; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3617; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3618; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3619; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3620; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3621; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3622; AVX2-NEXT: vzeroupper 3623; AVX2-NEXT: retq 3624; 3625; AVX512-LABEL: trunc_xor_v8i64_v8i16: 3626; AVX512: # BB#0: 3627; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0 3628; AVX512-NEXT: vpmovqw %zmm0, %xmm0 3629; AVX512-NEXT: vzeroupper 3630; AVX512-NEXT: retq 3631 %1 = xor <8 x i64> %a0, %a1 3632 %2 = trunc <8 x i64> %1 to <8 x i16> 3633 ret <8 x i16> %2 3634} 3635 3636define <8 x i16> @trunc_xor_v8i32_v8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 3637; SSE-LABEL: trunc_xor_v8i32_v8i16: 3638; SSE: # BB#0: 3639; SSE-NEXT: pxor %xmm3, %xmm1 3640; SSE-NEXT: pslld $16, %xmm1 3641; SSE-NEXT: psrad $16, %xmm1 3642; SSE-NEXT: pxor %xmm2, %xmm0 3643; SSE-NEXT: pslld $16, %xmm0 3644; SSE-NEXT: psrad $16, %xmm0 3645; SSE-NEXT: packssdw %xmm1, %xmm0 3646; SSE-NEXT: retq 3647; 3648; AVX1-LABEL: trunc_xor_v8i32_v8i16: 3649; AVX1: # BB#0: 3650; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 3651; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3652; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 3653; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3654; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3655; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3656; AVX1-NEXT: vzeroupper 3657; AVX1-NEXT: retq 3658; 3659; AVX2-LABEL: trunc_xor_v8i32_v8i16: 3660; AVX2: # BB#0: 3661; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 3662; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3663; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3664; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3665; AVX2-NEXT: vzeroupper 3666; AVX2-NEXT: retq 3667; 3668; AVX512-LABEL: trunc_xor_v8i32_v8i16: 3669; AVX512: # BB#0: 3670; AVX512-NEXT: vpxor %ymm1, %ymm0, %ymm0 3671; AVX512-NEXT: vpmovdw %zmm0, %ymm0 3672; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3673; AVX512-NEXT: vzeroupper 3674; AVX512-NEXT: retq 3675 %1 = xor <8 x i32> %a0, %a1 3676 %2 = trunc <8 x i32> %1 to <8 x i16> 3677 ret <8 x i16> %2 3678} 3679 3680define <16 x i8> @trunc_xor_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 3681; SSE-LABEL: trunc_xor_v16i64_v16i8: 3682; SSE: # BB#0: 3683; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm0 3684; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm1 3685; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm2 3686; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm3 3687; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm4 3688; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm5 3689; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm6 3690; SSE-NEXT: pxor {{[0-9]+}}(%rsp), %xmm7 3691; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3692; SSE-NEXT: pand %xmm8, %xmm7 3693; SSE-NEXT: pand %xmm8, %xmm6 3694; SSE-NEXT: packuswb %xmm7, %xmm6 3695; SSE-NEXT: pand %xmm8, %xmm5 3696; SSE-NEXT: pand %xmm8, %xmm4 3697; SSE-NEXT: packuswb %xmm5, %xmm4 3698; SSE-NEXT: packuswb %xmm6, %xmm4 3699; SSE-NEXT: pand %xmm8, %xmm3 3700; SSE-NEXT: pand %xmm8, %xmm2 3701; SSE-NEXT: packuswb %xmm3, %xmm2 3702; SSE-NEXT: pand %xmm8, %xmm1 3703; SSE-NEXT: pand %xmm8, %xmm0 3704; SSE-NEXT: packuswb %xmm1, %xmm0 3705; SSE-NEXT: packuswb %xmm2, %xmm0 3706; SSE-NEXT: packuswb %xmm4, %xmm0 3707; SSE-NEXT: retq 3708; 3709; AVX1-LABEL: trunc_xor_v16i64_v16i8: 3710; AVX1: # BB#0: 3711; AVX1-NEXT: vxorps %ymm4, %ymm0, %ymm0 3712; AVX1-NEXT: vxorps %ymm5, %ymm1, %ymm1 3713; AVX1-NEXT: vxorps %ymm6, %ymm2, %ymm2 3714; AVX1-NEXT: vxorps %ymm7, %ymm3, %ymm3 3715; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 3716; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 3717; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3718; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3719; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 3720; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 3721; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 3722; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 3723; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 3724; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 3725; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 3726; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3727; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 3728; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 3729; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 3730; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 3731; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 3732; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 3733; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3734; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3735; AVX1-NEXT: vzeroupper 3736; AVX1-NEXT: retq 3737; 3738; AVX2-LABEL: trunc_xor_v16i64_v16i8: 3739; AVX2: # BB#0: 3740; AVX2-NEXT: vpxor %ymm5, %ymm1, %ymm1 3741; AVX2-NEXT: vpxor %ymm4, %ymm0, %ymm0 3742; AVX2-NEXT: vpxor %ymm7, %ymm3, %ymm3 3743; AVX2-NEXT: vpxor %ymm6, %ymm2, %ymm2 3744; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 3745; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3746; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 3747; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 3748; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 3749; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3750; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 3751; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 3752; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3753; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 3754; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3755; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3756; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3757; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3758; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3759; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 3760; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3761; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 3762; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3763; AVX2-NEXT: vzeroupper 3764; AVX2-NEXT: retq 3765; 3766; AVX512-LABEL: trunc_xor_v16i64_v16i8: 3767; AVX512: # BB#0: 3768; AVX512-NEXT: vpxorq %zmm3, %zmm1, %zmm1 3769; AVX512-NEXT: vpxorq %zmm2, %zmm0, %zmm0 3770; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3771; AVX512-NEXT: vpmovqd %zmm1, %ymm1 3772; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 3773; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3774; AVX512-NEXT: vzeroupper 3775; AVX512-NEXT: retq 3776 %1 = xor <16 x i64> %a0, %a1 3777 %2 = trunc <16 x i64> %1 to <16 x i8> 3778 ret <16 x i8> %2 3779} 3780 3781define <16 x i8> @trunc_xor_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 3782; SSE-LABEL: trunc_xor_v16i32_v16i8: 3783; SSE: # BB#0: 3784; SSE-NEXT: pxor %xmm4, %xmm0 3785; SSE-NEXT: pxor %xmm5, %xmm1 3786; SSE-NEXT: pxor %xmm6, %xmm2 3787; SSE-NEXT: pxor %xmm7, %xmm3 3788; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3789; SSE-NEXT: pand %xmm4, %xmm3 3790; SSE-NEXT: pand %xmm4, %xmm2 3791; SSE-NEXT: packuswb %xmm3, %xmm2 3792; SSE-NEXT: pand %xmm4, %xmm1 3793; SSE-NEXT: pand %xmm4, %xmm0 3794; SSE-NEXT: packuswb %xmm1, %xmm0 3795; SSE-NEXT: packuswb %xmm2, %xmm0 3796; SSE-NEXT: retq 3797; 3798; AVX1-LABEL: trunc_xor_v16i32_v16i8: 3799; AVX1: # BB#0: 3800; AVX1-NEXT: vxorps %ymm2, %ymm0, %ymm0 3801; AVX1-NEXT: vxorps %ymm3, %ymm1, %ymm1 3802; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3803; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 3804; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3805; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 3806; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 3807; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3808; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 3809; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 3810; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 3811; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 3812; AVX1-NEXT: vzeroupper 3813; AVX1-NEXT: retq 3814; 3815; AVX2-LABEL: trunc_xor_v16i32_v16i8: 3816; AVX2: # BB#0: 3817; AVX2-NEXT: vpxor %ymm2, %ymm0, %ymm0 3818; AVX2-NEXT: vpxor %ymm3, %ymm1, %ymm1 3819; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3820; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 3821; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3822; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3823; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 3824; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 3825; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3826; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 3827; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3828; AVX2-NEXT: vzeroupper 3829; AVX2-NEXT: retq 3830; 3831; AVX512-LABEL: trunc_xor_v16i32_v16i8: 3832; AVX512: # BB#0: 3833; AVX512-NEXT: vpxorq %zmm1, %zmm0, %zmm0 3834; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3835; AVX512-NEXT: vzeroupper 3836; AVX512-NEXT: retq 3837 %1 = xor <16 x i32> %a0, %a1 3838 %2 = trunc <16 x i32> %1 to <16 x i8> 3839 ret <16 x i8> %2 3840} 3841 3842define <16 x i8> @trunc_xor_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 3843; SSE-LABEL: trunc_xor_v16i16_v16i8: 3844; SSE: # BB#0: 3845; SSE-NEXT: pxor %xmm2, %xmm0 3846; SSE-NEXT: pxor %xmm3, %xmm1 3847; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 3848; SSE-NEXT: pand %xmm2, %xmm1 3849; SSE-NEXT: pand %xmm2, %xmm0 3850; SSE-NEXT: packuswb %xmm1, %xmm0 3851; SSE-NEXT: retq 3852; 3853; AVX1-LABEL: trunc_xor_v16i16_v16i8: 3854; AVX1: # BB#0: 3855; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 3856; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3857; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3858; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3859; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3860; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3861; AVX1-NEXT: vzeroupper 3862; AVX1-NEXT: retq 3863; 3864; AVX2-LABEL: trunc_xor_v16i16_v16i8: 3865; AVX2: # BB#0: 3866; AVX2-NEXT: vpxor %ymm1, %ymm0, %ymm0 3867; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 3868; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 3869; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 3870; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 3871; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3872; AVX2-NEXT: vzeroupper 3873; AVX2-NEXT: retq 3874; 3875; AVX512F-LABEL: trunc_xor_v16i16_v16i8: 3876; AVX512F: # BB#0: 3877; AVX512F-NEXT: vpxor %ymm1, %ymm0, %ymm0 3878; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 3879; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 3880; AVX512F-NEXT: vzeroupper 3881; AVX512F-NEXT: retq 3882; 3883; AVX512BW-LABEL: trunc_xor_v16i16_v16i8: 3884; AVX512BW: # BB#0: 3885; AVX512BW-NEXT: vpxor %ymm1, %ymm0, %ymm0 3886; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 3887; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3888; AVX512BW-NEXT: vzeroupper 3889; AVX512BW-NEXT: retq 3890; 3891; AVX512DQ-LABEL: trunc_xor_v16i16_v16i8: 3892; AVX512DQ: # BB#0: 3893; AVX512DQ-NEXT: vpxor %ymm1, %ymm0, %ymm0 3894; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 3895; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 3896; AVX512DQ-NEXT: vzeroupper 3897; AVX512DQ-NEXT: retq 3898 %1 = xor <16 x i16> %a0, %a1 3899 %2 = trunc <16 x i16> %1 to <16 x i8> 3900 ret <16 x i8> %2 3901} 3902 3903; 3904; xor to constant 3905; 3906 3907define <4 x i32> @trunc_xor_const_v4i64_v4i32(<4 x i64> %a0) nounwind { 3908; SSE-LABEL: trunc_xor_const_v4i64_v4i32: 3909; SSE: # BB#0: 3910; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 3911; SSE-NEXT: xorps {{.*}}(%rip), %xmm0 3912; SSE-NEXT: retq 3913; 3914; AVX1-LABEL: trunc_xor_const_v4i64_v4i32: 3915; AVX1: # BB#0: 3916; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3917; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 3918; AVX1-NEXT: vxorps {{.*}}(%rip), %xmm0, %xmm0 3919; AVX1-NEXT: vzeroupper 3920; AVX1-NEXT: retq 3921; 3922; AVX2-LABEL: trunc_xor_const_v4i64_v4i32: 3923; AVX2: # BB#0: 3924; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3925; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3926; AVX2-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 3927; AVX2-NEXT: vzeroupper 3928; AVX2-NEXT: retq 3929; 3930; AVX512-LABEL: trunc_xor_const_v4i64_v4i32: 3931; AVX512: # BB#0: 3932; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 3933; AVX512-NEXT: vpmovqd %zmm0, %ymm0 3934; AVX512-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 3935; AVX512-NEXT: vzeroupper 3936; AVX512-NEXT: retq 3937 %1 = xor <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 3938 %2 = trunc <4 x i64> %1 to <4 x i32> 3939 ret <4 x i32> %2 3940} 3941 3942define <8 x i16> @trunc_xor_const_v8i64_v8i16(<8 x i64> %a0) nounwind { 3943; SSE-LABEL: trunc_xor_const_v8i64_v8i16: 3944; SSE: # BB#0: 3945; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 3946; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 3947; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 3948; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 3949; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 3950; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 3951; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 3952; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3953; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 3954; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 3955; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 3956; SSE-NEXT: xorpd {{.*}}(%rip), %xmm2 3957; SSE-NEXT: movapd %xmm2, %xmm0 3958; SSE-NEXT: retq 3959; 3960; AVX1-LABEL: trunc_xor_const_v8i64_v8i16: 3961; AVX1: # BB#0: 3962; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 3963; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 3964; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3965; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 3966; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 3967; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 3968; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 3969; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 3970; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 3971; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 3972; AVX1-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 3973; AVX1-NEXT: vzeroupper 3974; AVX1-NEXT: retq 3975; 3976; AVX2-LABEL: trunc_xor_const_v8i64_v8i16: 3977; AVX2: # BB#0: 3978; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 3979; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3980; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 3981; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 3982; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 3983; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 3984; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 3985; AVX2-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 3986; AVX2-NEXT: vzeroupper 3987; AVX2-NEXT: retq 3988; 3989; AVX512-LABEL: trunc_xor_const_v8i64_v8i16: 3990; AVX512: # BB#0: 3991; AVX512-NEXT: vpmovqw %zmm0, %xmm0 3992; AVX512-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 3993; AVX512-NEXT: vzeroupper 3994; AVX512-NEXT: retq 3995 %1 = xor <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 3996 %2 = trunc <8 x i64> %1 to <8 x i16> 3997 ret <8 x i16> %2 3998} 3999 4000define <8 x i16> @trunc_xor_const_v8i32_v8i16(<8 x i32> %a0) nounwind { 4001; SSE-LABEL: trunc_xor_const_v8i32_v8i16: 4002; SSE: # BB#0: 4003; SSE-NEXT: pslld $16, %xmm1 4004; SSE-NEXT: psrad $16, %xmm1 4005; SSE-NEXT: pslld $16, %xmm0 4006; SSE-NEXT: psrad $16, %xmm0 4007; SSE-NEXT: packssdw %xmm1, %xmm0 4008; SSE-NEXT: pxor {{.*}}(%rip), %xmm0 4009; SSE-NEXT: retq 4010; 4011; AVX1-LABEL: trunc_xor_const_v8i32_v8i16: 4012; AVX1: # BB#0: 4013; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4014; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 4015; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4016; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4017; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4018; AVX1-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4019; AVX1-NEXT: vzeroupper 4020; AVX1-NEXT: retq 4021; 4022; AVX2-LABEL: trunc_xor_const_v8i32_v8i16: 4023; AVX2: # BB#0: 4024; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4025; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4026; AVX2-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4027; AVX2-NEXT: vzeroupper 4028; AVX2-NEXT: retq 4029; 4030; AVX512-LABEL: trunc_xor_const_v8i32_v8i16: 4031; AVX512: # BB#0: 4032; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 4033; AVX512-NEXT: vpmovdw %zmm0, %ymm0 4034; AVX512-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4035; AVX512-NEXT: vzeroupper 4036; AVX512-NEXT: retq 4037 %1 = xor <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 4038 %2 = trunc <8 x i32> %1 to <8 x i16> 4039 ret <8 x i16> %2 4040} 4041 4042define <16 x i8> @trunc_xor_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 4043; SSE-LABEL: trunc_xor_const_v16i64_v16i8: 4044; SSE: # BB#0: 4045; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4046; SSE-NEXT: pand %xmm8, %xmm7 4047; SSE-NEXT: pand %xmm8, %xmm6 4048; SSE-NEXT: packuswb %xmm7, %xmm6 4049; SSE-NEXT: pand %xmm8, %xmm5 4050; SSE-NEXT: pand %xmm8, %xmm4 4051; SSE-NEXT: packuswb %xmm5, %xmm4 4052; SSE-NEXT: packuswb %xmm6, %xmm4 4053; SSE-NEXT: pand %xmm8, %xmm3 4054; SSE-NEXT: pand %xmm8, %xmm2 4055; SSE-NEXT: packuswb %xmm3, %xmm2 4056; SSE-NEXT: pand %xmm8, %xmm1 4057; SSE-NEXT: pand %xmm8, %xmm0 4058; SSE-NEXT: packuswb %xmm1, %xmm0 4059; SSE-NEXT: packuswb %xmm2, %xmm0 4060; SSE-NEXT: packuswb %xmm4, %xmm0 4061; SSE-NEXT: pxor {{.*}}(%rip), %xmm0 4062; SSE-NEXT: retq 4063; 4064; AVX1-LABEL: trunc_xor_const_v16i64_v16i8: 4065; AVX1: # BB#0: 4066; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 4067; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4068; AVX1-NEXT: vpand %xmm5, %xmm4, %xmm4 4069; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 4070; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 4071; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 4072; AVX1-NEXT: vpand %xmm5, %xmm4, %xmm4 4073; AVX1-NEXT: vpand %xmm5, %xmm2, %xmm2 4074; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 4075; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 4076; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 4077; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 4078; AVX1-NEXT: vpand %xmm5, %xmm1, %xmm1 4079; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 4080; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 4081; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 4082; AVX1-NEXT: vpand %xmm5, %xmm0, %xmm0 4083; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 4084; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4085; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4086; AVX1-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4087; AVX1-NEXT: vzeroupper 4088; AVX1-NEXT: retq 4089; 4090; AVX2-LABEL: trunc_xor_const_v16i64_v16i8: 4091; AVX2: # BB#0: 4092; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 4093; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4094; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 4095; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 4096; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 4097; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4098; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 4099; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4100; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4101; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 4102; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4103; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4104; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 4105; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4106; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4107; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 4108; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4109; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 4110; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 4111; AVX2-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4112; AVX2-NEXT: vzeroupper 4113; AVX2-NEXT: retq 4114; 4115; AVX512-LABEL: trunc_xor_const_v16i64_v16i8: 4116; AVX512: # BB#0: 4117; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4118; AVX512-NEXT: vpmovqd %zmm1, %ymm1 4119; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 4120; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4121; AVX512-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4122; AVX512-NEXT: vzeroupper 4123; AVX512-NEXT: retq 4124 %1 = xor <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 4125 %2 = trunc <16 x i64> %1 to <16 x i8> 4126 ret <16 x i8> %2 4127} 4128 4129define <16 x i8> @trunc_xor_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 4130; SSE-LABEL: trunc_xor_const_v16i32_v16i8: 4131; SSE: # BB#0: 4132; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4133; SSE-NEXT: pand %xmm4, %xmm3 4134; SSE-NEXT: pand %xmm4, %xmm2 4135; SSE-NEXT: packuswb %xmm3, %xmm2 4136; SSE-NEXT: pand %xmm4, %xmm1 4137; SSE-NEXT: pand %xmm4, %xmm0 4138; SSE-NEXT: packuswb %xmm1, %xmm0 4139; SSE-NEXT: packuswb %xmm2, %xmm0 4140; SSE-NEXT: pxor {{.*}}(%rip), %xmm0 4141; SSE-NEXT: retq 4142; 4143; AVX1-LABEL: trunc_xor_const_v16i32_v16i8: 4144; AVX1: # BB#0: 4145; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4146; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4147; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 4148; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 4149; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 4150; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4151; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 4152; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 4153; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4154; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4155; AVX1-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4156; AVX1-NEXT: vzeroupper 4157; AVX1-NEXT: retq 4158; 4159; AVX2-LABEL: trunc_xor_const_v16i32_v16i8: 4160; AVX2: # BB#0: 4161; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4162; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 4163; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4164; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4165; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 4166; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 4167; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4168; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 4169; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4170; AVX2-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4171; AVX2-NEXT: vzeroupper 4172; AVX2-NEXT: retq 4173; 4174; AVX512-LABEL: trunc_xor_const_v16i32_v16i8: 4175; AVX512: # BB#0: 4176; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4177; AVX512-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4178; AVX512-NEXT: vzeroupper 4179; AVX512-NEXT: retq 4180 %1 = xor <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 4181 %2 = trunc <16 x i32> %1 to <16 x i8> 4182 ret <16 x i8> %2 4183} 4184 4185define <16 x i8> @trunc_xor_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 4186; SSE-LABEL: trunc_xor_const_v16i16_v16i8: 4187; SSE: # BB#0: 4188; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 4189; SSE-NEXT: pand %xmm2, %xmm1 4190; SSE-NEXT: pand %xmm2, %xmm0 4191; SSE-NEXT: packuswb %xmm1, %xmm0 4192; SSE-NEXT: pxor {{.*}}(%rip), %xmm0 4193; SSE-NEXT: retq 4194; 4195; AVX1-LABEL: trunc_xor_const_v16i16_v16i8: 4196; AVX1: # BB#0: 4197; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4198; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4199; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4200; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4201; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4202; AVX1-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4203; AVX1-NEXT: vzeroupper 4204; AVX1-NEXT: retq 4205; 4206; AVX2-LABEL: trunc_xor_const_v16i16_v16i8: 4207; AVX2: # BB#0: 4208; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 4209; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4210; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4211; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4212; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4213; AVX2-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4214; AVX2-NEXT: vzeroupper 4215; AVX2-NEXT: retq 4216; 4217; AVX512F-LABEL: trunc_xor_const_v16i16_v16i8: 4218; AVX512F: # BB#0: 4219; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 4220; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4221; AVX512F-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4222; AVX512F-NEXT: vzeroupper 4223; AVX512F-NEXT: retq 4224; 4225; AVX512BW-LABEL: trunc_xor_const_v16i16_v16i8: 4226; AVX512BW: # BB#0: 4227; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 4228; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 4229; AVX512BW-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4230; AVX512BW-NEXT: vzeroupper 4231; AVX512BW-NEXT: retq 4232; 4233; AVX512DQ-LABEL: trunc_xor_const_v16i16_v16i8: 4234; AVX512DQ: # BB#0: 4235; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 4236; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 4237; AVX512DQ-NEXT: vpxor {{.*}}(%rip), %xmm0, %xmm0 4238; AVX512DQ-NEXT: vzeroupper 4239; AVX512DQ-NEXT: retq 4240 %1 = xor <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 4241 %2 = trunc <16 x i16> %1 to <16 x i8> 4242 ret <16 x i8> %2 4243} 4244 4245; 4246; or 4247; 4248 4249define <4 x i32> @trunc_or_v4i64_v4i32(<4 x i64> %a0, <4 x i64> %a1) nounwind { 4250; SSE-LABEL: trunc_or_v4i64_v4i32: 4251; SSE: # BB#0: 4252; SSE-NEXT: orps %xmm3, %xmm1 4253; SSE-NEXT: orps %xmm2, %xmm0 4254; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 4255; SSE-NEXT: retq 4256; 4257; AVX1-LABEL: trunc_or_v4i64_v4i32: 4258; AVX1: # BB#0: 4259; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 4260; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4261; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 4262; AVX1-NEXT: vzeroupper 4263; AVX1-NEXT: retq 4264; 4265; AVX2-LABEL: trunc_or_v4i64_v4i32: 4266; AVX2: # BB#0: 4267; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 4268; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4269; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4270; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4271; AVX2-NEXT: vzeroupper 4272; AVX2-NEXT: retq 4273; 4274; AVX512-LABEL: trunc_or_v4i64_v4i32: 4275; AVX512: # BB#0: 4276; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0 4277; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4278; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4279; AVX512-NEXT: vzeroupper 4280; AVX512-NEXT: retq 4281 %1 = or <4 x i64> %a0, %a1 4282 %2 = trunc <4 x i64> %1 to <4 x i32> 4283 ret <4 x i32> %2 4284} 4285 4286define <8 x i16> @trunc_or_v8i64_v8i16(<8 x i64> %a0, <8 x i64> %a1) nounwind { 4287; SSE-LABEL: trunc_or_v8i64_v8i16: 4288; SSE: # BB#0: 4289; SSE-NEXT: por %xmm4, %xmm0 4290; SSE-NEXT: por %xmm5, %xmm1 4291; SSE-NEXT: por %xmm6, %xmm2 4292; SSE-NEXT: por %xmm7, %xmm3 4293; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 4294; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 4295; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 4296; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 4297; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 4298; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4299; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 4300; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4301; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 4302; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4303; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 4304; SSE-NEXT: movapd %xmm2, %xmm0 4305; SSE-NEXT: retq 4306; 4307; AVX1-LABEL: trunc_or_v8i64_v8i16: 4308; AVX1: # BB#0: 4309; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 4310; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1 4311; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4312; AVX1-NEXT: vxorps %xmm3, %xmm3, %xmm3 4313; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4314; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 4315; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 4316; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4317; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4318; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 4319; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 4320; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 4321; AVX1-NEXT: vzeroupper 4322; AVX1-NEXT: retq 4323; 4324; AVX2-LABEL: trunc_or_v8i64_v8i16: 4325; AVX2: # BB#0: 4326; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm1 4327; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm0 4328; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4329; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4330; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 4331; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4332; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4333; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4334; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4335; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4336; AVX2-NEXT: vzeroupper 4337; AVX2-NEXT: retq 4338; 4339; AVX512-LABEL: trunc_or_v8i64_v8i16: 4340; AVX512: # BB#0: 4341; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0 4342; AVX512-NEXT: vpmovqw %zmm0, %xmm0 4343; AVX512-NEXT: vzeroupper 4344; AVX512-NEXT: retq 4345 %1 = or <8 x i64> %a0, %a1 4346 %2 = trunc <8 x i64> %1 to <8 x i16> 4347 ret <8 x i16> %2 4348} 4349 4350define <8 x i16> @trunc_or_v8i32_v8i16(<8 x i32> %a0, <8 x i32> %a1) nounwind { 4351; SSE-LABEL: trunc_or_v8i32_v8i16: 4352; SSE: # BB#0: 4353; SSE-NEXT: por %xmm3, %xmm1 4354; SSE-NEXT: pslld $16, %xmm1 4355; SSE-NEXT: psrad $16, %xmm1 4356; SSE-NEXT: por %xmm2, %xmm0 4357; SSE-NEXT: pslld $16, %xmm0 4358; SSE-NEXT: psrad $16, %xmm0 4359; SSE-NEXT: packssdw %xmm1, %xmm0 4360; SSE-NEXT: retq 4361; 4362; AVX1-LABEL: trunc_or_v8i32_v8i16: 4363; AVX1: # BB#0: 4364; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 4365; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4366; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 4367; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4368; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4369; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4370; AVX1-NEXT: vzeroupper 4371; AVX1-NEXT: retq 4372; 4373; AVX2-LABEL: trunc_or_v8i32_v8i16: 4374; AVX2: # BB#0: 4375; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 4376; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4377; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4378; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4379; AVX2-NEXT: vzeroupper 4380; AVX2-NEXT: retq 4381; 4382; AVX512-LABEL: trunc_or_v8i32_v8i16: 4383; AVX512: # BB#0: 4384; AVX512-NEXT: vpor %ymm1, %ymm0, %ymm0 4385; AVX512-NEXT: vpmovdw %zmm0, %ymm0 4386; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4387; AVX512-NEXT: vzeroupper 4388; AVX512-NEXT: retq 4389 %1 = or <8 x i32> %a0, %a1 4390 %2 = trunc <8 x i32> %1 to <8 x i16> 4391 ret <8 x i16> %2 4392} 4393 4394define <16 x i8> @trunc_or_v16i64_v16i8(<16 x i64> %a0, <16 x i64> %a1) nounwind { 4395; SSE-LABEL: trunc_or_v16i64_v16i8: 4396; SSE: # BB#0: 4397; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm0 4398; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm1 4399; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm2 4400; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm3 4401; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm4 4402; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm5 4403; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm6 4404; SSE-NEXT: por {{[0-9]+}}(%rsp), %xmm7 4405; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4406; SSE-NEXT: pand %xmm8, %xmm7 4407; SSE-NEXT: pand %xmm8, %xmm6 4408; SSE-NEXT: packuswb %xmm7, %xmm6 4409; SSE-NEXT: pand %xmm8, %xmm5 4410; SSE-NEXT: pand %xmm8, %xmm4 4411; SSE-NEXT: packuswb %xmm5, %xmm4 4412; SSE-NEXT: packuswb %xmm6, %xmm4 4413; SSE-NEXT: pand %xmm8, %xmm3 4414; SSE-NEXT: pand %xmm8, %xmm2 4415; SSE-NEXT: packuswb %xmm3, %xmm2 4416; SSE-NEXT: pand %xmm8, %xmm1 4417; SSE-NEXT: pand %xmm8, %xmm0 4418; SSE-NEXT: packuswb %xmm1, %xmm0 4419; SSE-NEXT: packuswb %xmm2, %xmm0 4420; SSE-NEXT: packuswb %xmm4, %xmm0 4421; SSE-NEXT: retq 4422; 4423; AVX1-LABEL: trunc_or_v16i64_v16i8: 4424; AVX1: # BB#0: 4425; AVX1-NEXT: vorps %ymm4, %ymm0, %ymm0 4426; AVX1-NEXT: vorps %ymm5, %ymm1, %ymm1 4427; AVX1-NEXT: vorps %ymm6, %ymm2, %ymm2 4428; AVX1-NEXT: vorps %ymm7, %ymm3, %ymm3 4429; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 4430; AVX1-NEXT: vmovaps {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4431; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4432; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4433; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 4434; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 4435; AVX1-NEXT: vandps %xmm5, %xmm4, %xmm4 4436; AVX1-NEXT: vandps %xmm5, %xmm2, %xmm2 4437; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 4438; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 4439; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 4440; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4441; AVX1-NEXT: vandps %xmm5, %xmm1, %xmm1 4442; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 4443; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 4444; AVX1-NEXT: vandps %xmm5, %xmm3, %xmm3 4445; AVX1-NEXT: vandps %xmm5, %xmm0, %xmm0 4446; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 4447; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4448; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4449; AVX1-NEXT: vzeroupper 4450; AVX1-NEXT: retq 4451; 4452; AVX2-LABEL: trunc_or_v16i64_v16i8: 4453; AVX2: # BB#0: 4454; AVX2-NEXT: vpor %ymm5, %ymm1, %ymm1 4455; AVX2-NEXT: vpor %ymm4, %ymm0, %ymm0 4456; AVX2-NEXT: vpor %ymm7, %ymm3, %ymm3 4457; AVX2-NEXT: vpor %ymm6, %ymm2, %ymm2 4458; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 4459; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4460; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 4461; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 4462; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 4463; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4464; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 4465; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4466; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4467; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 4468; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4469; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4470; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 4471; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4472; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4473; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 4474; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4475; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 4476; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 4477; AVX2-NEXT: vzeroupper 4478; AVX2-NEXT: retq 4479; 4480; AVX512-LABEL: trunc_or_v16i64_v16i8: 4481; AVX512: # BB#0: 4482; AVX512-NEXT: vporq %zmm3, %zmm1, %zmm1 4483; AVX512-NEXT: vporq %zmm2, %zmm0, %zmm0 4484; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4485; AVX512-NEXT: vpmovqd %zmm1, %ymm1 4486; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 4487; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4488; AVX512-NEXT: vzeroupper 4489; AVX512-NEXT: retq 4490 %1 = or <16 x i64> %a0, %a1 4491 %2 = trunc <16 x i64> %1 to <16 x i8> 4492 ret <16 x i8> %2 4493} 4494 4495define <16 x i8> @trunc_or_v16i32_v16i8(<16 x i32> %a0, <16 x i32> %a1) nounwind { 4496; SSE-LABEL: trunc_or_v16i32_v16i8: 4497; SSE: # BB#0: 4498; SSE-NEXT: por %xmm4, %xmm0 4499; SSE-NEXT: por %xmm5, %xmm1 4500; SSE-NEXT: por %xmm6, %xmm2 4501; SSE-NEXT: por %xmm7, %xmm3 4502; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4503; SSE-NEXT: pand %xmm4, %xmm3 4504; SSE-NEXT: pand %xmm4, %xmm2 4505; SSE-NEXT: packuswb %xmm3, %xmm2 4506; SSE-NEXT: pand %xmm4, %xmm1 4507; SSE-NEXT: pand %xmm4, %xmm0 4508; SSE-NEXT: packuswb %xmm1, %xmm0 4509; SSE-NEXT: packuswb %xmm2, %xmm0 4510; SSE-NEXT: retq 4511; 4512; AVX1-LABEL: trunc_or_v16i32_v16i8: 4513; AVX1: # BB#0: 4514; AVX1-NEXT: vorps %ymm2, %ymm0, %ymm0 4515; AVX1-NEXT: vorps %ymm3, %ymm1, %ymm1 4516; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4517; AVX1-NEXT: vmovaps {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4518; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 4519; AVX1-NEXT: vandps %xmm3, %xmm1, %xmm1 4520; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 4521; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4522; AVX1-NEXT: vandps %xmm3, %xmm2, %xmm2 4523; AVX1-NEXT: vandps %xmm3, %xmm0, %xmm0 4524; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4525; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4526; AVX1-NEXT: vzeroupper 4527; AVX1-NEXT: retq 4528; 4529; AVX2-LABEL: trunc_or_v16i32_v16i8: 4530; AVX2: # BB#0: 4531; AVX2-NEXT: vpor %ymm2, %ymm0, %ymm0 4532; AVX2-NEXT: vpor %ymm3, %ymm1, %ymm1 4533; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4534; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 4535; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4536; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4537; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 4538; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 4539; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4540; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 4541; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4542; AVX2-NEXT: vzeroupper 4543; AVX2-NEXT: retq 4544; 4545; AVX512-LABEL: trunc_or_v16i32_v16i8: 4546; AVX512: # BB#0: 4547; AVX512-NEXT: vporq %zmm1, %zmm0, %zmm0 4548; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4549; AVX512-NEXT: vzeroupper 4550; AVX512-NEXT: retq 4551 %1 = or <16 x i32> %a0, %a1 4552 %2 = trunc <16 x i32> %1 to <16 x i8> 4553 ret <16 x i8> %2 4554} 4555 4556define <16 x i8> @trunc_or_v16i16_v16i8(<16 x i16> %a0, <16 x i16> %a1) nounwind { 4557; SSE-LABEL: trunc_or_v16i16_v16i8: 4558; SSE: # BB#0: 4559; SSE-NEXT: por %xmm2, %xmm0 4560; SSE-NEXT: por %xmm3, %xmm1 4561; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 4562; SSE-NEXT: pand %xmm2, %xmm1 4563; SSE-NEXT: pand %xmm2, %xmm0 4564; SSE-NEXT: packuswb %xmm1, %xmm0 4565; SSE-NEXT: retq 4566; 4567; AVX1-LABEL: trunc_or_v16i16_v16i8: 4568; AVX1: # BB#0: 4569; AVX1-NEXT: vorps %ymm1, %ymm0, %ymm0 4570; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4571; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4572; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4573; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4574; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4575; AVX1-NEXT: vzeroupper 4576; AVX1-NEXT: retq 4577; 4578; AVX2-LABEL: trunc_or_v16i16_v16i8: 4579; AVX2: # BB#0: 4580; AVX2-NEXT: vpor %ymm1, %ymm0, %ymm0 4581; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 4582; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4583; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4584; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4585; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4586; AVX2-NEXT: vzeroupper 4587; AVX2-NEXT: retq 4588; 4589; AVX512F-LABEL: trunc_or_v16i16_v16i8: 4590; AVX512F: # BB#0: 4591; AVX512F-NEXT: vpor %ymm1, %ymm0, %ymm0 4592; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 4593; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4594; AVX512F-NEXT: vzeroupper 4595; AVX512F-NEXT: retq 4596; 4597; AVX512BW-LABEL: trunc_or_v16i16_v16i8: 4598; AVX512BW: # BB#0: 4599; AVX512BW-NEXT: vpor %ymm1, %ymm0, %ymm0 4600; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 4601; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4602; AVX512BW-NEXT: vzeroupper 4603; AVX512BW-NEXT: retq 4604; 4605; AVX512DQ-LABEL: trunc_or_v16i16_v16i8: 4606; AVX512DQ: # BB#0: 4607; AVX512DQ-NEXT: vpor %ymm1, %ymm0, %ymm0 4608; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 4609; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 4610; AVX512DQ-NEXT: vzeroupper 4611; AVX512DQ-NEXT: retq 4612 %1 = or <16 x i16> %a0, %a1 4613 %2 = trunc <16 x i16> %1 to <16 x i8> 4614 ret <16 x i8> %2 4615} 4616 4617; 4618; or to constant 4619; 4620 4621define <4 x i32> @trunc_or_const_v4i64_v4i32(<4 x i64> %a0) nounwind { 4622; SSE-LABEL: trunc_or_const_v4i64_v4i32: 4623; SSE: # BB#0: 4624; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 4625; SSE-NEXT: orps {{.*}}(%rip), %xmm0 4626; SSE-NEXT: retq 4627; 4628; AVX1-LABEL: trunc_or_const_v4i64_v4i32: 4629; AVX1: # BB#0: 4630; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4631; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 4632; AVX1-NEXT: vorps {{.*}}(%rip), %xmm0, %xmm0 4633; AVX1-NEXT: vzeroupper 4634; AVX1-NEXT: retq 4635; 4636; AVX2-LABEL: trunc_or_const_v4i64_v4i32: 4637; AVX2: # BB#0: 4638; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4639; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4640; AVX2-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4641; AVX2-NEXT: vzeroupper 4642; AVX2-NEXT: retq 4643; 4644; AVX512-LABEL: trunc_or_const_v4i64_v4i32: 4645; AVX512: # BB#0: 4646; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 4647; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4648; AVX512-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4649; AVX512-NEXT: vzeroupper 4650; AVX512-NEXT: retq 4651 %1 = or <4 x i64> %a0, <i64 0, i64 1, i64 2, i64 3> 4652 %2 = trunc <4 x i64> %1 to <4 x i32> 4653 ret <4 x i32> %2 4654} 4655 4656define <8 x i16> @trunc_or_const_v8i64_v8i16(<8 x i64> %a0) nounwind { 4657; SSE-LABEL: trunc_or_const_v8i64_v8i16: 4658; SSE: # BB#0: 4659; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 4660; SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] 4661; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] 4662; SSE-NEXT: pshuflw {{.*#+}} xmm2 = xmm2[0,1,0,2,4,5,6,7] 4663; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 4664; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 4665; SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 4666; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 4667; SSE-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] 4668; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4669; SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 4670; SSE-NEXT: orpd {{.*}}(%rip), %xmm2 4671; SSE-NEXT: movapd %xmm2, %xmm0 4672; SSE-NEXT: retq 4673; 4674; AVX1-LABEL: trunc_or_const_v8i64_v8i16: 4675; AVX1: # BB#0: 4676; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4677; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 4678; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4679; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm3[1,2,3],xmm1[4],xmm3[5,6,7] 4680; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 4681; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4682; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] 4683; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm3[1,2,3],xmm0[4],xmm3[5,6,7] 4684; AVX1-NEXT: vpackusdw %xmm2, %xmm0, %xmm0 4685; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 4686; AVX1-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4687; AVX1-NEXT: vzeroupper 4688; AVX1-NEXT: retq 4689; 4690; AVX2-LABEL: trunc_or_const_v8i64_v8i16: 4691; AVX2: # BB#0: 4692; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4693; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4694; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 4695; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4696; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4697; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4698; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4699; AVX2-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4700; AVX2-NEXT: vzeroupper 4701; AVX2-NEXT: retq 4702; 4703; AVX512-LABEL: trunc_or_const_v8i64_v8i16: 4704; AVX512: # BB#0: 4705; AVX512-NEXT: vpmovqw %zmm0, %xmm0 4706; AVX512-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4707; AVX512-NEXT: vzeroupper 4708; AVX512-NEXT: retq 4709 %1 = or <8 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7> 4710 %2 = trunc <8 x i64> %1 to <8 x i16> 4711 ret <8 x i16> %2 4712} 4713 4714define <8 x i16> @trunc_or_const_v8i32_v8i16(<8 x i32> %a0) nounwind { 4715; SSE-LABEL: trunc_or_const_v8i32_v8i16: 4716; SSE: # BB#0: 4717; SSE-NEXT: pslld $16, %xmm1 4718; SSE-NEXT: psrad $16, %xmm1 4719; SSE-NEXT: pslld $16, %xmm0 4720; SSE-NEXT: psrad $16, %xmm0 4721; SSE-NEXT: packssdw %xmm1, %xmm0 4722; SSE-NEXT: por {{.*}}(%rip), %xmm0 4723; SSE-NEXT: retq 4724; 4725; AVX1-LABEL: trunc_or_const_v8i32_v8i16: 4726; AVX1: # BB#0: 4727; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4728; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 4729; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4730; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4731; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4732; AVX1-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4733; AVX1-NEXT: vzeroupper 4734; AVX1-NEXT: retq 4735; 4736; AVX2-LABEL: trunc_or_const_v8i32_v8i16: 4737; AVX2: # BB#0: 4738; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4739; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4740; AVX2-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4741; AVX2-NEXT: vzeroupper 4742; AVX2-NEXT: retq 4743; 4744; AVX512-LABEL: trunc_or_const_v8i32_v8i16: 4745; AVX512: # BB#0: 4746; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 4747; AVX512-NEXT: vpmovdw %zmm0, %ymm0 4748; AVX512-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4749; AVX512-NEXT: vzeroupper 4750; AVX512-NEXT: retq 4751 %1 = or <8 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 4752 %2 = trunc <8 x i32> %1 to <8 x i16> 4753 ret <8 x i16> %2 4754} 4755 4756define <16 x i8> @trunc_or_const_v16i64_v16i8(<16 x i64> %a0) nounwind { 4757; SSE-LABEL: trunc_or_const_v16i64_v16i8: 4758; SSE: # BB#0: 4759; SSE-NEXT: movdqa {{.*#+}} xmm8 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4760; SSE-NEXT: pand %xmm8, %xmm7 4761; SSE-NEXT: pand %xmm8, %xmm6 4762; SSE-NEXT: packuswb %xmm7, %xmm6 4763; SSE-NEXT: pand %xmm8, %xmm5 4764; SSE-NEXT: pand %xmm8, %xmm4 4765; SSE-NEXT: packuswb %xmm5, %xmm4 4766; SSE-NEXT: packuswb %xmm6, %xmm4 4767; SSE-NEXT: pand %xmm8, %xmm3 4768; SSE-NEXT: pand %xmm8, %xmm2 4769; SSE-NEXT: packuswb %xmm3, %xmm2 4770; SSE-NEXT: pand %xmm8, %xmm1 4771; SSE-NEXT: pand %xmm8, %xmm0 4772; SSE-NEXT: packuswb %xmm1, %xmm0 4773; SSE-NEXT: packuswb %xmm2, %xmm0 4774; SSE-NEXT: packuswb %xmm4, %xmm0 4775; SSE-NEXT: por {{.*}}(%rip), %xmm0 4776; SSE-NEXT: retq 4777; 4778; AVX1-LABEL: trunc_or_const_v16i64_v16i8: 4779; AVX1: # BB#0: 4780; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 4781; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] 4782; AVX1-NEXT: vpand %xmm5, %xmm4, %xmm4 4783; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 4784; AVX1-NEXT: vpackuswb %xmm4, %xmm3, %xmm3 4785; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm4 4786; AVX1-NEXT: vpand %xmm5, %xmm4, %xmm4 4787; AVX1-NEXT: vpand %xmm5, %xmm2, %xmm2 4788; AVX1-NEXT: vpackuswb %xmm4, %xmm2, %xmm2 4789; AVX1-NEXT: vpackuswb %xmm3, %xmm2, %xmm2 4790; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 4791; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 4792; AVX1-NEXT: vpand %xmm5, %xmm1, %xmm1 4793; AVX1-NEXT: vpackuswb %xmm3, %xmm1, %xmm1 4794; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 4795; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 4796; AVX1-NEXT: vpand %xmm5, %xmm0, %xmm0 4797; AVX1-NEXT: vpackuswb %xmm3, %xmm0, %xmm0 4798; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4799; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4800; AVX1-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4801; AVX1-NEXT: vzeroupper 4802; AVX1-NEXT: retq 4803; 4804; AVX2-LABEL: trunc_or_const_v16i64_v16i8: 4805; AVX2: # BB#0: 4806; AVX2-NEXT: vpshufd {{.*#+}} ymm2 = ymm2[0,2,2,3,4,6,6,7] 4807; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4808; AVX2-NEXT: vpshufd {{.*#+}} ymm3 = ymm3[0,2,2,3,4,6,6,7] 4809; AVX2-NEXT: vpermq {{.*#+}} ymm3 = ymm3[0,2,2,3] 4810; AVX2-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 4811; AVX2-NEXT: vmovdqa {{.*#+}} ymm3 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4812; AVX2-NEXT: vpshufb %ymm3, %ymm2, %ymm2 4813; AVX2-NEXT: vpermq {{.*#+}} ymm2 = ymm2[0,2,2,3] 4814; AVX2-NEXT: vmovdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4815; AVX2-NEXT: vpshufb %xmm4, %xmm2, %xmm2 4816; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] 4817; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4818; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] 4819; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4820; AVX2-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4821; AVX2-NEXT: vpshufb %ymm3, %ymm0, %ymm0 4822; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4823; AVX2-NEXT: vpshufb %xmm4, %xmm0, %xmm0 4824; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 4825; AVX2-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4826; AVX2-NEXT: vzeroupper 4827; AVX2-NEXT: retq 4828; 4829; AVX512-LABEL: trunc_or_const_v16i64_v16i8: 4830; AVX512: # BB#0: 4831; AVX512-NEXT: vpmovqd %zmm0, %ymm0 4832; AVX512-NEXT: vpmovqd %zmm1, %ymm1 4833; AVX512-NEXT: vinserti64x4 $1, %ymm1, %zmm0, %zmm0 4834; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4835; AVX512-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4836; AVX512-NEXT: vzeroupper 4837; AVX512-NEXT: retq 4838 %1 = or <16 x i64> %a0, <i64 0, i64 1, i64 2, i64 3, i64 4, i64 5, i64 6, i64 7, i64 8, i64 9, i64 10, i64 11, i64 12, i64 13, i64 14, i64 15> 4839 %2 = trunc <16 x i64> %1 to <16 x i8> 4840 ret <16 x i8> %2 4841} 4842 4843define <16 x i8> @trunc_or_const_v16i32_v16i8(<16 x i32> %a0) nounwind { 4844; SSE-LABEL: trunc_or_const_v16i32_v16i8: 4845; SSE: # BB#0: 4846; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4847; SSE-NEXT: pand %xmm4, %xmm3 4848; SSE-NEXT: pand %xmm4, %xmm2 4849; SSE-NEXT: packuswb %xmm3, %xmm2 4850; SSE-NEXT: pand %xmm4, %xmm1 4851; SSE-NEXT: pand %xmm4, %xmm0 4852; SSE-NEXT: packuswb %xmm1, %xmm0 4853; SSE-NEXT: packuswb %xmm2, %xmm0 4854; SSE-NEXT: por {{.*}}(%rip), %xmm0 4855; SSE-NEXT: retq 4856; 4857; AVX1-LABEL: trunc_or_const_v16i32_v16i8: 4858; AVX1: # BB#0: 4859; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 4860; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] 4861; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 4862; AVX1-NEXT: vpand %xmm3, %xmm1, %xmm1 4863; AVX1-NEXT: vpackuswb %xmm2, %xmm1, %xmm1 4864; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4865; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 4866; AVX1-NEXT: vpand %xmm3, %xmm0, %xmm0 4867; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 4868; AVX1-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 4869; AVX1-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4870; AVX1-NEXT: vzeroupper 4871; AVX1-NEXT: retq 4872; 4873; AVX2-LABEL: trunc_or_const_v16i32_v16i8: 4874; AVX2: # BB#0: 4875; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 4876; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 4877; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] 4878; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4879; AVX2-NEXT: vpshufb %xmm3, %xmm1, %xmm1 4880; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 4881; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 4882; AVX2-NEXT: vpshufb %xmm3, %xmm0, %xmm0 4883; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4884; AVX2-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4885; AVX2-NEXT: vzeroupper 4886; AVX2-NEXT: retq 4887; 4888; AVX512-LABEL: trunc_or_const_v16i32_v16i8: 4889; AVX512: # BB#0: 4890; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4891; AVX512-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4892; AVX512-NEXT: vzeroupper 4893; AVX512-NEXT: retq 4894 %1 = or <16 x i32> %a0, <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 4895 %2 = trunc <16 x i32> %1 to <16 x i8> 4896 ret <16 x i8> %2 4897} 4898 4899define <16 x i8> @trunc_or_const_v16i16_v16i8(<16 x i16> %a0) nounwind { 4900; SSE-LABEL: trunc_or_const_v16i16_v16i8: 4901; SSE: # BB#0: 4902; SSE-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 4903; SSE-NEXT: pand %xmm2, %xmm1 4904; SSE-NEXT: pand %xmm2, %xmm0 4905; SSE-NEXT: packuswb %xmm1, %xmm0 4906; SSE-NEXT: por {{.*}}(%rip), %xmm0 4907; SSE-NEXT: retq 4908; 4909; AVX1-LABEL: trunc_or_const_v16i16_v16i8: 4910; AVX1: # BB#0: 4911; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 4912; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4913; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4914; AVX1-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4915; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4916; AVX1-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4917; AVX1-NEXT: vzeroupper 4918; AVX1-NEXT: retq 4919; 4920; AVX2-LABEL: trunc_or_const_v16i16_v16i8: 4921; AVX2: # BB#0: 4922; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 4923; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> 4924; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 4925; AVX2-NEXT: vpshufb %xmm2, %xmm0, %xmm0 4926; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4927; AVX2-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4928; AVX2-NEXT: vzeroupper 4929; AVX2-NEXT: retq 4930; 4931; AVX512F-LABEL: trunc_or_const_v16i16_v16i8: 4932; AVX512F: # BB#0: 4933; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 4934; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4935; AVX512F-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4936; AVX512F-NEXT: vzeroupper 4937; AVX512F-NEXT: retq 4938; 4939; AVX512BW-LABEL: trunc_or_const_v16i16_v16i8: 4940; AVX512BW: # BB#0: 4941; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 4942; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 4943; AVX512BW-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4944; AVX512BW-NEXT: vzeroupper 4945; AVX512BW-NEXT: retq 4946; 4947; AVX512DQ-LABEL: trunc_or_const_v16i16_v16i8: 4948; AVX512DQ: # BB#0: 4949; AVX512DQ-NEXT: vpmovsxwd %ymm0, %zmm0 4950; AVX512DQ-NEXT: vpmovdb %zmm0, %xmm0 4951; AVX512DQ-NEXT: vpor {{.*}}(%rip), %xmm0, %xmm0 4952; AVX512DQ-NEXT: vzeroupper 4953; AVX512DQ-NEXT: retq 4954 %1 = or <16 x i16> %a0, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 4955 %2 = trunc <16 x i16> %1 to <16 x i8> 4956 ret <16 x i8> %2 4957} 4958 4959; 4960; complex patterns - often created by vectorizer 4961; 4962 4963define <4 x i32> @mul_add_const_v4i64_v4i32(<4 x i32> %a0, <4 x i32> %a1) nounwind { 4964; SSE-LABEL: mul_add_const_v4i64_v4i32: 4965; SSE: # BB#0: 4966; SSE-NEXT: movdqa %xmm0, %xmm2 4967; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,1,1,3] 4968; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,1,3,3] 4969; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,1,1,3] 4970; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,1,3,3] 4971; SSE-NEXT: movdqa %xmm2, %xmm4 4972; SSE-NEXT: psrlq $32, %xmm4 4973; SSE-NEXT: pmuludq %xmm1, %xmm4 4974; SSE-NEXT: movdqa %xmm1, %xmm5 4975; SSE-NEXT: psrlq $32, %xmm5 4976; SSE-NEXT: pmuludq %xmm2, %xmm5 4977; SSE-NEXT: paddq %xmm4, %xmm5 4978; SSE-NEXT: psllq $32, %xmm5 4979; SSE-NEXT: pmuludq %xmm1, %xmm2 4980; SSE-NEXT: paddq %xmm5, %xmm2 4981; SSE-NEXT: movdqa %xmm0, %xmm1 4982; SSE-NEXT: psrlq $32, %xmm1 4983; SSE-NEXT: pmuludq %xmm3, %xmm1 4984; SSE-NEXT: movdqa %xmm3, %xmm4 4985; SSE-NEXT: psrlq $32, %xmm4 4986; SSE-NEXT: pmuludq %xmm0, %xmm4 4987; SSE-NEXT: paddq %xmm1, %xmm4 4988; SSE-NEXT: psllq $32, %xmm4 4989; SSE-NEXT: pmuludq %xmm3, %xmm0 4990; SSE-NEXT: paddq %xmm4, %xmm0 4991; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2] 4992; SSE-NEXT: paddd {{.*}}(%rip), %xmm0 4993; SSE-NEXT: retq 4994; 4995; AVX-LABEL: mul_add_const_v4i64_v4i32: 4996; AVX: # BB#0: 4997; AVX-NEXT: vpmulld %xmm1, %xmm0, %xmm0 4998; AVX-NEXT: vpaddd {{.*}}(%rip), %xmm0, %xmm0 4999; AVX-NEXT: retq 5000 %1 = sext <4 x i32> %a0 to <4 x i64> 5001 %2 = sext <4 x i32> %a1 to <4 x i64> 5002 %3 = mul <4 x i64> %1, %2 5003 %4 = add <4 x i64> %3, <i64 -3, i64 -1, i64 1, i64 3> 5004 %5 = trunc <4 x i64> %4 to <4 x i32> 5005 ret <4 x i32> %5 5006} 5007 5008define <4 x i32> @mul_add_self_v4i64_v4i32(<4 x i32> %a0, <4 x i32> %a1) nounwind { 5009; SSE-LABEL: mul_add_self_v4i64_v4i32: 5010; SSE: # BB#0: 5011; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 5012; SSE-NEXT: movdqa %xmm2, %xmm3 5013; SSE-NEXT: psrad $31, %xmm3 5014; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 5015; SSE-NEXT: movdqa %xmm0, %xmm3 5016; SSE-NEXT: psrad $31, %xmm3 5017; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 5018; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] 5019; SSE-NEXT: movdqa %xmm3, %xmm4 5020; SSE-NEXT: psrad $31, %xmm4 5021; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 5022; SSE-NEXT: movdqa %xmm1, %xmm4 5023; SSE-NEXT: psrad $31, %xmm4 5024; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 5025; SSE-NEXT: movdqa %xmm0, %xmm4 5026; SSE-NEXT: psrlq $32, %xmm4 5027; SSE-NEXT: pmuludq %xmm1, %xmm4 5028; SSE-NEXT: movdqa %xmm1, %xmm5 5029; SSE-NEXT: psrlq $32, %xmm5 5030; SSE-NEXT: pmuludq %xmm0, %xmm5 5031; SSE-NEXT: paddq %xmm4, %xmm5 5032; SSE-NEXT: psllq $32, %xmm5 5033; SSE-NEXT: pmuludq %xmm0, %xmm1 5034; SSE-NEXT: paddq %xmm5, %xmm1 5035; SSE-NEXT: movdqa %xmm2, %xmm0 5036; SSE-NEXT: psrlq $32, %xmm0 5037; SSE-NEXT: pmuludq %xmm3, %xmm0 5038; SSE-NEXT: movdqa %xmm3, %xmm4 5039; SSE-NEXT: psrlq $32, %xmm4 5040; SSE-NEXT: pmuludq %xmm2, %xmm4 5041; SSE-NEXT: paddq %xmm0, %xmm4 5042; SSE-NEXT: psllq $32, %xmm4 5043; SSE-NEXT: pmuludq %xmm2, %xmm3 5044; SSE-NEXT: paddq %xmm4, %xmm3 5045; SSE-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,2],xmm3[0,2] 5046; SSE-NEXT: paddd %xmm1, %xmm1 5047; SSE-NEXT: movdqa %xmm1, %xmm0 5048; SSE-NEXT: retq 5049; 5050; AVX-LABEL: mul_add_self_v4i64_v4i32: 5051; AVX: # BB#0: 5052; AVX-NEXT: vpmulld %xmm1, %xmm0, %xmm0 5053; AVX-NEXT: vpaddd %xmm0, %xmm0, %xmm0 5054; AVX-NEXT: retq 5055 %1 = sext <4 x i32> %a0 to <4 x i64> 5056 %2 = sext <4 x i32> %a1 to <4 x i64> 5057 %3 = mul <4 x i64> %1, %2 5058 %4 = add <4 x i64> %3, %3 5059 %5 = trunc <4 x i64> %4 to <4 x i32> 5060 ret <4 x i32> %5 5061} 5062 5063define <4 x i32> @mul_add_multiuse_v4i64_v4i32(<4 x i32> %a0, <4 x i32> %a1) nounwind { 5064; SSE-LABEL: mul_add_multiuse_v4i64_v4i32: 5065; SSE: # BB#0: 5066; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[0,1,1,3] 5067; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,1,3,3] 5068; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm1[0,1,1,3] 5069; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,1,3,3] 5070; SSE-NEXT: movdqa %xmm3, %xmm5 5071; SSE-NEXT: psrlq $32, %xmm5 5072; SSE-NEXT: pmuludq %xmm1, %xmm5 5073; SSE-NEXT: movdqa %xmm1, %xmm6 5074; SSE-NEXT: psrlq $32, %xmm6 5075; SSE-NEXT: pmuludq %xmm3, %xmm6 5076; SSE-NEXT: paddq %xmm5, %xmm6 5077; SSE-NEXT: psllq $32, %xmm6 5078; SSE-NEXT: pmuludq %xmm1, %xmm3 5079; SSE-NEXT: paddq %xmm6, %xmm3 5080; SSE-NEXT: movdqa %xmm2, %xmm1 5081; SSE-NEXT: psrlq $32, %xmm1 5082; SSE-NEXT: pmuludq %xmm4, %xmm1 5083; SSE-NEXT: movdqa %xmm4, %xmm5 5084; SSE-NEXT: psrlq $32, %xmm5 5085; SSE-NEXT: pmuludq %xmm2, %xmm5 5086; SSE-NEXT: paddq %xmm1, %xmm5 5087; SSE-NEXT: psllq $32, %xmm5 5088; SSE-NEXT: pmuludq %xmm4, %xmm2 5089; SSE-NEXT: paddq %xmm5, %xmm2 5090; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2] 5091; SSE-NEXT: paddd %xmm2, %xmm0 5092; SSE-NEXT: retq 5093; 5094; AVX-LABEL: mul_add_multiuse_v4i64_v4i32: 5095; AVX: # BB#0: 5096; AVX-NEXT: vpmulld %xmm1, %xmm0, %xmm1 5097; AVX-NEXT: vpaddd %xmm1, %xmm0, %xmm0 5098; AVX-NEXT: retq 5099 %1 = sext <4 x i32> %a0 to <4 x i64> 5100 %2 = sext <4 x i32> %a1 to <4 x i64> 5101 %3 = mul <4 x i64> %1, %2 5102 %4 = add <4 x i64> %1, %3 5103 %5 = trunc <4 x i64> %4 to <4 x i32> 5104 ret <4 x i32> %5 5105} 5106