1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4
5;
6; Unary shuffle indices from registers
7;
8
9define <4 x double> @var_shuffle_v4f64_v4f64_xxxx_i64(<4 x double> %x, i64 %i0, i64 %i1, i64 %i2, i64 %i3) nounwind {
10; ALL-LABEL: var_shuffle_v4f64_v4f64_xxxx_i64:
11; ALL:       # BB#0:
12; ALL-NEXT:    pushq %rbp
13; ALL-NEXT:    movq %rsp, %rbp
14; ALL-NEXT:    andq $-32, %rsp
15; ALL-NEXT:    subq $64, %rsp
16; ALL-NEXT:    andl $3, %ecx
17; ALL-NEXT:    andl $3, %edx
18; ALL-NEXT:    andl $3, %esi
19; ALL-NEXT:    andl $3, %edi
20; ALL-NEXT:    vmovaps %ymm0, (%rsp)
21; ALL-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
22; ALL-NEXT:    vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
23; ALL-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
24; ALL-NEXT:    vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
25; ALL-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
26; ALL-NEXT:    movq %rbp, %rsp
27; ALL-NEXT:    popq %rbp
28; ALL-NEXT:    retq
29  %x0 = extractelement <4 x double> %x, i64 %i0
30  %x1 = extractelement <4 x double> %x, i64 %i1
31  %x2 = extractelement <4 x double> %x, i64 %i2
32  %x3 = extractelement <4 x double> %x, i64 %i3
33  %r0 = insertelement <4 x double> undef, double %x0, i32 0
34  %r1 = insertelement <4 x double>   %r0, double %x1, i32 1
35  %r2 = insertelement <4 x double>   %r1, double %x2, i32 2
36  %r3 = insertelement <4 x double>   %r2, double %x3, i32 3
37  ret <4 x double> %r3
38}
39
40define <4 x double> @var_shuffle_v4f64_v4f64_uxx0_i64(<4 x double> %x, i64 %i0, i64 %i1, i64 %i2, i64 %i3) nounwind {
41; ALL-LABEL: var_shuffle_v4f64_v4f64_uxx0_i64:
42; ALL:       # BB#0:
43; ALL-NEXT:    pushq %rbp
44; ALL-NEXT:    movq %rsp, %rbp
45; ALL-NEXT:    andq $-32, %rsp
46; ALL-NEXT:    subq $64, %rsp
47; ALL-NEXT:    andl $3, %edx
48; ALL-NEXT:    andl $3, %esi
49; ALL-NEXT:    vmovaps %ymm0, (%rsp)
50; ALL-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
51; ALL-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
52; ALL-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
53; ALL-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
54; ALL-NEXT:    movq %rbp, %rsp
55; ALL-NEXT:    popq %rbp
56; ALL-NEXT:    retq
57  %x0 = extractelement <4 x double> %x, i64 %i0
58  %x1 = extractelement <4 x double> %x, i64 %i1
59  %x2 = extractelement <4 x double> %x, i64 %i2
60  %x3 = extractelement <4 x double> %x, i64 %i3
61  %r0 = insertelement <4 x double> undef, double undef, i32 0
62  %r1 = insertelement <4 x double>   %r0, double   %x1, i32 1
63  %r2 = insertelement <4 x double>   %r1, double   %x2, i32 2
64  %r3 = insertelement <4 x double>   %r2, double   0.0, i32 3
65  ret <4 x double> %r3
66}
67
68define <4 x double> @var_shuffle_v4f64_v2f64_xxxx_i64(<2 x double> %x, i64 %i0, i64 %i1, i64 %i2, i64 %i3) nounwind {
69; ALL-LABEL: var_shuffle_v4f64_v2f64_xxxx_i64:
70; ALL:       # BB#0:
71; ALL-NEXT:    andl $1, %ecx
72; ALL-NEXT:    andl $1, %edx
73; ALL-NEXT:    andl $1, %esi
74; ALL-NEXT:    andl $1, %edi
75; ALL-NEXT:    vmovaps %xmm0, -{{[0-9]+}}(%rsp)
76; ALL-NEXT:    vmovsd {{.*#+}} xmm0 = mem[0],zero
77; ALL-NEXT:    vmovhpd {{.*#+}} xmm0 = xmm0[0],mem[0]
78; ALL-NEXT:    vmovsd {{.*#+}} xmm1 = mem[0],zero
79; ALL-NEXT:    vmovhpd {{.*#+}} xmm1 = xmm1[0],mem[0]
80; ALL-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
81; ALL-NEXT:    retq
82  %x0 = extractelement <2 x double> %x, i64 %i0
83  %x1 = extractelement <2 x double> %x, i64 %i1
84  %x2 = extractelement <2 x double> %x, i64 %i2
85  %x3 = extractelement <2 x double> %x, i64 %i3
86  %r0 = insertelement <4 x double> undef, double %x0, i32 0
87  %r1 = insertelement <4 x double>   %r0, double %x1, i32 1
88  %r2 = insertelement <4 x double>   %r1, double %x2, i32 2
89  %r3 = insertelement <4 x double>   %r2, double %x3, i32 3
90  ret <4 x double> %r3
91}
92
93define <4 x i64> @var_shuffle_v4i64_v4i64_xxxx_i64(<4 x i64> %x, i64 %i0, i64 %i1, i64 %i2, i64 %i3) nounwind {
94; AVX1-LABEL: var_shuffle_v4i64_v4i64_xxxx_i64:
95; AVX1:       # BB#0:
96; AVX1-NEXT:    pushq %rbp
97; AVX1-NEXT:    movq %rsp, %rbp
98; AVX1-NEXT:    andq $-32, %rsp
99; AVX1-NEXT:    subq $64, %rsp
100; AVX1-NEXT:    andl $3, %ecx
101; AVX1-NEXT:    andl $3, %edx
102; AVX1-NEXT:    andl $3, %esi
103; AVX1-NEXT:    andl $3, %edi
104; AVX1-NEXT:    vmovaps %ymm0, (%rsp)
105; AVX1-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
106; AVX1-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
107; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
108; AVX1-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
109; AVX1-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
110; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
111; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
112; AVX1-NEXT:    movq %rbp, %rsp
113; AVX1-NEXT:    popq %rbp
114; AVX1-NEXT:    retq
115;
116; AVX2-LABEL: var_shuffle_v4i64_v4i64_xxxx_i64:
117; AVX2:       # BB#0:
118; AVX2-NEXT:    pushq %rbp
119; AVX2-NEXT:    movq %rsp, %rbp
120; AVX2-NEXT:    andq $-32, %rsp
121; AVX2-NEXT:    subq $64, %rsp
122; AVX2-NEXT:    andl $3, %ecx
123; AVX2-NEXT:    andl $3, %edx
124; AVX2-NEXT:    andl $3, %esi
125; AVX2-NEXT:    andl $3, %edi
126; AVX2-NEXT:    vmovaps %ymm0, (%rsp)
127; AVX2-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
128; AVX2-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
129; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
130; AVX2-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
131; AVX2-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
132; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
133; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
134; AVX2-NEXT:    movq %rbp, %rsp
135; AVX2-NEXT:    popq %rbp
136; AVX2-NEXT:    retq
137  %x0 = extractelement <4 x i64> %x, i64 %i0
138  %x1 = extractelement <4 x i64> %x, i64 %i1
139  %x2 = extractelement <4 x i64> %x, i64 %i2
140  %x3 = extractelement <4 x i64> %x, i64 %i3
141  %r0 = insertelement <4 x i64> undef, i64 %x0, i32 0
142  %r1 = insertelement <4 x i64>   %r0, i64 %x1, i32 1
143  %r2 = insertelement <4 x i64>   %r1, i64 %x2, i32 2
144  %r3 = insertelement <4 x i64>   %r2, i64 %x3, i32 3
145  ret <4 x i64> %r3
146}
147
148define <4 x i64> @var_shuffle_v4i64_v4i64_xx00_i64(<4 x i64> %x, i64 %i0, i64 %i1, i64 %i2, i64 %i3) nounwind {
149; AVX1-LABEL: var_shuffle_v4i64_v4i64_xx00_i64:
150; AVX1:       # BB#0:
151; AVX1-NEXT:    pushq %rbp
152; AVX1-NEXT:    movq %rsp, %rbp
153; AVX1-NEXT:    andq $-32, %rsp
154; AVX1-NEXT:    subq $64, %rsp
155; AVX1-NEXT:    andl $3, %esi
156; AVX1-NEXT:    andl $3, %edi
157; AVX1-NEXT:    vmovaps %ymm0, (%rsp)
158; AVX1-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
159; AVX1-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
160; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
161; AVX1-NEXT:    vpxor %xmm1, %xmm1, %xmm1
162; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
163; AVX1-NEXT:    movq %rbp, %rsp
164; AVX1-NEXT:    popq %rbp
165; AVX1-NEXT:    retq
166;
167; AVX2-LABEL: var_shuffle_v4i64_v4i64_xx00_i64:
168; AVX2:       # BB#0:
169; AVX2-NEXT:    pushq %rbp
170; AVX2-NEXT:    movq %rsp, %rbp
171; AVX2-NEXT:    andq $-32, %rsp
172; AVX2-NEXT:    subq $64, %rsp
173; AVX2-NEXT:    andl $3, %esi
174; AVX2-NEXT:    andl $3, %edi
175; AVX2-NEXT:    vmovaps %ymm0, (%rsp)
176; AVX2-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
177; AVX2-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
178; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
179; AVX2-NEXT:    vpxor %xmm1, %xmm1, %xmm1
180; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
181; AVX2-NEXT:    movq %rbp, %rsp
182; AVX2-NEXT:    popq %rbp
183; AVX2-NEXT:    retq
184  %x0 = extractelement <4 x i64> %x, i64 %i0
185  %x1 = extractelement <4 x i64> %x, i64 %i1
186  %x2 = extractelement <4 x i64> %x, i64 %i2
187  %x3 = extractelement <4 x i64> %x, i64 %i3
188  %r0 = insertelement <4 x i64> undef, i64 %x0, i32 0
189  %r1 = insertelement <4 x i64>   %r0, i64 %x1, i32 1
190  %r2 = insertelement <4 x i64>   %r1, i64   0, i32 2
191  %r3 = insertelement <4 x i64>   %r2, i64   0, i32 3
192  ret <4 x i64> %r3
193}
194
195define <4 x i64> @var_shuffle_v4i64_v2i64_xxxx_i64(<2 x i64> %x, i64 %i0, i64 %i1, i64 %i2, i64 %i3) nounwind {
196; AVX1-LABEL: var_shuffle_v4i64_v2i64_xxxx_i64:
197; AVX1:       # BB#0:
198; AVX1-NEXT:    andl $1, %ecx
199; AVX1-NEXT:    andl $1, %edx
200; AVX1-NEXT:    andl $1, %esi
201; AVX1-NEXT:    andl $1, %edi
202; AVX1-NEXT:    vmovaps %xmm0, -{{[0-9]+}}(%rsp)
203; AVX1-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
204; AVX1-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
205; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
206; AVX1-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
207; AVX1-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
208; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
209; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
210; AVX1-NEXT:    retq
211;
212; AVX2-LABEL: var_shuffle_v4i64_v2i64_xxxx_i64:
213; AVX2:       # BB#0:
214; AVX2-NEXT:    andl $1, %ecx
215; AVX2-NEXT:    andl $1, %edx
216; AVX2-NEXT:    andl $1, %esi
217; AVX2-NEXT:    andl $1, %edi
218; AVX2-NEXT:    vmovaps %xmm0, -{{[0-9]+}}(%rsp)
219; AVX2-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
220; AVX2-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
221; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
222; AVX2-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
223; AVX2-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
224; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
225; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
226; AVX2-NEXT:    retq
227  %x0 = extractelement <2 x i64> %x, i64 %i0
228  %x1 = extractelement <2 x i64> %x, i64 %i1
229  %x2 = extractelement <2 x i64> %x, i64 %i2
230  %x3 = extractelement <2 x i64> %x, i64 %i3
231  %r0 = insertelement <4 x i64> undef, i64 %x0, i32 0
232  %r1 = insertelement <4 x i64>   %r0, i64 %x1, i32 1
233  %r2 = insertelement <4 x i64>   %r1, i64 %x2, i32 2
234  %r3 = insertelement <4 x i64>   %r2, i64 %x3, i32 3
235  ret <4 x i64> %r3
236}
237
238define <8 x float> @var_shuffle_v8f32_v8f32_xxxxxxxx_i32(<8 x float> %x, i32 %i0, i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7) nounwind {
239; ALL-LABEL: var_shuffle_v8f32_v8f32_xxxxxxxx_i32:
240; ALL:       # BB#0:
241; ALL-NEXT:    pushq %rbp
242; ALL-NEXT:    movq %rsp, %rbp
243; ALL-NEXT:    andq $-32, %rsp
244; ALL-NEXT:    subq $64, %rsp
245; ALL-NEXT:    # kill: %R9D<def> %R9D<kill> %R9<def>
246; ALL-NEXT:    # kill: %R8D<def> %R8D<kill> %R8<def>
247; ALL-NEXT:    # kill: %ECX<def> %ECX<kill> %RCX<def>
248; ALL-NEXT:    # kill: %EDX<def> %EDX<kill> %RDX<def>
249; ALL-NEXT:    # kill: %ESI<def> %ESI<kill> %RSI<def>
250; ALL-NEXT:    # kill: %EDI<def> %EDI<kill> %RDI<def>
251; ALL-NEXT:    andl $7, %edi
252; ALL-NEXT:    andl $7, %esi
253; ALL-NEXT:    andl $7, %edx
254; ALL-NEXT:    andl $7, %ecx
255; ALL-NEXT:    andl $7, %r8d
256; ALL-NEXT:    vmovaps %ymm0, (%rsp)
257; ALL-NEXT:    andl $7, %r9d
258; ALL-NEXT:    movl 16(%rbp), %r10d
259; ALL-NEXT:    andl $7, %r10d
260; ALL-NEXT:    movl 24(%rbp), %eax
261; ALL-NEXT:    andl $7, %eax
262; ALL-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
263; ALL-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
264; ALL-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
265; ALL-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0],mem[0],xmm2[2,3]
266; ALL-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1],mem[0],xmm2[3]
267; ALL-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],mem[0]
268; ALL-NEXT:    vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
269; ALL-NEXT:    vinsertps {{.*#+}} xmm3 = xmm3[0],mem[0],xmm3[2,3]
270; ALL-NEXT:    vinsertps {{.*#+}} xmm0 = xmm3[0,1],xmm0[0],xmm3[3]
271; ALL-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
272; ALL-NEXT:    vinsertf128 $1, %xmm0, %ymm2, %ymm0
273; ALL-NEXT:    movq %rbp, %rsp
274; ALL-NEXT:    popq %rbp
275; ALL-NEXT:    retq
276  %x0 = extractelement <8 x float> %x, i32 %i0
277  %x1 = extractelement <8 x float> %x, i32 %i1
278  %x2 = extractelement <8 x float> %x, i32 %i2
279  %x3 = extractelement <8 x float> %x, i32 %i3
280  %x4 = extractelement <8 x float> %x, i32 %i4
281  %x5 = extractelement <8 x float> %x, i32 %i5
282  %x6 = extractelement <8 x float> %x, i32 %i6
283  %x7 = extractelement <8 x float> %x, i32 %i7
284  %r0 = insertelement <8 x float> undef, float %x0, i32 0
285  %r1 = insertelement <8 x float>   %r0, float %x1, i32 1
286  %r2 = insertelement <8 x float>   %r1, float %x2, i32 2
287  %r3 = insertelement <8 x float>   %r2, float %x3, i32 3
288  %r4 = insertelement <8 x float>   %r3, float %x4, i32 4
289  %r5 = insertelement <8 x float>   %r4, float %x5, i32 5
290  %r6 = insertelement <8 x float>   %r5, float %x6, i32 6
291  %r7 = insertelement <8 x float>   %r6, float %x7, i32 7
292  ret <8 x float> %r7
293}
294
295define <8 x float> @var_shuffle_v8f32_v4f32_xxxxxxxx_i32(<4 x float> %x, i32 %i0, i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7) nounwind {
296; ALL-LABEL: var_shuffle_v8f32_v4f32_xxxxxxxx_i32:
297; ALL:       # BB#0:
298; ALL-NEXT:    # kill: %R9D<def> %R9D<kill> %R9<def>
299; ALL-NEXT:    # kill: %R8D<def> %R8D<kill> %R8<def>
300; ALL-NEXT:    # kill: %ECX<def> %ECX<kill> %RCX<def>
301; ALL-NEXT:    # kill: %EDX<def> %EDX<kill> %RDX<def>
302; ALL-NEXT:    # kill: %ESI<def> %ESI<kill> %RSI<def>
303; ALL-NEXT:    # kill: %EDI<def> %EDI<kill> %RDI<def>
304; ALL-NEXT:    andl $3, %edi
305; ALL-NEXT:    andl $3, %esi
306; ALL-NEXT:    andl $3, %edx
307; ALL-NEXT:    andl $3, %ecx
308; ALL-NEXT:    andl $3, %r8d
309; ALL-NEXT:    vmovaps %xmm0, -{{[0-9]+}}(%rsp)
310; ALL-NEXT:    andl $3, %r9d
311; ALL-NEXT:    movl {{[0-9]+}}(%rsp), %r10d
312; ALL-NEXT:    andl $3, %r10d
313; ALL-NEXT:    movl {{[0-9]+}}(%rsp), %eax
314; ALL-NEXT:    andl $3, %eax
315; ALL-NEXT:    vmovss {{.*#+}} xmm0 = mem[0],zero,zero,zero
316; ALL-NEXT:    vmovss {{.*#+}} xmm1 = mem[0],zero,zero,zero
317; ALL-NEXT:    vmovss {{.*#+}} xmm2 = mem[0],zero,zero,zero
318; ALL-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0],mem[0],xmm2[2,3]
319; ALL-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1],mem[0],xmm2[3]
320; ALL-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],mem[0]
321; ALL-NEXT:    vmovss {{.*#+}} xmm3 = mem[0],zero,zero,zero
322; ALL-NEXT:    vinsertps {{.*#+}} xmm3 = xmm3[0],mem[0],xmm3[2,3]
323; ALL-NEXT:    vinsertps {{.*#+}} xmm0 = xmm3[0,1],xmm0[0],xmm3[3]
324; ALL-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0]
325; ALL-NEXT:    vinsertf128 $1, %xmm0, %ymm2, %ymm0
326; ALL-NEXT:    retq
327  %x0 = extractelement <4 x float> %x, i32 %i0
328  %x1 = extractelement <4 x float> %x, i32 %i1
329  %x2 = extractelement <4 x float> %x, i32 %i2
330  %x3 = extractelement <4 x float> %x, i32 %i3
331  %x4 = extractelement <4 x float> %x, i32 %i4
332  %x5 = extractelement <4 x float> %x, i32 %i5
333  %x6 = extractelement <4 x float> %x, i32 %i6
334  %x7 = extractelement <4 x float> %x, i32 %i7
335  %r0 = insertelement <8 x float> undef, float %x0, i32 0
336  %r1 = insertelement <8 x float>   %r0, float %x1, i32 1
337  %r2 = insertelement <8 x float>   %r1, float %x2, i32 2
338  %r3 = insertelement <8 x float>   %r2, float %x3, i32 3
339  %r4 = insertelement <8 x float>   %r3, float %x4, i32 4
340  %r5 = insertelement <8 x float>   %r4, float %x5, i32 5
341  %r6 = insertelement <8 x float>   %r5, float %x6, i32 6
342  %r7 = insertelement <8 x float>   %r6, float %x7, i32 7
343  ret <8 x float> %r7
344}
345
346define <16 x i16> @var_shuffle_v16i16_v16i16_xxxxxxxxxxxxxxxx_i16(<16 x i16> %x, i32 %i0, i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, i32 %i11, i32 %i12, i32 %i13, i32 %i14, i32 %i15) nounwind {
347; AVX1-LABEL: var_shuffle_v16i16_v16i16_xxxxxxxxxxxxxxxx_i16:
348; AVX1:       # BB#0:
349; AVX1-NEXT:    pushq %rbp
350; AVX1-NEXT:    movq %rsp, %rbp
351; AVX1-NEXT:    andq $-32, %rsp
352; AVX1-NEXT:    subq $64, %rsp
353; AVX1-NEXT:    # kill: %R9D<def> %R9D<kill> %R9<def>
354; AVX1-NEXT:    # kill: %R8D<def> %R8D<kill> %R8<def>
355; AVX1-NEXT:    # kill: %ECX<def> %ECX<kill> %RCX<def>
356; AVX1-NEXT:    # kill: %EDX<def> %EDX<kill> %RDX<def>
357; AVX1-NEXT:    # kill: %ESI<def> %ESI<kill> %RSI<def>
358; AVX1-NEXT:    # kill: %EDI<def> %EDI<kill> %RDI<def>
359; AVX1-NEXT:    vmovaps %ymm0, (%rsp)
360; AVX1-NEXT:    movl 32(%rbp), %eax
361; AVX1-NEXT:    andl $15, %eax
362; AVX1-NEXT:    movzwl (%rsp,%rax,2), %eax
363; AVX1-NEXT:    vmovd %eax, %xmm0
364; AVX1-NEXT:    movl 40(%rbp), %eax
365; AVX1-NEXT:    andl $15, %eax
366; AVX1-NEXT:    movzwl (%rsp,%rax,2), %eax
367; AVX1-NEXT:    vpinsrw $1, %eax, %xmm0, %xmm0
368; AVX1-NEXT:    movl 48(%rbp), %eax
369; AVX1-NEXT:    andl $15, %eax
370; AVX1-NEXT:    movzwl (%rsp,%rax,2), %eax
371; AVX1-NEXT:    vpinsrw $2, %eax, %xmm0, %xmm0
372; AVX1-NEXT:    movl 56(%rbp), %eax
373; AVX1-NEXT:    andl $15, %eax
374; AVX1-NEXT:    movzwl (%rsp,%rax,2), %eax
375; AVX1-NEXT:    vpinsrw $3, %eax, %xmm0, %xmm0
376; AVX1-NEXT:    movl 64(%rbp), %eax
377; AVX1-NEXT:    andl $15, %eax
378; AVX1-NEXT:    movzwl (%rsp,%rax,2), %eax
379; AVX1-NEXT:    vpinsrw $4, %eax, %xmm0, %xmm0
380; AVX1-NEXT:    movl 72(%rbp), %eax
381; AVX1-NEXT:    andl $15, %eax
382; AVX1-NEXT:    movzwl (%rsp,%rax,2), %eax
383; AVX1-NEXT:    vpinsrw $5, %eax, %xmm0, %xmm0
384; AVX1-NEXT:    movl 80(%rbp), %eax
385; AVX1-NEXT:    andl $15, %eax
386; AVX1-NEXT:    movzwl (%rsp,%rax,2), %eax
387; AVX1-NEXT:    vpinsrw $6, %eax, %xmm0, %xmm0
388; AVX1-NEXT:    movl 88(%rbp), %eax
389; AVX1-NEXT:    andl $15, %eax
390; AVX1-NEXT:    movzwl (%rsp,%rax,2), %eax
391; AVX1-NEXT:    vpinsrw $7, %eax, %xmm0, %xmm0
392; AVX1-NEXT:    andl $15, %edi
393; AVX1-NEXT:    movzwl (%rsp,%rdi,2), %eax
394; AVX1-NEXT:    vmovd %eax, %xmm1
395; AVX1-NEXT:    andl $15, %esi
396; AVX1-NEXT:    vpinsrw $1, (%rsp,%rsi,2), %xmm1, %xmm1
397; AVX1-NEXT:    andl $15, %edx
398; AVX1-NEXT:    vpinsrw $2, (%rsp,%rdx,2), %xmm1, %xmm1
399; AVX1-NEXT:    andl $15, %ecx
400; AVX1-NEXT:    vpinsrw $3, (%rsp,%rcx,2), %xmm1, %xmm1
401; AVX1-NEXT:    andl $15, %r8d
402; AVX1-NEXT:    vpinsrw $4, (%rsp,%r8,2), %xmm1, %xmm1
403; AVX1-NEXT:    andl $15, %r9d
404; AVX1-NEXT:    vpinsrw $5, (%rsp,%r9,2), %xmm1, %xmm1
405; AVX1-NEXT:    movl 16(%rbp), %eax
406; AVX1-NEXT:    andl $15, %eax
407; AVX1-NEXT:    movzwl (%rsp,%rax,2), %eax
408; AVX1-NEXT:    vpinsrw $6, %eax, %xmm1, %xmm1
409; AVX1-NEXT:    movl 24(%rbp), %eax
410; AVX1-NEXT:    andl $15, %eax
411; AVX1-NEXT:    movzwl (%rsp,%rax,2), %eax
412; AVX1-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm1
413; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
414; AVX1-NEXT:    movq %rbp, %rsp
415; AVX1-NEXT:    popq %rbp
416; AVX1-NEXT:    retq
417;
418; AVX2-LABEL: var_shuffle_v16i16_v16i16_xxxxxxxxxxxxxxxx_i16:
419; AVX2:       # BB#0:
420; AVX2-NEXT:    pushq %rbp
421; AVX2-NEXT:    movq %rsp, %rbp
422; AVX2-NEXT:    andq $-32, %rsp
423; AVX2-NEXT:    subq $64, %rsp
424; AVX2-NEXT:    # kill: %R9D<def> %R9D<kill> %R9<def>
425; AVX2-NEXT:    # kill: %R8D<def> %R8D<kill> %R8<def>
426; AVX2-NEXT:    # kill: %ECX<def> %ECX<kill> %RCX<def>
427; AVX2-NEXT:    # kill: %EDX<def> %EDX<kill> %RDX<def>
428; AVX2-NEXT:    # kill: %ESI<def> %ESI<kill> %RSI<def>
429; AVX2-NEXT:    # kill: %EDI<def> %EDI<kill> %RDI<def>
430; AVX2-NEXT:    vmovaps %ymm0, (%rsp)
431; AVX2-NEXT:    movl 32(%rbp), %eax
432; AVX2-NEXT:    andl $15, %eax
433; AVX2-NEXT:    movzwl (%rsp,%rax,2), %eax
434; AVX2-NEXT:    vmovd %eax, %xmm0
435; AVX2-NEXT:    movl 40(%rbp), %eax
436; AVX2-NEXT:    andl $15, %eax
437; AVX2-NEXT:    movzwl (%rsp,%rax,2), %eax
438; AVX2-NEXT:    vpinsrw $1, %eax, %xmm0, %xmm0
439; AVX2-NEXT:    movl 48(%rbp), %eax
440; AVX2-NEXT:    andl $15, %eax
441; AVX2-NEXT:    movzwl (%rsp,%rax,2), %eax
442; AVX2-NEXT:    vpinsrw $2, %eax, %xmm0, %xmm0
443; AVX2-NEXT:    movl 56(%rbp), %eax
444; AVX2-NEXT:    andl $15, %eax
445; AVX2-NEXT:    movzwl (%rsp,%rax,2), %eax
446; AVX2-NEXT:    vpinsrw $3, %eax, %xmm0, %xmm0
447; AVX2-NEXT:    movl 64(%rbp), %eax
448; AVX2-NEXT:    andl $15, %eax
449; AVX2-NEXT:    movzwl (%rsp,%rax,2), %eax
450; AVX2-NEXT:    vpinsrw $4, %eax, %xmm0, %xmm0
451; AVX2-NEXT:    movl 72(%rbp), %eax
452; AVX2-NEXT:    andl $15, %eax
453; AVX2-NEXT:    movzwl (%rsp,%rax,2), %eax
454; AVX2-NEXT:    vpinsrw $5, %eax, %xmm0, %xmm0
455; AVX2-NEXT:    movl 80(%rbp), %eax
456; AVX2-NEXT:    andl $15, %eax
457; AVX2-NEXT:    movzwl (%rsp,%rax,2), %eax
458; AVX2-NEXT:    vpinsrw $6, %eax, %xmm0, %xmm0
459; AVX2-NEXT:    movl 88(%rbp), %eax
460; AVX2-NEXT:    andl $15, %eax
461; AVX2-NEXT:    movzwl (%rsp,%rax,2), %eax
462; AVX2-NEXT:    vpinsrw $7, %eax, %xmm0, %xmm0
463; AVX2-NEXT:    andl $15, %edi
464; AVX2-NEXT:    movzwl (%rsp,%rdi,2), %eax
465; AVX2-NEXT:    vmovd %eax, %xmm1
466; AVX2-NEXT:    andl $15, %esi
467; AVX2-NEXT:    vpinsrw $1, (%rsp,%rsi,2), %xmm1, %xmm1
468; AVX2-NEXT:    andl $15, %edx
469; AVX2-NEXT:    vpinsrw $2, (%rsp,%rdx,2), %xmm1, %xmm1
470; AVX2-NEXT:    andl $15, %ecx
471; AVX2-NEXT:    vpinsrw $3, (%rsp,%rcx,2), %xmm1, %xmm1
472; AVX2-NEXT:    andl $15, %r8d
473; AVX2-NEXT:    vpinsrw $4, (%rsp,%r8,2), %xmm1, %xmm1
474; AVX2-NEXT:    andl $15, %r9d
475; AVX2-NEXT:    vpinsrw $5, (%rsp,%r9,2), %xmm1, %xmm1
476; AVX2-NEXT:    movl 16(%rbp), %eax
477; AVX2-NEXT:    andl $15, %eax
478; AVX2-NEXT:    movzwl (%rsp,%rax,2), %eax
479; AVX2-NEXT:    vpinsrw $6, %eax, %xmm1, %xmm1
480; AVX2-NEXT:    movl 24(%rbp), %eax
481; AVX2-NEXT:    andl $15, %eax
482; AVX2-NEXT:    movzwl (%rsp,%rax,2), %eax
483; AVX2-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm1
484; AVX2-NEXT:    vinserti128 $1, %xmm0, %ymm1, %ymm0
485; AVX2-NEXT:    movq %rbp, %rsp
486; AVX2-NEXT:    popq %rbp
487; AVX2-NEXT:    retq
488  %x0  = extractelement <16 x i16> %x, i32 %i0
489  %x1  = extractelement <16 x i16> %x, i32 %i1
490  %x2  = extractelement <16 x i16> %x, i32 %i2
491  %x3  = extractelement <16 x i16> %x, i32 %i3
492  %x4  = extractelement <16 x i16> %x, i32 %i4
493  %x5  = extractelement <16 x i16> %x, i32 %i5
494  %x6  = extractelement <16 x i16> %x, i32 %i6
495  %x7  = extractelement <16 x i16> %x, i32 %i7
496  %x8  = extractelement <16 x i16> %x, i32 %i8
497  %x9  = extractelement <16 x i16> %x, i32 %i9
498  %x10 = extractelement <16 x i16> %x, i32 %i10
499  %x11 = extractelement <16 x i16> %x, i32 %i11
500  %x12 = extractelement <16 x i16> %x, i32 %i12
501  %x13 = extractelement <16 x i16> %x, i32 %i13
502  %x14 = extractelement <16 x i16> %x, i32 %i14
503  %x15 = extractelement <16 x i16> %x, i32 %i15
504  %r0  = insertelement <16 x i16> undef, i16 %x0 , i32 0
505  %r1  = insertelement <16 x i16>  %r0 , i16 %x1 , i32 1
506  %r2  = insertelement <16 x i16>  %r1 , i16 %x2 , i32 2
507  %r3  = insertelement <16 x i16>  %r2 , i16 %x3 , i32 3
508  %r4  = insertelement <16 x i16>  %r3 , i16 %x4 , i32 4
509  %r5  = insertelement <16 x i16>  %r4 , i16 %x5 , i32 5
510  %r6  = insertelement <16 x i16>  %r5 , i16 %x6 , i32 6
511  %r7  = insertelement <16 x i16>  %r6 , i16 %x7 , i32 7
512  %r8  = insertelement <16 x i16>  %r7 , i16 %x8 , i32 8
513  %r9  = insertelement <16 x i16>  %r8 , i16 %x9 , i32 9
514  %r10 = insertelement <16 x i16>  %r9 , i16 %x10, i32 10
515  %r11 = insertelement <16 x i16>  %r10, i16 %x11, i32 11
516  %r12 = insertelement <16 x i16>  %r11, i16 %x12, i32 12
517  %r13 = insertelement <16 x i16>  %r12, i16 %x13, i32 13
518  %r14 = insertelement <16 x i16>  %r13, i16 %x14, i32 14
519  %r15 = insertelement <16 x i16>  %r14, i16 %x15, i32 15
520  ret <16 x i16> %r15
521}
522
523define <16 x i16> @var_shuffle_v16i16_v8i16_xxxxxxxxxxxxxxxx_i16(<8 x i16> %x, i32 %i0, i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8, i32 %i9, i32 %i10, i32 %i11, i32 %i12, i32 %i13, i32 %i14, i32 %i15) nounwind {
524; AVX1-LABEL: var_shuffle_v16i16_v8i16_xxxxxxxxxxxxxxxx_i16:
525; AVX1:       # BB#0:
526; AVX1-NEXT:    # kill: %R9D<def> %R9D<kill> %R9<def>
527; AVX1-NEXT:    # kill: %R8D<def> %R8D<kill> %R8<def>
528; AVX1-NEXT:    # kill: %ECX<def> %ECX<kill> %RCX<def>
529; AVX1-NEXT:    # kill: %EDX<def> %EDX<kill> %RDX<def>
530; AVX1-NEXT:    # kill: %ESI<def> %ESI<kill> %RSI<def>
531; AVX1-NEXT:    # kill: %EDI<def> %EDI<kill> %RDI<def>
532; AVX1-NEXT:    vmovaps %xmm0, -{{[0-9]+}}(%rsp)
533; AVX1-NEXT:    movl {{[0-9]+}}(%rsp), %eax
534; AVX1-NEXT:    andl $7, %eax
535; AVX1-NEXT:    movzwl -24(%rsp,%rax,2), %eax
536; AVX1-NEXT:    vmovd %eax, %xmm0
537; AVX1-NEXT:    movl {{[0-9]+}}(%rsp), %eax
538; AVX1-NEXT:    andl $7, %eax
539; AVX1-NEXT:    movzwl -24(%rsp,%rax,2), %eax
540; AVX1-NEXT:    vpinsrw $1, %eax, %xmm0, %xmm0
541; AVX1-NEXT:    movl {{[0-9]+}}(%rsp), %eax
542; AVX1-NEXT:    andl $7, %eax
543; AVX1-NEXT:    movzwl -24(%rsp,%rax,2), %eax
544; AVX1-NEXT:    vpinsrw $2, %eax, %xmm0, %xmm0
545; AVX1-NEXT:    movl {{[0-9]+}}(%rsp), %eax
546; AVX1-NEXT:    andl $7, %eax
547; AVX1-NEXT:    movzwl -24(%rsp,%rax,2), %eax
548; AVX1-NEXT:    vpinsrw $3, %eax, %xmm0, %xmm0
549; AVX1-NEXT:    movl {{[0-9]+}}(%rsp), %eax
550; AVX1-NEXT:    andl $7, %eax
551; AVX1-NEXT:    movzwl -24(%rsp,%rax,2), %eax
552; AVX1-NEXT:    vpinsrw $4, %eax, %xmm0, %xmm0
553; AVX1-NEXT:    movl {{[0-9]+}}(%rsp), %eax
554; AVX1-NEXT:    andl $7, %eax
555; AVX1-NEXT:    movzwl -24(%rsp,%rax,2), %eax
556; AVX1-NEXT:    vpinsrw $5, %eax, %xmm0, %xmm0
557; AVX1-NEXT:    movl {{[0-9]+}}(%rsp), %eax
558; AVX1-NEXT:    andl $7, %eax
559; AVX1-NEXT:    movzwl -24(%rsp,%rax,2), %eax
560; AVX1-NEXT:    vpinsrw $6, %eax, %xmm0, %xmm0
561; AVX1-NEXT:    movl {{[0-9]+}}(%rsp), %eax
562; AVX1-NEXT:    andl $7, %eax
563; AVX1-NEXT:    movzwl -24(%rsp,%rax,2), %eax
564; AVX1-NEXT:    vpinsrw $7, %eax, %xmm0, %xmm0
565; AVX1-NEXT:    andl $7, %edi
566; AVX1-NEXT:    movzwl -24(%rsp,%rdi,2), %eax
567; AVX1-NEXT:    vmovd %eax, %xmm1
568; AVX1-NEXT:    andl $7, %esi
569; AVX1-NEXT:    vpinsrw $1, -24(%rsp,%rsi,2), %xmm1, %xmm1
570; AVX1-NEXT:    andl $7, %edx
571; AVX1-NEXT:    vpinsrw $2, -24(%rsp,%rdx,2), %xmm1, %xmm1
572; AVX1-NEXT:    andl $7, %ecx
573; AVX1-NEXT:    vpinsrw $3, -24(%rsp,%rcx,2), %xmm1, %xmm1
574; AVX1-NEXT:    andl $7, %r8d
575; AVX1-NEXT:    vpinsrw $4, -24(%rsp,%r8,2), %xmm1, %xmm1
576; AVX1-NEXT:    andl $7, %r9d
577; AVX1-NEXT:    vpinsrw $5, -24(%rsp,%r9,2), %xmm1, %xmm1
578; AVX1-NEXT:    movl {{[0-9]+}}(%rsp), %eax
579; AVX1-NEXT:    andl $7, %eax
580; AVX1-NEXT:    movzwl -24(%rsp,%rax,2), %eax
581; AVX1-NEXT:    vpinsrw $6, %eax, %xmm1, %xmm1
582; AVX1-NEXT:    movl {{[0-9]+}}(%rsp), %eax
583; AVX1-NEXT:    andl $7, %eax
584; AVX1-NEXT:    movzwl -24(%rsp,%rax,2), %eax
585; AVX1-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm1
586; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
587; AVX1-NEXT:    retq
588;
589; AVX2-LABEL: var_shuffle_v16i16_v8i16_xxxxxxxxxxxxxxxx_i16:
590; AVX2:       # BB#0:
591; AVX2-NEXT:    # kill: %R9D<def> %R9D<kill> %R9<def>
592; AVX2-NEXT:    # kill: %R8D<def> %R8D<kill> %R8<def>
593; AVX2-NEXT:    # kill: %ECX<def> %ECX<kill> %RCX<def>
594; AVX2-NEXT:    # kill: %EDX<def> %EDX<kill> %RDX<def>
595; AVX2-NEXT:    # kill: %ESI<def> %ESI<kill> %RSI<def>
596; AVX2-NEXT:    # kill: %EDI<def> %EDI<kill> %RDI<def>
597; AVX2-NEXT:    vmovaps %xmm0, -{{[0-9]+}}(%rsp)
598; AVX2-NEXT:    movl {{[0-9]+}}(%rsp), %eax
599; AVX2-NEXT:    andl $7, %eax
600; AVX2-NEXT:    movzwl -24(%rsp,%rax,2), %eax
601; AVX2-NEXT:    vmovd %eax, %xmm0
602; AVX2-NEXT:    movl {{[0-9]+}}(%rsp), %eax
603; AVX2-NEXT:    andl $7, %eax
604; AVX2-NEXT:    movzwl -24(%rsp,%rax,2), %eax
605; AVX2-NEXT:    vpinsrw $1, %eax, %xmm0, %xmm0
606; AVX2-NEXT:    movl {{[0-9]+}}(%rsp), %eax
607; AVX2-NEXT:    andl $7, %eax
608; AVX2-NEXT:    movzwl -24(%rsp,%rax,2), %eax
609; AVX2-NEXT:    vpinsrw $2, %eax, %xmm0, %xmm0
610; AVX2-NEXT:    movl {{[0-9]+}}(%rsp), %eax
611; AVX2-NEXT:    andl $7, %eax
612; AVX2-NEXT:    movzwl -24(%rsp,%rax,2), %eax
613; AVX2-NEXT:    vpinsrw $3, %eax, %xmm0, %xmm0
614; AVX2-NEXT:    movl {{[0-9]+}}(%rsp), %eax
615; AVX2-NEXT:    andl $7, %eax
616; AVX2-NEXT:    movzwl -24(%rsp,%rax,2), %eax
617; AVX2-NEXT:    vpinsrw $4, %eax, %xmm0, %xmm0
618; AVX2-NEXT:    movl {{[0-9]+}}(%rsp), %eax
619; AVX2-NEXT:    andl $7, %eax
620; AVX2-NEXT:    movzwl -24(%rsp,%rax,2), %eax
621; AVX2-NEXT:    vpinsrw $5, %eax, %xmm0, %xmm0
622; AVX2-NEXT:    movl {{[0-9]+}}(%rsp), %eax
623; AVX2-NEXT:    andl $7, %eax
624; AVX2-NEXT:    movzwl -24(%rsp,%rax,2), %eax
625; AVX2-NEXT:    vpinsrw $6, %eax, %xmm0, %xmm0
626; AVX2-NEXT:    movl {{[0-9]+}}(%rsp), %eax
627; AVX2-NEXT:    andl $7, %eax
628; AVX2-NEXT:    movzwl -24(%rsp,%rax,2), %eax
629; AVX2-NEXT:    vpinsrw $7, %eax, %xmm0, %xmm0
630; AVX2-NEXT:    andl $7, %edi
631; AVX2-NEXT:    movzwl -24(%rsp,%rdi,2), %eax
632; AVX2-NEXT:    vmovd %eax, %xmm1
633; AVX2-NEXT:    andl $7, %esi
634; AVX2-NEXT:    vpinsrw $1, -24(%rsp,%rsi,2), %xmm1, %xmm1
635; AVX2-NEXT:    andl $7, %edx
636; AVX2-NEXT:    vpinsrw $2, -24(%rsp,%rdx,2), %xmm1, %xmm1
637; AVX2-NEXT:    andl $7, %ecx
638; AVX2-NEXT:    vpinsrw $3, -24(%rsp,%rcx,2), %xmm1, %xmm1
639; AVX2-NEXT:    andl $7, %r8d
640; AVX2-NEXT:    vpinsrw $4, -24(%rsp,%r8,2), %xmm1, %xmm1
641; AVX2-NEXT:    andl $7, %r9d
642; AVX2-NEXT:    vpinsrw $5, -24(%rsp,%r9,2), %xmm1, %xmm1
643; AVX2-NEXT:    movl {{[0-9]+}}(%rsp), %eax
644; AVX2-NEXT:    andl $7, %eax
645; AVX2-NEXT:    movzwl -24(%rsp,%rax,2), %eax
646; AVX2-NEXT:    vpinsrw $6, %eax, %xmm1, %xmm1
647; AVX2-NEXT:    movl {{[0-9]+}}(%rsp), %eax
648; AVX2-NEXT:    andl $7, %eax
649; AVX2-NEXT:    movzwl -24(%rsp,%rax,2), %eax
650; AVX2-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm1
651; AVX2-NEXT:    vinserti128 $1, %xmm0, %ymm1, %ymm0
652; AVX2-NEXT:    retq
653  %x0  = extractelement <8 x i16> %x, i32 %i0
654  %x1  = extractelement <8 x i16> %x, i32 %i1
655  %x2  = extractelement <8 x i16> %x, i32 %i2
656  %x3  = extractelement <8 x i16> %x, i32 %i3
657  %x4  = extractelement <8 x i16> %x, i32 %i4
658  %x5  = extractelement <8 x i16> %x, i32 %i5
659  %x6  = extractelement <8 x i16> %x, i32 %i6
660  %x7  = extractelement <8 x i16> %x, i32 %i7
661  %x8  = extractelement <8 x i16> %x, i32 %i8
662  %x9  = extractelement <8 x i16> %x, i32 %i9
663  %x10 = extractelement <8 x i16> %x, i32 %i10
664  %x11 = extractelement <8 x i16> %x, i32 %i11
665  %x12 = extractelement <8 x i16> %x, i32 %i12
666  %x13 = extractelement <8 x i16> %x, i32 %i13
667  %x14 = extractelement <8 x i16> %x, i32 %i14
668  %x15 = extractelement <8 x i16> %x, i32 %i15
669  %r0  = insertelement <16 x i16> undef, i16 %x0 , i32 0
670  %r1  = insertelement <16 x i16>  %r0 , i16 %x1 , i32 1
671  %r2  = insertelement <16 x i16>  %r1 , i16 %x2 , i32 2
672  %r3  = insertelement <16 x i16>  %r2 , i16 %x3 , i32 3
673  %r4  = insertelement <16 x i16>  %r3 , i16 %x4 , i32 4
674  %r5  = insertelement <16 x i16>  %r4 , i16 %x5 , i32 5
675  %r6  = insertelement <16 x i16>  %r5 , i16 %x6 , i32 6
676  %r7  = insertelement <16 x i16>  %r6 , i16 %x7 , i32 7
677  %r8  = insertelement <16 x i16>  %r7 , i16 %x8 , i32 8
678  %r9  = insertelement <16 x i16>  %r8 , i16 %x9 , i32 9
679  %r10 = insertelement <16 x i16>  %r9 , i16 %x10, i32 10
680  %r11 = insertelement <16 x i16>  %r10, i16 %x11, i32 11
681  %r12 = insertelement <16 x i16>  %r11, i16 %x12, i32 12
682  %r13 = insertelement <16 x i16>  %r12, i16 %x13, i32 13
683  %r14 = insertelement <16 x i16>  %r13, i16 %x14, i32 14
684  %r15 = insertelement <16 x i16>  %r14, i16 %x15, i32 15
685  ret <16 x i16> %r15
686}
687
688;
689; Unary shuffle indices from memory
690;
691
692define <4 x i64> @mem_shuffle_v4i64_v4i64_xxxx_i64(<4 x i64> %x, i64* %i) nounwind {
693; AVX1-LABEL: mem_shuffle_v4i64_v4i64_xxxx_i64:
694; AVX1:       # BB#0:
695; AVX1-NEXT:    pushq %rbp
696; AVX1-NEXT:    movq %rsp, %rbp
697; AVX1-NEXT:    andq $-32, %rsp
698; AVX1-NEXT:    subq $64, %rsp
699; AVX1-NEXT:    movq (%rdi), %rax
700; AVX1-NEXT:    movq 8(%rdi), %rcx
701; AVX1-NEXT:    andl $3, %eax
702; AVX1-NEXT:    andl $3, %ecx
703; AVX1-NEXT:    movq 16(%rdi), %rdx
704; AVX1-NEXT:    andl $3, %edx
705; AVX1-NEXT:    movq 24(%rdi), %rsi
706; AVX1-NEXT:    andl $3, %esi
707; AVX1-NEXT:    vmovaps %ymm0, (%rsp)
708; AVX1-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
709; AVX1-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
710; AVX1-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
711; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
712; AVX1-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
713; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
714; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
715; AVX1-NEXT:    movq %rbp, %rsp
716; AVX1-NEXT:    popq %rbp
717; AVX1-NEXT:    retq
718;
719; AVX2-LABEL: mem_shuffle_v4i64_v4i64_xxxx_i64:
720; AVX2:       # BB#0:
721; AVX2-NEXT:    pushq %rbp
722; AVX2-NEXT:    movq %rsp, %rbp
723; AVX2-NEXT:    andq $-32, %rsp
724; AVX2-NEXT:    subq $64, %rsp
725; AVX2-NEXT:    movq (%rdi), %rax
726; AVX2-NEXT:    movq 8(%rdi), %rcx
727; AVX2-NEXT:    andl $3, %eax
728; AVX2-NEXT:    andl $3, %ecx
729; AVX2-NEXT:    movq 16(%rdi), %rdx
730; AVX2-NEXT:    andl $3, %edx
731; AVX2-NEXT:    movq 24(%rdi), %rsi
732; AVX2-NEXT:    andl $3, %esi
733; AVX2-NEXT:    vmovaps %ymm0, (%rsp)
734; AVX2-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
735; AVX2-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
736; AVX2-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
737; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
738; AVX2-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
739; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
740; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
741; AVX2-NEXT:    movq %rbp, %rsp
742; AVX2-NEXT:    popq %rbp
743; AVX2-NEXT:    retq
744  %p0  = getelementptr inbounds i64, i64* %i, i32 0
745  %p1  = getelementptr inbounds i64, i64* %i, i32 1
746  %p2  = getelementptr inbounds i64, i64* %i, i32 2
747  %p3  = getelementptr inbounds i64, i64* %i, i32 3
748  %i0  = load i64, i64* %p0, align 4
749  %i1  = load i64, i64* %p1, align 4
750  %i2  = load i64, i64* %p2, align 4
751  %i3  = load i64, i64* %p3, align 4
752  %x0 = extractelement <4 x i64> %x, i64 %i0
753  %x1 = extractelement <4 x i64> %x, i64 %i1
754  %x2 = extractelement <4 x i64> %x, i64 %i2
755  %x3 = extractelement <4 x i64> %x, i64 %i3
756  %r0 = insertelement <4 x i64> undef, i64 %x0, i32 0
757  %r1 = insertelement <4 x i64>   %r0, i64 %x1, i32 1
758  %r2 = insertelement <4 x i64>   %r1, i64 %x2, i32 2
759  %r3 = insertelement <4 x i64>   %r2, i64 %x3, i32 3
760  ret <4 x i64> %r3
761}
762
763define <4 x i64> @mem_shuffle_v4i64_v2i64_xxxx_i64(<2 x i64> %x, i64* %i) nounwind {
764; AVX1-LABEL: mem_shuffle_v4i64_v2i64_xxxx_i64:
765; AVX1:       # BB#0:
766; AVX1-NEXT:    movq (%rdi), %rax
767; AVX1-NEXT:    movq 8(%rdi), %rcx
768; AVX1-NEXT:    andl $1, %eax
769; AVX1-NEXT:    andl $1, %ecx
770; AVX1-NEXT:    movq 16(%rdi), %rdx
771; AVX1-NEXT:    andl $1, %edx
772; AVX1-NEXT:    movq 24(%rdi), %rsi
773; AVX1-NEXT:    andl $1, %esi
774; AVX1-NEXT:    vmovaps %xmm0, -{{[0-9]+}}(%rsp)
775; AVX1-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
776; AVX1-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
777; AVX1-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
778; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
779; AVX1-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
780; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
781; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
782; AVX1-NEXT:    retq
783;
784; AVX2-LABEL: mem_shuffle_v4i64_v2i64_xxxx_i64:
785; AVX2:       # BB#0:
786; AVX2-NEXT:    movq (%rdi), %rax
787; AVX2-NEXT:    movq 8(%rdi), %rcx
788; AVX2-NEXT:    andl $1, %eax
789; AVX2-NEXT:    andl $1, %ecx
790; AVX2-NEXT:    movq 16(%rdi), %rdx
791; AVX2-NEXT:    andl $1, %edx
792; AVX2-NEXT:    movq 24(%rdi), %rsi
793; AVX2-NEXT:    andl $1, %esi
794; AVX2-NEXT:    vmovaps %xmm0, -{{[0-9]+}}(%rsp)
795; AVX2-NEXT:    vmovq {{.*#+}} xmm0 = mem[0],zero
796; AVX2-NEXT:    vmovq {{.*#+}} xmm1 = mem[0],zero
797; AVX2-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
798; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
799; AVX2-NEXT:    vmovq {{.*#+}} xmm2 = mem[0],zero
800; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0]
801; AVX2-NEXT:    vinserti128 $1, %xmm1, %ymm0, %ymm0
802; AVX2-NEXT:    retq
803  %p0  = getelementptr inbounds i64, i64* %i, i32 0
804  %p1  = getelementptr inbounds i64, i64* %i, i32 1
805  %p2  = getelementptr inbounds i64, i64* %i, i32 2
806  %p3  = getelementptr inbounds i64, i64* %i, i32 3
807  %i0  = load i64, i64* %p0, align 4
808  %i1  = load i64, i64* %p1, align 4
809  %i2  = load i64, i64* %p2, align 4
810  %i3  = load i64, i64* %p3, align 4
811  %x0 = extractelement <2 x i64> %x, i64 %i0
812  %x1 = extractelement <2 x i64> %x, i64 %i1
813  %x2 = extractelement <2 x i64> %x, i64 %i2
814  %x3 = extractelement <2 x i64> %x, i64 %i3
815  %r0 = insertelement <4 x i64> undef, i64 %x0, i32 0
816  %r1 = insertelement <4 x i64>   %r0, i64 %x1, i32 1
817  %r2 = insertelement <4 x i64>   %r1, i64 %x2, i32 2
818  %r3 = insertelement <4 x i64>   %r2, i64 %x3, i32 3
819  ret <4 x i64> %r3
820}
821