1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mcpu=x86-64 -mattr=+avx512f | FileCheck %s --check-prefix=AVX512F 3; RUN: llc < %s -mcpu=x86-64 -mattr=+avx512bw -mattr=+avx512vl -mattr=+avx512dq| FileCheck %s --check-prefix=VL_BW_DQ 4 5target triple = "x86_64-unknown-unknown" 6 7define <2 x i1> @shuf2i1_1_0(<2 x i1> %a) { 8; AVX512F-LABEL: shuf2i1_1_0: 9; AVX512F: # BB#0: 10; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 11; AVX512F-NEXT: retq 12; 13; VL_BW_DQ-LABEL: shuf2i1_1_0: 14; VL_BW_DQ: # BB#0: 15; VL_BW_DQ-NEXT: vpsllq $63, %xmm0, %xmm0 16; VL_BW_DQ-NEXT: vptestmq %xmm0, %xmm0, %k0 17; VL_BW_DQ-NEXT: vpmovm2q %k0, %xmm0 18; VL_BW_DQ-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 19; VL_BW_DQ-NEXT: vpmovq2m %xmm0, %k0 20; VL_BW_DQ-NEXT: vpmovm2q %k0, %xmm0 21; VL_BW_DQ-NEXT: retq 22 %b = shufflevector <2 x i1> %a, <2 x i1> undef, <2 x i32> <i32 1, i32 0> 23 ret <2 x i1> %b 24} 25 26define <2 x i1> @shuf2i1_1_2(<2 x i1> %a) { 27; AVX512F-LABEL: shuf2i1_1_2: 28; AVX512F: # BB#0: 29; AVX512F-NEXT: movl $1, %eax 30; AVX512F-NEXT: vmovq %rax, %xmm1 31; AVX512F-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7] 32; AVX512F-NEXT: retq 33; 34; VL_BW_DQ-LABEL: shuf2i1_1_2: 35; VL_BW_DQ: # BB#0: 36; VL_BW_DQ-NEXT: vpsllq $63, %xmm0, %xmm0 37; VL_BW_DQ-NEXT: vptestmq %xmm0, %xmm0, %k0 38; VL_BW_DQ-NEXT: vpmovm2q %k0, %xmm0 39; VL_BW_DQ-NEXT: movb $1, %al 40; VL_BW_DQ-NEXT: kmovb %eax, %k0 41; VL_BW_DQ-NEXT: vpmovm2q %k0, %xmm1 42; VL_BW_DQ-NEXT: vpalignr {{.*#+}} xmm0 = xmm0[8,9,10,11,12,13,14,15],xmm1[0,1,2,3,4,5,6,7] 43; VL_BW_DQ-NEXT: vpmovq2m %xmm0, %k0 44; VL_BW_DQ-NEXT: vpmovm2q %k0, %xmm0 45; VL_BW_DQ-NEXT: retq 46 %b = shufflevector <2 x i1> %a, <2 x i1> <i1 1, i1 0>, <2 x i32> <i32 1, i32 2> 47 ret <2 x i1> %b 48} 49 50 51define <4 x i1> @shuf4i1_3_2_10(<4 x i1> %a) { 52; AVX512F-LABEL: shuf4i1_3_2_10: 53; AVX512F: # BB#0: 54; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,2,1,0] 55; AVX512F-NEXT: retq 56; 57; VL_BW_DQ-LABEL: shuf4i1_3_2_10: 58; VL_BW_DQ: # BB#0: 59; VL_BW_DQ-NEXT: vpslld $31, %xmm0, %xmm0 60; VL_BW_DQ-NEXT: vptestmd %xmm0, %xmm0, %k0 61; VL_BW_DQ-NEXT: vpmovm2d %k0, %xmm0 62; VL_BW_DQ-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,2,1,0] 63; VL_BW_DQ-NEXT: vpmovd2m %xmm0, %k0 64; VL_BW_DQ-NEXT: vpmovm2d %k0, %xmm0 65; VL_BW_DQ-NEXT: retq 66 %b = shufflevector <4 x i1> %a, <4 x i1> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 67 ret <4 x i1> %b 68} 69 70define <8 x i1> @shuf8i1_3_6_1_0_3_7_7_0(<8 x i64> %a, <8 x i64> %b, <8 x i64> %a1, <8 x i64> %b1) { 71; AVX512F-LABEL: shuf8i1_3_6_1_0_3_7_7_0: 72; AVX512F: # BB#0: 73; AVX512F-NEXT: vpcmpeqq %zmm2, %zmm0, %k1 74; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 75; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} {z} 76; AVX512F-NEXT: vmovdqa64 {{.*#+}} zmm2 = [3,6,1,0,3,7,7,0] 77; AVX512F-NEXT: vpermq %zmm1, %zmm2, %zmm1 78; AVX512F-NEXT: vpsllq $63, %zmm1, %zmm1 79; AVX512F-NEXT: vptestmq %zmm1, %zmm1, %k1 80; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 81; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 82; AVX512F-NEXT: retq 83; 84; VL_BW_DQ-LABEL: shuf8i1_3_6_1_0_3_7_7_0: 85; VL_BW_DQ: # BB#0: 86; VL_BW_DQ-NEXT: vpcmpeqq %zmm2, %zmm0, %k0 87; VL_BW_DQ-NEXT: vpmovm2q %k0, %zmm0 88; VL_BW_DQ-NEXT: vmovdqa64 {{.*#+}} zmm1 = [3,6,1,0,3,7,7,0] 89; VL_BW_DQ-NEXT: vpermq %zmm0, %zmm1, %zmm0 90; VL_BW_DQ-NEXT: vpmovq2m %zmm0, %k0 91; VL_BW_DQ-NEXT: vpmovm2w %k0, %xmm0 92; VL_BW_DQ-NEXT: retq 93 %a2 = icmp eq <8 x i64> %a, %a1 94 %b2 = icmp eq <8 x i64> %b, %b1 95 %c = shufflevector <8 x i1> %a2, <8 x i1> %b2, <8 x i32> <i32 3, i32 6, i32 1, i32 0, i32 3, i32 7, i32 7, i32 0> 96 ret <8 x i1> %c 97} 98 99define <16 x i1> @shuf16i1_3_6_22_12_3_7_7_0_3_6_1_13_3_21_7_0(<16 x i32> %a, <16 x i32> %b, <16 x i32> %a1, <16 x i32> %b1) { 100; AVX512F-LABEL: shuf16i1_3_6_22_12_3_7_7_0_3_6_1_13_3_21_7_0: 101; AVX512F: # BB#0: 102; AVX512F-NEXT: vpcmpeqd %zmm2, %zmm0, %k1 103; AVX512F-NEXT: vpcmpeqd %zmm3, %zmm1, %k2 104; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 105; AVX512F-NEXT: vmovdqa32 %zmm0, %zmm1 {%k2} {z} 106; AVX512F-NEXT: vmovdqa32 %zmm0, %zmm2 {%k1} {z} 107; AVX512F-NEXT: vmovdqa32 {{.*#+}} zmm3 = [3,6,22,12,3,7,7,0,3,6,1,13,3,21,7,0] 108; AVX512F-NEXT: vpermi2d %zmm1, %zmm2, %zmm3 109; AVX512F-NEXT: vpslld $31, %zmm3, %zmm1 110; AVX512F-NEXT: vptestmd %zmm1, %zmm1, %k1 111; AVX512F-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z} 112; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 113; AVX512F-NEXT: retq 114; 115; VL_BW_DQ-LABEL: shuf16i1_3_6_22_12_3_7_7_0_3_6_1_13_3_21_7_0: 116; VL_BW_DQ: # BB#0: 117; VL_BW_DQ-NEXT: vpcmpeqd %zmm2, %zmm0, %k0 118; VL_BW_DQ-NEXT: vpcmpeqd %zmm3, %zmm1, %k1 119; VL_BW_DQ-NEXT: vpmovm2d %k1, %zmm0 120; VL_BW_DQ-NEXT: vpmovm2d %k0, %zmm1 121; VL_BW_DQ-NEXT: vmovdqa32 {{.*#+}} zmm2 = [3,6,22,12,3,7,7,0,3,6,1,13,3,21,7,0] 122; VL_BW_DQ-NEXT: vpermi2d %zmm0, %zmm1, %zmm2 123; VL_BW_DQ-NEXT: vpmovd2m %zmm2, %k0 124; VL_BW_DQ-NEXT: vpmovm2b %k0, %xmm0 125; VL_BW_DQ-NEXT: retq 126 %a2 = icmp eq <16 x i32> %a, %a1 127 %b2 = icmp eq <16 x i32> %b, %b1 128 %c = shufflevector <16 x i1> %a2, <16 x i1> %b2, <16 x i32> <i32 3, i32 6, i32 22, i32 12, i32 3, i32 7, i32 7, i32 0, i32 3, i32 6, i32 1, i32 13, i32 3, i32 21, i32 7, i32 0> 129 ret <16 x i1> %c 130} 131 132define <32 x i1> @shuf32i1_3_6_22_12_3_7_7_0_3_6_1_13_3_21_7_0_3_6_22_12_3_7_7_0_3_6_1_13_3_21_7_0(<32 x i1> %a) { 133; AVX512F-LABEL: shuf32i1_3_6_22_12_3_7_7_0_3_6_1_13_3_21_7_0_3_6_22_12_3_7_7_0_3_6_1_13_3_21_7_0: 134; AVX512F: # BB#0: 135; AVX512F-NEXT: vperm2i128 {{.*#+}} ymm1 = ymm0[2,3,0,1] 136; AVX512F-NEXT: vpshufb {{.*#+}} ymm1 = ymm1[u,u,6,u,u,u,u,u,u,u,u,u,u,5,u,u,19,22,u,28,19,23,23,16,19,22,17,29,19,u,23,16] 137; AVX512F-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[3,6,u,12,3,7,7,0,3,6,1,13,3,u,7,0,u,u,22,u,u,u,u,u,u,u,u,u,u,21,u,u] 138; AVX512F-NEXT: vmovdqa {{.*#+}} ymm2 = [255,255,0,255,255,255,255,255,255,255,255,255,255,0,255,255,0,0,255,0,0,0,0,0,0,0,0,0,0,255,0,0] 139; AVX512F-NEXT: vpblendvb %ymm2, %ymm0, %ymm1, %ymm0 140; AVX512F-NEXT: retq 141; 142; VL_BW_DQ-LABEL: shuf32i1_3_6_22_12_3_7_7_0_3_6_1_13_3_21_7_0_3_6_22_12_3_7_7_0_3_6_1_13_3_21_7_0: 143; VL_BW_DQ: # BB#0: 144; VL_BW_DQ-NEXT: vpsllw $7, %ymm0, %ymm0 145; VL_BW_DQ-NEXT: vpmovb2m %ymm0, %k0 146; VL_BW_DQ-NEXT: vpmovm2w %k0, %zmm0 147; VL_BW_DQ-NEXT: vmovdqu16 {{.*#+}} zmm1 = [3,6,22,12,3,7,7,0,3,6,1,13,3,21,7,0,3,6,22,12,3,7,7,0,3,6,1,13,3,21,7,0] 148; VL_BW_DQ-NEXT: vpermw %zmm0, %zmm1, %zmm0 149; VL_BW_DQ-NEXT: vpmovw2m %zmm0, %k0 150; VL_BW_DQ-NEXT: vpmovm2b %k0, %ymm0 151; VL_BW_DQ-NEXT: retq 152 %b = shufflevector <32 x i1> %a, <32 x i1> undef, <32 x i32> <i32 3, i32 6, i32 22, i32 12, i32 3, i32 7, i32 7, i32 0, i32 3, i32 6, i32 1, i32 13, i32 3, i32 21, i32 7, i32 0, i32 3, i32 6, i32 22, i32 12, i32 3, i32 7, i32 7, i32 0, i32 3, i32 6, i32 1, i32 13, i32 3, i32 21, i32 7, i32 0> 153 ret <32 x i1> %b 154} 155 156define <8 x i1> @shuf8i1_u_2_u_u_2_u_2_u(i8 %a) { 157; AVX512F-LABEL: shuf8i1_u_2_u_u_2_u_2_u: 158; AVX512F: # BB#0: 159; AVX512F-NEXT: kmovw %edi, %k1 160; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 161; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} {z} 162; AVX512F-NEXT: vextracti32x4 $1, %zmm1, %xmm1 163; AVX512F-NEXT: vpbroadcastq %xmm1, %zmm1 164; AVX512F-NEXT: vpsllq $63, %zmm1, %zmm1 165; AVX512F-NEXT: vptestmq %zmm1, %zmm1, %k1 166; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 167; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 168; AVX512F-NEXT: retq 169; 170; VL_BW_DQ-LABEL: shuf8i1_u_2_u_u_2_u_2_u: 171; VL_BW_DQ: # BB#0: 172; VL_BW_DQ-NEXT: kmovb %edi, %k0 173; VL_BW_DQ-NEXT: vpmovm2q %k0, %zmm0 174; VL_BW_DQ-NEXT: vextracti64x2 $1, %zmm0, %xmm0 175; VL_BW_DQ-NEXT: vpbroadcastq %xmm0, %zmm0 176; VL_BW_DQ-NEXT: vpmovq2m %zmm0, %k0 177; VL_BW_DQ-NEXT: vpmovm2w %k0, %xmm0 178; VL_BW_DQ-NEXT: retq 179 %b = bitcast i8 %a to <8 x i1> 180 %c = shufflevector < 8 x i1> %b, <8 x i1>undef, <8 x i32> <i32 undef, i32 2, i32 undef, i32 undef, i32 2, i32 undef, i32 2, i32 undef> 181 ret <8 x i1> %c 182} 183 184define i8 @shuf8i1_10_2_9_u_3_u_2_u(i8 %a) { 185; AVX512F-LABEL: shuf8i1_10_2_9_u_3_u_2_u: 186; AVX512F: # BB#0: 187; AVX512F-NEXT: kmovw %edi, %k1 188; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 189; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 190; AVX512F-NEXT: vpxord %zmm1, %zmm1, %zmm1 191; AVX512F-NEXT: vmovdqa64 {{.*#+}} zmm2 = <8,2,10,u,3,u,2,u> 192; AVX512F-NEXT: vpermi2q %zmm1, %zmm0, %zmm2 193; AVX512F-NEXT: vpsllq $63, %zmm2, %zmm0 194; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0 195; AVX512F-NEXT: kmovw %k0, %eax 196; AVX512F-NEXT: retq 197; 198; VL_BW_DQ-LABEL: shuf8i1_10_2_9_u_3_u_2_u: 199; VL_BW_DQ: # BB#0: 200; VL_BW_DQ-NEXT: kmovb %edi, %k0 201; VL_BW_DQ-NEXT: vpmovm2q %k0, %zmm0 202; VL_BW_DQ-NEXT: vpxord %zmm1, %zmm1, %zmm1 203; VL_BW_DQ-NEXT: vmovdqa64 {{.*#+}} zmm2 = <8,2,10,u,3,u,2,u> 204; VL_BW_DQ-NEXT: vpermi2q %zmm1, %zmm0, %zmm2 205; VL_BW_DQ-NEXT: vpmovq2m %zmm2, %k0 206; VL_BW_DQ-NEXT: kmovb %k0, %eax 207; VL_BW_DQ-NEXT: retq 208 %b = bitcast i8 %a to <8 x i1> 209 %c = shufflevector < 8 x i1> %b, <8 x i1> zeroinitializer, <8 x i32> <i32 10, i32 2, i32 9, i32 undef, i32 3, i32 undef, i32 2, i32 undef> 210 %d = bitcast <8 x i1> %c to i8 211 ret i8 %d 212} 213 214define i8 @shuf8i1_0_1_4_5_u_u_u_u(i8 %a) { 215; AVX512F-LABEL: shuf8i1_0_1_4_5_u_u_u_u: 216; AVX512F: # BB#0: 217; AVX512F-NEXT: kmovw %edi, %k1 218; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 219; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 220; AVX512F-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm0[0,1,4,5,0,1,0,1] 221; AVX512F-NEXT: vpsllq $63, %zmm0, %zmm0 222; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0 223; AVX512F-NEXT: kmovw %k0, %eax 224; AVX512F-NEXT: retq 225; 226; VL_BW_DQ-LABEL: shuf8i1_0_1_4_5_u_u_u_u: 227; VL_BW_DQ: # BB#0: 228; VL_BW_DQ-NEXT: kmovb %edi, %k0 229; VL_BW_DQ-NEXT: vpmovm2q %k0, %zmm0 230; VL_BW_DQ-NEXT: vshufi64x2 {{.*#+}} zmm0 = zmm0[0,1,4,5,0,1,0,1] 231; VL_BW_DQ-NEXT: vpmovq2m %zmm0, %k0 232; VL_BW_DQ-NEXT: kmovb %k0, %eax 233; VL_BW_DQ-NEXT: retq 234 %b = bitcast i8 %a to <8 x i1> 235 %c = shufflevector < 8 x i1> %b, <8 x i1> undef, <8 x i32> <i32 0, i32 1, i32 4, i32 5, i32 undef, i32 undef, i32 undef, i32 undef> 236 %d = bitcast <8 x i1> %c to i8 237 ret i8 %d 238} 239 240define i8 @shuf8i1_9_6_1_0_3_7_7_0(i8 %a) { 241; AVX512F-LABEL: shuf8i1_9_6_1_0_3_7_7_0: 242; AVX512F: # BB#0: 243; AVX512F-NEXT: kmovw %edi, %k1 244; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 245; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 246; AVX512F-NEXT: vpxord %zmm1, %zmm1, %zmm1 247; AVX512F-NEXT: vmovdqa64 {{.*#+}} zmm2 = [8,6,1,0,3,7,7,0] 248; AVX512F-NEXT: vpermi2q %zmm1, %zmm0, %zmm2 249; AVX512F-NEXT: vpsllq $63, %zmm2, %zmm0 250; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0 251; AVX512F-NEXT: kmovw %k0, %eax 252; AVX512F-NEXT: retq 253; 254; VL_BW_DQ-LABEL: shuf8i1_9_6_1_0_3_7_7_0: 255; VL_BW_DQ: # BB#0: 256; VL_BW_DQ-NEXT: kmovb %edi, %k0 257; VL_BW_DQ-NEXT: vpmovm2q %k0, %zmm0 258; VL_BW_DQ-NEXT: vpxord %zmm1, %zmm1, %zmm1 259; VL_BW_DQ-NEXT: vmovdqa64 {{.*#+}} zmm2 = [8,6,1,0,3,7,7,0] 260; VL_BW_DQ-NEXT: vpermi2q %zmm1, %zmm0, %zmm2 261; VL_BW_DQ-NEXT: vpmovq2m %zmm2, %k0 262; VL_BW_DQ-NEXT: kmovb %k0, %eax 263; VL_BW_DQ-NEXT: retq 264 %b = bitcast i8 %a to <8 x i1> 265 %c = shufflevector <8 x i1> %b, <8 x i1> zeroinitializer, <8 x i32> <i32 9, i32 6, i32 1, i32 0, i32 3, i32 7, i32 7, i32 0> 266 %d = bitcast <8 x i1>%c to i8 267 ret i8 %d 268} 269 270define i8 @shuf8i1_9_6_1_10_3_7_7_0(i8 %a) { 271; AVX512F-LABEL: shuf8i1_9_6_1_10_3_7_7_0: 272; AVX512F: # BB#0: 273; AVX512F-NEXT: kmovw %edi, %k1 274; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 275; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 276; AVX512F-NEXT: vmovdqa64 {{.*#+}} zmm1 = [9,1,2,10,4,5,6,7] 277; AVX512F-NEXT: vpxord %zmm2, %zmm2, %zmm2 278; AVX512F-NEXT: vpermt2q %zmm0, %zmm1, %zmm2 279; AVX512F-NEXT: vpsllq $63, %zmm2, %zmm0 280; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0 281; AVX512F-NEXT: kmovw %k0, %eax 282; AVX512F-NEXT: retq 283; 284; VL_BW_DQ-LABEL: shuf8i1_9_6_1_10_3_7_7_0: 285; VL_BW_DQ: # BB#0: 286; VL_BW_DQ-NEXT: kmovb %edi, %k0 287; VL_BW_DQ-NEXT: vpmovm2q %k0, %zmm0 288; VL_BW_DQ-NEXT: vmovdqa64 {{.*#+}} zmm1 = [9,1,2,10,4,5,6,7] 289; VL_BW_DQ-NEXT: vpxord %zmm2, %zmm2, %zmm2 290; VL_BW_DQ-NEXT: vpermt2q %zmm0, %zmm1, %zmm2 291; VL_BW_DQ-NEXT: vpmovq2m %zmm2, %k0 292; VL_BW_DQ-NEXT: kmovb %k0, %eax 293; VL_BW_DQ-NEXT: retq 294 %b = bitcast i8 %a to <8 x i1> 295 %c = shufflevector <8 x i1> zeroinitializer, <8 x i1> %b, <8 x i32> <i32 9, i32 6, i32 1, i32 10, i32 3, i32 7, i32 7, i32 0> 296 %d = bitcast <8 x i1>%c to i8 297 ret i8 %d 298} 299 300define i8 @shuf8i1__9_6_1_10_3_7_7_1(i8 %a) { 301; AVX512F-LABEL: shuf8i1__9_6_1_10_3_7_7_1: 302; AVX512F: # BB#0: 303; AVX512F-NEXT: kmovw %edi, %k1 304; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 305; AVX512F-NEXT: movb $51, %al 306; AVX512F-NEXT: kmovw %eax, %k2 307; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm1 {%k2} {z} 308; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 309; AVX512F-NEXT: vmovdqa64 {{.*#+}} zmm2 = [9,6,1,0,3,7,7,1] 310; AVX512F-NEXT: vpermi2q %zmm0, %zmm1, %zmm2 311; AVX512F-NEXT: vpsllq $63, %zmm2, %zmm0 312; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0 313; AVX512F-NEXT: kmovw %k0, %eax 314; AVX512F-NEXT: retq 315; 316; VL_BW_DQ-LABEL: shuf8i1__9_6_1_10_3_7_7_1: 317; VL_BW_DQ: # BB#0: 318; VL_BW_DQ-NEXT: kmovb %edi, %k0 319; VL_BW_DQ-NEXT: movb $51, %al 320; VL_BW_DQ-NEXT: kmovb %eax, %k1 321; VL_BW_DQ-NEXT: vpmovm2q %k1, %zmm0 322; VL_BW_DQ-NEXT: vpmovm2q %k0, %zmm1 323; VL_BW_DQ-NEXT: vmovdqa64 {{.*#+}} zmm2 = [9,6,1,0,3,7,7,1] 324; VL_BW_DQ-NEXT: vpermi2q %zmm1, %zmm0, %zmm2 325; VL_BW_DQ-NEXT: vpmovq2m %zmm2, %k0 326; VL_BW_DQ-NEXT: kmovb %k0, %eax 327; VL_BW_DQ-NEXT: retq 328 %b = bitcast i8 %a to <8 x i1> 329 %c = shufflevector <8 x i1> <i1 1, i1 1, i1 0, i1 0, i1 1, i1 1, i1 0, i1 0>, <8 x i1> %b, <8 x i32> <i32 9, i32 6, i32 1, i32 0, i32 3, i32 7, i32 7, i32 1> 330 %c1 = bitcast <8 x i1>%c to i8 331 ret i8 %c1 332} 333 334define i8 @shuf8i1_9_6_1_10_3_7_7_0_all_ones(<8 x i1> %a) { 335; AVX512F-LABEL: shuf8i1_9_6_1_10_3_7_7_0_all_ones: 336; AVX512F: # BB#0: 337; AVX512F-NEXT: vpmovsxwq %xmm0, %zmm0 338; AVX512F-NEXT: vpsllq $63, %zmm0, %zmm0 339; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k1 340; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 341; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm1 {%k1} {z} 342; AVX512F-NEXT: vmovdqa64 {{.*#+}} zmm2 = [9,1,2,3,4,5,6,7] 343; AVX512F-NEXT: vpermi2q %zmm1, %zmm0, %zmm2 344; AVX512F-NEXT: vpsllq $63, %zmm2, %zmm0 345; AVX512F-NEXT: vptestmq %zmm0, %zmm0, %k0 346; AVX512F-NEXT: kmovw %k0, %eax 347; AVX512F-NEXT: retq 348; 349; VL_BW_DQ-LABEL: shuf8i1_9_6_1_10_3_7_7_0_all_ones: 350; VL_BW_DQ: # BB#0: 351; VL_BW_DQ-NEXT: vpsllw $15, %xmm0, %xmm0 352; VL_BW_DQ-NEXT: vpmovw2m %xmm0, %k0 353; VL_BW_DQ-NEXT: vpmovm2q %k0, %zmm0 354; VL_BW_DQ-NEXT: vmovdqa64 {{.*#+}} zmm1 = [9,1,2,3,4,5,6,7] 355; VL_BW_DQ-NEXT: vpternlogd $255, %zmm2, %zmm2, %zmm2 356; VL_BW_DQ-NEXT: vpermt2q %zmm0, %zmm1, %zmm2 357; VL_BW_DQ-NEXT: vpmovq2m %zmm2, %k0 358; VL_BW_DQ-NEXT: kmovb %k0, %eax 359; VL_BW_DQ-NEXT: retq 360 %c = shufflevector <8 x i1> <i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1, i1 1>, <8 x i1> %a, <8 x i32> <i32 9, i32 6, i32 1, i32 0, i32 3, i32 7, i32 7, i32 0> 361 %c1 = bitcast <8 x i1>%c to i8 362 ret i8 %c1 363} 364 365 366define i16 @shuf16i1_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0(i16 %a) { 367; AVX512F-LABEL: shuf16i1_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0: 368; AVX512F: # BB#0: 369; AVX512F-NEXT: kmovw %edi, %k1 370; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 371; AVX512F-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z} 372; AVX512F-NEXT: vpbroadcastd %xmm0, %zmm0 373; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0 374; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k0 375; AVX512F-NEXT: kmovw %k0, %eax 376; AVX512F-NEXT: retq 377; 378; VL_BW_DQ-LABEL: shuf16i1_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0_0: 379; VL_BW_DQ: # BB#0: 380; VL_BW_DQ-NEXT: kmovw %edi, %k0 381; VL_BW_DQ-NEXT: vpmovm2d %k0, %zmm0 382; VL_BW_DQ-NEXT: vpbroadcastd %xmm0, %zmm0 383; VL_BW_DQ-NEXT: vpmovd2m %zmm0, %k0 384; VL_BW_DQ-NEXT: kmovw %k0, %eax 385; VL_BW_DQ-NEXT: retq 386 %b = bitcast i16 %a to <16 x i1> 387 %c = shufflevector < 16 x i1> %b, <16 x i1> undef, <16 x i32> zeroinitializer 388 %d = bitcast <16 x i1> %c to i16 389 ret i16 %d 390} 391 392define i64 @shuf64i1_zero(i64 %a) { 393; AVX512F-LABEL: shuf64i1_zero: 394; AVX512F: # BB#0: 395; AVX512F-NEXT: pushq %rbp 396; AVX512F-NEXT: .Lcfi0: 397; AVX512F-NEXT: .cfi_def_cfa_offset 16 398; AVX512F-NEXT: .Lcfi1: 399; AVX512F-NEXT: .cfi_offset %rbp, -16 400; AVX512F-NEXT: movq %rsp, %rbp 401; AVX512F-NEXT: .Lcfi2: 402; AVX512F-NEXT: .cfi_def_cfa_register %rbp 403; AVX512F-NEXT: andq $-32, %rsp 404; AVX512F-NEXT: subq $96, %rsp 405; AVX512F-NEXT: movl %edi, {{[0-9]+}}(%rsp) 406; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 407; AVX512F-NEXT: kmovw {{[0-9]+}}(%rsp), %k1 408; AVX512F-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z} 409; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 410; AVX512F-NEXT: vpbroadcastb %xmm0, %ymm0 411; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1 412; AVX512F-NEXT: vpmovsxbd %xmm1, %zmm1 413; AVX512F-NEXT: vpslld $31, %zmm1, %zmm1 414; AVX512F-NEXT: vptestmd %zmm1, %zmm1, %k0 415; AVX512F-NEXT: kmovw %k0, {{[0-9]+}}(%rsp) 416; AVX512F-NEXT: vpmovsxbd %xmm0, %zmm0 417; AVX512F-NEXT: vpslld $31, %zmm0, %zmm0 418; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k0 419; AVX512F-NEXT: kmovw %k0, (%rsp) 420; AVX512F-NEXT: movl (%rsp), %ecx 421; AVX512F-NEXT: movq %rcx, %rax 422; AVX512F-NEXT: shlq $32, %rax 423; AVX512F-NEXT: orq %rcx, %rax 424; AVX512F-NEXT: movq %rbp, %rsp 425; AVX512F-NEXT: popq %rbp 426; AVX512F-NEXT: retq 427; 428; VL_BW_DQ-LABEL: shuf64i1_zero: 429; VL_BW_DQ: # BB#0: 430; VL_BW_DQ-NEXT: kmovq %rdi, %k0 431; VL_BW_DQ-NEXT: vpmovm2b %k0, %zmm0 432; VL_BW_DQ-NEXT: vpbroadcastb %xmm0, %zmm0 433; VL_BW_DQ-NEXT: vpmovb2m %zmm0, %k0 434; VL_BW_DQ-NEXT: kmovq %k0, %rax 435; VL_BW_DQ-NEXT: retq 436 %b = bitcast i64 %a to <64 x i1> 437 %c = shufflevector < 64 x i1> %b, <64 x i1> undef, <64 x i32> zeroinitializer 438 %d = bitcast <64 x i1> %c to i64 439 ret i64 %d 440} 441