1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-darwin -mattr=+mmx,+sse2 | FileCheck --check-prefix=X32 %s
3; RUN: llc < %s -mtriple=x86_64-darwin -mattr=+mmx,+sse2 | FileCheck --check-prefix=X64 %s
4
5; If there is no explicit MMX type usage, always promote to XMM.
6
7define void @test0(<1 x i64>* %x) {
8; X32-LABEL: test0:
9; X32:       ## BB#0: ## %entry
10; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
11; X32-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
12; X32-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
13; X32-NEXT:    movq %xmm0, (%eax)
14; X32-NEXT:    retl
15;
16; X64-LABEL: test0:
17; X64:       ## BB#0: ## %entry
18; X64-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
19; X64-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
20; X64-NEXT:    movq %xmm0, (%rdi)
21; X64-NEXT:    retq
22entry:
23  %tmp2 = load <1 x i64>, <1 x i64>* %x
24  %tmp6 = bitcast <1 x i64> %tmp2 to <2 x i32>
25  %tmp9 = shufflevector <2 x i32> %tmp6, <2 x i32> undef, <2 x i32> < i32 1, i32 1 >
26  %tmp10 = bitcast <2 x i32> %tmp9 to <1 x i64>
27  store <1 x i64> %tmp10, <1 x i64>* %x
28  ret void
29}
30
31define void @test1() {
32; X32-LABEL: test1:
33; X32:       ## BB#0: ## %entry
34; X32-NEXT:    pushl %edi
35; X32-NEXT:  Lcfi0:
36; X32-NEXT:    .cfi_def_cfa_offset 8
37; X32-NEXT:    subl $16, %esp
38; X32-NEXT:  Lcfi1:
39; X32-NEXT:    .cfi_def_cfa_offset 24
40; X32-NEXT:  Lcfi2:
41; X32-NEXT:    .cfi_offset %edi, -8
42; X32-NEXT:    xorps %xmm0, %xmm0
43; X32-NEXT:    movlps %xmm0, (%esp)
44; X32-NEXT:    movq (%esp), %mm0
45; X32-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
46; X32-NEXT:    movsd %xmm0, {{[0-9]+}}(%esp)
47; X32-NEXT:    movq {{[0-9]+}}(%esp), %mm1
48; X32-NEXT:    xorl %edi, %edi
49; X32-NEXT:    maskmovq %mm1, %mm0
50; X32-NEXT:    addl $16, %esp
51; X32-NEXT:    popl %edi
52; X32-NEXT:    retl
53;
54; X64-LABEL: test1:
55; X64:       ## BB#0: ## %entry
56; X64-NEXT:    xorps %xmm0, %xmm0
57; X64-NEXT:    movlps %xmm0, -{{[0-9]+}}(%rsp)
58; X64-NEXT:    movq -{{[0-9]+}}(%rsp), %mm0
59; X64-NEXT:    movq {{.*}}(%rip), %rax
60; X64-NEXT:    movq %rax, -{{[0-9]+}}(%rsp)
61; X64-NEXT:    movq -{{[0-9]+}}(%rsp), %mm1
62; X64-NEXT:    xorl %edi, %edi
63; X64-NEXT:    maskmovq %mm1, %mm0
64; X64-NEXT:    retq
65entry:
66  %tmp528 = bitcast <8 x i8> zeroinitializer to <2 x i32>
67  %tmp529 = and <2 x i32> %tmp528, bitcast (<4 x i16> < i16 -32640, i16 16448, i16 8224, i16 4112 > to <2 x i32>)
68  %tmp542 = bitcast <2 x i32> %tmp529 to <4 x i16>
69  %tmp543 = add <4 x i16> %tmp542, < i16 0, i16 16448, i16 24672, i16 28784 >
70  %tmp555 = bitcast <4 x i16> %tmp543 to <8 x i8>
71  %tmp556 = bitcast <8 x i8> %tmp555 to x86_mmx
72  %tmp557 = bitcast <8 x i8> zeroinitializer to x86_mmx
73  tail call void @llvm.x86.mmx.maskmovq( x86_mmx %tmp557, x86_mmx %tmp556, i8* null)
74  ret void
75}
76
77@tmp_V2i = common global <2 x i32> zeroinitializer
78
79define void @test2() nounwind {
80; X32-LABEL: test2:
81; X32:       ## BB#0: ## %entry
82; X32-NEXT:    movl L_tmp_V2i$non_lazy_ptr, %eax
83; X32-NEXT:    movsd {{.*#+}} xmm0 = mem[0],zero
84; X32-NEXT:    unpcklps {{.*#+}} xmm0 = xmm0[0,0,1,1]
85; X32-NEXT:    movlps %xmm0, (%eax)
86; X32-NEXT:    retl
87;
88; X64-LABEL: test2:
89; X64:       ## BB#0: ## %entry
90; X64-NEXT:    movq _tmp_V2i@{{.*}}(%rip), %rax
91; X64-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
92; X64-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[0,0,1,1]
93; X64-NEXT:    movq %xmm0, (%rax)
94; X64-NEXT:    retq
95entry:
96  %0 = load <2 x i32>, <2 x i32>* @tmp_V2i, align 8
97  %1 = shufflevector <2 x i32> %0, <2 x i32> undef, <2 x i32> zeroinitializer
98  store <2 x i32> %1, <2 x i32>* @tmp_V2i, align 8
99  ret void
100}
101
102declare void @llvm.x86.mmx.maskmovq(x86_mmx, x86_mmx, i8*)
103