1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+avx512vl,+avx512dq | FileCheck %s --check-prefix=CHECK
3
4define <4 x i32> @mask_shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b, <4 x i32> %passthru, i8 %mask) {
5; CHECK-LABEL: mask_shuffle_v4i32_1234:
6; CHECK:       # BB#0:
7; CHECK-NEXT:    kmovb %edi, %k1
8; CHECK-NEXT:    valignd {{.*#+}} xmm2 {%k1} = xmm0[1,2,3],xmm1[0]
9; CHECK-NEXT:    vmovdqa64 %xmm2, %xmm0
10; CHECK-NEXT:    retq
11  %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
12  %mask.cast = bitcast i8 %mask to <8 x i1>
13  %mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
14  %res = select <4 x i1> %mask.extract, <4 x i32> %shuffle, <4 x i32> %passthru
15  ret <4 x i32> %res
16}
17
18define <4 x i32> @maskz_shuffle_v4i32_1234(<4 x i32> %a, <4 x i32> %b, i8 %mask) {
19; CHECK-LABEL: maskz_shuffle_v4i32_1234:
20; CHECK:       # BB#0:
21; CHECK-NEXT:    kmovb %edi, %k1
22; CHECK-NEXT:    valignd {{.*#+}} xmm0 {%k1} {z} = xmm0[1,2,3],xmm1[0]
23; CHECK-NEXT:    retq
24  %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
25  %mask.cast = bitcast i8 %mask to <8 x i1>
26  %mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
27  %res = select <4 x i1> %mask.extract, <4 x i32> %shuffle, <4 x i32> zeroinitializer
28  ret <4 x i32> %res
29}
30
31define <4 x i32> @mask_shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b, <4 x i32> %passthru, i8 %mask) {
32; CHECK-LABEL: mask_shuffle_v4i32_2345:
33; CHECK:       # BB#0:
34; CHECK-NEXT:    kmovb %edi, %k1
35; CHECK-NEXT:    valignd {{.*#+}} xmm2 {%k1} = xmm0[2,3],xmm1[0,1]
36; CHECK-NEXT:    vmovdqa64 %xmm2, %xmm0
37; CHECK-NEXT:    retq
38  %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
39  %mask.cast = bitcast i8 %mask to <8 x i1>
40  %mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
41  %res = select <4 x i1> %mask.extract, <4 x i32> %shuffle, <4 x i32> %passthru
42  ret <4 x i32> %res
43}
44
45define <4 x i32> @maskz_shuffle_v4i32_2345(<4 x i32> %a, <4 x i32> %b, i8 %mask) {
46; CHECK-LABEL: maskz_shuffle_v4i32_2345:
47; CHECK:       # BB#0:
48; CHECK-NEXT:    kmovb %edi, %k1
49; CHECK-NEXT:    valignd {{.*#+}} xmm0 {%k1} {z} = xmm0[2,3],xmm1[0,1]
50; CHECK-NEXT:    retq
51  %shuffle = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 2, i32 3, i32 4, i32 5>
52  %mask.cast = bitcast i8 %mask to <8 x i1>
53  %mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
54  %res = select <4 x i1> %mask.extract, <4 x i32> %shuffle, <4 x i32> zeroinitializer
55  ret <4 x i32> %res
56}
57
58define <2 x i64> @mask_shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b, <2 x i64> %passthru, i8 %mask) {
59; CHECK-LABEL: mask_shuffle_v2i64_12:
60; CHECK:       # BB#0:
61; CHECK-NEXT:    kmovb %edi, %k1
62; CHECK-NEXT:    valignq {{.*#+}} xmm2 {%k1} = xmm0[1],xmm1[0]
63; CHECK-NEXT:    vmovdqa64 %xmm2, %xmm0
64; CHECK-NEXT:    retq
65  %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
66  %mask.cast = bitcast i8 %mask to <8 x i1>
67  %mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <2 x i32> <i32 0, i32 1>
68  %res = select <2 x i1> %mask.extract, <2 x i64> %shuffle, <2 x i64> %passthru
69  ret <2 x i64> %res
70}
71
72define <2 x i64> @maskz_shuffle_v2i64_12(<2 x i64> %a, <2 x i64> %b, i8 %mask) {
73; CHECK-LABEL: maskz_shuffle_v2i64_12:
74; CHECK:       # BB#0:
75; CHECK-NEXT:    kmovb %edi, %k1
76; CHECK-NEXT:    valignq {{.*#+}} xmm0 {%k1} {z} = xmm0[1],xmm1[0]
77; CHECK-NEXT:    retq
78  %shuffle = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>
79  %mask.cast = bitcast i8 %mask to <8 x i1>
80  %mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <2 x i32> <i32 0, i32 1>
81  %res = select <2 x i1> %mask.extract, <2 x i64> %shuffle, <2 x i64> zeroinitializer
82  ret <2 x i64> %res
83}
84
85define <4 x i64> @mask_shuffle_v4i64_1234(<4 x i64> %a, <4 x i64> %b, <4 x i64> %passthru, i8 %mask) {
86; CHECK-LABEL: mask_shuffle_v4i64_1234:
87; CHECK:       # BB#0:
88; CHECK-NEXT:    kmovb %edi, %k1
89; CHECK-NEXT:    valignq {{.*#+}} ymm2 {%k1} = ymm0[1,2,3],ymm1[0]
90; CHECK-NEXT:    vmovdqa64 %ymm2, %ymm0
91; CHECK-NEXT:    retq
92  %shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
93  %mask.cast = bitcast i8 %mask to <8 x i1>
94  %mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
95  %res = select <4 x i1> %mask.extract, <4 x i64> %shuffle, <4 x i64> %passthru
96  ret <4 x i64> %res
97}
98
99define <4 x i64> @maskz_shuffle_v4i64_1234(<4 x i64> %a, <4 x i64> %b, i8 %mask) {
100; CHECK-LABEL: maskz_shuffle_v4i64_1234:
101; CHECK:       # BB#0:
102; CHECK-NEXT:    kmovb %edi, %k1
103; CHECK-NEXT:    valignq {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3],ymm1[0]
104; CHECK-NEXT:    retq
105  %shuffle = shufflevector <4 x i64> %a, <4 x i64> %b, <4 x i32> <i32 1, i32 2, i32 3, i32 4>
106  %mask.cast = bitcast i8 %mask to <8 x i1>
107  %mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
108  %res = select <4 x i1> %mask.extract, <4 x i64> %shuffle, <4 x i64> zeroinitializer
109  ret <4 x i64> %res
110}
111
112define <4 x i64> @mask_shuffle_v4i64_1230(<4 x i64> %a, <4 x i64> %passthru, i8 %mask) {
113; CHECK-LABEL: mask_shuffle_v4i64_1230:
114; CHECK:       # BB#0:
115; CHECK-NEXT:    kmovb %edi, %k1
116; CHECK-NEXT:    vpermq {{.*#+}} ymm1 {%k1} = ymm0[1,2,3,0]
117; CHECK-NEXT:    vmovdqa64 %ymm1, %ymm0
118; CHECK-NEXT:    retq
119  %shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
120  %mask.cast = bitcast i8 %mask to <8 x i1>
121  %mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
122  %res = select <4 x i1> %mask.extract, <4 x i64> %shuffle, <4 x i64> %passthru
123  ret <4 x i64> %res
124}
125
126define <4 x i64> @maskz_shuffle_v4i64_1230(<4 x i64> %a, i8 %mask) {
127; CHECK-LABEL: maskz_shuffle_v4i64_1230:
128; CHECK:       # BB#0:
129; CHECK-NEXT:    kmovb %edi, %k1
130; CHECK-NEXT:    vpermq {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3,0]
131; CHECK-NEXT:    retq
132  %shuffle = shufflevector <4 x i64> %a, <4 x i64> undef, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
133  %mask.cast = bitcast i8 %mask to <8 x i1>
134  %mask.extract = shufflevector <8 x i1> %mask.cast, <8 x i1> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
135  %res = select <4 x i1> %mask.extract, <4 x i64> %shuffle, <4 x i64> zeroinitializer
136  ret <4 x i64> %res
137}
138
139define <8 x i32> @mask_shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b, <8 x i32> %passthru, i8 %mask) {
140; CHECK-LABEL: mask_shuffle_v8i32_12345678:
141; CHECK:       # BB#0:
142; CHECK-NEXT:    kmovb %edi, %k1
143; CHECK-NEXT:    valignd {{.*#+}} ymm2 {%k1} = ymm0[1,2,3,4,5,6,7],ymm1[0]
144; CHECK-NEXT:    vmovdqa64 %ymm2, %ymm0
145; CHECK-NEXT:    retq
146  %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
147  %mask.cast = bitcast i8 %mask to <8 x i1>
148  %res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> %passthru
149  ret <8 x i32> %res
150}
151
152define <8 x i32> @maskz_shuffle_v8i32_12345678(<8 x i32> %a, <8 x i32> %b, i8 %mask) {
153; CHECK-LABEL: maskz_shuffle_v8i32_12345678:
154; CHECK:       # BB#0:
155; CHECK-NEXT:    kmovb %edi, %k1
156; CHECK-NEXT:    valignd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3,4,5,6,7],ymm1[0]
157; CHECK-NEXT:    retq
158  %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>
159  %mask.cast = bitcast i8 %mask to <8 x i1>
160  %res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> zeroinitializer
161  ret <8 x i32> %res
162}
163
164define <8 x i32> @mask_shuffle_v8i32_23456789(<8 x i32> %a, <8 x i32> %b, <8 x i32> %passthru, i8 %mask) {
165; CHECK-LABEL: mask_shuffle_v8i32_23456789:
166; CHECK:       # BB#0:
167; CHECK-NEXT:    kmovb %edi, %k1
168; CHECK-NEXT:    valignd {{.*#+}} ymm2 {%k1} = ymm0[2,3,4,5,6,7],ymm1[0,1]
169; CHECK-NEXT:    vmovdqa64 %ymm2, %ymm0
170; CHECK-NEXT:    retq
171  %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
172  %mask.cast = bitcast i8 %mask to <8 x i1>
173  %res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> %passthru
174  ret <8 x i32> %res
175}
176
177define <8 x i32> @maskz_shuffle_v8i32_23456789(<8 x i32> %a, <8 x i32> %b, i8 %mask) {
178; CHECK-LABEL: maskz_shuffle_v8i32_23456789:
179; CHECK:       # BB#0:
180; CHECK-NEXT:    kmovb %edi, %k1
181; CHECK-NEXT:    valignd {{.*#+}} ymm0 {%k1} {z} = ymm0[2,3,4,5,6,7],ymm1[0,1]
182; CHECK-NEXT:    retq
183  %shuffle = shufflevector <8 x i32> %a, <8 x i32> %b, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>
184  %mask.cast = bitcast i8 %mask to <8 x i1>
185  %res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> zeroinitializer
186  ret <8 x i32> %res
187}
188
189define <8 x i32> @mask_shuffle_v8i32_12345670(<8 x i32> %a, <8 x i32> %passthru, i8 %mask) {
190; CHECK-LABEL: mask_shuffle_v8i32_12345670:
191; CHECK:       # BB#0:
192; CHECK-NEXT:    kmovb %edi, %k1
193; CHECK-NEXT:    valignd {{.*#+}} ymm1 {%k1} = ymm0[1,2,3,4,5,6,7,0]
194; CHECK-NEXT:    vmovdqa64 %ymm1, %ymm0
195; CHECK-NEXT:    retq
196  %shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0>
197  %mask.cast = bitcast i8 %mask to <8 x i1>
198  %res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> %passthru
199  ret <8 x i32> %res
200}
201
202define <8 x i32> @maskz_shuffle_v8i32_12345670(<8 x i32> %a, i8 %mask) {
203; CHECK-LABEL: maskz_shuffle_v8i32_12345670:
204; CHECK:       # BB#0:
205; CHECK-NEXT:    kmovb %edi, %k1
206; CHECK-NEXT:    valignd {{.*#+}} ymm0 {%k1} {z} = ymm0[1,2,3,4,5,6,7,0]
207; CHECK-NEXT:    retq
208  %shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0>
209  %mask.cast = bitcast i8 %mask to <8 x i1>
210  %res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> zeroinitializer
211  ret <8 x i32> %res
212}
213
214define <8 x i32> @mask_shuffle_v8i32_23456701(<8 x i32> %a, <8 x i32> %passthru, i8 %mask) {
215; CHECK-LABEL: mask_shuffle_v8i32_23456701:
216; CHECK:       # BB#0:
217; CHECK-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[1,2,3,0]
218; CHECK-NEXT:    kmovb %edi, %k1
219; CHECK-NEXT:    vpblendmd %ymm0, %ymm1, %ymm0 {%k1}
220; CHECK-NEXT:    retq
221  %shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>
222  %mask.cast = bitcast i8 %mask to <8 x i1>
223  %res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> %passthru
224  ret <8 x i32> %res
225}
226
227define <8 x i32> @maskz_shuffle_v8i32_23456701(<8 x i32> %a, i8 %mask) {
228; CHECK-LABEL: maskz_shuffle_v8i32_23456701:
229; CHECK:       # BB#0:
230; CHECK-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[1,2,3,0]
231; CHECK-NEXT:    kmovb %edi, %k1
232; CHECK-NEXT:    vmovdqa32 %ymm0, %ymm0 {%k1} {z}
233; CHECK-NEXT:    retq
234  %shuffle = shufflevector <8 x i32> %a, <8 x i32> undef, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1>
235  %mask.cast = bitcast i8 %mask to <8 x i1>
236  %res = select <8 x i1> %mask.cast, <8 x i32> %shuffle, <8 x i32> zeroinitializer
237  ret <8 x i32> %res
238}
239