1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32 3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64 4 5declare <8 x i32> @llvm.x86.avx2.permd(<8 x i32>, <8 x i32>) 6declare <8 x float> @llvm.x86.avx2.permps(<8 x float>, <8 x i32>) 7declare <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8>, <16 x i8>) 8declare <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8>, <32 x i8>) 9 10define <32 x i8> @combine_pshufb_pslldq(<32 x i8> %a0) { 11; X32-LABEL: combine_pshufb_pslldq: 12; X32: # BB#0: 13; X32-NEXT: vxorps %ymm0, %ymm0, %ymm0 14; X32-NEXT: retl 15; 16; X64-LABEL: combine_pshufb_pslldq: 17; X64: # BB#0: 18; X64-NEXT: vxorps %ymm0, %ymm0, %ymm0 19; X64-NEXT: retq 20 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>) 21 %2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23> 22 ret <32 x i8> %2 23} 24 25define <32 x i8> @combine_pshufb_psrldq(<32 x i8> %a0) { 26; X32-LABEL: combine_pshufb_psrldq: 27; X32: # BB#0: 28; X32-NEXT: vxorps %ymm0, %ymm0, %ymm0 29; X32-NEXT: retl 30; 31; X64-LABEL: combine_pshufb_psrldq: 32; X64: # BB#0: 33; X64-NEXT: vxorps %ymm0, %ymm0, %ymm0 34; X64-NEXT: retq 35 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>) 36 %2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32, i32 32> 37 ret <32 x i8> %2 38} 39 40define <32 x i8> @combine_pshufb_vpermd(<8 x i32> %a) { 41; X32-LABEL: combine_pshufb_vpermd: 42; X32: # BB#0: 43; X32-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,16,17,18,18] 44; X32-NEXT: retl 45; 46; X64-LABEL: combine_pshufb_vpermd: 47; X64: # BB#0: 48; X64-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,16,17,18,18] 49; X64-NEXT: retq 50 %tmp0 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4>) 51 %tmp1 = bitcast <8 x i32> %tmp0 to <32 x i8> 52 %tmp2 = shufflevector <32 x i8> %tmp1, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 30> 53 ret <32 x i8> %tmp2 54} 55 56define <32 x i8> @combine_pshufb_vpermps(<8 x float> %a) { 57; X32-LABEL: combine_pshufb_vpermps: 58; X32: # BB#0: 59; X32-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,16,17,18,18] 60; X32-NEXT: retl 61; 62; X64-LABEL: combine_pshufb_vpermps: 63; X64: # BB#0: 64; X64-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,16,17,18,18] 65; X64-NEXT: retq 66 %tmp0 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 4>) 67 %tmp1 = bitcast <8 x float> %tmp0 to <32 x i8> 68 %tmp2 = shufflevector <32 x i8> %tmp1, <32 x i8> undef, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 30> 69 ret <32 x i8> %tmp2 70} 71 72define <32 x i8> @combine_and_pshufb(<32 x i8> %a0) { 73; X32-LABEL: combine_and_pshufb: 74; X32: # BB#0: 75; X32-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0 76; X32-NEXT: retl 77; 78; X64-LABEL: combine_and_pshufb: 79; X64: # BB#0: 80; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 81; X64-NEXT: retq 82 %1 = shufflevector <32 x i8> %a0, <32 x i8> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 32, i32 32, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31> 83 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) 84 ret <32 x i8> %2 85} 86 87define <32 x i8> @combine_pshufb_and(<32 x i8> %a0) { 88; X32-LABEL: combine_pshufb_and: 89; X32: # BB#0: 90; X32-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0 91; X32-NEXT: retl 92; 93; X64-LABEL: combine_pshufb_and: 94; X64: # BB#0: 95; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 96; X64-NEXT: retq 97 %1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 0, i8 1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) 98 %2 = shufflevector <32 x i8> %1, <32 x i8> zeroinitializer, <32 x i32> <i32 0, i32 1, i32 32, i32 32, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31> 99 ret <32 x i8> %2 100} 101 102define <4 x i64> @combine_permq_pshufb_as_vperm2i128(<4 x i64> %a0) { 103; X32-LABEL: combine_permq_pshufb_as_vperm2i128: 104; X32: # BB#0: 105; X32-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],zero,zero 106; X32-NEXT: vpaddq {{\.LCPI.*}}, %ymm0, %ymm0 107; X32-NEXT: retl 108; 109; X64-LABEL: combine_permq_pshufb_as_vperm2i128: 110; X64: # BB#0: 111; X64-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[2,3],zero,zero 112; X64-NEXT: vpaddq {{.*}}(%rip), %ymm0, %ymm0 113; X64-NEXT: retq 114 %1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <4 x i32> <i32 3, i32 2, i32 1, i32 0> 115 %2 = bitcast <4 x i64> %1 to <32 x i8> 116 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255>) 117 %4 = bitcast <32 x i8> %3 to <4 x i64> 118 %5 = add <4 x i64> %4, <i64 1, i64 1, i64 3, i64 3> 119 ret <4 x i64> %5 120} 121 122define <8 x i32> @combine_as_vpermd(<8 x i32> %a0) { 123; X32-LABEL: combine_as_vpermd: 124; X32: # BB#0: 125; X32-NEXT: vmovdqa {{.*#+}} ymm1 = [4,5,4,5,6,7,0,7] 126; X32-NEXT: vpermd %ymm0, %ymm1, %ymm0 127; X32-NEXT: retl 128; 129; X64-LABEL: combine_as_vpermd: 130; X64: # BB#0: 131; X64-NEXT: vmovdqa {{.*#+}} ymm1 = [4,5,4,5,6,7,0,7] 132; X64-NEXT: vpermd %ymm0, %ymm1, %ymm0 133; X64-NEXT: retq 134 %1 = shufflevector <8 x i32> %a0, <8 x i32> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3> 135 %2 = tail call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a0, <8 x i32> <i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 7, i32 6>) 136 %3 = shufflevector <8 x i32> %1, <8 x i32> %2, <8 x i32> <i32 0, i32 8, i32 9, i32 1, i32 15, i32 14, i32 4, i32 3> 137 ret <8 x i32> %3 138} 139 140define <8 x float> @combine_as_vpermps(<8 x float> %a0) { 141; X32-LABEL: combine_as_vpermps: 142; X32: # BB#0: 143; X32-NEXT: vmovaps {{.*#+}} ymm1 = <6,4,7,5,1,u,4,7> 144; X32-NEXT: vpermps %ymm0, %ymm1, %ymm0 145; X32-NEXT: retl 146; 147; X64-LABEL: combine_as_vpermps: 148; X64: # BB#0: 149; X64-NEXT: vmovaps {{.*#+}} ymm1 = <6,4,7,5,1,u,4,7> 150; X64-NEXT: vpermps %ymm0, %ymm1, %ymm0 151; X64-NEXT: retq 152 %1 = shufflevector <8 x float> %a0, <8 x float> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 4, i32 5, i32 6, i32 7> 153 %2 = tail call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a0, <8 x i32> <i32 1, i32 undef, i32 3, i32 2, i32 5, i32 4, i32 7, i32 6>) 154 %3 = shufflevector <8 x float> %1, <8 x float> %2, <8 x i32> <i32 15, i32 0, i32 14, i32 1, i32 8, i32 9, i32 4, i32 3> 155 ret <8 x float> %3 156} 157 158define <32 x i8> @combine_permq_pshufb_as_vpblendd(<4 x i64> %a0) { 159; X32-LABEL: combine_permq_pshufb_as_vpblendd: 160; X32: # BB#0: 161; X32-NEXT: vpxor %ymm1, %ymm1, %ymm1 162; X32-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] 163; X32-NEXT: retl 164; 165; X64-LABEL: combine_permq_pshufb_as_vpblendd: 166; X64: # BB#0: 167; X64-NEXT: vpxor %ymm1, %ymm1, %ymm1 168; X64-NEXT: vpblendd {{.*#+}} ymm0 = ymm0[0,1,2,3],ymm1[4,5,6,7] 169; X64-NEXT: retq 170 %1 = shufflevector <4 x i64> %a0, <4 x i64> undef, <4 x i32> <i32 1, i32 0, i32 3, i32 2> 171 %2 = bitcast <4 x i64> %1 to <32 x i8> 172 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255, i8 255>) 173 ret <32 x i8> %3 174} 175 176define <16 x i8> @combine_pshufb_as_vpbroadcastb128(<16 x i8> %a) { 177; X32-LABEL: combine_pshufb_as_vpbroadcastb128: 178; X32: # BB#0: 179; X32-NEXT: vpbroadcastb %xmm0, %xmm0 180; X32-NEXT: retl 181; 182; X64-LABEL: combine_pshufb_as_vpbroadcastb128: 183; X64: # BB#0: 184; X64-NEXT: vpbroadcastb %xmm0, %xmm0 185; X64-NEXT: retq 186 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> zeroinitializer) 187 ret <16 x i8> %1 188} 189 190define <32 x i8> @combine_pshufb_as_vpbroadcastb256(<2 x i64> %a) { 191; X32-LABEL: combine_pshufb_as_vpbroadcastb256: 192; X32: # BB#0: 193; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 194; X32-NEXT: vpbroadcastb %xmm0, %ymm0 195; X32-NEXT: retl 196; 197; X64-LABEL: combine_pshufb_as_vpbroadcastb256: 198; X64: # BB#0: 199; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 200; X64-NEXT: vpbroadcastb %xmm0, %ymm0 201; X64-NEXT: retq 202 %1 = shufflevector <2 x i64> %a, <2 x i64> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef> 203 %2 = bitcast <4 x i64> %1 to <32 x i8> 204 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> zeroinitializer) 205 %4 = bitcast <32 x i8> %3 to <8 x i32> 206 %5 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %4, <8 x i32> zeroinitializer) 207 %6 = bitcast <8 x i32> %5 to <32 x i8> 208 ret <32 x i8> %6 209} 210 211define <16 x i8> @combine_pshufb_as_vpbroadcastw128(<16 x i8> %a) { 212; X32-LABEL: combine_pshufb_as_vpbroadcastw128: 213; X32: # BB#0: 214; X32-NEXT: vpbroadcastw %xmm0, %xmm0 215; X32-NEXT: retl 216; 217; X64-LABEL: combine_pshufb_as_vpbroadcastw128: 218; X64: # BB#0: 219; X64-NEXT: vpbroadcastw %xmm0, %xmm0 220; X64-NEXT: retq 221 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1>) 222 ret <16 x i8> %1 223} 224 225define <32 x i8> @combine_pshufb_as_vpbroadcastw256(<2 x i64> %a) { 226; X32-LABEL: combine_pshufb_as_vpbroadcastw256: 227; X32: # BB#0: 228; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 229; X32-NEXT: vpbroadcastw %xmm0, %ymm0 230; X32-NEXT: retl 231; 232; X64-LABEL: combine_pshufb_as_vpbroadcastw256: 233; X64: # BB#0: 234; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 235; X64-NEXT: vpbroadcastw %xmm0, %ymm0 236; X64-NEXT: retq 237 %1 = shufflevector <2 x i64> %a, <2 x i64> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef> 238 %2 = bitcast <4 x i64> %1 to <32 x i8> 239 %3 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1, i8 0, i8 1>) 240 %4 = bitcast <32 x i8> %3 to <8 x i32> 241 %5 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %4, <8 x i32> zeroinitializer) 242 %6 = bitcast <8 x i32> %5 to <32 x i8> 243 ret <32 x i8> %6 244} 245 246define <16 x i8> @combine_pshufb_as_vpbroadcastd128(<16 x i8> %a) { 247; X32-LABEL: combine_pshufb_as_vpbroadcastd128: 248; X32: # BB#0: 249; X32-NEXT: vpbroadcastd %xmm0, %xmm0 250; X32-NEXT: vpaddb {{\.LCPI.*}}, %xmm0, %xmm0 251; X32-NEXT: retl 252; 253; X64-LABEL: combine_pshufb_as_vpbroadcastd128: 254; X64: # BB#0: 255; X64-NEXT: vpbroadcastd %xmm0, %xmm0 256; X64-NEXT: vpaddb {{.*}}(%rip), %xmm0, %xmm0 257; X64-NEXT: retq 258 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>) 259 %2 = add <16 x i8> %1, <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3> 260 ret <16 x i8> %2 261} 262 263define <8 x i32> @combine_permd_as_vpbroadcastd256(<4 x i32> %a) { 264; X32-LABEL: combine_permd_as_vpbroadcastd256: 265; X32: # BB#0: 266; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 267; X32-NEXT: vpbroadcastd %xmm0, %ymm0 268; X32-NEXT: vpaddd {{\.LCPI.*}}, %ymm0, %ymm0 269; X32-NEXT: retl 270; 271; X64-LABEL: combine_permd_as_vpbroadcastd256: 272; X64: # BB#0: 273; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 274; X64-NEXT: vpbroadcastd %xmm0, %ymm0 275; X64-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0 276; X64-NEXT: retq 277 %1 = shufflevector <4 x i32> %a, <4 x i32> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 278 %2 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %1, <8 x i32> zeroinitializer) 279 %3 = add <8 x i32> %2, <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> 280 ret <8 x i32> %3 281} 282 283define <16 x i8> @combine_pshufb_as_vpbroadcastq128(<16 x i8> %a) { 284; X32-LABEL: combine_pshufb_as_vpbroadcastq128: 285; X32: # BB#0: 286; X32-NEXT: vpbroadcastq %xmm0, %xmm0 287; X32-NEXT: retl 288; 289; X64-LABEL: combine_pshufb_as_vpbroadcastq128: 290; X64: # BB#0: 291; X64-NEXT: vpbroadcastq %xmm0, %xmm0 292; X64-NEXT: retq 293 %1 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %a, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>) 294 ret <16 x i8> %1 295} 296 297define <8 x i32> @combine_permd_as_vpbroadcastq256(<4 x i32> %a) { 298; X32-LABEL: combine_permd_as_vpbroadcastq256: 299; X32: # BB#0: 300; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 301; X32-NEXT: vpbroadcastq %xmm0, %ymm0 302; X32-NEXT: vpaddd {{\.LCPI.*}}, %ymm0, %ymm0 303; X32-NEXT: retl 304; 305; X64-LABEL: combine_permd_as_vpbroadcastq256: 306; X64: # BB#0: 307; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 308; X64-NEXT: vpbroadcastq %xmm0, %ymm0 309; X64-NEXT: vpaddd {{.*}}(%rip), %ymm0, %ymm0 310; X64-NEXT: retq 311 %1 = shufflevector <4 x i32> %a, <4 x i32> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 312 %2 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %1, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>) 313 %3 = add <8 x i32> %2, <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> 314 ret <8 x i32> %3 315} 316 317define <4 x float> @combine_pshufb_as_vpbroadcastss128(<4 x float> %a) { 318; X32-LABEL: combine_pshufb_as_vpbroadcastss128: 319; X32: # BB#0: 320; X32-NEXT: vbroadcastss %xmm0, %xmm0 321; X32-NEXT: retl 322; 323; X64-LABEL: combine_pshufb_as_vpbroadcastss128: 324; X64: # BB#0: 325; X64-NEXT: vbroadcastss %xmm0, %xmm0 326; X64-NEXT: retq 327 %1 = bitcast <4 x float> %a to <16 x i8> 328 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>) 329 %3 = bitcast <16 x i8> %2 to <4 x float> 330 ret <4 x float> %3 331} 332 333define <8 x float> @combine_permps_as_vpbroadcastss256(<4 x float> %a) { 334; X32-LABEL: combine_permps_as_vpbroadcastss256: 335; X32: # BB#0: 336; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 337; X32-NEXT: vbroadcastss %xmm0, %ymm0 338; X32-NEXT: retl 339; 340; X64-LABEL: combine_permps_as_vpbroadcastss256: 341; X64: # BB#0: 342; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 343; X64-NEXT: vbroadcastss %xmm0, %ymm0 344; X64-NEXT: retq 345 %1 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> <i32 0, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 346 %2 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %1, <8 x i32> zeroinitializer) 347 ret <8 x float> %2 348} 349 350define <4 x double> @combine_permps_as_vpbroadcastsd256(<2 x double> %a) { 351; X32-LABEL: combine_permps_as_vpbroadcastsd256: 352; X32: # BB#0: 353; X32-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 354; X32-NEXT: vbroadcastsd %xmm0, %ymm0 355; X32-NEXT: retl 356; 357; X64-LABEL: combine_permps_as_vpbroadcastsd256: 358; X64: # BB#0: 359; X64-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 360; X64-NEXT: vbroadcastsd %xmm0, %ymm0 361; X64-NEXT: retq 362 %1 = shufflevector <2 x double> %a, <2 x double> undef, <4 x i32> <i32 0, i32 undef, i32 undef, i32 undef> 363 %2 = bitcast <4 x double> %1 to <8 x float> 364 %3 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %2, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>) 365 %4 = bitcast <8 x float> %3 to <4 x double> 366 ret <4 x double> %4 367} 368 369define <16 x i8> @combine_vpbroadcast_pshufb_as_vpbroadcastb128(<16 x i8> %a) { 370; X32-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastb128: 371; X32: # BB#0: 372; X32-NEXT: vpbroadcastb %xmm0, %xmm0 373; X32-NEXT: retl 374; 375; X64-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastb128: 376; X64: # BB#0: 377; X64-NEXT: vpbroadcastb %xmm0, %xmm0 378; X64-NEXT: retq 379 %1 = shufflevector <16 x i8> %a, <16 x i8> undef, <16 x i32> zeroinitializer 380 %2 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %1, <16 x i8> zeroinitializer) 381 ret <16 x i8> %2 382} 383 384define <32 x i8> @combine_vpbroadcast_pshufb_as_vpbroadcastb256(<32 x i8> %a) { 385; X32-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastb256: 386; X32: # BB#0: 387; X32-NEXT: vpbroadcastb %xmm0, %ymm0 388; X32-NEXT: retl 389; 390; X64-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastb256: 391; X64: # BB#0: 392; X64-NEXT: vpbroadcastb %xmm0, %ymm0 393; X64-NEXT: retq 394 %1 = shufflevector <32 x i8> %a, <32 x i8> undef, <32 x i32> zeroinitializer 395 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> zeroinitializer) 396 ret <32 x i8> %2 397} 398 399define <4 x float> @combine_vpbroadcast_pshufb_as_vpbroadcastss128(<4 x float> %a) { 400; X32-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastss128: 401; X32: # BB#0: 402; X32-NEXT: vbroadcastss %xmm0, %xmm0 403; X32-NEXT: retl 404; 405; X64-LABEL: combine_vpbroadcast_pshufb_as_vpbroadcastss128: 406; X64: # BB#0: 407; X64-NEXT: vbroadcastss %xmm0, %xmm0 408; X64-NEXT: retq 409 %1 = shufflevector <4 x float> %a, <4 x float> undef, <4 x i32> zeroinitializer 410 %2 = bitcast <4 x float> %1 to <16 x i8> 411 %3 = call <16 x i8> @llvm.x86.ssse3.pshuf.b.128(<16 x i8> %2, <16 x i8> <i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3, i8 0, i8 1, i8 2, i8 3>) 412 %4 = bitcast <16 x i8> %3 to <4 x float> 413 ret <4 x float> %4 414} 415 416define <8 x float> @combine_vpbroadcast_permd_as_vpbroadcastss256(<4 x float> %a) { 417; X32-LABEL: combine_vpbroadcast_permd_as_vpbroadcastss256: 418; X32: # BB#0: 419; X32-NEXT: vbroadcastss %xmm0, %ymm0 420; X32-NEXT: vbroadcastss %xmm0, %ymm0 421; X32-NEXT: retl 422; 423; X64-LABEL: combine_vpbroadcast_permd_as_vpbroadcastss256: 424; X64: # BB#0: 425; X64-NEXT: vbroadcastss %xmm0, %ymm0 426; X64-NEXT: vbroadcastss %xmm0, %ymm0 427; X64-NEXT: retq 428 %1 = shufflevector <4 x float> %a, <4 x float> undef, <8 x i32> zeroinitializer 429 %2 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %1, <8 x i32> zeroinitializer) 430 ret <8 x float> %2 431} 432 433define <4 x double> @combine_vpbroadcast_permd_as_vpbroadcastsd256(<2 x double> %a) { 434; X32-LABEL: combine_vpbroadcast_permd_as_vpbroadcastsd256: 435; X32: # BB#0: 436; X32-NEXT: vbroadcastsd %xmm0, %ymm0 437; X32-NEXT: vbroadcastsd %xmm0, %ymm0 438; X32-NEXT: retl 439; 440; X64-LABEL: combine_vpbroadcast_permd_as_vpbroadcastsd256: 441; X64: # BB#0: 442; X64-NEXT: vbroadcastsd %xmm0, %ymm0 443; X64-NEXT: vbroadcastsd %xmm0, %ymm0 444; X64-NEXT: retq 445 %1 = shufflevector <2 x double> %a, <2 x double> undef, <4 x i32> zeroinitializer 446 %2 = bitcast <4 x double> %1 to <8 x float> 447 %3 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %2, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 0, i32 1, i32 0, i32 1>) 448 %4 = bitcast <8 x float> %3 to <4 x double> 449 ret <4 x double> %4 450} 451 452define <8 x i32> @combine_permd_as_permq(<8 x i32> %a) { 453; X32-LABEL: combine_permd_as_permq: 454; X32: # BB#0: 455; X32-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,1] 456; X32-NEXT: retl 457; 458; X64-LABEL: combine_permd_as_permq: 459; X64: # BB#0: 460; X64-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,1] 461; X64-NEXT: retq 462 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> %a, <8 x i32> <i32 0, i32 1, i32 4, i32 5, i32 4, i32 5, i32 2, i32 3>) 463 ret <8 x i32> %1 464} 465 466define <8 x float> @combine_permps_as_permpd(<8 x float> %a) { 467; X32-LABEL: combine_permps_as_permpd: 468; X32: # BB#0: 469; X32-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,2,0,1] 470; X32-NEXT: retl 471; 472; X64-LABEL: combine_permps_as_permpd: 473; X64: # BB#0: 474; X64-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[3,2,0,1] 475; X64-NEXT: retq 476 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> %a, <8 x i32> <i32 6, i32 7, i32 4, i32 5, i32 0, i32 1, i32 2, i32 3>) 477 ret <8 x float> %1 478} 479 480define <4 x i64> @combine_pshufb_as_zext(<32 x i8> %a0) { 481; X32-LABEL: combine_pshufb_as_zext: 482; X32: # BB#0: 483; X32-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,0,0,1] 484; X32-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[8,9],zero,zero,zero,zero,zero,zero,ymm0[10,11],zero,zero,zero,zero,zero,zero,ymm0[20,21],zero,zero,zero,zero,zero,zero,ymm0[22,23],zero,zero,zero,zero,zero,zero 485; X32-NEXT: retl 486; 487; X64-LABEL: combine_pshufb_as_zext: 488; X64: # BB#0: 489; X64-NEXT: vpermq {{.*#+}} ymm0 = ymm0[1,0,0,1] 490; X64-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[8,9],zero,zero,zero,zero,zero,zero,ymm0[10,11],zero,zero,zero,zero,zero,zero,ymm0[20,21],zero,zero,zero,zero,zero,zero,ymm0[22,23],zero,zero,zero,zero,zero,zero 491; X64-NEXT: retq 492 %1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> 493 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 8, i8 9, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 10, i8 11, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 4, i8 5, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) 494 %3 = bitcast <32 x i8> %2 to <4 x i64> 495 ret <4 x i64> %3 496} 497 498define <4 x i64> @combine_pshufb_as_zext128(<32 x i8> %a0) { 499; X32-LABEL: combine_pshufb_as_zext128: 500; X32: # BB#0: 501; X32-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0] 502; X32-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,1,0,1] 503; X32-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[15,14],zero,zero,zero,zero,zero,zero,ymm0[13,12],zero,zero,zero,zero,zero,zero,ymm0[31,30],zero,zero,zero,zero,zero,zero,ymm0[29,28],zero,zero,zero,zero,zero,zero 504; X32-NEXT: retl 505; 506; X64-LABEL: combine_pshufb_as_zext128: 507; X64: # BB#0: 508; X64-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0] 509; X64-NEXT: vperm2i128 {{.*#+}} ymm0 = ymm0[0,1,0,1] 510; X64-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[15,14],zero,zero,zero,zero,zero,zero,ymm0[13,12],zero,zero,zero,zero,zero,zero,ymm0[31,30],zero,zero,zero,zero,zero,zero,ymm0[29,28],zero,zero,zero,zero,zero,zero 511; X64-NEXT: retq 512 %1 = shufflevector <32 x i8> %a0, <32 x i8> undef, <32 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0> 513 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 15, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 13, i8 12, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 15, i8 14, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 13, i8 12, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) 514 %3 = bitcast <32 x i8> %2 to <4 x i64> 515 ret <4 x i64> %3 516} 517 518define <4 x double> @combine_pshufb_as_vzmovl_64(<4 x double> %a0) { 519; X32-LABEL: combine_pshufb_as_vzmovl_64: 520; X32: # BB#0: 521; X32-NEXT: vxorpd %ymm1, %ymm1, %ymm1 522; X32-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3] 523; X32-NEXT: retl 524; 525; X64-LABEL: combine_pshufb_as_vzmovl_64: 526; X64: # BB#0: 527; X64-NEXT: vxorpd %ymm1, %ymm1, %ymm1 528; X64-NEXT: vblendpd {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3] 529; X64-NEXT: retq 530 %1 = bitcast <4 x double> %a0 to <32 x i8> 531 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) 532 %3 = bitcast <32 x i8> %2 to <4 x double> 533 ret <4 x double> %3 534} 535 536define <8 x float> @combine_pshufb_as_vzmovl_32(<8 x float> %a0) { 537; X32-LABEL: combine_pshufb_as_vzmovl_32: 538; X32: # BB#0: 539; X32-NEXT: vxorps %ymm1, %ymm1, %ymm1 540; X32-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7] 541; X32-NEXT: retl 542; 543; X64-LABEL: combine_pshufb_as_vzmovl_32: 544; X64: # BB#0: 545; X64-NEXT: vxorps %ymm1, %ymm1, %ymm1 546; X64-NEXT: vblendps {{.*#+}} ymm0 = ymm0[0],ymm1[1,2,3,4,5,6,7] 547; X64-NEXT: retq 548 %1 = bitcast <8 x float> %a0 to <32 x i8> 549 %2 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %1, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>) 550 %3 = bitcast <32 x i8> %2 to <8 x float> 551 ret <8 x float> %3 552} 553 554define <32 x i8> @combine_pshufb_as_pslldq(<32 x i8> %a0) { 555; X32-LABEL: combine_pshufb_as_pslldq: 556; X32: # BB#0: 557; X32-NEXT: vpslldq {{.*#+}} ymm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[0,1,2,3,4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,18,19,20,21] 558; X32-NEXT: retl 559; 560; X64-LABEL: combine_pshufb_as_pslldq: 561; X64: # BB#0: 562; X64-NEXT: vpslldq {{.*#+}} ymm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[0,1,2,3,4,5],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,18,19,20,21] 563; X64-NEXT: retq 564 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5>) 565 ret <32 x i8> %res0 566} 567 568define <32 x i8> @combine_pshufb_as_psrldq(<32 x i8> %a0) { 569; X32-LABEL: combine_pshufb_as_psrldq: 570; X32: # BB#0: 571; X32-NEXT: vpsrldq {{.*#+}} ymm0 = ymm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero 572; X32-NEXT: retl 573; 574; X64-LABEL: combine_pshufb_as_psrldq: 575; X64: # BB#0: 576; X64-NEXT: vpsrldq {{.*#+}} ymm0 = ymm0[15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,ymm0[31],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero 577; X64-NEXT: retq 578 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128, i8 128>) 579 ret <32 x i8> %res0 580} 581 582define <32 x i8> @combine_pshufb_as_psrlw(<32 x i8> %a0) { 583; X32-LABEL: combine_pshufb_as_psrlw: 584; X32: # BB#0: 585; X32-NEXT: vpsrlw $8, %ymm0, %ymm0 586; X32-NEXT: retl 587; 588; X64-LABEL: combine_pshufb_as_psrlw: 589; X64: # BB#0: 590; X64-NEXT: vpsrlw $8, %ymm0, %ymm0 591; X64-NEXT: retq 592 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 1, i8 128, i8 3, i8 128, i8 5, i8 128, i8 7, i8 128, i8 9, i8 128, i8 11, i8 128, i8 13, i8 128, i8 15, i8 128, i8 17, i8 128, i8 19, i8 128, i8 21, i8 128, i8 23, i8 128, i8 25, i8 128, i8 27, i8 128, i8 29, i8 128, i8 31, i8 128>) 593 ret <32 x i8> %res0 594} 595 596define <32 x i8> @combine_pshufb_as_pslld(<32 x i8> %a0) { 597; X32-LABEL: combine_pshufb_as_pslld: 598; X32: # BB#0: 599; X32-NEXT: vpslld $24, %ymm0, %ymm0 600; X32-NEXT: retl 601; 602; X64-LABEL: combine_pshufb_as_pslld: 603; X64: # BB#0: 604; X64-NEXT: vpslld $24, %ymm0, %ymm0 605; X64-NEXT: retq 606 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 128, i8 128, i8 128, i8 0, i8 128, i8 128, i8 128, i8 4, i8 128, i8 128, i8 128, i8 8, i8 128, i8 128, i8 128, i8 12, i8 128, i8 128, i8 128, i8 16, i8 128, i8 128, i8 128, i8 20, i8 128, i8 128, i8 128, i8 24, i8 128, i8 128, i8 128, i8 28>) 607 ret <32 x i8> %res0 608} 609 610define <32 x i8> @combine_pshufb_as_psrlq(<32 x i8> %a0) { 611; X32-LABEL: combine_pshufb_as_psrlq: 612; X32: # BB#0: 613; X32-NEXT: vpsrlq $40, %ymm0, %ymm0 614; X32-NEXT: retl 615; 616; X64-LABEL: combine_pshufb_as_psrlq: 617; X64: # BB#0: 618; X64-NEXT: vpsrlq $40, %ymm0, %ymm0 619; X64-NEXT: retq 620 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 5, i8 6, i8 7, i8 128, i8 128, i8 128, i8 128, i8 128, i8 13, i8 14, i8 15, i8 128, i8 128, i8 128, i8 128, i8 128, i8 21, i8 22, i8 23, i8 128, i8 128, i8 128, i8 128, i8 128, i8 29, i8 30, i8 31, i8 128, i8 128, i8 128, i8 128, i8 128>) 621 ret <32 x i8> %res0 622} 623 624define <32 x i8> @combine_pshufb_as_pshuflw(<32 x i8> %a0) { 625; X32-LABEL: combine_pshufb_as_pshuflw: 626; X32: # BB#0: 627; X32-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[1,0,3,2,4,5,6,7,9,8,11,10,12,13,14,15] 628; X32-NEXT: retl 629; 630; X64-LABEL: combine_pshufb_as_pshuflw: 631; X64: # BB#0: 632; X64-NEXT: vpshuflw {{.*#+}} ymm0 = ymm0[1,0,3,2,4,5,6,7,9,8,11,10,12,13,14,15] 633; X64-NEXT: retq 634 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>) 635 ret <32 x i8> %res0 636} 637 638define <32 x i8> @combine_pshufb_as_pshufhw(<32 x i8> %a0) { 639; X32-LABEL: combine_pshufb_as_pshufhw: 640; X32: # BB#0: 641; X32-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,5,4,7,6,8,9,10,11,13,12,15,14] 642; X32-NEXT: retl 643; 644; X64-LABEL: combine_pshufb_as_pshufhw: 645; X64: # BB#0: 646; X64-NEXT: vpshufhw {{.*#+}} ymm0 = ymm0[0,1,2,3,5,4,7,6,8,9,10,11,13,12,15,14] 647; X64-NEXT: retq 648 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13>) 649 ret <32 x i8> %res0 650} 651 652define <32 x i8> @combine_pshufb_not_as_pshufw(<32 x i8> %a0) { 653; X32-LABEL: combine_pshufb_not_as_pshufw: 654; X32: # BB#0: 655; X32-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13,18,19,16,17,22,23,20,21,26,27,24,25,30,31,28,29] 656; X32-NEXT: retl 657; 658; X64-LABEL: combine_pshufb_not_as_pshufw: 659; X64: # BB#0: 660; X64-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[2,3,0,1,6,7,4,5,10,11,8,9,14,15,12,13,18,19,16,17,22,23,20,21,26,27,24,25,30,31,28,29] 661; X64-NEXT: retq 662 %res0 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %a0, <32 x i8> <i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 2, i8 3, i8 0, i8 1, i8 6, i8 7, i8 4, i8 5, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15>) 663 %res1 = call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %res0, <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 10, i8 11, i8 8, i8 9, i8 14, i8 15, i8 12, i8 13>) 664 ret <32 x i8> %res1 665} 666 667define <32 x i8> @combine_psrlw_pshufb(<16 x i16> %a0) { 668; X32-LABEL: combine_psrlw_pshufb: 669; X32: # BB#0: 670; X32-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0 671; X32-NEXT: retl 672; 673; X64-LABEL: combine_psrlw_pshufb: 674; X64: # BB#0: 675; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 676; X64-NEXT: retq 677 %1 = lshr <16 x i16> %a0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8> 678 %2 = bitcast <16 x i16> %1 to <32 x i8> 679 %3 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 1, i8 0, i8 3, i8 2, i8 5, i8 4, i8 7, i8 6, i8 9, i8 8, i8 11, i8 10, i8 13, i8 12, i8 15, i8 14, i8 17, i8 16, i8 19, i8 18, i8 21, i8 20, i8 23, i8 22, i8 25, i8 24, i8 27, i8 26, i8 29, i8 28, i8 31, i8 30>) 680 ret <32 x i8> %3 681} 682 683define <32 x i8> @combine_pslld_pshufb(<8 x i32> %a0) { 684; X32-LABEL: combine_pslld_pshufb: 685; X32: # BB#0: 686; X32-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0 687; X32-NEXT: retl 688; 689; X64-LABEL: combine_pslld_pshufb: 690; X64: # BB#0: 691; X64-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 692; X64-NEXT: retq 693 %1 = shl <8 x i32> %a0, <i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24, i32 24> 694 %2 = bitcast <8 x i32> %1 to <32 x i8> 695 %3 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 3, i8 2, i8 1, i8 0, i8 7, i8 6, i8 5, i8 4, i8 11, i8 10, i8 9, i8 8, i8 15, i8 14, i8 13, i8 12, i8 19, i8 18, i8 17, i8 16, i8 23, i8 22, i8 21, i8 20, i8 27, i8 26, i8 25, i8 24, i8 31, i8 30, i8 29, i8 28>) 696 ret <32 x i8> %3 697} 698 699define <32 x i8> @combine_psrlq_pshufb(<4 x i64> %a0) { 700; X32-LABEL: combine_psrlq_pshufb: 701; X32: # BB#0: 702; X32-NEXT: vpshufb {{.*#+}} ymm0 = zero,zero,zero,zero,ymm0[7,6,5,4],zero,zero,zero,zero,ymm0[15,14,13,12],zero,zero,zero,zero,ymm0[23,22,21],zero,zero,zero,zero,ymm0[31,30,29,28],zero 703; X32-NEXT: retl 704; 705; X64-LABEL: combine_psrlq_pshufb: 706; X64: # BB#0: 707; X64-NEXT: vpshufb {{.*#+}} ymm0 = zero,zero,zero,zero,ymm0[7,6,5,4],zero,zero,zero,zero,ymm0[15,14,13,12],zero,zero,zero,zero,ymm0[23,22,21],zero,zero,zero,zero,ymm0[31,30,29,28],zero 708; X64-NEXT: retq 709 %1 = lshr <4 x i64> %a0, <i64 32, i64 32, i64 32, i64 32> 710 %2 = bitcast <4 x i64> %1 to <32 x i8> 711 %3 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> %2, <32 x i8> <i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23>) 712 ret <32 x i8> %3 713} 714 715define <8 x i32> @constant_fold_permd() { 716; X32-LABEL: constant_fold_permd: 717; X32: # BB#0: 718; X32-NEXT: vmovaps {{.*#+}} ymm0 = [5,7,3,2,8,2,6,1] 719; X32-NEXT: retl 720; 721; X64-LABEL: constant_fold_permd: 722; X64: # BB#0: 723; X64-NEXT: vmovaps {{.*#+}} ymm0 = [5,7,3,2,8,2,6,1] 724; X64-NEXT: retq 725 %1 = call <8 x i32> @llvm.x86.avx2.permd(<8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>, <8 x i32> <i32 4, i32 6, i32 2, i32 1, i32 7, i32 1, i32 5, i32 0>) 726 ret <8 x i32> %1 727} 728 729define <8 x float> @constant_fold_permps() { 730; X32-LABEL: constant_fold_permps: 731; X32: # BB#0: 732; X32-NEXT: vmovaps {{.*#+}} ymm0 = [5.000000e+00,7.000000e+00,3.000000e+00,2.000000e+00,8.000000e+00,2.000000e+00,6.000000e+00,1.000000e+00] 733; X32-NEXT: retl 734; 735; X64-LABEL: constant_fold_permps: 736; X64: # BB#0: 737; X64-NEXT: vmovaps {{.*#+}} ymm0 = [5.000000e+00,7.000000e+00,3.000000e+00,2.000000e+00,8.000000e+00,2.000000e+00,6.000000e+00,1.000000e+00] 738; X64-NEXT: retq 739 %1 = call <8 x float> @llvm.x86.avx2.permps(<8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, <8 x i32> <i32 4, i32 6, i32 2, i32 1, i32 7, i32 1, i32 5, i32 0>) 740 ret <8 x float> %1 741} 742 743define <32 x i8> @constant_fold_pshufb_256() { 744; X32-LABEL: constant_fold_pshufb_256: 745; X32: # BB#0: 746; X32-NEXT: vmovaps {{.*#+}} ymm0 = <14,0,0,0,u,u,0,0,0,0,0,0,0,0,8,9,255,0,0,0,u,u,0,0,241,0,0,0,0,0,249,250> 747; X32-NEXT: retl 748; 749; X64-LABEL: constant_fold_pshufb_256: 750; X64: # BB#0: 751; X64-NEXT: vmovaps {{.*#+}} ymm0 = <14,0,0,0,u,u,0,0,0,0,0,0,0,0,8,9,255,0,0,0,u,u,0,0,241,0,0,0,0,0,249,250> 752; X64-NEXT: retq 753 %1 = tail call <32 x i8> @llvm.x86.avx2.pshuf.b(<32 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 -8, i8 -9, i8 -10, i8 -11, i8 -12, i8 -13, i8 -14, i8 -15>, <32 x i8> <i8 1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 -1, i8 -1, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 7, i8 6, i8 1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 -1, i8 -1, i8 15, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 7, i8 6>) 754 ret <32 x i8> %1 755} 756