1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=X32
3; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32
4; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512f | FileCheck %s --check-prefix=X32
5; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx | FileCheck %s --check-prefix=X64
6; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
7; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512f | FileCheck %s --check-prefix=X64
8;
9; Combine tests involving AVX target shuffles
10
11declare <4 x float> @llvm.x86.avx.vpermil.ps(<4 x float>, i8)
12declare <8 x float> @llvm.x86.avx.vpermil.ps.256(<8 x float>, i8)
13declare <2 x double> @llvm.x86.avx.vpermil.pd(<2 x double>, i8)
14declare <4 x double> @llvm.x86.avx.vpermil.pd.256(<4 x double>, i8)
15
16declare <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>, <4 x i32>)
17declare <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>, <8 x i32>)
18declare <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double>, <2 x i64>)
19declare <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>, <4 x i64>)
20
21declare <8 x i32> @llvm.x86.avx.vperm2f128.si.256(<8 x i32>, <8 x i32>, i8)
22declare <8 x float> @llvm.x86.avx.vperm2f128.ps.256(<8 x float>, <8 x float>, i8)
23declare <4 x double> @llvm.x86.avx.vperm2f128.pd.256(<4 x double>, <4 x double>, i8)
24
25define <4 x float> @combine_vpermilvar_4f32_identity(<4 x float> %a0) {
26; X32-LABEL: combine_vpermilvar_4f32_identity:
27; X32:       # BB#0:
28; X32-NEXT:    retl
29;
30; X64-LABEL: combine_vpermilvar_4f32_identity:
31; X64:       # BB#0:
32; X64-NEXT:    retq
33  %1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
34  %2 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>  %1, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
35  ret <4 x float> %2
36}
37
38define <4 x float> @combine_vpermilvar_4f32_movddup(<4 x float> %a0) {
39; X32-LABEL: combine_vpermilvar_4f32_movddup:
40; X32:       # BB#0:
41; X32-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
42; X32-NEXT:    retl
43;
44; X64-LABEL: combine_vpermilvar_4f32_movddup:
45; X64:       # BB#0:
46; X64-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
47; X64-NEXT:    retq
48  %1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 0, i32 1, i32 0, i32 1>)
49  ret <4 x float> %1
50}
51define <4 x float> @combine_vpermilvar_4f32_movddup_load(<4 x float> *%a0) {
52; X32-LABEL: combine_vpermilvar_4f32_movddup_load:
53; X32:       # BB#0:
54; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
55; X32-NEXT:    vmovddup {{.*#+}} xmm0 = mem[0,0]
56; X32-NEXT:    retl
57;
58; X64-LABEL: combine_vpermilvar_4f32_movddup_load:
59; X64:       # BB#0:
60; X64-NEXT:    vmovddup {{.*#+}} xmm0 = mem[0,0]
61; X64-NEXT:    retq
62  %1 = load <4 x float>, <4 x float> *%a0
63  %2 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %1, <4 x i32> <i32 0, i32 1, i32 0, i32 1>)
64  ret <4 x float> %2
65}
66
67define <4 x float> @combine_vpermilvar_4f32_movshdup(<4 x float> %a0) {
68; X32-LABEL: combine_vpermilvar_4f32_movshdup:
69; X32:       # BB#0:
70; X32-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
71; X32-NEXT:    retl
72;
73; X64-LABEL: combine_vpermilvar_4f32_movshdup:
74; X64:       # BB#0:
75; X64-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm0[1,1,3,3]
76; X64-NEXT:    retq
77  %1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 undef, i32 1, i32 3, i32 3>)
78  ret <4 x float> %1
79}
80
81define <4 x float> @combine_vpermilvar_4f32_movsldup(<4 x float> %a0) {
82; X32-LABEL: combine_vpermilvar_4f32_movsldup:
83; X32:       # BB#0:
84; X32-NEXT:    vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
85; X32-NEXT:    retl
86;
87; X64-LABEL: combine_vpermilvar_4f32_movsldup:
88; X64:       # BB#0:
89; X64-NEXT:    vmovsldup {{.*#+}} xmm0 = xmm0[0,0,2,2]
90; X64-NEXT:    retq
91  %1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 0, i32 0, i32 2, i32 undef>)
92  ret <4 x float> %1
93}
94
95define <4 x float> @combine_vpermilvar_4f32_unpckh(<4 x float> %a0) {
96; X32-LABEL: combine_vpermilvar_4f32_unpckh:
97; X32:       # BB#0:
98; X32-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
99; X32-NEXT:    retl
100;
101; X64-LABEL: combine_vpermilvar_4f32_unpckh:
102; X64:       # BB#0:
103; X64-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[2,2,3,3]
104; X64-NEXT:    retq
105  %1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 2, i32 2, i32 3, i32 3>)
106  ret <4 x float> %1
107}
108
109define <4 x float> @combine_vpermilvar_4f32_unpckl(<4 x float> %a0) {
110; X32-LABEL: combine_vpermilvar_4f32_unpckl:
111; X32:       # BB#0:
112; X32-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1]
113; X32-NEXT:    retl
114;
115; X64-LABEL: combine_vpermilvar_4f32_unpckl:
116; X64:       # BB#0:
117; X64-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[0,0,1,1]
118; X64-NEXT:    retq
119  %1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 0, i32 0, i32 1, i32 1>)
120  ret <4 x float> %1
121}
122
123define <8 x float> @combine_vpermilvar_8f32_identity(<8 x float> %a0) {
124; X32-LABEL: combine_vpermilvar_8f32_identity:
125; X32:       # BB#0:
126; X32-NEXT:    retl
127;
128; X64-LABEL: combine_vpermilvar_8f32_identity:
129; X64:       # BB#0:
130; X64-NEXT:    retq
131  %1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 2, i32 3, i32 0, i32 undef>)
132  %2 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>  %1, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 2, i32 3, i32 0, i32 1>)
133  ret <8 x float> %2
134}
135
136define <8 x float> @combine_vpermilvar_8f32_10326u4u(<8 x float> %a0) {
137; X32-LABEL: combine_vpermilvar_8f32_10326u4u:
138; X32:       # BB#0:
139; X32-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[1,0,3,2,6,u,4,u]
140; X32-NEXT:    retl
141;
142; X64-LABEL: combine_vpermilvar_8f32_10326u4u:
143; X64:       # BB#0:
144; X64-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[1,0,3,2,6,u,4,u]
145; X64-NEXT:    retq
146  %1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 0, i32 1, i32 2, i32 undef>)
147  %2 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>  %1, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 undef>)
148  ret <8 x float> %2
149}
150
151define <8 x float> @combine_vpermilvar_vperm2f128_8f32(<8 x float> %a0) {
152; X32-LABEL: combine_vpermilvar_vperm2f128_8f32:
153; X32:       # BB#0:
154; X32-NEXT:    vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
155; X32-NEXT:    retl
156;
157; X64-LABEL: combine_vpermilvar_vperm2f128_8f32:
158; X64:       # BB#0:
159; X64-NEXT:    vperm2f128 {{.*#+}} ymm0 = ymm0[2,3,0,1]
160; X64-NEXT:    retq
161  %1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0>)
162  %2 = shufflevector <8 x float> %1, <8 x float> undef, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>
163  %3 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>  %2, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0>)
164  ret <8 x float> %3
165}
166
167define <8 x float> @combine_vpermilvar_vperm2f128_zero_8f32(<8 x float> %a0) {
168; X32-LABEL: combine_vpermilvar_vperm2f128_zero_8f32:
169; X32:       # BB#0:
170; X32-NEXT:    vperm2f128 {{.*#+}} ymm0 = zero,zero,ymm0[0,1]
171; X32-NEXT:    retl
172;
173; X64-LABEL: combine_vpermilvar_vperm2f128_zero_8f32:
174; X64:       # BB#0:
175; X64-NEXT:    vperm2f128 {{.*#+}} ymm0 = zero,zero,ymm0[0,1]
176; X64-NEXT:    retq
177  %1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0>)
178  %2 = shufflevector <8 x float> %1, <8 x float> zeroinitializer, <8 x i32> <i32 8, i32 8, i32 8, i32 8, i32 0, i32 1, i32 2, i32 3>
179  %3 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>  %2, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0>)
180  ret <8 x float> %3
181}
182
183define <4 x double> @combine_vperm2f128_vpermilvar_as_vpblendpd(<4 x double> %a0) {
184; X32-LABEL: combine_vperm2f128_vpermilvar_as_vpblendpd:
185; X32:       # BB#0:
186; X32-NEXT:    vxorpd %ymm1, %ymm1, %ymm1
187; X32-NEXT:    vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3]
188; X32-NEXT:    retl
189;
190; X64-LABEL: combine_vperm2f128_vpermilvar_as_vpblendpd:
191; X64:       # BB#0:
192; X64-NEXT:    vxorpd %ymm1, %ymm1, %ymm1
193; X64-NEXT:    vblendpd {{.*#+}} ymm0 = ymm0[0,1],ymm1[2,3]
194; X64-NEXT:    retq
195  %1 = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> <i64 2, i64 0, i64 2, i64 0>)
196  %2 = shufflevector <4 x double> %1, <4 x double> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
197  %3 = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %2, <4 x i64> <i64 2, i64 0, i64 2, i64 0>)
198  ret <4 x double> %3
199}
200
201define <8 x float> @combine_vpermilvar_8f32_movddup(<8 x float> %a0) {
202; X32-LABEL: combine_vpermilvar_8f32_movddup:
203; X32:       # BB#0:
204; X32-NEXT:    vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
205; X32-NEXT:    retl
206;
207; X64-LABEL: combine_vpermilvar_8f32_movddup:
208; X64:       # BB#0:
209; X64-NEXT:    vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
210; X64-NEXT:    retq
211  %1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5>)
212  ret <8 x float> %1
213}
214define <8 x float> @combine_vpermilvar_8f32_movddup_load(<8 x float> *%a0) {
215; X32-LABEL: combine_vpermilvar_8f32_movddup_load:
216; X32:       # BB#0:
217; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
218; X32-NEXT:    vmovddup {{.*#+}} ymm0 = mem[0,0,2,2]
219; X32-NEXT:    retl
220;
221; X64-LABEL: combine_vpermilvar_8f32_movddup_load:
222; X64:       # BB#0:
223; X64-NEXT:    vmovddup {{.*#+}} ymm0 = mem[0,0,2,2]
224; X64-NEXT:    retq
225  %1 = load <8 x float>, <8 x float> *%a0
226  %2 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %1, <8 x i32> <i32 0, i32 1, i32 0, i32 1, i32 4, i32 5, i32 4, i32 5>)
227  ret <8 x float> %2
228}
229
230define <8 x float> @combine_vpermilvar_8f32_movshdup(<8 x float> %a0) {
231; X32-LABEL: combine_vpermilvar_8f32_movshdup:
232; X32:       # BB#0:
233; X32-NEXT:    vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7]
234; X32-NEXT:    retl
235;
236; X64-LABEL: combine_vpermilvar_8f32_movshdup:
237; X64:       # BB#0:
238; X64-NEXT:    vmovshdup {{.*#+}} ymm0 = ymm0[1,1,3,3,5,5,7,7]
239; X64-NEXT:    retq
240  %1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 undef, i32 5, i32 7, i32 7>)
241  ret <8 x float> %1
242}
243
244define <8 x float> @combine_vpermilvar_8f32_movsldup(<8 x float> %a0) {
245; X32-LABEL: combine_vpermilvar_8f32_movsldup:
246; X32:       # BB#0:
247; X32-NEXT:    vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6]
248; X32-NEXT:    retl
249;
250; X64-LABEL: combine_vpermilvar_8f32_movsldup:
251; X64:       # BB#0:
252; X64-NEXT:    vmovsldup {{.*#+}} ymm0 = ymm0[0,0,2,2,4,4,6,6]
253; X64-NEXT:    retq
254  %1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6>)
255  ret <8 x float> %1
256}
257
258define <2 x double> @combine_vpermilvar_2f64_identity(<2 x double> %a0) {
259; X32-LABEL: combine_vpermilvar_2f64_identity:
260; X32:       # BB#0:
261; X32-NEXT:    retl
262;
263; X64-LABEL: combine_vpermilvar_2f64_identity:
264; X64:       # BB#0:
265; X64-NEXT:    retq
266  %1 = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %a0, <2 x i64> <i64 2, i64 0>)
267  %2 = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double>  %1, <2 x i64> <i64 2, i64 0>)
268  ret <2 x double> %2
269}
270
271define <2 x double> @combine_vpermilvar_2f64_movddup(<2 x double> %a0) {
272; X32-LABEL: combine_vpermilvar_2f64_movddup:
273; X32:       # BB#0:
274; X32-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
275; X32-NEXT:    retl
276;
277; X64-LABEL: combine_vpermilvar_2f64_movddup:
278; X64:       # BB#0:
279; X64-NEXT:    vmovddup {{.*#+}} xmm0 = xmm0[0,0]
280; X64-NEXT:    retq
281  %1 = tail call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> %a0, <2 x i64> <i64 0, i64 0>)
282  ret <2 x double> %1
283}
284
285define <4 x double> @combine_vpermilvar_4f64_identity(<4 x double> %a0) {
286; X32-LABEL: combine_vpermilvar_4f64_identity:
287; X32:       # BB#0:
288; X32-NEXT:    retl
289;
290; X64-LABEL: combine_vpermilvar_4f64_identity:
291; X64:       # BB#0:
292; X64-NEXT:    retq
293  %1 = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> <i64 2, i64 0, i64 2, i64 0>)
294  %2 = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double>  %1, <4 x i64> <i64 2, i64 0, i64 2, i64 0>)
295  ret <4 x double> %2
296}
297
298define <4 x double> @combine_vpermilvar_4f64_movddup(<4 x double> %a0) {
299; X32-LABEL: combine_vpermilvar_4f64_movddup:
300; X32:       # BB#0:
301; X32-NEXT:    vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
302; X32-NEXT:    retl
303;
304; X64-LABEL: combine_vpermilvar_4f64_movddup:
305; X64:       # BB#0:
306; X64-NEXT:    vmovddup {{.*#+}} ymm0 = ymm0[0,0,2,2]
307; X64-NEXT:    retq
308  %1 = tail call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> %a0, <4 x i64> <i64 0, i64 0, i64 4, i64 4>)
309  ret <4 x double> %1
310}
311
312define <4 x float> @combine_vpermilvar_4f32_4stage(<4 x float> %a0) {
313; X32-LABEL: combine_vpermilvar_4f32_4stage:
314; X32:       # BB#0:
315; X32-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[2,0,3,1]
316; X32-NEXT:    retl
317;
318; X64-LABEL: combine_vpermilvar_4f32_4stage:
319; X64:       # BB#0:
320; X64-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[2,0,3,1]
321; X64-NEXT:    retq
322  %1 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
323  %2 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>  %1, <4 x i32> <i32 2, i32 3, i32 0, i32 1>)
324  %3 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>  %2, <4 x i32> <i32 0, i32 2, i32 1, i32 3>)
325  %4 = tail call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float>  %3, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
326  ret <4 x float> %4
327}
328
329define <8 x float> @combine_vpermilvar_8f32_4stage(<8 x float> %a0) {
330; X32-LABEL: combine_vpermilvar_8f32_4stage:
331; X32:       # BB#0:
332; X32-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[2,0,3,1,6,4,7,5]
333; X32-NEXT:    retl
334;
335; X64-LABEL: combine_vpermilvar_8f32_4stage:
336; X64:       # BB#0:
337; X64-NEXT:    vpermilps {{.*#+}} ymm0 = ymm0[2,0,3,1,6,4,7,5]
338; X64-NEXT:    retq
339  %1 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> %a0, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0>)
340  %2 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>  %1, <8 x i32> <i32 2, i32 3, i32 0, i32 1, i32 2, i32 3, i32 0, i32 1>)
341  %3 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>  %2, <8 x i32> <i32 0, i32 2, i32 1, i32 3, i32 0, i32 2, i32 1, i32 3>)
342  %4 = tail call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float>  %3, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 3, i32 2, i32 1, i32 0>)
343  ret <8 x float> %4
344}
345
346define <4 x float> @combine_vpermilvar_4f32_as_insertps(<4 x float> %a0) {
347; X32-LABEL: combine_vpermilvar_4f32_as_insertps:
348; X32:       # BB#0:
349; X32-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[1],zero,xmm0[2],zero
350; X32-NEXT:    retl
351;
352; X64-LABEL: combine_vpermilvar_4f32_as_insertps:
353; X64:       # BB#0:
354; X64-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[1],zero,xmm0[2],zero
355; X64-NEXT:    retq
356  %1 = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> %a0, <4 x i32> <i32 3, i32 2, i32 1, i32 0>)
357  %2 = shufflevector <4 x float> %1, <4 x float> zeroinitializer, <4 x i32> <i32 2, i32 4, i32 1, i32 4>
358  ret <4 x float> %2
359}
360
361define <2 x double> @constant_fold_vpermilvar_pd() {
362; X32-LABEL: constant_fold_vpermilvar_pd:
363; X32:       # BB#0:
364; X32-NEXT:    vmovaps {{.*#+}} xmm0 = [2.000000e+00,1.000000e+00]
365; X32-NEXT:    retl
366;
367; X64-LABEL: constant_fold_vpermilvar_pd:
368; X64:       # BB#0:
369; X64-NEXT:    vmovaps {{.*#+}} xmm0 = [2.000000e+00,1.000000e+00]
370; X64-NEXT:    retq
371  %1 = call <2 x double> @llvm.x86.avx.vpermilvar.pd(<2 x double> <double 1.0, double 2.0>, <2 x i64> <i64 2, i64 0>)
372  ret <2 x double> %1
373}
374
375define <4 x double> @constant_fold_vpermilvar_pd_256() {
376; X32-LABEL: constant_fold_vpermilvar_pd_256:
377; X32:       # BB#0:
378; X32-NEXT:    vmovaps {{.*#+}} ymm0 = [2.000000e+00,1.000000e+00,3.000000e+00,4.000000e+00]
379; X32-NEXT:    retl
380;
381; X64-LABEL: constant_fold_vpermilvar_pd_256:
382; X64:       # BB#0:
383; X64-NEXT:    vmovaps {{.*#+}} ymm0 = [2.000000e+00,1.000000e+00,3.000000e+00,4.000000e+00]
384; X64-NEXT:    retq
385  %1 = call <4 x double> @llvm.x86.avx.vpermilvar.pd.256(<4 x double> <double 1.0, double 2.0, double 3.0, double 4.0>, <4 x i64> <i64 2, i64 0, i64 0, i64 2>)
386  ret <4 x double> %1
387}
388
389define <4 x float> @constant_fold_vpermilvar_ps() {
390; X32-LABEL: constant_fold_vpermilvar_ps:
391; X32:       # BB#0:
392; X32-NEXT:    vmovaps {{.*#+}} xmm0 = [4.000000e+00,1.000000e+00,3.000000e+00,2.000000e+00]
393; X32-NEXT:    retl
394;
395; X64-LABEL: constant_fold_vpermilvar_ps:
396; X64:       # BB#0:
397; X64-NEXT:    vmovaps {{.*#+}} xmm0 = [4.000000e+00,1.000000e+00,3.000000e+00,2.000000e+00]
398; X64-NEXT:    retq
399  %1 = call <4 x float> @llvm.x86.avx.vpermilvar.ps(<4 x float> <float 1.0, float 2.0, float 3.0, float 4.0>, <4 x i32> <i32 3, i32 0, i32 2, i32 1>)
400  ret <4 x float> %1
401}
402
403define <8 x float> @constant_fold_vpermilvar_ps_256() {
404; X32-LABEL: constant_fold_vpermilvar_ps_256:
405; X32:       # BB#0:
406; X32-NEXT:    vmovaps {{.*#+}} ymm0 = [1.000000e+00,1.000000e+00,3.000000e+00,2.000000e+00,5.000000e+00,6.000000e+00,6.000000e+00,6.000000e+00]
407; X32-NEXT:    retl
408;
409; X64-LABEL: constant_fold_vpermilvar_ps_256:
410; X64:       # BB#0:
411; X64-NEXT:    vmovaps {{.*#+}} ymm0 = [1.000000e+00,1.000000e+00,3.000000e+00,2.000000e+00,5.000000e+00,6.000000e+00,6.000000e+00,6.000000e+00]
412; X64-NEXT:    retq
413  %1 = call <8 x float> @llvm.x86.avx.vpermilvar.ps.256(<8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, <8 x i32> <i32 4, i32 0, i32 2, i32 1, i32 0, i32 1, i32 1, i32 1>)
414  ret <8 x float> %1
415}
416