1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2 8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512DQ 9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW 10; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512VL --check-prefix=AVX512DQVL 11; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512VL --check-prefix=AVX512BWVL 12; 13; Just one 32-bit run to make sure we do reasonable things for i64 shifts. 14; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2 15 16; 17; Variable Shifts 18; 19 20define <2 x i32> @var_shift_v2i32(<2 x i32> %a, <2 x i32> %b) nounwind { 21; SSE2-LABEL: var_shift_v2i32: 22; SSE2: # %bb.0: 23; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 24; SSE2-NEXT: movdqa %xmm0, %xmm2 25; SSE2-NEXT: psllq %xmm1, %xmm2 26; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 27; SSE2-NEXT: psllq %xmm1, %xmm0 28; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 29; SSE2-NEXT: retq 30; 31; SSE41-LABEL: var_shift_v2i32: 32; SSE41: # %bb.0: 33; SSE41-NEXT: pxor %xmm2, %xmm2 34; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7] 35; SSE41-NEXT: movdqa %xmm0, %xmm1 36; SSE41-NEXT: psllq %xmm2, %xmm1 37; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] 38; SSE41-NEXT: psllq %xmm2, %xmm0 39; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 40; SSE41-NEXT: retq 41; 42; AVX1-LABEL: var_shift_v2i32: 43; AVX1: # %bb.0: 44; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 45; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7] 46; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2 47; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 48; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0 49; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] 50; AVX1-NEXT: retq 51; 52; AVX2-LABEL: var_shift_v2i32: 53; AVX2: # %bb.0: 54; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 55; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3] 56; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 57; AVX2-NEXT: retq 58; 59; XOPAVX1-LABEL: var_shift_v2i32: 60; XOPAVX1: # %bb.0: 61; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 62; XOPAVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7] 63; XOPAVX1-NEXT: vpshlq %xmm1, %xmm0, %xmm0 64; XOPAVX1-NEXT: retq 65; 66; XOPAVX2-LABEL: var_shift_v2i32: 67; XOPAVX2: # %bb.0: 68; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 69; XOPAVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3] 70; XOPAVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 71; XOPAVX2-NEXT: retq 72; 73; AVX512-LABEL: var_shift_v2i32: 74; AVX512: # %bb.0: 75; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2 76; AVX512-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3] 77; AVX512-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 78; AVX512-NEXT: retq 79; 80; AVX512VL-LABEL: var_shift_v2i32: 81; AVX512VL: # %bb.0: 82; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 83; AVX512VL-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3] 84; AVX512VL-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 85; AVX512VL-NEXT: retq 86; 87; X32-SSE-LABEL: var_shift_v2i32: 88; X32-SSE: # %bb.0: 89; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 90; X32-SSE-NEXT: movdqa %xmm0, %xmm2 91; X32-SSE-NEXT: psllq %xmm1, %xmm2 92; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 93; X32-SSE-NEXT: xorps %xmm3, %xmm3 94; X32-SSE-NEXT: movss {{.*#+}} xmm3 = xmm1[0],xmm3[1,2,3] 95; X32-SSE-NEXT: psllq %xmm3, %xmm0 96; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 97; X32-SSE-NEXT: retl 98 %shift = shl <2 x i32> %a, %b 99 ret <2 x i32> %shift 100} 101 102define <4 x i16> @var_shift_v4i16(<4 x i16> %a, <4 x i16> %b) nounwind { 103; SSE2-LABEL: var_shift_v4i16: 104; SSE2: # %bb.0: 105; SSE2-NEXT: pslld $23, %xmm1 106; SSE2-NEXT: paddd {{.*}}(%rip), %xmm1 107; SSE2-NEXT: cvttps2dq %xmm1, %xmm1 108; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 109; SSE2-NEXT: pmuludq %xmm1, %xmm0 110; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 111; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 112; SSE2-NEXT: pmuludq %xmm2, %xmm1 113; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 114; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 115; SSE2-NEXT: retq 116; 117; SSE41-LABEL: var_shift_v4i16: 118; SSE41: # %bb.0: 119; SSE41-NEXT: pslld $23, %xmm1 120; SSE41-NEXT: paddd {{.*}}(%rip), %xmm1 121; SSE41-NEXT: cvttps2dq %xmm1, %xmm1 122; SSE41-NEXT: pmulld %xmm1, %xmm0 123; SSE41-NEXT: retq 124; 125; AVX1-LABEL: var_shift_v4i16: 126; AVX1: # %bb.0: 127; AVX1-NEXT: vpslld $23, %xmm1, %xmm1 128; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm1 129; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1 130; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm0 131; AVX1-NEXT: retq 132; 133; AVX2-LABEL: var_shift_v4i16: 134; AVX2: # %bb.0: 135; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 136; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 137; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 138; AVX2-NEXT: retq 139; 140; XOPAVX1-LABEL: var_shift_v4i16: 141; XOPAVX1: # %bb.0: 142; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 143; XOPAVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 144; XOPAVX1-NEXT: vpshld %xmm1, %xmm0, %xmm0 145; XOPAVX1-NEXT: retq 146; 147; XOPAVX2-LABEL: var_shift_v4i16: 148; XOPAVX2: # %bb.0: 149; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 150; XOPAVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 151; XOPAVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 152; XOPAVX2-NEXT: retq 153; 154; AVX512-LABEL: var_shift_v4i16: 155; AVX512: # %bb.0: 156; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2 157; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 158; AVX512-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 159; AVX512-NEXT: retq 160; 161; AVX512VL-LABEL: var_shift_v4i16: 162; AVX512VL: # %bb.0: 163; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 164; AVX512VL-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 165; AVX512VL-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 166; AVX512VL-NEXT: retq 167; 168; X32-SSE-LABEL: var_shift_v4i16: 169; X32-SSE: # %bb.0: 170; X32-SSE-NEXT: pslld $23, %xmm1 171; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm1 172; X32-SSE-NEXT: cvttps2dq %xmm1, %xmm1 173; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 174; X32-SSE-NEXT: pmuludq %xmm1, %xmm0 175; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 176; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 177; X32-SSE-NEXT: pmuludq %xmm2, %xmm1 178; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 179; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 180; X32-SSE-NEXT: retl 181 %shift = shl <4 x i16> %a, %b 182 ret <4 x i16> %shift 183} 184 185define <2 x i16> @var_shift_v2i16(<2 x i16> %a, <2 x i16> %b) nounwind { 186; SSE2-LABEL: var_shift_v2i16: 187; SSE2: # %bb.0: 188; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 189; SSE2-NEXT: movdqa %xmm0, %xmm2 190; SSE2-NEXT: psllq %xmm1, %xmm2 191; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 192; SSE2-NEXT: psllq %xmm1, %xmm0 193; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 194; SSE2-NEXT: retq 195; 196; SSE41-LABEL: var_shift_v2i16: 197; SSE41: # %bb.0: 198; SSE41-NEXT: pxor %xmm2, %xmm2 199; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 200; SSE41-NEXT: movdqa %xmm0, %xmm1 201; SSE41-NEXT: psllq %xmm2, %xmm1 202; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] 203; SSE41-NEXT: psllq %xmm2, %xmm0 204; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 205; SSE41-NEXT: retq 206; 207; AVX1-LABEL: var_shift_v2i16: 208; AVX1: # %bb.0: 209; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 210; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 211; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2 212; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 213; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0 214; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] 215; AVX1-NEXT: retq 216; 217; AVX2-LABEL: var_shift_v2i16: 218; AVX2: # %bb.0: 219; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 220; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 221; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 222; AVX2-NEXT: retq 223; 224; XOPAVX1-LABEL: var_shift_v2i16: 225; XOPAVX1: # %bb.0: 226; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 227; XOPAVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 228; XOPAVX1-NEXT: vpshlq %xmm1, %xmm0, %xmm0 229; XOPAVX1-NEXT: retq 230; 231; XOPAVX2-LABEL: var_shift_v2i16: 232; XOPAVX2: # %bb.0: 233; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 234; XOPAVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 235; XOPAVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 236; XOPAVX2-NEXT: retq 237; 238; AVX512-LABEL: var_shift_v2i16: 239; AVX512: # %bb.0: 240; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2 241; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 242; AVX512-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 243; AVX512-NEXT: retq 244; 245; AVX512VL-LABEL: var_shift_v2i16: 246; AVX512VL: # %bb.0: 247; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 248; AVX512VL-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 249; AVX512VL-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 250; AVX512VL-NEXT: retq 251; 252; X32-SSE-LABEL: var_shift_v2i16: 253; X32-SSE: # %bb.0: 254; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 255; X32-SSE-NEXT: movdqa %xmm0, %xmm2 256; X32-SSE-NEXT: psllq %xmm1, %xmm2 257; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 258; X32-SSE-NEXT: psllq %xmm1, %xmm0 259; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 260; X32-SSE-NEXT: retl 261 %shift = shl <2 x i16> %a, %b 262 ret <2 x i16> %shift 263} 264 265define <8 x i8> @var_shift_v8i8(<8 x i8> %a, <8 x i8> %b) nounwind { 266; SSE2-LABEL: var_shift_v8i8: 267; SSE2: # %bb.0: 268; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 269; SSE2-NEXT: pxor %xmm2, %xmm2 270; SSE2-NEXT: movdqa %xmm1, %xmm3 271; SSE2-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 272; SSE2-NEXT: pslld $23, %xmm3 273; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [1065353216,1065353216,1065353216,1065353216] 274; SSE2-NEXT: paddd %xmm4, %xmm3 275; SSE2-NEXT: cvttps2dq %xmm3, %xmm3 276; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,2,2,3,4,5,6,7] 277; SSE2-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,6,6,7] 278; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 279; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 280; SSE2-NEXT: pslld $23, %xmm1 281; SSE2-NEXT: paddd %xmm4, %xmm1 282; SSE2-NEXT: cvttps2dq %xmm1, %xmm1 283; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 284; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] 285; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 286; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0] 287; SSE2-NEXT: pmullw %xmm1, %xmm0 288; SSE2-NEXT: retq 289; 290; SSE41-LABEL: var_shift_v8i8: 291; SSE41: # %bb.0: 292; SSE41-NEXT: pxor %xmm2, %xmm2 293; SSE41-NEXT: pmovzxbw {{.*#+}} xmm3 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 294; SSE41-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15] 295; SSE41-NEXT: pslld $23, %xmm1 296; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [1065353216,1065353216,1065353216,1065353216] 297; SSE41-NEXT: paddd %xmm2, %xmm1 298; SSE41-NEXT: cvttps2dq %xmm1, %xmm1 299; SSE41-NEXT: pslld $23, %xmm3 300; SSE41-NEXT: paddd %xmm2, %xmm3 301; SSE41-NEXT: cvttps2dq %xmm3, %xmm2 302; SSE41-NEXT: packusdw %xmm1, %xmm2 303; SSE41-NEXT: pmullw %xmm2, %xmm0 304; SSE41-NEXT: retq 305; 306; AVX1-LABEL: var_shift_v8i8: 307; AVX1: # %bb.0: 308; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 309; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm1[8],xmm2[8],xmm1[9],xmm2[9],xmm1[10],xmm2[10],xmm1[11],xmm2[11],xmm1[12],xmm2[12],xmm1[13],xmm2[13],xmm1[14],xmm2[14],xmm1[15],xmm2[15] 310; AVX1-NEXT: vpslld $23, %xmm2, %xmm2 311; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216] 312; AVX1-NEXT: vpaddd %xmm3, %xmm2, %xmm2 313; AVX1-NEXT: vcvttps2dq %xmm2, %xmm2 314; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 315; AVX1-NEXT: vpslld $23, %xmm1, %xmm1 316; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1 317; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1 318; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 319; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm0 320; AVX1-NEXT: retq 321; 322; AVX2-LABEL: var_shift_v8i8: 323; AVX2: # %bb.0: 324; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 325; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 326; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 327; AVX2-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 328; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 329; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 330; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 331; AVX2-NEXT: vzeroupper 332; AVX2-NEXT: retq 333; 334; XOP-LABEL: var_shift_v8i8: 335; XOP: # %bb.0: 336; XOP-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 337; XOP-NEXT: vpshlw %xmm1, %xmm0, %xmm0 338; XOP-NEXT: retq 339; 340; AVX512DQ-LABEL: var_shift_v8i8: 341; AVX512DQ: # %bb.0: 342; AVX512DQ-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 343; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 344; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 345; AVX512DQ-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 346; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0 347; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 348; AVX512DQ-NEXT: vzeroupper 349; AVX512DQ-NEXT: retq 350; 351; AVX512BW-LABEL: var_shift_v8i8: 352; AVX512BW: # %bb.0: 353; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 354; AVX512BW-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 355; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 356; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 357; AVX512BW-NEXT: vzeroupper 358; AVX512BW-NEXT: retq 359; 360; AVX512DQVL-LABEL: var_shift_v8i8: 361; AVX512DQVL: # %bb.0: 362; AVX512DQVL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 363; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 364; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 365; AVX512DQVL-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 366; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm0 367; AVX512DQVL-NEXT: vzeroupper 368; AVX512DQVL-NEXT: retq 369; 370; AVX512BWVL-LABEL: var_shift_v8i8: 371; AVX512BWVL: # %bb.0: 372; AVX512BWVL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 373; AVX512BWVL-NEXT: vpsllvw %xmm1, %xmm0, %xmm0 374; AVX512BWVL-NEXT: retq 375; 376; X32-SSE-LABEL: var_shift_v8i8: 377; X32-SSE: # %bb.0: 378; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 379; X32-SSE-NEXT: pxor %xmm2, %xmm2 380; X32-SSE-NEXT: movdqa %xmm1, %xmm3 381; X32-SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 382; X32-SSE-NEXT: pslld $23, %xmm3 383; X32-SSE-NEXT: movdqa {{.*#+}} xmm4 = [1065353216,1065353216,1065353216,1065353216] 384; X32-SSE-NEXT: paddd %xmm4, %xmm3 385; X32-SSE-NEXT: cvttps2dq %xmm3, %xmm3 386; X32-SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,2,2,3,4,5,6,7] 387; X32-SSE-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,6,6,7] 388; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 389; X32-SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 390; X32-SSE-NEXT: pslld $23, %xmm1 391; X32-SSE-NEXT: paddd %xmm4, %xmm1 392; X32-SSE-NEXT: cvttps2dq %xmm1, %xmm1 393; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 394; X32-SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] 395; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 396; X32-SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0] 397; X32-SSE-NEXT: pmullw %xmm1, %xmm0 398; X32-SSE-NEXT: retl 399 %shift = shl <8 x i8> %a, %b 400 ret <8 x i8> %shift 401} 402 403define <4 x i8> @var_shift_v4i8(<4 x i8> %a, <4 x i8> %b) nounwind { 404; SSE2-LABEL: var_shift_v4i8: 405; SSE2: # %bb.0: 406; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 407; SSE2-NEXT: pslld $23, %xmm1 408; SSE2-NEXT: paddd {{.*}}(%rip), %xmm1 409; SSE2-NEXT: cvttps2dq %xmm1, %xmm1 410; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 411; SSE2-NEXT: pmuludq %xmm1, %xmm0 412; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 413; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 414; SSE2-NEXT: pmuludq %xmm2, %xmm1 415; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 416; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 417; SSE2-NEXT: retq 418; 419; SSE41-LABEL: var_shift_v4i8: 420; SSE41: # %bb.0: 421; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 422; SSE41-NEXT: pslld $23, %xmm1 423; SSE41-NEXT: paddd {{.*}}(%rip), %xmm1 424; SSE41-NEXT: cvttps2dq %xmm1, %xmm1 425; SSE41-NEXT: pmulld %xmm1, %xmm0 426; SSE41-NEXT: retq 427; 428; AVX1-LABEL: var_shift_v4i8: 429; AVX1: # %bb.0: 430; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 431; AVX1-NEXT: vpslld $23, %xmm1, %xmm1 432; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm1 433; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1 434; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm0 435; AVX1-NEXT: retq 436; 437; AVX2-LABEL: var_shift_v4i8: 438; AVX2: # %bb.0: 439; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 440; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 441; AVX2-NEXT: retq 442; 443; XOPAVX1-LABEL: var_shift_v4i8: 444; XOPAVX1: # %bb.0: 445; XOPAVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 446; XOPAVX1-NEXT: vpshld %xmm1, %xmm0, %xmm0 447; XOPAVX1-NEXT: retq 448; 449; XOPAVX2-LABEL: var_shift_v4i8: 450; XOPAVX2: # %bb.0: 451; XOPAVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 452; XOPAVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 453; XOPAVX2-NEXT: retq 454; 455; AVX512-LABEL: var_shift_v4i8: 456; AVX512: # %bb.0: 457; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 458; AVX512-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 459; AVX512-NEXT: retq 460; 461; AVX512VL-LABEL: var_shift_v4i8: 462; AVX512VL: # %bb.0: 463; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 464; AVX512VL-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 465; AVX512VL-NEXT: retq 466; 467; X32-SSE-LABEL: var_shift_v4i8: 468; X32-SSE: # %bb.0: 469; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 470; X32-SSE-NEXT: pslld $23, %xmm1 471; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm1 472; X32-SSE-NEXT: cvttps2dq %xmm1, %xmm1 473; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 474; X32-SSE-NEXT: pmuludq %xmm1, %xmm0 475; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 476; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 477; X32-SSE-NEXT: pmuludq %xmm2, %xmm1 478; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 479; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 480; X32-SSE-NEXT: retl 481 %shift = shl <4 x i8> %a, %b 482 ret <4 x i8> %shift 483} 484 485define <2 x i8> @var_shift_v2i8(<2 x i8> %a, <2 x i8> %b) nounwind { 486; SSE2-LABEL: var_shift_v2i8: 487; SSE2: # %bb.0: 488; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 489; SSE2-NEXT: movdqa %xmm0, %xmm2 490; SSE2-NEXT: psllq %xmm1, %xmm2 491; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 492; SSE2-NEXT: psllq %xmm1, %xmm0 493; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 494; SSE2-NEXT: retq 495; 496; SSE41-LABEL: var_shift_v2i8: 497; SSE41: # %bb.0: 498; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 499; SSE41-NEXT: movdqa %xmm0, %xmm2 500; SSE41-NEXT: psllq %xmm1, %xmm2 501; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 502; SSE41-NEXT: psllq %xmm1, %xmm0 503; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] 504; SSE41-NEXT: retq 505; 506; AVX1-LABEL: var_shift_v2i8: 507; AVX1: # %bb.0: 508; AVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 509; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2 510; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 511; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0 512; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] 513; AVX1-NEXT: retq 514; 515; AVX2-LABEL: var_shift_v2i8: 516; AVX2: # %bb.0: 517; AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 518; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 519; AVX2-NEXT: retq 520; 521; XOPAVX1-LABEL: var_shift_v2i8: 522; XOPAVX1: # %bb.0: 523; XOPAVX1-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 524; XOPAVX1-NEXT: vpshlq %xmm1, %xmm0, %xmm0 525; XOPAVX1-NEXT: retq 526; 527; XOPAVX2-LABEL: var_shift_v2i8: 528; XOPAVX2: # %bb.0: 529; XOPAVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 530; XOPAVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 531; XOPAVX2-NEXT: retq 532; 533; AVX512-LABEL: var_shift_v2i8: 534; AVX512: # %bb.0: 535; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 536; AVX512-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 537; AVX512-NEXT: retq 538; 539; AVX512VL-LABEL: var_shift_v2i8: 540; AVX512VL: # %bb.0: 541; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 542; AVX512VL-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 543; AVX512VL-NEXT: retq 544; 545; X32-SSE-LABEL: var_shift_v2i8: 546; X32-SSE: # %bb.0: 547; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 548; X32-SSE-NEXT: movdqa %xmm0, %xmm2 549; X32-SSE-NEXT: psllq %xmm1, %xmm2 550; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 551; X32-SSE-NEXT: psllq %xmm1, %xmm0 552; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 553; X32-SSE-NEXT: retl 554 %shift = shl <2 x i8> %a, %b 555 ret <2 x i8> %shift 556} 557 558; 559; Uniform Variable Shifts 560; 561 562define <2 x i32> @splatvar_shift_v2i32(<2 x i32> %a, <2 x i32> %b) nounwind { 563; SSE2-LABEL: splatvar_shift_v2i32: 564; SSE2: # %bb.0: 565; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 566; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 567; SSE2-NEXT: movdqa %xmm0, %xmm2 568; SSE2-NEXT: psllq %xmm1, %xmm2 569; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 570; SSE2-NEXT: psllq %xmm1, %xmm0 571; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 572; SSE2-NEXT: retq 573; 574; SSE41-LABEL: splatvar_shift_v2i32: 575; SSE41: # %bb.0: 576; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 577; SSE41-NEXT: pxor %xmm2, %xmm2 578; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7] 579; SSE41-NEXT: movdqa %xmm0, %xmm1 580; SSE41-NEXT: psllq %xmm2, %xmm1 581; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] 582; SSE41-NEXT: psllq %xmm2, %xmm0 583; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 584; SSE41-NEXT: retq 585; 586; AVX1-LABEL: splatvar_shift_v2i32: 587; AVX1: # %bb.0: 588; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 589; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 590; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7] 591; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2 592; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 593; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0 594; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] 595; AVX1-NEXT: retq 596; 597; AVX2-LABEL: splatvar_shift_v2i32: 598; AVX2: # %bb.0: 599; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1 600; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 601; AVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3] 602; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 603; AVX2-NEXT: retq 604; 605; XOPAVX1-LABEL: splatvar_shift_v2i32: 606; XOPAVX1: # %bb.0: 607; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 608; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 609; XOPAVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7] 610; XOPAVX1-NEXT: vpshlq %xmm1, %xmm0, %xmm0 611; XOPAVX1-NEXT: retq 612; 613; XOPAVX2-LABEL: splatvar_shift_v2i32: 614; XOPAVX2: # %bb.0: 615; XOPAVX2-NEXT: vpbroadcastq %xmm1, %xmm1 616; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 617; XOPAVX2-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3] 618; XOPAVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 619; XOPAVX2-NEXT: retq 620; 621; AVX512-LABEL: splatvar_shift_v2i32: 622; AVX512: # %bb.0: 623; AVX512-NEXT: vpbroadcastq %xmm1, %xmm1 624; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2 625; AVX512-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3] 626; AVX512-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 627; AVX512-NEXT: retq 628; 629; AVX512VL-LABEL: splatvar_shift_v2i32: 630; AVX512VL: # %bb.0: 631; AVX512VL-NEXT: vpbroadcastq %xmm1, %xmm1 632; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 633; AVX512VL-NEXT: vpblendd {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3] 634; AVX512VL-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 635; AVX512VL-NEXT: retq 636; 637; X32-SSE-LABEL: splatvar_shift_v2i32: 638; X32-SSE: # %bb.0: 639; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [4294967295,0,4294967295,0] 640; X32-SSE-NEXT: pand %xmm1, %xmm2 641; X32-SSE-NEXT: movdqa %xmm0, %xmm3 642; X32-SSE-NEXT: psllq %xmm2, %xmm3 643; X32-SSE-NEXT: pxor %xmm2, %xmm2 644; X32-SSE-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3] 645; X32-SSE-NEXT: psllq %xmm2, %xmm0 646; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm3[0],xmm0[1] 647; X32-SSE-NEXT: retl 648 %splat = shufflevector <2 x i32> %b, <2 x i32> undef, <2 x i32> zeroinitializer 649 %shift = shl <2 x i32> %a, %splat 650 ret <2 x i32> %shift 651} 652 653define <4 x i16> @splatvar_shift_v4i16(<4 x i16> %a, <4 x i16> %b) nounwind { 654; SSE2-LABEL: splatvar_shift_v4i16: 655; SSE2: # %bb.0: 656; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] 657; SSE2-NEXT: pslld $23, %xmm1 658; SSE2-NEXT: paddd {{.*}}(%rip), %xmm1 659; SSE2-NEXT: cvttps2dq %xmm1, %xmm1 660; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 661; SSE2-NEXT: pmuludq %xmm1, %xmm0 662; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 663; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 664; SSE2-NEXT: pmuludq %xmm2, %xmm1 665; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 666; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 667; SSE2-NEXT: retq 668; 669; SSE41-LABEL: splatvar_shift_v4i16: 670; SSE41: # %bb.0: 671; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] 672; SSE41-NEXT: pslld $23, %xmm1 673; SSE41-NEXT: paddd {{.*}}(%rip), %xmm1 674; SSE41-NEXT: cvttps2dq %xmm1, %xmm1 675; SSE41-NEXT: pmulld %xmm1, %xmm0 676; SSE41-NEXT: retq 677; 678; AVX1-LABEL: splatvar_shift_v4i16: 679; AVX1: # %bb.0: 680; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] 681; AVX1-NEXT: vpslld $23, %xmm1, %xmm1 682; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm1 683; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1 684; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm0 685; AVX1-NEXT: retq 686; 687; AVX2-LABEL: splatvar_shift_v4i16: 688; AVX2: # %bb.0: 689; AVX2-NEXT: vpbroadcastd %xmm1, %xmm1 690; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 691; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 692; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 693; AVX2-NEXT: retq 694; 695; XOPAVX1-LABEL: splatvar_shift_v4i16: 696; XOPAVX1: # %bb.0: 697; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] 698; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 699; XOPAVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 700; XOPAVX1-NEXT: vpshld %xmm1, %xmm0, %xmm0 701; XOPAVX1-NEXT: retq 702; 703; XOPAVX2-LABEL: splatvar_shift_v4i16: 704; XOPAVX2: # %bb.0: 705; XOPAVX2-NEXT: vpbroadcastd %xmm1, %xmm1 706; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 707; XOPAVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 708; XOPAVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 709; XOPAVX2-NEXT: retq 710; 711; AVX512-LABEL: splatvar_shift_v4i16: 712; AVX512: # %bb.0: 713; AVX512-NEXT: vpbroadcastd %xmm1, %xmm1 714; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2 715; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 716; AVX512-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 717; AVX512-NEXT: retq 718; 719; AVX512VL-LABEL: splatvar_shift_v4i16: 720; AVX512VL: # %bb.0: 721; AVX512VL-NEXT: vpbroadcastd %xmm1, %xmm1 722; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 723; AVX512VL-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1],xmm1[2],xmm2[3],xmm1[4],xmm2[5],xmm1[6],xmm2[7] 724; AVX512VL-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 725; AVX512VL-NEXT: retq 726; 727; X32-SSE-LABEL: splatvar_shift_v4i16: 728; X32-SSE: # %bb.0: 729; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] 730; X32-SSE-NEXT: pslld $23, %xmm1 731; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm1 732; X32-SSE-NEXT: cvttps2dq %xmm1, %xmm1 733; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 734; X32-SSE-NEXT: pmuludq %xmm1, %xmm0 735; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 736; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 737; X32-SSE-NEXT: pmuludq %xmm2, %xmm1 738; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 739; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 740; X32-SSE-NEXT: retl 741 %splat = shufflevector <4 x i16> %b, <4 x i16> undef, <4 x i32> zeroinitializer 742 %shift = shl <4 x i16> %a, %splat 743 ret <4 x i16> %shift 744} 745 746define <2 x i16> @splatvar_shift_v2i16(<2 x i16> %a, <2 x i16> %b) nounwind { 747; SSE2-LABEL: splatvar_shift_v2i16: 748; SSE2: # %bb.0: 749; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 750; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 751; SSE2-NEXT: movdqa %xmm0, %xmm2 752; SSE2-NEXT: psllq %xmm1, %xmm2 753; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 754; SSE2-NEXT: psllq %xmm1, %xmm0 755; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 756; SSE2-NEXT: retq 757; 758; SSE41-LABEL: splatvar_shift_v2i16: 759; SSE41: # %bb.0: 760; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 761; SSE41-NEXT: pxor %xmm2, %xmm2 762; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 763; SSE41-NEXT: movdqa %xmm0, %xmm1 764; SSE41-NEXT: psllq %xmm2, %xmm1 765; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] 766; SSE41-NEXT: psllq %xmm2, %xmm0 767; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 768; SSE41-NEXT: retq 769; 770; AVX1-LABEL: splatvar_shift_v2i16: 771; AVX1: # %bb.0: 772; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 773; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 774; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 775; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2 776; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 777; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0 778; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] 779; AVX1-NEXT: retq 780; 781; AVX2-LABEL: splatvar_shift_v2i16: 782; AVX2: # %bb.0: 783; AVX2-NEXT: vpbroadcastq %xmm1, %xmm1 784; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 785; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 786; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 787; AVX2-NEXT: retq 788; 789; XOPAVX1-LABEL: splatvar_shift_v2i16: 790; XOPAVX1: # %bb.0: 791; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 792; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 793; XOPAVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 794; XOPAVX1-NEXT: vpshlq %xmm1, %xmm0, %xmm0 795; XOPAVX1-NEXT: retq 796; 797; XOPAVX2-LABEL: splatvar_shift_v2i16: 798; XOPAVX2: # %bb.0: 799; XOPAVX2-NEXT: vpbroadcastq %xmm1, %xmm1 800; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 801; XOPAVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 802; XOPAVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 803; XOPAVX2-NEXT: retq 804; 805; AVX512-LABEL: splatvar_shift_v2i16: 806; AVX512: # %bb.0: 807; AVX512-NEXT: vpbroadcastq %xmm1, %xmm1 808; AVX512-NEXT: vpxor %xmm2, %xmm2, %xmm2 809; AVX512-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 810; AVX512-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 811; AVX512-NEXT: retq 812; 813; AVX512VL-LABEL: splatvar_shift_v2i16: 814; AVX512VL: # %bb.0: 815; AVX512VL-NEXT: vpbroadcastq %xmm1, %xmm1 816; AVX512VL-NEXT: vpxor %xmm2, %xmm2, %xmm2 817; AVX512VL-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3],xmm1[4],xmm2[5,6,7] 818; AVX512VL-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 819; AVX512VL-NEXT: retq 820; 821; X32-SSE-LABEL: splatvar_shift_v2i16: 822; X32-SSE: # %bb.0: 823; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 824; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 825; X32-SSE-NEXT: movdqa %xmm0, %xmm2 826; X32-SSE-NEXT: psllq %xmm1, %xmm2 827; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 828; X32-SSE-NEXT: psllq %xmm1, %xmm0 829; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 830; X32-SSE-NEXT: retl 831 %splat = shufflevector <2 x i16> %b, <2 x i16> undef, <2 x i32> zeroinitializer 832 %shift = shl <2 x i16> %a, %splat 833 ret <2 x i16> %shift 834} 835 836define <8 x i8> @splatvar_shift_v8i8(<8 x i8> %a, <8 x i8> %b) nounwind { 837; SSE2-LABEL: splatvar_shift_v8i8: 838; SSE2: # %bb.0: 839; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] 840; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] 841; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 842; SSE2-NEXT: pxor %xmm2, %xmm2 843; SSE2-NEXT: movdqa %xmm1, %xmm3 844; SSE2-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 845; SSE2-NEXT: pslld $23, %xmm3 846; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [1065353216,1065353216,1065353216,1065353216] 847; SSE2-NEXT: paddd %xmm4, %xmm3 848; SSE2-NEXT: cvttps2dq %xmm3, %xmm3 849; SSE2-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,2,2,3,4,5,6,7] 850; SSE2-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,6,6,7] 851; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 852; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 853; SSE2-NEXT: pslld $23, %xmm1 854; SSE2-NEXT: paddd %xmm4, %xmm1 855; SSE2-NEXT: cvttps2dq %xmm1, %xmm1 856; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 857; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] 858; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 859; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0] 860; SSE2-NEXT: pmullw %xmm1, %xmm0 861; SSE2-NEXT: retq 862; 863; SSE41-LABEL: splatvar_shift_v8i8: 864; SSE41: # %bb.0: 865; SSE41-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero 866; SSE41-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 867; SSE41-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 868; SSE41-NEXT: pslld $23, %xmm1 869; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216] 870; SSE41-NEXT: paddd %xmm3, %xmm1 871; SSE41-NEXT: cvttps2dq %xmm1, %xmm1 872; SSE41-NEXT: pslld $23, %xmm2 873; SSE41-NEXT: paddd %xmm3, %xmm2 874; SSE41-NEXT: cvttps2dq %xmm2, %xmm2 875; SSE41-NEXT: packusdw %xmm1, %xmm2 876; SSE41-NEXT: pmullw %xmm2, %xmm0 877; SSE41-NEXT: retq 878; 879; AVX1-LABEL: splatvar_shift_v8i8: 880; AVX1: # %bb.0: 881; AVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero 882; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm2 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 883; AVX1-NEXT: vpslld $23, %xmm2, %xmm2 884; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [1065353216,1065353216,1065353216,1065353216] 885; AVX1-NEXT: vpaddd %xmm3, %xmm2, %xmm2 886; AVX1-NEXT: vcvttps2dq %xmm2, %xmm2 887; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 888; AVX1-NEXT: vpslld $23, %xmm1, %xmm1 889; AVX1-NEXT: vpaddd %xmm3, %xmm1, %xmm1 890; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1 891; AVX1-NEXT: vpackusdw %xmm2, %xmm1, %xmm1 892; AVX1-NEXT: vpmullw %xmm1, %xmm0, %xmm0 893; AVX1-NEXT: retq 894; 895; AVX2-LABEL: splatvar_shift_v8i8: 896; AVX2: # %bb.0: 897; AVX2-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero 898; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 899; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 900; AVX2-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 901; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] 902; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 903; AVX2-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 904; AVX2-NEXT: vzeroupper 905; AVX2-NEXT: retq 906; 907; XOP-LABEL: splatvar_shift_v8i8: 908; XOP: # %bb.0: 909; XOP-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero 910; XOP-NEXT: vpshlw %xmm1, %xmm0, %xmm0 911; XOP-NEXT: retq 912; 913; AVX512DQ-LABEL: splatvar_shift_v8i8: 914; AVX512DQ: # %bb.0: 915; AVX512DQ-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero 916; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 917; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 918; AVX512DQ-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 919; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0 920; AVX512DQ-NEXT: # kill: def $xmm0 killed $xmm0 killed $ymm0 921; AVX512DQ-NEXT: vzeroupper 922; AVX512DQ-NEXT: retq 923; 924; AVX512BW-LABEL: splatvar_shift_v8i8: 925; AVX512BW: # %bb.0: 926; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 927; AVX512BW-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero 928; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 929; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 930; AVX512BW-NEXT: vzeroupper 931; AVX512BW-NEXT: retq 932; 933; AVX512DQVL-LABEL: splatvar_shift_v8i8: 934; AVX512DQVL: # %bb.0: 935; AVX512DQVL-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero 936; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 937; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 938; AVX512DQVL-NEXT: vpsllvd %ymm1, %ymm0, %ymm0 939; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm0 940; AVX512DQVL-NEXT: vzeroupper 941; AVX512DQVL-NEXT: retq 942; 943; AVX512BWVL-LABEL: splatvar_shift_v8i8: 944; AVX512BWVL: # %bb.0: 945; AVX512BWVL-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero,xmm1[0],zero 946; AVX512BWVL-NEXT: vpsllvw %xmm1, %xmm0, %xmm0 947; AVX512BWVL-NEXT: retq 948; 949; X32-SSE-LABEL: splatvar_shift_v8i8: 950; X32-SSE: # %bb.0: 951; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,2,3,4,5,6,7] 952; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] 953; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 954; X32-SSE-NEXT: pxor %xmm2, %xmm2 955; X32-SSE-NEXT: movdqa %xmm1, %xmm3 956; X32-SSE-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 957; X32-SSE-NEXT: pslld $23, %xmm3 958; X32-SSE-NEXT: movdqa {{.*#+}} xmm4 = [1065353216,1065353216,1065353216,1065353216] 959; X32-SSE-NEXT: paddd %xmm4, %xmm3 960; X32-SSE-NEXT: cvttps2dq %xmm3, %xmm3 961; X32-SSE-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,2,2,3,4,5,6,7] 962; X32-SSE-NEXT: pshufhw {{.*#+}} xmm3 = xmm3[0,1,2,3,4,6,6,7] 963; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] 964; X32-SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 965; X32-SSE-NEXT: pslld $23, %xmm1 966; X32-SSE-NEXT: paddd %xmm4, %xmm1 967; X32-SSE-NEXT: cvttps2dq %xmm1, %xmm1 968; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] 969; X32-SSE-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] 970; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 971; X32-SSE-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0] 972; X32-SSE-NEXT: pmullw %xmm1, %xmm0 973; X32-SSE-NEXT: retl 974 %splat = shufflevector <8 x i8> %b, <8 x i8> undef, <8 x i32> zeroinitializer 975 %shift = shl <8 x i8> %a, %splat 976 ret <8 x i8> %shift 977} 978 979define <4 x i8> @splatvar_shift_v4i8(<4 x i8> %a, <4 x i8> %b) nounwind { 980; SSE2-LABEL: splatvar_shift_v4i8: 981; SSE2: # %bb.0: 982; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] 983; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 984; SSE2-NEXT: pslld $23, %xmm1 985; SSE2-NEXT: paddd {{.*}}(%rip), %xmm1 986; SSE2-NEXT: cvttps2dq %xmm1, %xmm1 987; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 988; SSE2-NEXT: pmuludq %xmm1, %xmm0 989; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 990; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 991; SSE2-NEXT: pmuludq %xmm2, %xmm1 992; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 993; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 994; SSE2-NEXT: retq 995; 996; SSE41-LABEL: splatvar_shift_v4i8: 997; SSE41: # %bb.0: 998; SSE41-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero 999; SSE41-NEXT: pslld $23, %xmm1 1000; SSE41-NEXT: paddd {{.*}}(%rip), %xmm1 1001; SSE41-NEXT: cvttps2dq %xmm1, %xmm1 1002; SSE41-NEXT: pmulld %xmm1, %xmm0 1003; SSE41-NEXT: retq 1004; 1005; AVX1-LABEL: splatvar_shift_v4i8: 1006; AVX1: # %bb.0: 1007; AVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero 1008; AVX1-NEXT: vpslld $23, %xmm1, %xmm1 1009; AVX1-NEXT: vpaddd {{.*}}(%rip), %xmm1, %xmm1 1010; AVX1-NEXT: vcvttps2dq %xmm1, %xmm1 1011; AVX1-NEXT: vpmulld %xmm1, %xmm0, %xmm0 1012; AVX1-NEXT: retq 1013; 1014; AVX2-LABEL: splatvar_shift_v4i8: 1015; AVX2: # %bb.0: 1016; AVX2-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero 1017; AVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 1018; AVX2-NEXT: retq 1019; 1020; XOPAVX1-LABEL: splatvar_shift_v4i8: 1021; XOPAVX1: # %bb.0: 1022; XOPAVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero 1023; XOPAVX1-NEXT: vpshld %xmm1, %xmm0, %xmm0 1024; XOPAVX1-NEXT: retq 1025; 1026; XOPAVX2-LABEL: splatvar_shift_v4i8: 1027; XOPAVX2: # %bb.0: 1028; XOPAVX2-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero 1029; XOPAVX2-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 1030; XOPAVX2-NEXT: retq 1031; 1032; AVX512-LABEL: splatvar_shift_v4i8: 1033; AVX512: # %bb.0: 1034; AVX512-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero 1035; AVX512-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 1036; AVX512-NEXT: retq 1037; 1038; AVX512VL-LABEL: splatvar_shift_v4i8: 1039; AVX512VL: # %bb.0: 1040; AVX512VL-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero,xmm1[0],zero,zero,zero 1041; AVX512VL-NEXT: vpsllvd %xmm1, %xmm0, %xmm0 1042; AVX512VL-NEXT: retq 1043; 1044; X32-SSE-LABEL: splatvar_shift_v4i8: 1045; X32-SSE: # %bb.0: 1046; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,0,0,0] 1047; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 1048; X32-SSE-NEXT: pslld $23, %xmm1 1049; X32-SSE-NEXT: paddd {{\.LCPI.*}}, %xmm1 1050; X32-SSE-NEXT: cvttps2dq %xmm1, %xmm1 1051; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 1052; X32-SSE-NEXT: pmuludq %xmm1, %xmm0 1053; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1054; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1055; X32-SSE-NEXT: pmuludq %xmm2, %xmm1 1056; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1057; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1058; X32-SSE-NEXT: retl 1059 %splat = shufflevector <4 x i8> %b, <4 x i8> undef, <4 x i32> zeroinitializer 1060 %shift = shl <4 x i8> %a, %splat 1061 ret <4 x i8> %shift 1062} 1063 1064define <2 x i8> @splatvar_shift_v2i8(<2 x i8> %a, <2 x i8> %b) nounwind { 1065; SSE2-LABEL: splatvar_shift_v2i8: 1066; SSE2: # %bb.0: 1067; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 1068; SSE2-NEXT: pand {{.*}}(%rip), %xmm1 1069; SSE2-NEXT: movdqa %xmm0, %xmm2 1070; SSE2-NEXT: psllq %xmm1, %xmm2 1071; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 1072; SSE2-NEXT: psllq %xmm1, %xmm0 1073; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 1074; SSE2-NEXT: retq 1075; 1076; SSE41-LABEL: splatvar_shift_v2i8: 1077; SSE41: # %bb.0: 1078; SSE41-NEXT: pshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[0],zero,zero,zero,zero,zero,zero,zero 1079; SSE41-NEXT: movdqa %xmm0, %xmm2 1080; SSE41-NEXT: psllq %xmm1, %xmm2 1081; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 1082; SSE41-NEXT: psllq %xmm1, %xmm0 1083; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] 1084; SSE41-NEXT: retq 1085; 1086; AVX1-LABEL: splatvar_shift_v2i8: 1087; AVX1: # %bb.0: 1088; AVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[0],zero,zero,zero,zero,zero,zero,zero 1089; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm2 1090; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 1091; AVX1-NEXT: vpsllq %xmm1, %xmm0, %xmm0 1092; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7] 1093; AVX1-NEXT: retq 1094; 1095; AVX2-LABEL: splatvar_shift_v2i8: 1096; AVX2: # %bb.0: 1097; AVX2-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[0],zero,zero,zero,zero,zero,zero,zero 1098; AVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 1099; AVX2-NEXT: retq 1100; 1101; XOPAVX1-LABEL: splatvar_shift_v2i8: 1102; XOPAVX1: # %bb.0: 1103; XOPAVX1-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[0],zero,zero,zero,zero,zero,zero,zero 1104; XOPAVX1-NEXT: vpshlq %xmm1, %xmm0, %xmm0 1105; XOPAVX1-NEXT: retq 1106; 1107; XOPAVX2-LABEL: splatvar_shift_v2i8: 1108; XOPAVX2: # %bb.0: 1109; XOPAVX2-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[0],zero,zero,zero,zero,zero,zero,zero 1110; XOPAVX2-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 1111; XOPAVX2-NEXT: retq 1112; 1113; AVX512-LABEL: splatvar_shift_v2i8: 1114; AVX512: # %bb.0: 1115; AVX512-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[0],zero,zero,zero,zero,zero,zero,zero 1116; AVX512-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 1117; AVX512-NEXT: retq 1118; 1119; AVX512VL-LABEL: splatvar_shift_v2i8: 1120; AVX512VL: # %bb.0: 1121; AVX512VL-NEXT: vpshufb {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,zero,zero,zero,zero,xmm1[0],zero,zero,zero,zero,zero,zero,zero 1122; AVX512VL-NEXT: vpsllvq %xmm1, %xmm0, %xmm0 1123; AVX512VL-NEXT: retq 1124; 1125; X32-SSE-LABEL: splatvar_shift_v2i8: 1126; X32-SSE: # %bb.0: 1127; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 1128; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm1 1129; X32-SSE-NEXT: movdqa %xmm0, %xmm2 1130; X32-SSE-NEXT: psllq %xmm1, %xmm2 1131; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 1132; X32-SSE-NEXT: psllq %xmm1, %xmm0 1133; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1] 1134; X32-SSE-NEXT: retl 1135 %splat = shufflevector <2 x i8> %b, <2 x i8> undef, <2 x i32> zeroinitializer 1136 %shift = shl <2 x i8> %a, %splat 1137 ret <2 x i8> %shift 1138} 1139 1140; 1141; Constant Shifts 1142; 1143 1144define <2 x i32> @constant_shift_v2i32(<2 x i32> %a) nounwind { 1145; SSE2-LABEL: constant_shift_v2i32: 1146; SSE2: # %bb.0: 1147; SSE2-NEXT: movdqa %xmm0, %xmm1 1148; SSE2-NEXT: psllq $4, %xmm1 1149; SSE2-NEXT: psllq $5, %xmm0 1150; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 1151; SSE2-NEXT: retq 1152; 1153; SSE41-LABEL: constant_shift_v2i32: 1154; SSE41: # %bb.0: 1155; SSE41-NEXT: movdqa %xmm0, %xmm1 1156; SSE41-NEXT: psllq $5, %xmm1 1157; SSE41-NEXT: psllq $4, %xmm0 1158; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1159; SSE41-NEXT: retq 1160; 1161; AVX1-LABEL: constant_shift_v2i32: 1162; AVX1: # %bb.0: 1163; AVX1-NEXT: vpsllq $5, %xmm0, %xmm1 1164; AVX1-NEXT: vpsllq $4, %xmm0, %xmm0 1165; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1166; AVX1-NEXT: retq 1167; 1168; AVX2-LABEL: constant_shift_v2i32: 1169; AVX2: # %bb.0: 1170; AVX2-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1171; AVX2-NEXT: retq 1172; 1173; XOPAVX1-LABEL: constant_shift_v2i32: 1174; XOPAVX1: # %bb.0: 1175; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm0, %xmm0 1176; XOPAVX1-NEXT: retq 1177; 1178; XOPAVX2-LABEL: constant_shift_v2i32: 1179; XOPAVX2: # %bb.0: 1180; XOPAVX2-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1181; XOPAVX2-NEXT: retq 1182; 1183; AVX512-LABEL: constant_shift_v2i32: 1184; AVX512: # %bb.0: 1185; AVX512-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1186; AVX512-NEXT: retq 1187; 1188; AVX512VL-LABEL: constant_shift_v2i32: 1189; AVX512VL: # %bb.0: 1190; AVX512VL-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1191; AVX512VL-NEXT: retq 1192; 1193; X32-SSE-LABEL: constant_shift_v2i32: 1194; X32-SSE: # %bb.0: 1195; X32-SSE-NEXT: movdqa %xmm0, %xmm1 1196; X32-SSE-NEXT: psllq $4, %xmm1 1197; X32-SSE-NEXT: psllq $5, %xmm0 1198; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 1199; X32-SSE-NEXT: retl 1200 %shift = shl <2 x i32> %a, <i32 4, i32 5> 1201 ret <2 x i32> %shift 1202} 1203 1204define <4 x i16> @constant_shift_v4i16(<4 x i16> %a) nounwind { 1205; SSE2-LABEL: constant_shift_v4i16: 1206; SSE2: # %bb.0: 1207; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8] 1208; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 1209; SSE2-NEXT: pmuludq %xmm1, %xmm0 1210; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1211; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1212; SSE2-NEXT: pmuludq %xmm2, %xmm1 1213; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1214; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1215; SSE2-NEXT: retq 1216; 1217; SSE41-LABEL: constant_shift_v4i16: 1218; SSE41: # %bb.0: 1219; SSE41-NEXT: pmulld {{.*}}(%rip), %xmm0 1220; SSE41-NEXT: retq 1221; 1222; AVX1-LABEL: constant_shift_v4i16: 1223; AVX1: # %bb.0: 1224; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 1225; AVX1-NEXT: retq 1226; 1227; AVX2-LABEL: constant_shift_v4i16: 1228; AVX2: # %bb.0: 1229; AVX2-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0 1230; AVX2-NEXT: retq 1231; 1232; XOPAVX1-LABEL: constant_shift_v4i16: 1233; XOPAVX1: # %bb.0: 1234; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm0 1235; XOPAVX1-NEXT: retq 1236; 1237; XOPAVX2-LABEL: constant_shift_v4i16: 1238; XOPAVX2: # %bb.0: 1239; XOPAVX2-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0 1240; XOPAVX2-NEXT: retq 1241; 1242; AVX512-LABEL: constant_shift_v4i16: 1243; AVX512: # %bb.0: 1244; AVX512-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0 1245; AVX512-NEXT: retq 1246; 1247; AVX512VL-LABEL: constant_shift_v4i16: 1248; AVX512VL: # %bb.0: 1249; AVX512VL-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0 1250; AVX512VL-NEXT: retq 1251; 1252; X32-SSE-LABEL: constant_shift_v4i16: 1253; X32-SSE: # %bb.0: 1254; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8] 1255; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 1256; X32-SSE-NEXT: pmuludq %xmm1, %xmm0 1257; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1258; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1259; X32-SSE-NEXT: pmuludq %xmm2, %xmm1 1260; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1261; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1262; X32-SSE-NEXT: retl 1263 %shift = shl <4 x i16> %a, <i16 0, i16 1, i16 2, i16 3> 1264 ret <4 x i16> %shift 1265} 1266 1267define <2 x i16> @constant_shift_v2i16(<2 x i16> %a) nounwind { 1268; SSE2-LABEL: constant_shift_v2i16: 1269; SSE2: # %bb.0: 1270; SSE2-NEXT: movdqa %xmm0, %xmm1 1271; SSE2-NEXT: psllq $2, %xmm1 1272; SSE2-NEXT: psllq $3, %xmm0 1273; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 1274; SSE2-NEXT: retq 1275; 1276; SSE41-LABEL: constant_shift_v2i16: 1277; SSE41: # %bb.0: 1278; SSE41-NEXT: movdqa %xmm0, %xmm1 1279; SSE41-NEXT: psllq $3, %xmm1 1280; SSE41-NEXT: psllq $2, %xmm0 1281; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1282; SSE41-NEXT: retq 1283; 1284; AVX1-LABEL: constant_shift_v2i16: 1285; AVX1: # %bb.0: 1286; AVX1-NEXT: vpsllq $3, %xmm0, %xmm1 1287; AVX1-NEXT: vpsllq $2, %xmm0, %xmm0 1288; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1289; AVX1-NEXT: retq 1290; 1291; AVX2-LABEL: constant_shift_v2i16: 1292; AVX2: # %bb.0: 1293; AVX2-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1294; AVX2-NEXT: retq 1295; 1296; XOPAVX1-LABEL: constant_shift_v2i16: 1297; XOPAVX1: # %bb.0: 1298; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm0, %xmm0 1299; XOPAVX1-NEXT: retq 1300; 1301; XOPAVX2-LABEL: constant_shift_v2i16: 1302; XOPAVX2: # %bb.0: 1303; XOPAVX2-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1304; XOPAVX2-NEXT: retq 1305; 1306; AVX512-LABEL: constant_shift_v2i16: 1307; AVX512: # %bb.0: 1308; AVX512-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1309; AVX512-NEXT: retq 1310; 1311; AVX512VL-LABEL: constant_shift_v2i16: 1312; AVX512VL: # %bb.0: 1313; AVX512VL-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1314; AVX512VL-NEXT: retq 1315; 1316; X32-SSE-LABEL: constant_shift_v2i16: 1317; X32-SSE: # %bb.0: 1318; X32-SSE-NEXT: movdqa %xmm0, %xmm1 1319; X32-SSE-NEXT: psllq $2, %xmm1 1320; X32-SSE-NEXT: psllq $3, %xmm0 1321; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 1322; X32-SSE-NEXT: retl 1323 %shift = shl <2 x i16> %a, <i16 2, i16 3> 1324 ret <2 x i16> %shift 1325} 1326 1327define <8 x i8> @constant_shift_v8i8(<8 x i8> %a) nounwind { 1328; SSE-LABEL: constant_shift_v8i8: 1329; SSE: # %bb.0: 1330; SSE-NEXT: pmullw {{.*}}(%rip), %xmm0 1331; SSE-NEXT: retq 1332; 1333; AVX-LABEL: constant_shift_v8i8: 1334; AVX: # %bb.0: 1335; AVX-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 1336; AVX-NEXT: retq 1337; 1338; XOP-LABEL: constant_shift_v8i8: 1339; XOP: # %bb.0: 1340; XOP-NEXT: vpshlw {{.*}}(%rip), %xmm0, %xmm0 1341; XOP-NEXT: retq 1342; 1343; AVX512DQ-LABEL: constant_shift_v8i8: 1344; AVX512DQ: # %bb.0: 1345; AVX512DQ-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 1346; AVX512DQ-NEXT: retq 1347; 1348; AVX512BW-LABEL: constant_shift_v8i8: 1349; AVX512BW: # %bb.0: 1350; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 def $zmm0 1351; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7] 1352; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm0 1353; AVX512BW-NEXT: # kill: def $xmm0 killed $xmm0 killed $zmm0 1354; AVX512BW-NEXT: vzeroupper 1355; AVX512BW-NEXT: retq 1356; 1357; AVX512DQVL-LABEL: constant_shift_v8i8: 1358; AVX512DQVL: # %bb.0: 1359; AVX512DQVL-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 1360; AVX512DQVL-NEXT: retq 1361; 1362; AVX512BWVL-LABEL: constant_shift_v8i8: 1363; AVX512BWVL: # %bb.0: 1364; AVX512BWVL-NEXT: vpsllvw {{.*}}(%rip), %xmm0, %xmm0 1365; AVX512BWVL-NEXT: retq 1366; 1367; X32-SSE-LABEL: constant_shift_v8i8: 1368; X32-SSE: # %bb.0: 1369; X32-SSE-NEXT: pmullw {{\.LCPI.*}}, %xmm0 1370; X32-SSE-NEXT: retl 1371 %shift = shl <8 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7> 1372 ret <8 x i8> %shift 1373} 1374 1375define <4 x i8> @constant_shift_v4i8(<4 x i8> %a) nounwind { 1376; SSE2-LABEL: constant_shift_v4i8: 1377; SSE2: # %bb.0: 1378; SSE2-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8] 1379; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 1380; SSE2-NEXT: pmuludq %xmm1, %xmm0 1381; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1382; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1383; SSE2-NEXT: pmuludq %xmm2, %xmm1 1384; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1385; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1386; SSE2-NEXT: retq 1387; 1388; SSE41-LABEL: constant_shift_v4i8: 1389; SSE41: # %bb.0: 1390; SSE41-NEXT: pmulld {{.*}}(%rip), %xmm0 1391; SSE41-NEXT: retq 1392; 1393; AVX1-LABEL: constant_shift_v4i8: 1394; AVX1: # %bb.0: 1395; AVX1-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 1396; AVX1-NEXT: retq 1397; 1398; AVX2-LABEL: constant_shift_v4i8: 1399; AVX2: # %bb.0: 1400; AVX2-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0 1401; AVX2-NEXT: retq 1402; 1403; XOPAVX1-LABEL: constant_shift_v4i8: 1404; XOPAVX1: # %bb.0: 1405; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm0 1406; XOPAVX1-NEXT: retq 1407; 1408; XOPAVX2-LABEL: constant_shift_v4i8: 1409; XOPAVX2: # %bb.0: 1410; XOPAVX2-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0 1411; XOPAVX2-NEXT: retq 1412; 1413; AVX512-LABEL: constant_shift_v4i8: 1414; AVX512: # %bb.0: 1415; AVX512-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0 1416; AVX512-NEXT: retq 1417; 1418; AVX512VL-LABEL: constant_shift_v4i8: 1419; AVX512VL: # %bb.0: 1420; AVX512VL-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0 1421; AVX512VL-NEXT: retq 1422; 1423; X32-SSE-LABEL: constant_shift_v4i8: 1424; X32-SSE: # %bb.0: 1425; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [1,2,4,8] 1426; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,3,3] 1427; X32-SSE-NEXT: pmuludq %xmm1, %xmm0 1428; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1429; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1430; X32-SSE-NEXT: pmuludq %xmm2, %xmm1 1431; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] 1432; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1433; X32-SSE-NEXT: retl 1434 %shift = shl <4 x i8> %a, <i8 0, i8 1, i8 2, i8 3> 1435 ret <4 x i8> %shift 1436} 1437 1438define <2 x i8> @constant_shift_v2i8(<2 x i8> %a) nounwind { 1439; SSE2-LABEL: constant_shift_v2i8: 1440; SSE2: # %bb.0: 1441; SSE2-NEXT: movdqa %xmm0, %xmm1 1442; SSE2-NEXT: psllq $2, %xmm1 1443; SSE2-NEXT: psllq $3, %xmm0 1444; SSE2-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 1445; SSE2-NEXT: retq 1446; 1447; SSE41-LABEL: constant_shift_v2i8: 1448; SSE41: # %bb.0: 1449; SSE41-NEXT: movdqa %xmm0, %xmm1 1450; SSE41-NEXT: psllq $3, %xmm1 1451; SSE41-NEXT: psllq $2, %xmm0 1452; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1453; SSE41-NEXT: retq 1454; 1455; AVX1-LABEL: constant_shift_v2i8: 1456; AVX1: # %bb.0: 1457; AVX1-NEXT: vpsllq $3, %xmm0, %xmm1 1458; AVX1-NEXT: vpsllq $2, %xmm0, %xmm0 1459; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1460; AVX1-NEXT: retq 1461; 1462; AVX2-LABEL: constant_shift_v2i8: 1463; AVX2: # %bb.0: 1464; AVX2-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1465; AVX2-NEXT: retq 1466; 1467; XOPAVX1-LABEL: constant_shift_v2i8: 1468; XOPAVX1: # %bb.0: 1469; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm0, %xmm0 1470; XOPAVX1-NEXT: retq 1471; 1472; XOPAVX2-LABEL: constant_shift_v2i8: 1473; XOPAVX2: # %bb.0: 1474; XOPAVX2-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1475; XOPAVX2-NEXT: retq 1476; 1477; AVX512-LABEL: constant_shift_v2i8: 1478; AVX512: # %bb.0: 1479; AVX512-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1480; AVX512-NEXT: retq 1481; 1482; AVX512VL-LABEL: constant_shift_v2i8: 1483; AVX512VL: # %bb.0: 1484; AVX512VL-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 1485; AVX512VL-NEXT: retq 1486; 1487; X32-SSE-LABEL: constant_shift_v2i8: 1488; X32-SSE: # %bb.0: 1489; X32-SSE-NEXT: movdqa %xmm0, %xmm1 1490; X32-SSE-NEXT: psllq $2, %xmm1 1491; X32-SSE-NEXT: psllq $3, %xmm0 1492; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1] 1493; X32-SSE-NEXT: retl 1494 %shift = shl <2 x i8> %a, <i8 2, i8 3> 1495 ret <2 x i8> %shift 1496} 1497 1498; 1499; Uniform Constant Shifts 1500; 1501 1502define <2 x i32> @splatconstant_shift_v2i32(<2 x i32> %a) nounwind { 1503; SSE-LABEL: splatconstant_shift_v2i32: 1504; SSE: # %bb.0: 1505; SSE-NEXT: psllq $5, %xmm0 1506; SSE-NEXT: retq 1507; 1508; AVX-LABEL: splatconstant_shift_v2i32: 1509; AVX: # %bb.0: 1510; AVX-NEXT: vpsllq $5, %xmm0, %xmm0 1511; AVX-NEXT: retq 1512; 1513; XOP-LABEL: splatconstant_shift_v2i32: 1514; XOP: # %bb.0: 1515; XOP-NEXT: vpsllq $5, %xmm0, %xmm0 1516; XOP-NEXT: retq 1517; 1518; AVX512-LABEL: splatconstant_shift_v2i32: 1519; AVX512: # %bb.0: 1520; AVX512-NEXT: vpsllq $5, %xmm0, %xmm0 1521; AVX512-NEXT: retq 1522; 1523; AVX512VL-LABEL: splatconstant_shift_v2i32: 1524; AVX512VL: # %bb.0: 1525; AVX512VL-NEXT: vpsllq $5, %xmm0, %xmm0 1526; AVX512VL-NEXT: retq 1527; 1528; X32-SSE-LABEL: splatconstant_shift_v2i32: 1529; X32-SSE: # %bb.0: 1530; X32-SSE-NEXT: psllq $5, %xmm0 1531; X32-SSE-NEXT: retl 1532 %shift = shl <2 x i32> %a, <i32 5, i32 5> 1533 ret <2 x i32> %shift 1534} 1535 1536define <4 x i16> @splatconstant_shift_v4i16(<4 x i16> %a) nounwind { 1537; SSE-LABEL: splatconstant_shift_v4i16: 1538; SSE: # %bb.0: 1539; SSE-NEXT: pslld $3, %xmm0 1540; SSE-NEXT: retq 1541; 1542; AVX-LABEL: splatconstant_shift_v4i16: 1543; AVX: # %bb.0: 1544; AVX-NEXT: vpslld $3, %xmm0, %xmm0 1545; AVX-NEXT: retq 1546; 1547; XOP-LABEL: splatconstant_shift_v4i16: 1548; XOP: # %bb.0: 1549; XOP-NEXT: vpslld $3, %xmm0, %xmm0 1550; XOP-NEXT: retq 1551; 1552; AVX512-LABEL: splatconstant_shift_v4i16: 1553; AVX512: # %bb.0: 1554; AVX512-NEXT: vpslld $3, %xmm0, %xmm0 1555; AVX512-NEXT: retq 1556; 1557; AVX512VL-LABEL: splatconstant_shift_v4i16: 1558; AVX512VL: # %bb.0: 1559; AVX512VL-NEXT: vpslld $3, %xmm0, %xmm0 1560; AVX512VL-NEXT: retq 1561; 1562; X32-SSE-LABEL: splatconstant_shift_v4i16: 1563; X32-SSE: # %bb.0: 1564; X32-SSE-NEXT: pslld $3, %xmm0 1565; X32-SSE-NEXT: retl 1566 %shift = shl <4 x i16> %a, <i16 3, i16 3, i16 3, i16 3> 1567 ret <4 x i16> %shift 1568} 1569 1570define <2 x i16> @splatconstant_shift_v2i16(<2 x i16> %a) nounwind { 1571; SSE-LABEL: splatconstant_shift_v2i16: 1572; SSE: # %bb.0: 1573; SSE-NEXT: psllq $3, %xmm0 1574; SSE-NEXT: retq 1575; 1576; AVX-LABEL: splatconstant_shift_v2i16: 1577; AVX: # %bb.0: 1578; AVX-NEXT: vpsllq $3, %xmm0, %xmm0 1579; AVX-NEXT: retq 1580; 1581; XOP-LABEL: splatconstant_shift_v2i16: 1582; XOP: # %bb.0: 1583; XOP-NEXT: vpsllq $3, %xmm0, %xmm0 1584; XOP-NEXT: retq 1585; 1586; AVX512-LABEL: splatconstant_shift_v2i16: 1587; AVX512: # %bb.0: 1588; AVX512-NEXT: vpsllq $3, %xmm0, %xmm0 1589; AVX512-NEXT: retq 1590; 1591; AVX512VL-LABEL: splatconstant_shift_v2i16: 1592; AVX512VL: # %bb.0: 1593; AVX512VL-NEXT: vpsllq $3, %xmm0, %xmm0 1594; AVX512VL-NEXT: retq 1595; 1596; X32-SSE-LABEL: splatconstant_shift_v2i16: 1597; X32-SSE: # %bb.0: 1598; X32-SSE-NEXT: psllq $3, %xmm0 1599; X32-SSE-NEXT: retl 1600 %shift = shl <2 x i16> %a, <i16 3, i16 3> 1601 ret <2 x i16> %shift 1602} 1603 1604define <8 x i8> @splatconstant_shift_v8i8(<8 x i8> %a) nounwind { 1605; SSE-LABEL: splatconstant_shift_v8i8: 1606; SSE: # %bb.0: 1607; SSE-NEXT: psllw $3, %xmm0 1608; SSE-NEXT: retq 1609; 1610; AVX-LABEL: splatconstant_shift_v8i8: 1611; AVX: # %bb.0: 1612; AVX-NEXT: vpsllw $3, %xmm0, %xmm0 1613; AVX-NEXT: retq 1614; 1615; XOP-LABEL: splatconstant_shift_v8i8: 1616; XOP: # %bb.0: 1617; XOP-NEXT: vpsllw $3, %xmm0, %xmm0 1618; XOP-NEXT: retq 1619; 1620; AVX512-LABEL: splatconstant_shift_v8i8: 1621; AVX512: # %bb.0: 1622; AVX512-NEXT: vpsllw $3, %xmm0, %xmm0 1623; AVX512-NEXT: retq 1624; 1625; AVX512VL-LABEL: splatconstant_shift_v8i8: 1626; AVX512VL: # %bb.0: 1627; AVX512VL-NEXT: vpsllw $3, %xmm0, %xmm0 1628; AVX512VL-NEXT: retq 1629; 1630; X32-SSE-LABEL: splatconstant_shift_v8i8: 1631; X32-SSE: # %bb.0: 1632; X32-SSE-NEXT: psllw $3, %xmm0 1633; X32-SSE-NEXT: retl 1634 %shift = shl <8 x i8> %a, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> 1635 ret <8 x i8> %shift 1636} 1637 1638define <4 x i8> @splatconstant_shift_v4i8(<4 x i8> %a) nounwind { 1639; SSE-LABEL: splatconstant_shift_v4i8: 1640; SSE: # %bb.0: 1641; SSE-NEXT: pslld $3, %xmm0 1642; SSE-NEXT: retq 1643; 1644; AVX-LABEL: splatconstant_shift_v4i8: 1645; AVX: # %bb.0: 1646; AVX-NEXT: vpslld $3, %xmm0, %xmm0 1647; AVX-NEXT: retq 1648; 1649; XOP-LABEL: splatconstant_shift_v4i8: 1650; XOP: # %bb.0: 1651; XOP-NEXT: vpslld $3, %xmm0, %xmm0 1652; XOP-NEXT: retq 1653; 1654; AVX512-LABEL: splatconstant_shift_v4i8: 1655; AVX512: # %bb.0: 1656; AVX512-NEXT: vpslld $3, %xmm0, %xmm0 1657; AVX512-NEXT: retq 1658; 1659; AVX512VL-LABEL: splatconstant_shift_v4i8: 1660; AVX512VL: # %bb.0: 1661; AVX512VL-NEXT: vpslld $3, %xmm0, %xmm0 1662; AVX512VL-NEXT: retq 1663; 1664; X32-SSE-LABEL: splatconstant_shift_v4i8: 1665; X32-SSE: # %bb.0: 1666; X32-SSE-NEXT: pslld $3, %xmm0 1667; X32-SSE-NEXT: retl 1668 %shift = shl <4 x i8> %a, <i8 3, i8 3, i8 3, i8 3> 1669 ret <4 x i8> %shift 1670} 1671 1672define <2 x i8> @splatconstant_shift_v2i8(<2 x i8> %a) nounwind { 1673; SSE-LABEL: splatconstant_shift_v2i8: 1674; SSE: # %bb.0: 1675; SSE-NEXT: psllq $3, %xmm0 1676; SSE-NEXT: retq 1677; 1678; AVX-LABEL: splatconstant_shift_v2i8: 1679; AVX: # %bb.0: 1680; AVX-NEXT: vpsllq $3, %xmm0, %xmm0 1681; AVX-NEXT: retq 1682; 1683; XOP-LABEL: splatconstant_shift_v2i8: 1684; XOP: # %bb.0: 1685; XOP-NEXT: vpsllq $3, %xmm0, %xmm0 1686; XOP-NEXT: retq 1687; 1688; AVX512-LABEL: splatconstant_shift_v2i8: 1689; AVX512: # %bb.0: 1690; AVX512-NEXT: vpsllq $3, %xmm0, %xmm0 1691; AVX512-NEXT: retq 1692; 1693; AVX512VL-LABEL: splatconstant_shift_v2i8: 1694; AVX512VL: # %bb.0: 1695; AVX512VL-NEXT: vpsllq $3, %xmm0, %xmm0 1696; AVX512VL-NEXT: retq 1697; 1698; X32-SSE-LABEL: splatconstant_shift_v2i8: 1699; X32-SSE: # %bb.0: 1700; X32-SSE-NEXT: psllq $3, %xmm0 1701; X32-SSE-NEXT: retl 1702 %shift = shl <2 x i8> %a, <i8 3, i8 3> 1703 ret <2 x i8> %shift 1704} 1705