1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2 6; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW 7; 8; Variable Shifts 9; 10 11define <4 x i64> @var_shift_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind { 12; AVX1-LABEL: var_shift_v4i64: 13; AVX1: # BB#0: 14; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 15; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 16; AVX1-NEXT: vpsrlq %xmm2, %xmm3, %xmm4 17; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] 18; AVX1-NEXT: vpsrlq %xmm2, %xmm3, %xmm2 19; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm4[0,1,2,3],xmm2[4,5,6,7] 20; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm3 21; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 22; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 23; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm0[4,5,6,7] 24; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 25; AVX1-NEXT: retq 26; 27; AVX2-LABEL: var_shift_v4i64: 28; AVX2: # BB#0: 29; AVX2-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 30; AVX2-NEXT: retq 31; 32; XOPAVX1-LABEL: var_shift_v4i64: 33; XOPAVX1: # BB#0: 34; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 35; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 36; XOPAVX1-NEXT: vpsubq %xmm2, %xmm3, %xmm2 37; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 38; XOPAVX1-NEXT: vpshlq %xmm2, %xmm4, %xmm2 39; XOPAVX1-NEXT: vpsubq %xmm1, %xmm3, %xmm1 40; XOPAVX1-NEXT: vpshlq %xmm1, %xmm0, %xmm0 41; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 42; XOPAVX1-NEXT: retq 43; 44; XOPAVX2-LABEL: var_shift_v4i64: 45; XOPAVX2: # BB#0: 46; XOPAVX2-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 47; XOPAVX2-NEXT: retq 48; 49; AVX512-LABEL: var_shift_v4i64: 50; AVX512: ## BB#0: 51; AVX512-NEXT: vpsrlvq %ymm1, %ymm0, %ymm0 52; AVX512-NEXT: retq 53 %shift = lshr <4 x i64> %a, %b 54 ret <4 x i64> %shift 55} 56 57define <8 x i32> @var_shift_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind { 58; AVX1-LABEL: var_shift_v8i32: 59; AVX1: # BB#0: 60; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 61; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 62; AVX1-NEXT: vpsrldq {{.*#+}} xmm4 = xmm3[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero 63; AVX1-NEXT: vpsrld %xmm4, %xmm2, %xmm4 64; AVX1-NEXT: vpsrlq $32, %xmm3, %xmm5 65; AVX1-NEXT: vpsrld %xmm5, %xmm2, %xmm5 66; AVX1-NEXT: vpblendw {{.*#+}} xmm4 = xmm5[0,1,2,3],xmm4[4,5,6,7] 67; AVX1-NEXT: vpxor %xmm5, %xmm5, %xmm5 68; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm6 = xmm3[2],xmm5[2],xmm3[3],xmm5[3] 69; AVX1-NEXT: vpsrld %xmm6, %xmm2, %xmm6 70; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm3 = xmm3[0],zero,xmm3[1],zero 71; AVX1-NEXT: vpsrld %xmm3, %xmm2, %xmm2 72; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm6[4,5,6,7] 73; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0,1],xmm4[2,3],xmm2[4,5],xmm4[6,7] 74; AVX1-NEXT: vpsrldq {{.*#+}} xmm3 = xmm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero 75; AVX1-NEXT: vpsrld %xmm3, %xmm0, %xmm3 76; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm4 77; AVX1-NEXT: vpsrld %xmm4, %xmm0, %xmm4 78; AVX1-NEXT: vpblendw {{.*#+}} xmm3 = xmm4[0,1,2,3],xmm3[4,5,6,7] 79; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm4 = xmm1[2],xmm5[2],xmm1[3],xmm5[3] 80; AVX1-NEXT: vpsrld %xmm4, %xmm0, %xmm4 81; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero 82; AVX1-NEXT: vpsrld %xmm1, %xmm0, %xmm0 83; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm4[4,5,6,7] 84; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm3[2,3],xmm0[4,5],xmm3[6,7] 85; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 86; AVX1-NEXT: retq 87; 88; AVX2-LABEL: var_shift_v8i32: 89; AVX2: # BB#0: 90; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 91; AVX2-NEXT: retq 92; 93; XOPAVX1-LABEL: var_shift_v8i32: 94; XOPAVX1: # BB#0: 95; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 96; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 97; XOPAVX1-NEXT: vpsubd %xmm2, %xmm3, %xmm2 98; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 99; XOPAVX1-NEXT: vpshld %xmm2, %xmm4, %xmm2 100; XOPAVX1-NEXT: vpsubd %xmm1, %xmm3, %xmm1 101; XOPAVX1-NEXT: vpshld %xmm1, %xmm0, %xmm0 102; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 103; XOPAVX1-NEXT: retq 104; 105; XOPAVX2-LABEL: var_shift_v8i32: 106; XOPAVX2: # BB#0: 107; XOPAVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 108; XOPAVX2-NEXT: retq 109; 110; AVX512-LABEL: var_shift_v8i32: 111; AVX512: ## BB#0: 112; AVX512-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 113; AVX512-NEXT: retq 114 %shift = lshr <8 x i32> %a, %b 115 ret <8 x i32> %shift 116} 117 118define <16 x i16> @var_shift_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind { 119; AVX1-LABEL: var_shift_v16i16: 120; AVX1: # BB#0: 121; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 122; AVX1-NEXT: vpsllw $12, %xmm2, %xmm3 123; AVX1-NEXT: vpsllw $4, %xmm2, %xmm2 124; AVX1-NEXT: vpor %xmm3, %xmm2, %xmm2 125; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm3 126; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 127; AVX1-NEXT: vpsrlw $8, %xmm4, %xmm5 128; AVX1-NEXT: vpblendvb %xmm2, %xmm5, %xmm4, %xmm2 129; AVX1-NEXT: vpsrlw $4, %xmm2, %xmm4 130; AVX1-NEXT: vpblendvb %xmm3, %xmm4, %xmm2, %xmm2 131; AVX1-NEXT: vpsrlw $2, %xmm2, %xmm4 132; AVX1-NEXT: vpaddw %xmm3, %xmm3, %xmm3 133; AVX1-NEXT: vpblendvb %xmm3, %xmm4, %xmm2, %xmm2 134; AVX1-NEXT: vpsrlw $1, %xmm2, %xmm4 135; AVX1-NEXT: vpaddw %xmm3, %xmm3, %xmm3 136; AVX1-NEXT: vpblendvb %xmm3, %xmm4, %xmm2, %xmm2 137; AVX1-NEXT: vpsllw $12, %xmm1, %xmm3 138; AVX1-NEXT: vpsllw $4, %xmm1, %xmm1 139; AVX1-NEXT: vpor %xmm3, %xmm1, %xmm1 140; AVX1-NEXT: vpaddw %xmm1, %xmm1, %xmm3 141; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm4 142; AVX1-NEXT: vpblendvb %xmm1, %xmm4, %xmm0, %xmm0 143; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm1 144; AVX1-NEXT: vpblendvb %xmm3, %xmm1, %xmm0, %xmm0 145; AVX1-NEXT: vpsrlw $2, %xmm0, %xmm1 146; AVX1-NEXT: vpaddw %xmm3, %xmm3, %xmm3 147; AVX1-NEXT: vpblendvb %xmm3, %xmm1, %xmm0, %xmm0 148; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm1 149; AVX1-NEXT: vpaddw %xmm3, %xmm3, %xmm3 150; AVX1-NEXT: vpblendvb %xmm3, %xmm1, %xmm0, %xmm0 151; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 152; AVX1-NEXT: retq 153; 154; AVX2-LABEL: var_shift_v16i16: 155; AVX2: # BB#0: 156; AVX2-NEXT: vpxor %ymm2, %ymm2, %ymm2 157; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm1[4],ymm2[4],ymm1[5],ymm2[5],ymm1[6],ymm2[6],ymm1[7],ymm2[7],ymm1[12],ymm2[12],ymm1[13],ymm2[13],ymm1[14],ymm2[14],ymm1[15],ymm2[15] 158; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm0[4,4,5,5,6,6,7,7,12,12,13,13,14,14,15,15] 159; AVX2-NEXT: vpsrlvd %ymm3, %ymm4, %ymm3 160; AVX2-NEXT: vpsrld $16, %ymm3, %ymm3 161; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm1[0],ymm2[0],ymm1[1],ymm2[1],ymm1[2],ymm2[2],ymm1[3],ymm2[3],ymm1[8],ymm2[8],ymm1[9],ymm2[9],ymm1[10],ymm2[10],ymm1[11],ymm2[11] 162; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,8,8,9,9,10,10,11,11] 163; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 164; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 165; AVX2-NEXT: vpackusdw %ymm3, %ymm0, %ymm0 166; AVX2-NEXT: retq 167; 168; XOPAVX1-LABEL: var_shift_v16i16: 169; XOPAVX1: # BB#0: 170; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 171; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 172; XOPAVX1-NEXT: vpsubw %xmm2, %xmm3, %xmm2 173; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 174; XOPAVX1-NEXT: vpshlw %xmm2, %xmm4, %xmm2 175; XOPAVX1-NEXT: vpsubw %xmm1, %xmm3, %xmm1 176; XOPAVX1-NEXT: vpshlw %xmm1, %xmm0, %xmm0 177; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 178; XOPAVX1-NEXT: retq 179; 180; XOPAVX2-LABEL: var_shift_v16i16: 181; XOPAVX2: # BB#0: 182; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 183; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 184; XOPAVX2-NEXT: vpsubw %xmm2, %xmm3, %xmm2 185; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm4 186; XOPAVX2-NEXT: vpshlw %xmm2, %xmm4, %xmm2 187; XOPAVX2-NEXT: vpsubw %xmm1, %xmm3, %xmm1 188; XOPAVX2-NEXT: vpshlw %xmm1, %xmm0, %xmm0 189; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 190; XOPAVX2-NEXT: retq 191; 192; AVX512-LABEL: var_shift_v16i16: 193; AVX512: ## BB#0: 194; AVX512-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 195; AVX512-NEXT: retq 196 %shift = lshr <16 x i16> %a, %b 197 ret <16 x i16> %shift 198} 199 200define <32 x i8> @var_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind { 201; AVX1-LABEL: var_shift_v32i8: 202; AVX1: # BB#0: 203; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 204; AVX1-NEXT: vpsrlw $4, %xmm2, %xmm3 205; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] 206; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 207; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5 208; AVX1-NEXT: vpsllw $5, %xmm5, %xmm5 209; AVX1-NEXT: vpblendvb %xmm5, %xmm3, %xmm2, %xmm2 210; AVX1-NEXT: vpsrlw $2, %xmm2, %xmm3 211; AVX1-NEXT: vmovdqa {{.*#+}} xmm6 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63] 212; AVX1-NEXT: vpand %xmm6, %xmm3, %xmm3 213; AVX1-NEXT: vpaddb %xmm5, %xmm5, %xmm5 214; AVX1-NEXT: vpblendvb %xmm5, %xmm3, %xmm2, %xmm2 215; AVX1-NEXT: vpsrlw $1, %xmm2, %xmm3 216; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127] 217; AVX1-NEXT: vpand %xmm7, %xmm3, %xmm3 218; AVX1-NEXT: vpaddb %xmm5, %xmm5, %xmm5 219; AVX1-NEXT: vpblendvb %xmm5, %xmm3, %xmm2, %xmm2 220; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm3 221; AVX1-NEXT: vpand %xmm4, %xmm3, %xmm3 222; AVX1-NEXT: vpsllw $5, %xmm1, %xmm1 223; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 224; AVX1-NEXT: vpsrlw $2, %xmm0, %xmm3 225; AVX1-NEXT: vpand %xmm6, %xmm3, %xmm3 226; AVX1-NEXT: vpaddb %xmm1, %xmm1, %xmm1 227; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 228; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm3 229; AVX1-NEXT: vpand %xmm7, %xmm3, %xmm3 230; AVX1-NEXT: vpaddb %xmm1, %xmm1, %xmm1 231; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 232; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 233; AVX1-NEXT: retq 234; 235; AVX2-LABEL: var_shift_v32i8: 236; AVX2: # BB#0: 237; AVX2-NEXT: vpsllw $5, %ymm1, %ymm1 238; AVX2-NEXT: vpsrlw $4, %ymm0, %ymm2 239; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 240; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 241; AVX2-NEXT: vpsrlw $2, %ymm0, %ymm2 242; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 243; AVX2-NEXT: vpaddb %ymm1, %ymm1, %ymm1 244; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 245; AVX2-NEXT: vpsrlw $1, %ymm0, %ymm2 246; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 247; AVX2-NEXT: vpaddb %ymm1, %ymm1, %ymm1 248; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 249; AVX2-NEXT: retq 250; 251; XOPAVX1-LABEL: var_shift_v32i8: 252; XOPAVX1: # BB#0: 253; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 254; XOPAVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 255; XOPAVX1-NEXT: vpsubb %xmm2, %xmm3, %xmm2 256; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 257; XOPAVX1-NEXT: vpshlb %xmm2, %xmm4, %xmm2 258; XOPAVX1-NEXT: vpsubb %xmm1, %xmm3, %xmm1 259; XOPAVX1-NEXT: vpshlb %xmm1, %xmm0, %xmm0 260; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 261; XOPAVX1-NEXT: retq 262; 263; XOPAVX2-LABEL: var_shift_v32i8: 264; XOPAVX2: # BB#0: 265; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 266; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 267; XOPAVX2-NEXT: vpsubb %xmm2, %xmm3, %xmm2 268; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm4 269; XOPAVX2-NEXT: vpshlb %xmm2, %xmm4, %xmm2 270; XOPAVX2-NEXT: vpsubb %xmm1, %xmm3, %xmm1 271; XOPAVX2-NEXT: vpshlb %xmm1, %xmm0, %xmm0 272; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 273; XOPAVX2-NEXT: retq 274; 275; AVX512-LABEL: var_shift_v32i8: 276; AVX512: ## BB#0: 277; AVX512-NEXT: vpsllw $5, %ymm1, %ymm1 278; AVX512-NEXT: vpsrlw $4, %ymm0, %ymm2 279; AVX512-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 280; AVX512-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 281; AVX512-NEXT: vpsrlw $2, %ymm0, %ymm2 282; AVX512-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 283; AVX512-NEXT: vpaddb %ymm1, %ymm1, %ymm1 284; AVX512-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 285; AVX512-NEXT: vpsrlw $1, %ymm0, %ymm2 286; AVX512-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 287; AVX512-NEXT: vpaddb %ymm1, %ymm1, %ymm1 288; AVX512-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 289; AVX512-NEXT: retq 290 %shift = lshr <32 x i8> %a, %b 291 ret <32 x i8> %shift 292} 293 294; 295; Uniform Variable Shifts 296; 297 298define <4 x i64> @splatvar_shift_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind { 299; AVX1-LABEL: splatvar_shift_v4i64: 300; AVX1: # BB#0: 301; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 302; AVX1-NEXT: vpsrlq %xmm1, %xmm2, %xmm2 303; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 304; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 305; AVX1-NEXT: retq 306; 307; AVX2-LABEL: splatvar_shift_v4i64: 308; AVX2: # BB#0: 309; AVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 310; AVX2-NEXT: retq 311; 312; XOPAVX1-LABEL: splatvar_shift_v4i64: 313; XOPAVX1: # BB#0: 314; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 315; XOPAVX1-NEXT: vpsrlq %xmm1, %xmm2, %xmm2 316; XOPAVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 317; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 318; XOPAVX1-NEXT: retq 319; 320; XOPAVX2-LABEL: splatvar_shift_v4i64: 321; XOPAVX2: # BB#0: 322; XOPAVX2-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 323; XOPAVX2-NEXT: retq 324; 325; AVX512-LABEL: splatvar_shift_v4i64: 326; AVX512: ## BB#0: 327; AVX512-NEXT: vpsrlq %xmm1, %ymm0, %ymm0 328; AVX512-NEXT: retq 329 %splat = shufflevector <4 x i64> %b, <4 x i64> undef, <4 x i32> zeroinitializer 330 %shift = lshr <4 x i64> %a, %splat 331 ret <4 x i64> %shift 332} 333 334define <8 x i32> @splatvar_shift_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind { 335; AVX1-LABEL: splatvar_shift_v8i32: 336; AVX1: # BB#0: 337; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 338; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7] 339; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 340; AVX1-NEXT: vpsrld %xmm1, %xmm2, %xmm2 341; AVX1-NEXT: vpsrld %xmm1, %xmm0, %xmm0 342; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 343; AVX1-NEXT: retq 344; 345; AVX2-LABEL: splatvar_shift_v8i32: 346; AVX2: # BB#0: 347; AVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 348; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7] 349; AVX2-NEXT: vpsrld %xmm1, %ymm0, %ymm0 350; AVX2-NEXT: retq 351; 352; XOPAVX1-LABEL: splatvar_shift_v8i32: 353; XOPAVX1: # BB#0: 354; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 355; XOPAVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7] 356; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 357; XOPAVX1-NEXT: vpsrld %xmm1, %xmm2, %xmm2 358; XOPAVX1-NEXT: vpsrld %xmm1, %xmm0, %xmm0 359; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 360; XOPAVX1-NEXT: retq 361; 362; XOPAVX2-LABEL: splatvar_shift_v8i32: 363; XOPAVX2: # BB#0: 364; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 365; XOPAVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7] 366; XOPAVX2-NEXT: vpsrld %xmm1, %ymm0, %ymm0 367; XOPAVX2-NEXT: retq 368; 369; AVX512-LABEL: splatvar_shift_v8i32: 370; AVX512: ## BB#0: 371; AVX512-NEXT: vxorps %xmm2, %xmm2, %xmm2 372; AVX512-NEXT: vmovss {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3] 373; AVX512-NEXT: vpsrld %xmm1, %ymm0, %ymm0 374; AVX512-NEXT: retq 375 %splat = shufflevector <8 x i32> %b, <8 x i32> undef, <8 x i32> zeroinitializer 376 %shift = lshr <8 x i32> %a, %splat 377 ret <8 x i32> %shift 378} 379 380define <16 x i16> @splatvar_shift_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind { 381; AVX1-LABEL: splatvar_shift_v16i16: 382; AVX1: # BB#0: 383; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 384; AVX1-NEXT: vmovd %xmm1, %eax 385; AVX1-NEXT: movzwl %ax, %eax 386; AVX1-NEXT: vmovd %eax, %xmm1 387; AVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm2 388; AVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 389; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 390; AVX1-NEXT: retq 391; 392; AVX2-LABEL: splatvar_shift_v16i16: 393; AVX2: # BB#0: 394; AVX2-NEXT: vmovd %xmm1, %eax 395; AVX2-NEXT: movzwl %ax, %eax 396; AVX2-NEXT: vmovd %eax, %xmm1 397; AVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 398; AVX2-NEXT: retq 399; 400; XOPAVX1-LABEL: splatvar_shift_v16i16: 401; XOPAVX1: # BB#0: 402; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 403; XOPAVX1-NEXT: vmovd %xmm1, %eax 404; XOPAVX1-NEXT: movzwl %ax, %eax 405; XOPAVX1-NEXT: vmovd %eax, %xmm1 406; XOPAVX1-NEXT: vpsrlw %xmm1, %xmm2, %xmm2 407; XOPAVX1-NEXT: vpsrlw %xmm1, %xmm0, %xmm0 408; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 409; XOPAVX1-NEXT: retq 410; 411; XOPAVX2-LABEL: splatvar_shift_v16i16: 412; XOPAVX2: # BB#0: 413; XOPAVX2-NEXT: vmovd %xmm1, %eax 414; XOPAVX2-NEXT: movzwl %ax, %eax 415; XOPAVX2-NEXT: vmovd %eax, %xmm1 416; XOPAVX2-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 417; XOPAVX2-NEXT: retq 418; 419; AVX512-LABEL: splatvar_shift_v16i16: 420; AVX512: ## BB#0: 421; AVX512-NEXT: vmovd %xmm1, %eax 422; AVX512-NEXT: movzwl %ax, %eax 423; AVX512-NEXT: vmovd %eax, %xmm1 424; AVX512-NEXT: vpsrlw %xmm1, %ymm0, %ymm0 425; AVX512-NEXT: retq 426 %splat = shufflevector <16 x i16> %b, <16 x i16> undef, <16 x i32> zeroinitializer 427 %shift = lshr <16 x i16> %a, %splat 428 ret <16 x i16> %shift 429} 430 431define <32 x i8> @splatvar_shift_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind { 432; AVX1-LABEL: splatvar_shift_v32i8: 433; AVX1: # BB#0: 434; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 435; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 436; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 437; AVX1-NEXT: vpsrlw $4, %xmm2, %xmm3 438; AVX1-NEXT: vmovdqa {{.*#+}} xmm8 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] 439; AVX1-NEXT: vpand %xmm8, %xmm3, %xmm3 440; AVX1-NEXT: vpsllw $5, %xmm1, %xmm1 441; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm2, %xmm2 442; AVX1-NEXT: vpsrlw $2, %xmm2, %xmm3 443; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63] 444; AVX1-NEXT: vpand %xmm5, %xmm3, %xmm3 445; AVX1-NEXT: vpaddb %xmm1, %xmm1, %xmm6 446; AVX1-NEXT: vpblendvb %xmm6, %xmm3, %xmm2, %xmm2 447; AVX1-NEXT: vpsrlw $1, %xmm2, %xmm3 448; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127] 449; AVX1-NEXT: vpand %xmm7, %xmm3, %xmm3 450; AVX1-NEXT: vpaddb %xmm6, %xmm6, %xmm4 451; AVX1-NEXT: vpblendvb %xmm4, %xmm3, %xmm2, %xmm2 452; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm3 453; AVX1-NEXT: vpand %xmm8, %xmm3, %xmm3 454; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 455; AVX1-NEXT: vpsrlw $2, %xmm0, %xmm1 456; AVX1-NEXT: vpand %xmm5, %xmm1, %xmm1 457; AVX1-NEXT: vpblendvb %xmm6, %xmm1, %xmm0, %xmm0 458; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm1 459; AVX1-NEXT: vpand %xmm7, %xmm1, %xmm1 460; AVX1-NEXT: vpblendvb %xmm4, %xmm1, %xmm0, %xmm0 461; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 462; AVX1-NEXT: retq 463; 464; AVX2-LABEL: splatvar_shift_v32i8: 465; AVX2: # BB#0: 466; AVX2-NEXT: vpbroadcastb %xmm1, %ymm1 467; AVX2-NEXT: vpsrlw $4, %ymm0, %ymm2 468; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 469; AVX2-NEXT: vpsllw $5, %ymm1, %ymm1 470; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 471; AVX2-NEXT: vpsrlw $2, %ymm0, %ymm2 472; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 473; AVX2-NEXT: vpaddb %ymm1, %ymm1, %ymm1 474; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 475; AVX2-NEXT: vpsrlw $1, %ymm0, %ymm2 476; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 477; AVX2-NEXT: vpaddb %ymm1, %ymm1, %ymm1 478; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 479; AVX2-NEXT: retq 480; 481; XOPAVX1-LABEL: splatvar_shift_v32i8: 482; XOPAVX1: # BB#0: 483; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 484; XOPAVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 485; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1 486; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 487; XOPAVX1-NEXT: vpshlb %xmm1, %xmm2, %xmm2 488; XOPAVX1-NEXT: vpshlb %xmm1, %xmm0, %xmm0 489; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 490; XOPAVX1-NEXT: retq 491; 492; XOPAVX2-LABEL: splatvar_shift_v32i8: 493; XOPAVX2: # BB#0: 494; XOPAVX2-NEXT: vpbroadcastb %xmm1, %ymm1 495; XOPAVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 496; XOPAVX2-NEXT: vpxor %xmm3, %xmm3, %xmm3 497; XOPAVX2-NEXT: vpsubb %xmm2, %xmm3, %xmm2 498; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm4 499; XOPAVX2-NEXT: vpshlb %xmm2, %xmm4, %xmm2 500; XOPAVX2-NEXT: vpsubb %xmm1, %xmm3, %xmm1 501; XOPAVX2-NEXT: vpshlb %xmm1, %xmm0, %xmm0 502; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 503; XOPAVX2-NEXT: retq 504; 505; AVX512-LABEL: splatvar_shift_v32i8: 506; AVX512: ## BB#0: 507; AVX512-NEXT: vpbroadcastb %xmm1, %ymm1 508; AVX512-NEXT: vpsrlw $4, %ymm0, %ymm2 509; AVX512-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 510; AVX512-NEXT: vpsllw $5, %ymm1, %ymm1 511; AVX512-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 512; AVX512-NEXT: vpsrlw $2, %ymm0, %ymm2 513; AVX512-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 514; AVX512-NEXT: vpaddb %ymm1, %ymm1, %ymm1 515; AVX512-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 516; AVX512-NEXT: vpsrlw $1, %ymm0, %ymm2 517; AVX512-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 518; AVX512-NEXT: vpaddb %ymm1, %ymm1, %ymm1 519; AVX512-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 520; AVX512-NEXT: retq 521 %splat = shufflevector <32 x i8> %b, <32 x i8> undef, <32 x i32> zeroinitializer 522 %shift = lshr <32 x i8> %a, %splat 523 ret <32 x i8> %shift 524} 525 526; 527; Constant Shifts 528; 529 530define <4 x i64> @constant_shift_v4i64(<4 x i64> %a) nounwind { 531; AVX1-LABEL: constant_shift_v4i64: 532; AVX1: # BB#0: 533; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 534; AVX1-NEXT: vpsrlq $62, %xmm1, %xmm2 535; AVX1-NEXT: vpsrlq $31, %xmm1, %xmm1 536; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm1[0,1,2,3],xmm2[4,5,6,7] 537; AVX1-NEXT: vpsrlq $7, %xmm0, %xmm2 538; AVX1-NEXT: vpsrlq $1, %xmm0, %xmm0 539; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7] 540; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 541; AVX1-NEXT: retq 542; 543; AVX2-LABEL: constant_shift_v4i64: 544; AVX2: # BB#0: 545; AVX2-NEXT: vpsrlvq {{.*}}(%rip), %ymm0, %ymm0 546; AVX2-NEXT: retq 547; 548; XOPAVX1-LABEL: constant_shift_v4i64: 549; XOPAVX1: # BB#0: 550; XOPAVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 551; XOPAVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm2 552; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 553; XOPAVX1-NEXT: vpshlq %xmm2, %xmm3, %xmm2 554; XOPAVX1-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm1 555; XOPAVX1-NEXT: vpshlq %xmm1, %xmm0, %xmm0 556; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 557; XOPAVX1-NEXT: retq 558; 559; XOPAVX2-LABEL: constant_shift_v4i64: 560; XOPAVX2: # BB#0: 561; XOPAVX2-NEXT: vpsrlvq {{.*}}(%rip), %ymm0, %ymm0 562; XOPAVX2-NEXT: retq 563; 564; AVX512-LABEL: constant_shift_v4i64: 565; AVX512: ## BB#0: 566; AVX512-NEXT: vpsrlvq {{.*}}(%rip), %ymm0, %ymm0 567; AVX512-NEXT: retq 568 %shift = lshr <4 x i64> %a, <i64 1, i64 7, i64 31, i64 62> 569 ret <4 x i64> %shift 570} 571 572define <8 x i32> @constant_shift_v8i32(<8 x i32> %a) nounwind { 573; AVX1-LABEL: constant_shift_v8i32: 574; AVX1: # BB#0: 575; AVX1-NEXT: vpsrld $7, %xmm0, %xmm1 576; AVX1-NEXT: vpsrld $5, %xmm0, %xmm2 577; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7] 578; AVX1-NEXT: vpsrld $6, %xmm0, %xmm2 579; AVX1-NEXT: vpsrld $4, %xmm0, %xmm3 580; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7] 581; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1],xmm1[2,3],xmm2[4,5],xmm1[6,7] 582; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 583; AVX1-NEXT: vpsrld $7, %xmm0, %xmm2 584; AVX1-NEXT: vpsrld $9, %xmm0, %xmm3 585; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7] 586; AVX1-NEXT: vpsrld $8, %xmm0, %xmm0 587; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7] 588; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 589; AVX1-NEXT: retq 590; 591; AVX2-LABEL: constant_shift_v8i32: 592; AVX2: # BB#0: 593; AVX2-NEXT: vpsrlvd {{.*}}(%rip), %ymm0, %ymm0 594; AVX2-NEXT: retq 595; 596; XOPAVX1-LABEL: constant_shift_v8i32: 597; XOPAVX1: # BB#0: 598; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm1 599; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 600; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm0 601; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 602; XOPAVX1-NEXT: retq 603; 604; XOPAVX2-LABEL: constant_shift_v8i32: 605; XOPAVX2: # BB#0: 606; XOPAVX2-NEXT: vpsrlvd {{.*}}(%rip), %ymm0, %ymm0 607; XOPAVX2-NEXT: retq 608; 609; AVX512-LABEL: constant_shift_v8i32: 610; AVX512: ## BB#0: 611; AVX512-NEXT: vpsrlvd {{.*}}(%rip), %ymm0, %ymm0 612; AVX512-NEXT: retq 613 %shift = lshr <8 x i32> %a, <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 8, i32 7> 614 ret <8 x i32> %shift 615} 616 617define <16 x i16> @constant_shift_v16i16(<16 x i16> %a) nounwind { 618; AVX1-LABEL: constant_shift_v16i16: 619; AVX1: # BB#0: 620; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 621; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm2 622; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [32896,37008,41120,45232,49344,53456,57568,61680] 623; AVX1-NEXT: vpblendvb %xmm3, %xmm2, %xmm1, %xmm1 624; AVX1-NEXT: vpsrlw $4, %xmm1, %xmm2 625; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [256,8480,16704,24928,33152,41376,49600,57824] 626; AVX1-NEXT: vpblendvb %xmm3, %xmm2, %xmm1, %xmm1 627; AVX1-NEXT: vpsrlw $2, %xmm1, %xmm2 628; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [512,16960,33408,49856,768,17216,33664,50112] 629; AVX1-NEXT: vpblendvb %xmm3, %xmm2, %xmm1, %xmm1 630; AVX1-NEXT: vpsrlw $1, %xmm1, %xmm2 631; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [1024,33920,1280,34176,1536,34432,1792,34688] 632; AVX1-NEXT: vpblendvb %xmm3, %xmm2, %xmm1, %xmm1 633; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm2 634; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [0,4112,8224,12336,16448,20560,24672,28784] 635; AVX1-NEXT: vpblendvb %xmm3, %xmm2, %xmm0, %xmm0 636; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm2 637; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [0,8224,16448,24672,32896,41120,49344,57568] 638; AVX1-NEXT: vpblendvb %xmm3, %xmm2, %xmm0, %xmm0 639; AVX1-NEXT: vpsrlw $2, %xmm0, %xmm2 640; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [0,16448,32896,49344,256,16704,33152,49600] 641; AVX1-NEXT: vpblendvb %xmm3, %xmm2, %xmm0, %xmm0 642; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm2 643; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [0,32896,256,33152,512,33408,768,33664] 644; AVX1-NEXT: vpblendvb %xmm3, %xmm2, %xmm0, %xmm0 645; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 646; AVX1-NEXT: retq 647; 648; AVX2-LABEL: constant_shift_v16i16: 649; AVX2: # BB#0: 650; AVX2-NEXT: vpxor %ymm1, %ymm1, %ymm1 651; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15] 652; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm3 = ymm2[4],ymm1[4],ymm2[5],ymm1[5],ymm2[6],ymm1[6],ymm2[7],ymm1[7],ymm2[12],ymm1[12],ymm2[13],ymm1[13],ymm2[14],ymm1[14],ymm2[15],ymm1[15] 653; AVX2-NEXT: vpunpckhwd {{.*#+}} ymm4 = ymm0[4,4,5,5,6,6,7,7,12,12,13,13,14,14,15,15] 654; AVX2-NEXT: vpsrlvd %ymm3, %ymm4, %ymm3 655; AVX2-NEXT: vpsrld $16, %ymm3, %ymm3 656; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm1 = ymm2[0],ymm1[0],ymm2[1],ymm1[1],ymm2[2],ymm1[2],ymm2[3],ymm1[3],ymm2[8],ymm1[8],ymm2[9],ymm1[9],ymm2[10],ymm1[10],ymm2[11],ymm1[11] 657; AVX2-NEXT: vpunpcklwd {{.*#+}} ymm0 = ymm0[0,0,1,1,2,2,3,3,8,8,9,9,10,10,11,11] 658; AVX2-NEXT: vpsrlvd %ymm1, %ymm0, %ymm0 659; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 660; AVX2-NEXT: vpackusdw %ymm3, %ymm0, %ymm0 661; AVX2-NEXT: retq 662; 663; XOPAVX1-LABEL: constant_shift_v16i16: 664; XOPAVX1: # BB#0: 665; XOPAVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 666; XOPAVX1-NEXT: vpsubw {{.*}}(%rip), %xmm1, %xmm2 667; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 668; XOPAVX1-NEXT: vpshlw %xmm2, %xmm3, %xmm2 669; XOPAVX1-NEXT: vpsubw {{.*}}(%rip), %xmm1, %xmm1 670; XOPAVX1-NEXT: vpshlw %xmm1, %xmm0, %xmm0 671; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 672; XOPAVX1-NEXT: retq 673; 674; XOPAVX2-LABEL: constant_shift_v16i16: 675; XOPAVX2: # BB#0: 676; XOPAVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 677; XOPAVX2-NEXT: vpsubw {{.*}}(%rip), %xmm1, %xmm2 678; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm3 679; XOPAVX2-NEXT: vpshlw %xmm2, %xmm3, %xmm2 680; XOPAVX2-NEXT: vpsubw {{.*}}(%rip), %xmm1, %xmm1 681; XOPAVX2-NEXT: vpshlw %xmm1, %xmm0, %xmm0 682; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 683; XOPAVX2-NEXT: retq 684; 685; AVX512-LABEL: constant_shift_v16i16: 686; AVX512: ## BB#0: 687; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15] 688; AVX512-NEXT: vpsrlvw %zmm1, %zmm0, %zmm0 689; AVX512-NEXT: retq 690 %shift = lshr <16 x i16> %a, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15> 691 ret <16 x i16> %shift 692} 693 694define <32 x i8> @constant_shift_v32i8(<32 x i8> %a) nounwind { 695; AVX1-LABEL: constant_shift_v32i8: 696; AVX1: # BB#0: 697; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 698; AVX1-NEXT: vpsrlw $4, %xmm1, %xmm2 699; AVX1-NEXT: vmovdqa {{.*#+}} xmm8 = [15,15,15,15,15,15,15,15,15,15,15,15,15,15,15,15] 700; AVX1-NEXT: vpand %xmm8, %xmm2, %xmm2 701; AVX1-NEXT: vmovdqa {{.*#+}} xmm4 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0] 702; AVX1-NEXT: vpsllw $5, %xmm4, %xmm4 703; AVX1-NEXT: vpblendvb %xmm4, %xmm2, %xmm1, %xmm1 704; AVX1-NEXT: vpsrlw $2, %xmm1, %xmm2 705; AVX1-NEXT: vmovdqa {{.*#+}} xmm5 = [63,63,63,63,63,63,63,63,63,63,63,63,63,63,63,63] 706; AVX1-NEXT: vpand %xmm5, %xmm2, %xmm2 707; AVX1-NEXT: vpaddb %xmm4, %xmm4, %xmm6 708; AVX1-NEXT: vpblendvb %xmm6, %xmm2, %xmm1, %xmm1 709; AVX1-NEXT: vpsrlw $1, %xmm1, %xmm2 710; AVX1-NEXT: vmovdqa {{.*#+}} xmm7 = [127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127] 711; AVX1-NEXT: vpand %xmm7, %xmm2, %xmm2 712; AVX1-NEXT: vpaddb %xmm6, %xmm6, %xmm3 713; AVX1-NEXT: vpblendvb %xmm3, %xmm2, %xmm1, %xmm1 714; AVX1-NEXT: vpsrlw $4, %xmm0, %xmm2 715; AVX1-NEXT: vpand %xmm8, %xmm2, %xmm2 716; AVX1-NEXT: vpblendvb %xmm4, %xmm2, %xmm0, %xmm0 717; AVX1-NEXT: vpsrlw $2, %xmm0, %xmm2 718; AVX1-NEXT: vpand %xmm5, %xmm2, %xmm2 719; AVX1-NEXT: vpblendvb %xmm6, %xmm2, %xmm0, %xmm0 720; AVX1-NEXT: vpsrlw $1, %xmm0, %xmm2 721; AVX1-NEXT: vpand %xmm7, %xmm2, %xmm2 722; AVX1-NEXT: vpblendvb %xmm3, %xmm2, %xmm0, %xmm0 723; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 724; AVX1-NEXT: retq 725; 726; AVX2-LABEL: constant_shift_v32i8: 727; AVX2: # BB#0: 728; AVX2-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0,0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0] 729; AVX2-NEXT: vpsllw $5, %ymm1, %ymm1 730; AVX2-NEXT: vpsrlw $4, %ymm0, %ymm2 731; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 732; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 733; AVX2-NEXT: vpsrlw $2, %ymm0, %ymm2 734; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 735; AVX2-NEXT: vpaddb %ymm1, %ymm1, %ymm1 736; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 737; AVX2-NEXT: vpsrlw $1, %ymm0, %ymm2 738; AVX2-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 739; AVX2-NEXT: vpaddb %ymm1, %ymm1, %ymm1 740; AVX2-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 741; AVX2-NEXT: retq 742; 743; XOPAVX1-LABEL: constant_shift_v32i8: 744; XOPAVX1: # BB#0: 745; XOPAVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 746; XOPAVX1-NEXT: vpsubb {{.*}}(%rip), %xmm1, %xmm1 747; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 748; XOPAVX1-NEXT: vpshlb %xmm1, %xmm2, %xmm2 749; XOPAVX1-NEXT: vpshlb %xmm1, %xmm0, %xmm0 750; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 751; XOPAVX1-NEXT: retq 752; 753; XOPAVX2-LABEL: constant_shift_v32i8: 754; XOPAVX2: # BB#0: 755; XOPAVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 756; XOPAVX2-NEXT: vpsubb {{.*}}(%rip), %xmm1, %xmm1 757; XOPAVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 758; XOPAVX2-NEXT: vpshlb %xmm1, %xmm2, %xmm2 759; XOPAVX2-NEXT: vpshlb %xmm1, %xmm0, %xmm0 760; XOPAVX2-NEXT: vinserti128 $1, %xmm2, %ymm0, %ymm0 761; XOPAVX2-NEXT: retq 762; 763; AVX512-LABEL: constant_shift_v32i8: 764; AVX512: ## BB#0: 765; AVX512-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0,0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0] 766; AVX512-NEXT: vpsllw $5, %ymm1, %ymm1 767; AVX512-NEXT: vpsrlw $4, %ymm0, %ymm2 768; AVX512-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 769; AVX512-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 770; AVX512-NEXT: vpsrlw $2, %ymm0, %ymm2 771; AVX512-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 772; AVX512-NEXT: vpaddb %ymm1, %ymm1, %ymm1 773; AVX512-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 774; AVX512-NEXT: vpsrlw $1, %ymm0, %ymm2 775; AVX512-NEXT: vpand {{.*}}(%rip), %ymm2, %ymm2 776; AVX512-NEXT: vpaddb %ymm1, %ymm1, %ymm1 777; AVX512-NEXT: vpblendvb %ymm1, %ymm2, %ymm0, %ymm0 778; AVX512-NEXT: retq 779 %shift = lshr <32 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0> 780 ret <32 x i8> %shift 781} 782 783; 784; Uniform Constant Shifts 785; 786 787define <4 x i64> @splatconstant_shift_v4i64(<4 x i64> %a) nounwind { 788; AVX1-LABEL: splatconstant_shift_v4i64: 789; AVX1: # BB#0: 790; AVX1-NEXT: vpsrlq $7, %xmm0, %xmm1 791; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 792; AVX1-NEXT: vpsrlq $7, %xmm0, %xmm0 793; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 794; AVX1-NEXT: retq 795; 796; AVX2-LABEL: splatconstant_shift_v4i64: 797; AVX2: # BB#0: 798; AVX2-NEXT: vpsrlq $7, %ymm0, %ymm0 799; AVX2-NEXT: retq 800; 801; XOPAVX1-LABEL: splatconstant_shift_v4i64: 802; XOPAVX1: # BB#0: 803; XOPAVX1-NEXT: vpsrlq $7, %xmm0, %xmm1 804; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 805; XOPAVX1-NEXT: vpsrlq $7, %xmm0, %xmm0 806; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 807; XOPAVX1-NEXT: retq 808; 809; XOPAVX2-LABEL: splatconstant_shift_v4i64: 810; XOPAVX2: # BB#0: 811; XOPAVX2-NEXT: vpsrlq $7, %ymm0, %ymm0 812; XOPAVX2-NEXT: retq 813; 814; AVX512-LABEL: splatconstant_shift_v4i64: 815; AVX512: ## BB#0: 816; AVX512-NEXT: vpsrlq $7, %ymm0, %ymm0 817; AVX512-NEXT: retq 818 %shift = lshr <4 x i64> %a, <i64 7, i64 7, i64 7, i64 7> 819 ret <4 x i64> %shift 820} 821 822define <8 x i32> @splatconstant_shift_v8i32(<8 x i32> %a) nounwind { 823; AVX1-LABEL: splatconstant_shift_v8i32: 824; AVX1: # BB#0: 825; AVX1-NEXT: vpsrld $5, %xmm0, %xmm1 826; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 827; AVX1-NEXT: vpsrld $5, %xmm0, %xmm0 828; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 829; AVX1-NEXT: retq 830; 831; AVX2-LABEL: splatconstant_shift_v8i32: 832; AVX2: # BB#0: 833; AVX2-NEXT: vpsrld $5, %ymm0, %ymm0 834; AVX2-NEXT: retq 835; 836; XOPAVX1-LABEL: splatconstant_shift_v8i32: 837; XOPAVX1: # BB#0: 838; XOPAVX1-NEXT: vpsrld $5, %xmm0, %xmm1 839; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 840; XOPAVX1-NEXT: vpsrld $5, %xmm0, %xmm0 841; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 842; XOPAVX1-NEXT: retq 843; 844; XOPAVX2-LABEL: splatconstant_shift_v8i32: 845; XOPAVX2: # BB#0: 846; XOPAVX2-NEXT: vpsrld $5, %ymm0, %ymm0 847; XOPAVX2-NEXT: retq 848; 849; AVX512-LABEL: splatconstant_shift_v8i32: 850; AVX512: ## BB#0: 851; AVX512-NEXT: vpsrld $5, %ymm0, %ymm0 852; AVX512-NEXT: retq 853 %shift = lshr <8 x i32> %a, <i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5, i32 5> 854 ret <8 x i32> %shift 855} 856 857define <16 x i16> @splatconstant_shift_v16i16(<16 x i16> %a) nounwind { 858; AVX1-LABEL: splatconstant_shift_v16i16: 859; AVX1: # BB#0: 860; AVX1-NEXT: vpsrlw $3, %xmm0, %xmm1 861; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 862; AVX1-NEXT: vpsrlw $3, %xmm0, %xmm0 863; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 864; AVX1-NEXT: retq 865; 866; AVX2-LABEL: splatconstant_shift_v16i16: 867; AVX2: # BB#0: 868; AVX2-NEXT: vpsrlw $3, %ymm0, %ymm0 869; AVX2-NEXT: retq 870; 871; XOPAVX1-LABEL: splatconstant_shift_v16i16: 872; XOPAVX1: # BB#0: 873; XOPAVX1-NEXT: vpsrlw $3, %xmm0, %xmm1 874; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 875; XOPAVX1-NEXT: vpsrlw $3, %xmm0, %xmm0 876; XOPAVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 877; XOPAVX1-NEXT: retq 878; 879; XOPAVX2-LABEL: splatconstant_shift_v16i16: 880; XOPAVX2: # BB#0: 881; XOPAVX2-NEXT: vpsrlw $3, %ymm0, %ymm0 882; XOPAVX2-NEXT: retq 883; 884; AVX512-LABEL: splatconstant_shift_v16i16: 885; AVX512: ## BB#0: 886; AVX512-NEXT: vpsrlw $3, %ymm0, %ymm0 887; AVX512-NEXT: retq 888 %shift = lshr <16 x i16> %a, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3> 889 ret <16 x i16> %shift 890} 891 892define <32 x i8> @splatconstant_shift_v32i8(<32 x i8> %a) nounwind { 893; AVX1-LABEL: splatconstant_shift_v32i8: 894; AVX1: # BB#0: 895; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 896; AVX1-NEXT: vpsrlw $3, %xmm1, %xmm1 897; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31] 898; AVX1-NEXT: vpand %xmm2, %xmm1, %xmm1 899; AVX1-NEXT: vpsrlw $3, %xmm0, %xmm0 900; AVX1-NEXT: vpand %xmm2, %xmm0, %xmm0 901; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 902; AVX1-NEXT: retq 903; 904; AVX2-LABEL: splatconstant_shift_v32i8: 905; AVX2: # BB#0: 906; AVX2-NEXT: vpsrlw $3, %ymm0, %ymm0 907; AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 908; AVX2-NEXT: retq 909; 910; XOPAVX1-LABEL: splatconstant_shift_v32i8: 911; XOPAVX1: # BB#0: 912; XOPAVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 913; XOPAVX1-NEXT: vpsubb {{.*}}(%rip), %xmm1, %xmm1 914; XOPAVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 915; XOPAVX1-NEXT: vpshlb %xmm1, %xmm2, %xmm2 916; XOPAVX1-NEXT: vpshlb %xmm1, %xmm0, %xmm0 917; XOPAVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 918; XOPAVX1-NEXT: retq 919; 920; XOPAVX2-LABEL: splatconstant_shift_v32i8: 921; XOPAVX2: # BB#0: 922; XOPAVX2-NEXT: vpsrlw $3, %ymm0, %ymm0 923; XOPAVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 924; XOPAVX2-NEXT: retq 925; 926; AVX512-LABEL: splatconstant_shift_v32i8: 927; AVX512: ## BB#0: 928; AVX512-NEXT: vpsrlw $3, %ymm0, %ymm0 929; AVX512-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 930; AVX512-NEXT: retq 931 %shift = lshr <32 x i8> %a, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> 932 ret <32 x i8> %shift 933} 934