1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
8; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW
9;
10; Just one 32-bit run to make sure we do reasonable things for i64 shifts.
11; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
12
13;
14; Variable Shifts
15;
16
17define <2 x i64> @var_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
18; SSE2-LABEL: var_shift_v2i64:
19; SSE2:       # BB#0:
20; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
21; SSE2-NEXT:    movdqa %xmm0, %xmm2
22; SSE2-NEXT:    psrlq %xmm3, %xmm2
23; SSE2-NEXT:    psrlq %xmm1, %xmm0
24; SSE2-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
25; SSE2-NEXT:    movapd %xmm2, %xmm0
26; SSE2-NEXT:    retq
27;
28; SSE41-LABEL: var_shift_v2i64:
29; SSE41:       # BB#0:
30; SSE41-NEXT:    movdqa %xmm0, %xmm2
31; SSE41-NEXT:    psrlq %xmm1, %xmm2
32; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
33; SSE41-NEXT:    psrlq %xmm1, %xmm0
34; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
35; SSE41-NEXT:    retq
36;
37; AVX1-LABEL: var_shift_v2i64:
38; AVX1:       # BB#0:
39; AVX1-NEXT:    vpsrlq %xmm1, %xmm0, %xmm2
40; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
41; AVX1-NEXT:    vpsrlq %xmm1, %xmm0, %xmm0
42; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm2[0,1,2,3],xmm0[4,5,6,7]
43; AVX1-NEXT:    retq
44;
45; AVX2-LABEL: var_shift_v2i64:
46; AVX2:       # BB#0:
47; AVX2-NEXT:    vpsrlvq %xmm1, %xmm0, %xmm0
48; AVX2-NEXT:    retq
49;
50; XOPAVX1-LABEL: var_shift_v2i64:
51; XOPAVX1:       # BB#0:
52; XOPAVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
53; XOPAVX1-NEXT:    vpsubq %xmm1, %xmm2, %xmm1
54; XOPAVX1-NEXT:    vpshlq %xmm1, %xmm0, %xmm0
55; XOPAVX1-NEXT:    retq
56;
57; XOPAVX2-LABEL: var_shift_v2i64:
58; XOPAVX2:       # BB#0:
59; XOPAVX2-NEXT:    vpsrlvq %xmm1, %xmm0, %xmm0
60; XOPAVX2-NEXT:    retq
61;
62; AVX512-LABEL: var_shift_v2i64:
63; AVX512:       ## BB#0:
64; AVX512-NEXT:    vpsrlvq %xmm1, %xmm0, %xmm0
65; AVX512-NEXT:    retq
66;
67; X32-SSE-LABEL: var_shift_v2i64:
68; X32-SSE:       # BB#0:
69; X32-SSE-NEXT:    pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1]
70; X32-SSE-NEXT:    movdqa %xmm0, %xmm2
71; X32-SSE-NEXT:    psrlq %xmm3, %xmm2
72; X32-SSE-NEXT:    movq {{.*#+}} xmm1 = xmm1[0],zero
73; X32-SSE-NEXT:    psrlq %xmm1, %xmm0
74; X32-SSE-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
75; X32-SSE-NEXT:    movapd %xmm2, %xmm0
76; X32-SSE-NEXT:    retl
77  %shift = lshr <2 x i64> %a, %b
78  ret <2 x i64> %shift
79}
80
81define <4 x i32> @var_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
82; SSE2-LABEL: var_shift_v4i32:
83; SSE2:       # BB#0:
84; SSE2-NEXT:    movdqa %xmm1, %xmm2
85; SSE2-NEXT:    psrldq {{.*#+}} xmm2 = xmm2[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
86; SSE2-NEXT:    movdqa %xmm0, %xmm3
87; SSE2-NEXT:    psrld %xmm2, %xmm3
88; SSE2-NEXT:    movdqa %xmm1, %xmm2
89; SSE2-NEXT:    psrlq $32, %xmm2
90; SSE2-NEXT:    movdqa %xmm0, %xmm4
91; SSE2-NEXT:    psrld %xmm2, %xmm4
92; SSE2-NEXT:    movsd {{.*#+}} xmm3 = xmm4[0],xmm3[1]
93; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[1,3,2,3]
94; SSE2-NEXT:    pxor %xmm3, %xmm3
95; SSE2-NEXT:    movdqa %xmm1, %xmm4
96; SSE2-NEXT:    punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
97; SSE2-NEXT:    movdqa %xmm0, %xmm5
98; SSE2-NEXT:    psrld %xmm4, %xmm5
99; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
100; SSE2-NEXT:    psrld %xmm1, %xmm0
101; SSE2-NEXT:    movsd {{.*#+}} xmm5 = xmm0[0],xmm5[1]
102; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm5[0,2,2,3]
103; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
104; SSE2-NEXT:    retq
105;
106; SSE41-LABEL: var_shift_v4i32:
107; SSE41:       # BB#0:
108; SSE41-NEXT:    movdqa %xmm1, %xmm2
109; SSE41-NEXT:    psrldq {{.*#+}} xmm2 = xmm2[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
110; SSE41-NEXT:    movdqa %xmm0, %xmm3
111; SSE41-NEXT:    psrld %xmm2, %xmm3
112; SSE41-NEXT:    movdqa %xmm1, %xmm2
113; SSE41-NEXT:    psrlq $32, %xmm2
114; SSE41-NEXT:    movdqa %xmm0, %xmm4
115; SSE41-NEXT:    psrld %xmm2, %xmm4
116; SSE41-NEXT:    pblendw {{.*#+}} xmm4 = xmm4[0,1,2,3],xmm3[4,5,6,7]
117; SSE41-NEXT:    pxor %xmm2, %xmm2
118; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm3 = xmm1[0],zero,xmm1[1],zero
119; SSE41-NEXT:    punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3]
120; SSE41-NEXT:    movdqa %xmm0, %xmm2
121; SSE41-NEXT:    psrld %xmm1, %xmm2
122; SSE41-NEXT:    psrld %xmm3, %xmm0
123; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
124; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm4[2,3],xmm0[4,5],xmm4[6,7]
125; SSE41-NEXT:    retq
126;
127; AVX1-LABEL: var_shift_v4i32:
128; AVX1:       # BB#0:
129; AVX1-NEXT:    vpsrldq {{.*#+}} xmm2 = xmm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
130; AVX1-NEXT:    vpsrld %xmm2, %xmm0, %xmm2
131; AVX1-NEXT:    vpsrlq $32, %xmm1, %xmm3
132; AVX1-NEXT:    vpsrld %xmm3, %xmm0, %xmm3
133; AVX1-NEXT:    vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7]
134; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
135; AVX1-NEXT:    vpunpckhdq {{.*#+}} xmm3 = xmm1[2],xmm3[2],xmm1[3],xmm3[3]
136; AVX1-NEXT:    vpsrld %xmm3, %xmm0, %xmm3
137; AVX1-NEXT:    vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero
138; AVX1-NEXT:    vpsrld %xmm1, %xmm0, %xmm0
139; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm3[4,5,6,7]
140; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
141; AVX1-NEXT:    retq
142;
143; AVX2-LABEL: var_shift_v4i32:
144; AVX2:       # BB#0:
145; AVX2-NEXT:    vpsrlvd %xmm1, %xmm0, %xmm0
146; AVX2-NEXT:    retq
147;
148; XOPAVX1-LABEL: var_shift_v4i32:
149; XOPAVX1:       # BB#0:
150; XOPAVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
151; XOPAVX1-NEXT:    vpsubd %xmm1, %xmm2, %xmm1
152; XOPAVX1-NEXT:    vpshld %xmm1, %xmm0, %xmm0
153; XOPAVX1-NEXT:    retq
154;
155; XOPAVX2-LABEL: var_shift_v4i32:
156; XOPAVX2:       # BB#0:
157; XOPAVX2-NEXT:    vpsrlvd %xmm1, %xmm0, %xmm0
158; XOPAVX2-NEXT:    retq
159;
160; AVX512-LABEL: var_shift_v4i32:
161; AVX512:       ## BB#0:
162; AVX512-NEXT:    vpsrlvd %xmm1, %xmm0, %xmm0
163; AVX512-NEXT:    retq
164;
165; X32-SSE-LABEL: var_shift_v4i32:
166; X32-SSE:       # BB#0:
167; X32-SSE-NEXT:    movdqa %xmm1, %xmm2
168; X32-SSE-NEXT:    psrldq {{.*#+}} xmm2 = xmm2[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero
169; X32-SSE-NEXT:    movdqa %xmm0, %xmm3
170; X32-SSE-NEXT:    psrld %xmm2, %xmm3
171; X32-SSE-NEXT:    movdqa %xmm1, %xmm2
172; X32-SSE-NEXT:    psrlq $32, %xmm2
173; X32-SSE-NEXT:    movdqa %xmm0, %xmm4
174; X32-SSE-NEXT:    psrld %xmm2, %xmm4
175; X32-SSE-NEXT:    movsd {{.*#+}} xmm3 = xmm4[0],xmm3[1]
176; X32-SSE-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[1,3,2,3]
177; X32-SSE-NEXT:    pxor %xmm3, %xmm3
178; X32-SSE-NEXT:    movdqa %xmm1, %xmm4
179; X32-SSE-NEXT:    punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm3[2],xmm4[3],xmm3[3]
180; X32-SSE-NEXT:    movdqa %xmm0, %xmm5
181; X32-SSE-NEXT:    psrld %xmm4, %xmm5
182; X32-SSE-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1]
183; X32-SSE-NEXT:    psrld %xmm1, %xmm0
184; X32-SSE-NEXT:    movsd {{.*#+}} xmm5 = xmm0[0],xmm5[1]
185; X32-SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm5[0,2,2,3]
186; X32-SSE-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
187; X32-SSE-NEXT:    retl
188  %shift = lshr <4 x i32> %a, %b
189  ret <4 x i32> %shift
190}
191
192define <8 x i16> @var_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
193; SSE2-LABEL: var_shift_v8i16:
194; SSE2:       # BB#0:
195; SSE2-NEXT:    psllw $12, %xmm1
196; SSE2-NEXT:    movdqa %xmm1, %xmm2
197; SSE2-NEXT:    psraw $15, %xmm2
198; SSE2-NEXT:    movdqa %xmm2, %xmm3
199; SSE2-NEXT:    pandn %xmm0, %xmm3
200; SSE2-NEXT:    psrlw $8, %xmm0
201; SSE2-NEXT:    pand %xmm2, %xmm0
202; SSE2-NEXT:    por %xmm3, %xmm0
203; SSE2-NEXT:    paddw %xmm1, %xmm1
204; SSE2-NEXT:    movdqa %xmm1, %xmm2
205; SSE2-NEXT:    psraw $15, %xmm2
206; SSE2-NEXT:    movdqa %xmm2, %xmm3
207; SSE2-NEXT:    pandn %xmm0, %xmm3
208; SSE2-NEXT:    psrlw $4, %xmm0
209; SSE2-NEXT:    pand %xmm2, %xmm0
210; SSE2-NEXT:    por %xmm3, %xmm0
211; SSE2-NEXT:    paddw %xmm1, %xmm1
212; SSE2-NEXT:    movdqa %xmm1, %xmm2
213; SSE2-NEXT:    psraw $15, %xmm2
214; SSE2-NEXT:    movdqa %xmm2, %xmm3
215; SSE2-NEXT:    pandn %xmm0, %xmm3
216; SSE2-NEXT:    psrlw $2, %xmm0
217; SSE2-NEXT:    pand %xmm2, %xmm0
218; SSE2-NEXT:    por %xmm3, %xmm0
219; SSE2-NEXT:    paddw %xmm1, %xmm1
220; SSE2-NEXT:    psraw $15, %xmm1
221; SSE2-NEXT:    movdqa %xmm1, %xmm2
222; SSE2-NEXT:    pandn %xmm0, %xmm2
223; SSE2-NEXT:    psrlw $1, %xmm0
224; SSE2-NEXT:    pand %xmm1, %xmm0
225; SSE2-NEXT:    por %xmm2, %xmm0
226; SSE2-NEXT:    retq
227;
228; SSE41-LABEL: var_shift_v8i16:
229; SSE41:       # BB#0:
230; SSE41-NEXT:    movdqa %xmm0, %xmm2
231; SSE41-NEXT:    movdqa %xmm1, %xmm0
232; SSE41-NEXT:    psllw $12, %xmm0
233; SSE41-NEXT:    psllw $4, %xmm1
234; SSE41-NEXT:    por %xmm0, %xmm1
235; SSE41-NEXT:    movdqa %xmm1, %xmm3
236; SSE41-NEXT:    paddw %xmm3, %xmm3
237; SSE41-NEXT:    movdqa %xmm2, %xmm4
238; SSE41-NEXT:    psrlw $8, %xmm4
239; SSE41-NEXT:    movdqa %xmm1, %xmm0
240; SSE41-NEXT:    pblendvb %xmm4, %xmm2
241; SSE41-NEXT:    movdqa %xmm2, %xmm1
242; SSE41-NEXT:    psrlw $4, %xmm1
243; SSE41-NEXT:    movdqa %xmm3, %xmm0
244; SSE41-NEXT:    pblendvb %xmm1, %xmm2
245; SSE41-NEXT:    movdqa %xmm2, %xmm1
246; SSE41-NEXT:    psrlw $2, %xmm1
247; SSE41-NEXT:    paddw %xmm3, %xmm3
248; SSE41-NEXT:    movdqa %xmm3, %xmm0
249; SSE41-NEXT:    pblendvb %xmm1, %xmm2
250; SSE41-NEXT:    movdqa %xmm2, %xmm1
251; SSE41-NEXT:    psrlw $1, %xmm1
252; SSE41-NEXT:    paddw %xmm3, %xmm3
253; SSE41-NEXT:    movdqa %xmm3, %xmm0
254; SSE41-NEXT:    pblendvb %xmm1, %xmm2
255; SSE41-NEXT:    movdqa %xmm2, %xmm0
256; SSE41-NEXT:    retq
257;
258; AVX1-LABEL: var_shift_v8i16:
259; AVX1:       # BB#0:
260; AVX1-NEXT:    vpsllw $12, %xmm1, %xmm2
261; AVX1-NEXT:    vpsllw $4, %xmm1, %xmm1
262; AVX1-NEXT:    vpor %xmm2, %xmm1, %xmm1
263; AVX1-NEXT:    vpaddw %xmm1, %xmm1, %xmm2
264; AVX1-NEXT:    vpsrlw $8, %xmm0, %xmm3
265; AVX1-NEXT:    vpblendvb %xmm1, %xmm3, %xmm0, %xmm0
266; AVX1-NEXT:    vpsrlw $4, %xmm0, %xmm1
267; AVX1-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
268; AVX1-NEXT:    vpsrlw $2, %xmm0, %xmm1
269; AVX1-NEXT:    vpaddw %xmm2, %xmm2, %xmm2
270; AVX1-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
271; AVX1-NEXT:    vpsrlw $1, %xmm0, %xmm1
272; AVX1-NEXT:    vpaddw %xmm2, %xmm2, %xmm2
273; AVX1-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
274; AVX1-NEXT:    retq
275;
276; AVX2-LABEL: var_shift_v8i16:
277; AVX2:       # BB#0:
278; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
279; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
280; AVX2-NEXT:    vpsrlvd %ymm1, %ymm0, %ymm0
281; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
282; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
283; AVX2-NEXT:    vzeroupper
284; AVX2-NEXT:    retq
285;
286; XOP-LABEL: var_shift_v8i16:
287; XOP:       # BB#0:
288; XOP-NEXT:    vpxor %xmm2, %xmm2, %xmm2
289; XOP-NEXT:    vpsubw %xmm1, %xmm2, %xmm1
290; XOP-NEXT:    vpshlw %xmm1, %xmm0, %xmm0
291; XOP-NEXT:    retq
292;
293; AVX512-LABEL: var_shift_v8i16:
294; AVX512:       ## BB#0:
295; AVX512-NEXT:    vpsrlvw %zmm1, %zmm0, %zmm0
296; AVX512-NEXT:    retq
297;
298; X32-SSE-LABEL: var_shift_v8i16:
299; X32-SSE:       # BB#0:
300; X32-SSE-NEXT:    psllw $12, %xmm1
301; X32-SSE-NEXT:    movdqa %xmm1, %xmm2
302; X32-SSE-NEXT:    psraw $15, %xmm2
303; X32-SSE-NEXT:    movdqa %xmm2, %xmm3
304; X32-SSE-NEXT:    pandn %xmm0, %xmm3
305; X32-SSE-NEXT:    psrlw $8, %xmm0
306; X32-SSE-NEXT:    pand %xmm2, %xmm0
307; X32-SSE-NEXT:    por %xmm3, %xmm0
308; X32-SSE-NEXT:    paddw %xmm1, %xmm1
309; X32-SSE-NEXT:    movdqa %xmm1, %xmm2
310; X32-SSE-NEXT:    psraw $15, %xmm2
311; X32-SSE-NEXT:    movdqa %xmm2, %xmm3
312; X32-SSE-NEXT:    pandn %xmm0, %xmm3
313; X32-SSE-NEXT:    psrlw $4, %xmm0
314; X32-SSE-NEXT:    pand %xmm2, %xmm0
315; X32-SSE-NEXT:    por %xmm3, %xmm0
316; X32-SSE-NEXT:    paddw %xmm1, %xmm1
317; X32-SSE-NEXT:    movdqa %xmm1, %xmm2
318; X32-SSE-NEXT:    psraw $15, %xmm2
319; X32-SSE-NEXT:    movdqa %xmm2, %xmm3
320; X32-SSE-NEXT:    pandn %xmm0, %xmm3
321; X32-SSE-NEXT:    psrlw $2, %xmm0
322; X32-SSE-NEXT:    pand %xmm2, %xmm0
323; X32-SSE-NEXT:    por %xmm3, %xmm0
324; X32-SSE-NEXT:    paddw %xmm1, %xmm1
325; X32-SSE-NEXT:    psraw $15, %xmm1
326; X32-SSE-NEXT:    movdqa %xmm1, %xmm2
327; X32-SSE-NEXT:    pandn %xmm0, %xmm2
328; X32-SSE-NEXT:    psrlw $1, %xmm0
329; X32-SSE-NEXT:    pand %xmm1, %xmm0
330; X32-SSE-NEXT:    por %xmm2, %xmm0
331; X32-SSE-NEXT:    retl
332  %shift = lshr <8 x i16> %a, %b
333  ret <8 x i16> %shift
334}
335
336define <16 x i8> @var_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
337; SSE2-LABEL: var_shift_v16i8:
338; SSE2:       # BB#0:
339; SSE2-NEXT:    psllw $5, %xmm1
340; SSE2-NEXT:    pxor %xmm2, %xmm2
341; SSE2-NEXT:    pxor %xmm3, %xmm3
342; SSE2-NEXT:    pcmpgtb %xmm1, %xmm3
343; SSE2-NEXT:    movdqa %xmm3, %xmm4
344; SSE2-NEXT:    pandn %xmm0, %xmm4
345; SSE2-NEXT:    psrlw $4, %xmm0
346; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
347; SSE2-NEXT:    pand %xmm3, %xmm0
348; SSE2-NEXT:    por %xmm4, %xmm0
349; SSE2-NEXT:    paddb %xmm1, %xmm1
350; SSE2-NEXT:    pxor %xmm3, %xmm3
351; SSE2-NEXT:    pcmpgtb %xmm1, %xmm3
352; SSE2-NEXT:    movdqa %xmm3, %xmm4
353; SSE2-NEXT:    pandn %xmm0, %xmm4
354; SSE2-NEXT:    psrlw $2, %xmm0
355; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
356; SSE2-NEXT:    pand %xmm3, %xmm0
357; SSE2-NEXT:    por %xmm4, %xmm0
358; SSE2-NEXT:    paddb %xmm1, %xmm1
359; SSE2-NEXT:    pcmpgtb %xmm1, %xmm2
360; SSE2-NEXT:    movdqa %xmm2, %xmm1
361; SSE2-NEXT:    pandn %xmm0, %xmm1
362; SSE2-NEXT:    psrlw $1, %xmm0
363; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
364; SSE2-NEXT:    pand %xmm2, %xmm0
365; SSE2-NEXT:    por %xmm1, %xmm0
366; SSE2-NEXT:    retq
367;
368; SSE41-LABEL: var_shift_v16i8:
369; SSE41:       # BB#0:
370; SSE41-NEXT:    movdqa %xmm0, %xmm2
371; SSE41-NEXT:    psllw $5, %xmm1
372; SSE41-NEXT:    movdqa %xmm2, %xmm3
373; SSE41-NEXT:    psrlw $4, %xmm3
374; SSE41-NEXT:    pand {{.*}}(%rip), %xmm3
375; SSE41-NEXT:    movdqa %xmm1, %xmm0
376; SSE41-NEXT:    pblendvb %xmm3, %xmm2
377; SSE41-NEXT:    movdqa %xmm2, %xmm3
378; SSE41-NEXT:    psrlw $2, %xmm3
379; SSE41-NEXT:    pand {{.*}}(%rip), %xmm3
380; SSE41-NEXT:    paddb %xmm1, %xmm1
381; SSE41-NEXT:    movdqa %xmm1, %xmm0
382; SSE41-NEXT:    pblendvb %xmm3, %xmm2
383; SSE41-NEXT:    movdqa %xmm2, %xmm3
384; SSE41-NEXT:    psrlw $1, %xmm3
385; SSE41-NEXT:    pand {{.*}}(%rip), %xmm3
386; SSE41-NEXT:    paddb %xmm1, %xmm1
387; SSE41-NEXT:    movdqa %xmm1, %xmm0
388; SSE41-NEXT:    pblendvb %xmm3, %xmm2
389; SSE41-NEXT:    movdqa %xmm2, %xmm0
390; SSE41-NEXT:    retq
391;
392; AVX-LABEL: var_shift_v16i8:
393; AVX:       # BB#0:
394; AVX-NEXT:    vpsllw $5, %xmm1, %xmm1
395; AVX-NEXT:    vpsrlw $4, %xmm0, %xmm2
396; AVX-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
397; AVX-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
398; AVX-NEXT:    vpsrlw $2, %xmm0, %xmm2
399; AVX-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
400; AVX-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
401; AVX-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
402; AVX-NEXT:    vpsrlw $1, %xmm0, %xmm2
403; AVX-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
404; AVX-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
405; AVX-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
406; AVX-NEXT:    retq
407;
408; XOP-LABEL: var_shift_v16i8:
409; XOP:       # BB#0:
410; XOP-NEXT:    vpxor %xmm2, %xmm2, %xmm2
411; XOP-NEXT:    vpsubb %xmm1, %xmm2, %xmm1
412; XOP-NEXT:    vpshlb %xmm1, %xmm0, %xmm0
413; XOP-NEXT:    retq
414;
415; AVX512-LABEL: var_shift_v16i8:
416; AVX512:       ## BB#0:
417; AVX512-NEXT:    vpsllw $5, %xmm1, %xmm1
418; AVX512-NEXT:    vpsrlw $4, %xmm0, %xmm2
419; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
420; AVX512-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
421; AVX512-NEXT:    vpsrlw $2, %xmm0, %xmm2
422; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
423; AVX512-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
424; AVX512-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
425; AVX512-NEXT:    vpsrlw $1, %xmm0, %xmm2
426; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
427; AVX512-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
428; AVX512-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
429; AVX512-NEXT:    retq
430;
431; X32-SSE-LABEL: var_shift_v16i8:
432; X32-SSE:       # BB#0:
433; X32-SSE-NEXT:    psllw $5, %xmm1
434; X32-SSE-NEXT:    pxor %xmm2, %xmm2
435; X32-SSE-NEXT:    pxor %xmm3, %xmm3
436; X32-SSE-NEXT:    pcmpgtb %xmm1, %xmm3
437; X32-SSE-NEXT:    movdqa %xmm3, %xmm4
438; X32-SSE-NEXT:    pandn %xmm0, %xmm4
439; X32-SSE-NEXT:    psrlw $4, %xmm0
440; X32-SSE-NEXT:    pand .LCPI3_0, %xmm0
441; X32-SSE-NEXT:    pand %xmm3, %xmm0
442; X32-SSE-NEXT:    por %xmm4, %xmm0
443; X32-SSE-NEXT:    paddb %xmm1, %xmm1
444; X32-SSE-NEXT:    pxor %xmm3, %xmm3
445; X32-SSE-NEXT:    pcmpgtb %xmm1, %xmm3
446; X32-SSE-NEXT:    movdqa %xmm3, %xmm4
447; X32-SSE-NEXT:    pandn %xmm0, %xmm4
448; X32-SSE-NEXT:    psrlw $2, %xmm0
449; X32-SSE-NEXT:    pand .LCPI3_1, %xmm0
450; X32-SSE-NEXT:    pand %xmm3, %xmm0
451; X32-SSE-NEXT:    por %xmm4, %xmm0
452; X32-SSE-NEXT:    paddb %xmm1, %xmm1
453; X32-SSE-NEXT:    pcmpgtb %xmm1, %xmm2
454; X32-SSE-NEXT:    movdqa %xmm2, %xmm1
455; X32-SSE-NEXT:    pandn %xmm0, %xmm1
456; X32-SSE-NEXT:    psrlw $1, %xmm0
457; X32-SSE-NEXT:    pand .LCPI3_2, %xmm0
458; X32-SSE-NEXT:    pand %xmm2, %xmm0
459; X32-SSE-NEXT:    por %xmm1, %xmm0
460; X32-SSE-NEXT:    retl
461  %shift = lshr <16 x i8> %a, %b
462  ret <16 x i8> %shift
463}
464
465;
466; Uniform Variable Shifts
467;
468
469define <2 x i64> @splatvar_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
470; SSE-LABEL: splatvar_shift_v2i64:
471; SSE:       # BB#0:
472; SSE-NEXT:    psrlq %xmm1, %xmm0
473; SSE-NEXT:    retq
474;
475; AVX-LABEL: splatvar_shift_v2i64:
476; AVX:       # BB#0:
477; AVX-NEXT:    vpsrlq %xmm1, %xmm0, %xmm0
478; AVX-NEXT:    retq
479;
480; XOP-LABEL: splatvar_shift_v2i64:
481; XOP:       # BB#0:
482; XOP-NEXT:    vpsrlq %xmm1, %xmm0, %xmm0
483; XOP-NEXT:    retq
484;
485; AVX512-LABEL: splatvar_shift_v2i64:
486; AVX512:       ## BB#0:
487; AVX512-NEXT:    vpsrlq %xmm1, %xmm0, %xmm0
488; AVX512-NEXT:    retq
489;
490; X32-SSE-LABEL: splatvar_shift_v2i64:
491; X32-SSE:       # BB#0:
492; X32-SSE-NEXT:    movq {{.*#+}} xmm1 = xmm1[0],zero
493; X32-SSE-NEXT:    psrlq %xmm1, %xmm0
494; X32-SSE-NEXT:    retl
495  %splat = shufflevector <2 x i64> %b, <2 x i64> undef, <2 x i32> zeroinitializer
496  %shift = lshr <2 x i64> %a, %splat
497  ret <2 x i64> %shift
498}
499
500define <4 x i32> @splatvar_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
501; SSE2-LABEL: splatvar_shift_v4i32:
502; SSE2:       # BB#0:
503; SSE2-NEXT:    xorps %xmm2, %xmm2
504; SSE2-NEXT:    movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
505; SSE2-NEXT:    psrld %xmm2, %xmm0
506; SSE2-NEXT:    retq
507;
508; SSE41-LABEL: splatvar_shift_v4i32:
509; SSE41:       # BB#0:
510; SSE41-NEXT:    pxor %xmm2, %xmm2
511; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3,4,5,6,7]
512; SSE41-NEXT:    psrld %xmm2, %xmm0
513; SSE41-NEXT:    retq
514;
515; AVX-LABEL: splatvar_shift_v4i32:
516; AVX:       # BB#0:
517; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
518; AVX-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
519; AVX-NEXT:    vpsrld %xmm1, %xmm0, %xmm0
520; AVX-NEXT:    retq
521;
522; XOP-LABEL: splatvar_shift_v4i32:
523; XOP:       # BB#0:
524; XOP-NEXT:    vpxor %xmm2, %xmm2, %xmm2
525; XOP-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0,1],xmm2[2,3,4,5,6,7]
526; XOP-NEXT:    vpsrld %xmm1, %xmm0, %xmm0
527; XOP-NEXT:    retq
528;
529; AVX512-LABEL: splatvar_shift_v4i32:
530; AVX512:       ## BB#0:
531; AVX512-NEXT:    vxorps %xmm2, %xmm2, %xmm2
532; AVX512-NEXT:    vmovss {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3]
533; AVX512-NEXT:    vpsrld %xmm1, %xmm0, %xmm0
534; AVX512-NEXT:    retq
535;
536; X32-SSE-LABEL: splatvar_shift_v4i32:
537; X32-SSE:       # BB#0:
538; X32-SSE-NEXT:    xorps %xmm2, %xmm2
539; X32-SSE-NEXT:    movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3]
540; X32-SSE-NEXT:    psrld %xmm2, %xmm0
541; X32-SSE-NEXT:    retl
542  %splat = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> zeroinitializer
543  %shift = lshr <4 x i32> %a, %splat
544  ret <4 x i32> %shift
545}
546
547define <8 x i16> @splatvar_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
548; SSE2-LABEL: splatvar_shift_v8i16:
549; SSE2:       # BB#0:
550; SSE2-NEXT:    movd %xmm1, %eax
551; SSE2-NEXT:    movzwl %ax, %eax
552; SSE2-NEXT:    movd %eax, %xmm1
553; SSE2-NEXT:    psrlw %xmm1, %xmm0
554; SSE2-NEXT:    retq
555;
556; SSE41-LABEL: splatvar_shift_v8i16:
557; SSE41:       # BB#0:
558; SSE41-NEXT:    pxor %xmm2, %xmm2
559; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3,4,5,6,7]
560; SSE41-NEXT:    psrlw %xmm2, %xmm0
561; SSE41-NEXT:    retq
562;
563; AVX-LABEL: splatvar_shift_v8i16:
564; AVX:       # BB#0:
565; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
566; AVX-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3,4,5,6,7]
567; AVX-NEXT:    vpsrlw %xmm1, %xmm0, %xmm0
568; AVX-NEXT:    retq
569;
570; XOP-LABEL: splatvar_shift_v8i16:
571; XOP:       # BB#0:
572; XOP-NEXT:    vpxor %xmm2, %xmm2, %xmm2
573; XOP-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3,4,5,6,7]
574; XOP-NEXT:    vpsrlw %xmm1, %xmm0, %xmm0
575; XOP-NEXT:    retq
576;
577; AVX512-LABEL: splatvar_shift_v8i16:
578; AVX512:       ## BB#0:
579; AVX512-NEXT:    vpxor %xmm2, %xmm2, %xmm2
580; AVX512-NEXT:    vpblendw {{.*#+}} xmm1 = xmm1[0],xmm2[1,2,3,4,5,6,7]
581; AVX512-NEXT:    vpsrlw %xmm1, %xmm0, %xmm0
582; AVX512-NEXT:    retq
583;
584; X32-SSE-LABEL: splatvar_shift_v8i16:
585; X32-SSE:       # BB#0:
586; X32-SSE-NEXT:    movd %xmm1, %eax
587; X32-SSE-NEXT:    movzwl %ax, %eax
588; X32-SSE-NEXT:    movd %eax, %xmm1
589; X32-SSE-NEXT:    psrlw %xmm1, %xmm0
590; X32-SSE-NEXT:    retl
591  %splat = shufflevector <8 x i16> %b, <8 x i16> undef, <8 x i32> zeroinitializer
592  %shift = lshr <8 x i16> %a, %splat
593  ret <8 x i16> %shift
594}
595
596define <16 x i8> @splatvar_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
597; SSE2-LABEL: splatvar_shift_v16i8:
598; SSE2:       # BB#0:
599; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
600; SSE2-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
601; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[0,0,1,1]
602; SSE2-NEXT:    psllw $5, %xmm2
603; SSE2-NEXT:    pxor %xmm1, %xmm1
604; SSE2-NEXT:    pxor %xmm3, %xmm3
605; SSE2-NEXT:    pcmpgtb %xmm2, %xmm3
606; SSE2-NEXT:    movdqa %xmm3, %xmm4
607; SSE2-NEXT:    pandn %xmm0, %xmm4
608; SSE2-NEXT:    psrlw $4, %xmm0
609; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
610; SSE2-NEXT:    pand %xmm3, %xmm0
611; SSE2-NEXT:    por %xmm4, %xmm0
612; SSE2-NEXT:    paddb %xmm2, %xmm2
613; SSE2-NEXT:    pxor %xmm3, %xmm3
614; SSE2-NEXT:    pcmpgtb %xmm2, %xmm3
615; SSE2-NEXT:    movdqa %xmm3, %xmm4
616; SSE2-NEXT:    pandn %xmm0, %xmm4
617; SSE2-NEXT:    psrlw $2, %xmm0
618; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
619; SSE2-NEXT:    pand %xmm3, %xmm0
620; SSE2-NEXT:    por %xmm4, %xmm0
621; SSE2-NEXT:    paddb %xmm2, %xmm2
622; SSE2-NEXT:    pcmpgtb %xmm2, %xmm1
623; SSE2-NEXT:    movdqa %xmm1, %xmm2
624; SSE2-NEXT:    pandn %xmm0, %xmm2
625; SSE2-NEXT:    psrlw $1, %xmm0
626; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
627; SSE2-NEXT:    pand %xmm1, %xmm0
628; SSE2-NEXT:    por %xmm2, %xmm0
629; SSE2-NEXT:    retq
630;
631; SSE41-LABEL: splatvar_shift_v16i8:
632; SSE41:       # BB#0:
633; SSE41-NEXT:    movdqa %xmm0, %xmm2
634; SSE41-NEXT:    pxor %xmm0, %xmm0
635; SSE41-NEXT:    pshufb %xmm0, %xmm1
636; SSE41-NEXT:    psllw $5, %xmm1
637; SSE41-NEXT:    movdqa %xmm1, %xmm3
638; SSE41-NEXT:    paddb %xmm3, %xmm3
639; SSE41-NEXT:    movdqa %xmm2, %xmm4
640; SSE41-NEXT:    psrlw $4, %xmm4
641; SSE41-NEXT:    pand {{.*}}(%rip), %xmm4
642; SSE41-NEXT:    movdqa %xmm1, %xmm0
643; SSE41-NEXT:    pblendvb %xmm4, %xmm2
644; SSE41-NEXT:    movdqa %xmm2, %xmm1
645; SSE41-NEXT:    psrlw $2, %xmm1
646; SSE41-NEXT:    pand {{.*}}(%rip), %xmm1
647; SSE41-NEXT:    movdqa %xmm3, %xmm0
648; SSE41-NEXT:    pblendvb %xmm1, %xmm2
649; SSE41-NEXT:    movdqa %xmm2, %xmm1
650; SSE41-NEXT:    psrlw $1, %xmm1
651; SSE41-NEXT:    pand {{.*}}(%rip), %xmm1
652; SSE41-NEXT:    paddb %xmm3, %xmm3
653; SSE41-NEXT:    movdqa %xmm3, %xmm0
654; SSE41-NEXT:    pblendvb %xmm1, %xmm2
655; SSE41-NEXT:    movdqa %xmm2, %xmm0
656; SSE41-NEXT:    retq
657;
658; AVX1-LABEL: splatvar_shift_v16i8:
659; AVX1:       # BB#0:
660; AVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
661; AVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
662; AVX1-NEXT:    vpsllw $5, %xmm1, %xmm1
663; AVX1-NEXT:    vpaddb %xmm1, %xmm1, %xmm2
664; AVX1-NEXT:    vpsrlw $4, %xmm0, %xmm3
665; AVX1-NEXT:    vpand {{.*}}(%rip), %xmm3, %xmm3
666; AVX1-NEXT:    vpblendvb %xmm1, %xmm3, %xmm0, %xmm0
667; AVX1-NEXT:    vpsrlw $2, %xmm0, %xmm1
668; AVX1-NEXT:    vpand {{.*}}(%rip), %xmm1, %xmm1
669; AVX1-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
670; AVX1-NEXT:    vpsrlw $1, %xmm0, %xmm1
671; AVX1-NEXT:    vpand {{.*}}(%rip), %xmm1, %xmm1
672; AVX1-NEXT:    vpaddb %xmm2, %xmm2, %xmm2
673; AVX1-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
674; AVX1-NEXT:    retq
675;
676; AVX2-LABEL: splatvar_shift_v16i8:
677; AVX2:       # BB#0:
678; AVX2-NEXT:    vpbroadcastb %xmm1, %xmm1
679; AVX2-NEXT:    vpsllw $5, %xmm1, %xmm1
680; AVX2-NEXT:    vpsrlw $4, %xmm0, %xmm2
681; AVX2-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
682; AVX2-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
683; AVX2-NEXT:    vpsrlw $2, %xmm0, %xmm2
684; AVX2-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
685; AVX2-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
686; AVX2-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
687; AVX2-NEXT:    vpsrlw $1, %xmm0, %xmm2
688; AVX2-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
689; AVX2-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
690; AVX2-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
691; AVX2-NEXT:    retq
692;
693; XOPAVX1-LABEL: splatvar_shift_v16i8:
694; XOPAVX1:       # BB#0:
695; XOPAVX1-NEXT:    vpxor %xmm2, %xmm2, %xmm2
696; XOPAVX1-NEXT:    vpshufb %xmm2, %xmm1, %xmm1
697; XOPAVX1-NEXT:    vpsubb %xmm1, %xmm2, %xmm1
698; XOPAVX1-NEXT:    vpshlb %xmm1, %xmm0, %xmm0
699; XOPAVX1-NEXT:    retq
700;
701; XOPAVX2-LABEL: splatvar_shift_v16i8:
702; XOPAVX2:       # BB#0:
703; XOPAVX2-NEXT:    vpbroadcastb %xmm1, %xmm1
704; XOPAVX2-NEXT:    vpxor %xmm2, %xmm2, %xmm2
705; XOPAVX2-NEXT:    vpsubb %xmm1, %xmm2, %xmm1
706; XOPAVX2-NEXT:    vpshlb %xmm1, %xmm0, %xmm0
707; XOPAVX2-NEXT:    retq
708;
709; AVX512-LABEL: splatvar_shift_v16i8:
710; AVX512:       ## BB#0:
711; AVX512-NEXT:    vpbroadcastb %xmm1, %xmm1
712; AVX512-NEXT:    vpsllw $5, %xmm1, %xmm1
713; AVX512-NEXT:    vpsrlw $4, %xmm0, %xmm2
714; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
715; AVX512-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
716; AVX512-NEXT:    vpsrlw $2, %xmm0, %xmm2
717; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
718; AVX512-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
719; AVX512-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
720; AVX512-NEXT:    vpsrlw $1, %xmm0, %xmm2
721; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
722; AVX512-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
723; AVX512-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
724; AVX512-NEXT:    retq
725;
726; X32-SSE-LABEL: splatvar_shift_v16i8:
727; X32-SSE:       # BB#0:
728; X32-SSE-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
729; X32-SSE-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7]
730; X32-SSE-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[0,0,1,1]
731; X32-SSE-NEXT:    psllw $5, %xmm2
732; X32-SSE-NEXT:    pxor %xmm1, %xmm1
733; X32-SSE-NEXT:    pxor %xmm3, %xmm3
734; X32-SSE-NEXT:    pcmpgtb %xmm2, %xmm3
735; X32-SSE-NEXT:    movdqa %xmm3, %xmm4
736; X32-SSE-NEXT:    pandn %xmm0, %xmm4
737; X32-SSE-NEXT:    psrlw $4, %xmm0
738; X32-SSE-NEXT:    pand .LCPI7_0, %xmm0
739; X32-SSE-NEXT:    pand %xmm3, %xmm0
740; X32-SSE-NEXT:    por %xmm4, %xmm0
741; X32-SSE-NEXT:    paddb %xmm2, %xmm2
742; X32-SSE-NEXT:    pxor %xmm3, %xmm3
743; X32-SSE-NEXT:    pcmpgtb %xmm2, %xmm3
744; X32-SSE-NEXT:    movdqa %xmm3, %xmm4
745; X32-SSE-NEXT:    pandn %xmm0, %xmm4
746; X32-SSE-NEXT:    psrlw $2, %xmm0
747; X32-SSE-NEXT:    pand .LCPI7_1, %xmm0
748; X32-SSE-NEXT:    pand %xmm3, %xmm0
749; X32-SSE-NEXT:    por %xmm4, %xmm0
750; X32-SSE-NEXT:    paddb %xmm2, %xmm2
751; X32-SSE-NEXT:    pcmpgtb %xmm2, %xmm1
752; X32-SSE-NEXT:    movdqa %xmm1, %xmm2
753; X32-SSE-NEXT:    pandn %xmm0, %xmm2
754; X32-SSE-NEXT:    psrlw $1, %xmm0
755; X32-SSE-NEXT:    pand .LCPI7_2, %xmm0
756; X32-SSE-NEXT:    pand %xmm1, %xmm0
757; X32-SSE-NEXT:    por %xmm2, %xmm0
758; X32-SSE-NEXT:    retl
759  %splat = shufflevector <16 x i8> %b, <16 x i8> undef, <16 x i32> zeroinitializer
760  %shift = lshr <16 x i8> %a, %splat
761  ret <16 x i8> %shift
762}
763
764;
765; Constant Shifts
766;
767
768define <2 x i64> @constant_shift_v2i64(<2 x i64> %a) nounwind {
769; SSE2-LABEL: constant_shift_v2i64:
770; SSE2:       # BB#0:
771; SSE2-NEXT:    movdqa %xmm0, %xmm1
772; SSE2-NEXT:    psrlq $7, %xmm1
773; SSE2-NEXT:    psrlq $1, %xmm0
774; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
775; SSE2-NEXT:    movapd %xmm1, %xmm0
776; SSE2-NEXT:    retq
777;
778; SSE41-LABEL: constant_shift_v2i64:
779; SSE41:       # BB#0:
780; SSE41-NEXT:    movdqa %xmm0, %xmm1
781; SSE41-NEXT:    psrlq $7, %xmm1
782; SSE41-NEXT:    psrlq $1, %xmm0
783; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
784; SSE41-NEXT:    retq
785;
786; AVX1-LABEL: constant_shift_v2i64:
787; AVX1:       # BB#0:
788; AVX1-NEXT:    vpsrlq $7, %xmm0, %xmm1
789; AVX1-NEXT:    vpsrlq $1, %xmm0, %xmm0
790; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
791; AVX1-NEXT:    retq
792;
793; AVX2-LABEL: constant_shift_v2i64:
794; AVX2:       # BB#0:
795; AVX2-NEXT:    vpsrlvq {{.*}}(%rip), %xmm0, %xmm0
796; AVX2-NEXT:    retq
797;
798; XOPAVX1-LABEL: constant_shift_v2i64:
799; XOPAVX1:       # BB#0:
800; XOPAVX1-NEXT:    vpxor %xmm1, %xmm1, %xmm1
801; XOPAVX1-NEXT:    vpsubq {{.*}}(%rip), %xmm1, %xmm1
802; XOPAVX1-NEXT:    vpshlq %xmm1, %xmm0, %xmm0
803; XOPAVX1-NEXT:    retq
804;
805; XOPAVX2-LABEL: constant_shift_v2i64:
806; XOPAVX2:       # BB#0:
807; XOPAVX2-NEXT:    vpsrlvq {{.*}}(%rip), %xmm0, %xmm0
808; XOPAVX2-NEXT:    retq
809;
810; AVX512-LABEL: constant_shift_v2i64:
811; AVX512:       ## BB#0:
812; AVX512-NEXT:    vpsrlvq {{.*}}(%rip), %xmm0, %xmm0
813; AVX512-NEXT:    retq
814;
815; X32-SSE-LABEL: constant_shift_v2i64:
816; X32-SSE:       # BB#0:
817; X32-SSE-NEXT:    movdqa %xmm0, %xmm1
818; X32-SSE-NEXT:    psrlq $7, %xmm1
819; X32-SSE-NEXT:    psrlq $1, %xmm0
820; X32-SSE-NEXT:    movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
821; X32-SSE-NEXT:    movapd %xmm1, %xmm0
822; X32-SSE-NEXT:    retl
823  %shift = lshr <2 x i64> %a, <i64 1, i64 7>
824  ret <2 x i64> %shift
825}
826
827define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) nounwind {
828; SSE2-LABEL: constant_shift_v4i32:
829; SSE2:       # BB#0:
830; SSE2-NEXT:    movdqa %xmm0, %xmm1
831; SSE2-NEXT:    psrld $7, %xmm1
832; SSE2-NEXT:    movdqa %xmm0, %xmm2
833; SSE2-NEXT:    psrld $5, %xmm2
834; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]
835; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
836; SSE2-NEXT:    movdqa %xmm0, %xmm2
837; SSE2-NEXT:    psrld $6, %xmm2
838; SSE2-NEXT:    psrld $4, %xmm0
839; SSE2-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
840; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
841; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
842; SSE2-NEXT:    retq
843;
844; SSE41-LABEL: constant_shift_v4i32:
845; SSE41:       # BB#0:
846; SSE41-NEXT:    movdqa %xmm0, %xmm1
847; SSE41-NEXT:    psrld $7, %xmm1
848; SSE41-NEXT:    movdqa %xmm0, %xmm2
849; SSE41-NEXT:    psrld $5, %xmm2
850; SSE41-NEXT:    pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm1[4,5,6,7]
851; SSE41-NEXT:    movdqa %xmm0, %xmm1
852; SSE41-NEXT:    psrld $6, %xmm1
853; SSE41-NEXT:    psrld $4, %xmm0
854; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7]
855; SSE41-NEXT:    pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7]
856; SSE41-NEXT:    retq
857;
858; AVX1-LABEL: constant_shift_v4i32:
859; AVX1:       # BB#0:
860; AVX1-NEXT:    vpsrld $7, %xmm0, %xmm1
861; AVX1-NEXT:    vpsrld $5, %xmm0, %xmm2
862; AVX1-NEXT:    vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7]
863; AVX1-NEXT:    vpsrld $6, %xmm0, %xmm2
864; AVX1-NEXT:    vpsrld $4, %xmm0, %xmm0
865; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7]
866; AVX1-NEXT:    vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7]
867; AVX1-NEXT:    retq
868;
869; AVX2-LABEL: constant_shift_v4i32:
870; AVX2:       # BB#0:
871; AVX2-NEXT:    vpsrlvd {{.*}}(%rip), %xmm0, %xmm0
872; AVX2-NEXT:    retq
873;
874; XOPAVX1-LABEL: constant_shift_v4i32:
875; XOPAVX1:       # BB#0:
876; XOPAVX1-NEXT:    vpshld {{.*}}(%rip), %xmm0, %xmm0
877; XOPAVX1-NEXT:    retq
878;
879; XOPAVX2-LABEL: constant_shift_v4i32:
880; XOPAVX2:       # BB#0:
881; XOPAVX2-NEXT:    vpsrlvd {{.*}}(%rip), %xmm0, %xmm0
882; XOPAVX2-NEXT:    retq
883;
884; AVX512-LABEL: constant_shift_v4i32:
885; AVX512:       ## BB#0:
886; AVX512-NEXT:    vpsrlvd {{.*}}(%rip), %xmm0, %xmm0
887; AVX512-NEXT:    retq
888;
889; X32-SSE-LABEL: constant_shift_v4i32:
890; X32-SSE:       # BB#0:
891; X32-SSE-NEXT:    movdqa %xmm0, %xmm1
892; X32-SSE-NEXT:    psrld $7, %xmm1
893; X32-SSE-NEXT:    movdqa %xmm0, %xmm2
894; X32-SSE-NEXT:    psrld $5, %xmm2
895; X32-SSE-NEXT:    movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1]
896; X32-SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
897; X32-SSE-NEXT:    movdqa %xmm0, %xmm2
898; X32-SSE-NEXT:    psrld $6, %xmm2
899; X32-SSE-NEXT:    psrld $4, %xmm0
900; X32-SSE-NEXT:    movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1]
901; X32-SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3]
902; X32-SSE-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
903; X32-SSE-NEXT:    retl
904  %shift = lshr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
905  ret <4 x i32> %shift
906}
907
908define <8 x i16> @constant_shift_v8i16(<8 x i16> %a) nounwind {
909; SSE2-LABEL: constant_shift_v8i16:
910; SSE2:       # BB#0:
911; SSE2-NEXT:    movdqa %xmm0, %xmm1
912; SSE2-NEXT:    psrlw $4, %xmm1
913; SSE2-NEXT:    movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
914; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]
915; SSE2-NEXT:    psrlw $2, %xmm1
916; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,3,2,3]
917; SSE2-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
918; SSE2-NEXT:    movdqa {{.*#+}} xmm0 = [65535,0,65535,0,65535,0,65535,0]
919; SSE2-NEXT:    movdqa %xmm2, %xmm1
920; SSE2-NEXT:    pand %xmm0, %xmm1
921; SSE2-NEXT:    psrlw $1, %xmm2
922; SSE2-NEXT:    pandn %xmm2, %xmm0
923; SSE2-NEXT:    por %xmm1, %xmm0
924; SSE2-NEXT:    retq
925;
926; SSE41-LABEL: constant_shift_v8i16:
927; SSE41:       # BB#0:
928; SSE41-NEXT:    movdqa %xmm0, %xmm1
929; SSE41-NEXT:    movdqa %xmm1, %xmm2
930; SSE41-NEXT:    psrlw $8, %xmm2
931; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [0,4112,8224,12336,16448,20560,24672,28784]
932; SSE41-NEXT:    pblendvb %xmm2, %xmm1
933; SSE41-NEXT:    movdqa %xmm1, %xmm2
934; SSE41-NEXT:    psrlw $4, %xmm2
935; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [0,8224,16448,24672,32896,41120,49344,57568]
936; SSE41-NEXT:    pblendvb %xmm2, %xmm1
937; SSE41-NEXT:    movdqa %xmm1, %xmm2
938; SSE41-NEXT:    psrlw $2, %xmm2
939; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [0,16448,32896,49344,256,16704,33152,49600]
940; SSE41-NEXT:    pblendvb %xmm2, %xmm1
941; SSE41-NEXT:    movdqa %xmm1, %xmm2
942; SSE41-NEXT:    psrlw $1, %xmm2
943; SSE41-NEXT:    movaps {{.*#+}} xmm0 = [0,32896,256,33152,512,33408,768,33664]
944; SSE41-NEXT:    pblendvb %xmm2, %xmm1
945; SSE41-NEXT:    movdqa %xmm1, %xmm0
946; SSE41-NEXT:    retq
947;
948; AVX1-LABEL: constant_shift_v8i16:
949; AVX1:       # BB#0:
950; AVX1-NEXT:    vpsrlw $8, %xmm0, %xmm1
951; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,4112,8224,12336,16448,20560,24672,28784]
952; AVX1-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
953; AVX1-NEXT:    vpsrlw $4, %xmm0, %xmm1
954; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,8224,16448,24672,32896,41120,49344,57568]
955; AVX1-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
956; AVX1-NEXT:    vpsrlw $2, %xmm0, %xmm1
957; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,16448,32896,49344,256,16704,33152,49600]
958; AVX1-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
959; AVX1-NEXT:    vpsrlw $1, %xmm0, %xmm1
960; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [0,32896,256,33152,512,33408,768,33664]
961; AVX1-NEXT:    vpblendvb %xmm2, %xmm1, %xmm0, %xmm0
962; AVX1-NEXT:    retq
963;
964; AVX2-LABEL: constant_shift_v8i16:
965; AVX2:       # BB#0:
966; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero
967; AVX2-NEXT:    vpmovzxwd {{.*#+}} ymm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero
968; AVX2-NEXT:    vpsrlvd %ymm1, %ymm0, %ymm0
969; AVX2-NEXT:    vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero
970; AVX2-NEXT:    vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3]
971; AVX2-NEXT:    vzeroupper
972; AVX2-NEXT:    retq
973;
974; XOP-LABEL: constant_shift_v8i16:
975; XOP:       # BB#0:
976; XOP-NEXT:    vpxor %xmm1, %xmm1, %xmm1
977; XOP-NEXT:    vpsubw {{.*}}(%rip), %xmm1, %xmm1
978; XOP-NEXT:    vpshlw %xmm1, %xmm0, %xmm0
979; XOP-NEXT:    retq
980;
981; AVX512-LABEL: constant_shift_v8i16:
982; AVX512:       ## BB#0:
983; AVX512-NEXT:    vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7]
984; AVX512-NEXT:    vpsrlvw %zmm1, %zmm0, %zmm0
985; AVX512-NEXT:    retq
986;
987; X32-SSE-LABEL: constant_shift_v8i16:
988; X32-SSE:       # BB#0:
989; X32-SSE-NEXT:    movdqa %xmm0, %xmm1
990; X32-SSE-NEXT:    psrlw $4, %xmm1
991; X32-SSE-NEXT:    movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1]
992; X32-SSE-NEXT:    pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3]
993; X32-SSE-NEXT:    psrlw $2, %xmm1
994; X32-SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,3,2,3]
995; X32-SSE-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
996; X32-SSE-NEXT:    movdqa {{.*#+}} xmm0 = [65535,0,65535,0,65535,0,65535,0]
997; X32-SSE-NEXT:    movdqa %xmm2, %xmm1
998; X32-SSE-NEXT:    pand %xmm0, %xmm1
999; X32-SSE-NEXT:    psrlw $1, %xmm2
1000; X32-SSE-NEXT:    pandn %xmm2, %xmm0
1001; X32-SSE-NEXT:    por %xmm1, %xmm0
1002; X32-SSE-NEXT:    retl
1003  %shift = lshr <8 x i16> %a, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7>
1004  ret <8 x i16> %shift
1005}
1006
1007define <16 x i8> @constant_shift_v16i8(<16 x i8> %a) nounwind {
1008; SSE2-LABEL: constant_shift_v16i8:
1009; SSE2:       # BB#0:
1010; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0]
1011; SSE2-NEXT:    psllw $5, %xmm2
1012; SSE2-NEXT:    pxor %xmm1, %xmm1
1013; SSE2-NEXT:    pxor %xmm3, %xmm3
1014; SSE2-NEXT:    pcmpgtb %xmm2, %xmm3
1015; SSE2-NEXT:    movdqa %xmm3, %xmm4
1016; SSE2-NEXT:    pandn %xmm0, %xmm4
1017; SSE2-NEXT:    psrlw $4, %xmm0
1018; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
1019; SSE2-NEXT:    pand %xmm3, %xmm0
1020; SSE2-NEXT:    por %xmm4, %xmm0
1021; SSE2-NEXT:    paddb %xmm2, %xmm2
1022; SSE2-NEXT:    pxor %xmm3, %xmm3
1023; SSE2-NEXT:    pcmpgtb %xmm2, %xmm3
1024; SSE2-NEXT:    movdqa %xmm3, %xmm4
1025; SSE2-NEXT:    pandn %xmm0, %xmm4
1026; SSE2-NEXT:    psrlw $2, %xmm0
1027; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
1028; SSE2-NEXT:    pand %xmm3, %xmm0
1029; SSE2-NEXT:    por %xmm4, %xmm0
1030; SSE2-NEXT:    paddb %xmm2, %xmm2
1031; SSE2-NEXT:    pcmpgtb %xmm2, %xmm1
1032; SSE2-NEXT:    movdqa %xmm1, %xmm2
1033; SSE2-NEXT:    pandn %xmm0, %xmm2
1034; SSE2-NEXT:    psrlw $1, %xmm0
1035; SSE2-NEXT:    pand {{.*}}(%rip), %xmm0
1036; SSE2-NEXT:    pand %xmm1, %xmm0
1037; SSE2-NEXT:    por %xmm2, %xmm0
1038; SSE2-NEXT:    retq
1039;
1040; SSE41-LABEL: constant_shift_v16i8:
1041; SSE41:       # BB#0:
1042; SSE41-NEXT:    movdqa %xmm0, %xmm1
1043; SSE41-NEXT:    movdqa {{.*#+}} xmm0 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0]
1044; SSE41-NEXT:    psllw $5, %xmm0
1045; SSE41-NEXT:    movdqa %xmm1, %xmm2
1046; SSE41-NEXT:    psrlw $4, %xmm2
1047; SSE41-NEXT:    pand {{.*}}(%rip), %xmm2
1048; SSE41-NEXT:    pblendvb %xmm2, %xmm1
1049; SSE41-NEXT:    movdqa %xmm1, %xmm2
1050; SSE41-NEXT:    psrlw $2, %xmm2
1051; SSE41-NEXT:    pand {{.*}}(%rip), %xmm2
1052; SSE41-NEXT:    paddb %xmm0, %xmm0
1053; SSE41-NEXT:    pblendvb %xmm2, %xmm1
1054; SSE41-NEXT:    movdqa %xmm1, %xmm2
1055; SSE41-NEXT:    psrlw $1, %xmm2
1056; SSE41-NEXT:    pand {{.*}}(%rip), %xmm2
1057; SSE41-NEXT:    paddb %xmm0, %xmm0
1058; SSE41-NEXT:    pblendvb %xmm2, %xmm1
1059; SSE41-NEXT:    movdqa %xmm1, %xmm0
1060; SSE41-NEXT:    retq
1061;
1062; AVX-LABEL: constant_shift_v16i8:
1063; AVX:       # BB#0:
1064; AVX-NEXT:    vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0]
1065; AVX-NEXT:    vpsllw $5, %xmm1, %xmm1
1066; AVX-NEXT:    vpsrlw $4, %xmm0, %xmm2
1067; AVX-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
1068; AVX-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
1069; AVX-NEXT:    vpsrlw $2, %xmm0, %xmm2
1070; AVX-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
1071; AVX-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
1072; AVX-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
1073; AVX-NEXT:    vpsrlw $1, %xmm0, %xmm2
1074; AVX-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
1075; AVX-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
1076; AVX-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
1077; AVX-NEXT:    retq
1078;
1079; XOP-LABEL: constant_shift_v16i8:
1080; XOP:       # BB#0:
1081; XOP-NEXT:    vpxor %xmm1, %xmm1, %xmm1
1082; XOP-NEXT:    vpsubb {{.*}}(%rip), %xmm1, %xmm1
1083; XOP-NEXT:    vpshlb %xmm1, %xmm0, %xmm0
1084; XOP-NEXT:    retq
1085;
1086; AVX512-LABEL: constant_shift_v16i8:
1087; AVX512:       ## BB#0:
1088; AVX512-NEXT:    vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0]
1089; AVX512-NEXT:    vpsllw $5, %xmm1, %xmm1
1090; AVX512-NEXT:    vpsrlw $4, %xmm0, %xmm2
1091; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
1092; AVX512-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
1093; AVX512-NEXT:    vpsrlw $2, %xmm0, %xmm2
1094; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
1095; AVX512-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
1096; AVX512-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
1097; AVX512-NEXT:    vpsrlw $1, %xmm0, %xmm2
1098; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm2, %xmm2
1099; AVX512-NEXT:    vpaddb %xmm1, %xmm1, %xmm1
1100; AVX512-NEXT:    vpblendvb %xmm1, %xmm2, %xmm0, %xmm0
1101; AVX512-NEXT:    retq
1102;
1103; X32-SSE-LABEL: constant_shift_v16i8:
1104; X32-SSE:       # BB#0:
1105; X32-SSE-NEXT:    movdqa {{.*#+}} xmm2 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0]
1106; X32-SSE-NEXT:    psllw $5, %xmm2
1107; X32-SSE-NEXT:    pxor %xmm1, %xmm1
1108; X32-SSE-NEXT:    pxor %xmm3, %xmm3
1109; X32-SSE-NEXT:    pcmpgtb %xmm2, %xmm3
1110; X32-SSE-NEXT:    movdqa %xmm3, %xmm4
1111; X32-SSE-NEXT:    pandn %xmm0, %xmm4
1112; X32-SSE-NEXT:    psrlw $4, %xmm0
1113; X32-SSE-NEXT:    pand .LCPI11_1, %xmm0
1114; X32-SSE-NEXT:    pand %xmm3, %xmm0
1115; X32-SSE-NEXT:    por %xmm4, %xmm0
1116; X32-SSE-NEXT:    paddb %xmm2, %xmm2
1117; X32-SSE-NEXT:    pxor %xmm3, %xmm3
1118; X32-SSE-NEXT:    pcmpgtb %xmm2, %xmm3
1119; X32-SSE-NEXT:    movdqa %xmm3, %xmm4
1120; X32-SSE-NEXT:    pandn %xmm0, %xmm4
1121; X32-SSE-NEXT:    psrlw $2, %xmm0
1122; X32-SSE-NEXT:    pand .LCPI11_2, %xmm0
1123; X32-SSE-NEXT:    pand %xmm3, %xmm0
1124; X32-SSE-NEXT:    por %xmm4, %xmm0
1125; X32-SSE-NEXT:    paddb %xmm2, %xmm2
1126; X32-SSE-NEXT:    pcmpgtb %xmm2, %xmm1
1127; X32-SSE-NEXT:    movdqa %xmm1, %xmm2
1128; X32-SSE-NEXT:    pandn %xmm0, %xmm2
1129; X32-SSE-NEXT:    psrlw $1, %xmm0
1130; X32-SSE-NEXT:    pand .LCPI11_3, %xmm0
1131; X32-SSE-NEXT:    pand %xmm1, %xmm0
1132; X32-SSE-NEXT:    por %xmm2, %xmm0
1133; X32-SSE-NEXT:    retl
1134  %shift = lshr <16 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>
1135  ret <16 x i8> %shift
1136}
1137
1138;
1139; Uniform Constant Shifts
1140;
1141
1142define <2 x i64> @splatconstant_shift_v2i64(<2 x i64> %a) nounwind {
1143; SSE-LABEL: splatconstant_shift_v2i64:
1144; SSE:       # BB#0:
1145; SSE-NEXT:    psrlq $7, %xmm0
1146; SSE-NEXT:    retq
1147;
1148; AVX-LABEL: splatconstant_shift_v2i64:
1149; AVX:       # BB#0:
1150; AVX-NEXT:    vpsrlq $7, %xmm0, %xmm0
1151; AVX-NEXT:    retq
1152;
1153; XOP-LABEL: splatconstant_shift_v2i64:
1154; XOP:       # BB#0:
1155; XOP-NEXT:    vpsrlq $7, %xmm0, %xmm0
1156; XOP-NEXT:    retq
1157;
1158; AVX512-LABEL: splatconstant_shift_v2i64:
1159; AVX512:       ## BB#0:
1160; AVX512-NEXT:    vpsrlq $7, %xmm0, %xmm0
1161; AVX512-NEXT:    retq
1162;
1163; X32-SSE-LABEL: splatconstant_shift_v2i64:
1164; X32-SSE:       # BB#0:
1165; X32-SSE-NEXT:    psrlq $7, %xmm0
1166; X32-SSE-NEXT:    retl
1167  %shift = lshr <2 x i64> %a, <i64 7, i64 7>
1168  ret <2 x i64> %shift
1169}
1170
1171define <4 x i32> @splatconstant_shift_v4i32(<4 x i32> %a) nounwind {
1172; SSE-LABEL: splatconstant_shift_v4i32:
1173; SSE:       # BB#0:
1174; SSE-NEXT:    psrld $5, %xmm0
1175; SSE-NEXT:    retq
1176;
1177; AVX-LABEL: splatconstant_shift_v4i32:
1178; AVX:       # BB#0:
1179; AVX-NEXT:    vpsrld $5, %xmm0, %xmm0
1180; AVX-NEXT:    retq
1181;
1182; XOP-LABEL: splatconstant_shift_v4i32:
1183; XOP:       # BB#0:
1184; XOP-NEXT:    vpsrld $5, %xmm0, %xmm0
1185; XOP-NEXT:    retq
1186;
1187; AVX512-LABEL: splatconstant_shift_v4i32:
1188; AVX512:       ## BB#0:
1189; AVX512-NEXT:    vpsrld $5, %xmm0, %xmm0
1190; AVX512-NEXT:    retq
1191;
1192; X32-SSE-LABEL: splatconstant_shift_v4i32:
1193; X32-SSE:       # BB#0:
1194; X32-SSE-NEXT:    psrld $5, %xmm0
1195; X32-SSE-NEXT:    retl
1196  %shift = lshr <4 x i32> %a, <i32 5, i32 5, i32 5, i32 5>
1197  ret <4 x i32> %shift
1198}
1199
1200define <8 x i16> @splatconstant_shift_v8i16(<8 x i16> %a) nounwind {
1201; SSE-LABEL: splatconstant_shift_v8i16:
1202; SSE:       # BB#0:
1203; SSE-NEXT:    psrlw $3, %xmm0
1204; SSE-NEXT:    retq
1205;
1206; AVX-LABEL: splatconstant_shift_v8i16:
1207; AVX:       # BB#0:
1208; AVX-NEXT:    vpsrlw $3, %xmm0, %xmm0
1209; AVX-NEXT:    retq
1210;
1211; XOP-LABEL: splatconstant_shift_v8i16:
1212; XOP:       # BB#0:
1213; XOP-NEXT:    vpsrlw $3, %xmm0, %xmm0
1214; XOP-NEXT:    retq
1215;
1216; AVX512-LABEL: splatconstant_shift_v8i16:
1217; AVX512:       ## BB#0:
1218; AVX512-NEXT:    vpsrlw $3, %xmm0, %xmm0
1219; AVX512-NEXT:    retq
1220;
1221; X32-SSE-LABEL: splatconstant_shift_v8i16:
1222; X32-SSE:       # BB#0:
1223; X32-SSE-NEXT:    psrlw $3, %xmm0
1224; X32-SSE-NEXT:    retl
1225  %shift = lshr <8 x i16> %a, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
1226  ret <8 x i16> %shift
1227}
1228
1229define <16 x i8> @splatconstant_shift_v16i8(<16 x i8> %a) nounwind {
1230; SSE-LABEL: splatconstant_shift_v16i8:
1231; SSE:       # BB#0:
1232; SSE-NEXT:    psrlw $3, %xmm0
1233; SSE-NEXT:    pand {{.*}}(%rip), %xmm0
1234; SSE-NEXT:    retq
1235;
1236; AVX-LABEL: splatconstant_shift_v16i8:
1237; AVX:       # BB#0:
1238; AVX-NEXT:    vpsrlw $3, %xmm0, %xmm0
1239; AVX-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
1240; AVX-NEXT:    retq
1241;
1242; XOP-LABEL: splatconstant_shift_v16i8:
1243; XOP:       # BB#0:
1244; XOP-NEXT:    vpxor %xmm1, %xmm1, %xmm1
1245; XOP-NEXT:    vpsubb {{.*}}(%rip), %xmm1, %xmm1
1246; XOP-NEXT:    vpshlb %xmm1, %xmm0, %xmm0
1247; XOP-NEXT:    retq
1248;
1249; AVX512-LABEL: splatconstant_shift_v16i8:
1250; AVX512:       ## BB#0:
1251; AVX512-NEXT:    vpsrlw $3, %xmm0, %xmm0
1252; AVX512-NEXT:    vpand {{.*}}(%rip), %xmm0, %xmm0
1253; AVX512-NEXT:    retq
1254;
1255; X32-SSE-LABEL: splatconstant_shift_v16i8:
1256; X32-SSE:       # BB#0:
1257; X32-SSE-NEXT:    psrlw $3, %xmm0
1258; X32-SSE-NEXT:    pand .LCPI15_0, %xmm0
1259; X32-SSE-NEXT:    retl
1260  %shift = lshr <16 x i8> %a, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3>
1261  ret <16 x i8> %shift
1262}
1263