1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2 8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512DQ 9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW 10; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512VL --check-prefix=AVX512DQVL 11; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl -mattr=+avx512bw,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512VL --check-prefix=AVX512BWVL 12; 13; Just one 32-bit run to make sure we do reasonable things for i64 shifts. 14; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2 15 16; 17; Variable Shifts 18; 19 20define <2 x i64> @var_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind { 21; SSE2-LABEL: var_shift_v2i64: 22; SSE2: # BB#0: 23; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] 24; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 25; SSE2-NEXT: movdqa %xmm2, %xmm4 26; SSE2-NEXT: psrlq %xmm3, %xmm4 27; SSE2-NEXT: psrlq %xmm1, %xmm2 28; SSE2-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] 29; SSE2-NEXT: movdqa %xmm0, %xmm2 30; SSE2-NEXT: psrlq %xmm3, %xmm2 31; SSE2-NEXT: psrlq %xmm1, %xmm0 32; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 33; SSE2-NEXT: xorpd %xmm4, %xmm2 34; SSE2-NEXT: psubq %xmm4, %xmm2 35; SSE2-NEXT: movdqa %xmm2, %xmm0 36; SSE2-NEXT: retq 37; 38; SSE41-LABEL: var_shift_v2i64: 39; SSE41: # BB#0: 40; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 41; SSE41-NEXT: movdqa %xmm2, %xmm3 42; SSE41-NEXT: psrlq %xmm1, %xmm3 43; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm1[2,3,0,1] 44; SSE41-NEXT: psrlq %xmm4, %xmm2 45; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7] 46; SSE41-NEXT: movdqa %xmm0, %xmm3 47; SSE41-NEXT: psrlq %xmm1, %xmm3 48; SSE41-NEXT: psrlq %xmm4, %xmm0 49; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm3[0,1,2,3],xmm0[4,5,6,7] 50; SSE41-NEXT: pxor %xmm2, %xmm0 51; SSE41-NEXT: psubq %xmm2, %xmm0 52; SSE41-NEXT: retq 53; 54; AVX1-LABEL: var_shift_v2i64: 55; AVX1: # BB#0: 56; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 57; AVX1-NEXT: vpsrlq %xmm1, %xmm2, %xmm3 58; AVX1-NEXT: vpshufd {{.*#+}} xmm4 = xmm1[2,3,0,1] 59; AVX1-NEXT: vpsrlq %xmm4, %xmm2, %xmm2 60; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7] 61; AVX1-NEXT: vpsrlq %xmm1, %xmm0, %xmm1 62; AVX1-NEXT: vpsrlq %xmm4, %xmm0, %xmm0 63; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm1[0,1,2,3],xmm0[4,5,6,7] 64; AVX1-NEXT: vpxor %xmm2, %xmm0, %xmm0 65; AVX1-NEXT: vpsubq %xmm2, %xmm0, %xmm0 66; AVX1-NEXT: retq 67; 68; AVX2-LABEL: var_shift_v2i64: 69; AVX2: # BB#0: 70; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 71; AVX2-NEXT: vpsrlvq %xmm1, %xmm2, %xmm3 72; AVX2-NEXT: vpxor %xmm2, %xmm0, %xmm0 73; AVX2-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 74; AVX2-NEXT: vpsubq %xmm3, %xmm0, %xmm0 75; AVX2-NEXT: retq 76; 77; XOP-LABEL: var_shift_v2i64: 78; XOP: # BB#0: 79; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2 80; XOP-NEXT: vpsubq %xmm1, %xmm2, %xmm1 81; XOP-NEXT: vpshaq %xmm1, %xmm0, %xmm0 82; XOP-NEXT: retq 83; 84; AVX512-LABEL: var_shift_v2i64: 85; AVX512: # BB#0: 86; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 87; AVX512-NEXT: vpsrlvq %xmm1, %xmm2, %xmm3 88; AVX512-NEXT: vpxor %xmm2, %xmm0, %xmm0 89; AVX512-NEXT: vpsrlvq %xmm1, %xmm0, %xmm0 90; AVX512-NEXT: vpsubq %xmm3, %xmm0, %xmm0 91; AVX512-NEXT: retq 92; 93; AVX512VL-LABEL: var_shift_v2i64: 94; AVX512VL: # BB#0: 95; AVX512VL-NEXT: vpsravq %xmm1, %xmm0, %xmm0 96; AVX512VL-NEXT: retq 97; 98; X32-SSE-LABEL: var_shift_v2i64: 99; X32-SSE: # BB#0: 100; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] 101; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,2147483648,0,2147483648] 102; X32-SSE-NEXT: movdqa %xmm2, %xmm4 103; X32-SSE-NEXT: psrlq %xmm3, %xmm4 104; X32-SSE-NEXT: psrlq %xmm1, %xmm2 105; X32-SSE-NEXT: movsd {{.*#+}} xmm4 = xmm2[0],xmm4[1] 106; X32-SSE-NEXT: movdqa %xmm0, %xmm2 107; X32-SSE-NEXT: psrlq %xmm3, %xmm2 108; X32-SSE-NEXT: psrlq %xmm1, %xmm0 109; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 110; X32-SSE-NEXT: xorpd %xmm4, %xmm2 111; X32-SSE-NEXT: psubq %xmm4, %xmm2 112; X32-SSE-NEXT: movdqa %xmm2, %xmm0 113; X32-SSE-NEXT: retl 114 %shift = ashr <2 x i64> %a, %b 115 ret <2 x i64> %shift 116} 117 118define <4 x i32> @var_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind { 119; SSE2-LABEL: var_shift_v4i32: 120; SSE2: # BB#0: 121; SSE2-NEXT: movdqa %xmm1, %xmm2 122; SSE2-NEXT: psrldq {{.*#+}} xmm2 = xmm2[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero 123; SSE2-NEXT: movdqa %xmm0, %xmm3 124; SSE2-NEXT: psrad %xmm2, %xmm3 125; SSE2-NEXT: movdqa %xmm1, %xmm2 126; SSE2-NEXT: psrlq $32, %xmm2 127; SSE2-NEXT: movdqa %xmm0, %xmm4 128; SSE2-NEXT: psrad %xmm2, %xmm4 129; SSE2-NEXT: movsd {{.*#+}} xmm3 = xmm4[0],xmm3[1] 130; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,3,2,3] 131; SSE2-NEXT: pxor %xmm3, %xmm3 132; SSE2-NEXT: movdqa %xmm1, %xmm4 133; SSE2-NEXT: punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm3[2],xmm4[3],xmm3[3] 134; SSE2-NEXT: movdqa %xmm0, %xmm5 135; SSE2-NEXT: psrad %xmm4, %xmm5 136; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 137; SSE2-NEXT: psrad %xmm1, %xmm0 138; SSE2-NEXT: movsd {{.*#+}} xmm5 = xmm0[0],xmm5[1] 139; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,2,2,3] 140; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 141; SSE2-NEXT: retq 142; 143; SSE41-LABEL: var_shift_v4i32: 144; SSE41: # BB#0: 145; SSE41-NEXT: movdqa %xmm1, %xmm2 146; SSE41-NEXT: psrldq {{.*#+}} xmm2 = xmm2[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero 147; SSE41-NEXT: movdqa %xmm0, %xmm3 148; SSE41-NEXT: psrad %xmm2, %xmm3 149; SSE41-NEXT: movdqa %xmm1, %xmm2 150; SSE41-NEXT: psrlq $32, %xmm2 151; SSE41-NEXT: movdqa %xmm0, %xmm4 152; SSE41-NEXT: psrad %xmm2, %xmm4 153; SSE41-NEXT: pblendw {{.*#+}} xmm4 = xmm4[0,1,2,3],xmm3[4,5,6,7] 154; SSE41-NEXT: pxor %xmm2, %xmm2 155; SSE41-NEXT: pmovzxdq {{.*#+}} xmm3 = xmm1[0],zero,xmm1[1],zero 156; SSE41-NEXT: punpckhdq {{.*#+}} xmm1 = xmm1[2],xmm2[2],xmm1[3],xmm2[3] 157; SSE41-NEXT: movdqa %xmm0, %xmm2 158; SSE41-NEXT: psrad %xmm1, %xmm2 159; SSE41-NEXT: psrad %xmm3, %xmm0 160; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7] 161; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm4[2,3],xmm0[4,5],xmm4[6,7] 162; SSE41-NEXT: retq 163; 164; AVX1-LABEL: var_shift_v4i32: 165; AVX1: # BB#0: 166; AVX1-NEXT: vpsrldq {{.*#+}} xmm2 = xmm1[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero 167; AVX1-NEXT: vpsrad %xmm2, %xmm0, %xmm2 168; AVX1-NEXT: vpsrlq $32, %xmm1, %xmm3 169; AVX1-NEXT: vpsrad %xmm3, %xmm0, %xmm3 170; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm3[0,1,2,3],xmm2[4,5,6,7] 171; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 172; AVX1-NEXT: vpunpckhdq {{.*#+}} xmm3 = xmm1[2],xmm3[2],xmm1[3],xmm3[3] 173; AVX1-NEXT: vpsrad %xmm3, %xmm0, %xmm3 174; AVX1-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero 175; AVX1-NEXT: vpsrad %xmm1, %xmm0, %xmm0 176; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm3[4,5,6,7] 177; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7] 178; AVX1-NEXT: retq 179; 180; AVX2-LABEL: var_shift_v4i32: 181; AVX2: # BB#0: 182; AVX2-NEXT: vpsravd %xmm1, %xmm0, %xmm0 183; AVX2-NEXT: retq 184; 185; XOPAVX1-LABEL: var_shift_v4i32: 186; XOPAVX1: # BB#0: 187; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 188; XOPAVX1-NEXT: vpsubd %xmm1, %xmm2, %xmm1 189; XOPAVX1-NEXT: vpshad %xmm1, %xmm0, %xmm0 190; XOPAVX1-NEXT: retq 191; 192; XOPAVX2-LABEL: var_shift_v4i32: 193; XOPAVX2: # BB#0: 194; XOPAVX2-NEXT: vpsravd %xmm1, %xmm0, %xmm0 195; XOPAVX2-NEXT: retq 196; 197; AVX512-LABEL: var_shift_v4i32: 198; AVX512: # BB#0: 199; AVX512-NEXT: vpsravd %xmm1, %xmm0, %xmm0 200; AVX512-NEXT: retq 201; 202; AVX512VL-LABEL: var_shift_v4i32: 203; AVX512VL: # BB#0: 204; AVX512VL-NEXT: vpsravd %xmm1, %xmm0, %xmm0 205; AVX512VL-NEXT: retq 206; 207; X32-SSE-LABEL: var_shift_v4i32: 208; X32-SSE: # BB#0: 209; X32-SSE-NEXT: movdqa %xmm1, %xmm2 210; X32-SSE-NEXT: psrldq {{.*#+}} xmm2 = xmm2[12,13,14,15],zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero 211; X32-SSE-NEXT: movdqa %xmm0, %xmm3 212; X32-SSE-NEXT: psrad %xmm2, %xmm3 213; X32-SSE-NEXT: movdqa %xmm1, %xmm2 214; X32-SSE-NEXT: psrlq $32, %xmm2 215; X32-SSE-NEXT: movdqa %xmm0, %xmm4 216; X32-SSE-NEXT: psrad %xmm2, %xmm4 217; X32-SSE-NEXT: movsd {{.*#+}} xmm3 = xmm4[0],xmm3[1] 218; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[1,3,2,3] 219; X32-SSE-NEXT: pxor %xmm3, %xmm3 220; X32-SSE-NEXT: movdqa %xmm1, %xmm4 221; X32-SSE-NEXT: punpckhdq {{.*#+}} xmm4 = xmm4[2],xmm3[2],xmm4[3],xmm3[3] 222; X32-SSE-NEXT: movdqa %xmm0, %xmm5 223; X32-SSE-NEXT: psrad %xmm4, %xmm5 224; X32-SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 225; X32-SSE-NEXT: psrad %xmm1, %xmm0 226; X32-SSE-NEXT: movsd {{.*#+}} xmm5 = xmm0[0],xmm5[1] 227; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm5[0,2,2,3] 228; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 229; X32-SSE-NEXT: retl 230 %shift = ashr <4 x i32> %a, %b 231 ret <4 x i32> %shift 232} 233 234define <8 x i16> @var_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind { 235; SSE2-LABEL: var_shift_v8i16: 236; SSE2: # BB#0: 237; SSE2-NEXT: psllw $12, %xmm1 238; SSE2-NEXT: movdqa %xmm1, %xmm2 239; SSE2-NEXT: psraw $15, %xmm2 240; SSE2-NEXT: movdqa %xmm2, %xmm3 241; SSE2-NEXT: pandn %xmm0, %xmm3 242; SSE2-NEXT: psraw $8, %xmm0 243; SSE2-NEXT: pand %xmm2, %xmm0 244; SSE2-NEXT: por %xmm3, %xmm0 245; SSE2-NEXT: paddw %xmm1, %xmm1 246; SSE2-NEXT: movdqa %xmm1, %xmm2 247; SSE2-NEXT: psraw $15, %xmm2 248; SSE2-NEXT: movdqa %xmm2, %xmm3 249; SSE2-NEXT: pandn %xmm0, %xmm3 250; SSE2-NEXT: psraw $4, %xmm0 251; SSE2-NEXT: pand %xmm2, %xmm0 252; SSE2-NEXT: por %xmm3, %xmm0 253; SSE2-NEXT: paddw %xmm1, %xmm1 254; SSE2-NEXT: movdqa %xmm1, %xmm2 255; SSE2-NEXT: psraw $15, %xmm2 256; SSE2-NEXT: movdqa %xmm2, %xmm3 257; SSE2-NEXT: pandn %xmm0, %xmm3 258; SSE2-NEXT: psraw $2, %xmm0 259; SSE2-NEXT: pand %xmm2, %xmm0 260; SSE2-NEXT: por %xmm3, %xmm0 261; SSE2-NEXT: paddw %xmm1, %xmm1 262; SSE2-NEXT: psraw $15, %xmm1 263; SSE2-NEXT: movdqa %xmm1, %xmm2 264; SSE2-NEXT: pandn %xmm0, %xmm2 265; SSE2-NEXT: psraw $1, %xmm0 266; SSE2-NEXT: pand %xmm1, %xmm0 267; SSE2-NEXT: por %xmm2, %xmm0 268; SSE2-NEXT: retq 269; 270; SSE41-LABEL: var_shift_v8i16: 271; SSE41: # BB#0: 272; SSE41-NEXT: movdqa %xmm0, %xmm2 273; SSE41-NEXT: movdqa %xmm1, %xmm0 274; SSE41-NEXT: psllw $12, %xmm0 275; SSE41-NEXT: psllw $4, %xmm1 276; SSE41-NEXT: por %xmm0, %xmm1 277; SSE41-NEXT: movdqa %xmm1, %xmm3 278; SSE41-NEXT: paddw %xmm3, %xmm3 279; SSE41-NEXT: movdqa %xmm2, %xmm4 280; SSE41-NEXT: psraw $8, %xmm4 281; SSE41-NEXT: movdqa %xmm1, %xmm0 282; SSE41-NEXT: pblendvb %xmm4, %xmm2 283; SSE41-NEXT: movdqa %xmm2, %xmm1 284; SSE41-NEXT: psraw $4, %xmm1 285; SSE41-NEXT: movdqa %xmm3, %xmm0 286; SSE41-NEXT: pblendvb %xmm1, %xmm2 287; SSE41-NEXT: movdqa %xmm2, %xmm1 288; SSE41-NEXT: psraw $2, %xmm1 289; SSE41-NEXT: paddw %xmm3, %xmm3 290; SSE41-NEXT: movdqa %xmm3, %xmm0 291; SSE41-NEXT: pblendvb %xmm1, %xmm2 292; SSE41-NEXT: movdqa %xmm2, %xmm1 293; SSE41-NEXT: psraw $1, %xmm1 294; SSE41-NEXT: paddw %xmm3, %xmm3 295; SSE41-NEXT: movdqa %xmm3, %xmm0 296; SSE41-NEXT: pblendvb %xmm1, %xmm2 297; SSE41-NEXT: movdqa %xmm2, %xmm0 298; SSE41-NEXT: retq 299; 300; AVX1-LABEL: var_shift_v8i16: 301; AVX1: # BB#0: 302; AVX1-NEXT: vpsllw $12, %xmm1, %xmm2 303; AVX1-NEXT: vpsllw $4, %xmm1, %xmm1 304; AVX1-NEXT: vpor %xmm2, %xmm1, %xmm1 305; AVX1-NEXT: vpaddw %xmm1, %xmm1, %xmm2 306; AVX1-NEXT: vpsraw $8, %xmm0, %xmm3 307; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 308; AVX1-NEXT: vpsraw $4, %xmm0, %xmm1 309; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 310; AVX1-NEXT: vpsraw $2, %xmm0, %xmm1 311; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm2 312; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 313; AVX1-NEXT: vpsraw $1, %xmm0, %xmm1 314; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm2 315; AVX1-NEXT: vpblendvb %xmm2, %xmm1, %xmm0, %xmm0 316; AVX1-NEXT: retq 317; 318; AVX2-LABEL: var_shift_v8i16: 319; AVX2: # BB#0: 320; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 321; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 322; AVX2-NEXT: vpsravd %ymm1, %ymm0, %ymm0 323; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 324; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 325; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 326; AVX2-NEXT: vzeroupper 327; AVX2-NEXT: retq 328; 329; XOP-LABEL: var_shift_v8i16: 330; XOP: # BB#0: 331; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2 332; XOP-NEXT: vpsubw %xmm1, %xmm2, %xmm1 333; XOP-NEXT: vpshaw %xmm1, %xmm0, %xmm0 334; XOP-NEXT: retq 335; 336; AVX512DQ-LABEL: var_shift_v8i16: 337; AVX512DQ: # BB#0: 338; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 339; AVX512DQ-NEXT: vpmovsxwd %xmm0, %ymm0 340; AVX512DQ-NEXT: vpsravd %ymm1, %ymm0, %ymm0 341; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0 342; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 343; AVX512DQ-NEXT: retq 344; 345; AVX512BW-LABEL: var_shift_v8i16: 346; AVX512BW: # BB#0: 347; AVX512BW-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def> 348; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 349; AVX512BW-NEXT: vpsravw %zmm1, %zmm0, %zmm0 350; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 351; AVX512BW-NEXT: retq 352; 353; AVX512DQVL-LABEL: var_shift_v8i16: 354; AVX512DQVL: # BB#0: 355; AVX512DQVL-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 356; AVX512DQVL-NEXT: vpmovsxwd %xmm0, %ymm0 357; AVX512DQVL-NEXT: vpsravd %ymm1, %ymm0, %ymm0 358; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm0 359; AVX512DQVL-NEXT: retq 360; 361; AVX512BWVL-LABEL: var_shift_v8i16: 362; AVX512BWVL: # BB#0: 363; AVX512BWVL-NEXT: vpsravw %xmm1, %xmm0, %xmm0 364; AVX512BWVL-NEXT: retq 365; 366; X32-SSE-LABEL: var_shift_v8i16: 367; X32-SSE: # BB#0: 368; X32-SSE-NEXT: psllw $12, %xmm1 369; X32-SSE-NEXT: movdqa %xmm1, %xmm2 370; X32-SSE-NEXT: psraw $15, %xmm2 371; X32-SSE-NEXT: movdqa %xmm2, %xmm3 372; X32-SSE-NEXT: pandn %xmm0, %xmm3 373; X32-SSE-NEXT: psraw $8, %xmm0 374; X32-SSE-NEXT: pand %xmm2, %xmm0 375; X32-SSE-NEXT: por %xmm3, %xmm0 376; X32-SSE-NEXT: paddw %xmm1, %xmm1 377; X32-SSE-NEXT: movdqa %xmm1, %xmm2 378; X32-SSE-NEXT: psraw $15, %xmm2 379; X32-SSE-NEXT: movdqa %xmm2, %xmm3 380; X32-SSE-NEXT: pandn %xmm0, %xmm3 381; X32-SSE-NEXT: psraw $4, %xmm0 382; X32-SSE-NEXT: pand %xmm2, %xmm0 383; X32-SSE-NEXT: por %xmm3, %xmm0 384; X32-SSE-NEXT: paddw %xmm1, %xmm1 385; X32-SSE-NEXT: movdqa %xmm1, %xmm2 386; X32-SSE-NEXT: psraw $15, %xmm2 387; X32-SSE-NEXT: movdqa %xmm2, %xmm3 388; X32-SSE-NEXT: pandn %xmm0, %xmm3 389; X32-SSE-NEXT: psraw $2, %xmm0 390; X32-SSE-NEXT: pand %xmm2, %xmm0 391; X32-SSE-NEXT: por %xmm3, %xmm0 392; X32-SSE-NEXT: paddw %xmm1, %xmm1 393; X32-SSE-NEXT: psraw $15, %xmm1 394; X32-SSE-NEXT: movdqa %xmm1, %xmm2 395; X32-SSE-NEXT: pandn %xmm0, %xmm2 396; X32-SSE-NEXT: psraw $1, %xmm0 397; X32-SSE-NEXT: pand %xmm1, %xmm0 398; X32-SSE-NEXT: por %xmm2, %xmm0 399; X32-SSE-NEXT: retl 400 %shift = ashr <8 x i16> %a, %b 401 ret <8 x i16> %shift 402} 403 404define <16 x i8> @var_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind { 405; SSE2-LABEL: var_shift_v16i8: 406; SSE2: # BB#0: 407; SSE2-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15] 408; SSE2-NEXT: psllw $5, %xmm1 409; SSE2-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm1[8],xmm4[9],xmm1[9],xmm4[10],xmm1[10],xmm4[11],xmm1[11],xmm4[12],xmm1[12],xmm4[13],xmm1[13],xmm4[14],xmm1[14],xmm4[15],xmm1[15] 410; SSE2-NEXT: pxor %xmm3, %xmm3 411; SSE2-NEXT: pxor %xmm5, %xmm5 412; SSE2-NEXT: pcmpgtw %xmm4, %xmm5 413; SSE2-NEXT: movdqa %xmm5, %xmm6 414; SSE2-NEXT: pandn %xmm2, %xmm6 415; SSE2-NEXT: psraw $4, %xmm2 416; SSE2-NEXT: pand %xmm5, %xmm2 417; SSE2-NEXT: por %xmm6, %xmm2 418; SSE2-NEXT: paddw %xmm4, %xmm4 419; SSE2-NEXT: pxor %xmm5, %xmm5 420; SSE2-NEXT: pcmpgtw %xmm4, %xmm5 421; SSE2-NEXT: movdqa %xmm5, %xmm6 422; SSE2-NEXT: pandn %xmm2, %xmm6 423; SSE2-NEXT: psraw $2, %xmm2 424; SSE2-NEXT: pand %xmm5, %xmm2 425; SSE2-NEXT: por %xmm6, %xmm2 426; SSE2-NEXT: paddw %xmm4, %xmm4 427; SSE2-NEXT: pxor %xmm5, %xmm5 428; SSE2-NEXT: pcmpgtw %xmm4, %xmm5 429; SSE2-NEXT: movdqa %xmm5, %xmm4 430; SSE2-NEXT: pandn %xmm2, %xmm4 431; SSE2-NEXT: psraw $1, %xmm2 432; SSE2-NEXT: pand %xmm5, %xmm2 433; SSE2-NEXT: por %xmm4, %xmm2 434; SSE2-NEXT: psrlw $8, %xmm2 435; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 436; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 437; SSE2-NEXT: pxor %xmm4, %xmm4 438; SSE2-NEXT: pcmpgtw %xmm1, %xmm4 439; SSE2-NEXT: movdqa %xmm4, %xmm5 440; SSE2-NEXT: pandn %xmm0, %xmm5 441; SSE2-NEXT: psraw $4, %xmm0 442; SSE2-NEXT: pand %xmm4, %xmm0 443; SSE2-NEXT: por %xmm5, %xmm0 444; SSE2-NEXT: paddw %xmm1, %xmm1 445; SSE2-NEXT: pxor %xmm4, %xmm4 446; SSE2-NEXT: pcmpgtw %xmm1, %xmm4 447; SSE2-NEXT: movdqa %xmm4, %xmm5 448; SSE2-NEXT: pandn %xmm0, %xmm5 449; SSE2-NEXT: psraw $2, %xmm0 450; SSE2-NEXT: pand %xmm4, %xmm0 451; SSE2-NEXT: por %xmm5, %xmm0 452; SSE2-NEXT: paddw %xmm1, %xmm1 453; SSE2-NEXT: pcmpgtw %xmm1, %xmm3 454; SSE2-NEXT: movdqa %xmm3, %xmm1 455; SSE2-NEXT: pandn %xmm0, %xmm1 456; SSE2-NEXT: psraw $1, %xmm0 457; SSE2-NEXT: pand %xmm3, %xmm0 458; SSE2-NEXT: por %xmm1, %xmm0 459; SSE2-NEXT: psrlw $8, %xmm0 460; SSE2-NEXT: packuswb %xmm2, %xmm0 461; SSE2-NEXT: retq 462; 463; SSE41-LABEL: var_shift_v16i8: 464; SSE41: # BB#0: 465; SSE41-NEXT: movdqa %xmm0, %xmm2 466; SSE41-NEXT: psllw $5, %xmm1 467; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] 468; SSE41-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15] 469; SSE41-NEXT: movdqa %xmm3, %xmm4 470; SSE41-NEXT: psraw $4, %xmm4 471; SSE41-NEXT: pblendvb %xmm4, %xmm3 472; SSE41-NEXT: movdqa %xmm3, %xmm4 473; SSE41-NEXT: psraw $2, %xmm4 474; SSE41-NEXT: paddw %xmm0, %xmm0 475; SSE41-NEXT: pblendvb %xmm4, %xmm3 476; SSE41-NEXT: movdqa %xmm3, %xmm4 477; SSE41-NEXT: psraw $1, %xmm4 478; SSE41-NEXT: paddw %xmm0, %xmm0 479; SSE41-NEXT: pblendvb %xmm4, %xmm3 480; SSE41-NEXT: psrlw $8, %xmm3 481; SSE41-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 482; SSE41-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 483; SSE41-NEXT: movdqa %xmm1, %xmm2 484; SSE41-NEXT: psraw $4, %xmm2 485; SSE41-NEXT: pblendvb %xmm2, %xmm1 486; SSE41-NEXT: movdqa %xmm1, %xmm2 487; SSE41-NEXT: psraw $2, %xmm2 488; SSE41-NEXT: paddw %xmm0, %xmm0 489; SSE41-NEXT: pblendvb %xmm2, %xmm1 490; SSE41-NEXT: movdqa %xmm1, %xmm2 491; SSE41-NEXT: psraw $1, %xmm2 492; SSE41-NEXT: paddw %xmm0, %xmm0 493; SSE41-NEXT: pblendvb %xmm2, %xmm1 494; SSE41-NEXT: psrlw $8, %xmm1 495; SSE41-NEXT: packuswb %xmm3, %xmm1 496; SSE41-NEXT: movdqa %xmm1, %xmm0 497; SSE41-NEXT: retq 498; 499; AVX-LABEL: var_shift_v16i8: 500; AVX: # BB#0: 501; AVX-NEXT: vpsllw $5, %xmm1, %xmm1 502; AVX-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] 503; AVX-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 504; AVX-NEXT: vpsraw $4, %xmm3, %xmm4 505; AVX-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm3 506; AVX-NEXT: vpsraw $2, %xmm3, %xmm4 507; AVX-NEXT: vpaddw %xmm2, %xmm2, %xmm2 508; AVX-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm3 509; AVX-NEXT: vpsraw $1, %xmm3, %xmm4 510; AVX-NEXT: vpaddw %xmm2, %xmm2, %xmm2 511; AVX-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm2 512; AVX-NEXT: vpsrlw $8, %xmm2, %xmm2 513; AVX-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 514; AVX-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 515; AVX-NEXT: vpsraw $4, %xmm0, %xmm3 516; AVX-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 517; AVX-NEXT: vpsraw $2, %xmm0, %xmm3 518; AVX-NEXT: vpaddw %xmm1, %xmm1, %xmm1 519; AVX-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 520; AVX-NEXT: vpsraw $1, %xmm0, %xmm3 521; AVX-NEXT: vpaddw %xmm1, %xmm1, %xmm1 522; AVX-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 523; AVX-NEXT: vpsrlw $8, %xmm0, %xmm0 524; AVX-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 525; AVX-NEXT: retq 526; 527; XOP-LABEL: var_shift_v16i8: 528; XOP: # BB#0: 529; XOP-NEXT: vpxor %xmm2, %xmm2, %xmm2 530; XOP-NEXT: vpsubb %xmm1, %xmm2, %xmm1 531; XOP-NEXT: vpshab %xmm1, %xmm0, %xmm0 532; XOP-NEXT: retq 533; 534; AVX512-LABEL: var_shift_v16i8: 535; AVX512: # BB#0: 536; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero 537; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0 538; AVX512-NEXT: vpsravd %zmm1, %zmm0, %zmm0 539; AVX512-NEXT: vpmovdb %zmm0, %xmm0 540; AVX512-NEXT: retq 541; 542; AVX512VL-LABEL: var_shift_v16i8: 543; AVX512VL: # BB#0: 544; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero 545; AVX512VL-NEXT: vpmovsxbd %xmm0, %zmm0 546; AVX512VL-NEXT: vpsravd %zmm1, %zmm0, %zmm0 547; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 548; AVX512VL-NEXT: retq 549; 550; X32-SSE-LABEL: var_shift_v16i8: 551; X32-SSE: # BB#0: 552; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm0[8],xmm2[9],xmm0[9],xmm2[10],xmm0[10],xmm2[11],xmm0[11],xmm2[12],xmm0[12],xmm2[13],xmm0[13],xmm2[14],xmm0[14],xmm2[15],xmm0[15] 553; X32-SSE-NEXT: psllw $5, %xmm1 554; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm1[8],xmm4[9],xmm1[9],xmm4[10],xmm1[10],xmm4[11],xmm1[11],xmm4[12],xmm1[12],xmm4[13],xmm1[13],xmm4[14],xmm1[14],xmm4[15],xmm1[15] 555; X32-SSE-NEXT: pxor %xmm3, %xmm3 556; X32-SSE-NEXT: pxor %xmm5, %xmm5 557; X32-SSE-NEXT: pcmpgtw %xmm4, %xmm5 558; X32-SSE-NEXT: movdqa %xmm5, %xmm6 559; X32-SSE-NEXT: pandn %xmm2, %xmm6 560; X32-SSE-NEXT: psraw $4, %xmm2 561; X32-SSE-NEXT: pand %xmm5, %xmm2 562; X32-SSE-NEXT: por %xmm6, %xmm2 563; X32-SSE-NEXT: paddw %xmm4, %xmm4 564; X32-SSE-NEXT: pxor %xmm5, %xmm5 565; X32-SSE-NEXT: pcmpgtw %xmm4, %xmm5 566; X32-SSE-NEXT: movdqa %xmm5, %xmm6 567; X32-SSE-NEXT: pandn %xmm2, %xmm6 568; X32-SSE-NEXT: psraw $2, %xmm2 569; X32-SSE-NEXT: pand %xmm5, %xmm2 570; X32-SSE-NEXT: por %xmm6, %xmm2 571; X32-SSE-NEXT: paddw %xmm4, %xmm4 572; X32-SSE-NEXT: pxor %xmm5, %xmm5 573; X32-SSE-NEXT: pcmpgtw %xmm4, %xmm5 574; X32-SSE-NEXT: movdqa %xmm5, %xmm4 575; X32-SSE-NEXT: pandn %xmm2, %xmm4 576; X32-SSE-NEXT: psraw $1, %xmm2 577; X32-SSE-NEXT: pand %xmm5, %xmm2 578; X32-SSE-NEXT: por %xmm4, %xmm2 579; X32-SSE-NEXT: psrlw $8, %xmm2 580; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 581; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 582; X32-SSE-NEXT: pxor %xmm4, %xmm4 583; X32-SSE-NEXT: pcmpgtw %xmm1, %xmm4 584; X32-SSE-NEXT: movdqa %xmm4, %xmm5 585; X32-SSE-NEXT: pandn %xmm0, %xmm5 586; X32-SSE-NEXT: psraw $4, %xmm0 587; X32-SSE-NEXT: pand %xmm4, %xmm0 588; X32-SSE-NEXT: por %xmm5, %xmm0 589; X32-SSE-NEXT: paddw %xmm1, %xmm1 590; X32-SSE-NEXT: pxor %xmm4, %xmm4 591; X32-SSE-NEXT: pcmpgtw %xmm1, %xmm4 592; X32-SSE-NEXT: movdqa %xmm4, %xmm5 593; X32-SSE-NEXT: pandn %xmm0, %xmm5 594; X32-SSE-NEXT: psraw $2, %xmm0 595; X32-SSE-NEXT: pand %xmm4, %xmm0 596; X32-SSE-NEXT: por %xmm5, %xmm0 597; X32-SSE-NEXT: paddw %xmm1, %xmm1 598; X32-SSE-NEXT: pcmpgtw %xmm1, %xmm3 599; X32-SSE-NEXT: movdqa %xmm3, %xmm1 600; X32-SSE-NEXT: pandn %xmm0, %xmm1 601; X32-SSE-NEXT: psraw $1, %xmm0 602; X32-SSE-NEXT: pand %xmm3, %xmm0 603; X32-SSE-NEXT: por %xmm1, %xmm0 604; X32-SSE-NEXT: psrlw $8, %xmm0 605; X32-SSE-NEXT: packuswb %xmm2, %xmm0 606; X32-SSE-NEXT: retl 607 %shift = ashr <16 x i8> %a, %b 608 ret <16 x i8> %shift 609} 610 611; 612; Uniform Variable Shifts 613; 614 615define <2 x i64> @splatvar_shift_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind { 616; SSE-LABEL: splatvar_shift_v2i64: 617; SSE: # BB#0: 618; SSE-NEXT: movdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 619; SSE-NEXT: psrlq %xmm1, %xmm2 620; SSE-NEXT: psrlq %xmm1, %xmm0 621; SSE-NEXT: pxor %xmm2, %xmm0 622; SSE-NEXT: psubq %xmm2, %xmm0 623; SSE-NEXT: retq 624; 625; AVX-LABEL: splatvar_shift_v2i64: 626; AVX: # BB#0: 627; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 628; AVX-NEXT: vpsrlq %xmm1, %xmm2, %xmm2 629; AVX-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 630; AVX-NEXT: vpxor %xmm2, %xmm0, %xmm0 631; AVX-NEXT: vpsubq %xmm2, %xmm0, %xmm0 632; AVX-NEXT: retq 633; 634; XOPAVX1-LABEL: splatvar_shift_v2i64: 635; XOPAVX1: # BB#0: 636; XOPAVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,1,0,1] 637; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 638; XOPAVX1-NEXT: vpsubq %xmm1, %xmm2, %xmm1 639; XOPAVX1-NEXT: vpshaq %xmm1, %xmm0, %xmm0 640; XOPAVX1-NEXT: retq 641; 642; XOPAVX2-LABEL: splatvar_shift_v2i64: 643; XOPAVX2: # BB#0: 644; XOPAVX2-NEXT: vpbroadcastq %xmm1, %xmm1 645; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 646; XOPAVX2-NEXT: vpsubq %xmm1, %xmm2, %xmm1 647; XOPAVX2-NEXT: vpshaq %xmm1, %xmm0, %xmm0 648; XOPAVX2-NEXT: retq 649; 650; AVX512-LABEL: splatvar_shift_v2i64: 651; AVX512: # BB#0: 652; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808] 653; AVX512-NEXT: vpsrlq %xmm1, %xmm2, %xmm2 654; AVX512-NEXT: vpsrlq %xmm1, %xmm0, %xmm0 655; AVX512-NEXT: vpxor %xmm2, %xmm0, %xmm0 656; AVX512-NEXT: vpsubq %xmm2, %xmm0, %xmm0 657; AVX512-NEXT: retq 658; 659; AVX512VL-LABEL: splatvar_shift_v2i64: 660; AVX512VL: # BB#0: 661; AVX512VL-NEXT: vpsraq %xmm1, %xmm0, %xmm0 662; AVX512VL-NEXT: retq 663; 664; X32-SSE-LABEL: splatvar_shift_v2i64: 665; X32-SSE: # BB#0: 666; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,2147483648,0,2147483648] 667; X32-SSE-NEXT: psrlq %xmm1, %xmm2 668; X32-SSE-NEXT: psrlq %xmm1, %xmm0 669; X32-SSE-NEXT: pxor %xmm2, %xmm0 670; X32-SSE-NEXT: psubq %xmm2, %xmm0 671; X32-SSE-NEXT: retl 672 %splat = shufflevector <2 x i64> %b, <2 x i64> undef, <2 x i32> zeroinitializer 673 %shift = ashr <2 x i64> %a, %splat 674 ret <2 x i64> %shift 675} 676 677define <4 x i32> @splatvar_shift_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind { 678; SSE2-LABEL: splatvar_shift_v4i32: 679; SSE2: # BB#0: 680; SSE2-NEXT: xorps %xmm2, %xmm2 681; SSE2-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3] 682; SSE2-NEXT: psrad %xmm2, %xmm0 683; SSE2-NEXT: retq 684; 685; SSE41-LABEL: splatvar_shift_v4i32: 686; SSE41: # BB#0: 687; SSE41-NEXT: pmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero 688; SSE41-NEXT: psrad %xmm1, %xmm0 689; SSE41-NEXT: retq 690; 691; AVX-LABEL: splatvar_shift_v4i32: 692; AVX: # BB#0: 693; AVX-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero 694; AVX-NEXT: vpsrad %xmm1, %xmm0, %xmm0 695; AVX-NEXT: retq 696; 697; XOP-LABEL: splatvar_shift_v4i32: 698; XOP: # BB#0: 699; XOP-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero 700; XOP-NEXT: vpsrad %xmm1, %xmm0, %xmm0 701; XOP-NEXT: retq 702; 703; AVX512-LABEL: splatvar_shift_v4i32: 704; AVX512: # BB#0: 705; AVX512-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero 706; AVX512-NEXT: vpsrad %xmm1, %xmm0, %xmm0 707; AVX512-NEXT: retq 708; 709; AVX512VL-LABEL: splatvar_shift_v4i32: 710; AVX512VL: # BB#0: 711; AVX512VL-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero 712; AVX512VL-NEXT: vpsrad %xmm1, %xmm0, %xmm0 713; AVX512VL-NEXT: retq 714; 715; X32-SSE-LABEL: splatvar_shift_v4i32: 716; X32-SSE: # BB#0: 717; X32-SSE-NEXT: xorps %xmm2, %xmm2 718; X32-SSE-NEXT: movss {{.*#+}} xmm2 = xmm1[0],xmm2[1,2,3] 719; X32-SSE-NEXT: psrad %xmm2, %xmm0 720; X32-SSE-NEXT: retl 721 %splat = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> zeroinitializer 722 %shift = ashr <4 x i32> %a, %splat 723 ret <4 x i32> %shift 724} 725 726define <8 x i16> @splatvar_shift_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind { 727; SSE2-LABEL: splatvar_shift_v8i16: 728; SSE2: # BB#0: 729; SSE2-NEXT: pextrw $0, %xmm1, %eax 730; SSE2-NEXT: movd %eax, %xmm1 731; SSE2-NEXT: psraw %xmm1, %xmm0 732; SSE2-NEXT: retq 733; 734; SSE41-LABEL: splatvar_shift_v8i16: 735; SSE41: # BB#0: 736; SSE41-NEXT: pmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero 737; SSE41-NEXT: psraw %xmm1, %xmm0 738; SSE41-NEXT: retq 739; 740; AVX-LABEL: splatvar_shift_v8i16: 741; AVX: # BB#0: 742; AVX-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero 743; AVX-NEXT: vpsraw %xmm1, %xmm0, %xmm0 744; AVX-NEXT: retq 745; 746; XOP-LABEL: splatvar_shift_v8i16: 747; XOP: # BB#0: 748; XOP-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero 749; XOP-NEXT: vpsraw %xmm1, %xmm0, %xmm0 750; XOP-NEXT: retq 751; 752; AVX512-LABEL: splatvar_shift_v8i16: 753; AVX512: # BB#0: 754; AVX512-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero 755; AVX512-NEXT: vpsraw %xmm1, %xmm0, %xmm0 756; AVX512-NEXT: retq 757; 758; AVX512VL-LABEL: splatvar_shift_v8i16: 759; AVX512VL: # BB#0: 760; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero 761; AVX512VL-NEXT: vpsraw %xmm1, %xmm0, %xmm0 762; AVX512VL-NEXT: retq 763; 764; X32-SSE-LABEL: splatvar_shift_v8i16: 765; X32-SSE: # BB#0: 766; X32-SSE-NEXT: pextrw $0, %xmm1, %eax 767; X32-SSE-NEXT: movd %eax, %xmm1 768; X32-SSE-NEXT: psraw %xmm1, %xmm0 769; X32-SSE-NEXT: retl 770 %splat = shufflevector <8 x i16> %b, <8 x i16> undef, <8 x i32> zeroinitializer 771 %shift = ashr <8 x i16> %a, %splat 772 ret <8 x i16> %shift 773} 774 775define <16 x i8> @splatvar_shift_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind { 776; SSE2-LABEL: splatvar_shift_v16i8: 777; SSE2: # BB#0: 778; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 779; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7] 780; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,0,1,1] 781; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 782; SSE2-NEXT: psllw $5, %xmm3 783; SSE2-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm3[8],xmm4[9],xmm3[9],xmm4[10],xmm3[10],xmm4[11],xmm3[11],xmm4[12],xmm3[12],xmm4[13],xmm3[13],xmm4[14],xmm3[14],xmm4[15],xmm3[15] 784; SSE2-NEXT: pxor %xmm2, %xmm2 785; SSE2-NEXT: pxor %xmm5, %xmm5 786; SSE2-NEXT: pcmpgtw %xmm4, %xmm5 787; SSE2-NEXT: movdqa %xmm5, %xmm6 788; SSE2-NEXT: pandn %xmm1, %xmm6 789; SSE2-NEXT: psraw $4, %xmm1 790; SSE2-NEXT: pand %xmm5, %xmm1 791; SSE2-NEXT: por %xmm6, %xmm1 792; SSE2-NEXT: paddw %xmm4, %xmm4 793; SSE2-NEXT: pxor %xmm5, %xmm5 794; SSE2-NEXT: pcmpgtw %xmm4, %xmm5 795; SSE2-NEXT: movdqa %xmm5, %xmm6 796; SSE2-NEXT: pandn %xmm1, %xmm6 797; SSE2-NEXT: psraw $2, %xmm1 798; SSE2-NEXT: pand %xmm5, %xmm1 799; SSE2-NEXT: por %xmm6, %xmm1 800; SSE2-NEXT: paddw %xmm4, %xmm4 801; SSE2-NEXT: pxor %xmm5, %xmm5 802; SSE2-NEXT: pcmpgtw %xmm4, %xmm5 803; SSE2-NEXT: movdqa %xmm5, %xmm4 804; SSE2-NEXT: pandn %xmm1, %xmm4 805; SSE2-NEXT: psraw $1, %xmm1 806; SSE2-NEXT: pand %xmm5, %xmm1 807; SSE2-NEXT: por %xmm4, %xmm1 808; SSE2-NEXT: psrlw $8, %xmm1 809; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 810; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 811; SSE2-NEXT: pxor %xmm4, %xmm4 812; SSE2-NEXT: pcmpgtw %xmm3, %xmm4 813; SSE2-NEXT: movdqa %xmm4, %xmm5 814; SSE2-NEXT: pandn %xmm0, %xmm5 815; SSE2-NEXT: psraw $4, %xmm0 816; SSE2-NEXT: pand %xmm4, %xmm0 817; SSE2-NEXT: por %xmm5, %xmm0 818; SSE2-NEXT: paddw %xmm3, %xmm3 819; SSE2-NEXT: pxor %xmm4, %xmm4 820; SSE2-NEXT: pcmpgtw %xmm3, %xmm4 821; SSE2-NEXT: movdqa %xmm4, %xmm5 822; SSE2-NEXT: pandn %xmm0, %xmm5 823; SSE2-NEXT: psraw $2, %xmm0 824; SSE2-NEXT: pand %xmm4, %xmm0 825; SSE2-NEXT: por %xmm5, %xmm0 826; SSE2-NEXT: paddw %xmm3, %xmm3 827; SSE2-NEXT: pcmpgtw %xmm3, %xmm2 828; SSE2-NEXT: movdqa %xmm2, %xmm3 829; SSE2-NEXT: pandn %xmm0, %xmm3 830; SSE2-NEXT: psraw $1, %xmm0 831; SSE2-NEXT: pand %xmm2, %xmm0 832; SSE2-NEXT: por %xmm3, %xmm0 833; SSE2-NEXT: psrlw $8, %xmm0 834; SSE2-NEXT: packuswb %xmm1, %xmm0 835; SSE2-NEXT: retq 836; 837; SSE41-LABEL: splatvar_shift_v16i8: 838; SSE41: # BB#0: 839; SSE41-NEXT: movdqa %xmm0, %xmm2 840; SSE41-NEXT: pxor %xmm0, %xmm0 841; SSE41-NEXT: pshufb %xmm0, %xmm1 842; SSE41-NEXT: psllw $5, %xmm1 843; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] 844; SSE41-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm2[8],xmm3[9],xmm2[9],xmm3[10],xmm2[10],xmm3[11],xmm2[11],xmm3[12],xmm2[12],xmm3[13],xmm2[13],xmm3[14],xmm2[14],xmm3[15],xmm2[15] 845; SSE41-NEXT: movdqa %xmm3, %xmm4 846; SSE41-NEXT: psraw $4, %xmm4 847; SSE41-NEXT: pblendvb %xmm4, %xmm3 848; SSE41-NEXT: movdqa %xmm3, %xmm4 849; SSE41-NEXT: psraw $2, %xmm4 850; SSE41-NEXT: paddw %xmm0, %xmm0 851; SSE41-NEXT: pblendvb %xmm4, %xmm3 852; SSE41-NEXT: movdqa %xmm3, %xmm4 853; SSE41-NEXT: psraw $1, %xmm4 854; SSE41-NEXT: paddw %xmm0, %xmm0 855; SSE41-NEXT: pblendvb %xmm4, %xmm3 856; SSE41-NEXT: psrlw $8, %xmm3 857; SSE41-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 858; SSE41-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 859; SSE41-NEXT: movdqa %xmm1, %xmm2 860; SSE41-NEXT: psraw $4, %xmm2 861; SSE41-NEXT: pblendvb %xmm2, %xmm1 862; SSE41-NEXT: movdqa %xmm1, %xmm2 863; SSE41-NEXT: psraw $2, %xmm2 864; SSE41-NEXT: paddw %xmm0, %xmm0 865; SSE41-NEXT: pblendvb %xmm2, %xmm1 866; SSE41-NEXT: movdqa %xmm1, %xmm2 867; SSE41-NEXT: psraw $1, %xmm2 868; SSE41-NEXT: paddw %xmm0, %xmm0 869; SSE41-NEXT: pblendvb %xmm2, %xmm1 870; SSE41-NEXT: psrlw $8, %xmm1 871; SSE41-NEXT: packuswb %xmm3, %xmm1 872; SSE41-NEXT: movdqa %xmm1, %xmm0 873; SSE41-NEXT: retq 874; 875; AVX1-LABEL: splatvar_shift_v16i8: 876; AVX1: # BB#0: 877; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 878; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 879; AVX1-NEXT: vpsllw $5, %xmm1, %xmm1 880; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] 881; AVX1-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 882; AVX1-NEXT: vpsraw $4, %xmm3, %xmm4 883; AVX1-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm3 884; AVX1-NEXT: vpsraw $2, %xmm3, %xmm4 885; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm2 886; AVX1-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm3 887; AVX1-NEXT: vpsraw $1, %xmm3, %xmm4 888; AVX1-NEXT: vpaddw %xmm2, %xmm2, %xmm2 889; AVX1-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm2 890; AVX1-NEXT: vpsrlw $8, %xmm2, %xmm2 891; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 892; AVX1-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 893; AVX1-NEXT: vpsraw $4, %xmm0, %xmm3 894; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 895; AVX1-NEXT: vpsraw $2, %xmm0, %xmm3 896; AVX1-NEXT: vpaddw %xmm1, %xmm1, %xmm1 897; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 898; AVX1-NEXT: vpsraw $1, %xmm0, %xmm3 899; AVX1-NEXT: vpaddw %xmm1, %xmm1, %xmm1 900; AVX1-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 901; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 902; AVX1-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 903; AVX1-NEXT: retq 904; 905; AVX2-LABEL: splatvar_shift_v16i8: 906; AVX2: # BB#0: 907; AVX2-NEXT: vpbroadcastb %xmm1, %xmm1 908; AVX2-NEXT: vpsllw $5, %xmm1, %xmm1 909; AVX2-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] 910; AVX2-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 911; AVX2-NEXT: vpsraw $4, %xmm3, %xmm4 912; AVX2-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm3 913; AVX2-NEXT: vpsraw $2, %xmm3, %xmm4 914; AVX2-NEXT: vpaddw %xmm2, %xmm2, %xmm2 915; AVX2-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm3 916; AVX2-NEXT: vpsraw $1, %xmm3, %xmm4 917; AVX2-NEXT: vpaddw %xmm2, %xmm2, %xmm2 918; AVX2-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm2 919; AVX2-NEXT: vpsrlw $8, %xmm2, %xmm2 920; AVX2-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 921; AVX2-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 922; AVX2-NEXT: vpsraw $4, %xmm0, %xmm3 923; AVX2-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 924; AVX2-NEXT: vpsraw $2, %xmm0, %xmm3 925; AVX2-NEXT: vpaddw %xmm1, %xmm1, %xmm1 926; AVX2-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 927; AVX2-NEXT: vpsraw $1, %xmm0, %xmm3 928; AVX2-NEXT: vpaddw %xmm1, %xmm1, %xmm1 929; AVX2-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 930; AVX2-NEXT: vpsrlw $8, %xmm0, %xmm0 931; AVX2-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 932; AVX2-NEXT: retq 933; 934; XOPAVX1-LABEL: splatvar_shift_v16i8: 935; XOPAVX1: # BB#0: 936; XOPAVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 937; XOPAVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 938; XOPAVX1-NEXT: vpsubb %xmm1, %xmm2, %xmm1 939; XOPAVX1-NEXT: vpshab %xmm1, %xmm0, %xmm0 940; XOPAVX1-NEXT: retq 941; 942; XOPAVX2-LABEL: splatvar_shift_v16i8: 943; XOPAVX2: # BB#0: 944; XOPAVX2-NEXT: vpbroadcastb %xmm1, %xmm1 945; XOPAVX2-NEXT: vpxor %xmm2, %xmm2, %xmm2 946; XOPAVX2-NEXT: vpsubb %xmm1, %xmm2, %xmm1 947; XOPAVX2-NEXT: vpshab %xmm1, %xmm0, %xmm0 948; XOPAVX2-NEXT: retq 949; 950; AVX512-LABEL: splatvar_shift_v16i8: 951; AVX512: # BB#0: 952; AVX512-NEXT: vpbroadcastb %xmm1, %xmm1 953; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0 954; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero 955; AVX512-NEXT: vpsravd %zmm1, %zmm0, %zmm0 956; AVX512-NEXT: vpmovdb %zmm0, %xmm0 957; AVX512-NEXT: retq 958; 959; AVX512VL-LABEL: splatvar_shift_v16i8: 960; AVX512VL: # BB#0: 961; AVX512VL-NEXT: vpbroadcastb %xmm1, %xmm1 962; AVX512VL-NEXT: vpmovsxbd %xmm0, %zmm0 963; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero 964; AVX512VL-NEXT: vpsravd %zmm1, %zmm0, %zmm0 965; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 966; AVX512VL-NEXT: retq 967; 968; X32-SSE-LABEL: splatvar_shift_v16i8: 969; X32-SSE: # BB#0: 970; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 971; X32-SSE-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,0,0,0,4,5,6,7] 972; X32-SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[0,0,1,1] 973; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 974; X32-SSE-NEXT: psllw $5, %xmm3 975; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm3[8],xmm4[9],xmm3[9],xmm4[10],xmm3[10],xmm4[11],xmm3[11],xmm4[12],xmm3[12],xmm4[13],xmm3[13],xmm4[14],xmm3[14],xmm4[15],xmm3[15] 976; X32-SSE-NEXT: pxor %xmm2, %xmm2 977; X32-SSE-NEXT: pxor %xmm5, %xmm5 978; X32-SSE-NEXT: pcmpgtw %xmm4, %xmm5 979; X32-SSE-NEXT: movdqa %xmm5, %xmm6 980; X32-SSE-NEXT: pandn %xmm1, %xmm6 981; X32-SSE-NEXT: psraw $4, %xmm1 982; X32-SSE-NEXT: pand %xmm5, %xmm1 983; X32-SSE-NEXT: por %xmm6, %xmm1 984; X32-SSE-NEXT: paddw %xmm4, %xmm4 985; X32-SSE-NEXT: pxor %xmm5, %xmm5 986; X32-SSE-NEXT: pcmpgtw %xmm4, %xmm5 987; X32-SSE-NEXT: movdqa %xmm5, %xmm6 988; X32-SSE-NEXT: pandn %xmm1, %xmm6 989; X32-SSE-NEXT: psraw $2, %xmm1 990; X32-SSE-NEXT: pand %xmm5, %xmm1 991; X32-SSE-NEXT: por %xmm6, %xmm1 992; X32-SSE-NEXT: paddw %xmm4, %xmm4 993; X32-SSE-NEXT: pxor %xmm5, %xmm5 994; X32-SSE-NEXT: pcmpgtw %xmm4, %xmm5 995; X32-SSE-NEXT: movdqa %xmm5, %xmm4 996; X32-SSE-NEXT: pandn %xmm1, %xmm4 997; X32-SSE-NEXT: psraw $1, %xmm1 998; X32-SSE-NEXT: pand %xmm5, %xmm1 999; X32-SSE-NEXT: por %xmm4, %xmm1 1000; X32-SSE-NEXT: psrlw $8, %xmm1 1001; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1002; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1003; X32-SSE-NEXT: pxor %xmm4, %xmm4 1004; X32-SSE-NEXT: pcmpgtw %xmm3, %xmm4 1005; X32-SSE-NEXT: movdqa %xmm4, %xmm5 1006; X32-SSE-NEXT: pandn %xmm0, %xmm5 1007; X32-SSE-NEXT: psraw $4, %xmm0 1008; X32-SSE-NEXT: pand %xmm4, %xmm0 1009; X32-SSE-NEXT: por %xmm5, %xmm0 1010; X32-SSE-NEXT: paddw %xmm3, %xmm3 1011; X32-SSE-NEXT: pxor %xmm4, %xmm4 1012; X32-SSE-NEXT: pcmpgtw %xmm3, %xmm4 1013; X32-SSE-NEXT: movdqa %xmm4, %xmm5 1014; X32-SSE-NEXT: pandn %xmm0, %xmm5 1015; X32-SSE-NEXT: psraw $2, %xmm0 1016; X32-SSE-NEXT: pand %xmm4, %xmm0 1017; X32-SSE-NEXT: por %xmm5, %xmm0 1018; X32-SSE-NEXT: paddw %xmm3, %xmm3 1019; X32-SSE-NEXT: pcmpgtw %xmm3, %xmm2 1020; X32-SSE-NEXT: movdqa %xmm2, %xmm3 1021; X32-SSE-NEXT: pandn %xmm0, %xmm3 1022; X32-SSE-NEXT: psraw $1, %xmm0 1023; X32-SSE-NEXT: pand %xmm2, %xmm0 1024; X32-SSE-NEXT: por %xmm3, %xmm0 1025; X32-SSE-NEXT: psrlw $8, %xmm0 1026; X32-SSE-NEXT: packuswb %xmm1, %xmm0 1027; X32-SSE-NEXT: retl 1028 %splat = shufflevector <16 x i8> %b, <16 x i8> undef, <16 x i32> zeroinitializer 1029 %shift = ashr <16 x i8> %a, %splat 1030 ret <16 x i8> %shift 1031} 1032 1033; 1034; Constant Shifts 1035; 1036 1037define <2 x i64> @constant_shift_v2i64(<2 x i64> %a) nounwind { 1038; SSE2-LABEL: constant_shift_v2i64: 1039; SSE2: # BB#0: 1040; SSE2-NEXT: movdqa %xmm0, %xmm1 1041; SSE2-NEXT: psrlq $7, %xmm1 1042; SSE2-NEXT: psrlq $1, %xmm0 1043; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] 1044; SSE2-NEXT: movapd {{.*#+}} xmm0 = [4611686018427387904,72057594037927936] 1045; SSE2-NEXT: xorpd %xmm0, %xmm1 1046; SSE2-NEXT: psubq %xmm0, %xmm1 1047; SSE2-NEXT: movdqa %xmm1, %xmm0 1048; SSE2-NEXT: retq 1049; 1050; SSE41-LABEL: constant_shift_v2i64: 1051; SSE41: # BB#0: 1052; SSE41-NEXT: movdqa %xmm0, %xmm1 1053; SSE41-NEXT: psrlq $7, %xmm1 1054; SSE41-NEXT: psrlq $1, %xmm0 1055; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1056; SSE41-NEXT: movdqa {{.*#+}} xmm1 = [4611686018427387904,72057594037927936] 1057; SSE41-NEXT: pxor %xmm1, %xmm0 1058; SSE41-NEXT: psubq %xmm1, %xmm0 1059; SSE41-NEXT: retq 1060; 1061; AVX1-LABEL: constant_shift_v2i64: 1062; AVX1: # BB#0: 1063; AVX1-NEXT: vpsrlq $7, %xmm0, %xmm1 1064; AVX1-NEXT: vpsrlq $1, %xmm0, %xmm0 1065; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1066; AVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [4611686018427387904,72057594037927936] 1067; AVX1-NEXT: vpxor %xmm1, %xmm0, %xmm0 1068; AVX1-NEXT: vpsubq %xmm1, %xmm0, %xmm0 1069; AVX1-NEXT: retq 1070; 1071; AVX2-LABEL: constant_shift_v2i64: 1072; AVX2: # BB#0: 1073; AVX2-NEXT: vpsrlvq {{.*}}(%rip), %xmm0, %xmm0 1074; AVX2-NEXT: vmovdqa {{.*#+}} xmm1 = [4611686018427387904,72057594037927936] 1075; AVX2-NEXT: vpxor %xmm1, %xmm0, %xmm0 1076; AVX2-NEXT: vpsubq %xmm1, %xmm0, %xmm0 1077; AVX2-NEXT: retq 1078; 1079; XOP-LABEL: constant_shift_v2i64: 1080; XOP: # BB#0: 1081; XOP-NEXT: vpxor %xmm1, %xmm1, %xmm1 1082; XOP-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm1 1083; XOP-NEXT: vpshaq %xmm1, %xmm0, %xmm0 1084; XOP-NEXT: retq 1085; 1086; AVX512-LABEL: constant_shift_v2i64: 1087; AVX512: # BB#0: 1088; AVX512-NEXT: vpsrlvq {{.*}}(%rip), %xmm0, %xmm0 1089; AVX512-NEXT: vmovdqa {{.*#+}} xmm1 = [4611686018427387904,72057594037927936] 1090; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0 1091; AVX512-NEXT: vpsubq %xmm1, %xmm0, %xmm0 1092; AVX512-NEXT: retq 1093; 1094; AVX512VL-LABEL: constant_shift_v2i64: 1095; AVX512VL: # BB#0: 1096; AVX512VL-NEXT: vpsravq {{.*}}(%rip), %xmm0, %xmm0 1097; AVX512VL-NEXT: retq 1098; 1099; X32-SSE-LABEL: constant_shift_v2i64: 1100; X32-SSE: # BB#0: 1101; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [0,2147483648,0,2147483648] 1102; X32-SSE-NEXT: movdqa %xmm1, %xmm2 1103; X32-SSE-NEXT: psrlq $7, %xmm2 1104; X32-SSE-NEXT: psrlq $1, %xmm1 1105; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm1[0],xmm2[1] 1106; X32-SSE-NEXT: movdqa %xmm0, %xmm1 1107; X32-SSE-NEXT: psrlq $7, %xmm1 1108; X32-SSE-NEXT: psrlq $1, %xmm0 1109; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] 1110; X32-SSE-NEXT: xorpd %xmm2, %xmm1 1111; X32-SSE-NEXT: psubq %xmm2, %xmm1 1112; X32-SSE-NEXT: movdqa %xmm1, %xmm0 1113; X32-SSE-NEXT: retl 1114 %shift = ashr <2 x i64> %a, <i64 1, i64 7> 1115 ret <2 x i64> %shift 1116} 1117 1118define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) nounwind { 1119; SSE2-LABEL: constant_shift_v4i32: 1120; SSE2: # BB#0: 1121; SSE2-NEXT: movdqa %xmm0, %xmm1 1122; SSE2-NEXT: psrad $7, %xmm1 1123; SSE2-NEXT: movdqa %xmm0, %xmm2 1124; SSE2-NEXT: psrad $5, %xmm2 1125; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1] 1126; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3] 1127; SSE2-NEXT: movdqa %xmm0, %xmm2 1128; SSE2-NEXT: psrad $6, %xmm2 1129; SSE2-NEXT: psrad $4, %xmm0 1130; SSE2-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 1131; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 1132; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1133; SSE2-NEXT: retq 1134; 1135; SSE41-LABEL: constant_shift_v4i32: 1136; SSE41: # BB#0: 1137; SSE41-NEXT: movdqa %xmm0, %xmm1 1138; SSE41-NEXT: psrad $7, %xmm1 1139; SSE41-NEXT: movdqa %xmm0, %xmm2 1140; SSE41-NEXT: psrad $5, %xmm2 1141; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0,1,2,3],xmm1[4,5,6,7] 1142; SSE41-NEXT: movdqa %xmm0, %xmm1 1143; SSE41-NEXT: psrad $6, %xmm1 1144; SSE41-NEXT: psrad $4, %xmm0 1145; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1146; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm2[2,3],xmm0[4,5],xmm2[6,7] 1147; SSE41-NEXT: retq 1148; 1149; AVX1-LABEL: constant_shift_v4i32: 1150; AVX1: # BB#0: 1151; AVX1-NEXT: vpsrad $7, %xmm0, %xmm1 1152; AVX1-NEXT: vpsrad $5, %xmm0, %xmm2 1153; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm2[0,1,2,3],xmm1[4,5,6,7] 1154; AVX1-NEXT: vpsrad $6, %xmm0, %xmm2 1155; AVX1-NEXT: vpsrad $4, %xmm0, %xmm0 1156; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm2[4,5,6,7] 1157; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 1158; AVX1-NEXT: retq 1159; 1160; AVX2-LABEL: constant_shift_v4i32: 1161; AVX2: # BB#0: 1162; AVX2-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0 1163; AVX2-NEXT: retq 1164; 1165; XOPAVX1-LABEL: constant_shift_v4i32: 1166; XOPAVX1: # BB#0: 1167; XOPAVX1-NEXT: vpshad {{.*}}(%rip), %xmm0, %xmm0 1168; XOPAVX1-NEXT: retq 1169; 1170; XOPAVX2-LABEL: constant_shift_v4i32: 1171; XOPAVX2: # BB#0: 1172; XOPAVX2-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0 1173; XOPAVX2-NEXT: retq 1174; 1175; AVX512-LABEL: constant_shift_v4i32: 1176; AVX512: # BB#0: 1177; AVX512-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0 1178; AVX512-NEXT: retq 1179; 1180; AVX512VL-LABEL: constant_shift_v4i32: 1181; AVX512VL: # BB#0: 1182; AVX512VL-NEXT: vpsravd {{.*}}(%rip), %xmm0, %xmm0 1183; AVX512VL-NEXT: retq 1184; 1185; X32-SSE-LABEL: constant_shift_v4i32: 1186; X32-SSE: # BB#0: 1187; X32-SSE-NEXT: movdqa %xmm0, %xmm1 1188; X32-SSE-NEXT: psrad $7, %xmm1 1189; X32-SSE-NEXT: movdqa %xmm0, %xmm2 1190; X32-SSE-NEXT: psrad $5, %xmm2 1191; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm2[0],xmm1[1] 1192; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3] 1193; X32-SSE-NEXT: movdqa %xmm0, %xmm2 1194; X32-SSE-NEXT: psrad $6, %xmm2 1195; X32-SSE-NEXT: psrad $4, %xmm0 1196; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm0[0],xmm2[1] 1197; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,2,2,3] 1198; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1199; X32-SSE-NEXT: retl 1200 %shift = ashr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7> 1201 ret <4 x i32> %shift 1202} 1203 1204define <8 x i16> @constant_shift_v8i16(<8 x i16> %a) nounwind { 1205; SSE2-LABEL: constant_shift_v8i16: 1206; SSE2: # BB#0: 1207; SSE2-NEXT: movdqa %xmm0, %xmm1 1208; SSE2-NEXT: psraw $4, %xmm1 1209; SSE2-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] 1210; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3] 1211; SSE2-NEXT: psraw $2, %xmm1 1212; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,3,2,3] 1213; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 1214; SSE2-NEXT: movdqa {{.*#+}} xmm0 = [65535,0,65535,0,65535,0,65535,0] 1215; SSE2-NEXT: movdqa %xmm2, %xmm1 1216; SSE2-NEXT: pand %xmm0, %xmm1 1217; SSE2-NEXT: psraw $1, %xmm2 1218; SSE2-NEXT: pandn %xmm2, %xmm0 1219; SSE2-NEXT: por %xmm1, %xmm0 1220; SSE2-NEXT: retq 1221; 1222; SSE41-LABEL: constant_shift_v8i16: 1223; SSE41: # BB#0: 1224; SSE41-NEXT: movdqa %xmm0, %xmm1 1225; SSE41-NEXT: psraw $4, %xmm1 1226; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1227; SSE41-NEXT: movdqa %xmm1, %xmm2 1228; SSE41-NEXT: psraw $2, %xmm2 1229; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm1[0,1],xmm2[2,3],xmm1[4,5],xmm2[6,7] 1230; SSE41-NEXT: movdqa %xmm2, %xmm0 1231; SSE41-NEXT: psraw $1, %xmm0 1232; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0],xmm0[1],xmm2[2],xmm0[3],xmm2[4],xmm0[5],xmm2[6],xmm0[7] 1233; SSE41-NEXT: retq 1234; 1235; AVX1-LABEL: constant_shift_v8i16: 1236; AVX1: # BB#0: 1237; AVX1-NEXT: vpsraw $4, %xmm0, %xmm1 1238; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 1239; AVX1-NEXT: vpsraw $2, %xmm0, %xmm1 1240; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 1241; AVX1-NEXT: vpsraw $1, %xmm0, %xmm1 1242; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 1243; AVX1-NEXT: retq 1244; 1245; AVX2-LABEL: constant_shift_v8i16: 1246; AVX2: # BB#0: 1247; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 1248; AVX2-NEXT: vpsravd {{.*}}(%rip), %ymm0, %ymm0 1249; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero,ymm0[16,17,20,21,24,25,28,29],zero,zero,zero,zero,zero,zero,zero,zero 1250; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] 1251; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1252; AVX2-NEXT: vzeroupper 1253; AVX2-NEXT: retq 1254; 1255; XOP-LABEL: constant_shift_v8i16: 1256; XOP: # BB#0: 1257; XOP-NEXT: vpxor %xmm1, %xmm1, %xmm1 1258; XOP-NEXT: vpsubw {{.*}}(%rip), %xmm1, %xmm1 1259; XOP-NEXT: vpshaw %xmm1, %xmm0, %xmm0 1260; XOP-NEXT: retq 1261; 1262; AVX512DQ-LABEL: constant_shift_v8i16: 1263; AVX512DQ: # BB#0: 1264; AVX512DQ-NEXT: vpmovsxwd %xmm0, %ymm0 1265; AVX512DQ-NEXT: vpsravd {{.*}}(%rip), %ymm0, %ymm0 1266; AVX512DQ-NEXT: vpmovdw %zmm0, %ymm0 1267; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1268; AVX512DQ-NEXT: retq 1269; 1270; AVX512BW-LABEL: constant_shift_v8i16: 1271; AVX512BW: # BB#0: 1272; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 1273; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7] 1274; AVX512BW-NEXT: vpsravw %zmm1, %zmm0, %zmm0 1275; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 1276; AVX512BW-NEXT: retq 1277; 1278; AVX512DQVL-LABEL: constant_shift_v8i16: 1279; AVX512DQVL: # BB#0: 1280; AVX512DQVL-NEXT: vpmovsxwd %xmm0, %ymm0 1281; AVX512DQVL-NEXT: vpsravd {{.*}}(%rip), %ymm0, %ymm0 1282; AVX512DQVL-NEXT: vpmovdw %ymm0, %xmm0 1283; AVX512DQVL-NEXT: retq 1284; 1285; AVX512BWVL-LABEL: constant_shift_v8i16: 1286; AVX512BWVL: # BB#0: 1287; AVX512BWVL-NEXT: vpsravw {{.*}}(%rip), %xmm0, %xmm0 1288; AVX512BWVL-NEXT: retq 1289; 1290; X32-SSE-LABEL: constant_shift_v8i16: 1291; X32-SSE: # BB#0: 1292; X32-SSE-NEXT: movdqa %xmm0, %xmm1 1293; X32-SSE-NEXT: psraw $4, %xmm1 1294; X32-SSE-NEXT: movsd {{.*#+}} xmm1 = xmm0[0],xmm1[1] 1295; X32-SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm1[0,2,2,3] 1296; X32-SSE-NEXT: psraw $2, %xmm1 1297; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[1,3,2,3] 1298; X32-SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 1299; X32-SSE-NEXT: movdqa {{.*#+}} xmm0 = [65535,0,65535,0,65535,0,65535,0] 1300; X32-SSE-NEXT: movdqa %xmm2, %xmm1 1301; X32-SSE-NEXT: pand %xmm0, %xmm1 1302; X32-SSE-NEXT: psraw $1, %xmm2 1303; X32-SSE-NEXT: pandn %xmm2, %xmm0 1304; X32-SSE-NEXT: por %xmm1, %xmm0 1305; X32-SSE-NEXT: retl 1306 %shift = ashr <8 x i16> %a, <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7> 1307 ret <8 x i16> %shift 1308} 1309 1310define <16 x i8> @constant_shift_v16i8(<16 x i8> %a) nounwind { 1311; SSE2-LABEL: constant_shift_v16i8: 1312; SSE2: # BB#0: 1313; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 1314; SSE2-NEXT: movdqa {{.*#+}} xmm3 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0] 1315; SSE2-NEXT: psllw $5, %xmm3 1316; SSE2-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm3[8],xmm4[9],xmm3[9],xmm4[10],xmm3[10],xmm4[11],xmm3[11],xmm4[12],xmm3[12],xmm4[13],xmm3[13],xmm4[14],xmm3[14],xmm4[15],xmm3[15] 1317; SSE2-NEXT: pxor %xmm2, %xmm2 1318; SSE2-NEXT: pxor %xmm5, %xmm5 1319; SSE2-NEXT: pcmpgtw %xmm4, %xmm5 1320; SSE2-NEXT: movdqa %xmm5, %xmm6 1321; SSE2-NEXT: pandn %xmm1, %xmm6 1322; SSE2-NEXT: psraw $4, %xmm1 1323; SSE2-NEXT: pand %xmm5, %xmm1 1324; SSE2-NEXT: por %xmm6, %xmm1 1325; SSE2-NEXT: paddw %xmm4, %xmm4 1326; SSE2-NEXT: pxor %xmm5, %xmm5 1327; SSE2-NEXT: pcmpgtw %xmm4, %xmm5 1328; SSE2-NEXT: movdqa %xmm5, %xmm6 1329; SSE2-NEXT: pandn %xmm1, %xmm6 1330; SSE2-NEXT: psraw $2, %xmm1 1331; SSE2-NEXT: pand %xmm5, %xmm1 1332; SSE2-NEXT: por %xmm6, %xmm1 1333; SSE2-NEXT: paddw %xmm4, %xmm4 1334; SSE2-NEXT: pxor %xmm5, %xmm5 1335; SSE2-NEXT: pcmpgtw %xmm4, %xmm5 1336; SSE2-NEXT: movdqa %xmm5, %xmm4 1337; SSE2-NEXT: pandn %xmm1, %xmm4 1338; SSE2-NEXT: psraw $1, %xmm1 1339; SSE2-NEXT: pand %xmm5, %xmm1 1340; SSE2-NEXT: por %xmm4, %xmm1 1341; SSE2-NEXT: psrlw $8, %xmm1 1342; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1343; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1344; SSE2-NEXT: pxor %xmm4, %xmm4 1345; SSE2-NEXT: pcmpgtw %xmm3, %xmm4 1346; SSE2-NEXT: movdqa %xmm4, %xmm5 1347; SSE2-NEXT: pandn %xmm0, %xmm5 1348; SSE2-NEXT: psraw $4, %xmm0 1349; SSE2-NEXT: pand %xmm4, %xmm0 1350; SSE2-NEXT: por %xmm5, %xmm0 1351; SSE2-NEXT: paddw %xmm3, %xmm3 1352; SSE2-NEXT: pxor %xmm4, %xmm4 1353; SSE2-NEXT: pcmpgtw %xmm3, %xmm4 1354; SSE2-NEXT: movdqa %xmm4, %xmm5 1355; SSE2-NEXT: pandn %xmm0, %xmm5 1356; SSE2-NEXT: psraw $2, %xmm0 1357; SSE2-NEXT: pand %xmm4, %xmm0 1358; SSE2-NEXT: por %xmm5, %xmm0 1359; SSE2-NEXT: paddw %xmm3, %xmm3 1360; SSE2-NEXT: pcmpgtw %xmm3, %xmm2 1361; SSE2-NEXT: movdqa %xmm2, %xmm3 1362; SSE2-NEXT: pandn %xmm0, %xmm3 1363; SSE2-NEXT: psraw $1, %xmm0 1364; SSE2-NEXT: pand %xmm2, %xmm0 1365; SSE2-NEXT: por %xmm3, %xmm0 1366; SSE2-NEXT: psrlw $8, %xmm0 1367; SSE2-NEXT: packuswb %xmm1, %xmm0 1368; SSE2-NEXT: retq 1369; 1370; SSE41-LABEL: constant_shift_v16i8: 1371; SSE41: # BB#0: 1372; SSE41-NEXT: movdqa %xmm0, %xmm1 1373; SSE41-NEXT: movdqa {{.*#+}} xmm3 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0] 1374; SSE41-NEXT: psllw $5, %xmm3 1375; SSE41-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8],xmm3[8],xmm0[9],xmm3[9],xmm0[10],xmm3[10],xmm0[11],xmm3[11],xmm0[12],xmm3[12],xmm0[13],xmm3[13],xmm0[14],xmm3[14],xmm0[15],xmm3[15] 1376; SSE41-NEXT: punpckhbw {{.*#+}} xmm2 = xmm2[8],xmm1[8],xmm2[9],xmm1[9],xmm2[10],xmm1[10],xmm2[11],xmm1[11],xmm2[12],xmm1[12],xmm2[13],xmm1[13],xmm2[14],xmm1[14],xmm2[15],xmm1[15] 1377; SSE41-NEXT: movdqa %xmm2, %xmm4 1378; SSE41-NEXT: psraw $4, %xmm4 1379; SSE41-NEXT: pblendvb %xmm4, %xmm2 1380; SSE41-NEXT: movdqa %xmm2, %xmm4 1381; SSE41-NEXT: psraw $2, %xmm4 1382; SSE41-NEXT: paddw %xmm0, %xmm0 1383; SSE41-NEXT: pblendvb %xmm4, %xmm2 1384; SSE41-NEXT: movdqa %xmm2, %xmm4 1385; SSE41-NEXT: psraw $1, %xmm4 1386; SSE41-NEXT: paddw %xmm0, %xmm0 1387; SSE41-NEXT: pblendvb %xmm4, %xmm2 1388; SSE41-NEXT: psrlw $8, %xmm2 1389; SSE41-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 1390; SSE41-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1391; SSE41-NEXT: movdqa %xmm1, %xmm3 1392; SSE41-NEXT: psraw $4, %xmm3 1393; SSE41-NEXT: pblendvb %xmm3, %xmm1 1394; SSE41-NEXT: movdqa %xmm1, %xmm3 1395; SSE41-NEXT: psraw $2, %xmm3 1396; SSE41-NEXT: paddw %xmm0, %xmm0 1397; SSE41-NEXT: pblendvb %xmm3, %xmm1 1398; SSE41-NEXT: movdqa %xmm1, %xmm3 1399; SSE41-NEXT: psraw $1, %xmm3 1400; SSE41-NEXT: paddw %xmm0, %xmm0 1401; SSE41-NEXT: pblendvb %xmm3, %xmm1 1402; SSE41-NEXT: psrlw $8, %xmm1 1403; SSE41-NEXT: packuswb %xmm2, %xmm1 1404; SSE41-NEXT: movdqa %xmm1, %xmm0 1405; SSE41-NEXT: retq 1406; 1407; AVX-LABEL: constant_shift_v16i8: 1408; AVX: # BB#0: 1409; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0] 1410; AVX-NEXT: vpsllw $5, %xmm1, %xmm1 1411; AVX-NEXT: vpunpckhbw {{.*#+}} xmm2 = xmm0[8],xmm1[8],xmm0[9],xmm1[9],xmm0[10],xmm1[10],xmm0[11],xmm1[11],xmm0[12],xmm1[12],xmm0[13],xmm1[13],xmm0[14],xmm1[14],xmm0[15],xmm1[15] 1412; AVX-NEXT: vpunpckhbw {{.*#+}} xmm3 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 1413; AVX-NEXT: vpsraw $4, %xmm3, %xmm4 1414; AVX-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm3 1415; AVX-NEXT: vpsraw $2, %xmm3, %xmm4 1416; AVX-NEXT: vpaddw %xmm2, %xmm2, %xmm2 1417; AVX-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm3 1418; AVX-NEXT: vpsraw $1, %xmm3, %xmm4 1419; AVX-NEXT: vpaddw %xmm2, %xmm2, %xmm2 1420; AVX-NEXT: vpblendvb %xmm2, %xmm4, %xmm3, %xmm2 1421; AVX-NEXT: vpsrlw $8, %xmm2, %xmm2 1422; AVX-NEXT: vpunpcklbw {{.*#+}} xmm1 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 1423; AVX-NEXT: vpunpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1424; AVX-NEXT: vpsraw $4, %xmm0, %xmm3 1425; AVX-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 1426; AVX-NEXT: vpsraw $2, %xmm0, %xmm3 1427; AVX-NEXT: vpaddw %xmm1, %xmm1, %xmm1 1428; AVX-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 1429; AVX-NEXT: vpsraw $1, %xmm0, %xmm3 1430; AVX-NEXT: vpaddw %xmm1, %xmm1, %xmm1 1431; AVX-NEXT: vpblendvb %xmm1, %xmm3, %xmm0, %xmm0 1432; AVX-NEXT: vpsrlw $8, %xmm0, %xmm0 1433; AVX-NEXT: vpackuswb %xmm2, %xmm0, %xmm0 1434; AVX-NEXT: retq 1435; 1436; XOP-LABEL: constant_shift_v16i8: 1437; XOP: # BB#0: 1438; XOP-NEXT: vpxor %xmm1, %xmm1, %xmm1 1439; XOP-NEXT: vpsubb {{.*}}(%rip), %xmm1, %xmm1 1440; XOP-NEXT: vpshab %xmm1, %xmm0, %xmm0 1441; XOP-NEXT: retq 1442; 1443; AVX512-LABEL: constant_shift_v16i8: 1444; AVX512: # BB#0: 1445; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0 1446; AVX512-NEXT: vpsravd {{.*}}(%rip), %zmm0, %zmm0 1447; AVX512-NEXT: vpmovdb %zmm0, %xmm0 1448; AVX512-NEXT: retq 1449; 1450; AVX512VL-LABEL: constant_shift_v16i8: 1451; AVX512VL: # BB#0: 1452; AVX512VL-NEXT: vpmovsxbd %xmm0, %zmm0 1453; AVX512VL-NEXT: vpsravd {{.*}}(%rip), %zmm0, %zmm0 1454; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 1455; AVX512VL-NEXT: retq 1456; 1457; X32-SSE-LABEL: constant_shift_v16i8: 1458; X32-SSE: # BB#0: 1459; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 1460; X32-SSE-NEXT: movdqa {{.*#+}} xmm3 = [0,1,2,3,4,5,6,7,7,6,5,4,3,2,1,0] 1461; X32-SSE-NEXT: psllw $5, %xmm3 1462; X32-SSE-NEXT: punpckhbw {{.*#+}} xmm4 = xmm4[8],xmm3[8],xmm4[9],xmm3[9],xmm4[10],xmm3[10],xmm4[11],xmm3[11],xmm4[12],xmm3[12],xmm4[13],xmm3[13],xmm4[14],xmm3[14],xmm4[15],xmm3[15] 1463; X32-SSE-NEXT: pxor %xmm2, %xmm2 1464; X32-SSE-NEXT: pxor %xmm5, %xmm5 1465; X32-SSE-NEXT: pcmpgtw %xmm4, %xmm5 1466; X32-SSE-NEXT: movdqa %xmm5, %xmm6 1467; X32-SSE-NEXT: pandn %xmm1, %xmm6 1468; X32-SSE-NEXT: psraw $4, %xmm1 1469; X32-SSE-NEXT: pand %xmm5, %xmm1 1470; X32-SSE-NEXT: por %xmm6, %xmm1 1471; X32-SSE-NEXT: paddw %xmm4, %xmm4 1472; X32-SSE-NEXT: pxor %xmm5, %xmm5 1473; X32-SSE-NEXT: pcmpgtw %xmm4, %xmm5 1474; X32-SSE-NEXT: movdqa %xmm5, %xmm6 1475; X32-SSE-NEXT: pandn %xmm1, %xmm6 1476; X32-SSE-NEXT: psraw $2, %xmm1 1477; X32-SSE-NEXT: pand %xmm5, %xmm1 1478; X32-SSE-NEXT: por %xmm6, %xmm1 1479; X32-SSE-NEXT: paddw %xmm4, %xmm4 1480; X32-SSE-NEXT: pxor %xmm5, %xmm5 1481; X32-SSE-NEXT: pcmpgtw %xmm4, %xmm5 1482; X32-SSE-NEXT: movdqa %xmm5, %xmm4 1483; X32-SSE-NEXT: pandn %xmm1, %xmm4 1484; X32-SSE-NEXT: psraw $1, %xmm1 1485; X32-SSE-NEXT: pand %xmm5, %xmm1 1486; X32-SSE-NEXT: por %xmm4, %xmm1 1487; X32-SSE-NEXT: psrlw $8, %xmm1 1488; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1489; X32-SSE-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1490; X32-SSE-NEXT: pxor %xmm4, %xmm4 1491; X32-SSE-NEXT: pcmpgtw %xmm3, %xmm4 1492; X32-SSE-NEXT: movdqa %xmm4, %xmm5 1493; X32-SSE-NEXT: pandn %xmm0, %xmm5 1494; X32-SSE-NEXT: psraw $4, %xmm0 1495; X32-SSE-NEXT: pand %xmm4, %xmm0 1496; X32-SSE-NEXT: por %xmm5, %xmm0 1497; X32-SSE-NEXT: paddw %xmm3, %xmm3 1498; X32-SSE-NEXT: pxor %xmm4, %xmm4 1499; X32-SSE-NEXT: pcmpgtw %xmm3, %xmm4 1500; X32-SSE-NEXT: movdqa %xmm4, %xmm5 1501; X32-SSE-NEXT: pandn %xmm0, %xmm5 1502; X32-SSE-NEXT: psraw $2, %xmm0 1503; X32-SSE-NEXT: pand %xmm4, %xmm0 1504; X32-SSE-NEXT: por %xmm5, %xmm0 1505; X32-SSE-NEXT: paddw %xmm3, %xmm3 1506; X32-SSE-NEXT: pcmpgtw %xmm3, %xmm2 1507; X32-SSE-NEXT: movdqa %xmm2, %xmm3 1508; X32-SSE-NEXT: pandn %xmm0, %xmm3 1509; X32-SSE-NEXT: psraw $1, %xmm0 1510; X32-SSE-NEXT: pand %xmm2, %xmm0 1511; X32-SSE-NEXT: por %xmm3, %xmm0 1512; X32-SSE-NEXT: psrlw $8, %xmm0 1513; X32-SSE-NEXT: packuswb %xmm1, %xmm0 1514; X32-SSE-NEXT: retl 1515 %shift = ashr <16 x i8> %a, <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0> 1516 ret <16 x i8> %shift 1517} 1518 1519; 1520; Uniform Constant Shifts 1521; 1522 1523define <2 x i64> @splatconstant_shift_v2i64(<2 x i64> %a) nounwind { 1524; SSE2-LABEL: splatconstant_shift_v2i64: 1525; SSE2: # BB#0: 1526; SSE2-NEXT: movdqa %xmm0, %xmm1 1527; SSE2-NEXT: psrad $7, %xmm1 1528; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3] 1529; SSE2-NEXT: psrlq $7, %xmm0 1530; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1531; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1532; SSE2-NEXT: retq 1533; 1534; SSE41-LABEL: splatconstant_shift_v2i64: 1535; SSE41: # BB#0: 1536; SSE41-NEXT: movdqa %xmm0, %xmm1 1537; SSE41-NEXT: psrad $7, %xmm1 1538; SSE41-NEXT: psrlq $7, %xmm0 1539; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 1540; SSE41-NEXT: retq 1541; 1542; AVX1-LABEL: splatconstant_shift_v2i64: 1543; AVX1: # BB#0: 1544; AVX1-NEXT: vpsrad $7, %xmm0, %xmm1 1545; AVX1-NEXT: vpsrlq $7, %xmm0, %xmm0 1546; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,3],xmm0[4,5],xmm1[6,7] 1547; AVX1-NEXT: retq 1548; 1549; AVX2-LABEL: splatconstant_shift_v2i64: 1550; AVX2: # BB#0: 1551; AVX2-NEXT: vpsrad $7, %xmm0, %xmm1 1552; AVX2-NEXT: vpsrlq $7, %xmm0, %xmm0 1553; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] 1554; AVX2-NEXT: retq 1555; 1556; XOP-LABEL: splatconstant_shift_v2i64: 1557; XOP: # BB#0: 1558; XOP-NEXT: vpxor %xmm1, %xmm1, %xmm1 1559; XOP-NEXT: vpsubq {{.*}}(%rip), %xmm1, %xmm1 1560; XOP-NEXT: vpshaq %xmm1, %xmm0, %xmm0 1561; XOP-NEXT: retq 1562; 1563; AVX512-LABEL: splatconstant_shift_v2i64: 1564; AVX512: # BB#0: 1565; AVX512-NEXT: vpsrad $7, %xmm0, %xmm1 1566; AVX512-NEXT: vpsrlq $7, %xmm0, %xmm0 1567; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3] 1568; AVX512-NEXT: retq 1569; 1570; AVX512VL-LABEL: splatconstant_shift_v2i64: 1571; AVX512VL: # BB#0: 1572; AVX512VL-NEXT: vpsraq $7, %xmm0, %xmm0 1573; AVX512VL-NEXT: retq 1574; 1575; X32-SSE-LABEL: splatconstant_shift_v2i64: 1576; X32-SSE: # BB#0: 1577; X32-SSE-NEXT: movdqa %xmm0, %xmm1 1578; X32-SSE-NEXT: psrad $7, %xmm1 1579; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3] 1580; X32-SSE-NEXT: psrlq $7, %xmm0 1581; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 1582; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1583; X32-SSE-NEXT: retl 1584 %shift = ashr <2 x i64> %a, <i64 7, i64 7> 1585 ret <2 x i64> %shift 1586} 1587 1588define <4 x i32> @splatconstant_shift_v4i32(<4 x i32> %a) nounwind { 1589; SSE-LABEL: splatconstant_shift_v4i32: 1590; SSE: # BB#0: 1591; SSE-NEXT: psrad $5, %xmm0 1592; SSE-NEXT: retq 1593; 1594; AVX-LABEL: splatconstant_shift_v4i32: 1595; AVX: # BB#0: 1596; AVX-NEXT: vpsrad $5, %xmm0, %xmm0 1597; AVX-NEXT: retq 1598; 1599; XOP-LABEL: splatconstant_shift_v4i32: 1600; XOP: # BB#0: 1601; XOP-NEXT: vpsrad $5, %xmm0, %xmm0 1602; XOP-NEXT: retq 1603; 1604; AVX512-LABEL: splatconstant_shift_v4i32: 1605; AVX512: # BB#0: 1606; AVX512-NEXT: vpsrad $5, %xmm0, %xmm0 1607; AVX512-NEXT: retq 1608; 1609; AVX512VL-LABEL: splatconstant_shift_v4i32: 1610; AVX512VL: # BB#0: 1611; AVX512VL-NEXT: vpsrad $5, %xmm0, %xmm0 1612; AVX512VL-NEXT: retq 1613; 1614; X32-SSE-LABEL: splatconstant_shift_v4i32: 1615; X32-SSE: # BB#0: 1616; X32-SSE-NEXT: psrad $5, %xmm0 1617; X32-SSE-NEXT: retl 1618 %shift = ashr <4 x i32> %a, <i32 5, i32 5, i32 5, i32 5> 1619 ret <4 x i32> %shift 1620} 1621 1622define <8 x i16> @splatconstant_shift_v8i16(<8 x i16> %a) nounwind { 1623; SSE-LABEL: splatconstant_shift_v8i16: 1624; SSE: # BB#0: 1625; SSE-NEXT: psraw $3, %xmm0 1626; SSE-NEXT: retq 1627; 1628; AVX-LABEL: splatconstant_shift_v8i16: 1629; AVX: # BB#0: 1630; AVX-NEXT: vpsraw $3, %xmm0, %xmm0 1631; AVX-NEXT: retq 1632; 1633; XOP-LABEL: splatconstant_shift_v8i16: 1634; XOP: # BB#0: 1635; XOP-NEXT: vpsraw $3, %xmm0, %xmm0 1636; XOP-NEXT: retq 1637; 1638; AVX512-LABEL: splatconstant_shift_v8i16: 1639; AVX512: # BB#0: 1640; AVX512-NEXT: vpsraw $3, %xmm0, %xmm0 1641; AVX512-NEXT: retq 1642; 1643; AVX512VL-LABEL: splatconstant_shift_v8i16: 1644; AVX512VL: # BB#0: 1645; AVX512VL-NEXT: vpsraw $3, %xmm0, %xmm0 1646; AVX512VL-NEXT: retq 1647; 1648; X32-SSE-LABEL: splatconstant_shift_v8i16: 1649; X32-SSE: # BB#0: 1650; X32-SSE-NEXT: psraw $3, %xmm0 1651; X32-SSE-NEXT: retl 1652 %shift = ashr <8 x i16> %a, <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3> 1653 ret <8 x i16> %shift 1654} 1655 1656define <16 x i8> @splatconstant_shift_v16i8(<16 x i8> %a) nounwind { 1657; SSE-LABEL: splatconstant_shift_v16i8: 1658; SSE: # BB#0: 1659; SSE-NEXT: psrlw $3, %xmm0 1660; SSE-NEXT: pand {{.*}}(%rip), %xmm0 1661; SSE-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] 1662; SSE-NEXT: pxor %xmm1, %xmm0 1663; SSE-NEXT: psubb %xmm1, %xmm0 1664; SSE-NEXT: retq 1665; 1666; AVX-LABEL: splatconstant_shift_v16i8: 1667; AVX: # BB#0: 1668; AVX-NEXT: vpsrlw $3, %xmm0, %xmm0 1669; AVX-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 1670; AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] 1671; AVX-NEXT: vpxor %xmm1, %xmm0, %xmm0 1672; AVX-NEXT: vpsubb %xmm1, %xmm0, %xmm0 1673; AVX-NEXT: retq 1674; 1675; XOP-LABEL: splatconstant_shift_v16i8: 1676; XOP: # BB#0: 1677; XOP-NEXT: vpxor %xmm1, %xmm1, %xmm1 1678; XOP-NEXT: vpsubb {{.*}}(%rip), %xmm1, %xmm1 1679; XOP-NEXT: vpshab %xmm1, %xmm0, %xmm0 1680; XOP-NEXT: retq 1681; 1682; AVX512-LABEL: splatconstant_shift_v16i8: 1683; AVX512: # BB#0: 1684; AVX512-NEXT: vpsrlw $3, %xmm0, %xmm0 1685; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 1686; AVX512-NEXT: vmovdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] 1687; AVX512-NEXT: vpxor %xmm1, %xmm0, %xmm0 1688; AVX512-NEXT: vpsubb %xmm1, %xmm0, %xmm0 1689; AVX512-NEXT: retq 1690; 1691; AVX512VL-LABEL: splatconstant_shift_v16i8: 1692; AVX512VL: # BB#0: 1693; AVX512VL-NEXT: vpsrlw $3, %xmm0, %xmm0 1694; AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 1695; AVX512VL-NEXT: vmovdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] 1696; AVX512VL-NEXT: vpxor %xmm1, %xmm0, %xmm0 1697; AVX512VL-NEXT: vpsubb %xmm1, %xmm0, %xmm0 1698; AVX512VL-NEXT: retq 1699; 1700; X32-SSE-LABEL: splatconstant_shift_v16i8: 1701; X32-SSE: # BB#0: 1702; X32-SSE-NEXT: psrlw $3, %xmm0 1703; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm0 1704; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16] 1705; X32-SSE-NEXT: pxor %xmm1, %xmm0 1706; X32-SSE-NEXT: psubb %xmm1, %xmm0 1707; X32-SSE-NEXT: retl 1708 %shift = ashr <16 x i8> %a, <i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3, i8 3> 1709 ret <16 x i8> %shift 1710} 1711