1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F 8; 9; Just one 32-bit run to make sure we do reasonable things there. 10; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32-SSE41 11 12define <8 x i16> @sext_16i8_to_8i16(<16 x i8> %A) nounwind uwtable readnone ssp { 13; SSE2-LABEL: sext_16i8_to_8i16: 14; SSE2: # BB#0: # %entry 15; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 16; SSE2-NEXT: psraw $8, %xmm0 17; SSE2-NEXT: retq 18; 19; SSSE3-LABEL: sext_16i8_to_8i16: 20; SSSE3: # BB#0: # %entry 21; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 22; SSSE3-NEXT: psraw $8, %xmm0 23; SSSE3-NEXT: retq 24; 25; SSE41-LABEL: sext_16i8_to_8i16: 26; SSE41: # BB#0: # %entry 27; SSE41-NEXT: pmovsxbw %xmm0, %xmm0 28; SSE41-NEXT: retq 29; 30; AVX-LABEL: sext_16i8_to_8i16: 31; AVX: # BB#0: # %entry 32; AVX-NEXT: vpmovsxbw %xmm0, %xmm0 33; AVX-NEXT: retq 34; 35; X32-SSE41-LABEL: sext_16i8_to_8i16: 36; X32-SSE41: # BB#0: # %entry 37; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm0 38; X32-SSE41-NEXT: retl 39entry: 40 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 41 %C = sext <8 x i8> %B to <8 x i16> 42 ret <8 x i16> %C 43} 44 45define <16 x i16> @sext_16i8_to_16i16(<16 x i8> %A) nounwind uwtable readnone ssp { 46; SSE2-LABEL: sext_16i8_to_16i16: 47; SSE2: # BB#0: # %entry 48; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 49; SSE2-NEXT: psraw $8, %xmm2 50; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 51; SSE2-NEXT: psraw $8, %xmm1 52; SSE2-NEXT: movdqa %xmm2, %xmm0 53; SSE2-NEXT: retq 54; 55; SSSE3-LABEL: sext_16i8_to_16i16: 56; SSSE3: # BB#0: # %entry 57; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 58; SSSE3-NEXT: psraw $8, %xmm2 59; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 60; SSSE3-NEXT: psraw $8, %xmm1 61; SSSE3-NEXT: movdqa %xmm2, %xmm0 62; SSSE3-NEXT: retq 63; 64; SSE41-LABEL: sext_16i8_to_16i16: 65; SSE41: # BB#0: # %entry 66; SSE41-NEXT: pmovsxbw %xmm0, %xmm2 67; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 68; SSE41-NEXT: pmovsxbw %xmm0, %xmm1 69; SSE41-NEXT: movdqa %xmm2, %xmm0 70; SSE41-NEXT: retq 71; 72; AVX1-LABEL: sext_16i8_to_16i16: 73; AVX1: # BB#0: # %entry 74; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1 75; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 76; AVX1-NEXT: vpmovsxbw %xmm0, %xmm0 77; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 78; AVX1-NEXT: retq 79; 80; AVX2-LABEL: sext_16i8_to_16i16: 81; AVX2: # BB#0: # %entry 82; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0 83; AVX2-NEXT: retq 84; 85; AVX512-LABEL: sext_16i8_to_16i16: 86; AVX512: # BB#0: # %entry 87; AVX512-NEXT: vpmovsxbw %xmm0, %ymm0 88; AVX512-NEXT: retq 89; 90; X32-SSE41-LABEL: sext_16i8_to_16i16: 91; X32-SSE41: # BB#0: # %entry 92; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm2 93; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 94; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm1 95; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 96; X32-SSE41-NEXT: retl 97entry: 98 %B = sext <16 x i8> %A to <16 x i16> 99 ret <16 x i16> %B 100} 101 102define <4 x i32> @sext_16i8_to_4i32(<16 x i8> %A) nounwind uwtable readnone ssp { 103; SSE2-LABEL: sext_16i8_to_4i32: 104; SSE2: # BB#0: # %entry 105; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 106; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 107; SSE2-NEXT: psrad $24, %xmm0 108; SSE2-NEXT: retq 109; 110; SSSE3-LABEL: sext_16i8_to_4i32: 111; SSSE3: # BB#0: # %entry 112; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 113; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 114; SSSE3-NEXT: psrad $24, %xmm0 115; SSSE3-NEXT: retq 116; 117; SSE41-LABEL: sext_16i8_to_4i32: 118; SSE41: # BB#0: # %entry 119; SSE41-NEXT: pmovsxbd %xmm0, %xmm0 120; SSE41-NEXT: retq 121; 122; AVX-LABEL: sext_16i8_to_4i32: 123; AVX: # BB#0: # %entry 124; AVX-NEXT: vpmovsxbd %xmm0, %xmm0 125; AVX-NEXT: retq 126; 127; X32-SSE41-LABEL: sext_16i8_to_4i32: 128; X32-SSE41: # BB#0: # %entry 129; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm0 130; X32-SSE41-NEXT: retl 131entry: 132 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 133 %C = sext <4 x i8> %B to <4 x i32> 134 ret <4 x i32> %C 135} 136 137define <8 x i32> @sext_16i8_to_8i32(<16 x i8> %A) nounwind uwtable readnone ssp { 138; SSE2-LABEL: sext_16i8_to_8i32: 139; SSE2: # BB#0: # %entry 140; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 141; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 142; SSE2-NEXT: psrad $24, %xmm2 143; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 144; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 145; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 146; SSE2-NEXT: psrad $24, %xmm1 147; SSE2-NEXT: movdqa %xmm2, %xmm0 148; SSE2-NEXT: retq 149; 150; SSSE3-LABEL: sext_16i8_to_8i32: 151; SSSE3: # BB#0: # %entry 152; SSSE3-NEXT: movdqa %xmm0, %xmm1 153; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 154; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 155; SSSE3-NEXT: psrad $24, %xmm0 156; SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[u,u,u,4,u,u,u,5,u,u,u,6,u,u,u,7] 157; SSSE3-NEXT: psrad $24, %xmm1 158; SSSE3-NEXT: retq 159; 160; SSE41-LABEL: sext_16i8_to_8i32: 161; SSE41: # BB#0: # %entry 162; SSE41-NEXT: pmovsxbd %xmm0, %xmm2 163; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 164; SSE41-NEXT: pmovsxbd %xmm0, %xmm1 165; SSE41-NEXT: movdqa %xmm2, %xmm0 166; SSE41-NEXT: retq 167; 168; AVX1-LABEL: sext_16i8_to_8i32: 169; AVX1: # BB#0: # %entry 170; AVX1-NEXT: vpmovsxbd %xmm0, %xmm1 171; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 172; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 173; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 174; AVX1-NEXT: retq 175; 176; AVX2-LABEL: sext_16i8_to_8i32: 177; AVX2: # BB#0: # %entry 178; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0 179; AVX2-NEXT: retq 180; 181; AVX512-LABEL: sext_16i8_to_8i32: 182; AVX512: # BB#0: # %entry 183; AVX512-NEXT: vpmovsxbd %xmm0, %ymm0 184; AVX512-NEXT: retq 185; 186; X32-SSE41-LABEL: sext_16i8_to_8i32: 187; X32-SSE41: # BB#0: # %entry 188; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm2 189; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 190; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm1 191; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 192; X32-SSE41-NEXT: retl 193entry: 194 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 195 %C = sext <8 x i8> %B to <8 x i32> 196 ret <8 x i32> %C 197} 198 199define <2 x i64> @sext_16i8_to_2i64(<16 x i8> %A) nounwind uwtable readnone ssp { 200; SSE2-LABEL: sext_16i8_to_2i64: 201; SSE2: # BB#0: # %entry 202; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 203; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 204; SSE2-NEXT: movdqa %xmm0, %xmm1 205; SSE2-NEXT: psrad $31, %xmm1 206; SSE2-NEXT: psrad $24, %xmm0 207; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 208; SSE2-NEXT: retq 209; 210; SSSE3-LABEL: sext_16i8_to_2i64: 211; SSSE3: # BB#0: # %entry 212; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 213; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 214; SSSE3-NEXT: movdqa %xmm0, %xmm1 215; SSSE3-NEXT: psrad $31, %xmm1 216; SSSE3-NEXT: psrad $24, %xmm0 217; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 218; SSSE3-NEXT: retq 219; 220; SSE41-LABEL: sext_16i8_to_2i64: 221; SSE41: # BB#0: # %entry 222; SSE41-NEXT: pmovsxbq %xmm0, %xmm0 223; SSE41-NEXT: retq 224; 225; AVX-LABEL: sext_16i8_to_2i64: 226; AVX: # BB#0: # %entry 227; AVX-NEXT: vpmovsxbq %xmm0, %xmm0 228; AVX-NEXT: retq 229; 230; X32-SSE41-LABEL: sext_16i8_to_2i64: 231; X32-SSE41: # BB#0: # %entry 232; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm0 233; X32-SSE41-NEXT: retl 234entry: 235 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <2 x i32> <i32 0, i32 1> 236 %C = sext <2 x i8> %B to <2 x i64> 237 ret <2 x i64> %C 238} 239 240define <4 x i64> @sext_16i8_to_4i64(<16 x i8> %A) nounwind uwtable readnone ssp { 241; SSE2-LABEL: sext_16i8_to_4i64: 242; SSE2: # BB#0: # %entry 243; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 244; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 245; SSE2-NEXT: movdqa %xmm2, %xmm1 246; SSE2-NEXT: psrad $31, %xmm1 247; SSE2-NEXT: psrad $24, %xmm2 248; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 249; SSE2-NEXT: psrld $16, %xmm0 250; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 251; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 252; SSE2-NEXT: movdqa %xmm1, %xmm0 253; SSE2-NEXT: psrad $31, %xmm0 254; SSE2-NEXT: psrad $24, %xmm1 255; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 256; SSE2-NEXT: movdqa %xmm2, %xmm0 257; SSE2-NEXT: retq 258; 259; SSSE3-LABEL: sext_16i8_to_4i64: 260; SSSE3: # BB#0: # %entry 261; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 262; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 263; SSSE3-NEXT: movdqa %xmm2, %xmm1 264; SSSE3-NEXT: psrad $31, %xmm1 265; SSSE3-NEXT: psrad $24, %xmm2 266; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 267; SSSE3-NEXT: psrld $16, %xmm0 268; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 269; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 270; SSSE3-NEXT: movdqa %xmm1, %xmm0 271; SSSE3-NEXT: psrad $31, %xmm0 272; SSSE3-NEXT: psrad $24, %xmm1 273; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 274; SSSE3-NEXT: movdqa %xmm2, %xmm0 275; SSSE3-NEXT: retq 276; 277; SSE41-LABEL: sext_16i8_to_4i64: 278; SSE41: # BB#0: # %entry 279; SSE41-NEXT: pmovsxbq %xmm0, %xmm2 280; SSE41-NEXT: psrld $16, %xmm0 281; SSE41-NEXT: pmovsxbq %xmm0, %xmm1 282; SSE41-NEXT: movdqa %xmm2, %xmm0 283; SSE41-NEXT: retq 284; 285; AVX1-LABEL: sext_16i8_to_4i64: 286; AVX1: # BB#0: # %entry 287; AVX1-NEXT: vpmovsxbq %xmm0, %xmm1 288; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 289; AVX1-NEXT: vpmovsxbq %xmm0, %xmm0 290; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 291; AVX1-NEXT: retq 292; 293; AVX2-LABEL: sext_16i8_to_4i64: 294; AVX2: # BB#0: # %entry 295; AVX2-NEXT: vpmovsxbq %xmm0, %ymm0 296; AVX2-NEXT: retq 297; 298; AVX512-LABEL: sext_16i8_to_4i64: 299; AVX512: # BB#0: # %entry 300; AVX512-NEXT: vpmovsxbq %xmm0, %ymm0 301; AVX512-NEXT: retq 302; 303; X32-SSE41-LABEL: sext_16i8_to_4i64: 304; X32-SSE41: # BB#0: # %entry 305; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm2 306; X32-SSE41-NEXT: psrld $16, %xmm0 307; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm1 308; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 309; X32-SSE41-NEXT: retl 310entry: 311 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 312 %C = sext <4 x i8> %B to <4 x i64> 313 ret <4 x i64> %C 314} 315 316define <8 x i64> @sext_16i8_to_8i64(<16 x i8> %A) nounwind uwtable readnone ssp { 317; SSE2-LABEL: sext_16i8_to_8i64: 318; SSE2: # BB#0: # %entry 319; SSE2-NEXT: movdqa %xmm0, %xmm1 320; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 321; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 322; SSE2-NEXT: movdqa %xmm0, %xmm2 323; SSE2-NEXT: psrad $31, %xmm2 324; SSE2-NEXT: psrad $24, %xmm0 325; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 326; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,2,3] 327; SSE2-NEXT: psrld $16, %xmm1 328; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 329; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 330; SSE2-NEXT: movdqa %xmm1, %xmm2 331; SSE2-NEXT: psrad $31, %xmm2 332; SSE2-NEXT: psrad $24, %xmm1 333; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 334; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7] 335; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3] 336; SSE2-NEXT: movdqa %xmm2, %xmm4 337; SSE2-NEXT: psrad $31, %xmm4 338; SSE2-NEXT: psrad $24, %xmm2 339; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 340; SSE2-NEXT: psrld $16, %xmm3 341; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 342; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3] 343; SSE2-NEXT: movdqa %xmm3, %xmm4 344; SSE2-NEXT: psrad $31, %xmm4 345; SSE2-NEXT: psrad $24, %xmm3 346; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 347; SSE2-NEXT: retq 348; 349; SSSE3-LABEL: sext_16i8_to_8i64: 350; SSSE3: # BB#0: # %entry 351; SSSE3-NEXT: movdqa %xmm0, %xmm1 352; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 353; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 354; SSSE3-NEXT: movdqa %xmm0, %xmm2 355; SSSE3-NEXT: psrad $31, %xmm2 356; SSSE3-NEXT: psrad $24, %xmm0 357; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 358; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,2,3] 359; SSSE3-NEXT: psrld $16, %xmm1 360; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 361; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 362; SSSE3-NEXT: movdqa %xmm1, %xmm2 363; SSSE3-NEXT: psrad $31, %xmm2 364; SSSE3-NEXT: psrad $24, %xmm1 365; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 366; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7] 367; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3] 368; SSSE3-NEXT: movdqa %xmm2, %xmm4 369; SSSE3-NEXT: psrad $31, %xmm4 370; SSSE3-NEXT: psrad $24, %xmm2 371; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 372; SSSE3-NEXT: psrld $16, %xmm3 373; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 374; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3] 375; SSSE3-NEXT: movdqa %xmm3, %xmm4 376; SSSE3-NEXT: psrad $31, %xmm4 377; SSSE3-NEXT: psrad $24, %xmm3 378; SSSE3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 379; SSSE3-NEXT: retq 380; 381; SSE41-LABEL: sext_16i8_to_8i64: 382; SSE41: # BB#0: # %entry 383; SSE41-NEXT: pmovsxbq %xmm0, %xmm4 384; SSE41-NEXT: movdqa %xmm0, %xmm1 385; SSE41-NEXT: psrld $16, %xmm1 386; SSE41-NEXT: pmovsxbq %xmm1, %xmm1 387; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] 388; SSE41-NEXT: pmovsxbq %xmm2, %xmm2 389; SSE41-NEXT: psrlq $48, %xmm0 390; SSE41-NEXT: pmovsxbq %xmm0, %xmm3 391; SSE41-NEXT: movdqa %xmm4, %xmm0 392; SSE41-NEXT: retq 393; 394; AVX1-LABEL: sext_16i8_to_8i64: 395; AVX1: # BB#0: # %entry 396; AVX1-NEXT: vpmovsxbq %xmm0, %xmm1 397; AVX1-NEXT: vpsrld $16, %xmm0, %xmm2 398; AVX1-NEXT: vpmovsxbq %xmm2, %xmm2 399; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 400; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 401; AVX1-NEXT: vpmovsxbq %xmm1, %xmm1 402; AVX1-NEXT: vpsrlq $48, %xmm0, %xmm0 403; AVX1-NEXT: vpmovsxbq %xmm0, %xmm0 404; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 405; AVX1-NEXT: vmovaps %ymm2, %ymm0 406; AVX1-NEXT: retq 407; 408; AVX2-LABEL: sext_16i8_to_8i64: 409; AVX2: # BB#0: # %entry 410; AVX2-NEXT: vpmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 411; AVX2-NEXT: vpslld $24, %xmm1, %xmm1 412; AVX2-NEXT: vpsrad $24, %xmm1, %xmm1 413; AVX2-NEXT: vpmovsxdq %xmm1, %ymm2 414; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 415; AVX2-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 416; AVX2-NEXT: vpslld $24, %xmm0, %xmm0 417; AVX2-NEXT: vpsrad $24, %xmm0, %xmm0 418; AVX2-NEXT: vpmovsxdq %xmm0, %ymm1 419; AVX2-NEXT: vmovdqa %ymm2, %ymm0 420; AVX2-NEXT: retq 421; 422; AVX512-LABEL: sext_16i8_to_8i64: 423; AVX512: # BB#0: # %entry 424; AVX512-NEXT: vpmovzxbq {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero,xmm0[4],zero,zero,zero,zero,zero,zero,zero,xmm0[5],zero,zero,zero,zero,zero,zero,zero,xmm0[6],zero,zero,zero,zero,zero,zero,zero,xmm0[7],zero,zero,zero,zero,zero,zero,zero 425; AVX512-NEXT: vpsllq $56, %zmm0, %zmm0 426; AVX512-NEXT: vpsraq $56, %zmm0, %zmm0 427; AVX512-NEXT: retq 428; 429; X32-SSE41-LABEL: sext_16i8_to_8i64: 430; X32-SSE41: # BB#0: # %entry 431; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm4 432; X32-SSE41-NEXT: movdqa %xmm0, %xmm1 433; X32-SSE41-NEXT: psrld $16, %xmm1 434; X32-SSE41-NEXT: pmovsxbq %xmm1, %xmm1 435; X32-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] 436; X32-SSE41-NEXT: pmovsxbq %xmm2, %xmm2 437; X32-SSE41-NEXT: psrlq $48, %xmm0 438; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm3 439; X32-SSE41-NEXT: movdqa %xmm4, %xmm0 440; X32-SSE41-NEXT: retl 441entry: 442 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 443 %C = sext <8 x i8> %B to <8 x i64> 444 ret <8 x i64> %C 445} 446 447define <4 x i32> @sext_8i16_to_4i32(<8 x i16> %A) nounwind uwtable readnone ssp { 448; SSE2-LABEL: sext_8i16_to_4i32: 449; SSE2: # BB#0: # %entry 450; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 451; SSE2-NEXT: psrad $16, %xmm0 452; SSE2-NEXT: retq 453; 454; SSSE3-LABEL: sext_8i16_to_4i32: 455; SSSE3: # BB#0: # %entry 456; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 457; SSSE3-NEXT: psrad $16, %xmm0 458; SSSE3-NEXT: retq 459; 460; SSE41-LABEL: sext_8i16_to_4i32: 461; SSE41: # BB#0: # %entry 462; SSE41-NEXT: pmovsxwd %xmm0, %xmm0 463; SSE41-NEXT: retq 464; 465; AVX-LABEL: sext_8i16_to_4i32: 466; AVX: # BB#0: # %entry 467; AVX-NEXT: vpmovsxwd %xmm0, %xmm0 468; AVX-NEXT: retq 469; 470; X32-SSE41-LABEL: sext_8i16_to_4i32: 471; X32-SSE41: # BB#0: # %entry 472; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm0 473; X32-SSE41-NEXT: retl 474entry: 475 %B = shufflevector <8 x i16> %A, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 476 %C = sext <4 x i16> %B to <4 x i32> 477 ret <4 x i32> %C 478} 479 480define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp { 481; SSE2-LABEL: sext_8i16_to_8i32: 482; SSE2: # BB#0: # %entry 483; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 484; SSE2-NEXT: psrad $16, %xmm2 485; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 486; SSE2-NEXT: psrad $16, %xmm1 487; SSE2-NEXT: movdqa %xmm2, %xmm0 488; SSE2-NEXT: retq 489; 490; SSSE3-LABEL: sext_8i16_to_8i32: 491; SSSE3: # BB#0: # %entry 492; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 493; SSSE3-NEXT: psrad $16, %xmm2 494; SSSE3-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 495; SSSE3-NEXT: psrad $16, %xmm1 496; SSSE3-NEXT: movdqa %xmm2, %xmm0 497; SSSE3-NEXT: retq 498; 499; SSE41-LABEL: sext_8i16_to_8i32: 500; SSE41: # BB#0: # %entry 501; SSE41-NEXT: pmovsxwd %xmm0, %xmm2 502; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 503; SSE41-NEXT: pmovsxwd %xmm0, %xmm1 504; SSE41-NEXT: movdqa %xmm2, %xmm0 505; SSE41-NEXT: retq 506; 507; AVX1-LABEL: sext_8i16_to_8i32: 508; AVX1: # BB#0: # %entry 509; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 510; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 511; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 512; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 513; AVX1-NEXT: retq 514; 515; AVX2-LABEL: sext_8i16_to_8i32: 516; AVX2: # BB#0: # %entry 517; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 518; AVX2-NEXT: retq 519; 520; AVX512-LABEL: sext_8i16_to_8i32: 521; AVX512: # BB#0: # %entry 522; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0 523; AVX512-NEXT: retq 524; 525; X32-SSE41-LABEL: sext_8i16_to_8i32: 526; X32-SSE41: # BB#0: # %entry 527; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm2 528; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 529; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm1 530; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 531; X32-SSE41-NEXT: retl 532entry: 533 %B = sext <8 x i16> %A to <8 x i32> 534 ret <8 x i32> %B 535} 536 537define <2 x i64> @sext_8i16_to_2i64(<8 x i16> %A) nounwind uwtable readnone ssp { 538; SSE2-LABEL: sext_8i16_to_2i64: 539; SSE2: # BB#0: # %entry 540; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 541; SSE2-NEXT: movdqa %xmm0, %xmm1 542; SSE2-NEXT: psrad $31, %xmm1 543; SSE2-NEXT: psrad $16, %xmm0 544; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 545; SSE2-NEXT: retq 546; 547; SSSE3-LABEL: sext_8i16_to_2i64: 548; SSSE3: # BB#0: # %entry 549; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 550; SSSE3-NEXT: movdqa %xmm0, %xmm1 551; SSSE3-NEXT: psrad $31, %xmm1 552; SSSE3-NEXT: psrad $16, %xmm0 553; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 554; SSSE3-NEXT: retq 555; 556; SSE41-LABEL: sext_8i16_to_2i64: 557; SSE41: # BB#0: # %entry 558; SSE41-NEXT: pmovsxwq %xmm0, %xmm0 559; SSE41-NEXT: retq 560; 561; AVX-LABEL: sext_8i16_to_2i64: 562; AVX: # BB#0: # %entry 563; AVX-NEXT: vpmovsxwq %xmm0, %xmm0 564; AVX-NEXT: retq 565; 566; X32-SSE41-LABEL: sext_8i16_to_2i64: 567; X32-SSE41: # BB#0: # %entry 568; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm0 569; X32-SSE41-NEXT: retl 570entry: 571 %B = shufflevector <8 x i16> %A, <8 x i16> undef, <2 x i32> <i32 0, i32 1> 572 %C = sext <2 x i16> %B to <2 x i64> 573 ret <2 x i64> %C 574} 575 576define <4 x i64> @sext_8i16_to_4i64(<8 x i16> %A) nounwind uwtable readnone ssp { 577; SSE2-LABEL: sext_8i16_to_4i64: 578; SSE2: # BB#0: # %entry 579; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 580; SSE2-NEXT: movdqa %xmm2, %xmm1 581; SSE2-NEXT: psrad $31, %xmm1 582; SSE2-NEXT: psrad $16, %xmm2 583; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 584; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 585; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 586; SSE2-NEXT: movdqa %xmm1, %xmm0 587; SSE2-NEXT: psrad $31, %xmm0 588; SSE2-NEXT: psrad $16, %xmm1 589; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 590; SSE2-NEXT: movdqa %xmm2, %xmm0 591; SSE2-NEXT: retq 592; 593; SSSE3-LABEL: sext_8i16_to_4i64: 594; SSSE3: # BB#0: # %entry 595; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 596; SSSE3-NEXT: movdqa %xmm2, %xmm1 597; SSSE3-NEXT: psrad $31, %xmm1 598; SSSE3-NEXT: psrad $16, %xmm2 599; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 600; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 601; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 602; SSSE3-NEXT: movdqa %xmm1, %xmm0 603; SSSE3-NEXT: psrad $31, %xmm0 604; SSSE3-NEXT: psrad $16, %xmm1 605; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 606; SSSE3-NEXT: movdqa %xmm2, %xmm0 607; SSSE3-NEXT: retq 608; 609; SSE41-LABEL: sext_8i16_to_4i64: 610; SSE41: # BB#0: # %entry 611; SSE41-NEXT: pmovsxwq %xmm0, %xmm2 612; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 613; SSE41-NEXT: pmovsxwq %xmm0, %xmm1 614; SSE41-NEXT: movdqa %xmm2, %xmm0 615; SSE41-NEXT: retq 616; 617; AVX1-LABEL: sext_8i16_to_4i64: 618; AVX1: # BB#0: # %entry 619; AVX1-NEXT: vpmovsxwq %xmm0, %xmm1 620; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 621; AVX1-NEXT: vpmovsxwq %xmm0, %xmm0 622; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 623; AVX1-NEXT: retq 624; 625; AVX2-LABEL: sext_8i16_to_4i64: 626; AVX2: # BB#0: # %entry 627; AVX2-NEXT: vpmovsxwq %xmm0, %ymm0 628; AVX2-NEXT: retq 629; 630; AVX512-LABEL: sext_8i16_to_4i64: 631; AVX512: # BB#0: # %entry 632; AVX512-NEXT: vpmovsxwq %xmm0, %ymm0 633; AVX512-NEXT: retq 634; 635; X32-SSE41-LABEL: sext_8i16_to_4i64: 636; X32-SSE41: # BB#0: # %entry 637; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm2 638; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 639; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm1 640; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 641; X32-SSE41-NEXT: retl 642entry: 643 %B = shufflevector <8 x i16> %A, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 644 %C = sext <4 x i16> %B to <4 x i64> 645 ret <4 x i64> %C 646} 647 648define <2 x i64> @sext_4i32_to_2i64(<4 x i32> %A) nounwind uwtable readnone ssp { 649; SSE2-LABEL: sext_4i32_to_2i64: 650; SSE2: # BB#0: # %entry 651; SSE2-NEXT: movdqa %xmm0, %xmm1 652; SSE2-NEXT: psrad $31, %xmm1 653; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 654; SSE2-NEXT: retq 655; 656; SSSE3-LABEL: sext_4i32_to_2i64: 657; SSSE3: # BB#0: # %entry 658; SSSE3-NEXT: movdqa %xmm0, %xmm1 659; SSSE3-NEXT: psrad $31, %xmm1 660; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 661; SSSE3-NEXT: retq 662; 663; SSE41-LABEL: sext_4i32_to_2i64: 664; SSE41: # BB#0: # %entry 665; SSE41-NEXT: pmovsxdq %xmm0, %xmm0 666; SSE41-NEXT: retq 667; 668; AVX-LABEL: sext_4i32_to_2i64: 669; AVX: # BB#0: # %entry 670; AVX-NEXT: vpmovsxdq %xmm0, %xmm0 671; AVX-NEXT: retq 672; 673; X32-SSE41-LABEL: sext_4i32_to_2i64: 674; X32-SSE41: # BB#0: # %entry 675; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm0 676; X32-SSE41-NEXT: retl 677entry: 678 %B = shufflevector <4 x i32> %A, <4 x i32> undef, <2 x i32> <i32 0, i32 1> 679 %C = sext <2 x i32> %B to <2 x i64> 680 ret <2 x i64> %C 681} 682 683define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp { 684; SSE2-LABEL: sext_4i32_to_4i64: 685; SSE2: # BB#0: # %entry 686; SSE2-NEXT: movdqa %xmm0, %xmm2 687; SSE2-NEXT: psrad $31, %xmm2 688; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 689; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 690; SSE2-NEXT: movdqa %xmm1, %xmm2 691; SSE2-NEXT: psrad $31, %xmm2 692; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 693; SSE2-NEXT: retq 694; 695; SSSE3-LABEL: sext_4i32_to_4i64: 696; SSSE3: # BB#0: # %entry 697; SSSE3-NEXT: movdqa %xmm0, %xmm2 698; SSSE3-NEXT: psrad $31, %xmm2 699; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 700; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 701; SSSE3-NEXT: movdqa %xmm1, %xmm2 702; SSSE3-NEXT: psrad $31, %xmm2 703; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 704; SSSE3-NEXT: retq 705; 706; SSE41-LABEL: sext_4i32_to_4i64: 707; SSE41: # BB#0: # %entry 708; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 709; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 710; SSE41-NEXT: pmovsxdq %xmm0, %xmm1 711; SSE41-NEXT: movdqa %xmm2, %xmm0 712; SSE41-NEXT: retq 713; 714; AVX1-LABEL: sext_4i32_to_4i64: 715; AVX1: # BB#0: # %entry 716; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 717; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 718; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 719; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 720; AVX1-NEXT: retq 721; 722; AVX2-LABEL: sext_4i32_to_4i64: 723; AVX2: # BB#0: # %entry 724; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 725; AVX2-NEXT: retq 726; 727; AVX512-LABEL: sext_4i32_to_4i64: 728; AVX512: # BB#0: # %entry 729; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 730; AVX512-NEXT: retq 731; 732; X32-SSE41-LABEL: sext_4i32_to_4i64: 733; X32-SSE41: # BB#0: # %entry 734; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 735; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 736; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm1 737; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 738; X32-SSE41-NEXT: retl 739entry: 740 %B = sext <4 x i32> %A to <4 x i64> 741 ret <4 x i64> %B 742} 743 744define <2 x i64> @load_sext_2i1_to_2i64(<2 x i1> *%ptr) { 745; SSE-LABEL: load_sext_2i1_to_2i64: 746; SSE: # BB#0: # %entry 747; SSE-NEXT: movzbl (%rdi), %eax 748; SSE-NEXT: movq %rax, %rcx 749; SSE-NEXT: shlq $62, %rcx 750; SSE-NEXT: sarq $63, %rcx 751; SSE-NEXT: movd %rcx, %xmm1 752; SSE-NEXT: shlq $63, %rax 753; SSE-NEXT: sarq $63, %rax 754; SSE-NEXT: movd %rax, %xmm0 755; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 756; SSE-NEXT: retq 757; 758; AVX1-LABEL: load_sext_2i1_to_2i64: 759; AVX1: # BB#0: # %entry 760; AVX1-NEXT: movzbl (%rdi), %eax 761; AVX1-NEXT: movq %rax, %rcx 762; AVX1-NEXT: shlq $62, %rcx 763; AVX1-NEXT: sarq $63, %rcx 764; AVX1-NEXT: vmovq %rcx, %xmm0 765; AVX1-NEXT: shlq $63, %rax 766; AVX1-NEXT: sarq $63, %rax 767; AVX1-NEXT: vmovq %rax, %xmm1 768; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 769; AVX1-NEXT: retq 770; 771; AVX2-LABEL: load_sext_2i1_to_2i64: 772; AVX2: # BB#0: # %entry 773; AVX2-NEXT: movzbl (%rdi), %eax 774; AVX2-NEXT: movq %rax, %rcx 775; AVX2-NEXT: shlq $62, %rcx 776; AVX2-NEXT: sarq $63, %rcx 777; AVX2-NEXT: vmovq %rcx, %xmm0 778; AVX2-NEXT: shlq $63, %rax 779; AVX2-NEXT: sarq $63, %rax 780; AVX2-NEXT: vmovq %rax, %xmm1 781; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 782; AVX2-NEXT: retq 783; 784; AVX512-LABEL: load_sext_2i1_to_2i64: 785; AVX512: # BB#0: # %entry 786; AVX512-NEXT: movzbl (%rdi), %eax 787; AVX512-NEXT: kmovw %eax, %k1 788; AVX512-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z} 789; AVX512-NEXT: retq 790; 791; X32-SSE41-LABEL: load_sext_2i1_to_2i64: 792; X32-SSE41: # BB#0: # %entry 793; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 794; X32-SSE41-NEXT: movzbl (%eax), %eax 795; X32-SSE41-NEXT: movl %eax, %ecx 796; X32-SSE41-NEXT: shll $31, %ecx 797; X32-SSE41-NEXT: sarl $31, %ecx 798; X32-SSE41-NEXT: movd %ecx, %xmm0 799; X32-SSE41-NEXT: pinsrd $1, %ecx, %xmm0 800; X32-SSE41-NEXT: shll $30, %eax 801; X32-SSE41-NEXT: sarl $31, %eax 802; X32-SSE41-NEXT: pinsrd $2, %eax, %xmm0 803; X32-SSE41-NEXT: pinsrd $3, %eax, %xmm0 804; X32-SSE41-NEXT: retl 805entry: 806 %X = load <2 x i1>, <2 x i1>* %ptr 807 %Y = sext <2 x i1> %X to <2 x i64> 808 ret <2 x i64> %Y 809} 810 811define <2 x i64> @load_sext_2i8_to_2i64(<2 x i8> *%ptr) { 812; SSE2-LABEL: load_sext_2i8_to_2i64: 813; SSE2: # BB#0: # %entry 814; SSE2-NEXT: movzwl (%rdi), %eax 815; SSE2-NEXT: movd %eax, %xmm0 816; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 817; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 818; SSE2-NEXT: movdqa %xmm0, %xmm1 819; SSE2-NEXT: psrad $31, %xmm1 820; SSE2-NEXT: psrad $24, %xmm0 821; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 822; SSE2-NEXT: retq 823; 824; SSSE3-LABEL: load_sext_2i8_to_2i64: 825; SSSE3: # BB#0: # %entry 826; SSSE3-NEXT: movzwl (%rdi), %eax 827; SSSE3-NEXT: movd %eax, %xmm0 828; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 829; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 830; SSSE3-NEXT: movdqa %xmm0, %xmm1 831; SSSE3-NEXT: psrad $31, %xmm1 832; SSSE3-NEXT: psrad $24, %xmm0 833; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 834; SSSE3-NEXT: retq 835; 836; SSE41-LABEL: load_sext_2i8_to_2i64: 837; SSE41: # BB#0: # %entry 838; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 839; SSE41-NEXT: retq 840; 841; AVX-LABEL: load_sext_2i8_to_2i64: 842; AVX: # BB#0: # %entry 843; AVX-NEXT: vpmovsxbq (%rdi), %xmm0 844; AVX-NEXT: retq 845; 846; X32-SSE41-LABEL: load_sext_2i8_to_2i64: 847; X32-SSE41: # BB#0: # %entry 848; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 849; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 850; X32-SSE41-NEXT: retl 851entry: 852 %X = load <2 x i8>, <2 x i8>* %ptr 853 %Y = sext <2 x i8> %X to <2 x i64> 854 ret <2 x i64> %Y 855} 856 857define <4 x i32> @load_sext_4i1_to_4i32(<4 x i1> *%ptr) { 858; SSE2-LABEL: load_sext_4i1_to_4i32: 859; SSE2: # BB#0: # %entry 860; SSE2-NEXT: movzbl (%rdi), %eax 861; SSE2-NEXT: movq %rax, %rcx 862; SSE2-NEXT: shlq $60, %rcx 863; SSE2-NEXT: sarq $63, %rcx 864; SSE2-NEXT: movd %ecx, %xmm0 865; SSE2-NEXT: movq %rax, %rcx 866; SSE2-NEXT: shlq $62, %rcx 867; SSE2-NEXT: sarq $63, %rcx 868; SSE2-NEXT: movd %ecx, %xmm1 869; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 870; SSE2-NEXT: movq %rax, %rcx 871; SSE2-NEXT: shlq $61, %rcx 872; SSE2-NEXT: sarq $63, %rcx 873; SSE2-NEXT: movd %ecx, %xmm2 874; SSE2-NEXT: shlq $63, %rax 875; SSE2-NEXT: sarq $63, %rax 876; SSE2-NEXT: movd %eax, %xmm0 877; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 878; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 879; SSE2-NEXT: retq 880; 881; SSSE3-LABEL: load_sext_4i1_to_4i32: 882; SSSE3: # BB#0: # %entry 883; SSSE3-NEXT: movzbl (%rdi), %eax 884; SSSE3-NEXT: movq %rax, %rcx 885; SSSE3-NEXT: shlq $60, %rcx 886; SSSE3-NEXT: sarq $63, %rcx 887; SSSE3-NEXT: movd %ecx, %xmm0 888; SSSE3-NEXT: movq %rax, %rcx 889; SSSE3-NEXT: shlq $62, %rcx 890; SSSE3-NEXT: sarq $63, %rcx 891; SSSE3-NEXT: movd %ecx, %xmm1 892; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 893; SSSE3-NEXT: movq %rax, %rcx 894; SSSE3-NEXT: shlq $61, %rcx 895; SSSE3-NEXT: sarq $63, %rcx 896; SSSE3-NEXT: movd %ecx, %xmm2 897; SSSE3-NEXT: shlq $63, %rax 898; SSSE3-NEXT: sarq $63, %rax 899; SSSE3-NEXT: movd %eax, %xmm0 900; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 901; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 902; SSSE3-NEXT: retq 903; 904; SSE41-LABEL: load_sext_4i1_to_4i32: 905; SSE41: # BB#0: # %entry 906; SSE41-NEXT: movzbl (%rdi), %eax 907; SSE41-NEXT: movq %rax, %rcx 908; SSE41-NEXT: shlq $62, %rcx 909; SSE41-NEXT: sarq $63, %rcx 910; SSE41-NEXT: movq %rax, %rdx 911; SSE41-NEXT: shlq $63, %rdx 912; SSE41-NEXT: sarq $63, %rdx 913; SSE41-NEXT: movd %edx, %xmm0 914; SSE41-NEXT: pinsrd $1, %ecx, %xmm0 915; SSE41-NEXT: movq %rax, %rcx 916; SSE41-NEXT: shlq $61, %rcx 917; SSE41-NEXT: sarq $63, %rcx 918; SSE41-NEXT: pinsrd $2, %ecx, %xmm0 919; SSE41-NEXT: shlq $60, %rax 920; SSE41-NEXT: sarq $63, %rax 921; SSE41-NEXT: pinsrd $3, %eax, %xmm0 922; SSE41-NEXT: retq 923; 924; AVX1-LABEL: load_sext_4i1_to_4i32: 925; AVX1: # BB#0: # %entry 926; AVX1-NEXT: movzbl (%rdi), %eax 927; AVX1-NEXT: movq %rax, %rcx 928; AVX1-NEXT: shlq $62, %rcx 929; AVX1-NEXT: sarq $63, %rcx 930; AVX1-NEXT: movq %rax, %rdx 931; AVX1-NEXT: shlq $63, %rdx 932; AVX1-NEXT: sarq $63, %rdx 933; AVX1-NEXT: vmovd %edx, %xmm0 934; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 935; AVX1-NEXT: movq %rax, %rcx 936; AVX1-NEXT: shlq $61, %rcx 937; AVX1-NEXT: sarq $63, %rcx 938; AVX1-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 939; AVX1-NEXT: shlq $60, %rax 940; AVX1-NEXT: sarq $63, %rax 941; AVX1-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 942; AVX1-NEXT: retq 943; 944; AVX2-LABEL: load_sext_4i1_to_4i32: 945; AVX2: # BB#0: # %entry 946; AVX2-NEXT: movzbl (%rdi), %eax 947; AVX2-NEXT: movq %rax, %rcx 948; AVX2-NEXT: shlq $62, %rcx 949; AVX2-NEXT: sarq $63, %rcx 950; AVX2-NEXT: movq %rax, %rdx 951; AVX2-NEXT: shlq $63, %rdx 952; AVX2-NEXT: sarq $63, %rdx 953; AVX2-NEXT: vmovd %edx, %xmm0 954; AVX2-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 955; AVX2-NEXT: movq %rax, %rcx 956; AVX2-NEXT: shlq $61, %rcx 957; AVX2-NEXT: sarq $63, %rcx 958; AVX2-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 959; AVX2-NEXT: shlq $60, %rax 960; AVX2-NEXT: sarq $63, %rax 961; AVX2-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 962; AVX2-NEXT: retq 963; 964; AVX512-LABEL: load_sext_4i1_to_4i32: 965; AVX512: # BB#0: # %entry 966; AVX512-NEXT: movzbl (%rdi), %eax 967; AVX512-NEXT: kmovw %eax, %k1 968; AVX512-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z} 969; AVX512-NEXT: vpmovqd %zmm0, %ymm0 970; AVX512-NEXT: retq 971; 972; X32-SSE41-LABEL: load_sext_4i1_to_4i32: 973; X32-SSE41: # BB#0: # %entry 974; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 975; X32-SSE41-NEXT: movl (%eax), %eax 976; X32-SSE41-NEXT: movl %eax, %ecx 977; X32-SSE41-NEXT: shll $30, %ecx 978; X32-SSE41-NEXT: sarl $31, %ecx 979; X32-SSE41-NEXT: movl %eax, %edx 980; X32-SSE41-NEXT: shll $31, %edx 981; X32-SSE41-NEXT: sarl $31, %edx 982; X32-SSE41-NEXT: movd %edx, %xmm0 983; X32-SSE41-NEXT: pinsrd $1, %ecx, %xmm0 984; X32-SSE41-NEXT: movl %eax, %ecx 985; X32-SSE41-NEXT: shll $29, %ecx 986; X32-SSE41-NEXT: sarl $31, %ecx 987; X32-SSE41-NEXT: pinsrd $2, %ecx, %xmm0 988; X32-SSE41-NEXT: shll $28, %eax 989; X32-SSE41-NEXT: sarl $31, %eax 990; X32-SSE41-NEXT: pinsrd $3, %eax, %xmm0 991; X32-SSE41-NEXT: retl 992entry: 993 %X = load <4 x i1>, <4 x i1>* %ptr 994 %Y = sext <4 x i1> %X to <4 x i32> 995 ret <4 x i32> %Y 996} 997 998define <4 x i32> @load_sext_4i8_to_4i32(<4 x i8> *%ptr) { 999; SSE2-LABEL: load_sext_4i8_to_4i32: 1000; SSE2: # BB#0: # %entry 1001; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 1002; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1003; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1004; SSE2-NEXT: psrad $24, %xmm0 1005; SSE2-NEXT: retq 1006; 1007; SSSE3-LABEL: load_sext_4i8_to_4i32: 1008; SSSE3: # BB#0: # %entry 1009; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 1010; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1011; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1012; SSSE3-NEXT: psrad $24, %xmm0 1013; SSSE3-NEXT: retq 1014; 1015; SSE41-LABEL: load_sext_4i8_to_4i32: 1016; SSE41: # BB#0: # %entry 1017; SSE41-NEXT: pmovsxbd (%rdi), %xmm0 1018; SSE41-NEXT: retq 1019; 1020; AVX-LABEL: load_sext_4i8_to_4i32: 1021; AVX: # BB#0: # %entry 1022; AVX-NEXT: vpmovsxbd (%rdi), %xmm0 1023; AVX-NEXT: retq 1024; 1025; X32-SSE41-LABEL: load_sext_4i8_to_4i32: 1026; X32-SSE41: # BB#0: # %entry 1027; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1028; X32-SSE41-NEXT: pmovsxbd (%eax), %xmm0 1029; X32-SSE41-NEXT: retl 1030entry: 1031 %X = load <4 x i8>, <4 x i8>* %ptr 1032 %Y = sext <4 x i8> %X to <4 x i32> 1033 ret <4 x i32> %Y 1034} 1035 1036define <4 x i64> @load_sext_4i1_to_4i64(<4 x i1> *%ptr) { 1037; SSE2-LABEL: load_sext_4i1_to_4i64: 1038; SSE2: # BB#0: # %entry 1039; SSE2-NEXT: movl (%rdi), %eax 1040; SSE2-NEXT: movl %eax, %ecx 1041; SSE2-NEXT: shrl $3, %ecx 1042; SSE2-NEXT: movd %ecx, %xmm0 1043; SSE2-NEXT: movl %eax, %ecx 1044; SSE2-NEXT: shrl %ecx 1045; SSE2-NEXT: movd %ecx, %xmm1 1046; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1047; SSE2-NEXT: movd %eax, %xmm2 1048; SSE2-NEXT: shrl $2, %eax 1049; SSE2-NEXT: movd %eax, %xmm0 1050; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 1051; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 1052; SSE2-NEXT: pand {{.*}}(%rip), %xmm2 1053; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,1,1,3] 1054; SSE2-NEXT: psllq $63, %xmm0 1055; SSE2-NEXT: psrad $31, %xmm0 1056; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1057; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,1,3,3] 1058; SSE2-NEXT: psllq $63, %xmm1 1059; SSE2-NEXT: psrad $31, %xmm1 1060; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1061; SSE2-NEXT: retq 1062; 1063; SSSE3-LABEL: load_sext_4i1_to_4i64: 1064; SSSE3: # BB#0: # %entry 1065; SSSE3-NEXT: movl (%rdi), %eax 1066; SSSE3-NEXT: movl %eax, %ecx 1067; SSSE3-NEXT: shrl $3, %ecx 1068; SSSE3-NEXT: movd %ecx, %xmm0 1069; SSSE3-NEXT: movl %eax, %ecx 1070; SSSE3-NEXT: shrl %ecx 1071; SSSE3-NEXT: movd %ecx, %xmm1 1072; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1073; SSSE3-NEXT: movd %eax, %xmm2 1074; SSSE3-NEXT: shrl $2, %eax 1075; SSSE3-NEXT: movd %eax, %xmm0 1076; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 1077; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 1078; SSSE3-NEXT: pand {{.*}}(%rip), %xmm2 1079; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,1,1,3] 1080; SSSE3-NEXT: psllq $63, %xmm0 1081; SSSE3-NEXT: psrad $31, %xmm0 1082; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1083; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,1,3,3] 1084; SSSE3-NEXT: psllq $63, %xmm1 1085; SSSE3-NEXT: psrad $31, %xmm1 1086; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1087; SSSE3-NEXT: retq 1088; 1089; SSE41-LABEL: load_sext_4i1_to_4i64: 1090; SSE41: # BB#0: # %entry 1091; SSE41-NEXT: movl (%rdi), %eax 1092; SSE41-NEXT: movl %eax, %ecx 1093; SSE41-NEXT: shrl %ecx 1094; SSE41-NEXT: movd %eax, %xmm1 1095; SSE41-NEXT: pinsrd $1, %ecx, %xmm1 1096; SSE41-NEXT: movl %eax, %ecx 1097; SSE41-NEXT: shrl $2, %ecx 1098; SSE41-NEXT: pinsrd $2, %ecx, %xmm1 1099; SSE41-NEXT: shrl $3, %eax 1100; SSE41-NEXT: pinsrd $3, %eax, %xmm1 1101; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 1102; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero 1103; SSE41-NEXT: psllq $63, %xmm0 1104; SSE41-NEXT: psrad $31, %xmm0 1105; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1106; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,2,3,3] 1107; SSE41-NEXT: psllq $63, %xmm1 1108; SSE41-NEXT: psrad $31, %xmm1 1109; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1110; SSE41-NEXT: retq 1111; 1112; AVX1-LABEL: load_sext_4i1_to_4i64: 1113; AVX1: # BB#0: # %entry 1114; AVX1-NEXT: movzbl (%rdi), %eax 1115; AVX1-NEXT: movq %rax, %rcx 1116; AVX1-NEXT: shlq $62, %rcx 1117; AVX1-NEXT: sarq $63, %rcx 1118; AVX1-NEXT: movq %rax, %rdx 1119; AVX1-NEXT: shlq $63, %rdx 1120; AVX1-NEXT: sarq $63, %rdx 1121; AVX1-NEXT: vmovd %edx, %xmm0 1122; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 1123; AVX1-NEXT: movq %rax, %rcx 1124; AVX1-NEXT: shlq $61, %rcx 1125; AVX1-NEXT: sarq $63, %rcx 1126; AVX1-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 1127; AVX1-NEXT: shlq $60, %rax 1128; AVX1-NEXT: sarq $63, %rax 1129; AVX1-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 1130; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1131; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1132; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1133; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1134; AVX1-NEXT: retq 1135; 1136; AVX2-LABEL: load_sext_4i1_to_4i64: 1137; AVX2: # BB#0: # %entry 1138; AVX2-NEXT: movzbl (%rdi), %eax 1139; AVX2-NEXT: movq %rax, %rcx 1140; AVX2-NEXT: shlq $60, %rcx 1141; AVX2-NEXT: sarq $63, %rcx 1142; AVX2-NEXT: vmovq %rcx, %xmm0 1143; AVX2-NEXT: movq %rax, %rcx 1144; AVX2-NEXT: shlq $61, %rcx 1145; AVX2-NEXT: sarq $63, %rcx 1146; AVX2-NEXT: vmovq %rcx, %xmm1 1147; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1148; AVX2-NEXT: movq %rax, %rcx 1149; AVX2-NEXT: shlq $62, %rcx 1150; AVX2-NEXT: sarq $63, %rcx 1151; AVX2-NEXT: vmovq %rcx, %xmm1 1152; AVX2-NEXT: shlq $63, %rax 1153; AVX2-NEXT: sarq $63, %rax 1154; AVX2-NEXT: vmovq %rax, %xmm2 1155; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0] 1156; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 1157; AVX2-NEXT: retq 1158; 1159; AVX512-LABEL: load_sext_4i1_to_4i64: 1160; AVX512: # BB#0: # %entry 1161; AVX512-NEXT: movzbl (%rdi), %eax 1162; AVX512-NEXT: kmovw %eax, %k1 1163; AVX512-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z} 1164; AVX512-NEXT: retq 1165; 1166; X32-SSE41-LABEL: load_sext_4i1_to_4i64: 1167; X32-SSE41: # BB#0: # %entry 1168; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1169; X32-SSE41-NEXT: movzbl (%eax), %eax 1170; X32-SSE41-NEXT: movl %eax, %ecx 1171; X32-SSE41-NEXT: shrl %ecx 1172; X32-SSE41-NEXT: movd %eax, %xmm1 1173; X32-SSE41-NEXT: pinsrd $1, %ecx, %xmm1 1174; X32-SSE41-NEXT: movl %eax, %ecx 1175; X32-SSE41-NEXT: shrl $2, %ecx 1176; X32-SSE41-NEXT: pinsrd $2, %ecx, %xmm1 1177; X32-SSE41-NEXT: shrl $3, %eax 1178; X32-SSE41-NEXT: pinsrd $3, %eax, %xmm1 1179; X32-SSE41-NEXT: pand {{\.LCPI.*}}, %xmm1 1180; X32-SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero 1181; X32-SSE41-NEXT: psllq $63, %xmm0 1182; X32-SSE41-NEXT: psrad $31, %xmm0 1183; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1184; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,2,3,3] 1185; X32-SSE41-NEXT: psllq $63, %xmm1 1186; X32-SSE41-NEXT: psrad $31, %xmm1 1187; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1188; X32-SSE41-NEXT: retl 1189entry: 1190 %X = load <4 x i1>, <4 x i1>* %ptr 1191 %Y = sext <4 x i1> %X to <4 x i64> 1192 ret <4 x i64> %Y 1193} 1194 1195define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) { 1196; SSE2-LABEL: load_sext_4i8_to_4i64: 1197; SSE2: # BB#0: # %entry 1198; SSE2-NEXT: movsbq 1(%rdi), %rax 1199; SSE2-NEXT: movd %rax, %xmm1 1200; SSE2-NEXT: movsbq (%rdi), %rax 1201; SSE2-NEXT: movd %rax, %xmm0 1202; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1203; SSE2-NEXT: movsbq 3(%rdi), %rax 1204; SSE2-NEXT: movd %rax, %xmm2 1205; SSE2-NEXT: movsbq 2(%rdi), %rax 1206; SSE2-NEXT: movd %rax, %xmm1 1207; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 1208; SSE2-NEXT: retq 1209; 1210; SSSE3-LABEL: load_sext_4i8_to_4i64: 1211; SSSE3: # BB#0: # %entry 1212; SSSE3-NEXT: movsbq 1(%rdi), %rax 1213; SSSE3-NEXT: movd %rax, %xmm1 1214; SSSE3-NEXT: movsbq (%rdi), %rax 1215; SSSE3-NEXT: movd %rax, %xmm0 1216; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1217; SSSE3-NEXT: movsbq 3(%rdi), %rax 1218; SSSE3-NEXT: movd %rax, %xmm2 1219; SSSE3-NEXT: movsbq 2(%rdi), %rax 1220; SSSE3-NEXT: movd %rax, %xmm1 1221; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 1222; SSSE3-NEXT: retq 1223; 1224; SSE41-LABEL: load_sext_4i8_to_4i64: 1225; SSE41: # BB#0: # %entry 1226; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 1227; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm1 1228; SSE41-NEXT: retq 1229; 1230; AVX1-LABEL: load_sext_4i8_to_4i64: 1231; AVX1: # BB#0: # %entry 1232; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0 1233; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1234; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1235; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1236; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1237; AVX1-NEXT: retq 1238; 1239; AVX2-LABEL: load_sext_4i8_to_4i64: 1240; AVX2: # BB#0: # %entry 1241; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0 1242; AVX2-NEXT: retq 1243; 1244; AVX512-LABEL: load_sext_4i8_to_4i64: 1245; AVX512: # BB#0: # %entry 1246; AVX512-NEXT: vpmovsxbq (%rdi), %ymm0 1247; AVX512-NEXT: retq 1248; 1249; X32-SSE41-LABEL: load_sext_4i8_to_4i64: 1250; X32-SSE41: # BB#0: # %entry 1251; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1252; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 1253; X32-SSE41-NEXT: pmovsxbq 2(%eax), %xmm1 1254; X32-SSE41-NEXT: retl 1255entry: 1256 %X = load <4 x i8>, <4 x i8>* %ptr 1257 %Y = sext <4 x i8> %X to <4 x i64> 1258 ret <4 x i64> %Y 1259} 1260 1261define <8 x i16> @load_sext_8i1_to_8i16(<8 x i1> *%ptr) { 1262; SSE2-LABEL: load_sext_8i1_to_8i16: 1263; SSE2: # BB#0: # %entry 1264; SSE2-NEXT: movsbq (%rdi), %rax 1265; SSE2-NEXT: movq %rax, %rcx 1266; SSE2-NEXT: shrq $7, %rcx 1267; SSE2-NEXT: movd %ecx, %xmm0 1268; SSE2-NEXT: movq %rax, %rcx 1269; SSE2-NEXT: shlq $60, %rcx 1270; SSE2-NEXT: sarq $63, %rcx 1271; SSE2-NEXT: movd %ecx, %xmm2 1272; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1273; SSE2-NEXT: movq %rax, %rcx 1274; SSE2-NEXT: shlq $58, %rcx 1275; SSE2-NEXT: sarq $63, %rcx 1276; SSE2-NEXT: movd %ecx, %xmm0 1277; SSE2-NEXT: movq %rax, %rcx 1278; SSE2-NEXT: shlq $62, %rcx 1279; SSE2-NEXT: sarq $63, %rcx 1280; SSE2-NEXT: movd %ecx, %xmm1 1281; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 1282; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 1283; SSE2-NEXT: movq %rax, %rcx 1284; SSE2-NEXT: shlq $57, %rcx 1285; SSE2-NEXT: sarq $63, %rcx 1286; SSE2-NEXT: movd %ecx, %xmm0 1287; SSE2-NEXT: movq %rax, %rcx 1288; SSE2-NEXT: shlq $61, %rcx 1289; SSE2-NEXT: sarq $63, %rcx 1290; SSE2-NEXT: movd %ecx, %xmm2 1291; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1292; SSE2-NEXT: movq %rax, %rcx 1293; SSE2-NEXT: shlq $59, %rcx 1294; SSE2-NEXT: sarq $63, %rcx 1295; SSE2-NEXT: movd %ecx, %xmm3 1296; SSE2-NEXT: shlq $63, %rax 1297; SSE2-NEXT: sarq $63, %rax 1298; SSE2-NEXT: movd %eax, %xmm0 1299; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 1300; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 1301; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 1302; SSE2-NEXT: retq 1303; 1304; SSSE3-LABEL: load_sext_8i1_to_8i16: 1305; SSSE3: # BB#0: # %entry 1306; SSSE3-NEXT: movsbq (%rdi), %rax 1307; SSSE3-NEXT: movq %rax, %rcx 1308; SSSE3-NEXT: shrq $7, %rcx 1309; SSSE3-NEXT: movd %ecx, %xmm0 1310; SSSE3-NEXT: movq %rax, %rcx 1311; SSSE3-NEXT: shlq $60, %rcx 1312; SSSE3-NEXT: sarq $63, %rcx 1313; SSSE3-NEXT: movd %ecx, %xmm2 1314; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1315; SSSE3-NEXT: movq %rax, %rcx 1316; SSSE3-NEXT: shlq $58, %rcx 1317; SSSE3-NEXT: sarq $63, %rcx 1318; SSSE3-NEXT: movd %ecx, %xmm0 1319; SSSE3-NEXT: movq %rax, %rcx 1320; SSSE3-NEXT: shlq $62, %rcx 1321; SSSE3-NEXT: sarq $63, %rcx 1322; SSSE3-NEXT: movd %ecx, %xmm1 1323; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 1324; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 1325; SSSE3-NEXT: movq %rax, %rcx 1326; SSSE3-NEXT: shlq $57, %rcx 1327; SSSE3-NEXT: sarq $63, %rcx 1328; SSSE3-NEXT: movd %ecx, %xmm0 1329; SSSE3-NEXT: movq %rax, %rcx 1330; SSSE3-NEXT: shlq $61, %rcx 1331; SSSE3-NEXT: sarq $63, %rcx 1332; SSSE3-NEXT: movd %ecx, %xmm2 1333; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1334; SSSE3-NEXT: movq %rax, %rcx 1335; SSSE3-NEXT: shlq $59, %rcx 1336; SSSE3-NEXT: sarq $63, %rcx 1337; SSSE3-NEXT: movd %ecx, %xmm3 1338; SSSE3-NEXT: shlq $63, %rax 1339; SSSE3-NEXT: sarq $63, %rax 1340; SSSE3-NEXT: movd %eax, %xmm0 1341; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 1342; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 1343; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 1344; SSSE3-NEXT: retq 1345; 1346; SSE41-LABEL: load_sext_8i1_to_8i16: 1347; SSE41: # BB#0: # %entry 1348; SSE41-NEXT: movsbq (%rdi), %rax 1349; SSE41-NEXT: movq %rax, %rcx 1350; SSE41-NEXT: shlq $62, %rcx 1351; SSE41-NEXT: sarq $63, %rcx 1352; SSE41-NEXT: movq %rax, %rdx 1353; SSE41-NEXT: shlq $63, %rdx 1354; SSE41-NEXT: sarq $63, %rdx 1355; SSE41-NEXT: movd %edx, %xmm0 1356; SSE41-NEXT: pinsrw $1, %ecx, %xmm0 1357; SSE41-NEXT: movq %rax, %rcx 1358; SSE41-NEXT: shlq $61, %rcx 1359; SSE41-NEXT: sarq $63, %rcx 1360; SSE41-NEXT: pinsrw $2, %ecx, %xmm0 1361; SSE41-NEXT: movq %rax, %rcx 1362; SSE41-NEXT: shlq $60, %rcx 1363; SSE41-NEXT: sarq $63, %rcx 1364; SSE41-NEXT: pinsrw $3, %ecx, %xmm0 1365; SSE41-NEXT: movq %rax, %rcx 1366; SSE41-NEXT: shlq $59, %rcx 1367; SSE41-NEXT: sarq $63, %rcx 1368; SSE41-NEXT: pinsrw $4, %ecx, %xmm0 1369; SSE41-NEXT: movq %rax, %rcx 1370; SSE41-NEXT: shlq $58, %rcx 1371; SSE41-NEXT: sarq $63, %rcx 1372; SSE41-NEXT: pinsrw $5, %ecx, %xmm0 1373; SSE41-NEXT: movq %rax, %rcx 1374; SSE41-NEXT: shlq $57, %rcx 1375; SSE41-NEXT: sarq $63, %rcx 1376; SSE41-NEXT: pinsrw $6, %ecx, %xmm0 1377; SSE41-NEXT: shrq $7, %rax 1378; SSE41-NEXT: pinsrw $7, %eax, %xmm0 1379; SSE41-NEXT: retq 1380; 1381; AVX1-LABEL: load_sext_8i1_to_8i16: 1382; AVX1: # BB#0: # %entry 1383; AVX1-NEXT: movsbq (%rdi), %rax 1384; AVX1-NEXT: movq %rax, %rcx 1385; AVX1-NEXT: shlq $62, %rcx 1386; AVX1-NEXT: sarq $63, %rcx 1387; AVX1-NEXT: movq %rax, %rdx 1388; AVX1-NEXT: shlq $63, %rdx 1389; AVX1-NEXT: sarq $63, %rdx 1390; AVX1-NEXT: vmovd %edx, %xmm0 1391; AVX1-NEXT: vpinsrw $1, %ecx, %xmm0, %xmm0 1392; AVX1-NEXT: movq %rax, %rcx 1393; AVX1-NEXT: shlq $61, %rcx 1394; AVX1-NEXT: sarq $63, %rcx 1395; AVX1-NEXT: vpinsrw $2, %ecx, %xmm0, %xmm0 1396; AVX1-NEXT: movq %rax, %rcx 1397; AVX1-NEXT: shlq $60, %rcx 1398; AVX1-NEXT: sarq $63, %rcx 1399; AVX1-NEXT: vpinsrw $3, %ecx, %xmm0, %xmm0 1400; AVX1-NEXT: movq %rax, %rcx 1401; AVX1-NEXT: shlq $59, %rcx 1402; AVX1-NEXT: sarq $63, %rcx 1403; AVX1-NEXT: vpinsrw $4, %ecx, %xmm0, %xmm0 1404; AVX1-NEXT: movq %rax, %rcx 1405; AVX1-NEXT: shlq $58, %rcx 1406; AVX1-NEXT: sarq $63, %rcx 1407; AVX1-NEXT: vpinsrw $5, %ecx, %xmm0, %xmm0 1408; AVX1-NEXT: movq %rax, %rcx 1409; AVX1-NEXT: shlq $57, %rcx 1410; AVX1-NEXT: sarq $63, %rcx 1411; AVX1-NEXT: vpinsrw $6, %ecx, %xmm0, %xmm0 1412; AVX1-NEXT: shrq $7, %rax 1413; AVX1-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 1414; AVX1-NEXT: retq 1415; 1416; AVX2-LABEL: load_sext_8i1_to_8i16: 1417; AVX2: # BB#0: # %entry 1418; AVX2-NEXT: movsbq (%rdi), %rax 1419; AVX2-NEXT: movq %rax, %rcx 1420; AVX2-NEXT: shlq $62, %rcx 1421; AVX2-NEXT: sarq $63, %rcx 1422; AVX2-NEXT: movq %rax, %rdx 1423; AVX2-NEXT: shlq $63, %rdx 1424; AVX2-NEXT: sarq $63, %rdx 1425; AVX2-NEXT: vmovd %edx, %xmm0 1426; AVX2-NEXT: vpinsrw $1, %ecx, %xmm0, %xmm0 1427; AVX2-NEXT: movq %rax, %rcx 1428; AVX2-NEXT: shlq $61, %rcx 1429; AVX2-NEXT: sarq $63, %rcx 1430; AVX2-NEXT: vpinsrw $2, %ecx, %xmm0, %xmm0 1431; AVX2-NEXT: movq %rax, %rcx 1432; AVX2-NEXT: shlq $60, %rcx 1433; AVX2-NEXT: sarq $63, %rcx 1434; AVX2-NEXT: vpinsrw $3, %ecx, %xmm0, %xmm0 1435; AVX2-NEXT: movq %rax, %rcx 1436; AVX2-NEXT: shlq $59, %rcx 1437; AVX2-NEXT: sarq $63, %rcx 1438; AVX2-NEXT: vpinsrw $4, %ecx, %xmm0, %xmm0 1439; AVX2-NEXT: movq %rax, %rcx 1440; AVX2-NEXT: shlq $58, %rcx 1441; AVX2-NEXT: sarq $63, %rcx 1442; AVX2-NEXT: vpinsrw $5, %ecx, %xmm0, %xmm0 1443; AVX2-NEXT: movq %rax, %rcx 1444; AVX2-NEXT: shlq $57, %rcx 1445; AVX2-NEXT: sarq $63, %rcx 1446; AVX2-NEXT: vpinsrw $6, %ecx, %xmm0, %xmm0 1447; AVX2-NEXT: shrq $7, %rax 1448; AVX2-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 1449; AVX2-NEXT: retq 1450; 1451; AVX512-LABEL: load_sext_8i1_to_8i16: 1452; AVX512: # BB#0: # %entry 1453; AVX512-NEXT: movzbl (%rdi), %eax 1454; AVX512-NEXT: kmovw %eax, %k1 1455; AVX512-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z} 1456; AVX512-NEXT: vpmovqw %zmm0, %xmm0 1457; AVX512-NEXT: retq 1458; 1459; X32-SSE41-LABEL: load_sext_8i1_to_8i16: 1460; X32-SSE41: # BB#0: # %entry 1461; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1462; X32-SSE41-NEXT: movsbl (%eax), %eax 1463; X32-SSE41-NEXT: movl %eax, %ecx 1464; X32-SSE41-NEXT: shll $30, %ecx 1465; X32-SSE41-NEXT: sarl $31, %ecx 1466; X32-SSE41-NEXT: movl %eax, %edx 1467; X32-SSE41-NEXT: shll $31, %edx 1468; X32-SSE41-NEXT: sarl $31, %edx 1469; X32-SSE41-NEXT: movd %edx, %xmm0 1470; X32-SSE41-NEXT: pinsrw $1, %ecx, %xmm0 1471; X32-SSE41-NEXT: movl %eax, %ecx 1472; X32-SSE41-NEXT: shll $29, %ecx 1473; X32-SSE41-NEXT: sarl $31, %ecx 1474; X32-SSE41-NEXT: pinsrw $2, %ecx, %xmm0 1475; X32-SSE41-NEXT: movl %eax, %ecx 1476; X32-SSE41-NEXT: shll $28, %ecx 1477; X32-SSE41-NEXT: sarl $31, %ecx 1478; X32-SSE41-NEXT: pinsrw $3, %ecx, %xmm0 1479; X32-SSE41-NEXT: movl %eax, %ecx 1480; X32-SSE41-NEXT: shll $27, %ecx 1481; X32-SSE41-NEXT: sarl $31, %ecx 1482; X32-SSE41-NEXT: pinsrw $4, %ecx, %xmm0 1483; X32-SSE41-NEXT: movl %eax, %ecx 1484; X32-SSE41-NEXT: shll $26, %ecx 1485; X32-SSE41-NEXT: sarl $31, %ecx 1486; X32-SSE41-NEXT: pinsrw $5, %ecx, %xmm0 1487; X32-SSE41-NEXT: movl %eax, %ecx 1488; X32-SSE41-NEXT: shll $25, %ecx 1489; X32-SSE41-NEXT: sarl $31, %ecx 1490; X32-SSE41-NEXT: pinsrw $6, %ecx, %xmm0 1491; X32-SSE41-NEXT: shrl $7, %eax 1492; X32-SSE41-NEXT: pinsrw $7, %eax, %xmm0 1493; X32-SSE41-NEXT: retl 1494entry: 1495 %X = load <8 x i1>, <8 x i1>* %ptr 1496 %Y = sext <8 x i1> %X to <8 x i16> 1497 ret <8 x i16> %Y 1498} 1499 1500define <8 x i16> @load_sext_8i8_to_8i16(<8 x i8> *%ptr) { 1501; SSE2-LABEL: load_sext_8i8_to_8i16: 1502; SSE2: # BB#0: # %entry 1503; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 1504; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1505; SSE2-NEXT: psraw $8, %xmm0 1506; SSE2-NEXT: retq 1507; 1508; SSSE3-LABEL: load_sext_8i8_to_8i16: 1509; SSSE3: # BB#0: # %entry 1510; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 1511; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1512; SSSE3-NEXT: psraw $8, %xmm0 1513; SSSE3-NEXT: retq 1514; 1515; SSE41-LABEL: load_sext_8i8_to_8i16: 1516; SSE41: # BB#0: # %entry 1517; SSE41-NEXT: pmovsxbw (%rdi), %xmm0 1518; SSE41-NEXT: retq 1519; 1520; AVX-LABEL: load_sext_8i8_to_8i16: 1521; AVX: # BB#0: # %entry 1522; AVX-NEXT: vpmovsxbw (%rdi), %xmm0 1523; AVX-NEXT: retq 1524; 1525; X32-SSE41-LABEL: load_sext_8i8_to_8i16: 1526; X32-SSE41: # BB#0: # %entry 1527; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1528; X32-SSE41-NEXT: pmovsxbw (%eax), %xmm0 1529; X32-SSE41-NEXT: retl 1530entry: 1531 %X = load <8 x i8>, <8 x i8>* %ptr 1532 %Y = sext <8 x i8> %X to <8 x i16> 1533 ret <8 x i16> %Y 1534} 1535 1536define <8 x i64> @load_sext_8i8_to_8i64(<8 x i8> *%ptr) { 1537; SSE2-LABEL: load_sext_8i8_to_8i64: 1538; SSE2: # BB#0: # %entry 1539; SSE2-NEXT: movsbq 1(%rdi), %rax 1540; SSE2-NEXT: movd %rax, %xmm1 1541; SSE2-NEXT: movsbq (%rdi), %rax 1542; SSE2-NEXT: movd %rax, %xmm0 1543; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1544; SSE2-NEXT: movsbq 3(%rdi), %rax 1545; SSE2-NEXT: movd %rax, %xmm2 1546; SSE2-NEXT: movsbq 2(%rdi), %rax 1547; SSE2-NEXT: movd %rax, %xmm1 1548; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 1549; SSE2-NEXT: movsbq 5(%rdi), %rax 1550; SSE2-NEXT: movd %rax, %xmm3 1551; SSE2-NEXT: movsbq 4(%rdi), %rax 1552; SSE2-NEXT: movd %rax, %xmm2 1553; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] 1554; SSE2-NEXT: movsbq 7(%rdi), %rax 1555; SSE2-NEXT: movd %rax, %xmm4 1556; SSE2-NEXT: movsbq 6(%rdi), %rax 1557; SSE2-NEXT: movd %rax, %xmm3 1558; SSE2-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0] 1559; SSE2-NEXT: retq 1560; 1561; SSSE3-LABEL: load_sext_8i8_to_8i64: 1562; SSSE3: # BB#0: # %entry 1563; SSSE3-NEXT: movsbq 1(%rdi), %rax 1564; SSSE3-NEXT: movd %rax, %xmm1 1565; SSSE3-NEXT: movsbq (%rdi), %rax 1566; SSSE3-NEXT: movd %rax, %xmm0 1567; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1568; SSSE3-NEXT: movsbq 3(%rdi), %rax 1569; SSSE3-NEXT: movd %rax, %xmm2 1570; SSSE3-NEXT: movsbq 2(%rdi), %rax 1571; SSSE3-NEXT: movd %rax, %xmm1 1572; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 1573; SSSE3-NEXT: movsbq 5(%rdi), %rax 1574; SSSE3-NEXT: movd %rax, %xmm3 1575; SSSE3-NEXT: movsbq 4(%rdi), %rax 1576; SSSE3-NEXT: movd %rax, %xmm2 1577; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] 1578; SSSE3-NEXT: movsbq 7(%rdi), %rax 1579; SSSE3-NEXT: movd %rax, %xmm4 1580; SSSE3-NEXT: movsbq 6(%rdi), %rax 1581; SSSE3-NEXT: movd %rax, %xmm3 1582; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0] 1583; SSSE3-NEXT: retq 1584; 1585; SSE41-LABEL: load_sext_8i8_to_8i64: 1586; SSE41: # BB#0: # %entry 1587; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 1588; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm1 1589; SSE41-NEXT: pmovsxbq 4(%rdi), %xmm2 1590; SSE41-NEXT: pmovsxbq 6(%rdi), %xmm3 1591; SSE41-NEXT: retq 1592; 1593; AVX1-LABEL: load_sext_8i8_to_8i64: 1594; AVX1: # BB#0: # %entry 1595; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0 1596; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1597; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1598; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1599; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1600; AVX1-NEXT: vpmovsxbd 4(%rdi), %xmm1 1601; AVX1-NEXT: vpmovsxdq %xmm1, %xmm2 1602; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 1603; AVX1-NEXT: vpmovsxdq %xmm1, %xmm1 1604; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 1605; AVX1-NEXT: retq 1606; 1607; AVX2-LABEL: load_sext_8i8_to_8i64: 1608; AVX2: # BB#0: # %entry 1609; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0 1610; AVX2-NEXT: vpmovsxbq 4(%rdi), %ymm1 1611; AVX2-NEXT: retq 1612; 1613; AVX512-LABEL: load_sext_8i8_to_8i64: 1614; AVX512: # BB#0: # %entry 1615; AVX512-NEXT: vpmovsxbq (%rdi), %zmm0 1616; AVX512-NEXT: retq 1617; 1618; X32-SSE41-LABEL: load_sext_8i8_to_8i64: 1619; X32-SSE41: # BB#0: # %entry 1620; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1621; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 1622; X32-SSE41-NEXT: pmovsxbq 2(%eax), %xmm1 1623; X32-SSE41-NEXT: pmovsxbq 4(%eax), %xmm2 1624; X32-SSE41-NEXT: pmovsxbq 6(%eax), %xmm3 1625; X32-SSE41-NEXT: retl 1626entry: 1627 %X = load <8 x i8>, <8 x i8>* %ptr 1628 %Y = sext <8 x i8> %X to <8 x i64> 1629 ret <8 x i64> %Y 1630} 1631 1632define <8 x i32> @load_sext_8i1_to_8i32(<8 x i1> *%ptr) { 1633; SSE2-LABEL: load_sext_8i1_to_8i32: 1634; SSE2: # BB#0: # %entry 1635; SSE2-NEXT: movzbl (%rdi), %eax 1636; SSE2-NEXT: movl %eax, %ecx 1637; SSE2-NEXT: shrl $6, %ecx 1638; SSE2-NEXT: andl $1, %ecx 1639; SSE2-NEXT: movd %ecx, %xmm0 1640; SSE2-NEXT: movl %eax, %ecx 1641; SSE2-NEXT: shrl $2, %ecx 1642; SSE2-NEXT: andl $1, %ecx 1643; SSE2-NEXT: movd %ecx, %xmm2 1644; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1645; SSE2-NEXT: movl %eax, %ecx 1646; SSE2-NEXT: andl $1, %ecx 1647; SSE2-NEXT: movd %ecx, %xmm1 1648; SSE2-NEXT: movl %eax, %ecx 1649; SSE2-NEXT: shrl $4, %ecx 1650; SSE2-NEXT: andl $1, %ecx 1651; SSE2-NEXT: movd %ecx, %xmm0 1652; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 1653; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 1654; SSE2-NEXT: movl %eax, %ecx 1655; SSE2-NEXT: shrl $5, %ecx 1656; SSE2-NEXT: andl $1, %ecx 1657; SSE2-NEXT: movd %ecx, %xmm0 1658; SSE2-NEXT: movl %eax, %ecx 1659; SSE2-NEXT: shrl %ecx 1660; SSE2-NEXT: andl $1, %ecx 1661; SSE2-NEXT: movd %ecx, %xmm2 1662; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1663; SSE2-NEXT: movl %eax, %ecx 1664; SSE2-NEXT: shrl $3, %ecx 1665; SSE2-NEXT: andl $1, %ecx 1666; SSE2-NEXT: movd %ecx, %xmm0 1667; SSE2-NEXT: shrl $7, %eax 1668; SSE2-NEXT: movzwl %ax, %eax 1669; SSE2-NEXT: movd %eax, %xmm3 1670; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 1671; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1672; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 1673; SSE2-NEXT: movdqa %xmm1, %xmm0 1674; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1675; SSE2-NEXT: pslld $31, %xmm0 1676; SSE2-NEXT: psrad $31, %xmm0 1677; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 1678; SSE2-NEXT: pslld $31, %xmm1 1679; SSE2-NEXT: psrad $31, %xmm1 1680; SSE2-NEXT: retq 1681; 1682; SSSE3-LABEL: load_sext_8i1_to_8i32: 1683; SSSE3: # BB#0: # %entry 1684; SSSE3-NEXT: movzbl (%rdi), %eax 1685; SSSE3-NEXT: movl %eax, %ecx 1686; SSSE3-NEXT: shrl $6, %ecx 1687; SSSE3-NEXT: andl $1, %ecx 1688; SSSE3-NEXT: movd %ecx, %xmm0 1689; SSSE3-NEXT: movl %eax, %ecx 1690; SSSE3-NEXT: shrl $2, %ecx 1691; SSSE3-NEXT: andl $1, %ecx 1692; SSSE3-NEXT: movd %ecx, %xmm2 1693; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1694; SSSE3-NEXT: movl %eax, %ecx 1695; SSSE3-NEXT: andl $1, %ecx 1696; SSSE3-NEXT: movd %ecx, %xmm1 1697; SSSE3-NEXT: movl %eax, %ecx 1698; SSSE3-NEXT: shrl $4, %ecx 1699; SSSE3-NEXT: andl $1, %ecx 1700; SSSE3-NEXT: movd %ecx, %xmm0 1701; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 1702; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 1703; SSSE3-NEXT: movl %eax, %ecx 1704; SSSE3-NEXT: shrl $5, %ecx 1705; SSSE3-NEXT: andl $1, %ecx 1706; SSSE3-NEXT: movd %ecx, %xmm0 1707; SSSE3-NEXT: movl %eax, %ecx 1708; SSSE3-NEXT: shrl %ecx 1709; SSSE3-NEXT: andl $1, %ecx 1710; SSSE3-NEXT: movd %ecx, %xmm2 1711; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1712; SSSE3-NEXT: movl %eax, %ecx 1713; SSSE3-NEXT: shrl $3, %ecx 1714; SSSE3-NEXT: andl $1, %ecx 1715; SSSE3-NEXT: movd %ecx, %xmm0 1716; SSSE3-NEXT: shrl $7, %eax 1717; SSSE3-NEXT: movzwl %ax, %eax 1718; SSSE3-NEXT: movd %eax, %xmm3 1719; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 1720; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1721; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 1722; SSSE3-NEXT: movdqa %xmm1, %xmm0 1723; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1724; SSSE3-NEXT: pslld $31, %xmm0 1725; SSSE3-NEXT: psrad $31, %xmm0 1726; SSSE3-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 1727; SSSE3-NEXT: pslld $31, %xmm1 1728; SSSE3-NEXT: psrad $31, %xmm1 1729; SSSE3-NEXT: retq 1730; 1731; SSE41-LABEL: load_sext_8i1_to_8i32: 1732; SSE41: # BB#0: # %entry 1733; SSE41-NEXT: movzbl (%rdi), %eax 1734; SSE41-NEXT: movl %eax, %ecx 1735; SSE41-NEXT: shrl %ecx 1736; SSE41-NEXT: andl $1, %ecx 1737; SSE41-NEXT: movl %eax, %edx 1738; SSE41-NEXT: andl $1, %edx 1739; SSE41-NEXT: movd %edx, %xmm1 1740; SSE41-NEXT: pinsrw $1, %ecx, %xmm1 1741; SSE41-NEXT: movl %eax, %ecx 1742; SSE41-NEXT: shrl $2, %ecx 1743; SSE41-NEXT: andl $1, %ecx 1744; SSE41-NEXT: pinsrw $2, %ecx, %xmm1 1745; SSE41-NEXT: movl %eax, %ecx 1746; SSE41-NEXT: shrl $3, %ecx 1747; SSE41-NEXT: andl $1, %ecx 1748; SSE41-NEXT: pinsrw $3, %ecx, %xmm1 1749; SSE41-NEXT: movl %eax, %ecx 1750; SSE41-NEXT: shrl $4, %ecx 1751; SSE41-NEXT: andl $1, %ecx 1752; SSE41-NEXT: pinsrw $4, %ecx, %xmm1 1753; SSE41-NEXT: movl %eax, %ecx 1754; SSE41-NEXT: shrl $5, %ecx 1755; SSE41-NEXT: andl $1, %ecx 1756; SSE41-NEXT: pinsrw $5, %ecx, %xmm1 1757; SSE41-NEXT: movl %eax, %ecx 1758; SSE41-NEXT: shrl $6, %ecx 1759; SSE41-NEXT: andl $1, %ecx 1760; SSE41-NEXT: pinsrw $6, %ecx, %xmm1 1761; SSE41-NEXT: shrl $7, %eax 1762; SSE41-NEXT: movzwl %ax, %eax 1763; SSE41-NEXT: pinsrw $7, %eax, %xmm1 1764; SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 1765; SSE41-NEXT: pslld $31, %xmm0 1766; SSE41-NEXT: psrad $31, %xmm0 1767; SSE41-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 1768; SSE41-NEXT: pslld $31, %xmm1 1769; SSE41-NEXT: psrad $31, %xmm1 1770; SSE41-NEXT: retq 1771; 1772; AVX1-LABEL: load_sext_8i1_to_8i32: 1773; AVX1: # BB#0: # %entry 1774; AVX1-NEXT: movsbq (%rdi), %rax 1775; AVX1-NEXT: movq %rax, %rcx 1776; AVX1-NEXT: shlq $58, %rcx 1777; AVX1-NEXT: sarq $63, %rcx 1778; AVX1-NEXT: movq %rax, %rdx 1779; AVX1-NEXT: shlq $59, %rdx 1780; AVX1-NEXT: sarq $63, %rdx 1781; AVX1-NEXT: vmovd %edx, %xmm0 1782; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 1783; AVX1-NEXT: movq %rax, %rcx 1784; AVX1-NEXT: shlq $57, %rcx 1785; AVX1-NEXT: sarq $63, %rcx 1786; AVX1-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 1787; AVX1-NEXT: movq %rax, %rcx 1788; AVX1-NEXT: shrq $7, %rcx 1789; AVX1-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0 1790; AVX1-NEXT: movq %rax, %rcx 1791; AVX1-NEXT: shlq $62, %rcx 1792; AVX1-NEXT: sarq $63, %rcx 1793; AVX1-NEXT: movq %rax, %rdx 1794; AVX1-NEXT: shlq $63, %rdx 1795; AVX1-NEXT: sarq $63, %rdx 1796; AVX1-NEXT: vmovd %edx, %xmm1 1797; AVX1-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1 1798; AVX1-NEXT: movq %rax, %rcx 1799; AVX1-NEXT: shlq $61, %rcx 1800; AVX1-NEXT: sarq $63, %rcx 1801; AVX1-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1 1802; AVX1-NEXT: shlq $60, %rax 1803; AVX1-NEXT: sarq $63, %rax 1804; AVX1-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1 1805; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1806; AVX1-NEXT: retq 1807; 1808; AVX2-LABEL: load_sext_8i1_to_8i32: 1809; AVX2: # BB#0: # %entry 1810; AVX2-NEXT: movsbq (%rdi), %rax 1811; AVX2-NEXT: movq %rax, %rcx 1812; AVX2-NEXT: shlq $58, %rcx 1813; AVX2-NEXT: sarq $63, %rcx 1814; AVX2-NEXT: movq %rax, %rdx 1815; AVX2-NEXT: shlq $59, %rdx 1816; AVX2-NEXT: sarq $63, %rdx 1817; AVX2-NEXT: vmovd %edx, %xmm0 1818; AVX2-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 1819; AVX2-NEXT: movq %rax, %rcx 1820; AVX2-NEXT: shlq $57, %rcx 1821; AVX2-NEXT: sarq $63, %rcx 1822; AVX2-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 1823; AVX2-NEXT: movq %rax, %rcx 1824; AVX2-NEXT: shrq $7, %rcx 1825; AVX2-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0 1826; AVX2-NEXT: movq %rax, %rcx 1827; AVX2-NEXT: shlq $62, %rcx 1828; AVX2-NEXT: sarq $63, %rcx 1829; AVX2-NEXT: movq %rax, %rdx 1830; AVX2-NEXT: shlq $63, %rdx 1831; AVX2-NEXT: sarq $63, %rdx 1832; AVX2-NEXT: vmovd %edx, %xmm1 1833; AVX2-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1 1834; AVX2-NEXT: movq %rax, %rcx 1835; AVX2-NEXT: shlq $61, %rcx 1836; AVX2-NEXT: sarq $63, %rcx 1837; AVX2-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1 1838; AVX2-NEXT: shlq $60, %rax 1839; AVX2-NEXT: sarq $63, %rax 1840; AVX2-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1 1841; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 1842; AVX2-NEXT: retq 1843; 1844; AVX512-LABEL: load_sext_8i1_to_8i32: 1845; AVX512: # BB#0: # %entry 1846; AVX512-NEXT: movzbl (%rdi), %eax 1847; AVX512-NEXT: kmovw %eax, %k1 1848; AVX512-NEXT: vpbroadcastq {{.*}}(%rip), %zmm0 {%k1} {z} 1849; AVX512-NEXT: vpmovqd %zmm0, %ymm0 1850; AVX512-NEXT: retq 1851; 1852; X32-SSE41-LABEL: load_sext_8i1_to_8i32: 1853; X32-SSE41: # BB#0: # %entry 1854; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1855; X32-SSE41-NEXT: movzbl (%eax), %eax 1856; X32-SSE41-NEXT: movl %eax, %ecx 1857; X32-SSE41-NEXT: shrl %ecx 1858; X32-SSE41-NEXT: andl $1, %ecx 1859; X32-SSE41-NEXT: movl %eax, %edx 1860; X32-SSE41-NEXT: andl $1, %edx 1861; X32-SSE41-NEXT: movd %edx, %xmm1 1862; X32-SSE41-NEXT: pinsrw $1, %ecx, %xmm1 1863; X32-SSE41-NEXT: movl %eax, %ecx 1864; X32-SSE41-NEXT: shrl $2, %ecx 1865; X32-SSE41-NEXT: andl $1, %ecx 1866; X32-SSE41-NEXT: pinsrw $2, %ecx, %xmm1 1867; X32-SSE41-NEXT: movl %eax, %ecx 1868; X32-SSE41-NEXT: shrl $3, %ecx 1869; X32-SSE41-NEXT: andl $1, %ecx 1870; X32-SSE41-NEXT: pinsrw $3, %ecx, %xmm1 1871; X32-SSE41-NEXT: movl %eax, %ecx 1872; X32-SSE41-NEXT: shrl $4, %ecx 1873; X32-SSE41-NEXT: andl $1, %ecx 1874; X32-SSE41-NEXT: pinsrw $4, %ecx, %xmm1 1875; X32-SSE41-NEXT: movl %eax, %ecx 1876; X32-SSE41-NEXT: shrl $5, %ecx 1877; X32-SSE41-NEXT: andl $1, %ecx 1878; X32-SSE41-NEXT: pinsrw $5, %ecx, %xmm1 1879; X32-SSE41-NEXT: movl %eax, %ecx 1880; X32-SSE41-NEXT: shrl $6, %ecx 1881; X32-SSE41-NEXT: andl $1, %ecx 1882; X32-SSE41-NEXT: pinsrw $6, %ecx, %xmm1 1883; X32-SSE41-NEXT: shrl $7, %eax 1884; X32-SSE41-NEXT: pinsrw $7, %eax, %xmm1 1885; X32-SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 1886; X32-SSE41-NEXT: pslld $31, %xmm0 1887; X32-SSE41-NEXT: psrad $31, %xmm0 1888; X32-SSE41-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 1889; X32-SSE41-NEXT: pslld $31, %xmm1 1890; X32-SSE41-NEXT: psrad $31, %xmm1 1891; X32-SSE41-NEXT: retl 1892entry: 1893 %X = load <8 x i1>, <8 x i1>* %ptr 1894 %Y = sext <8 x i1> %X to <8 x i32> 1895 ret <8 x i32> %Y 1896} 1897 1898define <8 x i32> @load_sext_8i8_to_8i32(<8 x i8> *%ptr) { 1899; SSE2-LABEL: load_sext_8i8_to_8i32: 1900; SSE2: # BB#0: # %entry 1901; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 1902; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1903; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1904; SSE2-NEXT: psrad $24, %xmm0 1905; SSE2-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 1906; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1907; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 1908; SSE2-NEXT: psrad $24, %xmm1 1909; SSE2-NEXT: retq 1910; 1911; SSSE3-LABEL: load_sext_8i8_to_8i32: 1912; SSSE3: # BB#0: # %entry 1913; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 1914; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1915; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1916; SSSE3-NEXT: psrad $24, %xmm0 1917; SSSE3-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 1918; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1919; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 1920; SSSE3-NEXT: psrad $24, %xmm1 1921; SSSE3-NEXT: retq 1922; 1923; SSE41-LABEL: load_sext_8i8_to_8i32: 1924; SSE41: # BB#0: # %entry 1925; SSE41-NEXT: pmovsxbd (%rdi), %xmm0 1926; SSE41-NEXT: pmovsxbd 4(%rdi), %xmm1 1927; SSE41-NEXT: retq 1928; 1929; AVX1-LABEL: load_sext_8i8_to_8i32: 1930; AVX1: # BB#0: # %entry 1931; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0 1932; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 1933; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1934; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 1935; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1936; AVX1-NEXT: retq 1937; 1938; AVX2-LABEL: load_sext_8i8_to_8i32: 1939; AVX2: # BB#0: # %entry 1940; AVX2-NEXT: vpmovsxbd (%rdi), %ymm0 1941; AVX2-NEXT: retq 1942; 1943; AVX512-LABEL: load_sext_8i8_to_8i32: 1944; AVX512: # BB#0: # %entry 1945; AVX512-NEXT: vpmovsxbd (%rdi), %ymm0 1946; AVX512-NEXT: retq 1947; 1948; X32-SSE41-LABEL: load_sext_8i8_to_8i32: 1949; X32-SSE41: # BB#0: # %entry 1950; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1951; X32-SSE41-NEXT: pmovsxbd (%eax), %xmm0 1952; X32-SSE41-NEXT: pmovsxbd 4(%eax), %xmm1 1953; X32-SSE41-NEXT: retl 1954entry: 1955 %X = load <8 x i8>, <8 x i8>* %ptr 1956 %Y = sext <8 x i8> %X to <8 x i32> 1957 ret <8 x i32> %Y 1958} 1959 1960define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone { 1961; SSE2-LABEL: load_sext_16i1_to_16i8: 1962; SSE2: # BB#0: # %entry 1963; SSE2-NEXT: pushq %rbp 1964; SSE2-NEXT: pushq %r15 1965; SSE2-NEXT: pushq %r14 1966; SSE2-NEXT: pushq %r13 1967; SSE2-NEXT: pushq %r12 1968; SSE2-NEXT: pushq %rbx 1969; SSE2-NEXT: movswq (%rdi), %rax 1970; SSE2-NEXT: movq %rax, %r8 1971; SSE2-NEXT: movq %rax, %r9 1972; SSE2-NEXT: movq %rax, %r10 1973; SSE2-NEXT: movq %rax, %r11 1974; SSE2-NEXT: movq %rax, %r14 1975; SSE2-NEXT: movq %rax, %r15 1976; SSE2-NEXT: movq %rax, %r12 1977; SSE2-NEXT: movq %rax, %r13 1978; SSE2-NEXT: movq %rax, %rbx 1979; SSE2-NEXT: movq %rax, %rcx 1980; SSE2-NEXT: movq %rax, %rdx 1981; SSE2-NEXT: movq %rax, %rsi 1982; SSE2-NEXT: movq %rax, %rdi 1983; SSE2-NEXT: movq %rax, %rbp 1984; SSE2-NEXT: shlq $49, %rbp 1985; SSE2-NEXT: sarq $63, %rbp 1986; SSE2-NEXT: movd %ebp, %xmm0 1987; SSE2-NEXT: movq %rax, %rbp 1988; SSE2-NEXT: movsbq %al, %rax 1989; SSE2-NEXT: shlq $57, %r8 1990; SSE2-NEXT: sarq $63, %r8 1991; SSE2-NEXT: movd %r8d, %xmm1 1992; SSE2-NEXT: shlq $53, %r9 1993; SSE2-NEXT: sarq $63, %r9 1994; SSE2-NEXT: movd %r9d, %xmm2 1995; SSE2-NEXT: shlq $61, %r10 1996; SSE2-NEXT: sarq $63, %r10 1997; SSE2-NEXT: movd %r10d, %xmm3 1998; SSE2-NEXT: shlq $51, %r11 1999; SSE2-NEXT: sarq $63, %r11 2000; SSE2-NEXT: movd %r11d, %xmm4 2001; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2002; SSE2-NEXT: shlq $59, %r14 2003; SSE2-NEXT: sarq $63, %r14 2004; SSE2-NEXT: movd %r14d, %xmm5 2005; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2006; SSE2-NEXT: shlq $55, %r15 2007; SSE2-NEXT: sarq $63, %r15 2008; SSE2-NEXT: movd %r15d, %xmm2 2009; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 2010; SSE2-NEXT: shlq $63, %r12 2011; SSE2-NEXT: sarq $63, %r12 2012; SSE2-NEXT: movd %r12d, %xmm0 2013; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7] 2014; SSE2-NEXT: shlq $50, %r13 2015; SSE2-NEXT: sarq $63, %r13 2016; SSE2-NEXT: movd %r13d, %xmm1 2017; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 2018; SSE2-NEXT: shlq $58, %rbx 2019; SSE2-NEXT: sarq $63, %rbx 2020; SSE2-NEXT: movd %ebx, %xmm2 2021; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] 2022; SSE2-NEXT: shlq $54, %rcx 2023; SSE2-NEXT: sarq $63, %rcx 2024; SSE2-NEXT: movd %ecx, %xmm4 2025; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2026; SSE2-NEXT: shlq $62, %rdx 2027; SSE2-NEXT: sarq $63, %rdx 2028; SSE2-NEXT: movd %edx, %xmm3 2029; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2030; SSE2-NEXT: shlq $52, %rsi 2031; SSE2-NEXT: sarq $63, %rsi 2032; SSE2-NEXT: movd %esi, %xmm1 2033; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 2034; SSE2-NEXT: shlq $60, %rdi 2035; SSE2-NEXT: sarq $63, %rdi 2036; SSE2-NEXT: movd %edi, %xmm4 2037; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2038; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] 2039; SSE2-NEXT: shrq $15, %rbp 2040; SSE2-NEXT: movd %ebp, %xmm1 2041; SSE2-NEXT: shrq $7, %rax 2042; SSE2-NEXT: movd %eax, %xmm2 2043; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2044; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 2045; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 2046; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2047; SSE2-NEXT: popq %rbx 2048; SSE2-NEXT: popq %r12 2049; SSE2-NEXT: popq %r13 2050; SSE2-NEXT: popq %r14 2051; SSE2-NEXT: popq %r15 2052; SSE2-NEXT: popq %rbp 2053; SSE2-NEXT: retq 2054; 2055; SSSE3-LABEL: load_sext_16i1_to_16i8: 2056; SSSE3: # BB#0: # %entry 2057; SSSE3-NEXT: pushq %rbp 2058; SSSE3-NEXT: pushq %r15 2059; SSSE3-NEXT: pushq %r14 2060; SSSE3-NEXT: pushq %r13 2061; SSSE3-NEXT: pushq %r12 2062; SSSE3-NEXT: pushq %rbx 2063; SSSE3-NEXT: movswq (%rdi), %rax 2064; SSSE3-NEXT: movq %rax, %r8 2065; SSSE3-NEXT: movq %rax, %r9 2066; SSSE3-NEXT: movq %rax, %r10 2067; SSSE3-NEXT: movq %rax, %r11 2068; SSSE3-NEXT: movq %rax, %r14 2069; SSSE3-NEXT: movq %rax, %r15 2070; SSSE3-NEXT: movq %rax, %r12 2071; SSSE3-NEXT: movq %rax, %r13 2072; SSSE3-NEXT: movq %rax, %rbx 2073; SSSE3-NEXT: movq %rax, %rcx 2074; SSSE3-NEXT: movq %rax, %rdx 2075; SSSE3-NEXT: movq %rax, %rsi 2076; SSSE3-NEXT: movq %rax, %rdi 2077; SSSE3-NEXT: movq %rax, %rbp 2078; SSSE3-NEXT: shlq $49, %rbp 2079; SSSE3-NEXT: sarq $63, %rbp 2080; SSSE3-NEXT: movd %ebp, %xmm0 2081; SSSE3-NEXT: movq %rax, %rbp 2082; SSSE3-NEXT: movsbq %al, %rax 2083; SSSE3-NEXT: shlq $57, %r8 2084; SSSE3-NEXT: sarq $63, %r8 2085; SSSE3-NEXT: movd %r8d, %xmm1 2086; SSSE3-NEXT: shlq $53, %r9 2087; SSSE3-NEXT: sarq $63, %r9 2088; SSSE3-NEXT: movd %r9d, %xmm2 2089; SSSE3-NEXT: shlq $61, %r10 2090; SSSE3-NEXT: sarq $63, %r10 2091; SSSE3-NEXT: movd %r10d, %xmm3 2092; SSSE3-NEXT: shlq $51, %r11 2093; SSSE3-NEXT: sarq $63, %r11 2094; SSSE3-NEXT: movd %r11d, %xmm4 2095; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2096; SSSE3-NEXT: shlq $59, %r14 2097; SSSE3-NEXT: sarq $63, %r14 2098; SSSE3-NEXT: movd %r14d, %xmm5 2099; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2100; SSSE3-NEXT: shlq $55, %r15 2101; SSSE3-NEXT: sarq $63, %r15 2102; SSSE3-NEXT: movd %r15d, %xmm2 2103; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 2104; SSSE3-NEXT: shlq $63, %r12 2105; SSSE3-NEXT: sarq $63, %r12 2106; SSSE3-NEXT: movd %r12d, %xmm0 2107; SSSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7] 2108; SSSE3-NEXT: shlq $50, %r13 2109; SSSE3-NEXT: sarq $63, %r13 2110; SSSE3-NEXT: movd %r13d, %xmm1 2111; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 2112; SSSE3-NEXT: shlq $58, %rbx 2113; SSSE3-NEXT: sarq $63, %rbx 2114; SSSE3-NEXT: movd %ebx, %xmm2 2115; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] 2116; SSSE3-NEXT: shlq $54, %rcx 2117; SSSE3-NEXT: sarq $63, %rcx 2118; SSSE3-NEXT: movd %ecx, %xmm4 2119; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2120; SSSE3-NEXT: shlq $62, %rdx 2121; SSSE3-NEXT: sarq $63, %rdx 2122; SSSE3-NEXT: movd %edx, %xmm3 2123; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2124; SSSE3-NEXT: shlq $52, %rsi 2125; SSSE3-NEXT: sarq $63, %rsi 2126; SSSE3-NEXT: movd %esi, %xmm1 2127; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 2128; SSSE3-NEXT: shlq $60, %rdi 2129; SSSE3-NEXT: sarq $63, %rdi 2130; SSSE3-NEXT: movd %edi, %xmm4 2131; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2132; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] 2133; SSSE3-NEXT: shrq $15, %rbp 2134; SSSE3-NEXT: movd %ebp, %xmm1 2135; SSSE3-NEXT: shrq $7, %rax 2136; SSSE3-NEXT: movd %eax, %xmm2 2137; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2138; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 2139; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 2140; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2141; SSSE3-NEXT: popq %rbx 2142; SSSE3-NEXT: popq %r12 2143; SSSE3-NEXT: popq %r13 2144; SSSE3-NEXT: popq %r14 2145; SSSE3-NEXT: popq %r15 2146; SSSE3-NEXT: popq %rbp 2147; SSSE3-NEXT: retq 2148; 2149; SSE41-LABEL: load_sext_16i1_to_16i8: 2150; SSE41: # BB#0: # %entry 2151; SSE41-NEXT: movswq (%rdi), %rax 2152; SSE41-NEXT: movq %rax, %rcx 2153; SSE41-NEXT: shlq $62, %rcx 2154; SSE41-NEXT: sarq $63, %rcx 2155; SSE41-NEXT: movq %rax, %rdx 2156; SSE41-NEXT: shlq $63, %rdx 2157; SSE41-NEXT: sarq $63, %rdx 2158; SSE41-NEXT: movd %edx, %xmm0 2159; SSE41-NEXT: pinsrb $1, %ecx, %xmm0 2160; SSE41-NEXT: movq %rax, %rcx 2161; SSE41-NEXT: shlq $61, %rcx 2162; SSE41-NEXT: sarq $63, %rcx 2163; SSE41-NEXT: pinsrb $2, %ecx, %xmm0 2164; SSE41-NEXT: movq %rax, %rcx 2165; SSE41-NEXT: shlq $60, %rcx 2166; SSE41-NEXT: sarq $63, %rcx 2167; SSE41-NEXT: pinsrb $3, %ecx, %xmm0 2168; SSE41-NEXT: movq %rax, %rcx 2169; SSE41-NEXT: shlq $59, %rcx 2170; SSE41-NEXT: sarq $63, %rcx 2171; SSE41-NEXT: pinsrb $4, %ecx, %xmm0 2172; SSE41-NEXT: movq %rax, %rcx 2173; SSE41-NEXT: shlq $58, %rcx 2174; SSE41-NEXT: sarq $63, %rcx 2175; SSE41-NEXT: pinsrb $5, %ecx, %xmm0 2176; SSE41-NEXT: movq %rax, %rcx 2177; SSE41-NEXT: shlq $57, %rcx 2178; SSE41-NEXT: sarq $63, %rcx 2179; SSE41-NEXT: pinsrb $6, %ecx, %xmm0 2180; SSE41-NEXT: movsbq %al, %rcx 2181; SSE41-NEXT: shrq $7, %rcx 2182; SSE41-NEXT: pinsrb $7, %ecx, %xmm0 2183; SSE41-NEXT: movq %rax, %rcx 2184; SSE41-NEXT: shlq $55, %rcx 2185; SSE41-NEXT: sarq $63, %rcx 2186; SSE41-NEXT: pinsrb $8, %ecx, %xmm0 2187; SSE41-NEXT: movq %rax, %rcx 2188; SSE41-NEXT: shlq $54, %rcx 2189; SSE41-NEXT: sarq $63, %rcx 2190; SSE41-NEXT: pinsrb $9, %ecx, %xmm0 2191; SSE41-NEXT: movq %rax, %rcx 2192; SSE41-NEXT: shlq $53, %rcx 2193; SSE41-NEXT: sarq $63, %rcx 2194; SSE41-NEXT: pinsrb $10, %ecx, %xmm0 2195; SSE41-NEXT: movq %rax, %rcx 2196; SSE41-NEXT: shlq $52, %rcx 2197; SSE41-NEXT: sarq $63, %rcx 2198; SSE41-NEXT: pinsrb $11, %ecx, %xmm0 2199; SSE41-NEXT: movq %rax, %rcx 2200; SSE41-NEXT: shlq $51, %rcx 2201; SSE41-NEXT: sarq $63, %rcx 2202; SSE41-NEXT: pinsrb $12, %ecx, %xmm0 2203; SSE41-NEXT: movq %rax, %rcx 2204; SSE41-NEXT: shlq $50, %rcx 2205; SSE41-NEXT: sarq $63, %rcx 2206; SSE41-NEXT: pinsrb $13, %ecx, %xmm0 2207; SSE41-NEXT: movq %rax, %rcx 2208; SSE41-NEXT: shlq $49, %rcx 2209; SSE41-NEXT: sarq $63, %rcx 2210; SSE41-NEXT: pinsrb $14, %ecx, %xmm0 2211; SSE41-NEXT: shrq $15, %rax 2212; SSE41-NEXT: pinsrb $15, %eax, %xmm0 2213; SSE41-NEXT: retq 2214; 2215; AVX1-LABEL: load_sext_16i1_to_16i8: 2216; AVX1: # BB#0: # %entry 2217; AVX1-NEXT: movswq (%rdi), %rax 2218; AVX1-NEXT: movq %rax, %rcx 2219; AVX1-NEXT: shlq $62, %rcx 2220; AVX1-NEXT: sarq $63, %rcx 2221; AVX1-NEXT: movq %rax, %rdx 2222; AVX1-NEXT: shlq $63, %rdx 2223; AVX1-NEXT: sarq $63, %rdx 2224; AVX1-NEXT: vmovd %edx, %xmm0 2225; AVX1-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0 2226; AVX1-NEXT: movq %rax, %rcx 2227; AVX1-NEXT: shlq $61, %rcx 2228; AVX1-NEXT: sarq $63, %rcx 2229; AVX1-NEXT: vpinsrb $2, %ecx, %xmm0, %xmm0 2230; AVX1-NEXT: movq %rax, %rcx 2231; AVX1-NEXT: shlq $60, %rcx 2232; AVX1-NEXT: sarq $63, %rcx 2233; AVX1-NEXT: vpinsrb $3, %ecx, %xmm0, %xmm0 2234; AVX1-NEXT: movq %rax, %rcx 2235; AVX1-NEXT: shlq $59, %rcx 2236; AVX1-NEXT: sarq $63, %rcx 2237; AVX1-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 2238; AVX1-NEXT: movq %rax, %rcx 2239; AVX1-NEXT: shlq $58, %rcx 2240; AVX1-NEXT: sarq $63, %rcx 2241; AVX1-NEXT: vpinsrb $5, %ecx, %xmm0, %xmm0 2242; AVX1-NEXT: movq %rax, %rcx 2243; AVX1-NEXT: shlq $57, %rcx 2244; AVX1-NEXT: sarq $63, %rcx 2245; AVX1-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0 2246; AVX1-NEXT: movsbq %al, %rcx 2247; AVX1-NEXT: shrq $7, %rcx 2248; AVX1-NEXT: vpinsrb $7, %ecx, %xmm0, %xmm0 2249; AVX1-NEXT: movq %rax, %rcx 2250; AVX1-NEXT: shlq $55, %rcx 2251; AVX1-NEXT: sarq $63, %rcx 2252; AVX1-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm0 2253; AVX1-NEXT: movq %rax, %rcx 2254; AVX1-NEXT: shlq $54, %rcx 2255; AVX1-NEXT: sarq $63, %rcx 2256; AVX1-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0 2257; AVX1-NEXT: movq %rax, %rcx 2258; AVX1-NEXT: shlq $53, %rcx 2259; AVX1-NEXT: sarq $63, %rcx 2260; AVX1-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0 2261; AVX1-NEXT: movq %rax, %rcx 2262; AVX1-NEXT: shlq $52, %rcx 2263; AVX1-NEXT: sarq $63, %rcx 2264; AVX1-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0 2265; AVX1-NEXT: movq %rax, %rcx 2266; AVX1-NEXT: shlq $51, %rcx 2267; AVX1-NEXT: sarq $63, %rcx 2268; AVX1-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0 2269; AVX1-NEXT: movq %rax, %rcx 2270; AVX1-NEXT: shlq $50, %rcx 2271; AVX1-NEXT: sarq $63, %rcx 2272; AVX1-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0 2273; AVX1-NEXT: movq %rax, %rcx 2274; AVX1-NEXT: shlq $49, %rcx 2275; AVX1-NEXT: sarq $63, %rcx 2276; AVX1-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0 2277; AVX1-NEXT: shrq $15, %rax 2278; AVX1-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 2279; AVX1-NEXT: retq 2280; 2281; AVX2-LABEL: load_sext_16i1_to_16i8: 2282; AVX2: # BB#0: # %entry 2283; AVX2-NEXT: movswq (%rdi), %rax 2284; AVX2-NEXT: movq %rax, %rcx 2285; AVX2-NEXT: shlq $62, %rcx 2286; AVX2-NEXT: sarq $63, %rcx 2287; AVX2-NEXT: movq %rax, %rdx 2288; AVX2-NEXT: shlq $63, %rdx 2289; AVX2-NEXT: sarq $63, %rdx 2290; AVX2-NEXT: vmovd %edx, %xmm0 2291; AVX2-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0 2292; AVX2-NEXT: movq %rax, %rcx 2293; AVX2-NEXT: shlq $61, %rcx 2294; AVX2-NEXT: sarq $63, %rcx 2295; AVX2-NEXT: vpinsrb $2, %ecx, %xmm0, %xmm0 2296; AVX2-NEXT: movq %rax, %rcx 2297; AVX2-NEXT: shlq $60, %rcx 2298; AVX2-NEXT: sarq $63, %rcx 2299; AVX2-NEXT: vpinsrb $3, %ecx, %xmm0, %xmm0 2300; AVX2-NEXT: movq %rax, %rcx 2301; AVX2-NEXT: shlq $59, %rcx 2302; AVX2-NEXT: sarq $63, %rcx 2303; AVX2-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 2304; AVX2-NEXT: movq %rax, %rcx 2305; AVX2-NEXT: shlq $58, %rcx 2306; AVX2-NEXT: sarq $63, %rcx 2307; AVX2-NEXT: vpinsrb $5, %ecx, %xmm0, %xmm0 2308; AVX2-NEXT: movq %rax, %rcx 2309; AVX2-NEXT: shlq $57, %rcx 2310; AVX2-NEXT: sarq $63, %rcx 2311; AVX2-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0 2312; AVX2-NEXT: movsbq %al, %rcx 2313; AVX2-NEXT: shrq $7, %rcx 2314; AVX2-NEXT: vpinsrb $7, %ecx, %xmm0, %xmm0 2315; AVX2-NEXT: movq %rax, %rcx 2316; AVX2-NEXT: shlq $55, %rcx 2317; AVX2-NEXT: sarq $63, %rcx 2318; AVX2-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm0 2319; AVX2-NEXT: movq %rax, %rcx 2320; AVX2-NEXT: shlq $54, %rcx 2321; AVX2-NEXT: sarq $63, %rcx 2322; AVX2-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0 2323; AVX2-NEXT: movq %rax, %rcx 2324; AVX2-NEXT: shlq $53, %rcx 2325; AVX2-NEXT: sarq $63, %rcx 2326; AVX2-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0 2327; AVX2-NEXT: movq %rax, %rcx 2328; AVX2-NEXT: shlq $52, %rcx 2329; AVX2-NEXT: sarq $63, %rcx 2330; AVX2-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0 2331; AVX2-NEXT: movq %rax, %rcx 2332; AVX2-NEXT: shlq $51, %rcx 2333; AVX2-NEXT: sarq $63, %rcx 2334; AVX2-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0 2335; AVX2-NEXT: movq %rax, %rcx 2336; AVX2-NEXT: shlq $50, %rcx 2337; AVX2-NEXT: sarq $63, %rcx 2338; AVX2-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0 2339; AVX2-NEXT: movq %rax, %rcx 2340; AVX2-NEXT: shlq $49, %rcx 2341; AVX2-NEXT: sarq $63, %rcx 2342; AVX2-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0 2343; AVX2-NEXT: shrq $15, %rax 2344; AVX2-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 2345; AVX2-NEXT: retq 2346; 2347; AVX512-LABEL: load_sext_16i1_to_16i8: 2348; AVX512: # BB#0: # %entry 2349; AVX512-NEXT: kmovw (%rdi), %k1 2350; AVX512-NEXT: vpbroadcastd {{.*}}(%rip), %zmm0 {%k1} {z} 2351; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2352; AVX512-NEXT: retq 2353; 2354; X32-SSE41-LABEL: load_sext_16i1_to_16i8: 2355; X32-SSE41: # BB#0: # %entry 2356; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2357; X32-SSE41-NEXT: movswl (%eax), %eax 2358; X32-SSE41-NEXT: movl %eax, %ecx 2359; X32-SSE41-NEXT: shll $30, %ecx 2360; X32-SSE41-NEXT: sarl $31, %ecx 2361; X32-SSE41-NEXT: movl %eax, %edx 2362; X32-SSE41-NEXT: shll $31, %edx 2363; X32-SSE41-NEXT: sarl $31, %edx 2364; X32-SSE41-NEXT: movd %edx, %xmm0 2365; X32-SSE41-NEXT: pinsrb $1, %ecx, %xmm0 2366; X32-SSE41-NEXT: movl %eax, %ecx 2367; X32-SSE41-NEXT: shll $29, %ecx 2368; X32-SSE41-NEXT: sarl $31, %ecx 2369; X32-SSE41-NEXT: pinsrb $2, %ecx, %xmm0 2370; X32-SSE41-NEXT: movl %eax, %ecx 2371; X32-SSE41-NEXT: shll $28, %ecx 2372; X32-SSE41-NEXT: sarl $31, %ecx 2373; X32-SSE41-NEXT: pinsrb $3, %ecx, %xmm0 2374; X32-SSE41-NEXT: movl %eax, %ecx 2375; X32-SSE41-NEXT: shll $27, %ecx 2376; X32-SSE41-NEXT: sarl $31, %ecx 2377; X32-SSE41-NEXT: pinsrb $4, %ecx, %xmm0 2378; X32-SSE41-NEXT: movl %eax, %ecx 2379; X32-SSE41-NEXT: shll $26, %ecx 2380; X32-SSE41-NEXT: sarl $31, %ecx 2381; X32-SSE41-NEXT: pinsrb $5, %ecx, %xmm0 2382; X32-SSE41-NEXT: movl %eax, %ecx 2383; X32-SSE41-NEXT: shll $25, %ecx 2384; X32-SSE41-NEXT: sarl $31, %ecx 2385; X32-SSE41-NEXT: pinsrb $6, %ecx, %xmm0 2386; X32-SSE41-NEXT: movsbl %al, %ecx 2387; X32-SSE41-NEXT: shrl $7, %ecx 2388; X32-SSE41-NEXT: pinsrb $7, %ecx, %xmm0 2389; X32-SSE41-NEXT: movl %eax, %ecx 2390; X32-SSE41-NEXT: shll $23, %ecx 2391; X32-SSE41-NEXT: sarl $31, %ecx 2392; X32-SSE41-NEXT: pinsrb $8, %ecx, %xmm0 2393; X32-SSE41-NEXT: movl %eax, %ecx 2394; X32-SSE41-NEXT: shll $22, %ecx 2395; X32-SSE41-NEXT: sarl $31, %ecx 2396; X32-SSE41-NEXT: pinsrb $9, %ecx, %xmm0 2397; X32-SSE41-NEXT: movl %eax, %ecx 2398; X32-SSE41-NEXT: shll $21, %ecx 2399; X32-SSE41-NEXT: sarl $31, %ecx 2400; X32-SSE41-NEXT: pinsrb $10, %ecx, %xmm0 2401; X32-SSE41-NEXT: movl %eax, %ecx 2402; X32-SSE41-NEXT: shll $20, %ecx 2403; X32-SSE41-NEXT: sarl $31, %ecx 2404; X32-SSE41-NEXT: pinsrb $11, %ecx, %xmm0 2405; X32-SSE41-NEXT: movl %eax, %ecx 2406; X32-SSE41-NEXT: shll $19, %ecx 2407; X32-SSE41-NEXT: sarl $31, %ecx 2408; X32-SSE41-NEXT: pinsrb $12, %ecx, %xmm0 2409; X32-SSE41-NEXT: movl %eax, %ecx 2410; X32-SSE41-NEXT: shll $18, %ecx 2411; X32-SSE41-NEXT: sarl $31, %ecx 2412; X32-SSE41-NEXT: pinsrb $13, %ecx, %xmm0 2413; X32-SSE41-NEXT: movl %eax, %ecx 2414; X32-SSE41-NEXT: shll $17, %ecx 2415; X32-SSE41-NEXT: sarl $31, %ecx 2416; X32-SSE41-NEXT: pinsrb $14, %ecx, %xmm0 2417; X32-SSE41-NEXT: shrl $15, %eax 2418; X32-SSE41-NEXT: pinsrb $15, %eax, %xmm0 2419; X32-SSE41-NEXT: retl 2420entry: 2421 %X = load <16 x i1>, <16 x i1>* %ptr 2422 %Y = sext <16 x i1> %X to <16 x i8> 2423 ret <16 x i8> %Y 2424} 2425 2426define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) { 2427; SSE2-LABEL: load_sext_16i1_to_16i16: 2428; SSE2: # BB#0: # %entry 2429; SSE2-NEXT: movzwl (%rdi), %eax 2430; SSE2-NEXT: movl %eax, %ecx 2431; SSE2-NEXT: shrl $14, %ecx 2432; SSE2-NEXT: andl $1, %ecx 2433; SSE2-NEXT: movd %ecx, %xmm0 2434; SSE2-NEXT: movl %eax, %ecx 2435; SSE2-NEXT: shrl $6, %ecx 2436; SSE2-NEXT: andl $1, %ecx 2437; SSE2-NEXT: movd %ecx, %xmm1 2438; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2439; SSE2-NEXT: movl %eax, %ecx 2440; SSE2-NEXT: shrl $10, %ecx 2441; SSE2-NEXT: andl $1, %ecx 2442; SSE2-NEXT: movd %ecx, %xmm0 2443; SSE2-NEXT: movl %eax, %ecx 2444; SSE2-NEXT: shrl $2, %ecx 2445; SSE2-NEXT: andl $1, %ecx 2446; SSE2-NEXT: movd %ecx, %xmm2 2447; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 2448; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2449; SSE2-NEXT: movl %eax, %ecx 2450; SSE2-NEXT: shrl $12, %ecx 2451; SSE2-NEXT: andl $1, %ecx 2452; SSE2-NEXT: movd %ecx, %xmm0 2453; SSE2-NEXT: movl %eax, %ecx 2454; SSE2-NEXT: shrl $4, %ecx 2455; SSE2-NEXT: andl $1, %ecx 2456; SSE2-NEXT: movd %ecx, %xmm3 2457; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 2458; SSE2-NEXT: movl %eax, %ecx 2459; SSE2-NEXT: andl $1, %ecx 2460; SSE2-NEXT: movd %ecx, %xmm1 2461; SSE2-NEXT: movl %eax, %ecx 2462; SSE2-NEXT: shrl $8, %ecx 2463; SSE2-NEXT: andl $1, %ecx 2464; SSE2-NEXT: movd %ecx, %xmm0 2465; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2466; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 2467; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 2468; SSE2-NEXT: movl %eax, %ecx 2469; SSE2-NEXT: shrl $13, %ecx 2470; SSE2-NEXT: andl $1, %ecx 2471; SSE2-NEXT: movd %ecx, %xmm0 2472; SSE2-NEXT: movl %eax, %ecx 2473; SSE2-NEXT: shrl $5, %ecx 2474; SSE2-NEXT: andl $1, %ecx 2475; SSE2-NEXT: movd %ecx, %xmm2 2476; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 2477; SSE2-NEXT: movl %eax, %ecx 2478; SSE2-NEXT: shrl $9, %ecx 2479; SSE2-NEXT: andl $1, %ecx 2480; SSE2-NEXT: movd %ecx, %xmm3 2481; SSE2-NEXT: movl %eax, %ecx 2482; SSE2-NEXT: shrl %ecx 2483; SSE2-NEXT: andl $1, %ecx 2484; SSE2-NEXT: movd %ecx, %xmm0 2485; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2486; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 2487; SSE2-NEXT: movl %eax, %ecx 2488; SSE2-NEXT: shrl $11, %ecx 2489; SSE2-NEXT: andl $1, %ecx 2490; SSE2-NEXT: movd %ecx, %xmm2 2491; SSE2-NEXT: movl %eax, %ecx 2492; SSE2-NEXT: shrl $3, %ecx 2493; SSE2-NEXT: andl $1, %ecx 2494; SSE2-NEXT: movd %ecx, %xmm3 2495; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2496; SSE2-NEXT: movl %eax, %ecx 2497; SSE2-NEXT: shrl $7, %ecx 2498; SSE2-NEXT: andl $1, %ecx 2499; SSE2-NEXT: movd %ecx, %xmm2 2500; SSE2-NEXT: shrl $15, %eax 2501; SSE2-NEXT: movzwl %ax, %eax 2502; SSE2-NEXT: movd %eax, %xmm4 2503; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7] 2504; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2505; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2506; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2507; SSE2-NEXT: movdqa %xmm1, %xmm0 2508; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2509; SSE2-NEXT: psllw $15, %xmm0 2510; SSE2-NEXT: psraw $15, %xmm0 2511; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 2512; SSE2-NEXT: psllw $15, %xmm1 2513; SSE2-NEXT: psraw $15, %xmm1 2514; SSE2-NEXT: retq 2515; 2516; SSSE3-LABEL: load_sext_16i1_to_16i16: 2517; SSSE3: # BB#0: # %entry 2518; SSSE3-NEXT: movzwl (%rdi), %eax 2519; SSSE3-NEXT: movl %eax, %ecx 2520; SSSE3-NEXT: shrl $14, %ecx 2521; SSSE3-NEXT: andl $1, %ecx 2522; SSSE3-NEXT: movd %ecx, %xmm0 2523; SSSE3-NEXT: movl %eax, %ecx 2524; SSSE3-NEXT: shrl $6, %ecx 2525; SSSE3-NEXT: andl $1, %ecx 2526; SSSE3-NEXT: movd %ecx, %xmm1 2527; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2528; SSSE3-NEXT: movl %eax, %ecx 2529; SSSE3-NEXT: shrl $10, %ecx 2530; SSSE3-NEXT: andl $1, %ecx 2531; SSSE3-NEXT: movd %ecx, %xmm0 2532; SSSE3-NEXT: movl %eax, %ecx 2533; SSSE3-NEXT: shrl $2, %ecx 2534; SSSE3-NEXT: andl $1, %ecx 2535; SSSE3-NEXT: movd %ecx, %xmm2 2536; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 2537; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2538; SSSE3-NEXT: movl %eax, %ecx 2539; SSSE3-NEXT: shrl $12, %ecx 2540; SSSE3-NEXT: andl $1, %ecx 2541; SSSE3-NEXT: movd %ecx, %xmm0 2542; SSSE3-NEXT: movl %eax, %ecx 2543; SSSE3-NEXT: shrl $4, %ecx 2544; SSSE3-NEXT: andl $1, %ecx 2545; SSSE3-NEXT: movd %ecx, %xmm3 2546; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 2547; SSSE3-NEXT: movl %eax, %ecx 2548; SSSE3-NEXT: andl $1, %ecx 2549; SSSE3-NEXT: movd %ecx, %xmm1 2550; SSSE3-NEXT: movl %eax, %ecx 2551; SSSE3-NEXT: shrl $8, %ecx 2552; SSSE3-NEXT: andl $1, %ecx 2553; SSSE3-NEXT: movd %ecx, %xmm0 2554; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2555; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 2556; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 2557; SSSE3-NEXT: movl %eax, %ecx 2558; SSSE3-NEXT: shrl $13, %ecx 2559; SSSE3-NEXT: andl $1, %ecx 2560; SSSE3-NEXT: movd %ecx, %xmm0 2561; SSSE3-NEXT: movl %eax, %ecx 2562; SSSE3-NEXT: shrl $5, %ecx 2563; SSSE3-NEXT: andl $1, %ecx 2564; SSSE3-NEXT: movd %ecx, %xmm2 2565; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 2566; SSSE3-NEXT: movl %eax, %ecx 2567; SSSE3-NEXT: shrl $9, %ecx 2568; SSSE3-NEXT: andl $1, %ecx 2569; SSSE3-NEXT: movd %ecx, %xmm3 2570; SSSE3-NEXT: movl %eax, %ecx 2571; SSSE3-NEXT: shrl %ecx 2572; SSSE3-NEXT: andl $1, %ecx 2573; SSSE3-NEXT: movd %ecx, %xmm0 2574; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2575; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 2576; SSSE3-NEXT: movl %eax, %ecx 2577; SSSE3-NEXT: shrl $11, %ecx 2578; SSSE3-NEXT: andl $1, %ecx 2579; SSSE3-NEXT: movd %ecx, %xmm2 2580; SSSE3-NEXT: movl %eax, %ecx 2581; SSSE3-NEXT: shrl $3, %ecx 2582; SSSE3-NEXT: andl $1, %ecx 2583; SSSE3-NEXT: movd %ecx, %xmm3 2584; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2585; SSSE3-NEXT: movl %eax, %ecx 2586; SSSE3-NEXT: shrl $7, %ecx 2587; SSSE3-NEXT: andl $1, %ecx 2588; SSSE3-NEXT: movd %ecx, %xmm2 2589; SSSE3-NEXT: shrl $15, %eax 2590; SSSE3-NEXT: movzwl %ax, %eax 2591; SSSE3-NEXT: movd %eax, %xmm4 2592; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7] 2593; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2594; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2595; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2596; SSSE3-NEXT: movdqa %xmm1, %xmm0 2597; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2598; SSSE3-NEXT: psllw $15, %xmm0 2599; SSSE3-NEXT: psraw $15, %xmm0 2600; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 2601; SSSE3-NEXT: psllw $15, %xmm1 2602; SSSE3-NEXT: psraw $15, %xmm1 2603; SSSE3-NEXT: retq 2604; 2605; SSE41-LABEL: load_sext_16i1_to_16i16: 2606; SSE41: # BB#0: # %entry 2607; SSE41-NEXT: movzwl (%rdi), %eax 2608; SSE41-NEXT: movl %eax, %ecx 2609; SSE41-NEXT: shrl %ecx 2610; SSE41-NEXT: andl $1, %ecx 2611; SSE41-NEXT: movl %eax, %edx 2612; SSE41-NEXT: andl $1, %edx 2613; SSE41-NEXT: movd %edx, %xmm1 2614; SSE41-NEXT: pinsrb $1, %ecx, %xmm1 2615; SSE41-NEXT: movl %eax, %ecx 2616; SSE41-NEXT: shrl $2, %ecx 2617; SSE41-NEXT: andl $1, %ecx 2618; SSE41-NEXT: pinsrb $2, %ecx, %xmm1 2619; SSE41-NEXT: movl %eax, %ecx 2620; SSE41-NEXT: shrl $3, %ecx 2621; SSE41-NEXT: andl $1, %ecx 2622; SSE41-NEXT: pinsrb $3, %ecx, %xmm1 2623; SSE41-NEXT: movl %eax, %ecx 2624; SSE41-NEXT: shrl $4, %ecx 2625; SSE41-NEXT: andl $1, %ecx 2626; SSE41-NEXT: pinsrb $4, %ecx, %xmm1 2627; SSE41-NEXT: movl %eax, %ecx 2628; SSE41-NEXT: shrl $5, %ecx 2629; SSE41-NEXT: andl $1, %ecx 2630; SSE41-NEXT: pinsrb $5, %ecx, %xmm1 2631; SSE41-NEXT: movl %eax, %ecx 2632; SSE41-NEXT: shrl $6, %ecx 2633; SSE41-NEXT: andl $1, %ecx 2634; SSE41-NEXT: pinsrb $6, %ecx, %xmm1 2635; SSE41-NEXT: movl %eax, %ecx 2636; SSE41-NEXT: shrl $7, %ecx 2637; SSE41-NEXT: andl $1, %ecx 2638; SSE41-NEXT: pinsrb $7, %ecx, %xmm1 2639; SSE41-NEXT: movl %eax, %ecx 2640; SSE41-NEXT: shrl $8, %ecx 2641; SSE41-NEXT: andl $1, %ecx 2642; SSE41-NEXT: pinsrb $8, %ecx, %xmm1 2643; SSE41-NEXT: movl %eax, %ecx 2644; SSE41-NEXT: shrl $9, %ecx 2645; SSE41-NEXT: andl $1, %ecx 2646; SSE41-NEXT: pinsrb $9, %ecx, %xmm1 2647; SSE41-NEXT: movl %eax, %ecx 2648; SSE41-NEXT: shrl $10, %ecx 2649; SSE41-NEXT: andl $1, %ecx 2650; SSE41-NEXT: pinsrb $10, %ecx, %xmm1 2651; SSE41-NEXT: movl %eax, %ecx 2652; SSE41-NEXT: shrl $11, %ecx 2653; SSE41-NEXT: andl $1, %ecx 2654; SSE41-NEXT: pinsrb $11, %ecx, %xmm1 2655; SSE41-NEXT: movl %eax, %ecx 2656; SSE41-NEXT: shrl $12, %ecx 2657; SSE41-NEXT: andl $1, %ecx 2658; SSE41-NEXT: pinsrb $12, %ecx, %xmm1 2659; SSE41-NEXT: movl %eax, %ecx 2660; SSE41-NEXT: shrl $13, %ecx 2661; SSE41-NEXT: andl $1, %ecx 2662; SSE41-NEXT: pinsrb $13, %ecx, %xmm1 2663; SSE41-NEXT: movl %eax, %ecx 2664; SSE41-NEXT: shrl $14, %ecx 2665; SSE41-NEXT: andl $1, %ecx 2666; SSE41-NEXT: pinsrb $14, %ecx, %xmm1 2667; SSE41-NEXT: shrl $15, %eax 2668; SSE41-NEXT: movzwl %ax, %eax 2669; SSE41-NEXT: pinsrb $15, %eax, %xmm1 2670; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 2671; SSE41-NEXT: psllw $15, %xmm0 2672; SSE41-NEXT: psraw $15, %xmm0 2673; SSE41-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 2674; SSE41-NEXT: psllw $15, %xmm1 2675; SSE41-NEXT: psraw $15, %xmm1 2676; SSE41-NEXT: retq 2677; 2678; AVX1-LABEL: load_sext_16i1_to_16i16: 2679; AVX1: # BB#0: # %entry 2680; AVX1-NEXT: pushq %rbp 2681; AVX1-NEXT: .Ltmp0: 2682; AVX1-NEXT: .cfi_def_cfa_offset 16 2683; AVX1-NEXT: pushq %r15 2684; AVX1-NEXT: .Ltmp1: 2685; AVX1-NEXT: .cfi_def_cfa_offset 24 2686; AVX1-NEXT: pushq %r14 2687; AVX1-NEXT: .Ltmp2: 2688; AVX1-NEXT: .cfi_def_cfa_offset 32 2689; AVX1-NEXT: pushq %r13 2690; AVX1-NEXT: .Ltmp3: 2691; AVX1-NEXT: .cfi_def_cfa_offset 40 2692; AVX1-NEXT: pushq %r12 2693; AVX1-NEXT: .Ltmp4: 2694; AVX1-NEXT: .cfi_def_cfa_offset 48 2695; AVX1-NEXT: pushq %rbx 2696; AVX1-NEXT: .Ltmp5: 2697; AVX1-NEXT: .cfi_def_cfa_offset 56 2698; AVX1-NEXT: .Ltmp6: 2699; AVX1-NEXT: .cfi_offset %rbx, -56 2700; AVX1-NEXT: .Ltmp7: 2701; AVX1-NEXT: .cfi_offset %r12, -48 2702; AVX1-NEXT: .Ltmp8: 2703; AVX1-NEXT: .cfi_offset %r13, -40 2704; AVX1-NEXT: .Ltmp9: 2705; AVX1-NEXT: .cfi_offset %r14, -32 2706; AVX1-NEXT: .Ltmp10: 2707; AVX1-NEXT: .cfi_offset %r15, -24 2708; AVX1-NEXT: .Ltmp11: 2709; AVX1-NEXT: .cfi_offset %rbp, -16 2710; AVX1-NEXT: movswq (%rdi), %rax 2711; AVX1-NEXT: movq %rax, %rcx 2712; AVX1-NEXT: shlq $55, %rcx 2713; AVX1-NEXT: sarq $63, %rcx 2714; AVX1-NEXT: vmovd %ecx, %xmm0 2715; AVX1-NEXT: movq %rax, %r8 2716; AVX1-NEXT: movq %rax, %r10 2717; AVX1-NEXT: movq %rax, %r11 2718; AVX1-NEXT: movq %rax, %r14 2719; AVX1-NEXT: movq %rax, %r15 2720; AVX1-NEXT: movq %rax, %r9 2721; AVX1-NEXT: movq %rax, %r12 2722; AVX1-NEXT: movq %rax, %r13 2723; AVX1-NEXT: movq %rax, %rbx 2724; AVX1-NEXT: movq %rax, %rdi 2725; AVX1-NEXT: movq %rax, %rcx 2726; AVX1-NEXT: movq %rax, %rdx 2727; AVX1-NEXT: movq %rax, %rsi 2728; AVX1-NEXT: movsbq %al, %rbp 2729; AVX1-NEXT: shlq $54, %rax 2730; AVX1-NEXT: sarq $63, %rax 2731; AVX1-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 2732; AVX1-NEXT: shlq $53, %r8 2733; AVX1-NEXT: sarq $63, %r8 2734; AVX1-NEXT: vpinsrw $2, %r8d, %xmm0, %xmm0 2735; AVX1-NEXT: shlq $52, %r10 2736; AVX1-NEXT: sarq $63, %r10 2737; AVX1-NEXT: vpinsrw $3, %r10d, %xmm0, %xmm0 2738; AVX1-NEXT: shlq $51, %r11 2739; AVX1-NEXT: sarq $63, %r11 2740; AVX1-NEXT: vpinsrw $4, %r11d, %xmm0, %xmm0 2741; AVX1-NEXT: shlq $50, %r14 2742; AVX1-NEXT: sarq $63, %r14 2743; AVX1-NEXT: vpinsrw $5, %r14d, %xmm0, %xmm0 2744; AVX1-NEXT: shlq $49, %r15 2745; AVX1-NEXT: sarq $63, %r15 2746; AVX1-NEXT: vpinsrw $6, %r15d, %xmm0, %xmm0 2747; AVX1-NEXT: shrq $15, %r9 2748; AVX1-NEXT: vpinsrw $7, %r9d, %xmm0, %xmm0 2749; AVX1-NEXT: shlq $63, %r13 2750; AVX1-NEXT: sarq $63, %r13 2751; AVX1-NEXT: vmovd %r13d, %xmm1 2752; AVX1-NEXT: shlq $62, %r12 2753; AVX1-NEXT: sarq $63, %r12 2754; AVX1-NEXT: vpinsrw $1, %r12d, %xmm1, %xmm1 2755; AVX1-NEXT: shlq $61, %rbx 2756; AVX1-NEXT: sarq $63, %rbx 2757; AVX1-NEXT: vpinsrw $2, %ebx, %xmm1, %xmm1 2758; AVX1-NEXT: shlq $60, %rdi 2759; AVX1-NEXT: sarq $63, %rdi 2760; AVX1-NEXT: vpinsrw $3, %edi, %xmm1, %xmm1 2761; AVX1-NEXT: shlq $59, %rcx 2762; AVX1-NEXT: sarq $63, %rcx 2763; AVX1-NEXT: vpinsrw $4, %ecx, %xmm1, %xmm1 2764; AVX1-NEXT: shlq $58, %rdx 2765; AVX1-NEXT: sarq $63, %rdx 2766; AVX1-NEXT: vpinsrw $5, %edx, %xmm1, %xmm1 2767; AVX1-NEXT: shlq $57, %rsi 2768; AVX1-NEXT: sarq $63, %rsi 2769; AVX1-NEXT: vpinsrw $6, %esi, %xmm1, %xmm1 2770; AVX1-NEXT: shrq $7, %rbp 2771; AVX1-NEXT: vpinsrw $7, %ebp, %xmm1, %xmm1 2772; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 2773; AVX1-NEXT: popq %rbx 2774; AVX1-NEXT: popq %r12 2775; AVX1-NEXT: popq %r13 2776; AVX1-NEXT: popq %r14 2777; AVX1-NEXT: popq %r15 2778; AVX1-NEXT: popq %rbp 2779; AVX1-NEXT: retq 2780; 2781; AVX2-LABEL: load_sext_16i1_to_16i16: 2782; AVX2: # BB#0: # %entry 2783; AVX2-NEXT: pushq %rbp 2784; AVX2-NEXT: .Ltmp0: 2785; AVX2-NEXT: .cfi_def_cfa_offset 16 2786; AVX2-NEXT: pushq %r15 2787; AVX2-NEXT: .Ltmp1: 2788; AVX2-NEXT: .cfi_def_cfa_offset 24 2789; AVX2-NEXT: pushq %r14 2790; AVX2-NEXT: .Ltmp2: 2791; AVX2-NEXT: .cfi_def_cfa_offset 32 2792; AVX2-NEXT: pushq %r13 2793; AVX2-NEXT: .Ltmp3: 2794; AVX2-NEXT: .cfi_def_cfa_offset 40 2795; AVX2-NEXT: pushq %r12 2796; AVX2-NEXT: .Ltmp4: 2797; AVX2-NEXT: .cfi_def_cfa_offset 48 2798; AVX2-NEXT: pushq %rbx 2799; AVX2-NEXT: .Ltmp5: 2800; AVX2-NEXT: .cfi_def_cfa_offset 56 2801; AVX2-NEXT: .Ltmp6: 2802; AVX2-NEXT: .cfi_offset %rbx, -56 2803; AVX2-NEXT: .Ltmp7: 2804; AVX2-NEXT: .cfi_offset %r12, -48 2805; AVX2-NEXT: .Ltmp8: 2806; AVX2-NEXT: .cfi_offset %r13, -40 2807; AVX2-NEXT: .Ltmp9: 2808; AVX2-NEXT: .cfi_offset %r14, -32 2809; AVX2-NEXT: .Ltmp10: 2810; AVX2-NEXT: .cfi_offset %r15, -24 2811; AVX2-NEXT: .Ltmp11: 2812; AVX2-NEXT: .cfi_offset %rbp, -16 2813; AVX2-NEXT: movswq (%rdi), %rax 2814; AVX2-NEXT: movq %rax, %rcx 2815; AVX2-NEXT: shlq $55, %rcx 2816; AVX2-NEXT: sarq $63, %rcx 2817; AVX2-NEXT: vmovd %ecx, %xmm0 2818; AVX2-NEXT: movq %rax, %r8 2819; AVX2-NEXT: movq %rax, %r10 2820; AVX2-NEXT: movq %rax, %r11 2821; AVX2-NEXT: movq %rax, %r14 2822; AVX2-NEXT: movq %rax, %r15 2823; AVX2-NEXT: movq %rax, %r9 2824; AVX2-NEXT: movq %rax, %r12 2825; AVX2-NEXT: movq %rax, %r13 2826; AVX2-NEXT: movq %rax, %rbx 2827; AVX2-NEXT: movq %rax, %rdi 2828; AVX2-NEXT: movq %rax, %rcx 2829; AVX2-NEXT: movq %rax, %rdx 2830; AVX2-NEXT: movq %rax, %rsi 2831; AVX2-NEXT: movsbq %al, %rbp 2832; AVX2-NEXT: shlq $54, %rax 2833; AVX2-NEXT: sarq $63, %rax 2834; AVX2-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 2835; AVX2-NEXT: shlq $53, %r8 2836; AVX2-NEXT: sarq $63, %r8 2837; AVX2-NEXT: vpinsrw $2, %r8d, %xmm0, %xmm0 2838; AVX2-NEXT: shlq $52, %r10 2839; AVX2-NEXT: sarq $63, %r10 2840; AVX2-NEXT: vpinsrw $3, %r10d, %xmm0, %xmm0 2841; AVX2-NEXT: shlq $51, %r11 2842; AVX2-NEXT: sarq $63, %r11 2843; AVX2-NEXT: vpinsrw $4, %r11d, %xmm0, %xmm0 2844; AVX2-NEXT: shlq $50, %r14 2845; AVX2-NEXT: sarq $63, %r14 2846; AVX2-NEXT: vpinsrw $5, %r14d, %xmm0, %xmm0 2847; AVX2-NEXT: shlq $49, %r15 2848; AVX2-NEXT: sarq $63, %r15 2849; AVX2-NEXT: vpinsrw $6, %r15d, %xmm0, %xmm0 2850; AVX2-NEXT: shrq $15, %r9 2851; AVX2-NEXT: vpinsrw $7, %r9d, %xmm0, %xmm0 2852; AVX2-NEXT: shlq $63, %r13 2853; AVX2-NEXT: sarq $63, %r13 2854; AVX2-NEXT: vmovd %r13d, %xmm1 2855; AVX2-NEXT: shlq $62, %r12 2856; AVX2-NEXT: sarq $63, %r12 2857; AVX2-NEXT: vpinsrw $1, %r12d, %xmm1, %xmm1 2858; AVX2-NEXT: shlq $61, %rbx 2859; AVX2-NEXT: sarq $63, %rbx 2860; AVX2-NEXT: vpinsrw $2, %ebx, %xmm1, %xmm1 2861; AVX2-NEXT: shlq $60, %rdi 2862; AVX2-NEXT: sarq $63, %rdi 2863; AVX2-NEXT: vpinsrw $3, %edi, %xmm1, %xmm1 2864; AVX2-NEXT: shlq $59, %rcx 2865; AVX2-NEXT: sarq $63, %rcx 2866; AVX2-NEXT: vpinsrw $4, %ecx, %xmm1, %xmm1 2867; AVX2-NEXT: shlq $58, %rdx 2868; AVX2-NEXT: sarq $63, %rdx 2869; AVX2-NEXT: vpinsrw $5, %edx, %xmm1, %xmm1 2870; AVX2-NEXT: shlq $57, %rsi 2871; AVX2-NEXT: sarq $63, %rsi 2872; AVX2-NEXT: vpinsrw $6, %esi, %xmm1, %xmm1 2873; AVX2-NEXT: shrq $7, %rbp 2874; AVX2-NEXT: vpinsrw $7, %ebp, %xmm1, %xmm1 2875; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 2876; AVX2-NEXT: popq %rbx 2877; AVX2-NEXT: popq %r12 2878; AVX2-NEXT: popq %r13 2879; AVX2-NEXT: popq %r14 2880; AVX2-NEXT: popq %r15 2881; AVX2-NEXT: popq %rbp 2882; AVX2-NEXT: retq 2883; 2884; AVX512-LABEL: load_sext_16i1_to_16i16: 2885; AVX512: # BB#0: # %entry 2886; AVX512-NEXT: kmovw (%rdi), %k1 2887; AVX512-NEXT: vpbroadcastd {{.*}}(%rip), %zmm0 {%k1} {z} 2888; AVX512-NEXT: vpmovdw %zmm0, %ymm0 2889; AVX512-NEXT: retq 2890; 2891; X32-SSE41-LABEL: load_sext_16i1_to_16i16: 2892; X32-SSE41: # BB#0: # %entry 2893; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2894; X32-SSE41-NEXT: movzwl (%eax), %eax 2895; X32-SSE41-NEXT: movl %eax, %ecx 2896; X32-SSE41-NEXT: shrl %ecx 2897; X32-SSE41-NEXT: andl $1, %ecx 2898; X32-SSE41-NEXT: movl %eax, %edx 2899; X32-SSE41-NEXT: andl $1, %edx 2900; X32-SSE41-NEXT: movd %edx, %xmm1 2901; X32-SSE41-NEXT: pinsrb $1, %ecx, %xmm1 2902; X32-SSE41-NEXT: movl %eax, %ecx 2903; X32-SSE41-NEXT: shrl $2, %ecx 2904; X32-SSE41-NEXT: andl $1, %ecx 2905; X32-SSE41-NEXT: pinsrb $2, %ecx, %xmm1 2906; X32-SSE41-NEXT: movl %eax, %ecx 2907; X32-SSE41-NEXT: shrl $3, %ecx 2908; X32-SSE41-NEXT: andl $1, %ecx 2909; X32-SSE41-NEXT: pinsrb $3, %ecx, %xmm1 2910; X32-SSE41-NEXT: movl %eax, %ecx 2911; X32-SSE41-NEXT: shrl $4, %ecx 2912; X32-SSE41-NEXT: andl $1, %ecx 2913; X32-SSE41-NEXT: pinsrb $4, %ecx, %xmm1 2914; X32-SSE41-NEXT: movl %eax, %ecx 2915; X32-SSE41-NEXT: shrl $5, %ecx 2916; X32-SSE41-NEXT: andl $1, %ecx 2917; X32-SSE41-NEXT: pinsrb $5, %ecx, %xmm1 2918; X32-SSE41-NEXT: movl %eax, %ecx 2919; X32-SSE41-NEXT: shrl $6, %ecx 2920; X32-SSE41-NEXT: andl $1, %ecx 2921; X32-SSE41-NEXT: pinsrb $6, %ecx, %xmm1 2922; X32-SSE41-NEXT: movl %eax, %ecx 2923; X32-SSE41-NEXT: shrl $7, %ecx 2924; X32-SSE41-NEXT: andl $1, %ecx 2925; X32-SSE41-NEXT: pinsrb $7, %ecx, %xmm1 2926; X32-SSE41-NEXT: movl %eax, %ecx 2927; X32-SSE41-NEXT: shrl $8, %ecx 2928; X32-SSE41-NEXT: andl $1, %ecx 2929; X32-SSE41-NEXT: pinsrb $8, %ecx, %xmm1 2930; X32-SSE41-NEXT: movl %eax, %ecx 2931; X32-SSE41-NEXT: shrl $9, %ecx 2932; X32-SSE41-NEXT: andl $1, %ecx 2933; X32-SSE41-NEXT: pinsrb $9, %ecx, %xmm1 2934; X32-SSE41-NEXT: movl %eax, %ecx 2935; X32-SSE41-NEXT: shrl $10, %ecx 2936; X32-SSE41-NEXT: andl $1, %ecx 2937; X32-SSE41-NEXT: pinsrb $10, %ecx, %xmm1 2938; X32-SSE41-NEXT: movl %eax, %ecx 2939; X32-SSE41-NEXT: shrl $11, %ecx 2940; X32-SSE41-NEXT: andl $1, %ecx 2941; X32-SSE41-NEXT: pinsrb $11, %ecx, %xmm1 2942; X32-SSE41-NEXT: movl %eax, %ecx 2943; X32-SSE41-NEXT: shrl $12, %ecx 2944; X32-SSE41-NEXT: andl $1, %ecx 2945; X32-SSE41-NEXT: pinsrb $12, %ecx, %xmm1 2946; X32-SSE41-NEXT: movl %eax, %ecx 2947; X32-SSE41-NEXT: shrl $13, %ecx 2948; X32-SSE41-NEXT: andl $1, %ecx 2949; X32-SSE41-NEXT: pinsrb $13, %ecx, %xmm1 2950; X32-SSE41-NEXT: movl %eax, %ecx 2951; X32-SSE41-NEXT: shrl $14, %ecx 2952; X32-SSE41-NEXT: andl $1, %ecx 2953; X32-SSE41-NEXT: pinsrb $14, %ecx, %xmm1 2954; X32-SSE41-NEXT: shrl $15, %eax 2955; X32-SSE41-NEXT: pinsrb $15, %eax, %xmm1 2956; X32-SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 2957; X32-SSE41-NEXT: psllw $15, %xmm0 2958; X32-SSE41-NEXT: psraw $15, %xmm0 2959; X32-SSE41-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 2960; X32-SSE41-NEXT: psllw $15, %xmm1 2961; X32-SSE41-NEXT: psraw $15, %xmm1 2962; X32-SSE41-NEXT: retl 2963entry: 2964 %X = load <16 x i1>, <16 x i1>* %ptr 2965 %Y = sext <16 x i1> %X to <16 x i16> 2966 ret <16 x i16> %Y 2967} 2968 2969define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone { 2970; SSE2-LABEL: load_sext_32i1_to_32i8: 2971; SSE2: # BB#0: # %entry 2972; SSE2-NEXT: pushq %rbp 2973; SSE2-NEXT: pushq %r15 2974; SSE2-NEXT: pushq %r14 2975; SSE2-NEXT: pushq %r13 2976; SSE2-NEXT: pushq %r12 2977; SSE2-NEXT: pushq %rbx 2978; SSE2-NEXT: movswq (%rdi), %rbx 2979; SSE2-NEXT: movq %rbx, %r10 2980; SSE2-NEXT: movq %rbx, %r8 2981; SSE2-NEXT: movq %rbx, %r9 2982; SSE2-NEXT: movq %rbx, %r11 2983; SSE2-NEXT: movq %rbx, %r14 2984; SSE2-NEXT: movq %rbx, %r15 2985; SSE2-NEXT: movq %rbx, %r12 2986; SSE2-NEXT: movq %rbx, %r13 2987; SSE2-NEXT: movq %rbx, %rdx 2988; SSE2-NEXT: movq %rbx, %rsi 2989; SSE2-NEXT: movq %rbx, %rcx 2990; SSE2-NEXT: movq %rbx, %rbp 2991; SSE2-NEXT: movq %rbx, %rax 2992; SSE2-NEXT: shlq $49, %rax 2993; SSE2-NEXT: sarq $63, %rax 2994; SSE2-NEXT: movd %eax, %xmm0 2995; SSE2-NEXT: movq %rbx, %rax 2996; SSE2-NEXT: shlq $57, %r10 2997; SSE2-NEXT: sarq $63, %r10 2998; SSE2-NEXT: movd %r10d, %xmm15 2999; SSE2-NEXT: movq %rbx, %r10 3000; SSE2-NEXT: movsbq %bl, %rbx 3001; SSE2-NEXT: punpcklbw {{.*#+}} xmm15 = xmm15[0],xmm0[0],xmm15[1],xmm0[1],xmm15[2],xmm0[2],xmm15[3],xmm0[3],xmm15[4],xmm0[4],xmm15[5],xmm0[5],xmm15[6],xmm0[6],xmm15[7],xmm0[7] 3002; SSE2-NEXT: shlq $53, %r8 3003; SSE2-NEXT: sarq $63, %r8 3004; SSE2-NEXT: movd %r8d, %xmm8 3005; SSE2-NEXT: shlq $61, %r9 3006; SSE2-NEXT: sarq $63, %r9 3007; SSE2-NEXT: movd %r9d, %xmm2 3008; SSE2-NEXT: shlq $51, %r11 3009; SSE2-NEXT: sarq $63, %r11 3010; SSE2-NEXT: movd %r11d, %xmm9 3011; SSE2-NEXT: shlq $59, %r14 3012; SSE2-NEXT: sarq $63, %r14 3013; SSE2-NEXT: movd %r14d, %xmm5 3014; SSE2-NEXT: shlq $55, %r15 3015; SSE2-NEXT: sarq $63, %r15 3016; SSE2-NEXT: movd %r15d, %xmm10 3017; SSE2-NEXT: shlq $63, %r12 3018; SSE2-NEXT: sarq $63, %r12 3019; SSE2-NEXT: movd %r12d, %xmm0 3020; SSE2-NEXT: shlq $50, %r13 3021; SSE2-NEXT: sarq $63, %r13 3022; SSE2-NEXT: movd %r13d, %xmm11 3023; SSE2-NEXT: shlq $58, %rdx 3024; SSE2-NEXT: sarq $63, %rdx 3025; SSE2-NEXT: movd %edx, %xmm4 3026; SSE2-NEXT: shlq $54, %rsi 3027; SSE2-NEXT: sarq $63, %rsi 3028; SSE2-NEXT: movd %esi, %xmm12 3029; SSE2-NEXT: shlq $62, %rcx 3030; SSE2-NEXT: sarq $63, %rcx 3031; SSE2-NEXT: movd %ecx, %xmm6 3032; SSE2-NEXT: shlq $52, %rbp 3033; SSE2-NEXT: sarq $63, %rbp 3034; SSE2-NEXT: movd %ebp, %xmm13 3035; SSE2-NEXT: shlq $60, %rax 3036; SSE2-NEXT: sarq $63, %rax 3037; SSE2-NEXT: movd %eax, %xmm7 3038; SSE2-NEXT: shrq $15, %r10 3039; SSE2-NEXT: movd %r10d, %xmm14 3040; SSE2-NEXT: shrq $7, %rbx 3041; SSE2-NEXT: movd %ebx, %xmm3 3042; SSE2-NEXT: movswq 2(%rdi), %rdx 3043; SSE2-NEXT: movq %rdx, %r8 3044; SSE2-NEXT: movq %rdx, %r9 3045; SSE2-NEXT: movq %rdx, %r10 3046; SSE2-NEXT: movq %rdx, %r11 3047; SSE2-NEXT: movq %rdx, %r14 3048; SSE2-NEXT: movq %rdx, %r15 3049; SSE2-NEXT: movq %rdx, %r12 3050; SSE2-NEXT: movq %rdx, %r13 3051; SSE2-NEXT: movq %rdx, %rbx 3052; SSE2-NEXT: movq %rdx, %rax 3053; SSE2-NEXT: movq %rdx, %rcx 3054; SSE2-NEXT: movq %rdx, %rsi 3055; SSE2-NEXT: movq %rdx, %rdi 3056; SSE2-NEXT: movq %rdx, %rbp 3057; SSE2-NEXT: shlq $49, %rbp 3058; SSE2-NEXT: sarq $63, %rbp 3059; SSE2-NEXT: movd %ebp, %xmm1 3060; SSE2-NEXT: movq %rdx, %rbp 3061; SSE2-NEXT: movsbq %dl, %rdx 3062; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm8[0],xmm2[1],xmm8[1],xmm2[2],xmm8[2],xmm2[3],xmm8[3],xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7] 3063; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm15[0],xmm2[1],xmm15[1],xmm2[2],xmm15[2],xmm2[3],xmm15[3],xmm2[4],xmm15[4],xmm2[5],xmm15[5],xmm2[6],xmm15[6],xmm2[7],xmm15[7] 3064; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm9[0],xmm5[1],xmm9[1],xmm5[2],xmm9[2],xmm5[3],xmm9[3],xmm5[4],xmm9[4],xmm5[5],xmm9[5],xmm5[6],xmm9[6],xmm5[7],xmm9[7] 3065; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm10[0],xmm0[1],xmm10[1],xmm0[2],xmm10[2],xmm0[3],xmm10[3],xmm0[4],xmm10[4],xmm0[5],xmm10[5],xmm0[6],xmm10[6],xmm0[7],xmm10[7] 3066; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] 3067; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 3068; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm11[0],xmm4[1],xmm11[1],xmm4[2],xmm11[2],xmm4[3],xmm11[3],xmm4[4],xmm11[4],xmm4[5],xmm11[5],xmm4[6],xmm11[6],xmm4[7],xmm11[7] 3069; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3],xmm6[4],xmm12[4],xmm6[5],xmm12[5],xmm6[6],xmm12[6],xmm6[7],xmm12[7] 3070; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3],xmm6[4],xmm4[4],xmm6[5],xmm4[5],xmm6[6],xmm4[6],xmm6[7],xmm4[7] 3071; SSE2-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm13[0],xmm7[1],xmm13[1],xmm7[2],xmm13[2],xmm7[3],xmm13[3],xmm7[4],xmm13[4],xmm7[5],xmm13[5],xmm7[6],xmm13[6],xmm7[7],xmm13[7] 3072; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm14[0],xmm3[1],xmm14[1],xmm3[2],xmm14[2],xmm3[3],xmm14[3],xmm3[4],xmm14[4],xmm3[5],xmm14[5],xmm3[6],xmm14[6],xmm3[7],xmm14[7] 3073; SSE2-NEXT: shlq $57, %r8 3074; SSE2-NEXT: sarq $63, %r8 3075; SSE2-NEXT: movd %r8d, %xmm2 3076; SSE2-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3],xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7] 3077; SSE2-NEXT: shlq $53, %r9 3078; SSE2-NEXT: sarq $63, %r9 3079; SSE2-NEXT: movd %r9d, %xmm3 3080; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3],xmm6[4],xmm7[4],xmm6[5],xmm7[5],xmm6[6],xmm7[6],xmm6[7],xmm7[7] 3081; SSE2-NEXT: shlq $61, %r10 3082; SSE2-NEXT: sarq $63, %r10 3083; SSE2-NEXT: movd %r10d, %xmm4 3084; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm6[0],xmm0[1],xmm6[1],xmm0[2],xmm6[2],xmm0[3],xmm6[3],xmm0[4],xmm6[4],xmm0[5],xmm6[5],xmm0[6],xmm6[6],xmm0[7],xmm6[7] 3085; SSE2-NEXT: shlq $51, %r11 3086; SSE2-NEXT: sarq $63, %r11 3087; SSE2-NEXT: movd %r11d, %xmm5 3088; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 3089; SSE2-NEXT: shlq $59, %r14 3090; SSE2-NEXT: sarq $63, %r14 3091; SSE2-NEXT: movd %r14d, %xmm6 3092; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3093; SSE2-NEXT: shlq $55, %r15 3094; SSE2-NEXT: sarq $63, %r15 3095; SSE2-NEXT: movd %r15d, %xmm3 3096; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 3097; SSE2-NEXT: shlq $63, %r12 3098; SSE2-NEXT: sarq $63, %r12 3099; SSE2-NEXT: movd %r12d, %xmm1 3100; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7] 3101; SSE2-NEXT: shlq $50, %r13 3102; SSE2-NEXT: sarq $63, %r13 3103; SSE2-NEXT: movd %r13d, %xmm2 3104; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 3105; SSE2-NEXT: shlq $58, %rbx 3106; SSE2-NEXT: sarq $63, %rbx 3107; SSE2-NEXT: movd %ebx, %xmm3 3108; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3],xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7] 3109; SSE2-NEXT: shlq $54, %rax 3110; SSE2-NEXT: sarq $63, %rax 3111; SSE2-NEXT: movd %eax, %xmm5 3112; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 3113; SSE2-NEXT: shlq $62, %rcx 3114; SSE2-NEXT: sarq $63, %rcx 3115; SSE2-NEXT: movd %ecx, %xmm4 3116; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3117; SSE2-NEXT: shlq $52, %rsi 3118; SSE2-NEXT: sarq $63, %rsi 3119; SSE2-NEXT: movd %esi, %xmm2 3120; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3],xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7] 3121; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3122; SSE2-NEXT: shlq $60, %rdi 3123; SSE2-NEXT: sarq $63, %rdi 3124; SSE2-NEXT: movd %edi, %xmm3 3125; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3126; SSE2-NEXT: shrq $15, %rbp 3127; SSE2-NEXT: movd %ebp, %xmm2 3128; SSE2-NEXT: shrq $7, %rdx 3129; SSE2-NEXT: movd %edx, %xmm5 3130; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7] 3131; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7] 3132; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3133; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 3134; SSE2-NEXT: popq %rbx 3135; SSE2-NEXT: popq %r12 3136; SSE2-NEXT: popq %r13 3137; SSE2-NEXT: popq %r14 3138; SSE2-NEXT: popq %r15 3139; SSE2-NEXT: popq %rbp 3140; SSE2-NEXT: retq 3141; 3142; SSSE3-LABEL: load_sext_32i1_to_32i8: 3143; SSSE3: # BB#0: # %entry 3144; SSSE3-NEXT: pushq %rbp 3145; SSSE3-NEXT: pushq %r15 3146; SSSE3-NEXT: pushq %r14 3147; SSSE3-NEXT: pushq %r13 3148; SSSE3-NEXT: pushq %r12 3149; SSSE3-NEXT: pushq %rbx 3150; SSSE3-NEXT: movswq (%rdi), %rbx 3151; SSSE3-NEXT: movq %rbx, %r10 3152; SSSE3-NEXT: movq %rbx, %r8 3153; SSSE3-NEXT: movq %rbx, %r9 3154; SSSE3-NEXT: movq %rbx, %r11 3155; SSSE3-NEXT: movq %rbx, %r14 3156; SSSE3-NEXT: movq %rbx, %r15 3157; SSSE3-NEXT: movq %rbx, %r12 3158; SSSE3-NEXT: movq %rbx, %r13 3159; SSSE3-NEXT: movq %rbx, %rdx 3160; SSSE3-NEXT: movq %rbx, %rsi 3161; SSSE3-NEXT: movq %rbx, %rcx 3162; SSSE3-NEXT: movq %rbx, %rbp 3163; SSSE3-NEXT: movq %rbx, %rax 3164; SSSE3-NEXT: shlq $49, %rax 3165; SSSE3-NEXT: sarq $63, %rax 3166; SSSE3-NEXT: movd %eax, %xmm0 3167; SSSE3-NEXT: movq %rbx, %rax 3168; SSSE3-NEXT: shlq $57, %r10 3169; SSSE3-NEXT: sarq $63, %r10 3170; SSSE3-NEXT: movd %r10d, %xmm15 3171; SSSE3-NEXT: movq %rbx, %r10 3172; SSSE3-NEXT: movsbq %bl, %rbx 3173; SSSE3-NEXT: punpcklbw {{.*#+}} xmm15 = xmm15[0],xmm0[0],xmm15[1],xmm0[1],xmm15[2],xmm0[2],xmm15[3],xmm0[3],xmm15[4],xmm0[4],xmm15[5],xmm0[5],xmm15[6],xmm0[6],xmm15[7],xmm0[7] 3174; SSSE3-NEXT: shlq $53, %r8 3175; SSSE3-NEXT: sarq $63, %r8 3176; SSSE3-NEXT: movd %r8d, %xmm8 3177; SSSE3-NEXT: shlq $61, %r9 3178; SSSE3-NEXT: sarq $63, %r9 3179; SSSE3-NEXT: movd %r9d, %xmm2 3180; SSSE3-NEXT: shlq $51, %r11 3181; SSSE3-NEXT: sarq $63, %r11 3182; SSSE3-NEXT: movd %r11d, %xmm9 3183; SSSE3-NEXT: shlq $59, %r14 3184; SSSE3-NEXT: sarq $63, %r14 3185; SSSE3-NEXT: movd %r14d, %xmm5 3186; SSSE3-NEXT: shlq $55, %r15 3187; SSSE3-NEXT: sarq $63, %r15 3188; SSSE3-NEXT: movd %r15d, %xmm10 3189; SSSE3-NEXT: shlq $63, %r12 3190; SSSE3-NEXT: sarq $63, %r12 3191; SSSE3-NEXT: movd %r12d, %xmm0 3192; SSSE3-NEXT: shlq $50, %r13 3193; SSSE3-NEXT: sarq $63, %r13 3194; SSSE3-NEXT: movd %r13d, %xmm11 3195; SSSE3-NEXT: shlq $58, %rdx 3196; SSSE3-NEXT: sarq $63, %rdx 3197; SSSE3-NEXT: movd %edx, %xmm4 3198; SSSE3-NEXT: shlq $54, %rsi 3199; SSSE3-NEXT: sarq $63, %rsi 3200; SSSE3-NEXT: movd %esi, %xmm12 3201; SSSE3-NEXT: shlq $62, %rcx 3202; SSSE3-NEXT: sarq $63, %rcx 3203; SSSE3-NEXT: movd %ecx, %xmm6 3204; SSSE3-NEXT: shlq $52, %rbp 3205; SSSE3-NEXT: sarq $63, %rbp 3206; SSSE3-NEXT: movd %ebp, %xmm13 3207; SSSE3-NEXT: shlq $60, %rax 3208; SSSE3-NEXT: sarq $63, %rax 3209; SSSE3-NEXT: movd %eax, %xmm7 3210; SSSE3-NEXT: shrq $15, %r10 3211; SSSE3-NEXT: movd %r10d, %xmm14 3212; SSSE3-NEXT: shrq $7, %rbx 3213; SSSE3-NEXT: movd %ebx, %xmm3 3214; SSSE3-NEXT: movswq 2(%rdi), %rdx 3215; SSSE3-NEXT: movq %rdx, %r8 3216; SSSE3-NEXT: movq %rdx, %r9 3217; SSSE3-NEXT: movq %rdx, %r10 3218; SSSE3-NEXT: movq %rdx, %r11 3219; SSSE3-NEXT: movq %rdx, %r14 3220; SSSE3-NEXT: movq %rdx, %r15 3221; SSSE3-NEXT: movq %rdx, %r12 3222; SSSE3-NEXT: movq %rdx, %r13 3223; SSSE3-NEXT: movq %rdx, %rbx 3224; SSSE3-NEXT: movq %rdx, %rax 3225; SSSE3-NEXT: movq %rdx, %rcx 3226; SSSE3-NEXT: movq %rdx, %rsi 3227; SSSE3-NEXT: movq %rdx, %rdi 3228; SSSE3-NEXT: movq %rdx, %rbp 3229; SSSE3-NEXT: shlq $49, %rbp 3230; SSSE3-NEXT: sarq $63, %rbp 3231; SSSE3-NEXT: movd %ebp, %xmm1 3232; SSSE3-NEXT: movq %rdx, %rbp 3233; SSSE3-NEXT: movsbq %dl, %rdx 3234; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm8[0],xmm2[1],xmm8[1],xmm2[2],xmm8[2],xmm2[3],xmm8[3],xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7] 3235; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm15[0],xmm2[1],xmm15[1],xmm2[2],xmm15[2],xmm2[3],xmm15[3],xmm2[4],xmm15[4],xmm2[5],xmm15[5],xmm2[6],xmm15[6],xmm2[7],xmm15[7] 3236; SSSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm9[0],xmm5[1],xmm9[1],xmm5[2],xmm9[2],xmm5[3],xmm9[3],xmm5[4],xmm9[4],xmm5[5],xmm9[5],xmm5[6],xmm9[6],xmm5[7],xmm9[7] 3237; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm10[0],xmm0[1],xmm10[1],xmm0[2],xmm10[2],xmm0[3],xmm10[3],xmm0[4],xmm10[4],xmm0[5],xmm10[5],xmm0[6],xmm10[6],xmm0[7],xmm10[7] 3238; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] 3239; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 3240; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm11[0],xmm4[1],xmm11[1],xmm4[2],xmm11[2],xmm4[3],xmm11[3],xmm4[4],xmm11[4],xmm4[5],xmm11[5],xmm4[6],xmm11[6],xmm4[7],xmm11[7] 3241; SSSE3-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3],xmm6[4],xmm12[4],xmm6[5],xmm12[5],xmm6[6],xmm12[6],xmm6[7],xmm12[7] 3242; SSSE3-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3],xmm6[4],xmm4[4],xmm6[5],xmm4[5],xmm6[6],xmm4[6],xmm6[7],xmm4[7] 3243; SSSE3-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm13[0],xmm7[1],xmm13[1],xmm7[2],xmm13[2],xmm7[3],xmm13[3],xmm7[4],xmm13[4],xmm7[5],xmm13[5],xmm7[6],xmm13[6],xmm7[7],xmm13[7] 3244; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm14[0],xmm3[1],xmm14[1],xmm3[2],xmm14[2],xmm3[3],xmm14[3],xmm3[4],xmm14[4],xmm3[5],xmm14[5],xmm3[6],xmm14[6],xmm3[7],xmm14[7] 3245; SSSE3-NEXT: shlq $57, %r8 3246; SSSE3-NEXT: sarq $63, %r8 3247; SSSE3-NEXT: movd %r8d, %xmm2 3248; SSSE3-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3],xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7] 3249; SSSE3-NEXT: shlq $53, %r9 3250; SSSE3-NEXT: sarq $63, %r9 3251; SSSE3-NEXT: movd %r9d, %xmm3 3252; SSSE3-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3],xmm6[4],xmm7[4],xmm6[5],xmm7[5],xmm6[6],xmm7[6],xmm6[7],xmm7[7] 3253; SSSE3-NEXT: shlq $61, %r10 3254; SSSE3-NEXT: sarq $63, %r10 3255; SSSE3-NEXT: movd %r10d, %xmm4 3256; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm6[0],xmm0[1],xmm6[1],xmm0[2],xmm6[2],xmm0[3],xmm6[3],xmm0[4],xmm6[4],xmm0[5],xmm6[5],xmm0[6],xmm6[6],xmm0[7],xmm6[7] 3257; SSSE3-NEXT: shlq $51, %r11 3258; SSSE3-NEXT: sarq $63, %r11 3259; SSSE3-NEXT: movd %r11d, %xmm5 3260; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 3261; SSSE3-NEXT: shlq $59, %r14 3262; SSSE3-NEXT: sarq $63, %r14 3263; SSSE3-NEXT: movd %r14d, %xmm6 3264; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3265; SSSE3-NEXT: shlq $55, %r15 3266; SSSE3-NEXT: sarq $63, %r15 3267; SSSE3-NEXT: movd %r15d, %xmm3 3268; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 3269; SSSE3-NEXT: shlq $63, %r12 3270; SSSE3-NEXT: sarq $63, %r12 3271; SSSE3-NEXT: movd %r12d, %xmm1 3272; SSSE3-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7] 3273; SSSE3-NEXT: shlq $50, %r13 3274; SSSE3-NEXT: sarq $63, %r13 3275; SSSE3-NEXT: movd %r13d, %xmm2 3276; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 3277; SSSE3-NEXT: shlq $58, %rbx 3278; SSSE3-NEXT: sarq $63, %rbx 3279; SSSE3-NEXT: movd %ebx, %xmm3 3280; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3],xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7] 3281; SSSE3-NEXT: shlq $54, %rax 3282; SSSE3-NEXT: sarq $63, %rax 3283; SSSE3-NEXT: movd %eax, %xmm5 3284; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 3285; SSSE3-NEXT: shlq $62, %rcx 3286; SSSE3-NEXT: sarq $63, %rcx 3287; SSSE3-NEXT: movd %ecx, %xmm4 3288; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3289; SSSE3-NEXT: shlq $52, %rsi 3290; SSSE3-NEXT: sarq $63, %rsi 3291; SSSE3-NEXT: movd %esi, %xmm2 3292; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3],xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7] 3293; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3294; SSSE3-NEXT: shlq $60, %rdi 3295; SSSE3-NEXT: sarq $63, %rdi 3296; SSSE3-NEXT: movd %edi, %xmm3 3297; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3298; SSSE3-NEXT: shrq $15, %rbp 3299; SSSE3-NEXT: movd %ebp, %xmm2 3300; SSSE3-NEXT: shrq $7, %rdx 3301; SSSE3-NEXT: movd %edx, %xmm5 3302; SSSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7] 3303; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7] 3304; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3305; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 3306; SSSE3-NEXT: popq %rbx 3307; SSSE3-NEXT: popq %r12 3308; SSSE3-NEXT: popq %r13 3309; SSSE3-NEXT: popq %r14 3310; SSSE3-NEXT: popq %r15 3311; SSSE3-NEXT: popq %rbp 3312; SSSE3-NEXT: retq 3313; 3314; SSE41-LABEL: load_sext_32i1_to_32i8: 3315; SSE41: # BB#0: # %entry 3316; SSE41-NEXT: movswq (%rdi), %rax 3317; SSE41-NEXT: movq %rax, %rcx 3318; SSE41-NEXT: shlq $62, %rcx 3319; SSE41-NEXT: sarq $63, %rcx 3320; SSE41-NEXT: movq %rax, %rdx 3321; SSE41-NEXT: shlq $63, %rdx 3322; SSE41-NEXT: sarq $63, %rdx 3323; SSE41-NEXT: movd %edx, %xmm0 3324; SSE41-NEXT: pinsrb $1, %ecx, %xmm0 3325; SSE41-NEXT: movq %rax, %rcx 3326; SSE41-NEXT: shlq $61, %rcx 3327; SSE41-NEXT: sarq $63, %rcx 3328; SSE41-NEXT: pinsrb $2, %ecx, %xmm0 3329; SSE41-NEXT: movq %rax, %rcx 3330; SSE41-NEXT: shlq $60, %rcx 3331; SSE41-NEXT: sarq $63, %rcx 3332; SSE41-NEXT: pinsrb $3, %ecx, %xmm0 3333; SSE41-NEXT: movq %rax, %rcx 3334; SSE41-NEXT: shlq $59, %rcx 3335; SSE41-NEXT: sarq $63, %rcx 3336; SSE41-NEXT: pinsrb $4, %ecx, %xmm0 3337; SSE41-NEXT: movq %rax, %rcx 3338; SSE41-NEXT: shlq $58, %rcx 3339; SSE41-NEXT: sarq $63, %rcx 3340; SSE41-NEXT: pinsrb $5, %ecx, %xmm0 3341; SSE41-NEXT: movq %rax, %rcx 3342; SSE41-NEXT: shlq $57, %rcx 3343; SSE41-NEXT: sarq $63, %rcx 3344; SSE41-NEXT: pinsrb $6, %ecx, %xmm0 3345; SSE41-NEXT: movsbq %al, %rcx 3346; SSE41-NEXT: shrq $7, %rcx 3347; SSE41-NEXT: pinsrb $7, %ecx, %xmm0 3348; SSE41-NEXT: movq %rax, %rcx 3349; SSE41-NEXT: shlq $55, %rcx 3350; SSE41-NEXT: sarq $63, %rcx 3351; SSE41-NEXT: pinsrb $8, %ecx, %xmm0 3352; SSE41-NEXT: movq %rax, %rcx 3353; SSE41-NEXT: shlq $54, %rcx 3354; SSE41-NEXT: sarq $63, %rcx 3355; SSE41-NEXT: pinsrb $9, %ecx, %xmm0 3356; SSE41-NEXT: movq %rax, %rcx 3357; SSE41-NEXT: shlq $53, %rcx 3358; SSE41-NEXT: sarq $63, %rcx 3359; SSE41-NEXT: pinsrb $10, %ecx, %xmm0 3360; SSE41-NEXT: movq %rax, %rcx 3361; SSE41-NEXT: shlq $52, %rcx 3362; SSE41-NEXT: sarq $63, %rcx 3363; SSE41-NEXT: pinsrb $11, %ecx, %xmm0 3364; SSE41-NEXT: movq %rax, %rcx 3365; SSE41-NEXT: shlq $51, %rcx 3366; SSE41-NEXT: sarq $63, %rcx 3367; SSE41-NEXT: pinsrb $12, %ecx, %xmm0 3368; SSE41-NEXT: movq %rax, %rcx 3369; SSE41-NEXT: shlq $50, %rcx 3370; SSE41-NEXT: sarq $63, %rcx 3371; SSE41-NEXT: pinsrb $13, %ecx, %xmm0 3372; SSE41-NEXT: movq %rax, %rcx 3373; SSE41-NEXT: shlq $49, %rcx 3374; SSE41-NEXT: sarq $63, %rcx 3375; SSE41-NEXT: pinsrb $14, %ecx, %xmm0 3376; SSE41-NEXT: shrq $15, %rax 3377; SSE41-NEXT: pinsrb $15, %eax, %xmm0 3378; SSE41-NEXT: movswq 2(%rdi), %rax 3379; SSE41-NEXT: movq %rax, %rcx 3380; SSE41-NEXT: shlq $62, %rcx 3381; SSE41-NEXT: sarq $63, %rcx 3382; SSE41-NEXT: movq %rax, %rdx 3383; SSE41-NEXT: shlq $63, %rdx 3384; SSE41-NEXT: sarq $63, %rdx 3385; SSE41-NEXT: movd %edx, %xmm1 3386; SSE41-NEXT: pinsrb $1, %ecx, %xmm1 3387; SSE41-NEXT: movq %rax, %rcx 3388; SSE41-NEXT: shlq $61, %rcx 3389; SSE41-NEXT: sarq $63, %rcx 3390; SSE41-NEXT: pinsrb $2, %ecx, %xmm1 3391; SSE41-NEXT: movq %rax, %rcx 3392; SSE41-NEXT: shlq $60, %rcx 3393; SSE41-NEXT: sarq $63, %rcx 3394; SSE41-NEXT: pinsrb $3, %ecx, %xmm1 3395; SSE41-NEXT: movq %rax, %rcx 3396; SSE41-NEXT: shlq $59, %rcx 3397; SSE41-NEXT: sarq $63, %rcx 3398; SSE41-NEXT: pinsrb $4, %ecx, %xmm1 3399; SSE41-NEXT: movq %rax, %rcx 3400; SSE41-NEXT: shlq $58, %rcx 3401; SSE41-NEXT: sarq $63, %rcx 3402; SSE41-NEXT: pinsrb $5, %ecx, %xmm1 3403; SSE41-NEXT: movq %rax, %rcx 3404; SSE41-NEXT: shlq $57, %rcx 3405; SSE41-NEXT: sarq $63, %rcx 3406; SSE41-NEXT: pinsrb $6, %ecx, %xmm1 3407; SSE41-NEXT: movsbq %al, %rcx 3408; SSE41-NEXT: shrq $7, %rcx 3409; SSE41-NEXT: pinsrb $7, %ecx, %xmm1 3410; SSE41-NEXT: movq %rax, %rcx 3411; SSE41-NEXT: shlq $55, %rcx 3412; SSE41-NEXT: sarq $63, %rcx 3413; SSE41-NEXT: pinsrb $8, %ecx, %xmm1 3414; SSE41-NEXT: movq %rax, %rcx 3415; SSE41-NEXT: shlq $54, %rcx 3416; SSE41-NEXT: sarq $63, %rcx 3417; SSE41-NEXT: pinsrb $9, %ecx, %xmm1 3418; SSE41-NEXT: movq %rax, %rcx 3419; SSE41-NEXT: shlq $53, %rcx 3420; SSE41-NEXT: sarq $63, %rcx 3421; SSE41-NEXT: pinsrb $10, %ecx, %xmm1 3422; SSE41-NEXT: movq %rax, %rcx 3423; SSE41-NEXT: shlq $52, %rcx 3424; SSE41-NEXT: sarq $63, %rcx 3425; SSE41-NEXT: pinsrb $11, %ecx, %xmm1 3426; SSE41-NEXT: movq %rax, %rcx 3427; SSE41-NEXT: shlq $51, %rcx 3428; SSE41-NEXT: sarq $63, %rcx 3429; SSE41-NEXT: pinsrb $12, %ecx, %xmm1 3430; SSE41-NEXT: movq %rax, %rcx 3431; SSE41-NEXT: shlq $50, %rcx 3432; SSE41-NEXT: sarq $63, %rcx 3433; SSE41-NEXT: pinsrb $13, %ecx, %xmm1 3434; SSE41-NEXT: movq %rax, %rcx 3435; SSE41-NEXT: shlq $49, %rcx 3436; SSE41-NEXT: sarq $63, %rcx 3437; SSE41-NEXT: pinsrb $14, %ecx, %xmm1 3438; SSE41-NEXT: shrq $15, %rax 3439; SSE41-NEXT: pinsrb $15, %eax, %xmm1 3440; SSE41-NEXT: retq 3441; 3442; AVX1-LABEL: load_sext_32i1_to_32i8: 3443; AVX1: # BB#0: # %entry 3444; AVX1-NEXT: pushq %rbp 3445; AVX1-NEXT: pushq %r15 3446; AVX1-NEXT: pushq %r14 3447; AVX1-NEXT: pushq %r13 3448; AVX1-NEXT: pushq %r12 3449; AVX1-NEXT: pushq %rbx 3450; AVX1-NEXT: movslq (%rdi), %rax 3451; AVX1-NEXT: movq %rax, %rcx 3452; AVX1-NEXT: shlq $47, %rcx 3453; AVX1-NEXT: sarq $63, %rcx 3454; AVX1-NEXT: vmovd %ecx, %xmm0 3455; AVX1-NEXT: movq %rax, %r8 3456; AVX1-NEXT: movq %rax, %rdx 3457; AVX1-NEXT: movq %rax, %rcx 3458; AVX1-NEXT: movq %rax, %rdi 3459; AVX1-NEXT: movq %rax, %r13 3460; AVX1-NEXT: movq %rax, %rsi 3461; AVX1-NEXT: movq %rax, %r10 3462; AVX1-NEXT: movq %rax, %r11 3463; AVX1-NEXT: movq %rax, %r9 3464; AVX1-NEXT: movq %rax, %rbx 3465; AVX1-NEXT: movq %rax, %r14 3466; AVX1-NEXT: movq %rax, %r15 3467; AVX1-NEXT: movq %rax, %r12 3468; AVX1-NEXT: movq %rax, %rbp 3469; AVX1-NEXT: shlq $46, %rbp 3470; AVX1-NEXT: sarq $63, %rbp 3471; AVX1-NEXT: vpinsrb $1, %ebp, %xmm0, %xmm0 3472; AVX1-NEXT: movq %rax, %rbp 3473; AVX1-NEXT: shlq $45, %r8 3474; AVX1-NEXT: sarq $63, %r8 3475; AVX1-NEXT: vpinsrb $2, %r8d, %xmm0, %xmm0 3476; AVX1-NEXT: movq %rax, %r8 3477; AVX1-NEXT: shlq $44, %rdx 3478; AVX1-NEXT: sarq $63, %rdx 3479; AVX1-NEXT: vpinsrb $3, %edx, %xmm0, %xmm0 3480; AVX1-NEXT: movq %rax, %rdx 3481; AVX1-NEXT: shlq $43, %rcx 3482; AVX1-NEXT: sarq $63, %rcx 3483; AVX1-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 3484; AVX1-NEXT: movq %rax, %rcx 3485; AVX1-NEXT: shlq $42, %rdi 3486; AVX1-NEXT: sarq $63, %rdi 3487; AVX1-NEXT: vpinsrb $5, %edi, %xmm0, %xmm0 3488; AVX1-NEXT: movq %rax, %rdi 3489; AVX1-NEXT: shlq $41, %r13 3490; AVX1-NEXT: sarq $63, %r13 3491; AVX1-NEXT: vpinsrb $6, %r13d, %xmm0, %xmm0 3492; AVX1-NEXT: movq %rax, %r13 3493; AVX1-NEXT: shlq $40, %rsi 3494; AVX1-NEXT: sarq $63, %rsi 3495; AVX1-NEXT: vpinsrb $7, %esi, %xmm0, %xmm0 3496; AVX1-NEXT: movq %rax, %rsi 3497; AVX1-NEXT: shlq $39, %r10 3498; AVX1-NEXT: sarq $63, %r10 3499; AVX1-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0 3500; AVX1-NEXT: movq %rax, %r10 3501; AVX1-NEXT: shlq $38, %r11 3502; AVX1-NEXT: sarq $63, %r11 3503; AVX1-NEXT: vpinsrb $9, %r11d, %xmm0, %xmm0 3504; AVX1-NEXT: movsbq %al, %r11 3505; AVX1-NEXT: shlq $37, %r9 3506; AVX1-NEXT: sarq $63, %r9 3507; AVX1-NEXT: vpinsrb $10, %r9d, %xmm0, %xmm0 3508; AVX1-NEXT: movq %rax, %r9 3509; AVX1-NEXT: shlq $36, %rbx 3510; AVX1-NEXT: sarq $63, %rbx 3511; AVX1-NEXT: vpinsrb $11, %ebx, %xmm0, %xmm0 3512; AVX1-NEXT: movq %rax, %rbx 3513; AVX1-NEXT: shlq $35, %r14 3514; AVX1-NEXT: sarq $63, %r14 3515; AVX1-NEXT: vpinsrb $12, %r14d, %xmm0, %xmm0 3516; AVX1-NEXT: movq %rax, %r14 3517; AVX1-NEXT: shlq $34, %r15 3518; AVX1-NEXT: sarq $63, %r15 3519; AVX1-NEXT: vpinsrb $13, %r15d, %xmm0, %xmm0 3520; AVX1-NEXT: movq %rax, %r15 3521; AVX1-NEXT: shlq $33, %r12 3522; AVX1-NEXT: sarq $63, %r12 3523; AVX1-NEXT: vpinsrb $14, %r12d, %xmm0, %xmm0 3524; AVX1-NEXT: movq %rax, %r12 3525; AVX1-NEXT: shrq $31, %rbp 3526; AVX1-NEXT: vpinsrb $15, %ebp, %xmm0, %xmm0 3527; AVX1-NEXT: movq %rax, %rbp 3528; AVX1-NEXT: shlq $63, %rdx 3529; AVX1-NEXT: sarq $63, %rdx 3530; AVX1-NEXT: vmovd %edx, %xmm1 3531; AVX1-NEXT: movq %rax, %rdx 3532; AVX1-NEXT: movswq %ax, %rax 3533; AVX1-NEXT: shlq $62, %r8 3534; AVX1-NEXT: sarq $63, %r8 3535; AVX1-NEXT: vpinsrb $1, %r8d, %xmm1, %xmm1 3536; AVX1-NEXT: shlq $61, %rcx 3537; AVX1-NEXT: sarq $63, %rcx 3538; AVX1-NEXT: vpinsrb $2, %ecx, %xmm1, %xmm1 3539; AVX1-NEXT: shlq $60, %rdi 3540; AVX1-NEXT: sarq $63, %rdi 3541; AVX1-NEXT: vpinsrb $3, %edi, %xmm1, %xmm1 3542; AVX1-NEXT: shlq $59, %r13 3543; AVX1-NEXT: sarq $63, %r13 3544; AVX1-NEXT: vpinsrb $4, %r13d, %xmm1, %xmm1 3545; AVX1-NEXT: shlq $58, %rsi 3546; AVX1-NEXT: sarq $63, %rsi 3547; AVX1-NEXT: vpinsrb $5, %esi, %xmm1, %xmm1 3548; AVX1-NEXT: shlq $57, %r10 3549; AVX1-NEXT: sarq $63, %r10 3550; AVX1-NEXT: vpinsrb $6, %r10d, %xmm1, %xmm1 3551; AVX1-NEXT: shrq $7, %r11 3552; AVX1-NEXT: vpinsrb $7, %r11d, %xmm1, %xmm1 3553; AVX1-NEXT: shlq $55, %r9 3554; AVX1-NEXT: sarq $63, %r9 3555; AVX1-NEXT: vpinsrb $8, %r9d, %xmm1, %xmm1 3556; AVX1-NEXT: shlq $54, %rbx 3557; AVX1-NEXT: sarq $63, %rbx 3558; AVX1-NEXT: vpinsrb $9, %ebx, %xmm1, %xmm1 3559; AVX1-NEXT: shlq $53, %r14 3560; AVX1-NEXT: sarq $63, %r14 3561; AVX1-NEXT: vpinsrb $10, %r14d, %xmm1, %xmm1 3562; AVX1-NEXT: shlq $52, %r15 3563; AVX1-NEXT: sarq $63, %r15 3564; AVX1-NEXT: vpinsrb $11, %r15d, %xmm1, %xmm1 3565; AVX1-NEXT: shlq $51, %r12 3566; AVX1-NEXT: sarq $63, %r12 3567; AVX1-NEXT: vpinsrb $12, %r12d, %xmm1, %xmm1 3568; AVX1-NEXT: shlq $50, %rbp 3569; AVX1-NEXT: sarq $63, %rbp 3570; AVX1-NEXT: vpinsrb $13, %ebp, %xmm1, %xmm1 3571; AVX1-NEXT: shlq $49, %rdx 3572; AVX1-NEXT: sarq $63, %rdx 3573; AVX1-NEXT: vpinsrb $14, %edx, %xmm1, %xmm1 3574; AVX1-NEXT: shrq $15, %rax 3575; AVX1-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 3576; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 3577; AVX1-NEXT: popq %rbx 3578; AVX1-NEXT: popq %r12 3579; AVX1-NEXT: popq %r13 3580; AVX1-NEXT: popq %r14 3581; AVX1-NEXT: popq %r15 3582; AVX1-NEXT: popq %rbp 3583; AVX1-NEXT: retq 3584; 3585; AVX2-LABEL: load_sext_32i1_to_32i8: 3586; AVX2: # BB#0: # %entry 3587; AVX2-NEXT: pushq %rbp 3588; AVX2-NEXT: pushq %r15 3589; AVX2-NEXT: pushq %r14 3590; AVX2-NEXT: pushq %r13 3591; AVX2-NEXT: pushq %r12 3592; AVX2-NEXT: pushq %rbx 3593; AVX2-NEXT: movslq (%rdi), %rax 3594; AVX2-NEXT: movq %rax, %rcx 3595; AVX2-NEXT: shlq $47, %rcx 3596; AVX2-NEXT: sarq $63, %rcx 3597; AVX2-NEXT: vmovd %ecx, %xmm0 3598; AVX2-NEXT: movq %rax, %r8 3599; AVX2-NEXT: movq %rax, %rdx 3600; AVX2-NEXT: movq %rax, %rcx 3601; AVX2-NEXT: movq %rax, %rdi 3602; AVX2-NEXT: movq %rax, %r13 3603; AVX2-NEXT: movq %rax, %rsi 3604; AVX2-NEXT: movq %rax, %r10 3605; AVX2-NEXT: movq %rax, %r11 3606; AVX2-NEXT: movq %rax, %r9 3607; AVX2-NEXT: movq %rax, %rbx 3608; AVX2-NEXT: movq %rax, %r14 3609; AVX2-NEXT: movq %rax, %r15 3610; AVX2-NEXT: movq %rax, %r12 3611; AVX2-NEXT: movq %rax, %rbp 3612; AVX2-NEXT: shlq $46, %rbp 3613; AVX2-NEXT: sarq $63, %rbp 3614; AVX2-NEXT: vpinsrb $1, %ebp, %xmm0, %xmm0 3615; AVX2-NEXT: movq %rax, %rbp 3616; AVX2-NEXT: shlq $45, %r8 3617; AVX2-NEXT: sarq $63, %r8 3618; AVX2-NEXT: vpinsrb $2, %r8d, %xmm0, %xmm0 3619; AVX2-NEXT: movq %rax, %r8 3620; AVX2-NEXT: shlq $44, %rdx 3621; AVX2-NEXT: sarq $63, %rdx 3622; AVX2-NEXT: vpinsrb $3, %edx, %xmm0, %xmm0 3623; AVX2-NEXT: movq %rax, %rdx 3624; AVX2-NEXT: shlq $43, %rcx 3625; AVX2-NEXT: sarq $63, %rcx 3626; AVX2-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 3627; AVX2-NEXT: movq %rax, %rcx 3628; AVX2-NEXT: shlq $42, %rdi 3629; AVX2-NEXT: sarq $63, %rdi 3630; AVX2-NEXT: vpinsrb $5, %edi, %xmm0, %xmm0 3631; AVX2-NEXT: movq %rax, %rdi 3632; AVX2-NEXT: shlq $41, %r13 3633; AVX2-NEXT: sarq $63, %r13 3634; AVX2-NEXT: vpinsrb $6, %r13d, %xmm0, %xmm0 3635; AVX2-NEXT: movq %rax, %r13 3636; AVX2-NEXT: shlq $40, %rsi 3637; AVX2-NEXT: sarq $63, %rsi 3638; AVX2-NEXT: vpinsrb $7, %esi, %xmm0, %xmm0 3639; AVX2-NEXT: movq %rax, %rsi 3640; AVX2-NEXT: shlq $39, %r10 3641; AVX2-NEXT: sarq $63, %r10 3642; AVX2-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0 3643; AVX2-NEXT: movq %rax, %r10 3644; AVX2-NEXT: shlq $38, %r11 3645; AVX2-NEXT: sarq $63, %r11 3646; AVX2-NEXT: vpinsrb $9, %r11d, %xmm0, %xmm0 3647; AVX2-NEXT: movsbq %al, %r11 3648; AVX2-NEXT: shlq $37, %r9 3649; AVX2-NEXT: sarq $63, %r9 3650; AVX2-NEXT: vpinsrb $10, %r9d, %xmm0, %xmm0 3651; AVX2-NEXT: movq %rax, %r9 3652; AVX2-NEXT: shlq $36, %rbx 3653; AVX2-NEXT: sarq $63, %rbx 3654; AVX2-NEXT: vpinsrb $11, %ebx, %xmm0, %xmm0 3655; AVX2-NEXT: movq %rax, %rbx 3656; AVX2-NEXT: shlq $35, %r14 3657; AVX2-NEXT: sarq $63, %r14 3658; AVX2-NEXT: vpinsrb $12, %r14d, %xmm0, %xmm0 3659; AVX2-NEXT: movq %rax, %r14 3660; AVX2-NEXT: shlq $34, %r15 3661; AVX2-NEXT: sarq $63, %r15 3662; AVX2-NEXT: vpinsrb $13, %r15d, %xmm0, %xmm0 3663; AVX2-NEXT: movq %rax, %r15 3664; AVX2-NEXT: shlq $33, %r12 3665; AVX2-NEXT: sarq $63, %r12 3666; AVX2-NEXT: vpinsrb $14, %r12d, %xmm0, %xmm0 3667; AVX2-NEXT: movq %rax, %r12 3668; AVX2-NEXT: shrq $31, %rbp 3669; AVX2-NEXT: vpinsrb $15, %ebp, %xmm0, %xmm0 3670; AVX2-NEXT: movq %rax, %rbp 3671; AVX2-NEXT: shlq $63, %rdx 3672; AVX2-NEXT: sarq $63, %rdx 3673; AVX2-NEXT: vmovd %edx, %xmm1 3674; AVX2-NEXT: movq %rax, %rdx 3675; AVX2-NEXT: movswq %ax, %rax 3676; AVX2-NEXT: shlq $62, %r8 3677; AVX2-NEXT: sarq $63, %r8 3678; AVX2-NEXT: vpinsrb $1, %r8d, %xmm1, %xmm1 3679; AVX2-NEXT: shlq $61, %rcx 3680; AVX2-NEXT: sarq $63, %rcx 3681; AVX2-NEXT: vpinsrb $2, %ecx, %xmm1, %xmm1 3682; AVX2-NEXT: shlq $60, %rdi 3683; AVX2-NEXT: sarq $63, %rdi 3684; AVX2-NEXT: vpinsrb $3, %edi, %xmm1, %xmm1 3685; AVX2-NEXT: shlq $59, %r13 3686; AVX2-NEXT: sarq $63, %r13 3687; AVX2-NEXT: vpinsrb $4, %r13d, %xmm1, %xmm1 3688; AVX2-NEXT: shlq $58, %rsi 3689; AVX2-NEXT: sarq $63, %rsi 3690; AVX2-NEXT: vpinsrb $5, %esi, %xmm1, %xmm1 3691; AVX2-NEXT: shlq $57, %r10 3692; AVX2-NEXT: sarq $63, %r10 3693; AVX2-NEXT: vpinsrb $6, %r10d, %xmm1, %xmm1 3694; AVX2-NEXT: shrq $7, %r11 3695; AVX2-NEXT: vpinsrb $7, %r11d, %xmm1, %xmm1 3696; AVX2-NEXT: shlq $55, %r9 3697; AVX2-NEXT: sarq $63, %r9 3698; AVX2-NEXT: vpinsrb $8, %r9d, %xmm1, %xmm1 3699; AVX2-NEXT: shlq $54, %rbx 3700; AVX2-NEXT: sarq $63, %rbx 3701; AVX2-NEXT: vpinsrb $9, %ebx, %xmm1, %xmm1 3702; AVX2-NEXT: shlq $53, %r14 3703; AVX2-NEXT: sarq $63, %r14 3704; AVX2-NEXT: vpinsrb $10, %r14d, %xmm1, %xmm1 3705; AVX2-NEXT: shlq $52, %r15 3706; AVX2-NEXT: sarq $63, %r15 3707; AVX2-NEXT: vpinsrb $11, %r15d, %xmm1, %xmm1 3708; AVX2-NEXT: shlq $51, %r12 3709; AVX2-NEXT: sarq $63, %r12 3710; AVX2-NEXT: vpinsrb $12, %r12d, %xmm1, %xmm1 3711; AVX2-NEXT: shlq $50, %rbp 3712; AVX2-NEXT: sarq $63, %rbp 3713; AVX2-NEXT: vpinsrb $13, %ebp, %xmm1, %xmm1 3714; AVX2-NEXT: shlq $49, %rdx 3715; AVX2-NEXT: sarq $63, %rdx 3716; AVX2-NEXT: vpinsrb $14, %edx, %xmm1, %xmm1 3717; AVX2-NEXT: shrq $15, %rax 3718; AVX2-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 3719; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 3720; AVX2-NEXT: popq %rbx 3721; AVX2-NEXT: popq %r12 3722; AVX2-NEXT: popq %r13 3723; AVX2-NEXT: popq %r14 3724; AVX2-NEXT: popq %r15 3725; AVX2-NEXT: popq %rbp 3726; AVX2-NEXT: retq 3727; 3728; AVX512-LABEL: load_sext_32i1_to_32i8: 3729; AVX512: # BB#0: # %entry 3730; AVX512-NEXT: kmovw (%rdi), %k1 3731; AVX512-NEXT: movl {{.*}}(%rip), %eax 3732; AVX512-NEXT: vpbroadcastd %eax, %zmm0 {%k1} {z} 3733; AVX512-NEXT: vpmovdb %zmm0, %xmm0 3734; AVX512-NEXT: kmovw 2(%rdi), %k1 3735; AVX512-NEXT: vpbroadcastd %eax, %zmm1 {%k1} {z} 3736; AVX512-NEXT: vpmovdb %zmm1, %xmm1 3737; AVX512-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 3738; AVX512-NEXT: retq 3739; 3740; X32-SSE41-LABEL: load_sext_32i1_to_32i8: 3741; X32-SSE41: # BB#0: # %entry 3742; X32-SSE41-NEXT: pushl %esi 3743; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 3744; X32-SSE41-NEXT: movswl (%eax), %ecx 3745; X32-SSE41-NEXT: movl %ecx, %edx 3746; X32-SSE41-NEXT: shll $30, %edx 3747; X32-SSE41-NEXT: sarl $31, %edx 3748; X32-SSE41-NEXT: movl %ecx, %esi 3749; X32-SSE41-NEXT: shll $31, %esi 3750; X32-SSE41-NEXT: sarl $31, %esi 3751; X32-SSE41-NEXT: movd %esi, %xmm0 3752; X32-SSE41-NEXT: pinsrb $1, %edx, %xmm0 3753; X32-SSE41-NEXT: movl %ecx, %edx 3754; X32-SSE41-NEXT: shll $29, %edx 3755; X32-SSE41-NEXT: sarl $31, %edx 3756; X32-SSE41-NEXT: pinsrb $2, %edx, %xmm0 3757; X32-SSE41-NEXT: movl %ecx, %edx 3758; X32-SSE41-NEXT: shll $28, %edx 3759; X32-SSE41-NEXT: sarl $31, %edx 3760; X32-SSE41-NEXT: pinsrb $3, %edx, %xmm0 3761; X32-SSE41-NEXT: movl %ecx, %edx 3762; X32-SSE41-NEXT: shll $27, %edx 3763; X32-SSE41-NEXT: sarl $31, %edx 3764; X32-SSE41-NEXT: pinsrb $4, %edx, %xmm0 3765; X32-SSE41-NEXT: movl %ecx, %edx 3766; X32-SSE41-NEXT: shll $26, %edx 3767; X32-SSE41-NEXT: sarl $31, %edx 3768; X32-SSE41-NEXT: pinsrb $5, %edx, %xmm0 3769; X32-SSE41-NEXT: movl %ecx, %edx 3770; X32-SSE41-NEXT: shll $25, %edx 3771; X32-SSE41-NEXT: sarl $31, %edx 3772; X32-SSE41-NEXT: pinsrb $6, %edx, %xmm0 3773; X32-SSE41-NEXT: movsbl %cl, %edx 3774; X32-SSE41-NEXT: shrl $7, %edx 3775; X32-SSE41-NEXT: pinsrb $7, %edx, %xmm0 3776; X32-SSE41-NEXT: movl %ecx, %edx 3777; X32-SSE41-NEXT: shll $23, %edx 3778; X32-SSE41-NEXT: sarl $31, %edx 3779; X32-SSE41-NEXT: pinsrb $8, %edx, %xmm0 3780; X32-SSE41-NEXT: movl %ecx, %edx 3781; X32-SSE41-NEXT: shll $22, %edx 3782; X32-SSE41-NEXT: sarl $31, %edx 3783; X32-SSE41-NEXT: pinsrb $9, %edx, %xmm0 3784; X32-SSE41-NEXT: movl %ecx, %edx 3785; X32-SSE41-NEXT: shll $21, %edx 3786; X32-SSE41-NEXT: sarl $31, %edx 3787; X32-SSE41-NEXT: pinsrb $10, %edx, %xmm0 3788; X32-SSE41-NEXT: movl %ecx, %edx 3789; X32-SSE41-NEXT: shll $20, %edx 3790; X32-SSE41-NEXT: sarl $31, %edx 3791; X32-SSE41-NEXT: pinsrb $11, %edx, %xmm0 3792; X32-SSE41-NEXT: movl %ecx, %edx 3793; X32-SSE41-NEXT: shll $19, %edx 3794; X32-SSE41-NEXT: sarl $31, %edx 3795; X32-SSE41-NEXT: pinsrb $12, %edx, %xmm0 3796; X32-SSE41-NEXT: movl %ecx, %edx 3797; X32-SSE41-NEXT: shll $18, %edx 3798; X32-SSE41-NEXT: sarl $31, %edx 3799; X32-SSE41-NEXT: pinsrb $13, %edx, %xmm0 3800; X32-SSE41-NEXT: movl %ecx, %edx 3801; X32-SSE41-NEXT: shll $17, %edx 3802; X32-SSE41-NEXT: sarl $31, %edx 3803; X32-SSE41-NEXT: pinsrb $14, %edx, %xmm0 3804; X32-SSE41-NEXT: shrl $15, %ecx 3805; X32-SSE41-NEXT: pinsrb $15, %ecx, %xmm0 3806; X32-SSE41-NEXT: movswl 2(%eax), %eax 3807; X32-SSE41-NEXT: movl %eax, %ecx 3808; X32-SSE41-NEXT: shll $30, %ecx 3809; X32-SSE41-NEXT: sarl $31, %ecx 3810; X32-SSE41-NEXT: movl %eax, %edx 3811; X32-SSE41-NEXT: shll $31, %edx 3812; X32-SSE41-NEXT: sarl $31, %edx 3813; X32-SSE41-NEXT: movd %edx, %xmm1 3814; X32-SSE41-NEXT: pinsrb $1, %ecx, %xmm1 3815; X32-SSE41-NEXT: movl %eax, %ecx 3816; X32-SSE41-NEXT: shll $29, %ecx 3817; X32-SSE41-NEXT: sarl $31, %ecx 3818; X32-SSE41-NEXT: pinsrb $2, %ecx, %xmm1 3819; X32-SSE41-NEXT: movl %eax, %ecx 3820; X32-SSE41-NEXT: shll $28, %ecx 3821; X32-SSE41-NEXT: sarl $31, %ecx 3822; X32-SSE41-NEXT: pinsrb $3, %ecx, %xmm1 3823; X32-SSE41-NEXT: movl %eax, %ecx 3824; X32-SSE41-NEXT: shll $27, %ecx 3825; X32-SSE41-NEXT: sarl $31, %ecx 3826; X32-SSE41-NEXT: pinsrb $4, %ecx, %xmm1 3827; X32-SSE41-NEXT: movl %eax, %ecx 3828; X32-SSE41-NEXT: shll $26, %ecx 3829; X32-SSE41-NEXT: sarl $31, %ecx 3830; X32-SSE41-NEXT: pinsrb $5, %ecx, %xmm1 3831; X32-SSE41-NEXT: movl %eax, %ecx 3832; X32-SSE41-NEXT: shll $25, %ecx 3833; X32-SSE41-NEXT: sarl $31, %ecx 3834; X32-SSE41-NEXT: pinsrb $6, %ecx, %xmm1 3835; X32-SSE41-NEXT: movsbl %al, %ecx 3836; X32-SSE41-NEXT: shrl $7, %ecx 3837; X32-SSE41-NEXT: pinsrb $7, %ecx, %xmm1 3838; X32-SSE41-NEXT: movl %eax, %ecx 3839; X32-SSE41-NEXT: shll $23, %ecx 3840; X32-SSE41-NEXT: sarl $31, %ecx 3841; X32-SSE41-NEXT: pinsrb $8, %ecx, %xmm1 3842; X32-SSE41-NEXT: movl %eax, %ecx 3843; X32-SSE41-NEXT: shll $22, %ecx 3844; X32-SSE41-NEXT: sarl $31, %ecx 3845; X32-SSE41-NEXT: pinsrb $9, %ecx, %xmm1 3846; X32-SSE41-NEXT: movl %eax, %ecx 3847; X32-SSE41-NEXT: shll $21, %ecx 3848; X32-SSE41-NEXT: sarl $31, %ecx 3849; X32-SSE41-NEXT: pinsrb $10, %ecx, %xmm1 3850; X32-SSE41-NEXT: movl %eax, %ecx 3851; X32-SSE41-NEXT: shll $20, %ecx 3852; X32-SSE41-NEXT: sarl $31, %ecx 3853; X32-SSE41-NEXT: pinsrb $11, %ecx, %xmm1 3854; X32-SSE41-NEXT: movl %eax, %ecx 3855; X32-SSE41-NEXT: shll $19, %ecx 3856; X32-SSE41-NEXT: sarl $31, %ecx 3857; X32-SSE41-NEXT: pinsrb $12, %ecx, %xmm1 3858; X32-SSE41-NEXT: movl %eax, %ecx 3859; X32-SSE41-NEXT: shll $18, %ecx 3860; X32-SSE41-NEXT: sarl $31, %ecx 3861; X32-SSE41-NEXT: pinsrb $13, %ecx, %xmm1 3862; X32-SSE41-NEXT: movl %eax, %ecx 3863; X32-SSE41-NEXT: shll $17, %ecx 3864; X32-SSE41-NEXT: sarl $31, %ecx 3865; X32-SSE41-NEXT: pinsrb $14, %ecx, %xmm1 3866; X32-SSE41-NEXT: shrl $15, %eax 3867; X32-SSE41-NEXT: pinsrb $15, %eax, %xmm1 3868; X32-SSE41-NEXT: popl %esi 3869; X32-SSE41-NEXT: retl 3870entry: 3871 %X = load <32 x i1>, <32 x i1>* %ptr 3872 %Y = sext <32 x i1> %X to <32 x i8> 3873 ret <32 x i8> %Y 3874} 3875 3876define <16 x i16> @load_sext_16i8_to_16i16(<16 x i8> *%ptr) { 3877; SSE2-LABEL: load_sext_16i8_to_16i16: 3878; SSE2: # BB#0: # %entry 3879; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 3880; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3881; SSE2-NEXT: psraw $8, %xmm0 3882; SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 3883; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3884; SSE2-NEXT: psraw $8, %xmm1 3885; SSE2-NEXT: retq 3886; 3887; SSSE3-LABEL: load_sext_16i8_to_16i16: 3888; SSSE3: # BB#0: # %entry 3889; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 3890; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3891; SSSE3-NEXT: psraw $8, %xmm0 3892; SSSE3-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 3893; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3894; SSSE3-NEXT: psraw $8, %xmm1 3895; SSSE3-NEXT: retq 3896; 3897; SSE41-LABEL: load_sext_16i8_to_16i16: 3898; SSE41: # BB#0: # %entry 3899; SSE41-NEXT: pmovsxbw (%rdi), %xmm0 3900; SSE41-NEXT: pmovsxbw 8(%rdi), %xmm1 3901; SSE41-NEXT: retq 3902; 3903; AVX1-LABEL: load_sext_16i8_to_16i16: 3904; AVX1: # BB#0: # %entry 3905; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0 3906; AVX1-NEXT: vpmovsxbw 8(%rdi), %xmm1 3907; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 3908; AVX1-NEXT: retq 3909; 3910; AVX2-LABEL: load_sext_16i8_to_16i16: 3911; AVX2: # BB#0: # %entry 3912; AVX2-NEXT: vpmovsxbw (%rdi), %ymm0 3913; AVX2-NEXT: retq 3914; 3915; AVX512-LABEL: load_sext_16i8_to_16i16: 3916; AVX512: # BB#0: # %entry 3917; AVX512-NEXT: vpmovsxbw (%rdi), %ymm0 3918; AVX512-NEXT: retq 3919; 3920; X32-SSE41-LABEL: load_sext_16i8_to_16i16: 3921; X32-SSE41: # BB#0: # %entry 3922; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 3923; X32-SSE41-NEXT: pmovsxbw (%eax), %xmm0 3924; X32-SSE41-NEXT: pmovsxbw 8(%eax), %xmm1 3925; X32-SSE41-NEXT: retl 3926entry: 3927 %X = load <16 x i8>, <16 x i8>* %ptr 3928 %Y = sext <16 x i8> %X to <16 x i16> 3929 ret <16 x i16> %Y 3930} 3931 3932define <2 x i64> @load_sext_2i16_to_2i64(<2 x i16> *%ptr) { 3933; SSE2-LABEL: load_sext_2i16_to_2i64: 3934; SSE2: # BB#0: # %entry 3935; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 3936; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 3937; SSE2-NEXT: movdqa %xmm0, %xmm1 3938; SSE2-NEXT: psrad $31, %xmm1 3939; SSE2-NEXT: psrad $16, %xmm0 3940; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 3941; SSE2-NEXT: retq 3942; 3943; SSSE3-LABEL: load_sext_2i16_to_2i64: 3944; SSSE3: # BB#0: # %entry 3945; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 3946; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 3947; SSSE3-NEXT: movdqa %xmm0, %xmm1 3948; SSSE3-NEXT: psrad $31, %xmm1 3949; SSSE3-NEXT: psrad $16, %xmm0 3950; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 3951; SSSE3-NEXT: retq 3952; 3953; SSE41-LABEL: load_sext_2i16_to_2i64: 3954; SSE41: # BB#0: # %entry 3955; SSE41-NEXT: pmovsxwq (%rdi), %xmm0 3956; SSE41-NEXT: retq 3957; 3958; AVX-LABEL: load_sext_2i16_to_2i64: 3959; AVX: # BB#0: # %entry 3960; AVX-NEXT: vpmovsxwq (%rdi), %xmm0 3961; AVX-NEXT: retq 3962; 3963; X32-SSE41-LABEL: load_sext_2i16_to_2i64: 3964; X32-SSE41: # BB#0: # %entry 3965; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 3966; X32-SSE41-NEXT: pmovsxwq (%eax), %xmm0 3967; X32-SSE41-NEXT: retl 3968entry: 3969 %X = load <2 x i16>, <2 x i16>* %ptr 3970 %Y = sext <2 x i16> %X to <2 x i64> 3971 ret <2 x i64> %Y 3972} 3973 3974define <4 x i32> @load_sext_4i16_to_4i32(<4 x i16> *%ptr) { 3975; SSE2-LABEL: load_sext_4i16_to_4i32: 3976; SSE2: # BB#0: # %entry 3977; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 3978; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 3979; SSE2-NEXT: psrad $16, %xmm0 3980; SSE2-NEXT: retq 3981; 3982; SSSE3-LABEL: load_sext_4i16_to_4i32: 3983; SSSE3: # BB#0: # %entry 3984; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 3985; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 3986; SSSE3-NEXT: psrad $16, %xmm0 3987; SSSE3-NEXT: retq 3988; 3989; SSE41-LABEL: load_sext_4i16_to_4i32: 3990; SSE41: # BB#0: # %entry 3991; SSE41-NEXT: pmovsxwd (%rdi), %xmm0 3992; SSE41-NEXT: retq 3993; 3994; AVX-LABEL: load_sext_4i16_to_4i32: 3995; AVX: # BB#0: # %entry 3996; AVX-NEXT: vpmovsxwd (%rdi), %xmm0 3997; AVX-NEXT: retq 3998; 3999; X32-SSE41-LABEL: load_sext_4i16_to_4i32: 4000; X32-SSE41: # BB#0: # %entry 4001; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4002; X32-SSE41-NEXT: pmovsxwd (%eax), %xmm0 4003; X32-SSE41-NEXT: retl 4004entry: 4005 %X = load <4 x i16>, <4 x i16>* %ptr 4006 %Y = sext <4 x i16> %X to <4 x i32> 4007 ret <4 x i32> %Y 4008} 4009 4010define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) { 4011; SSE2-LABEL: load_sext_4i16_to_4i64: 4012; SSE2: # BB#0: # %entry 4013; SSE2-NEXT: movswq 2(%rdi), %rax 4014; SSE2-NEXT: movd %rax, %xmm1 4015; SSE2-NEXT: movswq (%rdi), %rax 4016; SSE2-NEXT: movd %rax, %xmm0 4017; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4018; SSE2-NEXT: movswq 6(%rdi), %rax 4019; SSE2-NEXT: movd %rax, %xmm2 4020; SSE2-NEXT: movswq 4(%rdi), %rax 4021; SSE2-NEXT: movd %rax, %xmm1 4022; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 4023; SSE2-NEXT: retq 4024; 4025; SSSE3-LABEL: load_sext_4i16_to_4i64: 4026; SSSE3: # BB#0: # %entry 4027; SSSE3-NEXT: movswq 2(%rdi), %rax 4028; SSSE3-NEXT: movd %rax, %xmm1 4029; SSSE3-NEXT: movswq (%rdi), %rax 4030; SSSE3-NEXT: movd %rax, %xmm0 4031; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4032; SSSE3-NEXT: movswq 6(%rdi), %rax 4033; SSSE3-NEXT: movd %rax, %xmm2 4034; SSSE3-NEXT: movswq 4(%rdi), %rax 4035; SSSE3-NEXT: movd %rax, %xmm1 4036; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 4037; SSSE3-NEXT: retq 4038; 4039; SSE41-LABEL: load_sext_4i16_to_4i64: 4040; SSE41: # BB#0: # %entry 4041; SSE41-NEXT: pmovsxwq (%rdi), %xmm0 4042; SSE41-NEXT: pmovsxwq 4(%rdi), %xmm1 4043; SSE41-NEXT: retq 4044; 4045; AVX1-LABEL: load_sext_4i16_to_4i64: 4046; AVX1: # BB#0: # %entry 4047; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0 4048; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 4049; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4050; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 4051; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4052; AVX1-NEXT: retq 4053; 4054; AVX2-LABEL: load_sext_4i16_to_4i64: 4055; AVX2: # BB#0: # %entry 4056; AVX2-NEXT: vpmovsxwq (%rdi), %ymm0 4057; AVX2-NEXT: retq 4058; 4059; AVX512-LABEL: load_sext_4i16_to_4i64: 4060; AVX512: # BB#0: # %entry 4061; AVX512-NEXT: vpmovsxwq (%rdi), %ymm0 4062; AVX512-NEXT: retq 4063; 4064; X32-SSE41-LABEL: load_sext_4i16_to_4i64: 4065; X32-SSE41: # BB#0: # %entry 4066; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4067; X32-SSE41-NEXT: pmovsxwq (%eax), %xmm0 4068; X32-SSE41-NEXT: pmovsxwq 4(%eax), %xmm1 4069; X32-SSE41-NEXT: retl 4070entry: 4071 %X = load <4 x i16>, <4 x i16>* %ptr 4072 %Y = sext <4 x i16> %X to <4 x i64> 4073 ret <4 x i64> %Y 4074} 4075 4076define <8 x i32> @load_sext_8i16_to_8i32(<8 x i16> *%ptr) { 4077; SSE2-LABEL: load_sext_8i16_to_8i32: 4078; SSE2: # BB#0: # %entry 4079; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4080; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4081; SSE2-NEXT: psrad $16, %xmm0 4082; SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4083; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 4084; SSE2-NEXT: psrad $16, %xmm1 4085; SSE2-NEXT: retq 4086; 4087; SSSE3-LABEL: load_sext_8i16_to_8i32: 4088; SSSE3: # BB#0: # %entry 4089; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4090; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4091; SSSE3-NEXT: psrad $16, %xmm0 4092; SSSE3-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4093; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 4094; SSSE3-NEXT: psrad $16, %xmm1 4095; SSSE3-NEXT: retq 4096; 4097; SSE41-LABEL: load_sext_8i16_to_8i32: 4098; SSE41: # BB#0: # %entry 4099; SSE41-NEXT: pmovsxwd (%rdi), %xmm0 4100; SSE41-NEXT: pmovsxwd 8(%rdi), %xmm1 4101; SSE41-NEXT: retq 4102; 4103; AVX1-LABEL: load_sext_8i16_to_8i32: 4104; AVX1: # BB#0: # %entry 4105; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0 4106; AVX1-NEXT: vpmovsxwd 8(%rdi), %xmm1 4107; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4108; AVX1-NEXT: retq 4109; 4110; AVX2-LABEL: load_sext_8i16_to_8i32: 4111; AVX2: # BB#0: # %entry 4112; AVX2-NEXT: vpmovsxwd (%rdi), %ymm0 4113; AVX2-NEXT: retq 4114; 4115; AVX512-LABEL: load_sext_8i16_to_8i32: 4116; AVX512: # BB#0: # %entry 4117; AVX512-NEXT: vpmovsxwd (%rdi), %ymm0 4118; AVX512-NEXT: retq 4119; 4120; X32-SSE41-LABEL: load_sext_8i16_to_8i32: 4121; X32-SSE41: # BB#0: # %entry 4122; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4123; X32-SSE41-NEXT: pmovsxwd (%eax), %xmm0 4124; X32-SSE41-NEXT: pmovsxwd 8(%eax), %xmm1 4125; X32-SSE41-NEXT: retl 4126entry: 4127 %X = load <8 x i16>, <8 x i16>* %ptr 4128 %Y = sext <8 x i16> %X to <8 x i32> 4129 ret <8 x i32> %Y 4130} 4131 4132define <2 x i64> @load_sext_2i32_to_2i64(<2 x i32> *%ptr) { 4133; SSE2-LABEL: load_sext_2i32_to_2i64: 4134; SSE2: # BB#0: # %entry 4135; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4136; SSE2-NEXT: movdqa %xmm0, %xmm1 4137; SSE2-NEXT: psrad $31, %xmm1 4138; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4139; SSE2-NEXT: retq 4140; 4141; SSSE3-LABEL: load_sext_2i32_to_2i64: 4142; SSSE3: # BB#0: # %entry 4143; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4144; SSSE3-NEXT: movdqa %xmm0, %xmm1 4145; SSSE3-NEXT: psrad $31, %xmm1 4146; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4147; SSSE3-NEXT: retq 4148; 4149; SSE41-LABEL: load_sext_2i32_to_2i64: 4150; SSE41: # BB#0: # %entry 4151; SSE41-NEXT: pmovsxdq (%rdi), %xmm0 4152; SSE41-NEXT: retq 4153; 4154; AVX-LABEL: load_sext_2i32_to_2i64: 4155; AVX: # BB#0: # %entry 4156; AVX-NEXT: vpmovsxdq (%rdi), %xmm0 4157; AVX-NEXT: retq 4158; 4159; X32-SSE41-LABEL: load_sext_2i32_to_2i64: 4160; X32-SSE41: # BB#0: # %entry 4161; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4162; X32-SSE41-NEXT: pmovsxdq (%eax), %xmm0 4163; X32-SSE41-NEXT: retl 4164entry: 4165 %X = load <2 x i32>, <2 x i32>* %ptr 4166 %Y = sext <2 x i32> %X to <2 x i64> 4167 ret <2 x i64> %Y 4168} 4169 4170define <4 x i64> @load_sext_4i32_to_4i64(<4 x i32> *%ptr) { 4171; SSE2-LABEL: load_sext_4i32_to_4i64: 4172; SSE2: # BB#0: # %entry 4173; SSE2-NEXT: movdqa (%rdi), %xmm0 4174; SSE2-NEXT: movdqa %xmm0, %xmm2 4175; SSE2-NEXT: psrad $31, %xmm2 4176; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4177; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4178; SSE2-NEXT: movdqa %xmm1, %xmm2 4179; SSE2-NEXT: psrad $31, %xmm2 4180; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4181; SSE2-NEXT: retq 4182; 4183; SSSE3-LABEL: load_sext_4i32_to_4i64: 4184; SSSE3: # BB#0: # %entry 4185; SSSE3-NEXT: movdqa (%rdi), %xmm0 4186; SSSE3-NEXT: movdqa %xmm0, %xmm2 4187; SSSE3-NEXT: psrad $31, %xmm2 4188; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4189; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4190; SSSE3-NEXT: movdqa %xmm1, %xmm2 4191; SSSE3-NEXT: psrad $31, %xmm2 4192; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4193; SSSE3-NEXT: retq 4194; 4195; SSE41-LABEL: load_sext_4i32_to_4i64: 4196; SSE41: # BB#0: # %entry 4197; SSE41-NEXT: pmovsxdq (%rdi), %xmm0 4198; SSE41-NEXT: pmovsxdq 8(%rdi), %xmm1 4199; SSE41-NEXT: retq 4200; 4201; AVX1-LABEL: load_sext_4i32_to_4i64: 4202; AVX1: # BB#0: # %entry 4203; AVX1-NEXT: vpmovsxdq (%rdi), %xmm0 4204; AVX1-NEXT: vpmovsxdq 8(%rdi), %xmm1 4205; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4206; AVX1-NEXT: retq 4207; 4208; AVX2-LABEL: load_sext_4i32_to_4i64: 4209; AVX2: # BB#0: # %entry 4210; AVX2-NEXT: vpmovsxdq (%rdi), %ymm0 4211; AVX2-NEXT: retq 4212; 4213; AVX512-LABEL: load_sext_4i32_to_4i64: 4214; AVX512: # BB#0: # %entry 4215; AVX512-NEXT: vpmovsxdq (%rdi), %ymm0 4216; AVX512-NEXT: retq 4217; 4218; X32-SSE41-LABEL: load_sext_4i32_to_4i64: 4219; X32-SSE41: # BB#0: # %entry 4220; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4221; X32-SSE41-NEXT: pmovsxdq (%eax), %xmm0 4222; X32-SSE41-NEXT: pmovsxdq 8(%eax), %xmm1 4223; X32-SSE41-NEXT: retl 4224entry: 4225 %X = load <4 x i32>, <4 x i32>* %ptr 4226 %Y = sext <4 x i32> %X to <4 x i64> 4227 ret <4 x i64> %Y 4228} 4229 4230define i32 @sext_2i8_to_i32(<16 x i8> %A) nounwind uwtable readnone ssp { 4231; SSE2-LABEL: sext_2i8_to_i32: 4232; SSE2: # BB#0: # %entry 4233; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4234; SSE2-NEXT: psraw $8, %xmm0 4235; SSE2-NEXT: movd %xmm0, %eax 4236; SSE2-NEXT: retq 4237; 4238; SSSE3-LABEL: sext_2i8_to_i32: 4239; SSSE3: # BB#0: # %entry 4240; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4241; SSSE3-NEXT: psraw $8, %xmm0 4242; SSSE3-NEXT: movd %xmm0, %eax 4243; SSSE3-NEXT: retq 4244; 4245; SSE41-LABEL: sext_2i8_to_i32: 4246; SSE41: # BB#0: # %entry 4247; SSE41-NEXT: pmovsxbw %xmm0, %xmm0 4248; SSE41-NEXT: movd %xmm0, %eax 4249; SSE41-NEXT: retq 4250; 4251; AVX-LABEL: sext_2i8_to_i32: 4252; AVX: # BB#0: # %entry 4253; AVX-NEXT: vpmovsxbw %xmm0, %xmm0 4254; AVX-NEXT: vmovd %xmm0, %eax 4255; AVX-NEXT: retq 4256; 4257; X32-SSE41-LABEL: sext_2i8_to_i32: 4258; X32-SSE41: # BB#0: # %entry 4259; X32-SSE41-NEXT: pushl %eax 4260; X32-SSE41-NEXT: .Ltmp0: 4261; X32-SSE41-NEXT: .cfi_def_cfa_offset 8 4262; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm0 4263; X32-SSE41-NEXT: movd %xmm0, %eax 4264; X32-SSE41-NEXT: popl %ecx 4265; X32-SSE41-NEXT: retl 4266entry: 4267 %Shuf = shufflevector <16 x i8> %A, <16 x i8> undef, <2 x i32> <i32 0, i32 1> 4268 %Ex = sext <2 x i8> %Shuf to <2 x i16> 4269 %Bc = bitcast <2 x i16> %Ex to i32 4270 ret i32 %Bc 4271} 4272 4273define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) { 4274; SSE2-LABEL: sext_4i1_to_4i64: 4275; SSE2: # BB#0: 4276; SSE2-NEXT: pslld $31, %xmm0 4277; SSE2-NEXT: psrad $31, %xmm0 4278; SSE2-NEXT: movdqa %xmm0, %xmm2 4279; SSE2-NEXT: psrad $31, %xmm2 4280; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4281; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4282; SSE2-NEXT: movdqa %xmm1, %xmm2 4283; SSE2-NEXT: psrad $31, %xmm2 4284; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4285; SSE2-NEXT: retq 4286; 4287; SSSE3-LABEL: sext_4i1_to_4i64: 4288; SSSE3: # BB#0: 4289; SSSE3-NEXT: pslld $31, %xmm0 4290; SSSE3-NEXT: psrad $31, %xmm0 4291; SSSE3-NEXT: movdqa %xmm0, %xmm2 4292; SSSE3-NEXT: psrad $31, %xmm2 4293; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4294; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4295; SSSE3-NEXT: movdqa %xmm1, %xmm2 4296; SSSE3-NEXT: psrad $31, %xmm2 4297; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4298; SSSE3-NEXT: retq 4299; 4300; SSE41-LABEL: sext_4i1_to_4i64: 4301; SSE41: # BB#0: 4302; SSE41-NEXT: pslld $31, %xmm0 4303; SSE41-NEXT: psrad $31, %xmm0 4304; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4305; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4306; SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4307; SSE41-NEXT: movdqa %xmm2, %xmm0 4308; SSE41-NEXT: retq 4309; 4310; AVX1-LABEL: sext_4i1_to_4i64: 4311; AVX1: # BB#0: 4312; AVX1-NEXT: vpslld $31, %xmm0, %xmm0 4313; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0 4314; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 4315; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4316; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 4317; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4318; AVX1-NEXT: retq 4319; 4320; AVX2-LABEL: sext_4i1_to_4i64: 4321; AVX2: # BB#0: 4322; AVX2-NEXT: vpslld $31, %xmm0, %xmm0 4323; AVX2-NEXT: vpsrad $31, %xmm0, %xmm0 4324; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 4325; AVX2-NEXT: retq 4326; 4327; AVX512-LABEL: sext_4i1_to_4i64: 4328; AVX512: # BB#0: 4329; AVX512-NEXT: vpslld $31, %xmm0, %xmm0 4330; AVX512-NEXT: vpsrad $31, %xmm0, %xmm0 4331; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 4332; AVX512-NEXT: retq 4333; 4334; X32-SSE41-LABEL: sext_4i1_to_4i64: 4335; X32-SSE41: # BB#0: 4336; X32-SSE41-NEXT: pslld $31, %xmm0 4337; X32-SSE41-NEXT: psrad $31, %xmm0 4338; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4339; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4340; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4341; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 4342; X32-SSE41-NEXT: retl 4343 %extmask = sext <4 x i1> %mask to <4 x i64> 4344 ret <4 x i64> %extmask 4345} 4346 4347define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) { 4348; SSE2-LABEL: sext_4i8_to_4i64: 4349; SSE2: # BB#0: 4350; SSE2-NEXT: pslld $24, %xmm0 4351; SSE2-NEXT: psrad $24, %xmm0 4352; SSE2-NEXT: movdqa %xmm0, %xmm2 4353; SSE2-NEXT: psrad $31, %xmm2 4354; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4355; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4356; SSE2-NEXT: movdqa %xmm1, %xmm2 4357; SSE2-NEXT: psrad $31, %xmm2 4358; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4359; SSE2-NEXT: retq 4360; 4361; SSSE3-LABEL: sext_4i8_to_4i64: 4362; SSSE3: # BB#0: 4363; SSSE3-NEXT: pslld $24, %xmm0 4364; SSSE3-NEXT: psrad $24, %xmm0 4365; SSSE3-NEXT: movdqa %xmm0, %xmm2 4366; SSSE3-NEXT: psrad $31, %xmm2 4367; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4368; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4369; SSSE3-NEXT: movdqa %xmm1, %xmm2 4370; SSSE3-NEXT: psrad $31, %xmm2 4371; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4372; SSSE3-NEXT: retq 4373; 4374; SSE41-LABEL: sext_4i8_to_4i64: 4375; SSE41: # BB#0: 4376; SSE41-NEXT: pslld $24, %xmm0 4377; SSE41-NEXT: psrad $24, %xmm0 4378; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4379; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4380; SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4381; SSE41-NEXT: movdqa %xmm2, %xmm0 4382; SSE41-NEXT: retq 4383; 4384; AVX1-LABEL: sext_4i8_to_4i64: 4385; AVX1: # BB#0: 4386; AVX1-NEXT: vpslld $24, %xmm0, %xmm0 4387; AVX1-NEXT: vpsrad $24, %xmm0, %xmm0 4388; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 4389; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4390; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 4391; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4392; AVX1-NEXT: retq 4393; 4394; AVX2-LABEL: sext_4i8_to_4i64: 4395; AVX2: # BB#0: 4396; AVX2-NEXT: vpslld $24, %xmm0, %xmm0 4397; AVX2-NEXT: vpsrad $24, %xmm0, %xmm0 4398; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 4399; AVX2-NEXT: retq 4400; 4401; AVX512-LABEL: sext_4i8_to_4i64: 4402; AVX512: # BB#0: 4403; AVX512-NEXT: vpslld $24, %xmm0, %xmm0 4404; AVX512-NEXT: vpsrad $24, %xmm0, %xmm0 4405; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 4406; AVX512-NEXT: retq 4407; 4408; X32-SSE41-LABEL: sext_4i8_to_4i64: 4409; X32-SSE41: # BB#0: 4410; X32-SSE41-NEXT: pslld $24, %xmm0 4411; X32-SSE41-NEXT: psrad $24, %xmm0 4412; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4413; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4414; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4415; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 4416; X32-SSE41-NEXT: retl 4417 %extmask = sext <4 x i8> %mask to <4 x i64> 4418 ret <4 x i64> %extmask 4419} 4420