1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F 8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW 9; 10; Just one 32-bit run to make sure we do reasonable things there. 11; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32-SSE41 12 13define <8 x i16> @sext_16i8_to_8i16(<16 x i8> %A) nounwind uwtable readnone ssp { 14; SSE2-LABEL: sext_16i8_to_8i16: 15; SSE2: # BB#0: # %entry 16; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 17; SSE2-NEXT: psraw $8, %xmm0 18; SSE2-NEXT: retq 19; 20; SSSE3-LABEL: sext_16i8_to_8i16: 21; SSSE3: # BB#0: # %entry 22; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 23; SSSE3-NEXT: psraw $8, %xmm0 24; SSSE3-NEXT: retq 25; 26; SSE41-LABEL: sext_16i8_to_8i16: 27; SSE41: # BB#0: # %entry 28; SSE41-NEXT: pmovsxbw %xmm0, %xmm0 29; SSE41-NEXT: retq 30; 31; AVX-LABEL: sext_16i8_to_8i16: 32; AVX: # BB#0: # %entry 33; AVX-NEXT: vpmovsxbw %xmm0, %xmm0 34; AVX-NEXT: retq 35; 36; X32-SSE41-LABEL: sext_16i8_to_8i16: 37; X32-SSE41: # BB#0: # %entry 38; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm0 39; X32-SSE41-NEXT: retl 40entry: 41 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 42 %C = sext <8 x i8> %B to <8 x i16> 43 ret <8 x i16> %C 44} 45 46define <16 x i16> @sext_16i8_to_16i16(<16 x i8> %A) nounwind uwtable readnone ssp { 47; SSE2-LABEL: sext_16i8_to_16i16: 48; SSE2: # BB#0: # %entry 49; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 50; SSE2-NEXT: psraw $8, %xmm2 51; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 52; SSE2-NEXT: psraw $8, %xmm1 53; SSE2-NEXT: movdqa %xmm2, %xmm0 54; SSE2-NEXT: retq 55; 56; SSSE3-LABEL: sext_16i8_to_16i16: 57; SSSE3: # BB#0: # %entry 58; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 59; SSSE3-NEXT: psraw $8, %xmm2 60; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 61; SSSE3-NEXT: psraw $8, %xmm1 62; SSSE3-NEXT: movdqa %xmm2, %xmm0 63; SSSE3-NEXT: retq 64; 65; SSE41-LABEL: sext_16i8_to_16i16: 66; SSE41: # BB#0: # %entry 67; SSE41-NEXT: pmovsxbw %xmm0, %xmm2 68; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 69; SSE41-NEXT: pmovsxbw %xmm0, %xmm1 70; SSE41-NEXT: movdqa %xmm2, %xmm0 71; SSE41-NEXT: retq 72; 73; AVX1-LABEL: sext_16i8_to_16i16: 74; AVX1: # BB#0: # %entry 75; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1 76; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 77; AVX1-NEXT: vpmovsxbw %xmm0, %xmm0 78; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 79; AVX1-NEXT: retq 80; 81; AVX2-LABEL: sext_16i8_to_16i16: 82; AVX2: # BB#0: # %entry 83; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0 84; AVX2-NEXT: retq 85; 86; AVX512-LABEL: sext_16i8_to_16i16: 87; AVX512: # BB#0: # %entry 88; AVX512-NEXT: vpmovsxbw %xmm0, %ymm0 89; AVX512-NEXT: retq 90; 91; X32-SSE41-LABEL: sext_16i8_to_16i16: 92; X32-SSE41: # BB#0: # %entry 93; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm2 94; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 95; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm1 96; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 97; X32-SSE41-NEXT: retl 98entry: 99 %B = sext <16 x i8> %A to <16 x i16> 100 ret <16 x i16> %B 101} 102 103define <32 x i16> @sext_32i8_to_32i16(<32 x i8> %A) nounwind uwtable readnone ssp { 104; SSE2-LABEL: sext_32i8_to_32i16: 105; SSE2: # BB#0: # %entry 106; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3],xmm4[4],xmm0[4],xmm4[5],xmm0[5],xmm4[6],xmm0[6],xmm4[7],xmm0[7] 107; SSE2-NEXT: psraw $8, %xmm4 108; SSE2-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm0[8],xmm5[9],xmm0[9],xmm5[10],xmm0[10],xmm5[11],xmm0[11],xmm5[12],xmm0[12],xmm5[13],xmm0[13],xmm5[14],xmm0[14],xmm5[15],xmm0[15] 109; SSE2-NEXT: psraw $8, %xmm5 110; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 111; SSE2-NEXT: psraw $8, %xmm2 112; SSE2-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm1[8],xmm3[9],xmm1[9],xmm3[10],xmm1[10],xmm3[11],xmm1[11],xmm3[12],xmm1[12],xmm3[13],xmm1[13],xmm3[14],xmm1[14],xmm3[15],xmm1[15] 113; SSE2-NEXT: psraw $8, %xmm3 114; SSE2-NEXT: movdqa %xmm4, %xmm0 115; SSE2-NEXT: movdqa %xmm5, %xmm1 116; SSE2-NEXT: retq 117; 118; SSSE3-LABEL: sext_32i8_to_32i16: 119; SSSE3: # BB#0: # %entry 120; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3],xmm4[4],xmm0[4],xmm4[5],xmm0[5],xmm4[6],xmm0[6],xmm4[7],xmm0[7] 121; SSSE3-NEXT: psraw $8, %xmm4 122; SSSE3-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm0[8],xmm5[9],xmm0[9],xmm5[10],xmm0[10],xmm5[11],xmm0[11],xmm5[12],xmm0[12],xmm5[13],xmm0[13],xmm5[14],xmm0[14],xmm5[15],xmm0[15] 123; SSSE3-NEXT: psraw $8, %xmm5 124; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 125; SSSE3-NEXT: psraw $8, %xmm2 126; SSSE3-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm1[8],xmm3[9],xmm1[9],xmm3[10],xmm1[10],xmm3[11],xmm1[11],xmm3[12],xmm1[12],xmm3[13],xmm1[13],xmm3[14],xmm1[14],xmm3[15],xmm1[15] 127; SSSE3-NEXT: psraw $8, %xmm3 128; SSSE3-NEXT: movdqa %xmm4, %xmm0 129; SSSE3-NEXT: movdqa %xmm5, %xmm1 130; SSSE3-NEXT: retq 131; 132; SSE41-LABEL: sext_32i8_to_32i16: 133; SSE41: # BB#0: # %entry 134; SSE41-NEXT: pmovsxbw %xmm0, %xmm5 135; SSE41-NEXT: pmovsxbw %xmm1, %xmm2 136; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 137; SSE41-NEXT: pmovsxbw %xmm0, %xmm4 138; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 139; SSE41-NEXT: pmovsxbw %xmm0, %xmm3 140; SSE41-NEXT: movdqa %xmm5, %xmm0 141; SSE41-NEXT: movdqa %xmm4, %xmm1 142; SSE41-NEXT: retq 143; 144; AVX1-LABEL: sext_32i8_to_32i16: 145; AVX1: # BB#0: # %entry 146; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1 147; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 148; AVX1-NEXT: vpmovsxbw %xmm2, %xmm2 149; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 150; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 151; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1 152; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 153; AVX1-NEXT: vpmovsxbw %xmm0, %xmm0 154; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 155; AVX1-NEXT: vmovaps %ymm2, %ymm0 156; AVX1-NEXT: retq 157; 158; AVX2-LABEL: sext_32i8_to_32i16: 159; AVX2: # BB#0: # %entry 160; AVX2-NEXT: vpmovsxbw %xmm0, %ymm2 161; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 162; AVX2-NEXT: vpmovsxbw %xmm0, %ymm1 163; AVX2-NEXT: vmovdqa %ymm2, %ymm0 164; AVX2-NEXT: retq 165; 166; AVX512F-LABEL: sext_32i8_to_32i16: 167; AVX512F: # BB#0: # %entry 168; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm2 169; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm0 170; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm1 171; AVX512F-NEXT: vmovdqa %ymm2, %ymm0 172; AVX512F-NEXT: retq 173; 174; AVX512BW-LABEL: sext_32i8_to_32i16: 175; AVX512BW: # BB#0: # %entry 176; AVX512BW-NEXT: vpmovsxbw %ymm0, %zmm0 177; AVX512BW-NEXT: retq 178; 179; X32-SSE41-LABEL: sext_32i8_to_32i16: 180; X32-SSE41: # BB#0: # %entry 181; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm5 182; X32-SSE41-NEXT: pmovsxbw %xmm1, %xmm2 183; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 184; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm4 185; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 186; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm3 187; X32-SSE41-NEXT: movdqa %xmm5, %xmm0 188; X32-SSE41-NEXT: movdqa %xmm4, %xmm1 189; X32-SSE41-NEXT: retl 190entry: 191 %B = sext <32 x i8> %A to <32 x i16> 192 ret <32 x i16> %B 193} 194 195define <4 x i32> @sext_16i8_to_4i32(<16 x i8> %A) nounwind uwtable readnone ssp { 196; SSE2-LABEL: sext_16i8_to_4i32: 197; SSE2: # BB#0: # %entry 198; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 199; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 200; SSE2-NEXT: psrad $24, %xmm0 201; SSE2-NEXT: retq 202; 203; SSSE3-LABEL: sext_16i8_to_4i32: 204; SSSE3: # BB#0: # %entry 205; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 206; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 207; SSSE3-NEXT: psrad $24, %xmm0 208; SSSE3-NEXT: retq 209; 210; SSE41-LABEL: sext_16i8_to_4i32: 211; SSE41: # BB#0: # %entry 212; SSE41-NEXT: pmovsxbd %xmm0, %xmm0 213; SSE41-NEXT: retq 214; 215; AVX-LABEL: sext_16i8_to_4i32: 216; AVX: # BB#0: # %entry 217; AVX-NEXT: vpmovsxbd %xmm0, %xmm0 218; AVX-NEXT: retq 219; 220; X32-SSE41-LABEL: sext_16i8_to_4i32: 221; X32-SSE41: # BB#0: # %entry 222; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm0 223; X32-SSE41-NEXT: retl 224entry: 225 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 226 %C = sext <4 x i8> %B to <4 x i32> 227 ret <4 x i32> %C 228} 229 230define <8 x i32> @sext_16i8_to_8i32(<16 x i8> %A) nounwind uwtable readnone ssp { 231; SSE2-LABEL: sext_16i8_to_8i32: 232; SSE2: # BB#0: # %entry 233; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 234; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 235; SSE2-NEXT: psrad $24, %xmm2 236; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 237; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 238; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 239; SSE2-NEXT: psrad $24, %xmm1 240; SSE2-NEXT: movdqa %xmm2, %xmm0 241; SSE2-NEXT: retq 242; 243; SSSE3-LABEL: sext_16i8_to_8i32: 244; SSSE3: # BB#0: # %entry 245; SSSE3-NEXT: movdqa %xmm0, %xmm1 246; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 247; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 248; SSSE3-NEXT: psrad $24, %xmm0 249; SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[u,u,u,4,u,u,u,5,u,u,u,6,u,u,u,7] 250; SSSE3-NEXT: psrad $24, %xmm1 251; SSSE3-NEXT: retq 252; 253; SSE41-LABEL: sext_16i8_to_8i32: 254; SSE41: # BB#0: # %entry 255; SSE41-NEXT: pmovsxbd %xmm0, %xmm2 256; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 257; SSE41-NEXT: pmovsxbd %xmm0, %xmm1 258; SSE41-NEXT: movdqa %xmm2, %xmm0 259; SSE41-NEXT: retq 260; 261; AVX1-LABEL: sext_16i8_to_8i32: 262; AVX1: # BB#0: # %entry 263; AVX1-NEXT: vpmovsxbd %xmm0, %xmm1 264; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 265; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 266; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 267; AVX1-NEXT: retq 268; 269; AVX2-LABEL: sext_16i8_to_8i32: 270; AVX2: # BB#0: # %entry 271; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0 272; AVX2-NEXT: retq 273; 274; AVX512-LABEL: sext_16i8_to_8i32: 275; AVX512: # BB#0: # %entry 276; AVX512-NEXT: vpmovsxbd %xmm0, %ymm0 277; AVX512-NEXT: retq 278; 279; X32-SSE41-LABEL: sext_16i8_to_8i32: 280; X32-SSE41: # BB#0: # %entry 281; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm2 282; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 283; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm1 284; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 285; X32-SSE41-NEXT: retl 286entry: 287 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 288 %C = sext <8 x i8> %B to <8 x i32> 289 ret <8 x i32> %C 290} 291 292define <16 x i32> @sext_16i8_to_16i32(<16 x i8> %A) nounwind uwtable readnone ssp { 293; SSE2-LABEL: sext_16i8_to_16i32: 294; SSE2: # BB#0: # %entry 295; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 296; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3] 297; SSE2-NEXT: psrad $24, %xmm4 298; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 299; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 300; SSE2-NEXT: psrad $24, %xmm2 301; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 302; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 303; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 304; SSE2-NEXT: psrad $24, %xmm1 305; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 306; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 307; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3] 308; SSE2-NEXT: psrad $24, %xmm3 309; SSE2-NEXT: movdqa %xmm4, %xmm0 310; SSE2-NEXT: retq 311; 312; SSSE3-LABEL: sext_16i8_to_16i32: 313; SSSE3: # BB#0: # %entry 314; SSSE3-NEXT: movdqa %xmm0, %xmm3 315; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 316; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 317; SSSE3-NEXT: psrad $24, %xmm0 318; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm3[8],xmm1[9],xmm3[9],xmm1[10],xmm3[10],xmm1[11],xmm3[11],xmm1[12],xmm3[12],xmm1[13],xmm3[13],xmm1[14],xmm3[14],xmm1[15],xmm3[15] 319; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 320; SSSE3-NEXT: psrad $24, %xmm2 321; SSSE3-NEXT: movdqa %xmm3, %xmm1 322; SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[u,u,u,4,u,u,u,5,u,u,u,6,u,u,u,7] 323; SSSE3-NEXT: psrad $24, %xmm1 324; SSSE3-NEXT: pshufb {{.*#+}} xmm3 = xmm3[u,u,u,12,u,u,u,13,u,u,u,14,u,u,u,15] 325; SSSE3-NEXT: psrad $24, %xmm3 326; SSSE3-NEXT: retq 327; 328; SSE41-LABEL: sext_16i8_to_16i32: 329; SSE41: # BB#0: # %entry 330; SSE41-NEXT: pmovsxbd %xmm0, %xmm4 331; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 332; SSE41-NEXT: pmovsxbd %xmm1, %xmm1 333; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 334; SSE41-NEXT: pmovsxbd %xmm2, %xmm2 335; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 336; SSE41-NEXT: pmovsxbd %xmm0, %xmm3 337; SSE41-NEXT: movdqa %xmm4, %xmm0 338; SSE41-NEXT: retq 339; 340; AVX1-LABEL: sext_16i8_to_16i32: 341; AVX1: # BB#0: # %entry 342; AVX1-NEXT: vpmovsxbd %xmm0, %xmm1 343; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] 344; AVX1-NEXT: vpmovsxbd %xmm2, %xmm2 345; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 346; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 347; AVX1-NEXT: vpmovsxbd %xmm1, %xmm1 348; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 349; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 350; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 351; AVX1-NEXT: vmovaps %ymm2, %ymm0 352; AVX1-NEXT: retq 353; 354; AVX2-LABEL: sext_16i8_to_16i32: 355; AVX2: # BB#0: # %entry 356; AVX2-NEXT: vpmovsxbd %xmm0, %ymm2 357; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 358; AVX2-NEXT: vpmovsxbd %xmm0, %ymm1 359; AVX2-NEXT: vmovdqa %ymm2, %ymm0 360; AVX2-NEXT: retq 361; 362; AVX512-LABEL: sext_16i8_to_16i32: 363; AVX512: # BB#0: # %entry 364; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0 365; AVX512-NEXT: retq 366; 367; X32-SSE41-LABEL: sext_16i8_to_16i32: 368; X32-SSE41: # BB#0: # %entry 369; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm4 370; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 371; X32-SSE41-NEXT: pmovsxbd %xmm1, %xmm1 372; X32-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 373; X32-SSE41-NEXT: pmovsxbd %xmm2, %xmm2 374; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 375; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm3 376; X32-SSE41-NEXT: movdqa %xmm4, %xmm0 377; X32-SSE41-NEXT: retl 378entry: 379 %B = sext <16 x i8> %A to <16 x i32> 380 ret <16 x i32> %B 381} 382 383define <2 x i64> @sext_16i8_to_2i64(<16 x i8> %A) nounwind uwtable readnone ssp { 384; SSE2-LABEL: sext_16i8_to_2i64: 385; SSE2: # BB#0: # %entry 386; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 387; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 388; SSE2-NEXT: movdqa %xmm0, %xmm1 389; SSE2-NEXT: psrad $31, %xmm1 390; SSE2-NEXT: psrad $24, %xmm0 391; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 392; SSE2-NEXT: retq 393; 394; SSSE3-LABEL: sext_16i8_to_2i64: 395; SSSE3: # BB#0: # %entry 396; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 397; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 398; SSSE3-NEXT: movdqa %xmm0, %xmm1 399; SSSE3-NEXT: psrad $31, %xmm1 400; SSSE3-NEXT: psrad $24, %xmm0 401; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 402; SSSE3-NEXT: retq 403; 404; SSE41-LABEL: sext_16i8_to_2i64: 405; SSE41: # BB#0: # %entry 406; SSE41-NEXT: pmovsxbq %xmm0, %xmm0 407; SSE41-NEXT: retq 408; 409; AVX-LABEL: sext_16i8_to_2i64: 410; AVX: # BB#0: # %entry 411; AVX-NEXT: vpmovsxbq %xmm0, %xmm0 412; AVX-NEXT: retq 413; 414; X32-SSE41-LABEL: sext_16i8_to_2i64: 415; X32-SSE41: # BB#0: # %entry 416; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm0 417; X32-SSE41-NEXT: retl 418entry: 419 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <2 x i32> <i32 0, i32 1> 420 %C = sext <2 x i8> %B to <2 x i64> 421 ret <2 x i64> %C 422} 423 424define <4 x i64> @sext_16i8_to_4i64(<16 x i8> %A) nounwind uwtable readnone ssp { 425; SSE2-LABEL: sext_16i8_to_4i64: 426; SSE2: # BB#0: # %entry 427; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 428; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 429; SSE2-NEXT: movdqa %xmm2, %xmm1 430; SSE2-NEXT: psrad $31, %xmm1 431; SSE2-NEXT: psrad $24, %xmm2 432; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 433; SSE2-NEXT: psrld $16, %xmm0 434; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 435; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 436; SSE2-NEXT: movdqa %xmm1, %xmm0 437; SSE2-NEXT: psrad $31, %xmm0 438; SSE2-NEXT: psrad $24, %xmm1 439; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 440; SSE2-NEXT: movdqa %xmm2, %xmm0 441; SSE2-NEXT: retq 442; 443; SSSE3-LABEL: sext_16i8_to_4i64: 444; SSSE3: # BB#0: # %entry 445; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 446; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 447; SSSE3-NEXT: movdqa %xmm2, %xmm1 448; SSSE3-NEXT: psrad $31, %xmm1 449; SSSE3-NEXT: psrad $24, %xmm2 450; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 451; SSSE3-NEXT: psrld $16, %xmm0 452; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 453; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 454; SSSE3-NEXT: movdqa %xmm1, %xmm0 455; SSSE3-NEXT: psrad $31, %xmm0 456; SSSE3-NEXT: psrad $24, %xmm1 457; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 458; SSSE3-NEXT: movdqa %xmm2, %xmm0 459; SSSE3-NEXT: retq 460; 461; SSE41-LABEL: sext_16i8_to_4i64: 462; SSE41: # BB#0: # %entry 463; SSE41-NEXT: pmovsxbq %xmm0, %xmm2 464; SSE41-NEXT: psrld $16, %xmm0 465; SSE41-NEXT: pmovsxbq %xmm0, %xmm1 466; SSE41-NEXT: movdqa %xmm2, %xmm0 467; SSE41-NEXT: retq 468; 469; AVX1-LABEL: sext_16i8_to_4i64: 470; AVX1: # BB#0: # %entry 471; AVX1-NEXT: vpmovsxbq %xmm0, %xmm1 472; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 473; AVX1-NEXT: vpmovsxbq %xmm0, %xmm0 474; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 475; AVX1-NEXT: retq 476; 477; AVX2-LABEL: sext_16i8_to_4i64: 478; AVX2: # BB#0: # %entry 479; AVX2-NEXT: vpmovsxbq %xmm0, %ymm0 480; AVX2-NEXT: retq 481; 482; AVX512-LABEL: sext_16i8_to_4i64: 483; AVX512: # BB#0: # %entry 484; AVX512-NEXT: vpmovsxbq %xmm0, %ymm0 485; AVX512-NEXT: retq 486; 487; X32-SSE41-LABEL: sext_16i8_to_4i64: 488; X32-SSE41: # BB#0: # %entry 489; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm2 490; X32-SSE41-NEXT: psrld $16, %xmm0 491; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm1 492; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 493; X32-SSE41-NEXT: retl 494entry: 495 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 496 %C = sext <4 x i8> %B to <4 x i64> 497 ret <4 x i64> %C 498} 499 500define <8 x i64> @sext_16i8_to_8i64(<16 x i8> %A) nounwind uwtable readnone ssp { 501; SSE2-LABEL: sext_16i8_to_8i64: 502; SSE2: # BB#0: # %entry 503; SSE2-NEXT: movdqa %xmm0, %xmm1 504; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 505; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 506; SSE2-NEXT: movdqa %xmm0, %xmm2 507; SSE2-NEXT: psrad $31, %xmm2 508; SSE2-NEXT: psrad $24, %xmm0 509; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 510; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,2,3] 511; SSE2-NEXT: psrld $16, %xmm1 512; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 513; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 514; SSE2-NEXT: movdqa %xmm1, %xmm2 515; SSE2-NEXT: psrad $31, %xmm2 516; SSE2-NEXT: psrad $24, %xmm1 517; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 518; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7] 519; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3] 520; SSE2-NEXT: movdqa %xmm2, %xmm4 521; SSE2-NEXT: psrad $31, %xmm4 522; SSE2-NEXT: psrad $24, %xmm2 523; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 524; SSE2-NEXT: psrld $16, %xmm3 525; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 526; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3] 527; SSE2-NEXT: movdqa %xmm3, %xmm4 528; SSE2-NEXT: psrad $31, %xmm4 529; SSE2-NEXT: psrad $24, %xmm3 530; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 531; SSE2-NEXT: retq 532; 533; SSSE3-LABEL: sext_16i8_to_8i64: 534; SSSE3: # BB#0: # %entry 535; SSSE3-NEXT: movdqa %xmm0, %xmm1 536; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 537; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 538; SSSE3-NEXT: movdqa %xmm0, %xmm2 539; SSSE3-NEXT: psrad $31, %xmm2 540; SSSE3-NEXT: psrad $24, %xmm0 541; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 542; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,2,3] 543; SSSE3-NEXT: psrld $16, %xmm1 544; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 545; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 546; SSSE3-NEXT: movdqa %xmm1, %xmm2 547; SSSE3-NEXT: psrad $31, %xmm2 548; SSSE3-NEXT: psrad $24, %xmm1 549; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 550; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7] 551; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3] 552; SSSE3-NEXT: movdqa %xmm2, %xmm4 553; SSSE3-NEXT: psrad $31, %xmm4 554; SSSE3-NEXT: psrad $24, %xmm2 555; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 556; SSSE3-NEXT: psrld $16, %xmm3 557; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 558; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3] 559; SSSE3-NEXT: movdqa %xmm3, %xmm4 560; SSSE3-NEXT: psrad $31, %xmm4 561; SSSE3-NEXT: psrad $24, %xmm3 562; SSSE3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 563; SSSE3-NEXT: retq 564; 565; SSE41-LABEL: sext_16i8_to_8i64: 566; SSE41: # BB#0: # %entry 567; SSE41-NEXT: pmovsxbq %xmm0, %xmm4 568; SSE41-NEXT: movdqa %xmm0, %xmm1 569; SSE41-NEXT: psrld $16, %xmm1 570; SSE41-NEXT: pmovsxbq %xmm1, %xmm1 571; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] 572; SSE41-NEXT: pmovsxbq %xmm2, %xmm2 573; SSE41-NEXT: psrlq $48, %xmm0 574; SSE41-NEXT: pmovsxbq %xmm0, %xmm3 575; SSE41-NEXT: movdqa %xmm4, %xmm0 576; SSE41-NEXT: retq 577; 578; AVX1-LABEL: sext_16i8_to_8i64: 579; AVX1: # BB#0: # %entry 580; AVX1-NEXT: vpmovsxbq %xmm0, %xmm1 581; AVX1-NEXT: vpsrld $16, %xmm0, %xmm2 582; AVX1-NEXT: vpmovsxbq %xmm2, %xmm2 583; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 584; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 585; AVX1-NEXT: vpmovsxbq %xmm1, %xmm1 586; AVX1-NEXT: vpsrlq $48, %xmm0, %xmm0 587; AVX1-NEXT: vpmovsxbq %xmm0, %xmm0 588; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 589; AVX1-NEXT: vmovaps %ymm2, %ymm0 590; AVX1-NEXT: retq 591; 592; AVX2-LABEL: sext_16i8_to_8i64: 593; AVX2: # BB#0: # %entry 594; AVX2-NEXT: vpmovsxbq %xmm0, %ymm2 595; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 596; AVX2-NEXT: vpmovsxbq %xmm0, %ymm1 597; AVX2-NEXT: vmovdqa %ymm2, %ymm0 598; AVX2-NEXT: retq 599; 600; AVX512-LABEL: sext_16i8_to_8i64: 601; AVX512: # BB#0: # %entry 602; AVX512-NEXT: vpmovzxbq {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,zero,zero,zero,zero,xmm0[1],zero,zero,zero,zero,zero,zero,zero,xmm0[2],zero,zero,zero,zero,zero,zero,zero,xmm0[3],zero,zero,zero,zero,zero,zero,zero,xmm0[4],zero,zero,zero,zero,zero,zero,zero,xmm0[5],zero,zero,zero,zero,zero,zero,zero,xmm0[6],zero,zero,zero,zero,zero,zero,zero,xmm0[7],zero,zero,zero,zero,zero,zero,zero 603; AVX512-NEXT: vpsllq $56, %zmm0, %zmm0 604; AVX512-NEXT: vpsraq $56, %zmm0, %zmm0 605; AVX512-NEXT: retq 606; 607; X32-SSE41-LABEL: sext_16i8_to_8i64: 608; X32-SSE41: # BB#0: # %entry 609; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm4 610; X32-SSE41-NEXT: movdqa %xmm0, %xmm1 611; X32-SSE41-NEXT: psrld $16, %xmm1 612; X32-SSE41-NEXT: pmovsxbq %xmm1, %xmm1 613; X32-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] 614; X32-SSE41-NEXT: pmovsxbq %xmm2, %xmm2 615; X32-SSE41-NEXT: psrlq $48, %xmm0 616; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm3 617; X32-SSE41-NEXT: movdqa %xmm4, %xmm0 618; X32-SSE41-NEXT: retl 619entry: 620 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 621 %C = sext <8 x i8> %B to <8 x i64> 622 ret <8 x i64> %C 623} 624 625define <4 x i32> @sext_8i16_to_4i32(<8 x i16> %A) nounwind uwtable readnone ssp { 626; SSE2-LABEL: sext_8i16_to_4i32: 627; SSE2: # BB#0: # %entry 628; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 629; SSE2-NEXT: psrad $16, %xmm0 630; SSE2-NEXT: retq 631; 632; SSSE3-LABEL: sext_8i16_to_4i32: 633; SSSE3: # BB#0: # %entry 634; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 635; SSSE3-NEXT: psrad $16, %xmm0 636; SSSE3-NEXT: retq 637; 638; SSE41-LABEL: sext_8i16_to_4i32: 639; SSE41: # BB#0: # %entry 640; SSE41-NEXT: pmovsxwd %xmm0, %xmm0 641; SSE41-NEXT: retq 642; 643; AVX-LABEL: sext_8i16_to_4i32: 644; AVX: # BB#0: # %entry 645; AVX-NEXT: vpmovsxwd %xmm0, %xmm0 646; AVX-NEXT: retq 647; 648; X32-SSE41-LABEL: sext_8i16_to_4i32: 649; X32-SSE41: # BB#0: # %entry 650; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm0 651; X32-SSE41-NEXT: retl 652entry: 653 %B = shufflevector <8 x i16> %A, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 654 %C = sext <4 x i16> %B to <4 x i32> 655 ret <4 x i32> %C 656} 657 658define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp { 659; SSE2-LABEL: sext_8i16_to_8i32: 660; SSE2: # BB#0: # %entry 661; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 662; SSE2-NEXT: psrad $16, %xmm2 663; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 664; SSE2-NEXT: psrad $16, %xmm1 665; SSE2-NEXT: movdqa %xmm2, %xmm0 666; SSE2-NEXT: retq 667; 668; SSSE3-LABEL: sext_8i16_to_8i32: 669; SSSE3: # BB#0: # %entry 670; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 671; SSSE3-NEXT: psrad $16, %xmm2 672; SSSE3-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 673; SSSE3-NEXT: psrad $16, %xmm1 674; SSSE3-NEXT: movdqa %xmm2, %xmm0 675; SSSE3-NEXT: retq 676; 677; SSE41-LABEL: sext_8i16_to_8i32: 678; SSE41: # BB#0: # %entry 679; SSE41-NEXT: pmovsxwd %xmm0, %xmm2 680; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 681; SSE41-NEXT: pmovsxwd %xmm0, %xmm1 682; SSE41-NEXT: movdqa %xmm2, %xmm0 683; SSE41-NEXT: retq 684; 685; AVX1-LABEL: sext_8i16_to_8i32: 686; AVX1: # BB#0: # %entry 687; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 688; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 689; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 690; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 691; AVX1-NEXT: retq 692; 693; AVX2-LABEL: sext_8i16_to_8i32: 694; AVX2: # BB#0: # %entry 695; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 696; AVX2-NEXT: retq 697; 698; AVX512-LABEL: sext_8i16_to_8i32: 699; AVX512: # BB#0: # %entry 700; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0 701; AVX512-NEXT: retq 702; 703; X32-SSE41-LABEL: sext_8i16_to_8i32: 704; X32-SSE41: # BB#0: # %entry 705; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm2 706; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 707; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm1 708; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 709; X32-SSE41-NEXT: retl 710entry: 711 %B = sext <8 x i16> %A to <8 x i32> 712 ret <8 x i32> %B 713} 714 715define <16 x i32> @sext_16i16_to_16i32(<16 x i16> %A) nounwind uwtable readnone ssp { 716; SSE2-LABEL: sext_16i16_to_16i32: 717; SSE2: # BB#0: # %entry 718; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] 719; SSE2-NEXT: psrad $16, %xmm4 720; SSE2-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7] 721; SSE2-NEXT: psrad $16, %xmm5 722; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 723; SSE2-NEXT: psrad $16, %xmm2 724; SSE2-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 725; SSE2-NEXT: psrad $16, %xmm3 726; SSE2-NEXT: movdqa %xmm4, %xmm0 727; SSE2-NEXT: movdqa %xmm5, %xmm1 728; SSE2-NEXT: retq 729; 730; SSSE3-LABEL: sext_16i16_to_16i32: 731; SSSE3: # BB#0: # %entry 732; SSSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] 733; SSSE3-NEXT: psrad $16, %xmm4 734; SSSE3-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7] 735; SSSE3-NEXT: psrad $16, %xmm5 736; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 737; SSSE3-NEXT: psrad $16, %xmm2 738; SSSE3-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 739; SSSE3-NEXT: psrad $16, %xmm3 740; SSSE3-NEXT: movdqa %xmm4, %xmm0 741; SSSE3-NEXT: movdqa %xmm5, %xmm1 742; SSSE3-NEXT: retq 743; 744; SSE41-LABEL: sext_16i16_to_16i32: 745; SSE41: # BB#0: # %entry 746; SSE41-NEXT: pmovsxwd %xmm0, %xmm5 747; SSE41-NEXT: pmovsxwd %xmm1, %xmm2 748; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 749; SSE41-NEXT: pmovsxwd %xmm0, %xmm4 750; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 751; SSE41-NEXT: pmovsxwd %xmm0, %xmm3 752; SSE41-NEXT: movdqa %xmm5, %xmm0 753; SSE41-NEXT: movdqa %xmm4, %xmm1 754; SSE41-NEXT: retq 755; 756; AVX1-LABEL: sext_16i16_to_16i32: 757; AVX1: # BB#0: # %entry 758; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 759; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 760; AVX1-NEXT: vpmovsxwd %xmm2, %xmm2 761; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 762; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 763; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 764; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 765; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 766; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 767; AVX1-NEXT: vmovaps %ymm2, %ymm0 768; AVX1-NEXT: retq 769; 770; AVX2-LABEL: sext_16i16_to_16i32: 771; AVX2: # BB#0: # %entry 772; AVX2-NEXT: vpmovsxwd %xmm0, %ymm2 773; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 774; AVX2-NEXT: vpmovsxwd %xmm0, %ymm1 775; AVX2-NEXT: vmovdqa %ymm2, %ymm0 776; AVX2-NEXT: retq 777; 778; AVX512-LABEL: sext_16i16_to_16i32: 779; AVX512: # BB#0: # %entry 780; AVX512-NEXT: vpmovsxwd %ymm0, %zmm0 781; AVX512-NEXT: retq 782; 783; X32-SSE41-LABEL: sext_16i16_to_16i32: 784; X32-SSE41: # BB#0: # %entry 785; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm5 786; X32-SSE41-NEXT: pmovsxwd %xmm1, %xmm2 787; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 788; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm4 789; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 790; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm3 791; X32-SSE41-NEXT: movdqa %xmm5, %xmm0 792; X32-SSE41-NEXT: movdqa %xmm4, %xmm1 793; X32-SSE41-NEXT: retl 794entry: 795 %B = sext <16 x i16> %A to <16 x i32> 796 ret <16 x i32> %B 797} 798 799define <2 x i64> @sext_8i16_to_2i64(<8 x i16> %A) nounwind uwtable readnone ssp { 800; SSE2-LABEL: sext_8i16_to_2i64: 801; SSE2: # BB#0: # %entry 802; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 803; SSE2-NEXT: movdqa %xmm0, %xmm1 804; SSE2-NEXT: psrad $31, %xmm1 805; SSE2-NEXT: psrad $16, %xmm0 806; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 807; SSE2-NEXT: retq 808; 809; SSSE3-LABEL: sext_8i16_to_2i64: 810; SSSE3: # BB#0: # %entry 811; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 812; SSSE3-NEXT: movdqa %xmm0, %xmm1 813; SSSE3-NEXT: psrad $31, %xmm1 814; SSSE3-NEXT: psrad $16, %xmm0 815; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 816; SSSE3-NEXT: retq 817; 818; SSE41-LABEL: sext_8i16_to_2i64: 819; SSE41: # BB#0: # %entry 820; SSE41-NEXT: pmovsxwq %xmm0, %xmm0 821; SSE41-NEXT: retq 822; 823; AVX-LABEL: sext_8i16_to_2i64: 824; AVX: # BB#0: # %entry 825; AVX-NEXT: vpmovsxwq %xmm0, %xmm0 826; AVX-NEXT: retq 827; 828; X32-SSE41-LABEL: sext_8i16_to_2i64: 829; X32-SSE41: # BB#0: # %entry 830; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm0 831; X32-SSE41-NEXT: retl 832entry: 833 %B = shufflevector <8 x i16> %A, <8 x i16> undef, <2 x i32> <i32 0, i32 1> 834 %C = sext <2 x i16> %B to <2 x i64> 835 ret <2 x i64> %C 836} 837 838define <4 x i64> @sext_8i16_to_4i64(<8 x i16> %A) nounwind uwtable readnone ssp { 839; SSE2-LABEL: sext_8i16_to_4i64: 840; SSE2: # BB#0: # %entry 841; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 842; SSE2-NEXT: movdqa %xmm2, %xmm1 843; SSE2-NEXT: psrad $31, %xmm1 844; SSE2-NEXT: psrad $16, %xmm2 845; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 846; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 847; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 848; SSE2-NEXT: movdqa %xmm1, %xmm0 849; SSE2-NEXT: psrad $31, %xmm0 850; SSE2-NEXT: psrad $16, %xmm1 851; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 852; SSE2-NEXT: movdqa %xmm2, %xmm0 853; SSE2-NEXT: retq 854; 855; SSSE3-LABEL: sext_8i16_to_4i64: 856; SSSE3: # BB#0: # %entry 857; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 858; SSSE3-NEXT: movdqa %xmm2, %xmm1 859; SSSE3-NEXT: psrad $31, %xmm1 860; SSSE3-NEXT: psrad $16, %xmm2 861; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 862; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 863; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 864; SSSE3-NEXT: movdqa %xmm1, %xmm0 865; SSSE3-NEXT: psrad $31, %xmm0 866; SSSE3-NEXT: psrad $16, %xmm1 867; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 868; SSSE3-NEXT: movdqa %xmm2, %xmm0 869; SSSE3-NEXT: retq 870; 871; SSE41-LABEL: sext_8i16_to_4i64: 872; SSE41: # BB#0: # %entry 873; SSE41-NEXT: pmovsxwq %xmm0, %xmm2 874; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 875; SSE41-NEXT: pmovsxwq %xmm0, %xmm1 876; SSE41-NEXT: movdqa %xmm2, %xmm0 877; SSE41-NEXT: retq 878; 879; AVX1-LABEL: sext_8i16_to_4i64: 880; AVX1: # BB#0: # %entry 881; AVX1-NEXT: vpmovsxwq %xmm0, %xmm1 882; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 883; AVX1-NEXT: vpmovsxwq %xmm0, %xmm0 884; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 885; AVX1-NEXT: retq 886; 887; AVX2-LABEL: sext_8i16_to_4i64: 888; AVX2: # BB#0: # %entry 889; AVX2-NEXT: vpmovsxwq %xmm0, %ymm0 890; AVX2-NEXT: retq 891; 892; AVX512-LABEL: sext_8i16_to_4i64: 893; AVX512: # BB#0: # %entry 894; AVX512-NEXT: vpmovsxwq %xmm0, %ymm0 895; AVX512-NEXT: retq 896; 897; X32-SSE41-LABEL: sext_8i16_to_4i64: 898; X32-SSE41: # BB#0: # %entry 899; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm2 900; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 901; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm1 902; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 903; X32-SSE41-NEXT: retl 904entry: 905 %B = shufflevector <8 x i16> %A, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 906 %C = sext <4 x i16> %B to <4 x i64> 907 ret <4 x i64> %C 908} 909 910define <8 x i64> @sext_8i16_to_8i64(<8 x i16> %A) nounwind uwtable readnone ssp { 911; SSE2-LABEL: sext_8i16_to_8i64: 912; SSE2: # BB#0: # %entry 913; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] 914; SSE2-NEXT: movdqa %xmm4, %xmm1 915; SSE2-NEXT: psrad $31, %xmm1 916; SSE2-NEXT: psrad $16, %xmm4 917; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 918; SSE2-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 919; SSE2-NEXT: movdqa %xmm2, %xmm1 920; SSE2-NEXT: psrad $31, %xmm1 921; SSE2-NEXT: psrad $16, %xmm2 922; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 923; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 924; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 925; SSE2-NEXT: movdqa %xmm1, %xmm3 926; SSE2-NEXT: psrad $31, %xmm3 927; SSE2-NEXT: psrad $16, %xmm1 928; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 929; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 930; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3] 931; SSE2-NEXT: movdqa %xmm3, %xmm0 932; SSE2-NEXT: psrad $31, %xmm0 933; SSE2-NEXT: psrad $16, %xmm3 934; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1] 935; SSE2-NEXT: movdqa %xmm4, %xmm0 936; SSE2-NEXT: retq 937; 938; SSSE3-LABEL: sext_8i16_to_8i64: 939; SSSE3: # BB#0: # %entry 940; SSSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] 941; SSSE3-NEXT: movdqa %xmm4, %xmm1 942; SSSE3-NEXT: psrad $31, %xmm1 943; SSSE3-NEXT: psrad $16, %xmm4 944; SSSE3-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 945; SSSE3-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 946; SSSE3-NEXT: movdqa %xmm2, %xmm1 947; SSSE3-NEXT: psrad $31, %xmm1 948; SSSE3-NEXT: psrad $16, %xmm2 949; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 950; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 951; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 952; SSSE3-NEXT: movdqa %xmm1, %xmm3 953; SSSE3-NEXT: psrad $31, %xmm3 954; SSSE3-NEXT: psrad $16, %xmm1 955; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 956; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 957; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3] 958; SSSE3-NEXT: movdqa %xmm3, %xmm0 959; SSSE3-NEXT: psrad $31, %xmm0 960; SSSE3-NEXT: psrad $16, %xmm3 961; SSSE3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1] 962; SSSE3-NEXT: movdqa %xmm4, %xmm0 963; SSSE3-NEXT: retq 964; 965; SSE41-LABEL: sext_8i16_to_8i64: 966; SSE41: # BB#0: # %entry 967; SSE41-NEXT: pmovsxwq %xmm0, %xmm4 968; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 969; SSE41-NEXT: pmovsxwq %xmm1, %xmm1 970; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 971; SSE41-NEXT: pmovsxwq %xmm2, %xmm2 972; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 973; SSE41-NEXT: pmovsxwq %xmm0, %xmm3 974; SSE41-NEXT: movdqa %xmm4, %xmm0 975; SSE41-NEXT: retq 976; 977; AVX1-LABEL: sext_8i16_to_8i64: 978; AVX1: # BB#0: # %entry 979; AVX1-NEXT: vpmovsxwq %xmm0, %xmm1 980; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] 981; AVX1-NEXT: vpmovsxwq %xmm2, %xmm2 982; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 983; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 984; AVX1-NEXT: vpmovsxwq %xmm1, %xmm1 985; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 986; AVX1-NEXT: vpmovsxwq %xmm0, %xmm0 987; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 988; AVX1-NEXT: vmovaps %ymm2, %ymm0 989; AVX1-NEXT: retq 990; 991; AVX2-LABEL: sext_8i16_to_8i64: 992; AVX2: # BB#0: # %entry 993; AVX2-NEXT: vpmovsxwq %xmm0, %ymm2 994; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 995; AVX2-NEXT: vpmovsxwq %xmm0, %ymm1 996; AVX2-NEXT: vmovdqa %ymm2, %ymm0 997; AVX2-NEXT: retq 998; 999; AVX512-LABEL: sext_8i16_to_8i64: 1000; AVX512: # BB#0: # %entry 1001; AVX512-NEXT: vpmovsxwq %xmm0, %zmm0 1002; AVX512-NEXT: retq 1003; 1004; X32-SSE41-LABEL: sext_8i16_to_8i64: 1005; X32-SSE41: # BB#0: # %entry 1006; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm4 1007; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 1008; X32-SSE41-NEXT: pmovsxwq %xmm1, %xmm1 1009; X32-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 1010; X32-SSE41-NEXT: pmovsxwq %xmm2, %xmm2 1011; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 1012; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm3 1013; X32-SSE41-NEXT: movdqa %xmm4, %xmm0 1014; X32-SSE41-NEXT: retl 1015entry: 1016 %B = sext <8 x i16> %A to <8 x i64> 1017 ret <8 x i64> %B 1018} 1019 1020define <2 x i64> @sext_4i32_to_2i64(<4 x i32> %A) nounwind uwtable readnone ssp { 1021; SSE2-LABEL: sext_4i32_to_2i64: 1022; SSE2: # BB#0: # %entry 1023; SSE2-NEXT: movdqa %xmm0, %xmm1 1024; SSE2-NEXT: psrad $31, %xmm1 1025; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1026; SSE2-NEXT: retq 1027; 1028; SSSE3-LABEL: sext_4i32_to_2i64: 1029; SSSE3: # BB#0: # %entry 1030; SSSE3-NEXT: movdqa %xmm0, %xmm1 1031; SSSE3-NEXT: psrad $31, %xmm1 1032; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1033; SSSE3-NEXT: retq 1034; 1035; SSE41-LABEL: sext_4i32_to_2i64: 1036; SSE41: # BB#0: # %entry 1037; SSE41-NEXT: pmovsxdq %xmm0, %xmm0 1038; SSE41-NEXT: retq 1039; 1040; AVX-LABEL: sext_4i32_to_2i64: 1041; AVX: # BB#0: # %entry 1042; AVX-NEXT: vpmovsxdq %xmm0, %xmm0 1043; AVX-NEXT: retq 1044; 1045; X32-SSE41-LABEL: sext_4i32_to_2i64: 1046; X32-SSE41: # BB#0: # %entry 1047; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm0 1048; X32-SSE41-NEXT: retl 1049entry: 1050 %B = shufflevector <4 x i32> %A, <4 x i32> undef, <2 x i32> <i32 0, i32 1> 1051 %C = sext <2 x i32> %B to <2 x i64> 1052 ret <2 x i64> %C 1053} 1054 1055define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp { 1056; SSE2-LABEL: sext_4i32_to_4i64: 1057; SSE2: # BB#0: # %entry 1058; SSE2-NEXT: movdqa %xmm0, %xmm2 1059; SSE2-NEXT: psrad $31, %xmm2 1060; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1061; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1062; SSE2-NEXT: movdqa %xmm1, %xmm2 1063; SSE2-NEXT: psrad $31, %xmm2 1064; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1065; SSE2-NEXT: retq 1066; 1067; SSSE3-LABEL: sext_4i32_to_4i64: 1068; SSSE3: # BB#0: # %entry 1069; SSSE3-NEXT: movdqa %xmm0, %xmm2 1070; SSSE3-NEXT: psrad $31, %xmm2 1071; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1072; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1073; SSSE3-NEXT: movdqa %xmm1, %xmm2 1074; SSSE3-NEXT: psrad $31, %xmm2 1075; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1076; SSSE3-NEXT: retq 1077; 1078; SSE41-LABEL: sext_4i32_to_4i64: 1079; SSE41: # BB#0: # %entry 1080; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 1081; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1082; SSE41-NEXT: pmovsxdq %xmm0, %xmm1 1083; SSE41-NEXT: movdqa %xmm2, %xmm0 1084; SSE41-NEXT: retq 1085; 1086; AVX1-LABEL: sext_4i32_to_4i64: 1087; AVX1: # BB#0: # %entry 1088; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1089; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1090; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1091; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1092; AVX1-NEXT: retq 1093; 1094; AVX2-LABEL: sext_4i32_to_4i64: 1095; AVX2: # BB#0: # %entry 1096; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 1097; AVX2-NEXT: retq 1098; 1099; AVX512-LABEL: sext_4i32_to_4i64: 1100; AVX512: # BB#0: # %entry 1101; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 1102; AVX512-NEXT: retq 1103; 1104; X32-SSE41-LABEL: sext_4i32_to_4i64: 1105; X32-SSE41: # BB#0: # %entry 1106; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 1107; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1108; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm1 1109; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 1110; X32-SSE41-NEXT: retl 1111entry: 1112 %B = sext <4 x i32> %A to <4 x i64> 1113 ret <4 x i64> %B 1114} 1115 1116define <8 x i64> @sext_8i32_to_8i64(<8 x i32> %A) nounwind uwtable readnone ssp { 1117; SSE2-LABEL: sext_8i32_to_8i64: 1118; SSE2: # BB#0: # %entry 1119; SSE2-NEXT: movdqa %xmm1, %xmm2 1120; SSE2-NEXT: movdqa %xmm0, %xmm3 1121; SSE2-NEXT: psrad $31, %xmm3 1122; SSE2-NEXT: movdqa %xmm2, %xmm4 1123; SSE2-NEXT: psrad $31, %xmm4 1124; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1125; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 1126; SSE2-NEXT: movdqa %xmm1, %xmm3 1127; SSE2-NEXT: psrad $31, %xmm3 1128; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 1129; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[2,3,0,1] 1130; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 1131; SSE2-NEXT: movdqa %xmm3, %xmm4 1132; SSE2-NEXT: psrad $31, %xmm4 1133; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 1134; SSE2-NEXT: retq 1135; 1136; SSSE3-LABEL: sext_8i32_to_8i64: 1137; SSSE3: # BB#0: # %entry 1138; SSSE3-NEXT: movdqa %xmm1, %xmm2 1139; SSSE3-NEXT: movdqa %xmm0, %xmm3 1140; SSSE3-NEXT: psrad $31, %xmm3 1141; SSSE3-NEXT: movdqa %xmm2, %xmm4 1142; SSSE3-NEXT: psrad $31, %xmm4 1143; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1144; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 1145; SSSE3-NEXT: movdqa %xmm1, %xmm3 1146; SSSE3-NEXT: psrad $31, %xmm3 1147; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 1148; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm2[2,3,0,1] 1149; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 1150; SSSE3-NEXT: movdqa %xmm3, %xmm4 1151; SSSE3-NEXT: psrad $31, %xmm4 1152; SSSE3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 1153; SSSE3-NEXT: retq 1154; 1155; SSE41-LABEL: sext_8i32_to_8i64: 1156; SSE41: # BB#0: # %entry 1157; SSE41-NEXT: pmovsxdq %xmm0, %xmm5 1158; SSE41-NEXT: pmovsxdq %xmm1, %xmm2 1159; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1160; SSE41-NEXT: pmovsxdq %xmm0, %xmm4 1161; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 1162; SSE41-NEXT: pmovsxdq %xmm0, %xmm3 1163; SSE41-NEXT: movdqa %xmm5, %xmm0 1164; SSE41-NEXT: movdqa %xmm4, %xmm1 1165; SSE41-NEXT: retq 1166; 1167; AVX1-LABEL: sext_8i32_to_8i64: 1168; AVX1: # BB#0: # %entry 1169; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1170; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 1171; AVX1-NEXT: vpmovsxdq %xmm2, %xmm2 1172; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 1173; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1174; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1175; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1176; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1177; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 1178; AVX1-NEXT: vmovaps %ymm2, %ymm0 1179; AVX1-NEXT: retq 1180; 1181; AVX2-LABEL: sext_8i32_to_8i64: 1182; AVX2: # BB#0: # %entry 1183; AVX2-NEXT: vpmovsxdq %xmm0, %ymm2 1184; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 1185; AVX2-NEXT: vpmovsxdq %xmm0, %ymm1 1186; AVX2-NEXT: vmovdqa %ymm2, %ymm0 1187; AVX2-NEXT: retq 1188; 1189; AVX512-LABEL: sext_8i32_to_8i64: 1190; AVX512: # BB#0: # %entry 1191; AVX512-NEXT: vpmovsxdq %ymm0, %zmm0 1192; AVX512-NEXT: retq 1193; 1194; X32-SSE41-LABEL: sext_8i32_to_8i64: 1195; X32-SSE41: # BB#0: # %entry 1196; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm5 1197; X32-SSE41-NEXT: pmovsxdq %xmm1, %xmm2 1198; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1199; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm4 1200; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 1201; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm3 1202; X32-SSE41-NEXT: movdqa %xmm5, %xmm0 1203; X32-SSE41-NEXT: movdqa %xmm4, %xmm1 1204; X32-SSE41-NEXT: retl 1205entry: 1206 %B = sext <8 x i32> %A to <8 x i64> 1207 ret <8 x i64> %B 1208} 1209 1210define <2 x i64> @load_sext_2i1_to_2i64(<2 x i1> *%ptr) { 1211; SSE-LABEL: load_sext_2i1_to_2i64: 1212; SSE: # BB#0: # %entry 1213; SSE-NEXT: movzbl (%rdi), %eax 1214; SSE-NEXT: movq %rax, %rcx 1215; SSE-NEXT: shlq $62, %rcx 1216; SSE-NEXT: sarq $63, %rcx 1217; SSE-NEXT: movd %rcx, %xmm1 1218; SSE-NEXT: shlq $63, %rax 1219; SSE-NEXT: sarq $63, %rax 1220; SSE-NEXT: movd %rax, %xmm0 1221; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1222; SSE-NEXT: retq 1223; 1224; AVX1-LABEL: load_sext_2i1_to_2i64: 1225; AVX1: # BB#0: # %entry 1226; AVX1-NEXT: movzbl (%rdi), %eax 1227; AVX1-NEXT: movq %rax, %rcx 1228; AVX1-NEXT: shlq $62, %rcx 1229; AVX1-NEXT: sarq $63, %rcx 1230; AVX1-NEXT: vmovq %rcx, %xmm0 1231; AVX1-NEXT: shlq $63, %rax 1232; AVX1-NEXT: sarq $63, %rax 1233; AVX1-NEXT: vmovq %rax, %xmm1 1234; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1235; AVX1-NEXT: retq 1236; 1237; AVX2-LABEL: load_sext_2i1_to_2i64: 1238; AVX2: # BB#0: # %entry 1239; AVX2-NEXT: movzbl (%rdi), %eax 1240; AVX2-NEXT: movq %rax, %rcx 1241; AVX2-NEXT: shlq $62, %rcx 1242; AVX2-NEXT: sarq $63, %rcx 1243; AVX2-NEXT: vmovq %rcx, %xmm0 1244; AVX2-NEXT: shlq $63, %rax 1245; AVX2-NEXT: sarq $63, %rax 1246; AVX2-NEXT: vmovq %rax, %xmm1 1247; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1248; AVX2-NEXT: retq 1249; 1250; AVX512F-LABEL: load_sext_2i1_to_2i64: 1251; AVX512F: # BB#0: # %entry 1252; AVX512F-NEXT: movzbl (%rdi), %eax 1253; AVX512F-NEXT: kmovw %eax, %k1 1254; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 1255; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 1256; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 1257; AVX512F-NEXT: retq 1258; 1259; AVX512BW-LABEL: load_sext_2i1_to_2i64: 1260; AVX512BW: # BB#0: # %entry 1261; AVX512BW-NEXT: movzbl (%rdi), %eax 1262; AVX512BW-NEXT: kmovd %eax, %k1 1263; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 1264; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 1265; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 1266; AVX512BW-NEXT: retq 1267; 1268; X32-SSE41-LABEL: load_sext_2i1_to_2i64: 1269; X32-SSE41: # BB#0: # %entry 1270; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1271; X32-SSE41-NEXT: movzbl (%eax), %eax 1272; X32-SSE41-NEXT: movl %eax, %ecx 1273; X32-SSE41-NEXT: shll $31, %ecx 1274; X32-SSE41-NEXT: sarl $31, %ecx 1275; X32-SSE41-NEXT: movd %ecx, %xmm0 1276; X32-SSE41-NEXT: pinsrd $1, %ecx, %xmm0 1277; X32-SSE41-NEXT: shll $30, %eax 1278; X32-SSE41-NEXT: sarl $31, %eax 1279; X32-SSE41-NEXT: pinsrd $2, %eax, %xmm0 1280; X32-SSE41-NEXT: pinsrd $3, %eax, %xmm0 1281; X32-SSE41-NEXT: retl 1282entry: 1283 %X = load <2 x i1>, <2 x i1>* %ptr 1284 %Y = sext <2 x i1> %X to <2 x i64> 1285 ret <2 x i64> %Y 1286} 1287 1288define <2 x i64> @load_sext_2i8_to_2i64(<2 x i8> *%ptr) { 1289; SSE2-LABEL: load_sext_2i8_to_2i64: 1290; SSE2: # BB#0: # %entry 1291; SSE2-NEXT: movzwl (%rdi), %eax 1292; SSE2-NEXT: movd %eax, %xmm0 1293; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1294; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1295; SSE2-NEXT: movdqa %xmm0, %xmm1 1296; SSE2-NEXT: psrad $31, %xmm1 1297; SSE2-NEXT: psrad $24, %xmm0 1298; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1299; SSE2-NEXT: retq 1300; 1301; SSSE3-LABEL: load_sext_2i8_to_2i64: 1302; SSSE3: # BB#0: # %entry 1303; SSSE3-NEXT: movzwl (%rdi), %eax 1304; SSSE3-NEXT: movd %eax, %xmm0 1305; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1306; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1307; SSSE3-NEXT: movdqa %xmm0, %xmm1 1308; SSSE3-NEXT: psrad $31, %xmm1 1309; SSSE3-NEXT: psrad $24, %xmm0 1310; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1311; SSSE3-NEXT: retq 1312; 1313; SSE41-LABEL: load_sext_2i8_to_2i64: 1314; SSE41: # BB#0: # %entry 1315; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 1316; SSE41-NEXT: retq 1317; 1318; AVX-LABEL: load_sext_2i8_to_2i64: 1319; AVX: # BB#0: # %entry 1320; AVX-NEXT: vpmovsxbq (%rdi), %xmm0 1321; AVX-NEXT: retq 1322; 1323; X32-SSE41-LABEL: load_sext_2i8_to_2i64: 1324; X32-SSE41: # BB#0: # %entry 1325; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1326; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 1327; X32-SSE41-NEXT: retl 1328entry: 1329 %X = load <2 x i8>, <2 x i8>* %ptr 1330 %Y = sext <2 x i8> %X to <2 x i64> 1331 ret <2 x i64> %Y 1332} 1333 1334define <4 x i32> @load_sext_4i1_to_4i32(<4 x i1> *%ptr) { 1335; SSE2-LABEL: load_sext_4i1_to_4i32: 1336; SSE2: # BB#0: # %entry 1337; SSE2-NEXT: movzbl (%rdi), %eax 1338; SSE2-NEXT: movq %rax, %rcx 1339; SSE2-NEXT: shlq $60, %rcx 1340; SSE2-NEXT: sarq $63, %rcx 1341; SSE2-NEXT: movd %ecx, %xmm0 1342; SSE2-NEXT: movq %rax, %rcx 1343; SSE2-NEXT: shlq $62, %rcx 1344; SSE2-NEXT: sarq $63, %rcx 1345; SSE2-NEXT: movd %ecx, %xmm1 1346; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1347; SSE2-NEXT: movq %rax, %rcx 1348; SSE2-NEXT: shlq $61, %rcx 1349; SSE2-NEXT: sarq $63, %rcx 1350; SSE2-NEXT: movd %ecx, %xmm2 1351; SSE2-NEXT: shlq $63, %rax 1352; SSE2-NEXT: sarq $63, %rax 1353; SSE2-NEXT: movd %eax, %xmm0 1354; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1355; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1356; SSE2-NEXT: retq 1357; 1358; SSSE3-LABEL: load_sext_4i1_to_4i32: 1359; SSSE3: # BB#0: # %entry 1360; SSSE3-NEXT: movzbl (%rdi), %eax 1361; SSSE3-NEXT: movq %rax, %rcx 1362; SSSE3-NEXT: shlq $60, %rcx 1363; SSSE3-NEXT: sarq $63, %rcx 1364; SSSE3-NEXT: movd %ecx, %xmm0 1365; SSSE3-NEXT: movq %rax, %rcx 1366; SSSE3-NEXT: shlq $62, %rcx 1367; SSSE3-NEXT: sarq $63, %rcx 1368; SSSE3-NEXT: movd %ecx, %xmm1 1369; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1370; SSSE3-NEXT: movq %rax, %rcx 1371; SSSE3-NEXT: shlq $61, %rcx 1372; SSSE3-NEXT: sarq $63, %rcx 1373; SSSE3-NEXT: movd %ecx, %xmm2 1374; SSSE3-NEXT: shlq $63, %rax 1375; SSSE3-NEXT: sarq $63, %rax 1376; SSSE3-NEXT: movd %eax, %xmm0 1377; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1378; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1379; SSSE3-NEXT: retq 1380; 1381; SSE41-LABEL: load_sext_4i1_to_4i32: 1382; SSE41: # BB#0: # %entry 1383; SSE41-NEXT: movzbl (%rdi), %eax 1384; SSE41-NEXT: movq %rax, %rcx 1385; SSE41-NEXT: shlq $62, %rcx 1386; SSE41-NEXT: sarq $63, %rcx 1387; SSE41-NEXT: movq %rax, %rdx 1388; SSE41-NEXT: shlq $63, %rdx 1389; SSE41-NEXT: sarq $63, %rdx 1390; SSE41-NEXT: movd %edx, %xmm0 1391; SSE41-NEXT: pinsrd $1, %ecx, %xmm0 1392; SSE41-NEXT: movq %rax, %rcx 1393; SSE41-NEXT: shlq $61, %rcx 1394; SSE41-NEXT: sarq $63, %rcx 1395; SSE41-NEXT: pinsrd $2, %ecx, %xmm0 1396; SSE41-NEXT: shlq $60, %rax 1397; SSE41-NEXT: sarq $63, %rax 1398; SSE41-NEXT: pinsrd $3, %eax, %xmm0 1399; SSE41-NEXT: retq 1400; 1401; AVX1-LABEL: load_sext_4i1_to_4i32: 1402; AVX1: # BB#0: # %entry 1403; AVX1-NEXT: movzbl (%rdi), %eax 1404; AVX1-NEXT: movq %rax, %rcx 1405; AVX1-NEXT: shlq $62, %rcx 1406; AVX1-NEXT: sarq $63, %rcx 1407; AVX1-NEXT: movq %rax, %rdx 1408; AVX1-NEXT: shlq $63, %rdx 1409; AVX1-NEXT: sarq $63, %rdx 1410; AVX1-NEXT: vmovd %edx, %xmm0 1411; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 1412; AVX1-NEXT: movq %rax, %rcx 1413; AVX1-NEXT: shlq $61, %rcx 1414; AVX1-NEXT: sarq $63, %rcx 1415; AVX1-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 1416; AVX1-NEXT: shlq $60, %rax 1417; AVX1-NEXT: sarq $63, %rax 1418; AVX1-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 1419; AVX1-NEXT: retq 1420; 1421; AVX2-LABEL: load_sext_4i1_to_4i32: 1422; AVX2: # BB#0: # %entry 1423; AVX2-NEXT: movzbl (%rdi), %eax 1424; AVX2-NEXT: movq %rax, %rcx 1425; AVX2-NEXT: shlq $62, %rcx 1426; AVX2-NEXT: sarq $63, %rcx 1427; AVX2-NEXT: movq %rax, %rdx 1428; AVX2-NEXT: shlq $63, %rdx 1429; AVX2-NEXT: sarq $63, %rdx 1430; AVX2-NEXT: vmovd %edx, %xmm0 1431; AVX2-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 1432; AVX2-NEXT: movq %rax, %rcx 1433; AVX2-NEXT: shlq $61, %rcx 1434; AVX2-NEXT: sarq $63, %rcx 1435; AVX2-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 1436; AVX2-NEXT: shlq $60, %rax 1437; AVX2-NEXT: sarq $63, %rax 1438; AVX2-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 1439; AVX2-NEXT: retq 1440; 1441; AVX512F-LABEL: load_sext_4i1_to_4i32: 1442; AVX512F: # BB#0: # %entry 1443; AVX512F-NEXT: movzbl (%rdi), %eax 1444; AVX512F-NEXT: kmovw %eax, %k1 1445; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 1446; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 1447; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 1448; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1449; AVX512F-NEXT: retq 1450; 1451; AVX512BW-LABEL: load_sext_4i1_to_4i32: 1452; AVX512BW: # BB#0: # %entry 1453; AVX512BW-NEXT: movzbl (%rdi), %eax 1454; AVX512BW-NEXT: kmovd %eax, %k1 1455; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 1456; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 1457; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 1458; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1459; AVX512BW-NEXT: retq 1460; 1461; X32-SSE41-LABEL: load_sext_4i1_to_4i32: 1462; X32-SSE41: # BB#0: # %entry 1463; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1464; X32-SSE41-NEXT: movl (%eax), %eax 1465; X32-SSE41-NEXT: movl %eax, %ecx 1466; X32-SSE41-NEXT: shll $30, %ecx 1467; X32-SSE41-NEXT: sarl $31, %ecx 1468; X32-SSE41-NEXT: movl %eax, %edx 1469; X32-SSE41-NEXT: shll $31, %edx 1470; X32-SSE41-NEXT: sarl $31, %edx 1471; X32-SSE41-NEXT: movd %edx, %xmm0 1472; X32-SSE41-NEXT: pinsrd $1, %ecx, %xmm0 1473; X32-SSE41-NEXT: movl %eax, %ecx 1474; X32-SSE41-NEXT: shll $29, %ecx 1475; X32-SSE41-NEXT: sarl $31, %ecx 1476; X32-SSE41-NEXT: pinsrd $2, %ecx, %xmm0 1477; X32-SSE41-NEXT: shll $28, %eax 1478; X32-SSE41-NEXT: sarl $31, %eax 1479; X32-SSE41-NEXT: pinsrd $3, %eax, %xmm0 1480; X32-SSE41-NEXT: retl 1481entry: 1482 %X = load <4 x i1>, <4 x i1>* %ptr 1483 %Y = sext <4 x i1> %X to <4 x i32> 1484 ret <4 x i32> %Y 1485} 1486 1487define <4 x i32> @load_sext_4i8_to_4i32(<4 x i8> *%ptr) { 1488; SSE2-LABEL: load_sext_4i8_to_4i32: 1489; SSE2: # BB#0: # %entry 1490; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 1491; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1492; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1493; SSE2-NEXT: psrad $24, %xmm0 1494; SSE2-NEXT: retq 1495; 1496; SSSE3-LABEL: load_sext_4i8_to_4i32: 1497; SSSE3: # BB#0: # %entry 1498; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 1499; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1500; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1501; SSSE3-NEXT: psrad $24, %xmm0 1502; SSSE3-NEXT: retq 1503; 1504; SSE41-LABEL: load_sext_4i8_to_4i32: 1505; SSE41: # BB#0: # %entry 1506; SSE41-NEXT: pmovsxbd (%rdi), %xmm0 1507; SSE41-NEXT: retq 1508; 1509; AVX-LABEL: load_sext_4i8_to_4i32: 1510; AVX: # BB#0: # %entry 1511; AVX-NEXT: vpmovsxbd (%rdi), %xmm0 1512; AVX-NEXT: retq 1513; 1514; X32-SSE41-LABEL: load_sext_4i8_to_4i32: 1515; X32-SSE41: # BB#0: # %entry 1516; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1517; X32-SSE41-NEXT: pmovsxbd (%eax), %xmm0 1518; X32-SSE41-NEXT: retl 1519entry: 1520 %X = load <4 x i8>, <4 x i8>* %ptr 1521 %Y = sext <4 x i8> %X to <4 x i32> 1522 ret <4 x i32> %Y 1523} 1524 1525define <4 x i64> @load_sext_4i1_to_4i64(<4 x i1> *%ptr) { 1526; SSE2-LABEL: load_sext_4i1_to_4i64: 1527; SSE2: # BB#0: # %entry 1528; SSE2-NEXT: movl (%rdi), %eax 1529; SSE2-NEXT: movl %eax, %ecx 1530; SSE2-NEXT: shrl $3, %ecx 1531; SSE2-NEXT: movd %ecx, %xmm0 1532; SSE2-NEXT: movl %eax, %ecx 1533; SSE2-NEXT: shrl %ecx 1534; SSE2-NEXT: movd %ecx, %xmm1 1535; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1536; SSE2-NEXT: movd %eax, %xmm2 1537; SSE2-NEXT: shrl $2, %eax 1538; SSE2-NEXT: movd %eax, %xmm0 1539; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 1540; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 1541; SSE2-NEXT: pand {{.*}}(%rip), %xmm2 1542; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,1,1,3] 1543; SSE2-NEXT: psllq $63, %xmm0 1544; SSE2-NEXT: psrad $31, %xmm0 1545; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1546; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,1,3,3] 1547; SSE2-NEXT: psllq $63, %xmm1 1548; SSE2-NEXT: psrad $31, %xmm1 1549; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1550; SSE2-NEXT: retq 1551; 1552; SSSE3-LABEL: load_sext_4i1_to_4i64: 1553; SSSE3: # BB#0: # %entry 1554; SSSE3-NEXT: movl (%rdi), %eax 1555; SSSE3-NEXT: movl %eax, %ecx 1556; SSSE3-NEXT: shrl $3, %ecx 1557; SSSE3-NEXT: movd %ecx, %xmm0 1558; SSSE3-NEXT: movl %eax, %ecx 1559; SSSE3-NEXT: shrl %ecx 1560; SSSE3-NEXT: movd %ecx, %xmm1 1561; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1562; SSSE3-NEXT: movd %eax, %xmm2 1563; SSSE3-NEXT: shrl $2, %eax 1564; SSSE3-NEXT: movd %eax, %xmm0 1565; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 1566; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 1567; SSSE3-NEXT: pand {{.*}}(%rip), %xmm2 1568; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,1,1,3] 1569; SSSE3-NEXT: psllq $63, %xmm0 1570; SSSE3-NEXT: psrad $31, %xmm0 1571; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1572; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,1,3,3] 1573; SSSE3-NEXT: psllq $63, %xmm1 1574; SSSE3-NEXT: psrad $31, %xmm1 1575; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1576; SSSE3-NEXT: retq 1577; 1578; SSE41-LABEL: load_sext_4i1_to_4i64: 1579; SSE41: # BB#0: # %entry 1580; SSE41-NEXT: movl (%rdi), %eax 1581; SSE41-NEXT: movl %eax, %ecx 1582; SSE41-NEXT: shrl %ecx 1583; SSE41-NEXT: movd %eax, %xmm1 1584; SSE41-NEXT: pinsrd $1, %ecx, %xmm1 1585; SSE41-NEXT: movl %eax, %ecx 1586; SSE41-NEXT: shrl $2, %ecx 1587; SSE41-NEXT: pinsrd $2, %ecx, %xmm1 1588; SSE41-NEXT: shrl $3, %eax 1589; SSE41-NEXT: pinsrd $3, %eax, %xmm1 1590; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 1591; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero 1592; SSE41-NEXT: psllq $63, %xmm0 1593; SSE41-NEXT: psrad $31, %xmm0 1594; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1595; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,2,3,3] 1596; SSE41-NEXT: psllq $63, %xmm1 1597; SSE41-NEXT: psrad $31, %xmm1 1598; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1599; SSE41-NEXT: retq 1600; 1601; AVX1-LABEL: load_sext_4i1_to_4i64: 1602; AVX1: # BB#0: # %entry 1603; AVX1-NEXT: movzbl (%rdi), %eax 1604; AVX1-NEXT: movq %rax, %rcx 1605; AVX1-NEXT: shlq $62, %rcx 1606; AVX1-NEXT: sarq $63, %rcx 1607; AVX1-NEXT: movq %rax, %rdx 1608; AVX1-NEXT: shlq $63, %rdx 1609; AVX1-NEXT: sarq $63, %rdx 1610; AVX1-NEXT: vmovd %edx, %xmm0 1611; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 1612; AVX1-NEXT: movq %rax, %rcx 1613; AVX1-NEXT: shlq $61, %rcx 1614; AVX1-NEXT: sarq $63, %rcx 1615; AVX1-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 1616; AVX1-NEXT: shlq $60, %rax 1617; AVX1-NEXT: sarq $63, %rax 1618; AVX1-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 1619; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1620; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1621; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1622; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1623; AVX1-NEXT: retq 1624; 1625; AVX2-LABEL: load_sext_4i1_to_4i64: 1626; AVX2: # BB#0: # %entry 1627; AVX2-NEXT: movzbl (%rdi), %eax 1628; AVX2-NEXT: movq %rax, %rcx 1629; AVX2-NEXT: shlq $60, %rcx 1630; AVX2-NEXT: sarq $63, %rcx 1631; AVX2-NEXT: vmovq %rcx, %xmm0 1632; AVX2-NEXT: movq %rax, %rcx 1633; AVX2-NEXT: shlq $61, %rcx 1634; AVX2-NEXT: sarq $63, %rcx 1635; AVX2-NEXT: vmovq %rcx, %xmm1 1636; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1637; AVX2-NEXT: movq %rax, %rcx 1638; AVX2-NEXT: shlq $62, %rcx 1639; AVX2-NEXT: sarq $63, %rcx 1640; AVX2-NEXT: vmovq %rcx, %xmm1 1641; AVX2-NEXT: shlq $63, %rax 1642; AVX2-NEXT: sarq $63, %rax 1643; AVX2-NEXT: vmovq %rax, %xmm2 1644; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0] 1645; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 1646; AVX2-NEXT: retq 1647; 1648; AVX512F-LABEL: load_sext_4i1_to_4i64: 1649; AVX512F: # BB#0: # %entry 1650; AVX512F-NEXT: movzbl (%rdi), %eax 1651; AVX512F-NEXT: kmovw %eax, %k1 1652; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 1653; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 1654; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 1655; AVX512F-NEXT: retq 1656; 1657; AVX512BW-LABEL: load_sext_4i1_to_4i64: 1658; AVX512BW: # BB#0: # %entry 1659; AVX512BW-NEXT: movzbl (%rdi), %eax 1660; AVX512BW-NEXT: kmovd %eax, %k1 1661; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 1662; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 1663; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 1664; AVX512BW-NEXT: retq 1665; 1666; X32-SSE41-LABEL: load_sext_4i1_to_4i64: 1667; X32-SSE41: # BB#0: # %entry 1668; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1669; X32-SSE41-NEXT: movzbl (%eax), %eax 1670; X32-SSE41-NEXT: movl %eax, %ecx 1671; X32-SSE41-NEXT: shrl %ecx 1672; X32-SSE41-NEXT: movd %eax, %xmm1 1673; X32-SSE41-NEXT: pinsrd $1, %ecx, %xmm1 1674; X32-SSE41-NEXT: movl %eax, %ecx 1675; X32-SSE41-NEXT: shrl $2, %ecx 1676; X32-SSE41-NEXT: pinsrd $2, %ecx, %xmm1 1677; X32-SSE41-NEXT: shrl $3, %eax 1678; X32-SSE41-NEXT: pinsrd $3, %eax, %xmm1 1679; X32-SSE41-NEXT: pand {{\.LCPI.*}}, %xmm1 1680; X32-SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero 1681; X32-SSE41-NEXT: psllq $63, %xmm0 1682; X32-SSE41-NEXT: psrad $31, %xmm0 1683; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1684; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,2,3,3] 1685; X32-SSE41-NEXT: psllq $63, %xmm1 1686; X32-SSE41-NEXT: psrad $31, %xmm1 1687; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1688; X32-SSE41-NEXT: retl 1689entry: 1690 %X = load <4 x i1>, <4 x i1>* %ptr 1691 %Y = sext <4 x i1> %X to <4 x i64> 1692 ret <4 x i64> %Y 1693} 1694 1695define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) { 1696; SSE2-LABEL: load_sext_4i8_to_4i64: 1697; SSE2: # BB#0: # %entry 1698; SSE2-NEXT: movsbq 1(%rdi), %rax 1699; SSE2-NEXT: movd %rax, %xmm1 1700; SSE2-NEXT: movsbq (%rdi), %rax 1701; SSE2-NEXT: movd %rax, %xmm0 1702; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1703; SSE2-NEXT: movsbq 3(%rdi), %rax 1704; SSE2-NEXT: movd %rax, %xmm2 1705; SSE2-NEXT: movsbq 2(%rdi), %rax 1706; SSE2-NEXT: movd %rax, %xmm1 1707; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 1708; SSE2-NEXT: retq 1709; 1710; SSSE3-LABEL: load_sext_4i8_to_4i64: 1711; SSSE3: # BB#0: # %entry 1712; SSSE3-NEXT: movsbq 1(%rdi), %rax 1713; SSSE3-NEXT: movd %rax, %xmm1 1714; SSSE3-NEXT: movsbq (%rdi), %rax 1715; SSSE3-NEXT: movd %rax, %xmm0 1716; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1717; SSSE3-NEXT: movsbq 3(%rdi), %rax 1718; SSSE3-NEXT: movd %rax, %xmm2 1719; SSSE3-NEXT: movsbq 2(%rdi), %rax 1720; SSSE3-NEXT: movd %rax, %xmm1 1721; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 1722; SSSE3-NEXT: retq 1723; 1724; SSE41-LABEL: load_sext_4i8_to_4i64: 1725; SSE41: # BB#0: # %entry 1726; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 1727; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm1 1728; SSE41-NEXT: retq 1729; 1730; AVX1-LABEL: load_sext_4i8_to_4i64: 1731; AVX1: # BB#0: # %entry 1732; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0 1733; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1734; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1735; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1736; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1737; AVX1-NEXT: retq 1738; 1739; AVX2-LABEL: load_sext_4i8_to_4i64: 1740; AVX2: # BB#0: # %entry 1741; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0 1742; AVX2-NEXT: retq 1743; 1744; AVX512-LABEL: load_sext_4i8_to_4i64: 1745; AVX512: # BB#0: # %entry 1746; AVX512-NEXT: vpmovsxbq (%rdi), %ymm0 1747; AVX512-NEXT: retq 1748; 1749; X32-SSE41-LABEL: load_sext_4i8_to_4i64: 1750; X32-SSE41: # BB#0: # %entry 1751; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1752; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 1753; X32-SSE41-NEXT: pmovsxbq 2(%eax), %xmm1 1754; X32-SSE41-NEXT: retl 1755entry: 1756 %X = load <4 x i8>, <4 x i8>* %ptr 1757 %Y = sext <4 x i8> %X to <4 x i64> 1758 ret <4 x i64> %Y 1759} 1760 1761define <8 x i16> @load_sext_8i1_to_8i16(<8 x i1> *%ptr) { 1762; SSE2-LABEL: load_sext_8i1_to_8i16: 1763; SSE2: # BB#0: # %entry 1764; SSE2-NEXT: movsbq (%rdi), %rax 1765; SSE2-NEXT: movq %rax, %rcx 1766; SSE2-NEXT: shrq $7, %rcx 1767; SSE2-NEXT: movd %ecx, %xmm0 1768; SSE2-NEXT: movq %rax, %rcx 1769; SSE2-NEXT: shlq $60, %rcx 1770; SSE2-NEXT: sarq $63, %rcx 1771; SSE2-NEXT: movd %ecx, %xmm2 1772; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1773; SSE2-NEXT: movq %rax, %rcx 1774; SSE2-NEXT: shlq $58, %rcx 1775; SSE2-NEXT: sarq $63, %rcx 1776; SSE2-NEXT: movd %ecx, %xmm0 1777; SSE2-NEXT: movq %rax, %rcx 1778; SSE2-NEXT: shlq $62, %rcx 1779; SSE2-NEXT: sarq $63, %rcx 1780; SSE2-NEXT: movd %ecx, %xmm1 1781; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 1782; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 1783; SSE2-NEXT: movq %rax, %rcx 1784; SSE2-NEXT: shlq $57, %rcx 1785; SSE2-NEXT: sarq $63, %rcx 1786; SSE2-NEXT: movd %ecx, %xmm0 1787; SSE2-NEXT: movq %rax, %rcx 1788; SSE2-NEXT: shlq $61, %rcx 1789; SSE2-NEXT: sarq $63, %rcx 1790; SSE2-NEXT: movd %ecx, %xmm2 1791; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1792; SSE2-NEXT: movq %rax, %rcx 1793; SSE2-NEXT: shlq $59, %rcx 1794; SSE2-NEXT: sarq $63, %rcx 1795; SSE2-NEXT: movd %ecx, %xmm3 1796; SSE2-NEXT: shlq $63, %rax 1797; SSE2-NEXT: sarq $63, %rax 1798; SSE2-NEXT: movd %eax, %xmm0 1799; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 1800; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 1801; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 1802; SSE2-NEXT: retq 1803; 1804; SSSE3-LABEL: load_sext_8i1_to_8i16: 1805; SSSE3: # BB#0: # %entry 1806; SSSE3-NEXT: movsbq (%rdi), %rax 1807; SSSE3-NEXT: movq %rax, %rcx 1808; SSSE3-NEXT: shrq $7, %rcx 1809; SSSE3-NEXT: movd %ecx, %xmm0 1810; SSSE3-NEXT: movq %rax, %rcx 1811; SSSE3-NEXT: shlq $60, %rcx 1812; SSSE3-NEXT: sarq $63, %rcx 1813; SSSE3-NEXT: movd %ecx, %xmm2 1814; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1815; SSSE3-NEXT: movq %rax, %rcx 1816; SSSE3-NEXT: shlq $58, %rcx 1817; SSSE3-NEXT: sarq $63, %rcx 1818; SSSE3-NEXT: movd %ecx, %xmm0 1819; SSSE3-NEXT: movq %rax, %rcx 1820; SSSE3-NEXT: shlq $62, %rcx 1821; SSSE3-NEXT: sarq $63, %rcx 1822; SSSE3-NEXT: movd %ecx, %xmm1 1823; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 1824; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 1825; SSSE3-NEXT: movq %rax, %rcx 1826; SSSE3-NEXT: shlq $57, %rcx 1827; SSSE3-NEXT: sarq $63, %rcx 1828; SSSE3-NEXT: movd %ecx, %xmm0 1829; SSSE3-NEXT: movq %rax, %rcx 1830; SSSE3-NEXT: shlq $61, %rcx 1831; SSSE3-NEXT: sarq $63, %rcx 1832; SSSE3-NEXT: movd %ecx, %xmm2 1833; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1834; SSSE3-NEXT: movq %rax, %rcx 1835; SSSE3-NEXT: shlq $59, %rcx 1836; SSSE3-NEXT: sarq $63, %rcx 1837; SSSE3-NEXT: movd %ecx, %xmm3 1838; SSSE3-NEXT: shlq $63, %rax 1839; SSSE3-NEXT: sarq $63, %rax 1840; SSSE3-NEXT: movd %eax, %xmm0 1841; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 1842; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 1843; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 1844; SSSE3-NEXT: retq 1845; 1846; SSE41-LABEL: load_sext_8i1_to_8i16: 1847; SSE41: # BB#0: # %entry 1848; SSE41-NEXT: movsbq (%rdi), %rax 1849; SSE41-NEXT: movq %rax, %rcx 1850; SSE41-NEXT: shlq $62, %rcx 1851; SSE41-NEXT: sarq $63, %rcx 1852; SSE41-NEXT: movq %rax, %rdx 1853; SSE41-NEXT: shlq $63, %rdx 1854; SSE41-NEXT: sarq $63, %rdx 1855; SSE41-NEXT: movd %edx, %xmm0 1856; SSE41-NEXT: pinsrw $1, %ecx, %xmm0 1857; SSE41-NEXT: movq %rax, %rcx 1858; SSE41-NEXT: shlq $61, %rcx 1859; SSE41-NEXT: sarq $63, %rcx 1860; SSE41-NEXT: pinsrw $2, %ecx, %xmm0 1861; SSE41-NEXT: movq %rax, %rcx 1862; SSE41-NEXT: shlq $60, %rcx 1863; SSE41-NEXT: sarq $63, %rcx 1864; SSE41-NEXT: pinsrw $3, %ecx, %xmm0 1865; SSE41-NEXT: movq %rax, %rcx 1866; SSE41-NEXT: shlq $59, %rcx 1867; SSE41-NEXT: sarq $63, %rcx 1868; SSE41-NEXT: pinsrw $4, %ecx, %xmm0 1869; SSE41-NEXT: movq %rax, %rcx 1870; SSE41-NEXT: shlq $58, %rcx 1871; SSE41-NEXT: sarq $63, %rcx 1872; SSE41-NEXT: pinsrw $5, %ecx, %xmm0 1873; SSE41-NEXT: movq %rax, %rcx 1874; SSE41-NEXT: shlq $57, %rcx 1875; SSE41-NEXT: sarq $63, %rcx 1876; SSE41-NEXT: pinsrw $6, %ecx, %xmm0 1877; SSE41-NEXT: shrq $7, %rax 1878; SSE41-NEXT: pinsrw $7, %eax, %xmm0 1879; SSE41-NEXT: retq 1880; 1881; AVX1-LABEL: load_sext_8i1_to_8i16: 1882; AVX1: # BB#0: # %entry 1883; AVX1-NEXT: movsbq (%rdi), %rax 1884; AVX1-NEXT: movq %rax, %rcx 1885; AVX1-NEXT: shlq $62, %rcx 1886; AVX1-NEXT: sarq $63, %rcx 1887; AVX1-NEXT: movq %rax, %rdx 1888; AVX1-NEXT: shlq $63, %rdx 1889; AVX1-NEXT: sarq $63, %rdx 1890; AVX1-NEXT: vmovd %edx, %xmm0 1891; AVX1-NEXT: vpinsrw $1, %ecx, %xmm0, %xmm0 1892; AVX1-NEXT: movq %rax, %rcx 1893; AVX1-NEXT: shlq $61, %rcx 1894; AVX1-NEXT: sarq $63, %rcx 1895; AVX1-NEXT: vpinsrw $2, %ecx, %xmm0, %xmm0 1896; AVX1-NEXT: movq %rax, %rcx 1897; AVX1-NEXT: shlq $60, %rcx 1898; AVX1-NEXT: sarq $63, %rcx 1899; AVX1-NEXT: vpinsrw $3, %ecx, %xmm0, %xmm0 1900; AVX1-NEXT: movq %rax, %rcx 1901; AVX1-NEXT: shlq $59, %rcx 1902; AVX1-NEXT: sarq $63, %rcx 1903; AVX1-NEXT: vpinsrw $4, %ecx, %xmm0, %xmm0 1904; AVX1-NEXT: movq %rax, %rcx 1905; AVX1-NEXT: shlq $58, %rcx 1906; AVX1-NEXT: sarq $63, %rcx 1907; AVX1-NEXT: vpinsrw $5, %ecx, %xmm0, %xmm0 1908; AVX1-NEXT: movq %rax, %rcx 1909; AVX1-NEXT: shlq $57, %rcx 1910; AVX1-NEXT: sarq $63, %rcx 1911; AVX1-NEXT: vpinsrw $6, %ecx, %xmm0, %xmm0 1912; AVX1-NEXT: shrq $7, %rax 1913; AVX1-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 1914; AVX1-NEXT: retq 1915; 1916; AVX2-LABEL: load_sext_8i1_to_8i16: 1917; AVX2: # BB#0: # %entry 1918; AVX2-NEXT: movsbq (%rdi), %rax 1919; AVX2-NEXT: movq %rax, %rcx 1920; AVX2-NEXT: shlq $62, %rcx 1921; AVX2-NEXT: sarq $63, %rcx 1922; AVX2-NEXT: movq %rax, %rdx 1923; AVX2-NEXT: shlq $63, %rdx 1924; AVX2-NEXT: sarq $63, %rdx 1925; AVX2-NEXT: vmovd %edx, %xmm0 1926; AVX2-NEXT: vpinsrw $1, %ecx, %xmm0, %xmm0 1927; AVX2-NEXT: movq %rax, %rcx 1928; AVX2-NEXT: shlq $61, %rcx 1929; AVX2-NEXT: sarq $63, %rcx 1930; AVX2-NEXT: vpinsrw $2, %ecx, %xmm0, %xmm0 1931; AVX2-NEXT: movq %rax, %rcx 1932; AVX2-NEXT: shlq $60, %rcx 1933; AVX2-NEXT: sarq $63, %rcx 1934; AVX2-NEXT: vpinsrw $3, %ecx, %xmm0, %xmm0 1935; AVX2-NEXT: movq %rax, %rcx 1936; AVX2-NEXT: shlq $59, %rcx 1937; AVX2-NEXT: sarq $63, %rcx 1938; AVX2-NEXT: vpinsrw $4, %ecx, %xmm0, %xmm0 1939; AVX2-NEXT: movq %rax, %rcx 1940; AVX2-NEXT: shlq $58, %rcx 1941; AVX2-NEXT: sarq $63, %rcx 1942; AVX2-NEXT: vpinsrw $5, %ecx, %xmm0, %xmm0 1943; AVX2-NEXT: movq %rax, %rcx 1944; AVX2-NEXT: shlq $57, %rcx 1945; AVX2-NEXT: sarq $63, %rcx 1946; AVX2-NEXT: vpinsrw $6, %ecx, %xmm0, %xmm0 1947; AVX2-NEXT: shrq $7, %rax 1948; AVX2-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 1949; AVX2-NEXT: retq 1950; 1951; AVX512F-LABEL: load_sext_8i1_to_8i16: 1952; AVX512F: # BB#0: # %entry 1953; AVX512F-NEXT: movzbl (%rdi), %eax 1954; AVX512F-NEXT: kmovw %eax, %k1 1955; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 1956; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 1957; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 1958; AVX512F-NEXT: retq 1959; 1960; AVX512BW-LABEL: load_sext_8i1_to_8i16: 1961; AVX512BW: # BB#0: # %entry 1962; AVX512BW-NEXT: movzbl (%rdi), %eax 1963; AVX512BW-NEXT: kmovd %eax, %k1 1964; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 1965; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 1966; AVX512BW-NEXT: vpmovqw %zmm0, %xmm0 1967; AVX512BW-NEXT: retq 1968; 1969; X32-SSE41-LABEL: load_sext_8i1_to_8i16: 1970; X32-SSE41: # BB#0: # %entry 1971; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1972; X32-SSE41-NEXT: movsbl (%eax), %eax 1973; X32-SSE41-NEXT: movl %eax, %ecx 1974; X32-SSE41-NEXT: shll $30, %ecx 1975; X32-SSE41-NEXT: sarl $31, %ecx 1976; X32-SSE41-NEXT: movl %eax, %edx 1977; X32-SSE41-NEXT: shll $31, %edx 1978; X32-SSE41-NEXT: sarl $31, %edx 1979; X32-SSE41-NEXT: movd %edx, %xmm0 1980; X32-SSE41-NEXT: pinsrw $1, %ecx, %xmm0 1981; X32-SSE41-NEXT: movl %eax, %ecx 1982; X32-SSE41-NEXT: shll $29, %ecx 1983; X32-SSE41-NEXT: sarl $31, %ecx 1984; X32-SSE41-NEXT: pinsrw $2, %ecx, %xmm0 1985; X32-SSE41-NEXT: movl %eax, %ecx 1986; X32-SSE41-NEXT: shll $28, %ecx 1987; X32-SSE41-NEXT: sarl $31, %ecx 1988; X32-SSE41-NEXT: pinsrw $3, %ecx, %xmm0 1989; X32-SSE41-NEXT: movl %eax, %ecx 1990; X32-SSE41-NEXT: shll $27, %ecx 1991; X32-SSE41-NEXT: sarl $31, %ecx 1992; X32-SSE41-NEXT: pinsrw $4, %ecx, %xmm0 1993; X32-SSE41-NEXT: movl %eax, %ecx 1994; X32-SSE41-NEXT: shll $26, %ecx 1995; X32-SSE41-NEXT: sarl $31, %ecx 1996; X32-SSE41-NEXT: pinsrw $5, %ecx, %xmm0 1997; X32-SSE41-NEXT: movl %eax, %ecx 1998; X32-SSE41-NEXT: shll $25, %ecx 1999; X32-SSE41-NEXT: sarl $31, %ecx 2000; X32-SSE41-NEXT: pinsrw $6, %ecx, %xmm0 2001; X32-SSE41-NEXT: shrl $7, %eax 2002; X32-SSE41-NEXT: pinsrw $7, %eax, %xmm0 2003; X32-SSE41-NEXT: retl 2004entry: 2005 %X = load <8 x i1>, <8 x i1>* %ptr 2006 %Y = sext <8 x i1> %X to <8 x i16> 2007 ret <8 x i16> %Y 2008} 2009 2010define <8 x i16> @load_sext_8i8_to_8i16(<8 x i8> *%ptr) { 2011; SSE2-LABEL: load_sext_8i8_to_8i16: 2012; SSE2: # BB#0: # %entry 2013; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 2014; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2015; SSE2-NEXT: psraw $8, %xmm0 2016; SSE2-NEXT: retq 2017; 2018; SSSE3-LABEL: load_sext_8i8_to_8i16: 2019; SSSE3: # BB#0: # %entry 2020; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 2021; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2022; SSSE3-NEXT: psraw $8, %xmm0 2023; SSSE3-NEXT: retq 2024; 2025; SSE41-LABEL: load_sext_8i8_to_8i16: 2026; SSE41: # BB#0: # %entry 2027; SSE41-NEXT: pmovsxbw (%rdi), %xmm0 2028; SSE41-NEXT: retq 2029; 2030; AVX-LABEL: load_sext_8i8_to_8i16: 2031; AVX: # BB#0: # %entry 2032; AVX-NEXT: vpmovsxbw (%rdi), %xmm0 2033; AVX-NEXT: retq 2034; 2035; X32-SSE41-LABEL: load_sext_8i8_to_8i16: 2036; X32-SSE41: # BB#0: # %entry 2037; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2038; X32-SSE41-NEXT: pmovsxbw (%eax), %xmm0 2039; X32-SSE41-NEXT: retl 2040entry: 2041 %X = load <8 x i8>, <8 x i8>* %ptr 2042 %Y = sext <8 x i8> %X to <8 x i16> 2043 ret <8 x i16> %Y 2044} 2045 2046define <8 x i64> @load_sext_8i8_to_8i64(<8 x i8> *%ptr) { 2047; SSE2-LABEL: load_sext_8i8_to_8i64: 2048; SSE2: # BB#0: # %entry 2049; SSE2-NEXT: movsbq 1(%rdi), %rax 2050; SSE2-NEXT: movd %rax, %xmm1 2051; SSE2-NEXT: movsbq (%rdi), %rax 2052; SSE2-NEXT: movd %rax, %xmm0 2053; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2054; SSE2-NEXT: movsbq 3(%rdi), %rax 2055; SSE2-NEXT: movd %rax, %xmm2 2056; SSE2-NEXT: movsbq 2(%rdi), %rax 2057; SSE2-NEXT: movd %rax, %xmm1 2058; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2059; SSE2-NEXT: movsbq 5(%rdi), %rax 2060; SSE2-NEXT: movd %rax, %xmm3 2061; SSE2-NEXT: movsbq 4(%rdi), %rax 2062; SSE2-NEXT: movd %rax, %xmm2 2063; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] 2064; SSE2-NEXT: movsbq 7(%rdi), %rax 2065; SSE2-NEXT: movd %rax, %xmm4 2066; SSE2-NEXT: movsbq 6(%rdi), %rax 2067; SSE2-NEXT: movd %rax, %xmm3 2068; SSE2-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0] 2069; SSE2-NEXT: retq 2070; 2071; SSSE3-LABEL: load_sext_8i8_to_8i64: 2072; SSSE3: # BB#0: # %entry 2073; SSSE3-NEXT: movsbq 1(%rdi), %rax 2074; SSSE3-NEXT: movd %rax, %xmm1 2075; SSSE3-NEXT: movsbq (%rdi), %rax 2076; SSSE3-NEXT: movd %rax, %xmm0 2077; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2078; SSSE3-NEXT: movsbq 3(%rdi), %rax 2079; SSSE3-NEXT: movd %rax, %xmm2 2080; SSSE3-NEXT: movsbq 2(%rdi), %rax 2081; SSSE3-NEXT: movd %rax, %xmm1 2082; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2083; SSSE3-NEXT: movsbq 5(%rdi), %rax 2084; SSSE3-NEXT: movd %rax, %xmm3 2085; SSSE3-NEXT: movsbq 4(%rdi), %rax 2086; SSSE3-NEXT: movd %rax, %xmm2 2087; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] 2088; SSSE3-NEXT: movsbq 7(%rdi), %rax 2089; SSSE3-NEXT: movd %rax, %xmm4 2090; SSSE3-NEXT: movsbq 6(%rdi), %rax 2091; SSSE3-NEXT: movd %rax, %xmm3 2092; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0] 2093; SSSE3-NEXT: retq 2094; 2095; SSE41-LABEL: load_sext_8i8_to_8i64: 2096; SSE41: # BB#0: # %entry 2097; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 2098; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm1 2099; SSE41-NEXT: pmovsxbq 4(%rdi), %xmm2 2100; SSE41-NEXT: pmovsxbq 6(%rdi), %xmm3 2101; SSE41-NEXT: retq 2102; 2103; AVX1-LABEL: load_sext_8i8_to_8i64: 2104; AVX1: # BB#0: # %entry 2105; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0 2106; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 2107; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 2108; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 2109; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 2110; AVX1-NEXT: vpmovsxbd 4(%rdi), %xmm1 2111; AVX1-NEXT: vpmovsxdq %xmm1, %xmm2 2112; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 2113; AVX1-NEXT: vpmovsxdq %xmm1, %xmm1 2114; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 2115; AVX1-NEXT: retq 2116; 2117; AVX2-LABEL: load_sext_8i8_to_8i64: 2118; AVX2: # BB#0: # %entry 2119; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0 2120; AVX2-NEXT: vpmovsxbq 4(%rdi), %ymm1 2121; AVX2-NEXT: retq 2122; 2123; AVX512-LABEL: load_sext_8i8_to_8i64: 2124; AVX512: # BB#0: # %entry 2125; AVX512-NEXT: vpmovsxbq (%rdi), %zmm0 2126; AVX512-NEXT: retq 2127; 2128; X32-SSE41-LABEL: load_sext_8i8_to_8i64: 2129; X32-SSE41: # BB#0: # %entry 2130; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2131; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 2132; X32-SSE41-NEXT: pmovsxbq 2(%eax), %xmm1 2133; X32-SSE41-NEXT: pmovsxbq 4(%eax), %xmm2 2134; X32-SSE41-NEXT: pmovsxbq 6(%eax), %xmm3 2135; X32-SSE41-NEXT: retl 2136entry: 2137 %X = load <8 x i8>, <8 x i8>* %ptr 2138 %Y = sext <8 x i8> %X to <8 x i64> 2139 ret <8 x i64> %Y 2140} 2141 2142define <8 x i32> @load_sext_8i1_to_8i32(<8 x i1> *%ptr) { 2143; SSE2-LABEL: load_sext_8i1_to_8i32: 2144; SSE2: # BB#0: # %entry 2145; SSE2-NEXT: movzbl (%rdi), %eax 2146; SSE2-NEXT: movl %eax, %ecx 2147; SSE2-NEXT: shrl $6, %ecx 2148; SSE2-NEXT: andl $1, %ecx 2149; SSE2-NEXT: movd %ecx, %xmm0 2150; SSE2-NEXT: movl %eax, %ecx 2151; SSE2-NEXT: shrl $2, %ecx 2152; SSE2-NEXT: andl $1, %ecx 2153; SSE2-NEXT: movd %ecx, %xmm2 2154; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 2155; SSE2-NEXT: movl %eax, %ecx 2156; SSE2-NEXT: andl $1, %ecx 2157; SSE2-NEXT: movd %ecx, %xmm1 2158; SSE2-NEXT: movl %eax, %ecx 2159; SSE2-NEXT: shrl $4, %ecx 2160; SSE2-NEXT: andl $1, %ecx 2161; SSE2-NEXT: movd %ecx, %xmm0 2162; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 2163; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 2164; SSE2-NEXT: movl %eax, %ecx 2165; SSE2-NEXT: shrl $5, %ecx 2166; SSE2-NEXT: andl $1, %ecx 2167; SSE2-NEXT: movd %ecx, %xmm0 2168; SSE2-NEXT: movl %eax, %ecx 2169; SSE2-NEXT: shrl %ecx 2170; SSE2-NEXT: andl $1, %ecx 2171; SSE2-NEXT: movd %ecx, %xmm2 2172; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 2173; SSE2-NEXT: movl %eax, %ecx 2174; SSE2-NEXT: shrl $3, %ecx 2175; SSE2-NEXT: andl $1, %ecx 2176; SSE2-NEXT: movd %ecx, %xmm0 2177; SSE2-NEXT: shrl $7, %eax 2178; SSE2-NEXT: movzwl %ax, %eax 2179; SSE2-NEXT: movd %eax, %xmm3 2180; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 2181; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 2182; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 2183; SSE2-NEXT: movdqa %xmm1, %xmm0 2184; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 2185; SSE2-NEXT: pslld $31, %xmm0 2186; SSE2-NEXT: psrad $31, %xmm0 2187; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2188; SSE2-NEXT: pslld $31, %xmm1 2189; SSE2-NEXT: psrad $31, %xmm1 2190; SSE2-NEXT: retq 2191; 2192; SSSE3-LABEL: load_sext_8i1_to_8i32: 2193; SSSE3: # BB#0: # %entry 2194; SSSE3-NEXT: movzbl (%rdi), %eax 2195; SSSE3-NEXT: movl %eax, %ecx 2196; SSSE3-NEXT: shrl $6, %ecx 2197; SSSE3-NEXT: andl $1, %ecx 2198; SSSE3-NEXT: movd %ecx, %xmm0 2199; SSSE3-NEXT: movl %eax, %ecx 2200; SSSE3-NEXT: shrl $2, %ecx 2201; SSSE3-NEXT: andl $1, %ecx 2202; SSSE3-NEXT: movd %ecx, %xmm2 2203; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 2204; SSSE3-NEXT: movl %eax, %ecx 2205; SSSE3-NEXT: andl $1, %ecx 2206; SSSE3-NEXT: movd %ecx, %xmm1 2207; SSSE3-NEXT: movl %eax, %ecx 2208; SSSE3-NEXT: shrl $4, %ecx 2209; SSSE3-NEXT: andl $1, %ecx 2210; SSSE3-NEXT: movd %ecx, %xmm0 2211; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 2212; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 2213; SSSE3-NEXT: movl %eax, %ecx 2214; SSSE3-NEXT: shrl $5, %ecx 2215; SSSE3-NEXT: andl $1, %ecx 2216; SSSE3-NEXT: movd %ecx, %xmm0 2217; SSSE3-NEXT: movl %eax, %ecx 2218; SSSE3-NEXT: shrl %ecx 2219; SSSE3-NEXT: andl $1, %ecx 2220; SSSE3-NEXT: movd %ecx, %xmm2 2221; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 2222; SSSE3-NEXT: movl %eax, %ecx 2223; SSSE3-NEXT: shrl $3, %ecx 2224; SSSE3-NEXT: andl $1, %ecx 2225; SSSE3-NEXT: movd %ecx, %xmm0 2226; SSSE3-NEXT: shrl $7, %eax 2227; SSSE3-NEXT: movzwl %ax, %eax 2228; SSSE3-NEXT: movd %eax, %xmm3 2229; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 2230; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 2231; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3] 2232; SSSE3-NEXT: movdqa %xmm1, %xmm0 2233; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 2234; SSSE3-NEXT: pslld $31, %xmm0 2235; SSSE3-NEXT: psrad $31, %xmm0 2236; SSSE3-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2237; SSSE3-NEXT: pslld $31, %xmm1 2238; SSSE3-NEXT: psrad $31, %xmm1 2239; SSSE3-NEXT: retq 2240; 2241; SSE41-LABEL: load_sext_8i1_to_8i32: 2242; SSE41: # BB#0: # %entry 2243; SSE41-NEXT: movzbl (%rdi), %eax 2244; SSE41-NEXT: movl %eax, %ecx 2245; SSE41-NEXT: shrl %ecx 2246; SSE41-NEXT: andl $1, %ecx 2247; SSE41-NEXT: movl %eax, %edx 2248; SSE41-NEXT: andl $1, %edx 2249; SSE41-NEXT: movd %edx, %xmm1 2250; SSE41-NEXT: pinsrw $1, %ecx, %xmm1 2251; SSE41-NEXT: movl %eax, %ecx 2252; SSE41-NEXT: shrl $2, %ecx 2253; SSE41-NEXT: andl $1, %ecx 2254; SSE41-NEXT: pinsrw $2, %ecx, %xmm1 2255; SSE41-NEXT: movl %eax, %ecx 2256; SSE41-NEXT: shrl $3, %ecx 2257; SSE41-NEXT: andl $1, %ecx 2258; SSE41-NEXT: pinsrw $3, %ecx, %xmm1 2259; SSE41-NEXT: movl %eax, %ecx 2260; SSE41-NEXT: shrl $4, %ecx 2261; SSE41-NEXT: andl $1, %ecx 2262; SSE41-NEXT: pinsrw $4, %ecx, %xmm1 2263; SSE41-NEXT: movl %eax, %ecx 2264; SSE41-NEXT: shrl $5, %ecx 2265; SSE41-NEXT: andl $1, %ecx 2266; SSE41-NEXT: pinsrw $5, %ecx, %xmm1 2267; SSE41-NEXT: movl %eax, %ecx 2268; SSE41-NEXT: shrl $6, %ecx 2269; SSE41-NEXT: andl $1, %ecx 2270; SSE41-NEXT: pinsrw $6, %ecx, %xmm1 2271; SSE41-NEXT: shrl $7, %eax 2272; SSE41-NEXT: movzwl %ax, %eax 2273; SSE41-NEXT: pinsrw $7, %eax, %xmm1 2274; SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 2275; SSE41-NEXT: pslld $31, %xmm0 2276; SSE41-NEXT: psrad $31, %xmm0 2277; SSE41-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2278; SSE41-NEXT: pslld $31, %xmm1 2279; SSE41-NEXT: psrad $31, %xmm1 2280; SSE41-NEXT: retq 2281; 2282; AVX1-LABEL: load_sext_8i1_to_8i32: 2283; AVX1: # BB#0: # %entry 2284; AVX1-NEXT: movsbq (%rdi), %rax 2285; AVX1-NEXT: movq %rax, %rcx 2286; AVX1-NEXT: shlq $58, %rcx 2287; AVX1-NEXT: sarq $63, %rcx 2288; AVX1-NEXT: movq %rax, %rdx 2289; AVX1-NEXT: shlq $59, %rdx 2290; AVX1-NEXT: sarq $63, %rdx 2291; AVX1-NEXT: vmovd %edx, %xmm0 2292; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 2293; AVX1-NEXT: movq %rax, %rcx 2294; AVX1-NEXT: shlq $57, %rcx 2295; AVX1-NEXT: sarq $63, %rcx 2296; AVX1-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 2297; AVX1-NEXT: movq %rax, %rcx 2298; AVX1-NEXT: shrq $7, %rcx 2299; AVX1-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0 2300; AVX1-NEXT: movq %rax, %rcx 2301; AVX1-NEXT: shlq $62, %rcx 2302; AVX1-NEXT: sarq $63, %rcx 2303; AVX1-NEXT: movq %rax, %rdx 2304; AVX1-NEXT: shlq $63, %rdx 2305; AVX1-NEXT: sarq $63, %rdx 2306; AVX1-NEXT: vmovd %edx, %xmm1 2307; AVX1-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1 2308; AVX1-NEXT: movq %rax, %rcx 2309; AVX1-NEXT: shlq $61, %rcx 2310; AVX1-NEXT: sarq $63, %rcx 2311; AVX1-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1 2312; AVX1-NEXT: shlq $60, %rax 2313; AVX1-NEXT: sarq $63, %rax 2314; AVX1-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1 2315; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 2316; AVX1-NEXT: retq 2317; 2318; AVX2-LABEL: load_sext_8i1_to_8i32: 2319; AVX2: # BB#0: # %entry 2320; AVX2-NEXT: movsbq (%rdi), %rax 2321; AVX2-NEXT: movq %rax, %rcx 2322; AVX2-NEXT: shlq $58, %rcx 2323; AVX2-NEXT: sarq $63, %rcx 2324; AVX2-NEXT: movq %rax, %rdx 2325; AVX2-NEXT: shlq $59, %rdx 2326; AVX2-NEXT: sarq $63, %rdx 2327; AVX2-NEXT: vmovd %edx, %xmm0 2328; AVX2-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 2329; AVX2-NEXT: movq %rax, %rcx 2330; AVX2-NEXT: shlq $57, %rcx 2331; AVX2-NEXT: sarq $63, %rcx 2332; AVX2-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 2333; AVX2-NEXT: movq %rax, %rcx 2334; AVX2-NEXT: shrq $7, %rcx 2335; AVX2-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0 2336; AVX2-NEXT: movq %rax, %rcx 2337; AVX2-NEXT: shlq $62, %rcx 2338; AVX2-NEXT: sarq $63, %rcx 2339; AVX2-NEXT: movq %rax, %rdx 2340; AVX2-NEXT: shlq $63, %rdx 2341; AVX2-NEXT: sarq $63, %rdx 2342; AVX2-NEXT: vmovd %edx, %xmm1 2343; AVX2-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1 2344; AVX2-NEXT: movq %rax, %rcx 2345; AVX2-NEXT: shlq $61, %rcx 2346; AVX2-NEXT: sarq $63, %rcx 2347; AVX2-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1 2348; AVX2-NEXT: shlq $60, %rax 2349; AVX2-NEXT: sarq $63, %rax 2350; AVX2-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1 2351; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 2352; AVX2-NEXT: retq 2353; 2354; AVX512F-LABEL: load_sext_8i1_to_8i32: 2355; AVX512F: # BB#0: # %entry 2356; AVX512F-NEXT: movzbl (%rdi), %eax 2357; AVX512F-NEXT: kmovw %eax, %k1 2358; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 2359; AVX512F-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 2360; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 2361; AVX512F-NEXT: retq 2362; 2363; AVX512BW-LABEL: load_sext_8i1_to_8i32: 2364; AVX512BW: # BB#0: # %entry 2365; AVX512BW-NEXT: movzbl (%rdi), %eax 2366; AVX512BW-NEXT: kmovd %eax, %k1 2367; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 2368; AVX512BW-NEXT: vmovdqa64 %zmm0, %zmm0 {%k1} {z} 2369; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 2370; AVX512BW-NEXT: retq 2371; 2372; X32-SSE41-LABEL: load_sext_8i1_to_8i32: 2373; X32-SSE41: # BB#0: # %entry 2374; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2375; X32-SSE41-NEXT: movzbl (%eax), %eax 2376; X32-SSE41-NEXT: movl %eax, %ecx 2377; X32-SSE41-NEXT: shrl %ecx 2378; X32-SSE41-NEXT: andl $1, %ecx 2379; X32-SSE41-NEXT: movl %eax, %edx 2380; X32-SSE41-NEXT: andl $1, %edx 2381; X32-SSE41-NEXT: movd %edx, %xmm1 2382; X32-SSE41-NEXT: pinsrw $1, %ecx, %xmm1 2383; X32-SSE41-NEXT: movl %eax, %ecx 2384; X32-SSE41-NEXT: shrl $2, %ecx 2385; X32-SSE41-NEXT: andl $1, %ecx 2386; X32-SSE41-NEXT: pinsrw $2, %ecx, %xmm1 2387; X32-SSE41-NEXT: movl %eax, %ecx 2388; X32-SSE41-NEXT: shrl $3, %ecx 2389; X32-SSE41-NEXT: andl $1, %ecx 2390; X32-SSE41-NEXT: pinsrw $3, %ecx, %xmm1 2391; X32-SSE41-NEXT: movl %eax, %ecx 2392; X32-SSE41-NEXT: shrl $4, %ecx 2393; X32-SSE41-NEXT: andl $1, %ecx 2394; X32-SSE41-NEXT: pinsrw $4, %ecx, %xmm1 2395; X32-SSE41-NEXT: movl %eax, %ecx 2396; X32-SSE41-NEXT: shrl $5, %ecx 2397; X32-SSE41-NEXT: andl $1, %ecx 2398; X32-SSE41-NEXT: pinsrw $5, %ecx, %xmm1 2399; X32-SSE41-NEXT: movl %eax, %ecx 2400; X32-SSE41-NEXT: shrl $6, %ecx 2401; X32-SSE41-NEXT: andl $1, %ecx 2402; X32-SSE41-NEXT: pinsrw $6, %ecx, %xmm1 2403; X32-SSE41-NEXT: shrl $7, %eax 2404; X32-SSE41-NEXT: pinsrw $7, %eax, %xmm1 2405; X32-SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 2406; X32-SSE41-NEXT: pslld $31, %xmm0 2407; X32-SSE41-NEXT: psrad $31, %xmm0 2408; X32-SSE41-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2409; X32-SSE41-NEXT: pslld $31, %xmm1 2410; X32-SSE41-NEXT: psrad $31, %xmm1 2411; X32-SSE41-NEXT: retl 2412entry: 2413 %X = load <8 x i1>, <8 x i1>* %ptr 2414 %Y = sext <8 x i1> %X to <8 x i32> 2415 ret <8 x i32> %Y 2416} 2417 2418define <8 x i32> @load_sext_8i8_to_8i32(<8 x i8> *%ptr) { 2419; SSE2-LABEL: load_sext_8i8_to_8i32: 2420; SSE2: # BB#0: # %entry 2421; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 2422; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2423; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 2424; SSE2-NEXT: psrad $24, %xmm0 2425; SSE2-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 2426; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2427; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 2428; SSE2-NEXT: psrad $24, %xmm1 2429; SSE2-NEXT: retq 2430; 2431; SSSE3-LABEL: load_sext_8i8_to_8i32: 2432; SSSE3: # BB#0: # %entry 2433; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 2434; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2435; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 2436; SSSE3-NEXT: psrad $24, %xmm0 2437; SSSE3-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 2438; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2439; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 2440; SSSE3-NEXT: psrad $24, %xmm1 2441; SSSE3-NEXT: retq 2442; 2443; SSE41-LABEL: load_sext_8i8_to_8i32: 2444; SSE41: # BB#0: # %entry 2445; SSE41-NEXT: pmovsxbd (%rdi), %xmm0 2446; SSE41-NEXT: pmovsxbd 4(%rdi), %xmm1 2447; SSE41-NEXT: retq 2448; 2449; AVX1-LABEL: load_sext_8i8_to_8i32: 2450; AVX1: # BB#0: # %entry 2451; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0 2452; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 2453; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 2454; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 2455; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 2456; AVX1-NEXT: retq 2457; 2458; AVX2-LABEL: load_sext_8i8_to_8i32: 2459; AVX2: # BB#0: # %entry 2460; AVX2-NEXT: vpmovsxbd (%rdi), %ymm0 2461; AVX2-NEXT: retq 2462; 2463; AVX512-LABEL: load_sext_8i8_to_8i32: 2464; AVX512: # BB#0: # %entry 2465; AVX512-NEXT: vpmovsxbd (%rdi), %ymm0 2466; AVX512-NEXT: retq 2467; 2468; X32-SSE41-LABEL: load_sext_8i8_to_8i32: 2469; X32-SSE41: # BB#0: # %entry 2470; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2471; X32-SSE41-NEXT: pmovsxbd (%eax), %xmm0 2472; X32-SSE41-NEXT: pmovsxbd 4(%eax), %xmm1 2473; X32-SSE41-NEXT: retl 2474entry: 2475 %X = load <8 x i8>, <8 x i8>* %ptr 2476 %Y = sext <8 x i8> %X to <8 x i32> 2477 ret <8 x i32> %Y 2478} 2479 2480define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone { 2481; SSE2-LABEL: load_sext_16i1_to_16i8: 2482; SSE2: # BB#0: # %entry 2483; SSE2-NEXT: pushq %rbp 2484; SSE2-NEXT: pushq %r15 2485; SSE2-NEXT: pushq %r14 2486; SSE2-NEXT: pushq %r13 2487; SSE2-NEXT: pushq %r12 2488; SSE2-NEXT: pushq %rbx 2489; SSE2-NEXT: movswq (%rdi), %rax 2490; SSE2-NEXT: movq %rax, %r8 2491; SSE2-NEXT: movq %rax, %r9 2492; SSE2-NEXT: movq %rax, %r10 2493; SSE2-NEXT: movq %rax, %r11 2494; SSE2-NEXT: movq %rax, %r14 2495; SSE2-NEXT: movq %rax, %r15 2496; SSE2-NEXT: movq %rax, %r12 2497; SSE2-NEXT: movq %rax, %r13 2498; SSE2-NEXT: movq %rax, %rbx 2499; SSE2-NEXT: movq %rax, %rcx 2500; SSE2-NEXT: movq %rax, %rdx 2501; SSE2-NEXT: movq %rax, %rsi 2502; SSE2-NEXT: movq %rax, %rdi 2503; SSE2-NEXT: movq %rax, %rbp 2504; SSE2-NEXT: shlq $49, %rbp 2505; SSE2-NEXT: sarq $63, %rbp 2506; SSE2-NEXT: movd %ebp, %xmm0 2507; SSE2-NEXT: movq %rax, %rbp 2508; SSE2-NEXT: movsbq %al, %rax 2509; SSE2-NEXT: shlq $57, %r8 2510; SSE2-NEXT: sarq $63, %r8 2511; SSE2-NEXT: movd %r8d, %xmm1 2512; SSE2-NEXT: shlq $53, %r9 2513; SSE2-NEXT: sarq $63, %r9 2514; SSE2-NEXT: movd %r9d, %xmm2 2515; SSE2-NEXT: shlq $61, %r10 2516; SSE2-NEXT: sarq $63, %r10 2517; SSE2-NEXT: movd %r10d, %xmm3 2518; SSE2-NEXT: shlq $51, %r11 2519; SSE2-NEXT: sarq $63, %r11 2520; SSE2-NEXT: movd %r11d, %xmm4 2521; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2522; SSE2-NEXT: shlq $59, %r14 2523; SSE2-NEXT: sarq $63, %r14 2524; SSE2-NEXT: movd %r14d, %xmm5 2525; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2526; SSE2-NEXT: shlq $55, %r15 2527; SSE2-NEXT: sarq $63, %r15 2528; SSE2-NEXT: movd %r15d, %xmm2 2529; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 2530; SSE2-NEXT: shlq $63, %r12 2531; SSE2-NEXT: sarq $63, %r12 2532; SSE2-NEXT: movd %r12d, %xmm0 2533; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7] 2534; SSE2-NEXT: shlq $50, %r13 2535; SSE2-NEXT: sarq $63, %r13 2536; SSE2-NEXT: movd %r13d, %xmm1 2537; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 2538; SSE2-NEXT: shlq $58, %rbx 2539; SSE2-NEXT: sarq $63, %rbx 2540; SSE2-NEXT: movd %ebx, %xmm2 2541; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] 2542; SSE2-NEXT: shlq $54, %rcx 2543; SSE2-NEXT: sarq $63, %rcx 2544; SSE2-NEXT: movd %ecx, %xmm4 2545; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2546; SSE2-NEXT: shlq $62, %rdx 2547; SSE2-NEXT: sarq $63, %rdx 2548; SSE2-NEXT: movd %edx, %xmm3 2549; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2550; SSE2-NEXT: shlq $52, %rsi 2551; SSE2-NEXT: sarq $63, %rsi 2552; SSE2-NEXT: movd %esi, %xmm1 2553; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 2554; SSE2-NEXT: shlq $60, %rdi 2555; SSE2-NEXT: sarq $63, %rdi 2556; SSE2-NEXT: movd %edi, %xmm4 2557; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2558; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] 2559; SSE2-NEXT: shrq $15, %rbp 2560; SSE2-NEXT: movd %ebp, %xmm1 2561; SSE2-NEXT: shrq $7, %rax 2562; SSE2-NEXT: movd %eax, %xmm2 2563; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2564; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 2565; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 2566; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2567; SSE2-NEXT: popq %rbx 2568; SSE2-NEXT: popq %r12 2569; SSE2-NEXT: popq %r13 2570; SSE2-NEXT: popq %r14 2571; SSE2-NEXT: popq %r15 2572; SSE2-NEXT: popq %rbp 2573; SSE2-NEXT: retq 2574; 2575; SSSE3-LABEL: load_sext_16i1_to_16i8: 2576; SSSE3: # BB#0: # %entry 2577; SSSE3-NEXT: pushq %rbp 2578; SSSE3-NEXT: pushq %r15 2579; SSSE3-NEXT: pushq %r14 2580; SSSE3-NEXT: pushq %r13 2581; SSSE3-NEXT: pushq %r12 2582; SSSE3-NEXT: pushq %rbx 2583; SSSE3-NEXT: movswq (%rdi), %rax 2584; SSSE3-NEXT: movq %rax, %r8 2585; SSSE3-NEXT: movq %rax, %r9 2586; SSSE3-NEXT: movq %rax, %r10 2587; SSSE3-NEXT: movq %rax, %r11 2588; SSSE3-NEXT: movq %rax, %r14 2589; SSSE3-NEXT: movq %rax, %r15 2590; SSSE3-NEXT: movq %rax, %r12 2591; SSSE3-NEXT: movq %rax, %r13 2592; SSSE3-NEXT: movq %rax, %rbx 2593; SSSE3-NEXT: movq %rax, %rcx 2594; SSSE3-NEXT: movq %rax, %rdx 2595; SSSE3-NEXT: movq %rax, %rsi 2596; SSSE3-NEXT: movq %rax, %rdi 2597; SSSE3-NEXT: movq %rax, %rbp 2598; SSSE3-NEXT: shlq $49, %rbp 2599; SSSE3-NEXT: sarq $63, %rbp 2600; SSSE3-NEXT: movd %ebp, %xmm0 2601; SSSE3-NEXT: movq %rax, %rbp 2602; SSSE3-NEXT: movsbq %al, %rax 2603; SSSE3-NEXT: shlq $57, %r8 2604; SSSE3-NEXT: sarq $63, %r8 2605; SSSE3-NEXT: movd %r8d, %xmm1 2606; SSSE3-NEXT: shlq $53, %r9 2607; SSSE3-NEXT: sarq $63, %r9 2608; SSSE3-NEXT: movd %r9d, %xmm2 2609; SSSE3-NEXT: shlq $61, %r10 2610; SSSE3-NEXT: sarq $63, %r10 2611; SSSE3-NEXT: movd %r10d, %xmm3 2612; SSSE3-NEXT: shlq $51, %r11 2613; SSSE3-NEXT: sarq $63, %r11 2614; SSSE3-NEXT: movd %r11d, %xmm4 2615; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2616; SSSE3-NEXT: shlq $59, %r14 2617; SSSE3-NEXT: sarq $63, %r14 2618; SSSE3-NEXT: movd %r14d, %xmm5 2619; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2620; SSSE3-NEXT: shlq $55, %r15 2621; SSSE3-NEXT: sarq $63, %r15 2622; SSSE3-NEXT: movd %r15d, %xmm2 2623; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 2624; SSSE3-NEXT: shlq $63, %r12 2625; SSSE3-NEXT: sarq $63, %r12 2626; SSSE3-NEXT: movd %r12d, %xmm0 2627; SSSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7] 2628; SSSE3-NEXT: shlq $50, %r13 2629; SSSE3-NEXT: sarq $63, %r13 2630; SSSE3-NEXT: movd %r13d, %xmm1 2631; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 2632; SSSE3-NEXT: shlq $58, %rbx 2633; SSSE3-NEXT: sarq $63, %rbx 2634; SSSE3-NEXT: movd %ebx, %xmm2 2635; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] 2636; SSSE3-NEXT: shlq $54, %rcx 2637; SSSE3-NEXT: sarq $63, %rcx 2638; SSSE3-NEXT: movd %ecx, %xmm4 2639; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2640; SSSE3-NEXT: shlq $62, %rdx 2641; SSSE3-NEXT: sarq $63, %rdx 2642; SSSE3-NEXT: movd %edx, %xmm3 2643; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2644; SSSE3-NEXT: shlq $52, %rsi 2645; SSSE3-NEXT: sarq $63, %rsi 2646; SSSE3-NEXT: movd %esi, %xmm1 2647; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 2648; SSSE3-NEXT: shlq $60, %rdi 2649; SSSE3-NEXT: sarq $63, %rdi 2650; SSSE3-NEXT: movd %edi, %xmm4 2651; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2652; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7] 2653; SSSE3-NEXT: shrq $15, %rbp 2654; SSSE3-NEXT: movd %ebp, %xmm1 2655; SSSE3-NEXT: shrq $7, %rax 2656; SSSE3-NEXT: movd %eax, %xmm2 2657; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2658; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 2659; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 2660; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 2661; SSSE3-NEXT: popq %rbx 2662; SSSE3-NEXT: popq %r12 2663; SSSE3-NEXT: popq %r13 2664; SSSE3-NEXT: popq %r14 2665; SSSE3-NEXT: popq %r15 2666; SSSE3-NEXT: popq %rbp 2667; SSSE3-NEXT: retq 2668; 2669; SSE41-LABEL: load_sext_16i1_to_16i8: 2670; SSE41: # BB#0: # %entry 2671; SSE41-NEXT: movswq (%rdi), %rax 2672; SSE41-NEXT: movq %rax, %rcx 2673; SSE41-NEXT: shlq $62, %rcx 2674; SSE41-NEXT: sarq $63, %rcx 2675; SSE41-NEXT: movq %rax, %rdx 2676; SSE41-NEXT: shlq $63, %rdx 2677; SSE41-NEXT: sarq $63, %rdx 2678; SSE41-NEXT: movd %edx, %xmm0 2679; SSE41-NEXT: pinsrb $1, %ecx, %xmm0 2680; SSE41-NEXT: movq %rax, %rcx 2681; SSE41-NEXT: shlq $61, %rcx 2682; SSE41-NEXT: sarq $63, %rcx 2683; SSE41-NEXT: pinsrb $2, %ecx, %xmm0 2684; SSE41-NEXT: movq %rax, %rcx 2685; SSE41-NEXT: shlq $60, %rcx 2686; SSE41-NEXT: sarq $63, %rcx 2687; SSE41-NEXT: pinsrb $3, %ecx, %xmm0 2688; SSE41-NEXT: movq %rax, %rcx 2689; SSE41-NEXT: shlq $59, %rcx 2690; SSE41-NEXT: sarq $63, %rcx 2691; SSE41-NEXT: pinsrb $4, %ecx, %xmm0 2692; SSE41-NEXT: movq %rax, %rcx 2693; SSE41-NEXT: shlq $58, %rcx 2694; SSE41-NEXT: sarq $63, %rcx 2695; SSE41-NEXT: pinsrb $5, %ecx, %xmm0 2696; SSE41-NEXT: movq %rax, %rcx 2697; SSE41-NEXT: shlq $57, %rcx 2698; SSE41-NEXT: sarq $63, %rcx 2699; SSE41-NEXT: pinsrb $6, %ecx, %xmm0 2700; SSE41-NEXT: movsbq %al, %rcx 2701; SSE41-NEXT: shrq $7, %rcx 2702; SSE41-NEXT: pinsrb $7, %ecx, %xmm0 2703; SSE41-NEXT: movq %rax, %rcx 2704; SSE41-NEXT: shlq $55, %rcx 2705; SSE41-NEXT: sarq $63, %rcx 2706; SSE41-NEXT: pinsrb $8, %ecx, %xmm0 2707; SSE41-NEXT: movq %rax, %rcx 2708; SSE41-NEXT: shlq $54, %rcx 2709; SSE41-NEXT: sarq $63, %rcx 2710; SSE41-NEXT: pinsrb $9, %ecx, %xmm0 2711; SSE41-NEXT: movq %rax, %rcx 2712; SSE41-NEXT: shlq $53, %rcx 2713; SSE41-NEXT: sarq $63, %rcx 2714; SSE41-NEXT: pinsrb $10, %ecx, %xmm0 2715; SSE41-NEXT: movq %rax, %rcx 2716; SSE41-NEXT: shlq $52, %rcx 2717; SSE41-NEXT: sarq $63, %rcx 2718; SSE41-NEXT: pinsrb $11, %ecx, %xmm0 2719; SSE41-NEXT: movq %rax, %rcx 2720; SSE41-NEXT: shlq $51, %rcx 2721; SSE41-NEXT: sarq $63, %rcx 2722; SSE41-NEXT: pinsrb $12, %ecx, %xmm0 2723; SSE41-NEXT: movq %rax, %rcx 2724; SSE41-NEXT: shlq $50, %rcx 2725; SSE41-NEXT: sarq $63, %rcx 2726; SSE41-NEXT: pinsrb $13, %ecx, %xmm0 2727; SSE41-NEXT: movq %rax, %rcx 2728; SSE41-NEXT: shlq $49, %rcx 2729; SSE41-NEXT: sarq $63, %rcx 2730; SSE41-NEXT: pinsrb $14, %ecx, %xmm0 2731; SSE41-NEXT: shrq $15, %rax 2732; SSE41-NEXT: pinsrb $15, %eax, %xmm0 2733; SSE41-NEXT: retq 2734; 2735; AVX1-LABEL: load_sext_16i1_to_16i8: 2736; AVX1: # BB#0: # %entry 2737; AVX1-NEXT: movswq (%rdi), %rax 2738; AVX1-NEXT: movq %rax, %rcx 2739; AVX1-NEXT: shlq $62, %rcx 2740; AVX1-NEXT: sarq $63, %rcx 2741; AVX1-NEXT: movq %rax, %rdx 2742; AVX1-NEXT: shlq $63, %rdx 2743; AVX1-NEXT: sarq $63, %rdx 2744; AVX1-NEXT: vmovd %edx, %xmm0 2745; AVX1-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0 2746; AVX1-NEXT: movq %rax, %rcx 2747; AVX1-NEXT: shlq $61, %rcx 2748; AVX1-NEXT: sarq $63, %rcx 2749; AVX1-NEXT: vpinsrb $2, %ecx, %xmm0, %xmm0 2750; AVX1-NEXT: movq %rax, %rcx 2751; AVX1-NEXT: shlq $60, %rcx 2752; AVX1-NEXT: sarq $63, %rcx 2753; AVX1-NEXT: vpinsrb $3, %ecx, %xmm0, %xmm0 2754; AVX1-NEXT: movq %rax, %rcx 2755; AVX1-NEXT: shlq $59, %rcx 2756; AVX1-NEXT: sarq $63, %rcx 2757; AVX1-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 2758; AVX1-NEXT: movq %rax, %rcx 2759; AVX1-NEXT: shlq $58, %rcx 2760; AVX1-NEXT: sarq $63, %rcx 2761; AVX1-NEXT: vpinsrb $5, %ecx, %xmm0, %xmm0 2762; AVX1-NEXT: movq %rax, %rcx 2763; AVX1-NEXT: shlq $57, %rcx 2764; AVX1-NEXT: sarq $63, %rcx 2765; AVX1-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0 2766; AVX1-NEXT: movsbq %al, %rcx 2767; AVX1-NEXT: shrq $7, %rcx 2768; AVX1-NEXT: vpinsrb $7, %ecx, %xmm0, %xmm0 2769; AVX1-NEXT: movq %rax, %rcx 2770; AVX1-NEXT: shlq $55, %rcx 2771; AVX1-NEXT: sarq $63, %rcx 2772; AVX1-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm0 2773; AVX1-NEXT: movq %rax, %rcx 2774; AVX1-NEXT: shlq $54, %rcx 2775; AVX1-NEXT: sarq $63, %rcx 2776; AVX1-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0 2777; AVX1-NEXT: movq %rax, %rcx 2778; AVX1-NEXT: shlq $53, %rcx 2779; AVX1-NEXT: sarq $63, %rcx 2780; AVX1-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0 2781; AVX1-NEXT: movq %rax, %rcx 2782; AVX1-NEXT: shlq $52, %rcx 2783; AVX1-NEXT: sarq $63, %rcx 2784; AVX1-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0 2785; AVX1-NEXT: movq %rax, %rcx 2786; AVX1-NEXT: shlq $51, %rcx 2787; AVX1-NEXT: sarq $63, %rcx 2788; AVX1-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0 2789; AVX1-NEXT: movq %rax, %rcx 2790; AVX1-NEXT: shlq $50, %rcx 2791; AVX1-NEXT: sarq $63, %rcx 2792; AVX1-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0 2793; AVX1-NEXT: movq %rax, %rcx 2794; AVX1-NEXT: shlq $49, %rcx 2795; AVX1-NEXT: sarq $63, %rcx 2796; AVX1-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0 2797; AVX1-NEXT: shrq $15, %rax 2798; AVX1-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 2799; AVX1-NEXT: retq 2800; 2801; AVX2-LABEL: load_sext_16i1_to_16i8: 2802; AVX2: # BB#0: # %entry 2803; AVX2-NEXT: movswq (%rdi), %rax 2804; AVX2-NEXT: movq %rax, %rcx 2805; AVX2-NEXT: shlq $62, %rcx 2806; AVX2-NEXT: sarq $63, %rcx 2807; AVX2-NEXT: movq %rax, %rdx 2808; AVX2-NEXT: shlq $63, %rdx 2809; AVX2-NEXT: sarq $63, %rdx 2810; AVX2-NEXT: vmovd %edx, %xmm0 2811; AVX2-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0 2812; AVX2-NEXT: movq %rax, %rcx 2813; AVX2-NEXT: shlq $61, %rcx 2814; AVX2-NEXT: sarq $63, %rcx 2815; AVX2-NEXT: vpinsrb $2, %ecx, %xmm0, %xmm0 2816; AVX2-NEXT: movq %rax, %rcx 2817; AVX2-NEXT: shlq $60, %rcx 2818; AVX2-NEXT: sarq $63, %rcx 2819; AVX2-NEXT: vpinsrb $3, %ecx, %xmm0, %xmm0 2820; AVX2-NEXT: movq %rax, %rcx 2821; AVX2-NEXT: shlq $59, %rcx 2822; AVX2-NEXT: sarq $63, %rcx 2823; AVX2-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 2824; AVX2-NEXT: movq %rax, %rcx 2825; AVX2-NEXT: shlq $58, %rcx 2826; AVX2-NEXT: sarq $63, %rcx 2827; AVX2-NEXT: vpinsrb $5, %ecx, %xmm0, %xmm0 2828; AVX2-NEXT: movq %rax, %rcx 2829; AVX2-NEXT: shlq $57, %rcx 2830; AVX2-NEXT: sarq $63, %rcx 2831; AVX2-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0 2832; AVX2-NEXT: movsbq %al, %rcx 2833; AVX2-NEXT: shrq $7, %rcx 2834; AVX2-NEXT: vpinsrb $7, %ecx, %xmm0, %xmm0 2835; AVX2-NEXT: movq %rax, %rcx 2836; AVX2-NEXT: shlq $55, %rcx 2837; AVX2-NEXT: sarq $63, %rcx 2838; AVX2-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm0 2839; AVX2-NEXT: movq %rax, %rcx 2840; AVX2-NEXT: shlq $54, %rcx 2841; AVX2-NEXT: sarq $63, %rcx 2842; AVX2-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0 2843; AVX2-NEXT: movq %rax, %rcx 2844; AVX2-NEXT: shlq $53, %rcx 2845; AVX2-NEXT: sarq $63, %rcx 2846; AVX2-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0 2847; AVX2-NEXT: movq %rax, %rcx 2848; AVX2-NEXT: shlq $52, %rcx 2849; AVX2-NEXT: sarq $63, %rcx 2850; AVX2-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0 2851; AVX2-NEXT: movq %rax, %rcx 2852; AVX2-NEXT: shlq $51, %rcx 2853; AVX2-NEXT: sarq $63, %rcx 2854; AVX2-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0 2855; AVX2-NEXT: movq %rax, %rcx 2856; AVX2-NEXT: shlq $50, %rcx 2857; AVX2-NEXT: sarq $63, %rcx 2858; AVX2-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0 2859; AVX2-NEXT: movq %rax, %rcx 2860; AVX2-NEXT: shlq $49, %rcx 2861; AVX2-NEXT: sarq $63, %rcx 2862; AVX2-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0 2863; AVX2-NEXT: shrq $15, %rax 2864; AVX2-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 2865; AVX2-NEXT: retq 2866; 2867; AVX512-LABEL: load_sext_16i1_to_16i8: 2868; AVX512: # BB#0: # %entry 2869; AVX512-NEXT: kmovw (%rdi), %k1 2870; AVX512-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 2871; AVX512-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z} 2872; AVX512-NEXT: vpmovdb %zmm0, %xmm0 2873; AVX512-NEXT: retq 2874; 2875; X32-SSE41-LABEL: load_sext_16i1_to_16i8: 2876; X32-SSE41: # BB#0: # %entry 2877; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2878; X32-SSE41-NEXT: movswl (%eax), %eax 2879; X32-SSE41-NEXT: movl %eax, %ecx 2880; X32-SSE41-NEXT: shll $30, %ecx 2881; X32-SSE41-NEXT: sarl $31, %ecx 2882; X32-SSE41-NEXT: movl %eax, %edx 2883; X32-SSE41-NEXT: shll $31, %edx 2884; X32-SSE41-NEXT: sarl $31, %edx 2885; X32-SSE41-NEXT: movd %edx, %xmm0 2886; X32-SSE41-NEXT: pinsrb $1, %ecx, %xmm0 2887; X32-SSE41-NEXT: movl %eax, %ecx 2888; X32-SSE41-NEXT: shll $29, %ecx 2889; X32-SSE41-NEXT: sarl $31, %ecx 2890; X32-SSE41-NEXT: pinsrb $2, %ecx, %xmm0 2891; X32-SSE41-NEXT: movl %eax, %ecx 2892; X32-SSE41-NEXT: shll $28, %ecx 2893; X32-SSE41-NEXT: sarl $31, %ecx 2894; X32-SSE41-NEXT: pinsrb $3, %ecx, %xmm0 2895; X32-SSE41-NEXT: movl %eax, %ecx 2896; X32-SSE41-NEXT: shll $27, %ecx 2897; X32-SSE41-NEXT: sarl $31, %ecx 2898; X32-SSE41-NEXT: pinsrb $4, %ecx, %xmm0 2899; X32-SSE41-NEXT: movl %eax, %ecx 2900; X32-SSE41-NEXT: shll $26, %ecx 2901; X32-SSE41-NEXT: sarl $31, %ecx 2902; X32-SSE41-NEXT: pinsrb $5, %ecx, %xmm0 2903; X32-SSE41-NEXT: movl %eax, %ecx 2904; X32-SSE41-NEXT: shll $25, %ecx 2905; X32-SSE41-NEXT: sarl $31, %ecx 2906; X32-SSE41-NEXT: pinsrb $6, %ecx, %xmm0 2907; X32-SSE41-NEXT: movsbl %al, %ecx 2908; X32-SSE41-NEXT: shrl $7, %ecx 2909; X32-SSE41-NEXT: pinsrb $7, %ecx, %xmm0 2910; X32-SSE41-NEXT: movl %eax, %ecx 2911; X32-SSE41-NEXT: shll $23, %ecx 2912; X32-SSE41-NEXT: sarl $31, %ecx 2913; X32-SSE41-NEXT: pinsrb $8, %ecx, %xmm0 2914; X32-SSE41-NEXT: movl %eax, %ecx 2915; X32-SSE41-NEXT: shll $22, %ecx 2916; X32-SSE41-NEXT: sarl $31, %ecx 2917; X32-SSE41-NEXT: pinsrb $9, %ecx, %xmm0 2918; X32-SSE41-NEXT: movl %eax, %ecx 2919; X32-SSE41-NEXT: shll $21, %ecx 2920; X32-SSE41-NEXT: sarl $31, %ecx 2921; X32-SSE41-NEXT: pinsrb $10, %ecx, %xmm0 2922; X32-SSE41-NEXT: movl %eax, %ecx 2923; X32-SSE41-NEXT: shll $20, %ecx 2924; X32-SSE41-NEXT: sarl $31, %ecx 2925; X32-SSE41-NEXT: pinsrb $11, %ecx, %xmm0 2926; X32-SSE41-NEXT: movl %eax, %ecx 2927; X32-SSE41-NEXT: shll $19, %ecx 2928; X32-SSE41-NEXT: sarl $31, %ecx 2929; X32-SSE41-NEXT: pinsrb $12, %ecx, %xmm0 2930; X32-SSE41-NEXT: movl %eax, %ecx 2931; X32-SSE41-NEXT: shll $18, %ecx 2932; X32-SSE41-NEXT: sarl $31, %ecx 2933; X32-SSE41-NEXT: pinsrb $13, %ecx, %xmm0 2934; X32-SSE41-NEXT: movl %eax, %ecx 2935; X32-SSE41-NEXT: shll $17, %ecx 2936; X32-SSE41-NEXT: sarl $31, %ecx 2937; X32-SSE41-NEXT: pinsrb $14, %ecx, %xmm0 2938; X32-SSE41-NEXT: shrl $15, %eax 2939; X32-SSE41-NEXT: pinsrb $15, %eax, %xmm0 2940; X32-SSE41-NEXT: retl 2941entry: 2942 %X = load <16 x i1>, <16 x i1>* %ptr 2943 %Y = sext <16 x i1> %X to <16 x i8> 2944 ret <16 x i8> %Y 2945} 2946 2947define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) { 2948; SSE2-LABEL: load_sext_16i1_to_16i16: 2949; SSE2: # BB#0: # %entry 2950; SSE2-NEXT: movzwl (%rdi), %eax 2951; SSE2-NEXT: movl %eax, %ecx 2952; SSE2-NEXT: shrl $14, %ecx 2953; SSE2-NEXT: andl $1, %ecx 2954; SSE2-NEXT: movd %ecx, %xmm0 2955; SSE2-NEXT: movl %eax, %ecx 2956; SSE2-NEXT: shrl $6, %ecx 2957; SSE2-NEXT: andl $1, %ecx 2958; SSE2-NEXT: movd %ecx, %xmm1 2959; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2960; SSE2-NEXT: movl %eax, %ecx 2961; SSE2-NEXT: shrl $10, %ecx 2962; SSE2-NEXT: andl $1, %ecx 2963; SSE2-NEXT: movd %ecx, %xmm0 2964; SSE2-NEXT: movl %eax, %ecx 2965; SSE2-NEXT: shrl $2, %ecx 2966; SSE2-NEXT: andl $1, %ecx 2967; SSE2-NEXT: movd %ecx, %xmm2 2968; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 2969; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 2970; SSE2-NEXT: movl %eax, %ecx 2971; SSE2-NEXT: shrl $12, %ecx 2972; SSE2-NEXT: andl $1, %ecx 2973; SSE2-NEXT: movd %ecx, %xmm0 2974; SSE2-NEXT: movl %eax, %ecx 2975; SSE2-NEXT: shrl $4, %ecx 2976; SSE2-NEXT: andl $1, %ecx 2977; SSE2-NEXT: movd %ecx, %xmm3 2978; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 2979; SSE2-NEXT: movl %eax, %ecx 2980; SSE2-NEXT: andl $1, %ecx 2981; SSE2-NEXT: movd %ecx, %xmm1 2982; SSE2-NEXT: movl %eax, %ecx 2983; SSE2-NEXT: shrl $8, %ecx 2984; SSE2-NEXT: andl $1, %ecx 2985; SSE2-NEXT: movd %ecx, %xmm0 2986; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2987; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 2988; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 2989; SSE2-NEXT: movl %eax, %ecx 2990; SSE2-NEXT: shrl $13, %ecx 2991; SSE2-NEXT: andl $1, %ecx 2992; SSE2-NEXT: movd %ecx, %xmm0 2993; SSE2-NEXT: movl %eax, %ecx 2994; SSE2-NEXT: shrl $5, %ecx 2995; SSE2-NEXT: andl $1, %ecx 2996; SSE2-NEXT: movd %ecx, %xmm2 2997; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 2998; SSE2-NEXT: movl %eax, %ecx 2999; SSE2-NEXT: shrl $9, %ecx 3000; SSE2-NEXT: andl $1, %ecx 3001; SSE2-NEXT: movd %ecx, %xmm3 3002; SSE2-NEXT: movl %eax, %ecx 3003; SSE2-NEXT: shrl %ecx 3004; SSE2-NEXT: andl $1, %ecx 3005; SSE2-NEXT: movd %ecx, %xmm0 3006; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 3007; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 3008; SSE2-NEXT: movl %eax, %ecx 3009; SSE2-NEXT: shrl $11, %ecx 3010; SSE2-NEXT: andl $1, %ecx 3011; SSE2-NEXT: movd %ecx, %xmm2 3012; SSE2-NEXT: movl %eax, %ecx 3013; SSE2-NEXT: shrl $3, %ecx 3014; SSE2-NEXT: andl $1, %ecx 3015; SSE2-NEXT: movd %ecx, %xmm3 3016; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3017; SSE2-NEXT: movl %eax, %ecx 3018; SSE2-NEXT: shrl $7, %ecx 3019; SSE2-NEXT: andl $1, %ecx 3020; SSE2-NEXT: movd %ecx, %xmm2 3021; SSE2-NEXT: shrl $15, %eax 3022; SSE2-NEXT: movzwl %ax, %eax 3023; SSE2-NEXT: movd %eax, %xmm4 3024; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7] 3025; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3026; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 3027; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 3028; SSE2-NEXT: movdqa %xmm1, %xmm0 3029; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3030; SSE2-NEXT: psllw $15, %xmm0 3031; SSE2-NEXT: psraw $15, %xmm0 3032; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 3033; SSE2-NEXT: psllw $15, %xmm1 3034; SSE2-NEXT: psraw $15, %xmm1 3035; SSE2-NEXT: retq 3036; 3037; SSSE3-LABEL: load_sext_16i1_to_16i16: 3038; SSSE3: # BB#0: # %entry 3039; SSSE3-NEXT: movzwl (%rdi), %eax 3040; SSSE3-NEXT: movl %eax, %ecx 3041; SSSE3-NEXT: shrl $14, %ecx 3042; SSSE3-NEXT: andl $1, %ecx 3043; SSSE3-NEXT: movd %ecx, %xmm0 3044; SSSE3-NEXT: movl %eax, %ecx 3045; SSSE3-NEXT: shrl $6, %ecx 3046; SSSE3-NEXT: andl $1, %ecx 3047; SSSE3-NEXT: movd %ecx, %xmm1 3048; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 3049; SSSE3-NEXT: movl %eax, %ecx 3050; SSSE3-NEXT: shrl $10, %ecx 3051; SSSE3-NEXT: andl $1, %ecx 3052; SSSE3-NEXT: movd %ecx, %xmm0 3053; SSSE3-NEXT: movl %eax, %ecx 3054; SSSE3-NEXT: shrl $2, %ecx 3055; SSSE3-NEXT: andl $1, %ecx 3056; SSSE3-NEXT: movd %ecx, %xmm2 3057; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 3058; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 3059; SSSE3-NEXT: movl %eax, %ecx 3060; SSSE3-NEXT: shrl $12, %ecx 3061; SSSE3-NEXT: andl $1, %ecx 3062; SSSE3-NEXT: movd %ecx, %xmm0 3063; SSSE3-NEXT: movl %eax, %ecx 3064; SSSE3-NEXT: shrl $4, %ecx 3065; SSSE3-NEXT: andl $1, %ecx 3066; SSSE3-NEXT: movd %ecx, %xmm3 3067; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 3068; SSSE3-NEXT: movl %eax, %ecx 3069; SSSE3-NEXT: andl $1, %ecx 3070; SSSE3-NEXT: movd %ecx, %xmm1 3071; SSSE3-NEXT: movl %eax, %ecx 3072; SSSE3-NEXT: shrl $8, %ecx 3073; SSSE3-NEXT: andl $1, %ecx 3074; SSSE3-NEXT: movd %ecx, %xmm0 3075; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 3076; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 3077; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 3078; SSSE3-NEXT: movl %eax, %ecx 3079; SSSE3-NEXT: shrl $13, %ecx 3080; SSSE3-NEXT: andl $1, %ecx 3081; SSSE3-NEXT: movd %ecx, %xmm0 3082; SSSE3-NEXT: movl %eax, %ecx 3083; SSSE3-NEXT: shrl $5, %ecx 3084; SSSE3-NEXT: andl $1, %ecx 3085; SSSE3-NEXT: movd %ecx, %xmm2 3086; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 3087; SSSE3-NEXT: movl %eax, %ecx 3088; SSSE3-NEXT: shrl $9, %ecx 3089; SSSE3-NEXT: andl $1, %ecx 3090; SSSE3-NEXT: movd %ecx, %xmm3 3091; SSSE3-NEXT: movl %eax, %ecx 3092; SSSE3-NEXT: shrl %ecx 3093; SSSE3-NEXT: andl $1, %ecx 3094; SSSE3-NEXT: movd %ecx, %xmm0 3095; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 3096; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 3097; SSSE3-NEXT: movl %eax, %ecx 3098; SSSE3-NEXT: shrl $11, %ecx 3099; SSSE3-NEXT: andl $1, %ecx 3100; SSSE3-NEXT: movd %ecx, %xmm2 3101; SSSE3-NEXT: movl %eax, %ecx 3102; SSSE3-NEXT: shrl $3, %ecx 3103; SSSE3-NEXT: andl $1, %ecx 3104; SSSE3-NEXT: movd %ecx, %xmm3 3105; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3106; SSSE3-NEXT: movl %eax, %ecx 3107; SSSE3-NEXT: shrl $7, %ecx 3108; SSSE3-NEXT: andl $1, %ecx 3109; SSSE3-NEXT: movd %ecx, %xmm2 3110; SSSE3-NEXT: shrl $15, %eax 3111; SSSE3-NEXT: movzwl %ax, %eax 3112; SSSE3-NEXT: movd %eax, %xmm4 3113; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7] 3114; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3115; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 3116; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 3117; SSSE3-NEXT: movdqa %xmm1, %xmm0 3118; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3119; SSSE3-NEXT: psllw $15, %xmm0 3120; SSSE3-NEXT: psraw $15, %xmm0 3121; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 3122; SSSE3-NEXT: psllw $15, %xmm1 3123; SSSE3-NEXT: psraw $15, %xmm1 3124; SSSE3-NEXT: retq 3125; 3126; SSE41-LABEL: load_sext_16i1_to_16i16: 3127; SSE41: # BB#0: # %entry 3128; SSE41-NEXT: movzwl (%rdi), %eax 3129; SSE41-NEXT: movl %eax, %ecx 3130; SSE41-NEXT: shrl %ecx 3131; SSE41-NEXT: andl $1, %ecx 3132; SSE41-NEXT: movl %eax, %edx 3133; SSE41-NEXT: andl $1, %edx 3134; SSE41-NEXT: movd %edx, %xmm1 3135; SSE41-NEXT: pinsrb $1, %ecx, %xmm1 3136; SSE41-NEXT: movl %eax, %ecx 3137; SSE41-NEXT: shrl $2, %ecx 3138; SSE41-NEXT: andl $1, %ecx 3139; SSE41-NEXT: pinsrb $2, %ecx, %xmm1 3140; SSE41-NEXT: movl %eax, %ecx 3141; SSE41-NEXT: shrl $3, %ecx 3142; SSE41-NEXT: andl $1, %ecx 3143; SSE41-NEXT: pinsrb $3, %ecx, %xmm1 3144; SSE41-NEXT: movl %eax, %ecx 3145; SSE41-NEXT: shrl $4, %ecx 3146; SSE41-NEXT: andl $1, %ecx 3147; SSE41-NEXT: pinsrb $4, %ecx, %xmm1 3148; SSE41-NEXT: movl %eax, %ecx 3149; SSE41-NEXT: shrl $5, %ecx 3150; SSE41-NEXT: andl $1, %ecx 3151; SSE41-NEXT: pinsrb $5, %ecx, %xmm1 3152; SSE41-NEXT: movl %eax, %ecx 3153; SSE41-NEXT: shrl $6, %ecx 3154; SSE41-NEXT: andl $1, %ecx 3155; SSE41-NEXT: pinsrb $6, %ecx, %xmm1 3156; SSE41-NEXT: movl %eax, %ecx 3157; SSE41-NEXT: shrl $7, %ecx 3158; SSE41-NEXT: andl $1, %ecx 3159; SSE41-NEXT: pinsrb $7, %ecx, %xmm1 3160; SSE41-NEXT: movl %eax, %ecx 3161; SSE41-NEXT: shrl $8, %ecx 3162; SSE41-NEXT: andl $1, %ecx 3163; SSE41-NEXT: pinsrb $8, %ecx, %xmm1 3164; SSE41-NEXT: movl %eax, %ecx 3165; SSE41-NEXT: shrl $9, %ecx 3166; SSE41-NEXT: andl $1, %ecx 3167; SSE41-NEXT: pinsrb $9, %ecx, %xmm1 3168; SSE41-NEXT: movl %eax, %ecx 3169; SSE41-NEXT: shrl $10, %ecx 3170; SSE41-NEXT: andl $1, %ecx 3171; SSE41-NEXT: pinsrb $10, %ecx, %xmm1 3172; SSE41-NEXT: movl %eax, %ecx 3173; SSE41-NEXT: shrl $11, %ecx 3174; SSE41-NEXT: andl $1, %ecx 3175; SSE41-NEXT: pinsrb $11, %ecx, %xmm1 3176; SSE41-NEXT: movl %eax, %ecx 3177; SSE41-NEXT: shrl $12, %ecx 3178; SSE41-NEXT: andl $1, %ecx 3179; SSE41-NEXT: pinsrb $12, %ecx, %xmm1 3180; SSE41-NEXT: movl %eax, %ecx 3181; SSE41-NEXT: shrl $13, %ecx 3182; SSE41-NEXT: andl $1, %ecx 3183; SSE41-NEXT: pinsrb $13, %ecx, %xmm1 3184; SSE41-NEXT: movl %eax, %ecx 3185; SSE41-NEXT: shrl $14, %ecx 3186; SSE41-NEXT: andl $1, %ecx 3187; SSE41-NEXT: pinsrb $14, %ecx, %xmm1 3188; SSE41-NEXT: shrl $15, %eax 3189; SSE41-NEXT: movzwl %ax, %eax 3190; SSE41-NEXT: pinsrb $15, %eax, %xmm1 3191; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 3192; SSE41-NEXT: psllw $15, %xmm0 3193; SSE41-NEXT: psraw $15, %xmm0 3194; SSE41-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 3195; SSE41-NEXT: psllw $15, %xmm1 3196; SSE41-NEXT: psraw $15, %xmm1 3197; SSE41-NEXT: retq 3198; 3199; AVX1-LABEL: load_sext_16i1_to_16i16: 3200; AVX1: # BB#0: # %entry 3201; AVX1-NEXT: pushq %rbp 3202; AVX1-NEXT: .Ltmp0: 3203; AVX1-NEXT: .cfi_def_cfa_offset 16 3204; AVX1-NEXT: pushq %r15 3205; AVX1-NEXT: .Ltmp1: 3206; AVX1-NEXT: .cfi_def_cfa_offset 24 3207; AVX1-NEXT: pushq %r14 3208; AVX1-NEXT: .Ltmp2: 3209; AVX1-NEXT: .cfi_def_cfa_offset 32 3210; AVX1-NEXT: pushq %r13 3211; AVX1-NEXT: .Ltmp3: 3212; AVX1-NEXT: .cfi_def_cfa_offset 40 3213; AVX1-NEXT: pushq %r12 3214; AVX1-NEXT: .Ltmp4: 3215; AVX1-NEXT: .cfi_def_cfa_offset 48 3216; AVX1-NEXT: pushq %rbx 3217; AVX1-NEXT: .Ltmp5: 3218; AVX1-NEXT: .cfi_def_cfa_offset 56 3219; AVX1-NEXT: .Ltmp6: 3220; AVX1-NEXT: .cfi_offset %rbx, -56 3221; AVX1-NEXT: .Ltmp7: 3222; AVX1-NEXT: .cfi_offset %r12, -48 3223; AVX1-NEXT: .Ltmp8: 3224; AVX1-NEXT: .cfi_offset %r13, -40 3225; AVX1-NEXT: .Ltmp9: 3226; AVX1-NEXT: .cfi_offset %r14, -32 3227; AVX1-NEXT: .Ltmp10: 3228; AVX1-NEXT: .cfi_offset %r15, -24 3229; AVX1-NEXT: .Ltmp11: 3230; AVX1-NEXT: .cfi_offset %rbp, -16 3231; AVX1-NEXT: movswq (%rdi), %rax 3232; AVX1-NEXT: movq %rax, %rcx 3233; AVX1-NEXT: shlq $55, %rcx 3234; AVX1-NEXT: sarq $63, %rcx 3235; AVX1-NEXT: vmovd %ecx, %xmm0 3236; AVX1-NEXT: movq %rax, %r8 3237; AVX1-NEXT: movq %rax, %r10 3238; AVX1-NEXT: movq %rax, %r11 3239; AVX1-NEXT: movq %rax, %r14 3240; AVX1-NEXT: movq %rax, %r15 3241; AVX1-NEXT: movq %rax, %r9 3242; AVX1-NEXT: movq %rax, %r12 3243; AVX1-NEXT: movq %rax, %r13 3244; AVX1-NEXT: movq %rax, %rbx 3245; AVX1-NEXT: movq %rax, %rdi 3246; AVX1-NEXT: movq %rax, %rcx 3247; AVX1-NEXT: movq %rax, %rdx 3248; AVX1-NEXT: movq %rax, %rsi 3249; AVX1-NEXT: movsbq %al, %rbp 3250; AVX1-NEXT: shlq $54, %rax 3251; AVX1-NEXT: sarq $63, %rax 3252; AVX1-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 3253; AVX1-NEXT: shlq $53, %r8 3254; AVX1-NEXT: sarq $63, %r8 3255; AVX1-NEXT: vpinsrw $2, %r8d, %xmm0, %xmm0 3256; AVX1-NEXT: shlq $52, %r10 3257; AVX1-NEXT: sarq $63, %r10 3258; AVX1-NEXT: vpinsrw $3, %r10d, %xmm0, %xmm0 3259; AVX1-NEXT: shlq $51, %r11 3260; AVX1-NEXT: sarq $63, %r11 3261; AVX1-NEXT: vpinsrw $4, %r11d, %xmm0, %xmm0 3262; AVX1-NEXT: shlq $50, %r14 3263; AVX1-NEXT: sarq $63, %r14 3264; AVX1-NEXT: vpinsrw $5, %r14d, %xmm0, %xmm0 3265; AVX1-NEXT: shlq $49, %r15 3266; AVX1-NEXT: sarq $63, %r15 3267; AVX1-NEXT: vpinsrw $6, %r15d, %xmm0, %xmm0 3268; AVX1-NEXT: shrq $15, %r9 3269; AVX1-NEXT: vpinsrw $7, %r9d, %xmm0, %xmm0 3270; AVX1-NEXT: shlq $63, %r13 3271; AVX1-NEXT: sarq $63, %r13 3272; AVX1-NEXT: vmovd %r13d, %xmm1 3273; AVX1-NEXT: shlq $62, %r12 3274; AVX1-NEXT: sarq $63, %r12 3275; AVX1-NEXT: vpinsrw $1, %r12d, %xmm1, %xmm1 3276; AVX1-NEXT: shlq $61, %rbx 3277; AVX1-NEXT: sarq $63, %rbx 3278; AVX1-NEXT: vpinsrw $2, %ebx, %xmm1, %xmm1 3279; AVX1-NEXT: shlq $60, %rdi 3280; AVX1-NEXT: sarq $63, %rdi 3281; AVX1-NEXT: vpinsrw $3, %edi, %xmm1, %xmm1 3282; AVX1-NEXT: shlq $59, %rcx 3283; AVX1-NEXT: sarq $63, %rcx 3284; AVX1-NEXT: vpinsrw $4, %ecx, %xmm1, %xmm1 3285; AVX1-NEXT: shlq $58, %rdx 3286; AVX1-NEXT: sarq $63, %rdx 3287; AVX1-NEXT: vpinsrw $5, %edx, %xmm1, %xmm1 3288; AVX1-NEXT: shlq $57, %rsi 3289; AVX1-NEXT: sarq $63, %rsi 3290; AVX1-NEXT: vpinsrw $6, %esi, %xmm1, %xmm1 3291; AVX1-NEXT: shrq $7, %rbp 3292; AVX1-NEXT: vpinsrw $7, %ebp, %xmm1, %xmm1 3293; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 3294; AVX1-NEXT: popq %rbx 3295; AVX1-NEXT: popq %r12 3296; AVX1-NEXT: popq %r13 3297; AVX1-NEXT: popq %r14 3298; AVX1-NEXT: popq %r15 3299; AVX1-NEXT: popq %rbp 3300; AVX1-NEXT: retq 3301; 3302; AVX2-LABEL: load_sext_16i1_to_16i16: 3303; AVX2: # BB#0: # %entry 3304; AVX2-NEXT: pushq %rbp 3305; AVX2-NEXT: .Ltmp0: 3306; AVX2-NEXT: .cfi_def_cfa_offset 16 3307; AVX2-NEXT: pushq %r15 3308; AVX2-NEXT: .Ltmp1: 3309; AVX2-NEXT: .cfi_def_cfa_offset 24 3310; AVX2-NEXT: pushq %r14 3311; AVX2-NEXT: .Ltmp2: 3312; AVX2-NEXT: .cfi_def_cfa_offset 32 3313; AVX2-NEXT: pushq %r13 3314; AVX2-NEXT: .Ltmp3: 3315; AVX2-NEXT: .cfi_def_cfa_offset 40 3316; AVX2-NEXT: pushq %r12 3317; AVX2-NEXT: .Ltmp4: 3318; AVX2-NEXT: .cfi_def_cfa_offset 48 3319; AVX2-NEXT: pushq %rbx 3320; AVX2-NEXT: .Ltmp5: 3321; AVX2-NEXT: .cfi_def_cfa_offset 56 3322; AVX2-NEXT: .Ltmp6: 3323; AVX2-NEXT: .cfi_offset %rbx, -56 3324; AVX2-NEXT: .Ltmp7: 3325; AVX2-NEXT: .cfi_offset %r12, -48 3326; AVX2-NEXT: .Ltmp8: 3327; AVX2-NEXT: .cfi_offset %r13, -40 3328; AVX2-NEXT: .Ltmp9: 3329; AVX2-NEXT: .cfi_offset %r14, -32 3330; AVX2-NEXT: .Ltmp10: 3331; AVX2-NEXT: .cfi_offset %r15, -24 3332; AVX2-NEXT: .Ltmp11: 3333; AVX2-NEXT: .cfi_offset %rbp, -16 3334; AVX2-NEXT: movswq (%rdi), %rax 3335; AVX2-NEXT: movq %rax, %rcx 3336; AVX2-NEXT: shlq $55, %rcx 3337; AVX2-NEXT: sarq $63, %rcx 3338; AVX2-NEXT: vmovd %ecx, %xmm0 3339; AVX2-NEXT: movq %rax, %r8 3340; AVX2-NEXT: movq %rax, %r10 3341; AVX2-NEXT: movq %rax, %r11 3342; AVX2-NEXT: movq %rax, %r14 3343; AVX2-NEXT: movq %rax, %r15 3344; AVX2-NEXT: movq %rax, %r9 3345; AVX2-NEXT: movq %rax, %r12 3346; AVX2-NEXT: movq %rax, %r13 3347; AVX2-NEXT: movq %rax, %rbx 3348; AVX2-NEXT: movq %rax, %rdi 3349; AVX2-NEXT: movq %rax, %rcx 3350; AVX2-NEXT: movq %rax, %rdx 3351; AVX2-NEXT: movq %rax, %rsi 3352; AVX2-NEXT: movsbq %al, %rbp 3353; AVX2-NEXT: shlq $54, %rax 3354; AVX2-NEXT: sarq $63, %rax 3355; AVX2-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 3356; AVX2-NEXT: shlq $53, %r8 3357; AVX2-NEXT: sarq $63, %r8 3358; AVX2-NEXT: vpinsrw $2, %r8d, %xmm0, %xmm0 3359; AVX2-NEXT: shlq $52, %r10 3360; AVX2-NEXT: sarq $63, %r10 3361; AVX2-NEXT: vpinsrw $3, %r10d, %xmm0, %xmm0 3362; AVX2-NEXT: shlq $51, %r11 3363; AVX2-NEXT: sarq $63, %r11 3364; AVX2-NEXT: vpinsrw $4, %r11d, %xmm0, %xmm0 3365; AVX2-NEXT: shlq $50, %r14 3366; AVX2-NEXT: sarq $63, %r14 3367; AVX2-NEXT: vpinsrw $5, %r14d, %xmm0, %xmm0 3368; AVX2-NEXT: shlq $49, %r15 3369; AVX2-NEXT: sarq $63, %r15 3370; AVX2-NEXT: vpinsrw $6, %r15d, %xmm0, %xmm0 3371; AVX2-NEXT: shrq $15, %r9 3372; AVX2-NEXT: vpinsrw $7, %r9d, %xmm0, %xmm0 3373; AVX2-NEXT: shlq $63, %r13 3374; AVX2-NEXT: sarq $63, %r13 3375; AVX2-NEXT: vmovd %r13d, %xmm1 3376; AVX2-NEXT: shlq $62, %r12 3377; AVX2-NEXT: sarq $63, %r12 3378; AVX2-NEXT: vpinsrw $1, %r12d, %xmm1, %xmm1 3379; AVX2-NEXT: shlq $61, %rbx 3380; AVX2-NEXT: sarq $63, %rbx 3381; AVX2-NEXT: vpinsrw $2, %ebx, %xmm1, %xmm1 3382; AVX2-NEXT: shlq $60, %rdi 3383; AVX2-NEXT: sarq $63, %rdi 3384; AVX2-NEXT: vpinsrw $3, %edi, %xmm1, %xmm1 3385; AVX2-NEXT: shlq $59, %rcx 3386; AVX2-NEXT: sarq $63, %rcx 3387; AVX2-NEXT: vpinsrw $4, %ecx, %xmm1, %xmm1 3388; AVX2-NEXT: shlq $58, %rdx 3389; AVX2-NEXT: sarq $63, %rdx 3390; AVX2-NEXT: vpinsrw $5, %edx, %xmm1, %xmm1 3391; AVX2-NEXT: shlq $57, %rsi 3392; AVX2-NEXT: sarq $63, %rsi 3393; AVX2-NEXT: vpinsrw $6, %esi, %xmm1, %xmm1 3394; AVX2-NEXT: shrq $7, %rbp 3395; AVX2-NEXT: vpinsrw $7, %ebp, %xmm1, %xmm1 3396; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 3397; AVX2-NEXT: popq %rbx 3398; AVX2-NEXT: popq %r12 3399; AVX2-NEXT: popq %r13 3400; AVX2-NEXT: popq %r14 3401; AVX2-NEXT: popq %r15 3402; AVX2-NEXT: popq %rbp 3403; AVX2-NEXT: retq 3404; 3405; AVX512-LABEL: load_sext_16i1_to_16i16: 3406; AVX512: # BB#0: # %entry 3407; AVX512-NEXT: kmovw (%rdi), %k1 3408; AVX512-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 3409; AVX512-NEXT: vmovdqa32 %zmm0, %zmm0 {%k1} {z} 3410; AVX512-NEXT: vpmovdw %zmm0, %ymm0 3411; AVX512-NEXT: retq 3412; 3413; X32-SSE41-LABEL: load_sext_16i1_to_16i16: 3414; X32-SSE41: # BB#0: # %entry 3415; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 3416; X32-SSE41-NEXT: movzwl (%eax), %eax 3417; X32-SSE41-NEXT: movl %eax, %ecx 3418; X32-SSE41-NEXT: shrl %ecx 3419; X32-SSE41-NEXT: andl $1, %ecx 3420; X32-SSE41-NEXT: movl %eax, %edx 3421; X32-SSE41-NEXT: andl $1, %edx 3422; X32-SSE41-NEXT: movd %edx, %xmm1 3423; X32-SSE41-NEXT: pinsrb $1, %ecx, %xmm1 3424; X32-SSE41-NEXT: movl %eax, %ecx 3425; X32-SSE41-NEXT: shrl $2, %ecx 3426; X32-SSE41-NEXT: andl $1, %ecx 3427; X32-SSE41-NEXT: pinsrb $2, %ecx, %xmm1 3428; X32-SSE41-NEXT: movl %eax, %ecx 3429; X32-SSE41-NEXT: shrl $3, %ecx 3430; X32-SSE41-NEXT: andl $1, %ecx 3431; X32-SSE41-NEXT: pinsrb $3, %ecx, %xmm1 3432; X32-SSE41-NEXT: movl %eax, %ecx 3433; X32-SSE41-NEXT: shrl $4, %ecx 3434; X32-SSE41-NEXT: andl $1, %ecx 3435; X32-SSE41-NEXT: pinsrb $4, %ecx, %xmm1 3436; X32-SSE41-NEXT: movl %eax, %ecx 3437; X32-SSE41-NEXT: shrl $5, %ecx 3438; X32-SSE41-NEXT: andl $1, %ecx 3439; X32-SSE41-NEXT: pinsrb $5, %ecx, %xmm1 3440; X32-SSE41-NEXT: movl %eax, %ecx 3441; X32-SSE41-NEXT: shrl $6, %ecx 3442; X32-SSE41-NEXT: andl $1, %ecx 3443; X32-SSE41-NEXT: pinsrb $6, %ecx, %xmm1 3444; X32-SSE41-NEXT: movl %eax, %ecx 3445; X32-SSE41-NEXT: shrl $7, %ecx 3446; X32-SSE41-NEXT: andl $1, %ecx 3447; X32-SSE41-NEXT: pinsrb $7, %ecx, %xmm1 3448; X32-SSE41-NEXT: movl %eax, %ecx 3449; X32-SSE41-NEXT: shrl $8, %ecx 3450; X32-SSE41-NEXT: andl $1, %ecx 3451; X32-SSE41-NEXT: pinsrb $8, %ecx, %xmm1 3452; X32-SSE41-NEXT: movl %eax, %ecx 3453; X32-SSE41-NEXT: shrl $9, %ecx 3454; X32-SSE41-NEXT: andl $1, %ecx 3455; X32-SSE41-NEXT: pinsrb $9, %ecx, %xmm1 3456; X32-SSE41-NEXT: movl %eax, %ecx 3457; X32-SSE41-NEXT: shrl $10, %ecx 3458; X32-SSE41-NEXT: andl $1, %ecx 3459; X32-SSE41-NEXT: pinsrb $10, %ecx, %xmm1 3460; X32-SSE41-NEXT: movl %eax, %ecx 3461; X32-SSE41-NEXT: shrl $11, %ecx 3462; X32-SSE41-NEXT: andl $1, %ecx 3463; X32-SSE41-NEXT: pinsrb $11, %ecx, %xmm1 3464; X32-SSE41-NEXT: movl %eax, %ecx 3465; X32-SSE41-NEXT: shrl $12, %ecx 3466; X32-SSE41-NEXT: andl $1, %ecx 3467; X32-SSE41-NEXT: pinsrb $12, %ecx, %xmm1 3468; X32-SSE41-NEXT: movl %eax, %ecx 3469; X32-SSE41-NEXT: shrl $13, %ecx 3470; X32-SSE41-NEXT: andl $1, %ecx 3471; X32-SSE41-NEXT: pinsrb $13, %ecx, %xmm1 3472; X32-SSE41-NEXT: movl %eax, %ecx 3473; X32-SSE41-NEXT: shrl $14, %ecx 3474; X32-SSE41-NEXT: andl $1, %ecx 3475; X32-SSE41-NEXT: pinsrb $14, %ecx, %xmm1 3476; X32-SSE41-NEXT: shrl $15, %eax 3477; X32-SSE41-NEXT: pinsrb $15, %eax, %xmm1 3478; X32-SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 3479; X32-SSE41-NEXT: psllw $15, %xmm0 3480; X32-SSE41-NEXT: psraw $15, %xmm0 3481; X32-SSE41-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 3482; X32-SSE41-NEXT: psllw $15, %xmm1 3483; X32-SSE41-NEXT: psraw $15, %xmm1 3484; X32-SSE41-NEXT: retl 3485entry: 3486 %X = load <16 x i1>, <16 x i1>* %ptr 3487 %Y = sext <16 x i1> %X to <16 x i16> 3488 ret <16 x i16> %Y 3489} 3490 3491define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone { 3492; SSE2-LABEL: load_sext_32i1_to_32i8: 3493; SSE2: # BB#0: # %entry 3494; SSE2-NEXT: pushq %rbp 3495; SSE2-NEXT: pushq %r15 3496; SSE2-NEXT: pushq %r14 3497; SSE2-NEXT: pushq %r13 3498; SSE2-NEXT: pushq %r12 3499; SSE2-NEXT: pushq %rbx 3500; SSE2-NEXT: movswq (%rdi), %rbx 3501; SSE2-NEXT: movq %rbx, %r10 3502; SSE2-NEXT: movq %rbx, %r8 3503; SSE2-NEXT: movq %rbx, %r9 3504; SSE2-NEXT: movq %rbx, %r11 3505; SSE2-NEXT: movq %rbx, %r14 3506; SSE2-NEXT: movq %rbx, %r15 3507; SSE2-NEXT: movq %rbx, %r12 3508; SSE2-NEXT: movq %rbx, %r13 3509; SSE2-NEXT: movq %rbx, %rdx 3510; SSE2-NEXT: movq %rbx, %rsi 3511; SSE2-NEXT: movq %rbx, %rcx 3512; SSE2-NEXT: movq %rbx, %rbp 3513; SSE2-NEXT: movq %rbx, %rax 3514; SSE2-NEXT: shlq $49, %rax 3515; SSE2-NEXT: sarq $63, %rax 3516; SSE2-NEXT: movd %eax, %xmm0 3517; SSE2-NEXT: movq %rbx, %rax 3518; SSE2-NEXT: shlq $57, %r10 3519; SSE2-NEXT: sarq $63, %r10 3520; SSE2-NEXT: movd %r10d, %xmm15 3521; SSE2-NEXT: movq %rbx, %r10 3522; SSE2-NEXT: movsbq %bl, %rbx 3523; SSE2-NEXT: punpcklbw {{.*#+}} xmm15 = xmm15[0],xmm0[0],xmm15[1],xmm0[1],xmm15[2],xmm0[2],xmm15[3],xmm0[3],xmm15[4],xmm0[4],xmm15[5],xmm0[5],xmm15[6],xmm0[6],xmm15[7],xmm0[7] 3524; SSE2-NEXT: shlq $53, %r8 3525; SSE2-NEXT: sarq $63, %r8 3526; SSE2-NEXT: movd %r8d, %xmm8 3527; SSE2-NEXT: shlq $61, %r9 3528; SSE2-NEXT: sarq $63, %r9 3529; SSE2-NEXT: movd %r9d, %xmm2 3530; SSE2-NEXT: shlq $51, %r11 3531; SSE2-NEXT: sarq $63, %r11 3532; SSE2-NEXT: movd %r11d, %xmm9 3533; SSE2-NEXT: shlq $59, %r14 3534; SSE2-NEXT: sarq $63, %r14 3535; SSE2-NEXT: movd %r14d, %xmm5 3536; SSE2-NEXT: shlq $55, %r15 3537; SSE2-NEXT: sarq $63, %r15 3538; SSE2-NEXT: movd %r15d, %xmm10 3539; SSE2-NEXT: shlq $63, %r12 3540; SSE2-NEXT: sarq $63, %r12 3541; SSE2-NEXT: movd %r12d, %xmm0 3542; SSE2-NEXT: shlq $50, %r13 3543; SSE2-NEXT: sarq $63, %r13 3544; SSE2-NEXT: movd %r13d, %xmm11 3545; SSE2-NEXT: shlq $58, %rdx 3546; SSE2-NEXT: sarq $63, %rdx 3547; SSE2-NEXT: movd %edx, %xmm4 3548; SSE2-NEXT: shlq $54, %rsi 3549; SSE2-NEXT: sarq $63, %rsi 3550; SSE2-NEXT: movd %esi, %xmm12 3551; SSE2-NEXT: shlq $62, %rcx 3552; SSE2-NEXT: sarq $63, %rcx 3553; SSE2-NEXT: movd %ecx, %xmm6 3554; SSE2-NEXT: shlq $52, %rbp 3555; SSE2-NEXT: sarq $63, %rbp 3556; SSE2-NEXT: movd %ebp, %xmm13 3557; SSE2-NEXT: shlq $60, %rax 3558; SSE2-NEXT: sarq $63, %rax 3559; SSE2-NEXT: movd %eax, %xmm7 3560; SSE2-NEXT: shrq $15, %r10 3561; SSE2-NEXT: movd %r10d, %xmm14 3562; SSE2-NEXT: shrq $7, %rbx 3563; SSE2-NEXT: movd %ebx, %xmm3 3564; SSE2-NEXT: movswq 2(%rdi), %rdx 3565; SSE2-NEXT: movq %rdx, %r8 3566; SSE2-NEXT: movq %rdx, %r9 3567; SSE2-NEXT: movq %rdx, %r10 3568; SSE2-NEXT: movq %rdx, %r11 3569; SSE2-NEXT: movq %rdx, %r14 3570; SSE2-NEXT: movq %rdx, %r15 3571; SSE2-NEXT: movq %rdx, %r12 3572; SSE2-NEXT: movq %rdx, %r13 3573; SSE2-NEXT: movq %rdx, %rbx 3574; SSE2-NEXT: movq %rdx, %rax 3575; SSE2-NEXT: movq %rdx, %rcx 3576; SSE2-NEXT: movq %rdx, %rsi 3577; SSE2-NEXT: movq %rdx, %rdi 3578; SSE2-NEXT: movq %rdx, %rbp 3579; SSE2-NEXT: shlq $49, %rbp 3580; SSE2-NEXT: sarq $63, %rbp 3581; SSE2-NEXT: movd %ebp, %xmm1 3582; SSE2-NEXT: movq %rdx, %rbp 3583; SSE2-NEXT: movsbq %dl, %rdx 3584; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm8[0],xmm2[1],xmm8[1],xmm2[2],xmm8[2],xmm2[3],xmm8[3],xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7] 3585; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm15[0],xmm2[1],xmm15[1],xmm2[2],xmm15[2],xmm2[3],xmm15[3],xmm2[4],xmm15[4],xmm2[5],xmm15[5],xmm2[6],xmm15[6],xmm2[7],xmm15[7] 3586; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm9[0],xmm5[1],xmm9[1],xmm5[2],xmm9[2],xmm5[3],xmm9[3],xmm5[4],xmm9[4],xmm5[5],xmm9[5],xmm5[6],xmm9[6],xmm5[7],xmm9[7] 3587; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm10[0],xmm0[1],xmm10[1],xmm0[2],xmm10[2],xmm0[3],xmm10[3],xmm0[4],xmm10[4],xmm0[5],xmm10[5],xmm0[6],xmm10[6],xmm0[7],xmm10[7] 3588; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] 3589; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 3590; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm11[0],xmm4[1],xmm11[1],xmm4[2],xmm11[2],xmm4[3],xmm11[3],xmm4[4],xmm11[4],xmm4[5],xmm11[5],xmm4[6],xmm11[6],xmm4[7],xmm11[7] 3591; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3],xmm6[4],xmm12[4],xmm6[5],xmm12[5],xmm6[6],xmm12[6],xmm6[7],xmm12[7] 3592; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3],xmm6[4],xmm4[4],xmm6[5],xmm4[5],xmm6[6],xmm4[6],xmm6[7],xmm4[7] 3593; SSE2-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm13[0],xmm7[1],xmm13[1],xmm7[2],xmm13[2],xmm7[3],xmm13[3],xmm7[4],xmm13[4],xmm7[5],xmm13[5],xmm7[6],xmm13[6],xmm7[7],xmm13[7] 3594; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm14[0],xmm3[1],xmm14[1],xmm3[2],xmm14[2],xmm3[3],xmm14[3],xmm3[4],xmm14[4],xmm3[5],xmm14[5],xmm3[6],xmm14[6],xmm3[7],xmm14[7] 3595; SSE2-NEXT: shlq $57, %r8 3596; SSE2-NEXT: sarq $63, %r8 3597; SSE2-NEXT: movd %r8d, %xmm2 3598; SSE2-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3],xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7] 3599; SSE2-NEXT: shlq $53, %r9 3600; SSE2-NEXT: sarq $63, %r9 3601; SSE2-NEXT: movd %r9d, %xmm3 3602; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3],xmm6[4],xmm7[4],xmm6[5],xmm7[5],xmm6[6],xmm7[6],xmm6[7],xmm7[7] 3603; SSE2-NEXT: shlq $61, %r10 3604; SSE2-NEXT: sarq $63, %r10 3605; SSE2-NEXT: movd %r10d, %xmm4 3606; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm6[0],xmm0[1],xmm6[1],xmm0[2],xmm6[2],xmm0[3],xmm6[3],xmm0[4],xmm6[4],xmm0[5],xmm6[5],xmm0[6],xmm6[6],xmm0[7],xmm6[7] 3607; SSE2-NEXT: shlq $51, %r11 3608; SSE2-NEXT: sarq $63, %r11 3609; SSE2-NEXT: movd %r11d, %xmm5 3610; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 3611; SSE2-NEXT: shlq $59, %r14 3612; SSE2-NEXT: sarq $63, %r14 3613; SSE2-NEXT: movd %r14d, %xmm6 3614; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3615; SSE2-NEXT: shlq $55, %r15 3616; SSE2-NEXT: sarq $63, %r15 3617; SSE2-NEXT: movd %r15d, %xmm3 3618; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 3619; SSE2-NEXT: shlq $63, %r12 3620; SSE2-NEXT: sarq $63, %r12 3621; SSE2-NEXT: movd %r12d, %xmm1 3622; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7] 3623; SSE2-NEXT: shlq $50, %r13 3624; SSE2-NEXT: sarq $63, %r13 3625; SSE2-NEXT: movd %r13d, %xmm2 3626; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 3627; SSE2-NEXT: shlq $58, %rbx 3628; SSE2-NEXT: sarq $63, %rbx 3629; SSE2-NEXT: movd %ebx, %xmm3 3630; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3],xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7] 3631; SSE2-NEXT: shlq $54, %rax 3632; SSE2-NEXT: sarq $63, %rax 3633; SSE2-NEXT: movd %eax, %xmm5 3634; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 3635; SSE2-NEXT: shlq $62, %rcx 3636; SSE2-NEXT: sarq $63, %rcx 3637; SSE2-NEXT: movd %ecx, %xmm4 3638; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3639; SSE2-NEXT: shlq $52, %rsi 3640; SSE2-NEXT: sarq $63, %rsi 3641; SSE2-NEXT: movd %esi, %xmm2 3642; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3],xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7] 3643; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3644; SSE2-NEXT: shlq $60, %rdi 3645; SSE2-NEXT: sarq $63, %rdi 3646; SSE2-NEXT: movd %edi, %xmm3 3647; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3648; SSE2-NEXT: shrq $15, %rbp 3649; SSE2-NEXT: movd %ebp, %xmm2 3650; SSE2-NEXT: shrq $7, %rdx 3651; SSE2-NEXT: movd %edx, %xmm5 3652; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7] 3653; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7] 3654; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3655; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 3656; SSE2-NEXT: popq %rbx 3657; SSE2-NEXT: popq %r12 3658; SSE2-NEXT: popq %r13 3659; SSE2-NEXT: popq %r14 3660; SSE2-NEXT: popq %r15 3661; SSE2-NEXT: popq %rbp 3662; SSE2-NEXT: retq 3663; 3664; SSSE3-LABEL: load_sext_32i1_to_32i8: 3665; SSSE3: # BB#0: # %entry 3666; SSSE3-NEXT: pushq %rbp 3667; SSSE3-NEXT: pushq %r15 3668; SSSE3-NEXT: pushq %r14 3669; SSSE3-NEXT: pushq %r13 3670; SSSE3-NEXT: pushq %r12 3671; SSSE3-NEXT: pushq %rbx 3672; SSSE3-NEXT: movswq (%rdi), %rbx 3673; SSSE3-NEXT: movq %rbx, %r10 3674; SSSE3-NEXT: movq %rbx, %r8 3675; SSSE3-NEXT: movq %rbx, %r9 3676; SSSE3-NEXT: movq %rbx, %r11 3677; SSSE3-NEXT: movq %rbx, %r14 3678; SSSE3-NEXT: movq %rbx, %r15 3679; SSSE3-NEXT: movq %rbx, %r12 3680; SSSE3-NEXT: movq %rbx, %r13 3681; SSSE3-NEXT: movq %rbx, %rdx 3682; SSSE3-NEXT: movq %rbx, %rsi 3683; SSSE3-NEXT: movq %rbx, %rcx 3684; SSSE3-NEXT: movq %rbx, %rbp 3685; SSSE3-NEXT: movq %rbx, %rax 3686; SSSE3-NEXT: shlq $49, %rax 3687; SSSE3-NEXT: sarq $63, %rax 3688; SSSE3-NEXT: movd %eax, %xmm0 3689; SSSE3-NEXT: movq %rbx, %rax 3690; SSSE3-NEXT: shlq $57, %r10 3691; SSSE3-NEXT: sarq $63, %r10 3692; SSSE3-NEXT: movd %r10d, %xmm15 3693; SSSE3-NEXT: movq %rbx, %r10 3694; SSSE3-NEXT: movsbq %bl, %rbx 3695; SSSE3-NEXT: punpcklbw {{.*#+}} xmm15 = xmm15[0],xmm0[0],xmm15[1],xmm0[1],xmm15[2],xmm0[2],xmm15[3],xmm0[3],xmm15[4],xmm0[4],xmm15[5],xmm0[5],xmm15[6],xmm0[6],xmm15[7],xmm0[7] 3696; SSSE3-NEXT: shlq $53, %r8 3697; SSSE3-NEXT: sarq $63, %r8 3698; SSSE3-NEXT: movd %r8d, %xmm8 3699; SSSE3-NEXT: shlq $61, %r9 3700; SSSE3-NEXT: sarq $63, %r9 3701; SSSE3-NEXT: movd %r9d, %xmm2 3702; SSSE3-NEXT: shlq $51, %r11 3703; SSSE3-NEXT: sarq $63, %r11 3704; SSSE3-NEXT: movd %r11d, %xmm9 3705; SSSE3-NEXT: shlq $59, %r14 3706; SSSE3-NEXT: sarq $63, %r14 3707; SSSE3-NEXT: movd %r14d, %xmm5 3708; SSSE3-NEXT: shlq $55, %r15 3709; SSSE3-NEXT: sarq $63, %r15 3710; SSSE3-NEXT: movd %r15d, %xmm10 3711; SSSE3-NEXT: shlq $63, %r12 3712; SSSE3-NEXT: sarq $63, %r12 3713; SSSE3-NEXT: movd %r12d, %xmm0 3714; SSSE3-NEXT: shlq $50, %r13 3715; SSSE3-NEXT: sarq $63, %r13 3716; SSSE3-NEXT: movd %r13d, %xmm11 3717; SSSE3-NEXT: shlq $58, %rdx 3718; SSSE3-NEXT: sarq $63, %rdx 3719; SSSE3-NEXT: movd %edx, %xmm4 3720; SSSE3-NEXT: shlq $54, %rsi 3721; SSSE3-NEXT: sarq $63, %rsi 3722; SSSE3-NEXT: movd %esi, %xmm12 3723; SSSE3-NEXT: shlq $62, %rcx 3724; SSSE3-NEXT: sarq $63, %rcx 3725; SSSE3-NEXT: movd %ecx, %xmm6 3726; SSSE3-NEXT: shlq $52, %rbp 3727; SSSE3-NEXT: sarq $63, %rbp 3728; SSSE3-NEXT: movd %ebp, %xmm13 3729; SSSE3-NEXT: shlq $60, %rax 3730; SSSE3-NEXT: sarq $63, %rax 3731; SSSE3-NEXT: movd %eax, %xmm7 3732; SSSE3-NEXT: shrq $15, %r10 3733; SSSE3-NEXT: movd %r10d, %xmm14 3734; SSSE3-NEXT: shrq $7, %rbx 3735; SSSE3-NEXT: movd %ebx, %xmm3 3736; SSSE3-NEXT: movswq 2(%rdi), %rdx 3737; SSSE3-NEXT: movq %rdx, %r8 3738; SSSE3-NEXT: movq %rdx, %r9 3739; SSSE3-NEXT: movq %rdx, %r10 3740; SSSE3-NEXT: movq %rdx, %r11 3741; SSSE3-NEXT: movq %rdx, %r14 3742; SSSE3-NEXT: movq %rdx, %r15 3743; SSSE3-NEXT: movq %rdx, %r12 3744; SSSE3-NEXT: movq %rdx, %r13 3745; SSSE3-NEXT: movq %rdx, %rbx 3746; SSSE3-NEXT: movq %rdx, %rax 3747; SSSE3-NEXT: movq %rdx, %rcx 3748; SSSE3-NEXT: movq %rdx, %rsi 3749; SSSE3-NEXT: movq %rdx, %rdi 3750; SSSE3-NEXT: movq %rdx, %rbp 3751; SSSE3-NEXT: shlq $49, %rbp 3752; SSSE3-NEXT: sarq $63, %rbp 3753; SSSE3-NEXT: movd %ebp, %xmm1 3754; SSSE3-NEXT: movq %rdx, %rbp 3755; SSSE3-NEXT: movsbq %dl, %rdx 3756; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm8[0],xmm2[1],xmm8[1],xmm2[2],xmm8[2],xmm2[3],xmm8[3],xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7] 3757; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm15[0],xmm2[1],xmm15[1],xmm2[2],xmm15[2],xmm2[3],xmm15[3],xmm2[4],xmm15[4],xmm2[5],xmm15[5],xmm2[6],xmm15[6],xmm2[7],xmm15[7] 3758; SSSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm9[0],xmm5[1],xmm9[1],xmm5[2],xmm9[2],xmm5[3],xmm9[3],xmm5[4],xmm9[4],xmm5[5],xmm9[5],xmm5[6],xmm9[6],xmm5[7],xmm9[7] 3759; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm10[0],xmm0[1],xmm10[1],xmm0[2],xmm10[2],xmm0[3],xmm10[3],xmm0[4],xmm10[4],xmm0[5],xmm10[5],xmm0[6],xmm10[6],xmm0[7],xmm10[7] 3760; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] 3761; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7] 3762; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm11[0],xmm4[1],xmm11[1],xmm4[2],xmm11[2],xmm4[3],xmm11[3],xmm4[4],xmm11[4],xmm4[5],xmm11[5],xmm4[6],xmm11[6],xmm4[7],xmm11[7] 3763; SSSE3-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3],xmm6[4],xmm12[4],xmm6[5],xmm12[5],xmm6[6],xmm12[6],xmm6[7],xmm12[7] 3764; SSSE3-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3],xmm6[4],xmm4[4],xmm6[5],xmm4[5],xmm6[6],xmm4[6],xmm6[7],xmm4[7] 3765; SSSE3-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm13[0],xmm7[1],xmm13[1],xmm7[2],xmm13[2],xmm7[3],xmm13[3],xmm7[4],xmm13[4],xmm7[5],xmm13[5],xmm7[6],xmm13[6],xmm7[7],xmm13[7] 3766; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm14[0],xmm3[1],xmm14[1],xmm3[2],xmm14[2],xmm3[3],xmm14[3],xmm3[4],xmm14[4],xmm3[5],xmm14[5],xmm3[6],xmm14[6],xmm3[7],xmm14[7] 3767; SSSE3-NEXT: shlq $57, %r8 3768; SSSE3-NEXT: sarq $63, %r8 3769; SSSE3-NEXT: movd %r8d, %xmm2 3770; SSSE3-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3],xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7] 3771; SSSE3-NEXT: shlq $53, %r9 3772; SSSE3-NEXT: sarq $63, %r9 3773; SSSE3-NEXT: movd %r9d, %xmm3 3774; SSSE3-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3],xmm6[4],xmm7[4],xmm6[5],xmm7[5],xmm6[6],xmm7[6],xmm6[7],xmm7[7] 3775; SSSE3-NEXT: shlq $61, %r10 3776; SSSE3-NEXT: sarq $63, %r10 3777; SSSE3-NEXT: movd %r10d, %xmm4 3778; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm6[0],xmm0[1],xmm6[1],xmm0[2],xmm6[2],xmm0[3],xmm6[3],xmm0[4],xmm6[4],xmm0[5],xmm6[5],xmm0[6],xmm6[6],xmm0[7],xmm6[7] 3779; SSSE3-NEXT: shlq $51, %r11 3780; SSSE3-NEXT: sarq $63, %r11 3781; SSSE3-NEXT: movd %r11d, %xmm5 3782; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 3783; SSSE3-NEXT: shlq $59, %r14 3784; SSSE3-NEXT: sarq $63, %r14 3785; SSSE3-NEXT: movd %r14d, %xmm6 3786; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3787; SSSE3-NEXT: shlq $55, %r15 3788; SSSE3-NEXT: sarq $63, %r15 3789; SSSE3-NEXT: movd %r15d, %xmm3 3790; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 3791; SSSE3-NEXT: shlq $63, %r12 3792; SSSE3-NEXT: sarq $63, %r12 3793; SSSE3-NEXT: movd %r12d, %xmm1 3794; SSSE3-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7] 3795; SSSE3-NEXT: shlq $50, %r13 3796; SSSE3-NEXT: sarq $63, %r13 3797; SSSE3-NEXT: movd %r13d, %xmm2 3798; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 3799; SSSE3-NEXT: shlq $58, %rbx 3800; SSSE3-NEXT: sarq $63, %rbx 3801; SSSE3-NEXT: movd %ebx, %xmm3 3802; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3],xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7] 3803; SSSE3-NEXT: shlq $54, %rax 3804; SSSE3-NEXT: sarq $63, %rax 3805; SSSE3-NEXT: movd %eax, %xmm5 3806; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 3807; SSSE3-NEXT: shlq $62, %rcx 3808; SSSE3-NEXT: sarq $63, %rcx 3809; SSSE3-NEXT: movd %ecx, %xmm4 3810; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3811; SSSE3-NEXT: shlq $52, %rsi 3812; SSSE3-NEXT: sarq $63, %rsi 3813; SSSE3-NEXT: movd %esi, %xmm2 3814; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3],xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7] 3815; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3816; SSSE3-NEXT: shlq $60, %rdi 3817; SSSE3-NEXT: sarq $63, %rdi 3818; SSSE3-NEXT: movd %edi, %xmm3 3819; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3820; SSSE3-NEXT: shrq $15, %rbp 3821; SSSE3-NEXT: movd %ebp, %xmm2 3822; SSSE3-NEXT: shrq $7, %rdx 3823; SSSE3-NEXT: movd %edx, %xmm5 3824; SSSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7] 3825; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7] 3826; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 3827; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 3828; SSSE3-NEXT: popq %rbx 3829; SSSE3-NEXT: popq %r12 3830; SSSE3-NEXT: popq %r13 3831; SSSE3-NEXT: popq %r14 3832; SSSE3-NEXT: popq %r15 3833; SSSE3-NEXT: popq %rbp 3834; SSSE3-NEXT: retq 3835; 3836; SSE41-LABEL: load_sext_32i1_to_32i8: 3837; SSE41: # BB#0: # %entry 3838; SSE41-NEXT: movswq (%rdi), %rax 3839; SSE41-NEXT: movq %rax, %rcx 3840; SSE41-NEXT: shlq $62, %rcx 3841; SSE41-NEXT: sarq $63, %rcx 3842; SSE41-NEXT: movq %rax, %rdx 3843; SSE41-NEXT: shlq $63, %rdx 3844; SSE41-NEXT: sarq $63, %rdx 3845; SSE41-NEXT: movd %edx, %xmm0 3846; SSE41-NEXT: pinsrb $1, %ecx, %xmm0 3847; SSE41-NEXT: movq %rax, %rcx 3848; SSE41-NEXT: shlq $61, %rcx 3849; SSE41-NEXT: sarq $63, %rcx 3850; SSE41-NEXT: pinsrb $2, %ecx, %xmm0 3851; SSE41-NEXT: movq %rax, %rcx 3852; SSE41-NEXT: shlq $60, %rcx 3853; SSE41-NEXT: sarq $63, %rcx 3854; SSE41-NEXT: pinsrb $3, %ecx, %xmm0 3855; SSE41-NEXT: movq %rax, %rcx 3856; SSE41-NEXT: shlq $59, %rcx 3857; SSE41-NEXT: sarq $63, %rcx 3858; SSE41-NEXT: pinsrb $4, %ecx, %xmm0 3859; SSE41-NEXT: movq %rax, %rcx 3860; SSE41-NEXT: shlq $58, %rcx 3861; SSE41-NEXT: sarq $63, %rcx 3862; SSE41-NEXT: pinsrb $5, %ecx, %xmm0 3863; SSE41-NEXT: movq %rax, %rcx 3864; SSE41-NEXT: shlq $57, %rcx 3865; SSE41-NEXT: sarq $63, %rcx 3866; SSE41-NEXT: pinsrb $6, %ecx, %xmm0 3867; SSE41-NEXT: movsbq %al, %rcx 3868; SSE41-NEXT: shrq $7, %rcx 3869; SSE41-NEXT: pinsrb $7, %ecx, %xmm0 3870; SSE41-NEXT: movq %rax, %rcx 3871; SSE41-NEXT: shlq $55, %rcx 3872; SSE41-NEXT: sarq $63, %rcx 3873; SSE41-NEXT: pinsrb $8, %ecx, %xmm0 3874; SSE41-NEXT: movq %rax, %rcx 3875; SSE41-NEXT: shlq $54, %rcx 3876; SSE41-NEXT: sarq $63, %rcx 3877; SSE41-NEXT: pinsrb $9, %ecx, %xmm0 3878; SSE41-NEXT: movq %rax, %rcx 3879; SSE41-NEXT: shlq $53, %rcx 3880; SSE41-NEXT: sarq $63, %rcx 3881; SSE41-NEXT: pinsrb $10, %ecx, %xmm0 3882; SSE41-NEXT: movq %rax, %rcx 3883; SSE41-NEXT: shlq $52, %rcx 3884; SSE41-NEXT: sarq $63, %rcx 3885; SSE41-NEXT: pinsrb $11, %ecx, %xmm0 3886; SSE41-NEXT: movq %rax, %rcx 3887; SSE41-NEXT: shlq $51, %rcx 3888; SSE41-NEXT: sarq $63, %rcx 3889; SSE41-NEXT: pinsrb $12, %ecx, %xmm0 3890; SSE41-NEXT: movq %rax, %rcx 3891; SSE41-NEXT: shlq $50, %rcx 3892; SSE41-NEXT: sarq $63, %rcx 3893; SSE41-NEXT: pinsrb $13, %ecx, %xmm0 3894; SSE41-NEXT: movq %rax, %rcx 3895; SSE41-NEXT: shlq $49, %rcx 3896; SSE41-NEXT: sarq $63, %rcx 3897; SSE41-NEXT: pinsrb $14, %ecx, %xmm0 3898; SSE41-NEXT: shrq $15, %rax 3899; SSE41-NEXT: pinsrb $15, %eax, %xmm0 3900; SSE41-NEXT: movswq 2(%rdi), %rax 3901; SSE41-NEXT: movq %rax, %rcx 3902; SSE41-NEXT: shlq $62, %rcx 3903; SSE41-NEXT: sarq $63, %rcx 3904; SSE41-NEXT: movq %rax, %rdx 3905; SSE41-NEXT: shlq $63, %rdx 3906; SSE41-NEXT: sarq $63, %rdx 3907; SSE41-NEXT: movd %edx, %xmm1 3908; SSE41-NEXT: pinsrb $1, %ecx, %xmm1 3909; SSE41-NEXT: movq %rax, %rcx 3910; SSE41-NEXT: shlq $61, %rcx 3911; SSE41-NEXT: sarq $63, %rcx 3912; SSE41-NEXT: pinsrb $2, %ecx, %xmm1 3913; SSE41-NEXT: movq %rax, %rcx 3914; SSE41-NEXT: shlq $60, %rcx 3915; SSE41-NEXT: sarq $63, %rcx 3916; SSE41-NEXT: pinsrb $3, %ecx, %xmm1 3917; SSE41-NEXT: movq %rax, %rcx 3918; SSE41-NEXT: shlq $59, %rcx 3919; SSE41-NEXT: sarq $63, %rcx 3920; SSE41-NEXT: pinsrb $4, %ecx, %xmm1 3921; SSE41-NEXT: movq %rax, %rcx 3922; SSE41-NEXT: shlq $58, %rcx 3923; SSE41-NEXT: sarq $63, %rcx 3924; SSE41-NEXT: pinsrb $5, %ecx, %xmm1 3925; SSE41-NEXT: movq %rax, %rcx 3926; SSE41-NEXT: shlq $57, %rcx 3927; SSE41-NEXT: sarq $63, %rcx 3928; SSE41-NEXT: pinsrb $6, %ecx, %xmm1 3929; SSE41-NEXT: movsbq %al, %rcx 3930; SSE41-NEXT: shrq $7, %rcx 3931; SSE41-NEXT: pinsrb $7, %ecx, %xmm1 3932; SSE41-NEXT: movq %rax, %rcx 3933; SSE41-NEXT: shlq $55, %rcx 3934; SSE41-NEXT: sarq $63, %rcx 3935; SSE41-NEXT: pinsrb $8, %ecx, %xmm1 3936; SSE41-NEXT: movq %rax, %rcx 3937; SSE41-NEXT: shlq $54, %rcx 3938; SSE41-NEXT: sarq $63, %rcx 3939; SSE41-NEXT: pinsrb $9, %ecx, %xmm1 3940; SSE41-NEXT: movq %rax, %rcx 3941; SSE41-NEXT: shlq $53, %rcx 3942; SSE41-NEXT: sarq $63, %rcx 3943; SSE41-NEXT: pinsrb $10, %ecx, %xmm1 3944; SSE41-NEXT: movq %rax, %rcx 3945; SSE41-NEXT: shlq $52, %rcx 3946; SSE41-NEXT: sarq $63, %rcx 3947; SSE41-NEXT: pinsrb $11, %ecx, %xmm1 3948; SSE41-NEXT: movq %rax, %rcx 3949; SSE41-NEXT: shlq $51, %rcx 3950; SSE41-NEXT: sarq $63, %rcx 3951; SSE41-NEXT: pinsrb $12, %ecx, %xmm1 3952; SSE41-NEXT: movq %rax, %rcx 3953; SSE41-NEXT: shlq $50, %rcx 3954; SSE41-NEXT: sarq $63, %rcx 3955; SSE41-NEXT: pinsrb $13, %ecx, %xmm1 3956; SSE41-NEXT: movq %rax, %rcx 3957; SSE41-NEXT: shlq $49, %rcx 3958; SSE41-NEXT: sarq $63, %rcx 3959; SSE41-NEXT: pinsrb $14, %ecx, %xmm1 3960; SSE41-NEXT: shrq $15, %rax 3961; SSE41-NEXT: pinsrb $15, %eax, %xmm1 3962; SSE41-NEXT: retq 3963; 3964; AVX1-LABEL: load_sext_32i1_to_32i8: 3965; AVX1: # BB#0: # %entry 3966; AVX1-NEXT: pushq %rbp 3967; AVX1-NEXT: pushq %r15 3968; AVX1-NEXT: pushq %r14 3969; AVX1-NEXT: pushq %r13 3970; AVX1-NEXT: pushq %r12 3971; AVX1-NEXT: pushq %rbx 3972; AVX1-NEXT: movslq (%rdi), %rax 3973; AVX1-NEXT: movq %rax, %rcx 3974; AVX1-NEXT: shlq $47, %rcx 3975; AVX1-NEXT: sarq $63, %rcx 3976; AVX1-NEXT: vmovd %ecx, %xmm0 3977; AVX1-NEXT: movq %rax, %r8 3978; AVX1-NEXT: movq %rax, %rdx 3979; AVX1-NEXT: movq %rax, %rcx 3980; AVX1-NEXT: movq %rax, %rdi 3981; AVX1-NEXT: movq %rax, %r13 3982; AVX1-NEXT: movq %rax, %rsi 3983; AVX1-NEXT: movq %rax, %r10 3984; AVX1-NEXT: movq %rax, %r11 3985; AVX1-NEXT: movq %rax, %r9 3986; AVX1-NEXT: movq %rax, %rbx 3987; AVX1-NEXT: movq %rax, %r14 3988; AVX1-NEXT: movq %rax, %r15 3989; AVX1-NEXT: movq %rax, %r12 3990; AVX1-NEXT: movq %rax, %rbp 3991; AVX1-NEXT: shlq $46, %rbp 3992; AVX1-NEXT: sarq $63, %rbp 3993; AVX1-NEXT: vpinsrb $1, %ebp, %xmm0, %xmm0 3994; AVX1-NEXT: movq %rax, %rbp 3995; AVX1-NEXT: shlq $45, %r8 3996; AVX1-NEXT: sarq $63, %r8 3997; AVX1-NEXT: vpinsrb $2, %r8d, %xmm0, %xmm0 3998; AVX1-NEXT: movq %rax, %r8 3999; AVX1-NEXT: shlq $44, %rdx 4000; AVX1-NEXT: sarq $63, %rdx 4001; AVX1-NEXT: vpinsrb $3, %edx, %xmm0, %xmm0 4002; AVX1-NEXT: movq %rax, %rdx 4003; AVX1-NEXT: shlq $43, %rcx 4004; AVX1-NEXT: sarq $63, %rcx 4005; AVX1-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 4006; AVX1-NEXT: movq %rax, %rcx 4007; AVX1-NEXT: shlq $42, %rdi 4008; AVX1-NEXT: sarq $63, %rdi 4009; AVX1-NEXT: vpinsrb $5, %edi, %xmm0, %xmm0 4010; AVX1-NEXT: movq %rax, %rdi 4011; AVX1-NEXT: shlq $41, %r13 4012; AVX1-NEXT: sarq $63, %r13 4013; AVX1-NEXT: vpinsrb $6, %r13d, %xmm0, %xmm0 4014; AVX1-NEXT: movq %rax, %r13 4015; AVX1-NEXT: shlq $40, %rsi 4016; AVX1-NEXT: sarq $63, %rsi 4017; AVX1-NEXT: vpinsrb $7, %esi, %xmm0, %xmm0 4018; AVX1-NEXT: movq %rax, %rsi 4019; AVX1-NEXT: shlq $39, %r10 4020; AVX1-NEXT: sarq $63, %r10 4021; AVX1-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0 4022; AVX1-NEXT: movq %rax, %r10 4023; AVX1-NEXT: shlq $38, %r11 4024; AVX1-NEXT: sarq $63, %r11 4025; AVX1-NEXT: vpinsrb $9, %r11d, %xmm0, %xmm0 4026; AVX1-NEXT: movsbq %al, %r11 4027; AVX1-NEXT: shlq $37, %r9 4028; AVX1-NEXT: sarq $63, %r9 4029; AVX1-NEXT: vpinsrb $10, %r9d, %xmm0, %xmm0 4030; AVX1-NEXT: movq %rax, %r9 4031; AVX1-NEXT: shlq $36, %rbx 4032; AVX1-NEXT: sarq $63, %rbx 4033; AVX1-NEXT: vpinsrb $11, %ebx, %xmm0, %xmm0 4034; AVX1-NEXT: movq %rax, %rbx 4035; AVX1-NEXT: shlq $35, %r14 4036; AVX1-NEXT: sarq $63, %r14 4037; AVX1-NEXT: vpinsrb $12, %r14d, %xmm0, %xmm0 4038; AVX1-NEXT: movq %rax, %r14 4039; AVX1-NEXT: shlq $34, %r15 4040; AVX1-NEXT: sarq $63, %r15 4041; AVX1-NEXT: vpinsrb $13, %r15d, %xmm0, %xmm0 4042; AVX1-NEXT: movq %rax, %r15 4043; AVX1-NEXT: shlq $33, %r12 4044; AVX1-NEXT: sarq $63, %r12 4045; AVX1-NEXT: vpinsrb $14, %r12d, %xmm0, %xmm0 4046; AVX1-NEXT: movq %rax, %r12 4047; AVX1-NEXT: shrq $31, %rbp 4048; AVX1-NEXT: vpinsrb $15, %ebp, %xmm0, %xmm0 4049; AVX1-NEXT: movq %rax, %rbp 4050; AVX1-NEXT: shlq $63, %rdx 4051; AVX1-NEXT: sarq $63, %rdx 4052; AVX1-NEXT: vmovd %edx, %xmm1 4053; AVX1-NEXT: movq %rax, %rdx 4054; AVX1-NEXT: movswq %ax, %rax 4055; AVX1-NEXT: shlq $62, %r8 4056; AVX1-NEXT: sarq $63, %r8 4057; AVX1-NEXT: vpinsrb $1, %r8d, %xmm1, %xmm1 4058; AVX1-NEXT: shlq $61, %rcx 4059; AVX1-NEXT: sarq $63, %rcx 4060; AVX1-NEXT: vpinsrb $2, %ecx, %xmm1, %xmm1 4061; AVX1-NEXT: shlq $60, %rdi 4062; AVX1-NEXT: sarq $63, %rdi 4063; AVX1-NEXT: vpinsrb $3, %edi, %xmm1, %xmm1 4064; AVX1-NEXT: shlq $59, %r13 4065; AVX1-NEXT: sarq $63, %r13 4066; AVX1-NEXT: vpinsrb $4, %r13d, %xmm1, %xmm1 4067; AVX1-NEXT: shlq $58, %rsi 4068; AVX1-NEXT: sarq $63, %rsi 4069; AVX1-NEXT: vpinsrb $5, %esi, %xmm1, %xmm1 4070; AVX1-NEXT: shlq $57, %r10 4071; AVX1-NEXT: sarq $63, %r10 4072; AVX1-NEXT: vpinsrb $6, %r10d, %xmm1, %xmm1 4073; AVX1-NEXT: shrq $7, %r11 4074; AVX1-NEXT: vpinsrb $7, %r11d, %xmm1, %xmm1 4075; AVX1-NEXT: shlq $55, %r9 4076; AVX1-NEXT: sarq $63, %r9 4077; AVX1-NEXT: vpinsrb $8, %r9d, %xmm1, %xmm1 4078; AVX1-NEXT: shlq $54, %rbx 4079; AVX1-NEXT: sarq $63, %rbx 4080; AVX1-NEXT: vpinsrb $9, %ebx, %xmm1, %xmm1 4081; AVX1-NEXT: shlq $53, %r14 4082; AVX1-NEXT: sarq $63, %r14 4083; AVX1-NEXT: vpinsrb $10, %r14d, %xmm1, %xmm1 4084; AVX1-NEXT: shlq $52, %r15 4085; AVX1-NEXT: sarq $63, %r15 4086; AVX1-NEXT: vpinsrb $11, %r15d, %xmm1, %xmm1 4087; AVX1-NEXT: shlq $51, %r12 4088; AVX1-NEXT: sarq $63, %r12 4089; AVX1-NEXT: vpinsrb $12, %r12d, %xmm1, %xmm1 4090; AVX1-NEXT: shlq $50, %rbp 4091; AVX1-NEXT: sarq $63, %rbp 4092; AVX1-NEXT: vpinsrb $13, %ebp, %xmm1, %xmm1 4093; AVX1-NEXT: shlq $49, %rdx 4094; AVX1-NEXT: sarq $63, %rdx 4095; AVX1-NEXT: vpinsrb $14, %edx, %xmm1, %xmm1 4096; AVX1-NEXT: shrq $15, %rax 4097; AVX1-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 4098; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4099; AVX1-NEXT: popq %rbx 4100; AVX1-NEXT: popq %r12 4101; AVX1-NEXT: popq %r13 4102; AVX1-NEXT: popq %r14 4103; AVX1-NEXT: popq %r15 4104; AVX1-NEXT: popq %rbp 4105; AVX1-NEXT: retq 4106; 4107; AVX2-LABEL: load_sext_32i1_to_32i8: 4108; AVX2: # BB#0: # %entry 4109; AVX2-NEXT: pushq %rbp 4110; AVX2-NEXT: pushq %r15 4111; AVX2-NEXT: pushq %r14 4112; AVX2-NEXT: pushq %r13 4113; AVX2-NEXT: pushq %r12 4114; AVX2-NEXT: pushq %rbx 4115; AVX2-NEXT: movslq (%rdi), %rax 4116; AVX2-NEXT: movq %rax, %rcx 4117; AVX2-NEXT: shlq $47, %rcx 4118; AVX2-NEXT: sarq $63, %rcx 4119; AVX2-NEXT: vmovd %ecx, %xmm0 4120; AVX2-NEXT: movq %rax, %r8 4121; AVX2-NEXT: movq %rax, %rdx 4122; AVX2-NEXT: movq %rax, %rcx 4123; AVX2-NEXT: movq %rax, %rdi 4124; AVX2-NEXT: movq %rax, %r13 4125; AVX2-NEXT: movq %rax, %rsi 4126; AVX2-NEXT: movq %rax, %r10 4127; AVX2-NEXT: movq %rax, %r11 4128; AVX2-NEXT: movq %rax, %r9 4129; AVX2-NEXT: movq %rax, %rbx 4130; AVX2-NEXT: movq %rax, %r14 4131; AVX2-NEXT: movq %rax, %r15 4132; AVX2-NEXT: movq %rax, %r12 4133; AVX2-NEXT: movq %rax, %rbp 4134; AVX2-NEXT: shlq $46, %rbp 4135; AVX2-NEXT: sarq $63, %rbp 4136; AVX2-NEXT: vpinsrb $1, %ebp, %xmm0, %xmm0 4137; AVX2-NEXT: movq %rax, %rbp 4138; AVX2-NEXT: shlq $45, %r8 4139; AVX2-NEXT: sarq $63, %r8 4140; AVX2-NEXT: vpinsrb $2, %r8d, %xmm0, %xmm0 4141; AVX2-NEXT: movq %rax, %r8 4142; AVX2-NEXT: shlq $44, %rdx 4143; AVX2-NEXT: sarq $63, %rdx 4144; AVX2-NEXT: vpinsrb $3, %edx, %xmm0, %xmm0 4145; AVX2-NEXT: movq %rax, %rdx 4146; AVX2-NEXT: shlq $43, %rcx 4147; AVX2-NEXT: sarq $63, %rcx 4148; AVX2-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 4149; AVX2-NEXT: movq %rax, %rcx 4150; AVX2-NEXT: shlq $42, %rdi 4151; AVX2-NEXT: sarq $63, %rdi 4152; AVX2-NEXT: vpinsrb $5, %edi, %xmm0, %xmm0 4153; AVX2-NEXT: movq %rax, %rdi 4154; AVX2-NEXT: shlq $41, %r13 4155; AVX2-NEXT: sarq $63, %r13 4156; AVX2-NEXT: vpinsrb $6, %r13d, %xmm0, %xmm0 4157; AVX2-NEXT: movq %rax, %r13 4158; AVX2-NEXT: shlq $40, %rsi 4159; AVX2-NEXT: sarq $63, %rsi 4160; AVX2-NEXT: vpinsrb $7, %esi, %xmm0, %xmm0 4161; AVX2-NEXT: movq %rax, %rsi 4162; AVX2-NEXT: shlq $39, %r10 4163; AVX2-NEXT: sarq $63, %r10 4164; AVX2-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0 4165; AVX2-NEXT: movq %rax, %r10 4166; AVX2-NEXT: shlq $38, %r11 4167; AVX2-NEXT: sarq $63, %r11 4168; AVX2-NEXT: vpinsrb $9, %r11d, %xmm0, %xmm0 4169; AVX2-NEXT: movsbq %al, %r11 4170; AVX2-NEXT: shlq $37, %r9 4171; AVX2-NEXT: sarq $63, %r9 4172; AVX2-NEXT: vpinsrb $10, %r9d, %xmm0, %xmm0 4173; AVX2-NEXT: movq %rax, %r9 4174; AVX2-NEXT: shlq $36, %rbx 4175; AVX2-NEXT: sarq $63, %rbx 4176; AVX2-NEXT: vpinsrb $11, %ebx, %xmm0, %xmm0 4177; AVX2-NEXT: movq %rax, %rbx 4178; AVX2-NEXT: shlq $35, %r14 4179; AVX2-NEXT: sarq $63, %r14 4180; AVX2-NEXT: vpinsrb $12, %r14d, %xmm0, %xmm0 4181; AVX2-NEXT: movq %rax, %r14 4182; AVX2-NEXT: shlq $34, %r15 4183; AVX2-NEXT: sarq $63, %r15 4184; AVX2-NEXT: vpinsrb $13, %r15d, %xmm0, %xmm0 4185; AVX2-NEXT: movq %rax, %r15 4186; AVX2-NEXT: shlq $33, %r12 4187; AVX2-NEXT: sarq $63, %r12 4188; AVX2-NEXT: vpinsrb $14, %r12d, %xmm0, %xmm0 4189; AVX2-NEXT: movq %rax, %r12 4190; AVX2-NEXT: shrq $31, %rbp 4191; AVX2-NEXT: vpinsrb $15, %ebp, %xmm0, %xmm0 4192; AVX2-NEXT: movq %rax, %rbp 4193; AVX2-NEXT: shlq $63, %rdx 4194; AVX2-NEXT: sarq $63, %rdx 4195; AVX2-NEXT: vmovd %edx, %xmm1 4196; AVX2-NEXT: movq %rax, %rdx 4197; AVX2-NEXT: movswq %ax, %rax 4198; AVX2-NEXT: shlq $62, %r8 4199; AVX2-NEXT: sarq $63, %r8 4200; AVX2-NEXT: vpinsrb $1, %r8d, %xmm1, %xmm1 4201; AVX2-NEXT: shlq $61, %rcx 4202; AVX2-NEXT: sarq $63, %rcx 4203; AVX2-NEXT: vpinsrb $2, %ecx, %xmm1, %xmm1 4204; AVX2-NEXT: shlq $60, %rdi 4205; AVX2-NEXT: sarq $63, %rdi 4206; AVX2-NEXT: vpinsrb $3, %edi, %xmm1, %xmm1 4207; AVX2-NEXT: shlq $59, %r13 4208; AVX2-NEXT: sarq $63, %r13 4209; AVX2-NEXT: vpinsrb $4, %r13d, %xmm1, %xmm1 4210; AVX2-NEXT: shlq $58, %rsi 4211; AVX2-NEXT: sarq $63, %rsi 4212; AVX2-NEXT: vpinsrb $5, %esi, %xmm1, %xmm1 4213; AVX2-NEXT: shlq $57, %r10 4214; AVX2-NEXT: sarq $63, %r10 4215; AVX2-NEXT: vpinsrb $6, %r10d, %xmm1, %xmm1 4216; AVX2-NEXT: shrq $7, %r11 4217; AVX2-NEXT: vpinsrb $7, %r11d, %xmm1, %xmm1 4218; AVX2-NEXT: shlq $55, %r9 4219; AVX2-NEXT: sarq $63, %r9 4220; AVX2-NEXT: vpinsrb $8, %r9d, %xmm1, %xmm1 4221; AVX2-NEXT: shlq $54, %rbx 4222; AVX2-NEXT: sarq $63, %rbx 4223; AVX2-NEXT: vpinsrb $9, %ebx, %xmm1, %xmm1 4224; AVX2-NEXT: shlq $53, %r14 4225; AVX2-NEXT: sarq $63, %r14 4226; AVX2-NEXT: vpinsrb $10, %r14d, %xmm1, %xmm1 4227; AVX2-NEXT: shlq $52, %r15 4228; AVX2-NEXT: sarq $63, %r15 4229; AVX2-NEXT: vpinsrb $11, %r15d, %xmm1, %xmm1 4230; AVX2-NEXT: shlq $51, %r12 4231; AVX2-NEXT: sarq $63, %r12 4232; AVX2-NEXT: vpinsrb $12, %r12d, %xmm1, %xmm1 4233; AVX2-NEXT: shlq $50, %rbp 4234; AVX2-NEXT: sarq $63, %rbp 4235; AVX2-NEXT: vpinsrb $13, %ebp, %xmm1, %xmm1 4236; AVX2-NEXT: shlq $49, %rdx 4237; AVX2-NEXT: sarq $63, %rdx 4238; AVX2-NEXT: vpinsrb $14, %edx, %xmm1, %xmm1 4239; AVX2-NEXT: shrq $15, %rax 4240; AVX2-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 4241; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 4242; AVX2-NEXT: popq %rbx 4243; AVX2-NEXT: popq %r12 4244; AVX2-NEXT: popq %r13 4245; AVX2-NEXT: popq %r14 4246; AVX2-NEXT: popq %r15 4247; AVX2-NEXT: popq %rbp 4248; AVX2-NEXT: retq 4249; 4250; AVX512-LABEL: load_sext_32i1_to_32i8: 4251; AVX512: # BB#0: # %entry 4252; AVX512-NEXT: kmovw (%rdi), %k1 4253; AVX512-NEXT: kmovw 2(%rdi), %k2 4254; AVX512-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 4255; AVX512-NEXT: vmovdqa32 %zmm0, %zmm1 {%k1} {z} 4256; AVX512-NEXT: vpmovdb %zmm1, %xmm1 4257; AVX512-NEXT: vmovdqa32 %zmm0, %zmm0 {%k2} {z} 4258; AVX512-NEXT: vpmovdb %zmm0, %xmm0 4259; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 4260; AVX512-NEXT: retq 4261; 4262; X32-SSE41-LABEL: load_sext_32i1_to_32i8: 4263; X32-SSE41: # BB#0: # %entry 4264; X32-SSE41-NEXT: pushl %esi 4265; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4266; X32-SSE41-NEXT: movswl (%eax), %ecx 4267; X32-SSE41-NEXT: movl %ecx, %edx 4268; X32-SSE41-NEXT: shll $30, %edx 4269; X32-SSE41-NEXT: sarl $31, %edx 4270; X32-SSE41-NEXT: movl %ecx, %esi 4271; X32-SSE41-NEXT: shll $31, %esi 4272; X32-SSE41-NEXT: sarl $31, %esi 4273; X32-SSE41-NEXT: movd %esi, %xmm0 4274; X32-SSE41-NEXT: pinsrb $1, %edx, %xmm0 4275; X32-SSE41-NEXT: movl %ecx, %edx 4276; X32-SSE41-NEXT: shll $29, %edx 4277; X32-SSE41-NEXT: sarl $31, %edx 4278; X32-SSE41-NEXT: pinsrb $2, %edx, %xmm0 4279; X32-SSE41-NEXT: movl %ecx, %edx 4280; X32-SSE41-NEXT: shll $28, %edx 4281; X32-SSE41-NEXT: sarl $31, %edx 4282; X32-SSE41-NEXT: pinsrb $3, %edx, %xmm0 4283; X32-SSE41-NEXT: movl %ecx, %edx 4284; X32-SSE41-NEXT: shll $27, %edx 4285; X32-SSE41-NEXT: sarl $31, %edx 4286; X32-SSE41-NEXT: pinsrb $4, %edx, %xmm0 4287; X32-SSE41-NEXT: movl %ecx, %edx 4288; X32-SSE41-NEXT: shll $26, %edx 4289; X32-SSE41-NEXT: sarl $31, %edx 4290; X32-SSE41-NEXT: pinsrb $5, %edx, %xmm0 4291; X32-SSE41-NEXT: movl %ecx, %edx 4292; X32-SSE41-NEXT: shll $25, %edx 4293; X32-SSE41-NEXT: sarl $31, %edx 4294; X32-SSE41-NEXT: pinsrb $6, %edx, %xmm0 4295; X32-SSE41-NEXT: movsbl %cl, %edx 4296; X32-SSE41-NEXT: shrl $7, %edx 4297; X32-SSE41-NEXT: pinsrb $7, %edx, %xmm0 4298; X32-SSE41-NEXT: movl %ecx, %edx 4299; X32-SSE41-NEXT: shll $23, %edx 4300; X32-SSE41-NEXT: sarl $31, %edx 4301; X32-SSE41-NEXT: pinsrb $8, %edx, %xmm0 4302; X32-SSE41-NEXT: movl %ecx, %edx 4303; X32-SSE41-NEXT: shll $22, %edx 4304; X32-SSE41-NEXT: sarl $31, %edx 4305; X32-SSE41-NEXT: pinsrb $9, %edx, %xmm0 4306; X32-SSE41-NEXT: movl %ecx, %edx 4307; X32-SSE41-NEXT: shll $21, %edx 4308; X32-SSE41-NEXT: sarl $31, %edx 4309; X32-SSE41-NEXT: pinsrb $10, %edx, %xmm0 4310; X32-SSE41-NEXT: movl %ecx, %edx 4311; X32-SSE41-NEXT: shll $20, %edx 4312; X32-SSE41-NEXT: sarl $31, %edx 4313; X32-SSE41-NEXT: pinsrb $11, %edx, %xmm0 4314; X32-SSE41-NEXT: movl %ecx, %edx 4315; X32-SSE41-NEXT: shll $19, %edx 4316; X32-SSE41-NEXT: sarl $31, %edx 4317; X32-SSE41-NEXT: pinsrb $12, %edx, %xmm0 4318; X32-SSE41-NEXT: movl %ecx, %edx 4319; X32-SSE41-NEXT: shll $18, %edx 4320; X32-SSE41-NEXT: sarl $31, %edx 4321; X32-SSE41-NEXT: pinsrb $13, %edx, %xmm0 4322; X32-SSE41-NEXT: movl %ecx, %edx 4323; X32-SSE41-NEXT: shll $17, %edx 4324; X32-SSE41-NEXT: sarl $31, %edx 4325; X32-SSE41-NEXT: pinsrb $14, %edx, %xmm0 4326; X32-SSE41-NEXT: shrl $15, %ecx 4327; X32-SSE41-NEXT: pinsrb $15, %ecx, %xmm0 4328; X32-SSE41-NEXT: movswl 2(%eax), %eax 4329; X32-SSE41-NEXT: movl %eax, %ecx 4330; X32-SSE41-NEXT: shll $30, %ecx 4331; X32-SSE41-NEXT: sarl $31, %ecx 4332; X32-SSE41-NEXT: movl %eax, %edx 4333; X32-SSE41-NEXT: shll $31, %edx 4334; X32-SSE41-NEXT: sarl $31, %edx 4335; X32-SSE41-NEXT: movd %edx, %xmm1 4336; X32-SSE41-NEXT: pinsrb $1, %ecx, %xmm1 4337; X32-SSE41-NEXT: movl %eax, %ecx 4338; X32-SSE41-NEXT: shll $29, %ecx 4339; X32-SSE41-NEXT: sarl $31, %ecx 4340; X32-SSE41-NEXT: pinsrb $2, %ecx, %xmm1 4341; X32-SSE41-NEXT: movl %eax, %ecx 4342; X32-SSE41-NEXT: shll $28, %ecx 4343; X32-SSE41-NEXT: sarl $31, %ecx 4344; X32-SSE41-NEXT: pinsrb $3, %ecx, %xmm1 4345; X32-SSE41-NEXT: movl %eax, %ecx 4346; X32-SSE41-NEXT: shll $27, %ecx 4347; X32-SSE41-NEXT: sarl $31, %ecx 4348; X32-SSE41-NEXT: pinsrb $4, %ecx, %xmm1 4349; X32-SSE41-NEXT: movl %eax, %ecx 4350; X32-SSE41-NEXT: shll $26, %ecx 4351; X32-SSE41-NEXT: sarl $31, %ecx 4352; X32-SSE41-NEXT: pinsrb $5, %ecx, %xmm1 4353; X32-SSE41-NEXT: movl %eax, %ecx 4354; X32-SSE41-NEXT: shll $25, %ecx 4355; X32-SSE41-NEXT: sarl $31, %ecx 4356; X32-SSE41-NEXT: pinsrb $6, %ecx, %xmm1 4357; X32-SSE41-NEXT: movsbl %al, %ecx 4358; X32-SSE41-NEXT: shrl $7, %ecx 4359; X32-SSE41-NEXT: pinsrb $7, %ecx, %xmm1 4360; X32-SSE41-NEXT: movl %eax, %ecx 4361; X32-SSE41-NEXT: shll $23, %ecx 4362; X32-SSE41-NEXT: sarl $31, %ecx 4363; X32-SSE41-NEXT: pinsrb $8, %ecx, %xmm1 4364; X32-SSE41-NEXT: movl %eax, %ecx 4365; X32-SSE41-NEXT: shll $22, %ecx 4366; X32-SSE41-NEXT: sarl $31, %ecx 4367; X32-SSE41-NEXT: pinsrb $9, %ecx, %xmm1 4368; X32-SSE41-NEXT: movl %eax, %ecx 4369; X32-SSE41-NEXT: shll $21, %ecx 4370; X32-SSE41-NEXT: sarl $31, %ecx 4371; X32-SSE41-NEXT: pinsrb $10, %ecx, %xmm1 4372; X32-SSE41-NEXT: movl %eax, %ecx 4373; X32-SSE41-NEXT: shll $20, %ecx 4374; X32-SSE41-NEXT: sarl $31, %ecx 4375; X32-SSE41-NEXT: pinsrb $11, %ecx, %xmm1 4376; X32-SSE41-NEXT: movl %eax, %ecx 4377; X32-SSE41-NEXT: shll $19, %ecx 4378; X32-SSE41-NEXT: sarl $31, %ecx 4379; X32-SSE41-NEXT: pinsrb $12, %ecx, %xmm1 4380; X32-SSE41-NEXT: movl %eax, %ecx 4381; X32-SSE41-NEXT: shll $18, %ecx 4382; X32-SSE41-NEXT: sarl $31, %ecx 4383; X32-SSE41-NEXT: pinsrb $13, %ecx, %xmm1 4384; X32-SSE41-NEXT: movl %eax, %ecx 4385; X32-SSE41-NEXT: shll $17, %ecx 4386; X32-SSE41-NEXT: sarl $31, %ecx 4387; X32-SSE41-NEXT: pinsrb $14, %ecx, %xmm1 4388; X32-SSE41-NEXT: shrl $15, %eax 4389; X32-SSE41-NEXT: pinsrb $15, %eax, %xmm1 4390; X32-SSE41-NEXT: popl %esi 4391; X32-SSE41-NEXT: retl 4392entry: 4393 %X = load <32 x i1>, <32 x i1>* %ptr 4394 %Y = sext <32 x i1> %X to <32 x i8> 4395 ret <32 x i8> %Y 4396} 4397 4398define <16 x i16> @load_sext_16i8_to_16i16(<16 x i8> *%ptr) { 4399; SSE2-LABEL: load_sext_16i8_to_16i16: 4400; SSE2: # BB#0: # %entry 4401; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4402; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4403; SSE2-NEXT: psraw $8, %xmm0 4404; SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4405; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4406; SSE2-NEXT: psraw $8, %xmm1 4407; SSE2-NEXT: retq 4408; 4409; SSSE3-LABEL: load_sext_16i8_to_16i16: 4410; SSSE3: # BB#0: # %entry 4411; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4412; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4413; SSSE3-NEXT: psraw $8, %xmm0 4414; SSSE3-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4415; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4416; SSSE3-NEXT: psraw $8, %xmm1 4417; SSSE3-NEXT: retq 4418; 4419; SSE41-LABEL: load_sext_16i8_to_16i16: 4420; SSE41: # BB#0: # %entry 4421; SSE41-NEXT: pmovsxbw (%rdi), %xmm0 4422; SSE41-NEXT: pmovsxbw 8(%rdi), %xmm1 4423; SSE41-NEXT: retq 4424; 4425; AVX1-LABEL: load_sext_16i8_to_16i16: 4426; AVX1: # BB#0: # %entry 4427; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0 4428; AVX1-NEXT: vpmovsxbw 8(%rdi), %xmm1 4429; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4430; AVX1-NEXT: retq 4431; 4432; AVX2-LABEL: load_sext_16i8_to_16i16: 4433; AVX2: # BB#0: # %entry 4434; AVX2-NEXT: vpmovsxbw (%rdi), %ymm0 4435; AVX2-NEXT: retq 4436; 4437; AVX512-LABEL: load_sext_16i8_to_16i16: 4438; AVX512: # BB#0: # %entry 4439; AVX512-NEXT: vpmovsxbw (%rdi), %ymm0 4440; AVX512-NEXT: retq 4441; 4442; X32-SSE41-LABEL: load_sext_16i8_to_16i16: 4443; X32-SSE41: # BB#0: # %entry 4444; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4445; X32-SSE41-NEXT: pmovsxbw (%eax), %xmm0 4446; X32-SSE41-NEXT: pmovsxbw 8(%eax), %xmm1 4447; X32-SSE41-NEXT: retl 4448entry: 4449 %X = load <16 x i8>, <16 x i8>* %ptr 4450 %Y = sext <16 x i8> %X to <16 x i16> 4451 ret <16 x i16> %Y 4452} 4453 4454define <2 x i64> @load_sext_2i16_to_2i64(<2 x i16> *%ptr) { 4455; SSE2-LABEL: load_sext_2i16_to_2i64: 4456; SSE2: # BB#0: # %entry 4457; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 4458; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4459; SSE2-NEXT: movdqa %xmm0, %xmm1 4460; SSE2-NEXT: psrad $31, %xmm1 4461; SSE2-NEXT: psrad $16, %xmm0 4462; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4463; SSE2-NEXT: retq 4464; 4465; SSSE3-LABEL: load_sext_2i16_to_2i64: 4466; SSSE3: # BB#0: # %entry 4467; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 4468; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4469; SSSE3-NEXT: movdqa %xmm0, %xmm1 4470; SSSE3-NEXT: psrad $31, %xmm1 4471; SSSE3-NEXT: psrad $16, %xmm0 4472; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4473; SSSE3-NEXT: retq 4474; 4475; SSE41-LABEL: load_sext_2i16_to_2i64: 4476; SSE41: # BB#0: # %entry 4477; SSE41-NEXT: pmovsxwq (%rdi), %xmm0 4478; SSE41-NEXT: retq 4479; 4480; AVX-LABEL: load_sext_2i16_to_2i64: 4481; AVX: # BB#0: # %entry 4482; AVX-NEXT: vpmovsxwq (%rdi), %xmm0 4483; AVX-NEXT: retq 4484; 4485; X32-SSE41-LABEL: load_sext_2i16_to_2i64: 4486; X32-SSE41: # BB#0: # %entry 4487; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4488; X32-SSE41-NEXT: pmovsxwq (%eax), %xmm0 4489; X32-SSE41-NEXT: retl 4490entry: 4491 %X = load <2 x i16>, <2 x i16>* %ptr 4492 %Y = sext <2 x i16> %X to <2 x i64> 4493 ret <2 x i64> %Y 4494} 4495 4496define <4 x i32> @load_sext_4i16_to_4i32(<4 x i16> *%ptr) { 4497; SSE2-LABEL: load_sext_4i16_to_4i32: 4498; SSE2: # BB#0: # %entry 4499; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4500; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4501; SSE2-NEXT: psrad $16, %xmm0 4502; SSE2-NEXT: retq 4503; 4504; SSSE3-LABEL: load_sext_4i16_to_4i32: 4505; SSSE3: # BB#0: # %entry 4506; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4507; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4508; SSSE3-NEXT: psrad $16, %xmm0 4509; SSSE3-NEXT: retq 4510; 4511; SSE41-LABEL: load_sext_4i16_to_4i32: 4512; SSE41: # BB#0: # %entry 4513; SSE41-NEXT: pmovsxwd (%rdi), %xmm0 4514; SSE41-NEXT: retq 4515; 4516; AVX-LABEL: load_sext_4i16_to_4i32: 4517; AVX: # BB#0: # %entry 4518; AVX-NEXT: vpmovsxwd (%rdi), %xmm0 4519; AVX-NEXT: retq 4520; 4521; X32-SSE41-LABEL: load_sext_4i16_to_4i32: 4522; X32-SSE41: # BB#0: # %entry 4523; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4524; X32-SSE41-NEXT: pmovsxwd (%eax), %xmm0 4525; X32-SSE41-NEXT: retl 4526entry: 4527 %X = load <4 x i16>, <4 x i16>* %ptr 4528 %Y = sext <4 x i16> %X to <4 x i32> 4529 ret <4 x i32> %Y 4530} 4531 4532define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) { 4533; SSE2-LABEL: load_sext_4i16_to_4i64: 4534; SSE2: # BB#0: # %entry 4535; SSE2-NEXT: movswq 2(%rdi), %rax 4536; SSE2-NEXT: movd %rax, %xmm1 4537; SSE2-NEXT: movswq (%rdi), %rax 4538; SSE2-NEXT: movd %rax, %xmm0 4539; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4540; SSE2-NEXT: movswq 6(%rdi), %rax 4541; SSE2-NEXT: movd %rax, %xmm2 4542; SSE2-NEXT: movswq 4(%rdi), %rax 4543; SSE2-NEXT: movd %rax, %xmm1 4544; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 4545; SSE2-NEXT: retq 4546; 4547; SSSE3-LABEL: load_sext_4i16_to_4i64: 4548; SSSE3: # BB#0: # %entry 4549; SSSE3-NEXT: movswq 2(%rdi), %rax 4550; SSSE3-NEXT: movd %rax, %xmm1 4551; SSSE3-NEXT: movswq (%rdi), %rax 4552; SSSE3-NEXT: movd %rax, %xmm0 4553; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4554; SSSE3-NEXT: movswq 6(%rdi), %rax 4555; SSSE3-NEXT: movd %rax, %xmm2 4556; SSSE3-NEXT: movswq 4(%rdi), %rax 4557; SSSE3-NEXT: movd %rax, %xmm1 4558; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 4559; SSSE3-NEXT: retq 4560; 4561; SSE41-LABEL: load_sext_4i16_to_4i64: 4562; SSE41: # BB#0: # %entry 4563; SSE41-NEXT: pmovsxwq (%rdi), %xmm0 4564; SSE41-NEXT: pmovsxwq 4(%rdi), %xmm1 4565; SSE41-NEXT: retq 4566; 4567; AVX1-LABEL: load_sext_4i16_to_4i64: 4568; AVX1: # BB#0: # %entry 4569; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0 4570; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 4571; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4572; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 4573; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4574; AVX1-NEXT: retq 4575; 4576; AVX2-LABEL: load_sext_4i16_to_4i64: 4577; AVX2: # BB#0: # %entry 4578; AVX2-NEXT: vpmovsxwq (%rdi), %ymm0 4579; AVX2-NEXT: retq 4580; 4581; AVX512-LABEL: load_sext_4i16_to_4i64: 4582; AVX512: # BB#0: # %entry 4583; AVX512-NEXT: vpmovsxwq (%rdi), %ymm0 4584; AVX512-NEXT: retq 4585; 4586; X32-SSE41-LABEL: load_sext_4i16_to_4i64: 4587; X32-SSE41: # BB#0: # %entry 4588; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4589; X32-SSE41-NEXT: pmovsxwq (%eax), %xmm0 4590; X32-SSE41-NEXT: pmovsxwq 4(%eax), %xmm1 4591; X32-SSE41-NEXT: retl 4592entry: 4593 %X = load <4 x i16>, <4 x i16>* %ptr 4594 %Y = sext <4 x i16> %X to <4 x i64> 4595 ret <4 x i64> %Y 4596} 4597 4598define <8 x i32> @load_sext_8i16_to_8i32(<8 x i16> *%ptr) { 4599; SSE2-LABEL: load_sext_8i16_to_8i32: 4600; SSE2: # BB#0: # %entry 4601; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4602; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4603; SSE2-NEXT: psrad $16, %xmm0 4604; SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4605; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 4606; SSE2-NEXT: psrad $16, %xmm1 4607; SSE2-NEXT: retq 4608; 4609; SSSE3-LABEL: load_sext_8i16_to_8i32: 4610; SSSE3: # BB#0: # %entry 4611; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4612; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4613; SSSE3-NEXT: psrad $16, %xmm0 4614; SSSE3-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4615; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 4616; SSSE3-NEXT: psrad $16, %xmm1 4617; SSSE3-NEXT: retq 4618; 4619; SSE41-LABEL: load_sext_8i16_to_8i32: 4620; SSE41: # BB#0: # %entry 4621; SSE41-NEXT: pmovsxwd (%rdi), %xmm0 4622; SSE41-NEXT: pmovsxwd 8(%rdi), %xmm1 4623; SSE41-NEXT: retq 4624; 4625; AVX1-LABEL: load_sext_8i16_to_8i32: 4626; AVX1: # BB#0: # %entry 4627; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0 4628; AVX1-NEXT: vpmovsxwd 8(%rdi), %xmm1 4629; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4630; AVX1-NEXT: retq 4631; 4632; AVX2-LABEL: load_sext_8i16_to_8i32: 4633; AVX2: # BB#0: # %entry 4634; AVX2-NEXT: vpmovsxwd (%rdi), %ymm0 4635; AVX2-NEXT: retq 4636; 4637; AVX512-LABEL: load_sext_8i16_to_8i32: 4638; AVX512: # BB#0: # %entry 4639; AVX512-NEXT: vpmovsxwd (%rdi), %ymm0 4640; AVX512-NEXT: retq 4641; 4642; X32-SSE41-LABEL: load_sext_8i16_to_8i32: 4643; X32-SSE41: # BB#0: # %entry 4644; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4645; X32-SSE41-NEXT: pmovsxwd (%eax), %xmm0 4646; X32-SSE41-NEXT: pmovsxwd 8(%eax), %xmm1 4647; X32-SSE41-NEXT: retl 4648entry: 4649 %X = load <8 x i16>, <8 x i16>* %ptr 4650 %Y = sext <8 x i16> %X to <8 x i32> 4651 ret <8 x i32> %Y 4652} 4653 4654define <2 x i64> @load_sext_2i32_to_2i64(<2 x i32> *%ptr) { 4655; SSE2-LABEL: load_sext_2i32_to_2i64: 4656; SSE2: # BB#0: # %entry 4657; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4658; SSE2-NEXT: movdqa %xmm0, %xmm1 4659; SSE2-NEXT: psrad $31, %xmm1 4660; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4661; SSE2-NEXT: retq 4662; 4663; SSSE3-LABEL: load_sext_2i32_to_2i64: 4664; SSSE3: # BB#0: # %entry 4665; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4666; SSSE3-NEXT: movdqa %xmm0, %xmm1 4667; SSSE3-NEXT: psrad $31, %xmm1 4668; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4669; SSSE3-NEXT: retq 4670; 4671; SSE41-LABEL: load_sext_2i32_to_2i64: 4672; SSE41: # BB#0: # %entry 4673; SSE41-NEXT: pmovsxdq (%rdi), %xmm0 4674; SSE41-NEXT: retq 4675; 4676; AVX-LABEL: load_sext_2i32_to_2i64: 4677; AVX: # BB#0: # %entry 4678; AVX-NEXT: vpmovsxdq (%rdi), %xmm0 4679; AVX-NEXT: retq 4680; 4681; X32-SSE41-LABEL: load_sext_2i32_to_2i64: 4682; X32-SSE41: # BB#0: # %entry 4683; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4684; X32-SSE41-NEXT: pmovsxdq (%eax), %xmm0 4685; X32-SSE41-NEXT: retl 4686entry: 4687 %X = load <2 x i32>, <2 x i32>* %ptr 4688 %Y = sext <2 x i32> %X to <2 x i64> 4689 ret <2 x i64> %Y 4690} 4691 4692define <4 x i64> @load_sext_4i32_to_4i64(<4 x i32> *%ptr) { 4693; SSE2-LABEL: load_sext_4i32_to_4i64: 4694; SSE2: # BB#0: # %entry 4695; SSE2-NEXT: movdqa (%rdi), %xmm0 4696; SSE2-NEXT: movdqa %xmm0, %xmm2 4697; SSE2-NEXT: psrad $31, %xmm2 4698; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4699; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4700; SSE2-NEXT: movdqa %xmm1, %xmm2 4701; SSE2-NEXT: psrad $31, %xmm2 4702; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4703; SSE2-NEXT: retq 4704; 4705; SSSE3-LABEL: load_sext_4i32_to_4i64: 4706; SSSE3: # BB#0: # %entry 4707; SSSE3-NEXT: movdqa (%rdi), %xmm0 4708; SSSE3-NEXT: movdqa %xmm0, %xmm2 4709; SSSE3-NEXT: psrad $31, %xmm2 4710; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4711; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4712; SSSE3-NEXT: movdqa %xmm1, %xmm2 4713; SSSE3-NEXT: psrad $31, %xmm2 4714; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4715; SSSE3-NEXT: retq 4716; 4717; SSE41-LABEL: load_sext_4i32_to_4i64: 4718; SSE41: # BB#0: # %entry 4719; SSE41-NEXT: pmovsxdq (%rdi), %xmm0 4720; SSE41-NEXT: pmovsxdq 8(%rdi), %xmm1 4721; SSE41-NEXT: retq 4722; 4723; AVX1-LABEL: load_sext_4i32_to_4i64: 4724; AVX1: # BB#0: # %entry 4725; AVX1-NEXT: vpmovsxdq (%rdi), %xmm0 4726; AVX1-NEXT: vpmovsxdq 8(%rdi), %xmm1 4727; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4728; AVX1-NEXT: retq 4729; 4730; AVX2-LABEL: load_sext_4i32_to_4i64: 4731; AVX2: # BB#0: # %entry 4732; AVX2-NEXT: vpmovsxdq (%rdi), %ymm0 4733; AVX2-NEXT: retq 4734; 4735; AVX512-LABEL: load_sext_4i32_to_4i64: 4736; AVX512: # BB#0: # %entry 4737; AVX512-NEXT: vpmovsxdq (%rdi), %ymm0 4738; AVX512-NEXT: retq 4739; 4740; X32-SSE41-LABEL: load_sext_4i32_to_4i64: 4741; X32-SSE41: # BB#0: # %entry 4742; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4743; X32-SSE41-NEXT: pmovsxdq (%eax), %xmm0 4744; X32-SSE41-NEXT: pmovsxdq 8(%eax), %xmm1 4745; X32-SSE41-NEXT: retl 4746entry: 4747 %X = load <4 x i32>, <4 x i32>* %ptr 4748 %Y = sext <4 x i32> %X to <4 x i64> 4749 ret <4 x i64> %Y 4750} 4751 4752define i32 @sext_2i8_to_i32(<16 x i8> %A) nounwind uwtable readnone ssp { 4753; SSE2-LABEL: sext_2i8_to_i32: 4754; SSE2: # BB#0: # %entry 4755; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4756; SSE2-NEXT: psraw $8, %xmm0 4757; SSE2-NEXT: movd %xmm0, %eax 4758; SSE2-NEXT: retq 4759; 4760; SSSE3-LABEL: sext_2i8_to_i32: 4761; SSSE3: # BB#0: # %entry 4762; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4763; SSSE3-NEXT: psraw $8, %xmm0 4764; SSSE3-NEXT: movd %xmm0, %eax 4765; SSSE3-NEXT: retq 4766; 4767; SSE41-LABEL: sext_2i8_to_i32: 4768; SSE41: # BB#0: # %entry 4769; SSE41-NEXT: pmovsxbw %xmm0, %xmm0 4770; SSE41-NEXT: movd %xmm0, %eax 4771; SSE41-NEXT: retq 4772; 4773; AVX-LABEL: sext_2i8_to_i32: 4774; AVX: # BB#0: # %entry 4775; AVX-NEXT: vpmovsxbw %xmm0, %xmm0 4776; AVX-NEXT: vmovd %xmm0, %eax 4777; AVX-NEXT: retq 4778; 4779; X32-SSE41-LABEL: sext_2i8_to_i32: 4780; X32-SSE41: # BB#0: # %entry 4781; X32-SSE41-NEXT: pushl %eax 4782; X32-SSE41-NEXT: .Ltmp0: 4783; X32-SSE41-NEXT: .cfi_def_cfa_offset 8 4784; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm0 4785; X32-SSE41-NEXT: movd %xmm0, %eax 4786; X32-SSE41-NEXT: popl %ecx 4787; X32-SSE41-NEXT: retl 4788entry: 4789 %Shuf = shufflevector <16 x i8> %A, <16 x i8> undef, <2 x i32> <i32 0, i32 1> 4790 %Ex = sext <2 x i8> %Shuf to <2 x i16> 4791 %Bc = bitcast <2 x i16> %Ex to i32 4792 ret i32 %Bc 4793} 4794 4795define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) { 4796; SSE2-LABEL: sext_4i1_to_4i64: 4797; SSE2: # BB#0: 4798; SSE2-NEXT: pslld $31, %xmm0 4799; SSE2-NEXT: psrad $31, %xmm0 4800; SSE2-NEXT: movdqa %xmm0, %xmm2 4801; SSE2-NEXT: psrad $31, %xmm2 4802; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4803; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4804; SSE2-NEXT: movdqa %xmm1, %xmm2 4805; SSE2-NEXT: psrad $31, %xmm2 4806; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4807; SSE2-NEXT: retq 4808; 4809; SSSE3-LABEL: sext_4i1_to_4i64: 4810; SSSE3: # BB#0: 4811; SSSE3-NEXT: pslld $31, %xmm0 4812; SSSE3-NEXT: psrad $31, %xmm0 4813; SSSE3-NEXT: movdqa %xmm0, %xmm2 4814; SSSE3-NEXT: psrad $31, %xmm2 4815; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4816; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4817; SSSE3-NEXT: movdqa %xmm1, %xmm2 4818; SSSE3-NEXT: psrad $31, %xmm2 4819; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4820; SSSE3-NEXT: retq 4821; 4822; SSE41-LABEL: sext_4i1_to_4i64: 4823; SSE41: # BB#0: 4824; SSE41-NEXT: pslld $31, %xmm0 4825; SSE41-NEXT: psrad $31, %xmm0 4826; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4827; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4828; SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4829; SSE41-NEXT: movdqa %xmm2, %xmm0 4830; SSE41-NEXT: retq 4831; 4832; AVX1-LABEL: sext_4i1_to_4i64: 4833; AVX1: # BB#0: 4834; AVX1-NEXT: vpslld $31, %xmm0, %xmm0 4835; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0 4836; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 4837; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4838; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 4839; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4840; AVX1-NEXT: retq 4841; 4842; AVX2-LABEL: sext_4i1_to_4i64: 4843; AVX2: # BB#0: 4844; AVX2-NEXT: vpslld $31, %xmm0, %xmm0 4845; AVX2-NEXT: vpsrad $31, %xmm0, %xmm0 4846; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 4847; AVX2-NEXT: retq 4848; 4849; AVX512-LABEL: sext_4i1_to_4i64: 4850; AVX512: # BB#0: 4851; AVX512-NEXT: vpslld $31, %xmm0, %xmm0 4852; AVX512-NEXT: vpsrad $31, %xmm0, %xmm0 4853; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 4854; AVX512-NEXT: retq 4855; 4856; X32-SSE41-LABEL: sext_4i1_to_4i64: 4857; X32-SSE41: # BB#0: 4858; X32-SSE41-NEXT: pslld $31, %xmm0 4859; X32-SSE41-NEXT: psrad $31, %xmm0 4860; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4861; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4862; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4863; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 4864; X32-SSE41-NEXT: retl 4865 %extmask = sext <4 x i1> %mask to <4 x i64> 4866 ret <4 x i64> %extmask 4867} 4868 4869define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) { 4870; SSE2-LABEL: sext_4i8_to_4i64: 4871; SSE2: # BB#0: 4872; SSE2-NEXT: pslld $24, %xmm0 4873; SSE2-NEXT: psrad $24, %xmm0 4874; SSE2-NEXT: movdqa %xmm0, %xmm2 4875; SSE2-NEXT: psrad $31, %xmm2 4876; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4877; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4878; SSE2-NEXT: movdqa %xmm1, %xmm2 4879; SSE2-NEXT: psrad $31, %xmm2 4880; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4881; SSE2-NEXT: retq 4882; 4883; SSSE3-LABEL: sext_4i8_to_4i64: 4884; SSSE3: # BB#0: 4885; SSSE3-NEXT: pslld $24, %xmm0 4886; SSSE3-NEXT: psrad $24, %xmm0 4887; SSSE3-NEXT: movdqa %xmm0, %xmm2 4888; SSSE3-NEXT: psrad $31, %xmm2 4889; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4890; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4891; SSSE3-NEXT: movdqa %xmm1, %xmm2 4892; SSSE3-NEXT: psrad $31, %xmm2 4893; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4894; SSSE3-NEXT: retq 4895; 4896; SSE41-LABEL: sext_4i8_to_4i64: 4897; SSE41: # BB#0: 4898; SSE41-NEXT: pslld $24, %xmm0 4899; SSE41-NEXT: psrad $24, %xmm0 4900; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4901; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4902; SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4903; SSE41-NEXT: movdqa %xmm2, %xmm0 4904; SSE41-NEXT: retq 4905; 4906; AVX1-LABEL: sext_4i8_to_4i64: 4907; AVX1: # BB#0: 4908; AVX1-NEXT: vpslld $24, %xmm0, %xmm0 4909; AVX1-NEXT: vpsrad $24, %xmm0, %xmm0 4910; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 4911; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4912; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 4913; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4914; AVX1-NEXT: retq 4915; 4916; AVX2-LABEL: sext_4i8_to_4i64: 4917; AVX2: # BB#0: 4918; AVX2-NEXT: vpslld $24, %xmm0, %xmm0 4919; AVX2-NEXT: vpsrad $24, %xmm0, %xmm0 4920; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 4921; AVX2-NEXT: retq 4922; 4923; AVX512-LABEL: sext_4i8_to_4i64: 4924; AVX512: # BB#0: 4925; AVX512-NEXT: vpslld $24, %xmm0, %xmm0 4926; AVX512-NEXT: vpsrad $24, %xmm0, %xmm0 4927; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 4928; AVX512-NEXT: retq 4929; 4930; X32-SSE41-LABEL: sext_4i8_to_4i64: 4931; X32-SSE41: # BB#0: 4932; X32-SSE41-NEXT: pslld $24, %xmm0 4933; X32-SSE41-NEXT: psrad $24, %xmm0 4934; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4935; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4936; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4937; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 4938; X32-SSE41-NEXT: retl 4939 %extmask = sext <4 x i8> %mask to <4 x i64> 4940 ret <4 x i64> %extmask 4941} 4942 4943define <32 x i8> @sext_32xi1_to_32xi8(<32 x i16> %c1, <32 x i16> %c2)nounwind { 4944; SSE-LABEL: sext_32xi1_to_32xi8: 4945; SSE: # BB#0: 4946; SSE-NEXT: pcmpeqw %xmm5, %xmm1 4947; SSE-NEXT: pcmpeqw %xmm4, %xmm0 4948; SSE-NEXT: packsswb %xmm1, %xmm0 4949; SSE-NEXT: pcmpeqw %xmm7, %xmm3 4950; SSE-NEXT: pcmpeqw %xmm6, %xmm2 4951; SSE-NEXT: packsswb %xmm3, %xmm2 4952; SSE-NEXT: movdqa %xmm2, %xmm1 4953; SSE-NEXT: retq 4954; 4955; AVX1-LABEL: sext_32xi1_to_32xi8: 4956; AVX1: # BB#0: 4957; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 4958; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5 4959; AVX1-NEXT: vpcmpeqw %xmm4, %xmm5, %xmm4 4960; AVX1-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 4961; AVX1-NEXT: vpacksswb %xmm4, %xmm1, %xmm1 4962; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3 4963; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 4964; AVX1-NEXT: vpcmpeqw %xmm3, %xmm4, %xmm3 4965; AVX1-NEXT: vpcmpeqw %xmm2, %xmm0, %xmm0 4966; AVX1-NEXT: vpacksswb %xmm3, %xmm0, %xmm0 4967; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4968; AVX1-NEXT: retq 4969; 4970; AVX2-LABEL: sext_32xi1_to_32xi8: 4971; AVX2: # BB#0: 4972; AVX2-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 4973; AVX2-NEXT: vpcmpeqw %ymm2, %ymm0, %ymm0 4974; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 4975; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] 4976; AVX2-NEXT: retq 4977; 4978; AVX512F-LABEL: sext_32xi1_to_32xi8: 4979; AVX512F: # BB#0: 4980; AVX512F-NEXT: vpcmpeqw %ymm2, %ymm0, %ymm0 4981; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 4982; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4983; AVX512F-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 4984; AVX512F-NEXT: vpmovsxwd %ymm1, %zmm1 4985; AVX512F-NEXT: vpmovdb %zmm1, %xmm1 4986; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4987; AVX512F-NEXT: retq 4988; 4989; AVX512BW-LABEL: sext_32xi1_to_32xi8: 4990; AVX512BW: # BB#0: 4991; AVX512BW-NEXT: vpcmpeqw %zmm1, %zmm0, %k1 4992; AVX512BW-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 4993; AVX512BW-NEXT: vmovdqu16 %zmm0, %zmm0 {%k1} {z} 4994; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 4995; AVX512BW-NEXT: retq 4996; 4997; X32-SSE41-LABEL: sext_32xi1_to_32xi8: 4998; X32-SSE41: # BB#0: 4999; X32-SSE41-NEXT: pushl %ebp 5000; X32-SSE41-NEXT: movl %esp, %ebp 5001; X32-SSE41-NEXT: andl $-16, %esp 5002; X32-SSE41-NEXT: subl $16, %esp 5003; X32-SSE41-NEXT: movdqa 8(%ebp), %xmm3 5004; X32-SSE41-NEXT: pcmpeqw 40(%ebp), %xmm1 5005; X32-SSE41-NEXT: pcmpeqw 24(%ebp), %xmm0 5006; X32-SSE41-NEXT: packsswb %xmm1, %xmm0 5007; X32-SSE41-NEXT: pcmpeqw 72(%ebp), %xmm3 5008; X32-SSE41-NEXT: pcmpeqw 56(%ebp), %xmm2 5009; X32-SSE41-NEXT: packsswb %xmm3, %xmm2 5010; X32-SSE41-NEXT: movdqa %xmm2, %xmm1 5011; X32-SSE41-NEXT: movl %ebp, %esp 5012; X32-SSE41-NEXT: popl %ebp 5013; X32-SSE41-NEXT: retl 5014 %a = icmp eq <32 x i16> %c1, %c2 5015 %b = sext <32 x i1> %a to <32 x i8> 5016 ret <32 x i8> %b 5017} 5018