1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F 8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512BW 9; 10; Just one 32-bit run to make sure we do reasonable things there. 11; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32-SSE41 12 13define <8 x i16> @sext_16i8_to_8i16(<16 x i8> %A) nounwind uwtable readnone ssp { 14; SSE2-LABEL: sext_16i8_to_8i16: 15; SSE2: # BB#0: # %entry 16; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 17; SSE2-NEXT: psraw $8, %xmm0 18; SSE2-NEXT: retq 19; 20; SSSE3-LABEL: sext_16i8_to_8i16: 21; SSSE3: # BB#0: # %entry 22; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 23; SSSE3-NEXT: psraw $8, %xmm0 24; SSSE3-NEXT: retq 25; 26; SSE41-LABEL: sext_16i8_to_8i16: 27; SSE41: # BB#0: # %entry 28; SSE41-NEXT: pmovsxbw %xmm0, %xmm0 29; SSE41-NEXT: retq 30; 31; AVX-LABEL: sext_16i8_to_8i16: 32; AVX: # BB#0: # %entry 33; AVX-NEXT: vpmovsxbw %xmm0, %xmm0 34; AVX-NEXT: retq 35; 36; X32-SSE41-LABEL: sext_16i8_to_8i16: 37; X32-SSE41: # BB#0: # %entry 38; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm0 39; X32-SSE41-NEXT: retl 40entry: 41 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 42 %C = sext <8 x i8> %B to <8 x i16> 43 ret <8 x i16> %C 44} 45 46define <16 x i16> @sext_16i8_to_16i16(<16 x i8> %A) nounwind uwtable readnone ssp { 47; SSE2-LABEL: sext_16i8_to_16i16: 48; SSE2: # BB#0: # %entry 49; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 50; SSE2-NEXT: psraw $8, %xmm2 51; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 52; SSE2-NEXT: psraw $8, %xmm1 53; SSE2-NEXT: movdqa %xmm2, %xmm0 54; SSE2-NEXT: retq 55; 56; SSSE3-LABEL: sext_16i8_to_16i16: 57; SSSE3: # BB#0: # %entry 58; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 59; SSSE3-NEXT: psraw $8, %xmm2 60; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 61; SSSE3-NEXT: psraw $8, %xmm1 62; SSSE3-NEXT: movdqa %xmm2, %xmm0 63; SSSE3-NEXT: retq 64; 65; SSE41-LABEL: sext_16i8_to_16i16: 66; SSE41: # BB#0: # %entry 67; SSE41-NEXT: pmovsxbw %xmm0, %xmm2 68; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 69; SSE41-NEXT: pmovsxbw %xmm0, %xmm1 70; SSE41-NEXT: movdqa %xmm2, %xmm0 71; SSE41-NEXT: retq 72; 73; AVX1-LABEL: sext_16i8_to_16i16: 74; AVX1: # BB#0: # %entry 75; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1 76; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 77; AVX1-NEXT: vpmovsxbw %xmm0, %xmm0 78; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 79; AVX1-NEXT: retq 80; 81; AVX2-LABEL: sext_16i8_to_16i16: 82; AVX2: # BB#0: # %entry 83; AVX2-NEXT: vpmovsxbw %xmm0, %ymm0 84; AVX2-NEXT: retq 85; 86; AVX512-LABEL: sext_16i8_to_16i16: 87; AVX512: # BB#0: # %entry 88; AVX512-NEXT: vpmovsxbw %xmm0, %ymm0 89; AVX512-NEXT: retq 90; 91; X32-SSE41-LABEL: sext_16i8_to_16i16: 92; X32-SSE41: # BB#0: # %entry 93; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm2 94; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 95; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm1 96; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 97; X32-SSE41-NEXT: retl 98entry: 99 %B = sext <16 x i8> %A to <16 x i16> 100 ret <16 x i16> %B 101} 102 103define <32 x i16> @sext_32i8_to_32i16(<32 x i8> %A) nounwind uwtable readnone ssp { 104; SSE2-LABEL: sext_32i8_to_32i16: 105; SSE2: # BB#0: # %entry 106; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3],xmm4[4],xmm0[4],xmm4[5],xmm0[5],xmm4[6],xmm0[6],xmm4[7],xmm0[7] 107; SSE2-NEXT: psraw $8, %xmm4 108; SSE2-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm0[8],xmm5[9],xmm0[9],xmm5[10],xmm0[10],xmm5[11],xmm0[11],xmm5[12],xmm0[12],xmm5[13],xmm0[13],xmm5[14],xmm0[14],xmm5[15],xmm0[15] 109; SSE2-NEXT: psraw $8, %xmm5 110; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 111; SSE2-NEXT: psraw $8, %xmm2 112; SSE2-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm1[8],xmm3[9],xmm1[9],xmm3[10],xmm1[10],xmm3[11],xmm1[11],xmm3[12],xmm1[12],xmm3[13],xmm1[13],xmm3[14],xmm1[14],xmm3[15],xmm1[15] 113; SSE2-NEXT: psraw $8, %xmm3 114; SSE2-NEXT: movdqa %xmm4, %xmm0 115; SSE2-NEXT: movdqa %xmm5, %xmm1 116; SSE2-NEXT: retq 117; 118; SSSE3-LABEL: sext_32i8_to_32i16: 119; SSSE3: # BB#0: # %entry 120; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3],xmm4[4],xmm0[4],xmm4[5],xmm0[5],xmm4[6],xmm0[6],xmm4[7],xmm0[7] 121; SSSE3-NEXT: psraw $8, %xmm4 122; SSSE3-NEXT: punpckhbw {{.*#+}} xmm5 = xmm5[8],xmm0[8],xmm5[9],xmm0[9],xmm5[10],xmm0[10],xmm5[11],xmm0[11],xmm5[12],xmm0[12],xmm5[13],xmm0[13],xmm5[14],xmm0[14],xmm5[15],xmm0[15] 123; SSSE3-NEXT: psraw $8, %xmm5 124; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7] 125; SSSE3-NEXT: psraw $8, %xmm2 126; SSSE3-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm1[8],xmm3[9],xmm1[9],xmm3[10],xmm1[10],xmm3[11],xmm1[11],xmm3[12],xmm1[12],xmm3[13],xmm1[13],xmm3[14],xmm1[14],xmm3[15],xmm1[15] 127; SSSE3-NEXT: psraw $8, %xmm3 128; SSSE3-NEXT: movdqa %xmm4, %xmm0 129; SSSE3-NEXT: movdqa %xmm5, %xmm1 130; SSSE3-NEXT: retq 131; 132; SSE41-LABEL: sext_32i8_to_32i16: 133; SSE41: # BB#0: # %entry 134; SSE41-NEXT: pmovsxbw %xmm0, %xmm5 135; SSE41-NEXT: pmovsxbw %xmm1, %xmm2 136; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 137; SSE41-NEXT: pmovsxbw %xmm0, %xmm4 138; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 139; SSE41-NEXT: pmovsxbw %xmm0, %xmm3 140; SSE41-NEXT: movdqa %xmm5, %xmm0 141; SSE41-NEXT: movdqa %xmm4, %xmm1 142; SSE41-NEXT: retq 143; 144; AVX1-LABEL: sext_32i8_to_32i16: 145; AVX1: # BB#0: # %entry 146; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1 147; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 148; AVX1-NEXT: vpmovsxbw %xmm2, %xmm2 149; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 150; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 151; AVX1-NEXT: vpmovsxbw %xmm0, %xmm1 152; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 153; AVX1-NEXT: vpmovsxbw %xmm0, %xmm0 154; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 155; AVX1-NEXT: vmovaps %ymm2, %ymm0 156; AVX1-NEXT: retq 157; 158; AVX2-LABEL: sext_32i8_to_32i16: 159; AVX2: # BB#0: # %entry 160; AVX2-NEXT: vpmovsxbw %xmm0, %ymm2 161; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 162; AVX2-NEXT: vpmovsxbw %xmm0, %ymm1 163; AVX2-NEXT: vmovdqa %ymm2, %ymm0 164; AVX2-NEXT: retq 165; 166; AVX512F-LABEL: sext_32i8_to_32i16: 167; AVX512F: # BB#0: # %entry 168; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm2 169; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm0 170; AVX512F-NEXT: vpmovsxbw %xmm0, %ymm1 171; AVX512F-NEXT: vmovdqa %ymm2, %ymm0 172; AVX512F-NEXT: retq 173; 174; AVX512BW-LABEL: sext_32i8_to_32i16: 175; AVX512BW: # BB#0: # %entry 176; AVX512BW-NEXT: vpmovsxbw %ymm0, %zmm0 177; AVX512BW-NEXT: retq 178; 179; X32-SSE41-LABEL: sext_32i8_to_32i16: 180; X32-SSE41: # BB#0: # %entry 181; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm5 182; X32-SSE41-NEXT: pmovsxbw %xmm1, %xmm2 183; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 184; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm4 185; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 186; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm3 187; X32-SSE41-NEXT: movdqa %xmm5, %xmm0 188; X32-SSE41-NEXT: movdqa %xmm4, %xmm1 189; X32-SSE41-NEXT: retl 190entry: 191 %B = sext <32 x i8> %A to <32 x i16> 192 ret <32 x i16> %B 193} 194 195define <4 x i32> @sext_16i8_to_4i32(<16 x i8> %A) nounwind uwtable readnone ssp { 196; SSE2-LABEL: sext_16i8_to_4i32: 197; SSE2: # BB#0: # %entry 198; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 199; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 200; SSE2-NEXT: psrad $24, %xmm0 201; SSE2-NEXT: retq 202; 203; SSSE3-LABEL: sext_16i8_to_4i32: 204; SSSE3: # BB#0: # %entry 205; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 206; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 207; SSSE3-NEXT: psrad $24, %xmm0 208; SSSE3-NEXT: retq 209; 210; SSE41-LABEL: sext_16i8_to_4i32: 211; SSE41: # BB#0: # %entry 212; SSE41-NEXT: pmovsxbd %xmm0, %xmm0 213; SSE41-NEXT: retq 214; 215; AVX-LABEL: sext_16i8_to_4i32: 216; AVX: # BB#0: # %entry 217; AVX-NEXT: vpmovsxbd %xmm0, %xmm0 218; AVX-NEXT: retq 219; 220; X32-SSE41-LABEL: sext_16i8_to_4i32: 221; X32-SSE41: # BB#0: # %entry 222; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm0 223; X32-SSE41-NEXT: retl 224entry: 225 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 226 %C = sext <4 x i8> %B to <4 x i32> 227 ret <4 x i32> %C 228} 229 230define <8 x i32> @sext_16i8_to_8i32(<16 x i8> %A) nounwind uwtable readnone ssp { 231; SSE2-LABEL: sext_16i8_to_8i32: 232; SSE2: # BB#0: # %entry 233; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 234; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 235; SSE2-NEXT: psrad $24, %xmm2 236; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 237; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 238; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 239; SSE2-NEXT: psrad $24, %xmm1 240; SSE2-NEXT: movdqa %xmm2, %xmm0 241; SSE2-NEXT: retq 242; 243; SSSE3-LABEL: sext_16i8_to_8i32: 244; SSSE3: # BB#0: # %entry 245; SSSE3-NEXT: movdqa %xmm0, %xmm1 246; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 247; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 248; SSSE3-NEXT: psrad $24, %xmm0 249; SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[u,u,u,4,u,u,u,5,u,u,u,6,u,u,u,7] 250; SSSE3-NEXT: psrad $24, %xmm1 251; SSSE3-NEXT: retq 252; 253; SSE41-LABEL: sext_16i8_to_8i32: 254; SSE41: # BB#0: # %entry 255; SSE41-NEXT: pmovsxbd %xmm0, %xmm2 256; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 257; SSE41-NEXT: pmovsxbd %xmm0, %xmm1 258; SSE41-NEXT: movdqa %xmm2, %xmm0 259; SSE41-NEXT: retq 260; 261; AVX1-LABEL: sext_16i8_to_8i32: 262; AVX1: # BB#0: # %entry 263; AVX1-NEXT: vpmovsxbd %xmm0, %xmm1 264; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 265; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 266; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 267; AVX1-NEXT: retq 268; 269; AVX2-LABEL: sext_16i8_to_8i32: 270; AVX2: # BB#0: # %entry 271; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0 272; AVX2-NEXT: retq 273; 274; AVX512-LABEL: sext_16i8_to_8i32: 275; AVX512: # BB#0: # %entry 276; AVX512-NEXT: vpmovsxbd %xmm0, %ymm0 277; AVX512-NEXT: retq 278; 279; X32-SSE41-LABEL: sext_16i8_to_8i32: 280; X32-SSE41: # BB#0: # %entry 281; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm2 282; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 283; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm1 284; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 285; X32-SSE41-NEXT: retl 286entry: 287 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 288 %C = sext <8 x i8> %B to <8 x i32> 289 ret <8 x i32> %C 290} 291 292define <16 x i32> @sext_16i8_to_16i32(<16 x i8> %A) nounwind uwtable readnone ssp { 293; SSE2-LABEL: sext_16i8_to_16i32: 294; SSE2: # BB#0: # %entry 295; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 296; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3] 297; SSE2-NEXT: psrad $24, %xmm4 298; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 299; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 300; SSE2-NEXT: psrad $24, %xmm2 301; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 302; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 303; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 304; SSE2-NEXT: psrad $24, %xmm1 305; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 306; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 307; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3] 308; SSE2-NEXT: psrad $24, %xmm3 309; SSE2-NEXT: movdqa %xmm4, %xmm0 310; SSE2-NEXT: retq 311; 312; SSSE3-LABEL: sext_16i8_to_16i32: 313; SSSE3: # BB#0: # %entry 314; SSSE3-NEXT: movdqa %xmm0, %xmm3 315; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 316; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 317; SSSE3-NEXT: psrad $24, %xmm0 318; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm3[8],xmm1[9],xmm3[9],xmm1[10],xmm3[10],xmm1[11],xmm3[11],xmm1[12],xmm3[12],xmm1[13],xmm3[13],xmm1[14],xmm3[14],xmm1[15],xmm3[15] 319; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 320; SSSE3-NEXT: psrad $24, %xmm2 321; SSSE3-NEXT: movdqa %xmm3, %xmm1 322; SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[u,u,u,4,u,u,u,5,u,u,u,6,u,u,u,7] 323; SSSE3-NEXT: psrad $24, %xmm1 324; SSSE3-NEXT: pshufb {{.*#+}} xmm3 = xmm3[u,u,u,12,u,u,u,13,u,u,u,14,u,u,u,15] 325; SSSE3-NEXT: psrad $24, %xmm3 326; SSSE3-NEXT: retq 327; 328; SSE41-LABEL: sext_16i8_to_16i32: 329; SSE41: # BB#0: # %entry 330; SSE41-NEXT: pmovsxbd %xmm0, %xmm4 331; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 332; SSE41-NEXT: pmovsxbd %xmm1, %xmm1 333; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 334; SSE41-NEXT: pmovsxbd %xmm2, %xmm2 335; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 336; SSE41-NEXT: pmovsxbd %xmm0, %xmm3 337; SSE41-NEXT: movdqa %xmm4, %xmm0 338; SSE41-NEXT: retq 339; 340; AVX1-LABEL: sext_16i8_to_16i32: 341; AVX1: # BB#0: # %entry 342; AVX1-NEXT: vpmovsxbd %xmm0, %xmm1 343; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] 344; AVX1-NEXT: vpmovsxbd %xmm2, %xmm2 345; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 346; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 347; AVX1-NEXT: vpmovsxbd %xmm1, %xmm1 348; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 349; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 350; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 351; AVX1-NEXT: vmovaps %ymm2, %ymm0 352; AVX1-NEXT: retq 353; 354; AVX2-LABEL: sext_16i8_to_16i32: 355; AVX2: # BB#0: # %entry 356; AVX2-NEXT: vpmovsxbd %xmm0, %ymm2 357; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 358; AVX2-NEXT: vpmovsxbd %xmm0, %ymm1 359; AVX2-NEXT: vmovdqa %ymm2, %ymm0 360; AVX2-NEXT: retq 361; 362; AVX512-LABEL: sext_16i8_to_16i32: 363; AVX512: # BB#0: # %entry 364; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0 365; AVX512-NEXT: retq 366; 367; X32-SSE41-LABEL: sext_16i8_to_16i32: 368; X32-SSE41: # BB#0: # %entry 369; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm4 370; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 371; X32-SSE41-NEXT: pmovsxbd %xmm1, %xmm1 372; X32-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 373; X32-SSE41-NEXT: pmovsxbd %xmm2, %xmm2 374; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 375; X32-SSE41-NEXT: pmovsxbd %xmm0, %xmm3 376; X32-SSE41-NEXT: movdqa %xmm4, %xmm0 377; X32-SSE41-NEXT: retl 378entry: 379 %B = sext <16 x i8> %A to <16 x i32> 380 ret <16 x i32> %B 381} 382 383define <2 x i64> @sext_16i8_to_2i64(<16 x i8> %A) nounwind uwtable readnone ssp { 384; SSE2-LABEL: sext_16i8_to_2i64: 385; SSE2: # BB#0: # %entry 386; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 387; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 388; SSE2-NEXT: movdqa %xmm0, %xmm1 389; SSE2-NEXT: psrad $31, %xmm1 390; SSE2-NEXT: psrad $24, %xmm0 391; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 392; SSE2-NEXT: retq 393; 394; SSSE3-LABEL: sext_16i8_to_2i64: 395; SSSE3: # BB#0: # %entry 396; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 397; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 398; SSSE3-NEXT: movdqa %xmm0, %xmm1 399; SSSE3-NEXT: psrad $31, %xmm1 400; SSSE3-NEXT: psrad $24, %xmm0 401; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 402; SSSE3-NEXT: retq 403; 404; SSE41-LABEL: sext_16i8_to_2i64: 405; SSE41: # BB#0: # %entry 406; SSE41-NEXT: pmovsxbq %xmm0, %xmm0 407; SSE41-NEXT: retq 408; 409; AVX-LABEL: sext_16i8_to_2i64: 410; AVX: # BB#0: # %entry 411; AVX-NEXT: vpmovsxbq %xmm0, %xmm0 412; AVX-NEXT: retq 413; 414; X32-SSE41-LABEL: sext_16i8_to_2i64: 415; X32-SSE41: # BB#0: # %entry 416; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm0 417; X32-SSE41-NEXT: retl 418entry: 419 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <2 x i32> <i32 0, i32 1> 420 %C = sext <2 x i8> %B to <2 x i64> 421 ret <2 x i64> %C 422} 423 424define <4 x i64> @sext_16i8_to_4i64(<16 x i8> %A) nounwind uwtable readnone ssp { 425; SSE2-LABEL: sext_16i8_to_4i64: 426; SSE2: # BB#0: # %entry 427; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 428; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 429; SSE2-NEXT: movdqa %xmm2, %xmm1 430; SSE2-NEXT: psrad $31, %xmm1 431; SSE2-NEXT: psrad $24, %xmm2 432; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 433; SSE2-NEXT: psrld $16, %xmm0 434; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 435; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 436; SSE2-NEXT: movdqa %xmm1, %xmm0 437; SSE2-NEXT: psrad $31, %xmm0 438; SSE2-NEXT: psrad $24, %xmm1 439; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 440; SSE2-NEXT: movdqa %xmm2, %xmm0 441; SSE2-NEXT: retq 442; 443; SSSE3-LABEL: sext_16i8_to_4i64: 444; SSSE3: # BB#0: # %entry 445; SSSE3-NEXT: movdqa %xmm0, %xmm1 446; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 447; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 448; SSSE3-NEXT: movdqa %xmm0, %xmm2 449; SSSE3-NEXT: psrad $31, %xmm2 450; SSSE3-NEXT: psrad $24, %xmm0 451; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 452; SSSE3-NEXT: pshufb {{.*#+}} xmm1 = xmm1[u,u,u,2,u,u,u,3,u,u,u],zero,xmm1[u,u,u],zero 453; SSSE3-NEXT: movdqa %xmm1, %xmm2 454; SSSE3-NEXT: psrad $31, %xmm2 455; SSSE3-NEXT: psrad $24, %xmm1 456; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 457; SSSE3-NEXT: retq 458; 459; SSE41-LABEL: sext_16i8_to_4i64: 460; SSE41: # BB#0: # %entry 461; SSE41-NEXT: pmovsxbq %xmm0, %xmm2 462; SSE41-NEXT: psrld $16, %xmm0 463; SSE41-NEXT: pmovsxbq %xmm0, %xmm1 464; SSE41-NEXT: movdqa %xmm2, %xmm0 465; SSE41-NEXT: retq 466; 467; AVX1-LABEL: sext_16i8_to_4i64: 468; AVX1: # BB#0: # %entry 469; AVX1-NEXT: vpmovsxbq %xmm0, %xmm1 470; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 471; AVX1-NEXT: vpmovsxbq %xmm0, %xmm0 472; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 473; AVX1-NEXT: retq 474; 475; AVX2-LABEL: sext_16i8_to_4i64: 476; AVX2: # BB#0: # %entry 477; AVX2-NEXT: vpmovsxbq %xmm0, %ymm0 478; AVX2-NEXT: retq 479; 480; AVX512-LABEL: sext_16i8_to_4i64: 481; AVX512: # BB#0: # %entry 482; AVX512-NEXT: vpmovsxbq %xmm0, %ymm0 483; AVX512-NEXT: retq 484; 485; X32-SSE41-LABEL: sext_16i8_to_4i64: 486; X32-SSE41: # BB#0: # %entry 487; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm2 488; X32-SSE41-NEXT: psrld $16, %xmm0 489; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm1 490; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 491; X32-SSE41-NEXT: retl 492entry: 493 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 494 %C = sext <4 x i8> %B to <4 x i64> 495 ret <4 x i64> %C 496} 497 498define <8 x i64> @sext_16i8_to_8i64(<16 x i8> %A) nounwind uwtable readnone ssp { 499; SSE2-LABEL: sext_16i8_to_8i64: 500; SSE2: # BB#0: # %entry 501; SSE2-NEXT: movdqa %xmm0, %xmm1 502; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 503; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 504; SSE2-NEXT: movdqa %xmm0, %xmm2 505; SSE2-NEXT: psrad $31, %xmm2 506; SSE2-NEXT: psrad $24, %xmm0 507; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 508; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm1[1,1,2,3] 509; SSE2-NEXT: psrld $16, %xmm1 510; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 511; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 512; SSE2-NEXT: movdqa %xmm1, %xmm2 513; SSE2-NEXT: psrad $31, %xmm2 514; SSE2-NEXT: psrad $24, %xmm1 515; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 516; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7] 517; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3] 518; SSE2-NEXT: movdqa %xmm2, %xmm4 519; SSE2-NEXT: psrad $31, %xmm4 520; SSE2-NEXT: psrad $24, %xmm2 521; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 522; SSE2-NEXT: psrld $16, %xmm3 523; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 524; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0,0,1,1,2,2,3,3] 525; SSE2-NEXT: movdqa %xmm3, %xmm4 526; SSE2-NEXT: psrad $31, %xmm4 527; SSE2-NEXT: psrad $24, %xmm3 528; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 529; SSE2-NEXT: retq 530; 531; SSSE3-LABEL: sext_16i8_to_8i64: 532; SSSE3: # BB#0: # %entry 533; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = <u,u,u,2,u,u,u,3,u,u,u,255,u,u,u,255> 534; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3],xmm4[4],xmm0[4],xmm4[5],xmm0[5],xmm4[6],xmm0[6],xmm4[7],xmm0[7] 535; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm0[1,1,2,3] 536; SSSE3-NEXT: movdqa %xmm0, %xmm1 537; SSSE3-NEXT: pshufb %xmm2, %xmm1 538; SSSE3-NEXT: movdqa %xmm1, %xmm0 539; SSSE3-NEXT: psrad $31, %xmm0 540; SSSE3-NEXT: psrad $24, %xmm1 541; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 542; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3] 543; SSSE3-NEXT: movdqa %xmm0, %xmm4 544; SSSE3-NEXT: psrad $31, %xmm4 545; SSSE3-NEXT: psrad $24, %xmm0 546; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1] 547; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 548; SSSE3-NEXT: pshufb %xmm2, %xmm3 549; SSSE3-NEXT: movdqa %xmm3, %xmm2 550; SSSE3-NEXT: psrad $31, %xmm2 551; SSSE3-NEXT: psrad $24, %xmm3 552; SSSE3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] 553; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3] 554; SSSE3-NEXT: movdqa %xmm2, %xmm4 555; SSSE3-NEXT: psrad $31, %xmm4 556; SSSE3-NEXT: psrad $24, %xmm2 557; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 558; SSSE3-NEXT: retq 559; 560; SSE41-LABEL: sext_16i8_to_8i64: 561; SSE41: # BB#0: # %entry 562; SSE41-NEXT: pmovsxbq %xmm0, %xmm4 563; SSE41-NEXT: movdqa %xmm0, %xmm1 564; SSE41-NEXT: psrld $16, %xmm1 565; SSE41-NEXT: pmovsxbq %xmm1, %xmm1 566; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] 567; SSE41-NEXT: pmovsxbq %xmm2, %xmm2 568; SSE41-NEXT: psrlq $48, %xmm0 569; SSE41-NEXT: pmovsxbq %xmm0, %xmm3 570; SSE41-NEXT: movdqa %xmm4, %xmm0 571; SSE41-NEXT: retq 572; 573; AVX1-LABEL: sext_16i8_to_8i64: 574; AVX1: # BB#0: # %entry 575; AVX1-NEXT: vpmovsxbq %xmm0, %xmm1 576; AVX1-NEXT: vpsrld $16, %xmm0, %xmm2 577; AVX1-NEXT: vpmovsxbq %xmm2, %xmm2 578; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 579; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 580; AVX1-NEXT: vpmovsxbq %xmm1, %xmm1 581; AVX1-NEXT: vpsrlq $48, %xmm0, %xmm0 582; AVX1-NEXT: vpmovsxbq %xmm0, %xmm0 583; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 584; AVX1-NEXT: vmovaps %ymm2, %ymm0 585; AVX1-NEXT: retq 586; 587; AVX2-LABEL: sext_16i8_to_8i64: 588; AVX2: # BB#0: # %entry 589; AVX2-NEXT: vpmovsxbq %xmm0, %ymm2 590; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 591; AVX2-NEXT: vpmovsxbq %xmm0, %ymm1 592; AVX2-NEXT: vmovdqa %ymm2, %ymm0 593; AVX2-NEXT: retq 594; 595; AVX512-LABEL: sext_16i8_to_8i64: 596; AVX512: # BB#0: # %entry 597; AVX512-NEXT: vpmovsxbq %xmm0, %zmm0 598; AVX512-NEXT: retq 599; 600; X32-SSE41-LABEL: sext_16i8_to_8i64: 601; X32-SSE41: # BB#0: # %entry 602; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm4 603; X32-SSE41-NEXT: movdqa %xmm0, %xmm1 604; X32-SSE41-NEXT: psrld $16, %xmm1 605; X32-SSE41-NEXT: pmovsxbq %xmm1, %xmm1 606; X32-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] 607; X32-SSE41-NEXT: pmovsxbq %xmm2, %xmm2 608; X32-SSE41-NEXT: psrlq $48, %xmm0 609; X32-SSE41-NEXT: pmovsxbq %xmm0, %xmm3 610; X32-SSE41-NEXT: movdqa %xmm4, %xmm0 611; X32-SSE41-NEXT: retl 612entry: 613 %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 614 %C = sext <8 x i8> %B to <8 x i64> 615 ret <8 x i64> %C 616} 617 618define <4 x i32> @sext_8i16_to_4i32(<8 x i16> %A) nounwind uwtable readnone ssp { 619; SSE2-LABEL: sext_8i16_to_4i32: 620; SSE2: # BB#0: # %entry 621; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 622; SSE2-NEXT: psrad $16, %xmm0 623; SSE2-NEXT: retq 624; 625; SSSE3-LABEL: sext_8i16_to_4i32: 626; SSSE3: # BB#0: # %entry 627; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 628; SSSE3-NEXT: psrad $16, %xmm0 629; SSSE3-NEXT: retq 630; 631; SSE41-LABEL: sext_8i16_to_4i32: 632; SSE41: # BB#0: # %entry 633; SSE41-NEXT: pmovsxwd %xmm0, %xmm0 634; SSE41-NEXT: retq 635; 636; AVX-LABEL: sext_8i16_to_4i32: 637; AVX: # BB#0: # %entry 638; AVX-NEXT: vpmovsxwd %xmm0, %xmm0 639; AVX-NEXT: retq 640; 641; X32-SSE41-LABEL: sext_8i16_to_4i32: 642; X32-SSE41: # BB#0: # %entry 643; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm0 644; X32-SSE41-NEXT: retl 645entry: 646 %B = shufflevector <8 x i16> %A, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 647 %C = sext <4 x i16> %B to <4 x i32> 648 ret <4 x i32> %C 649} 650 651define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp { 652; SSE2-LABEL: sext_8i16_to_8i32: 653; SSE2: # BB#0: # %entry 654; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 655; SSE2-NEXT: psrad $16, %xmm2 656; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 657; SSE2-NEXT: psrad $16, %xmm1 658; SSE2-NEXT: movdqa %xmm2, %xmm0 659; SSE2-NEXT: retq 660; 661; SSSE3-LABEL: sext_8i16_to_8i32: 662; SSSE3: # BB#0: # %entry 663; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 664; SSSE3-NEXT: psrad $16, %xmm2 665; SSSE3-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 666; SSSE3-NEXT: psrad $16, %xmm1 667; SSSE3-NEXT: movdqa %xmm2, %xmm0 668; SSSE3-NEXT: retq 669; 670; SSE41-LABEL: sext_8i16_to_8i32: 671; SSE41: # BB#0: # %entry 672; SSE41-NEXT: pmovsxwd %xmm0, %xmm2 673; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 674; SSE41-NEXT: pmovsxwd %xmm0, %xmm1 675; SSE41-NEXT: movdqa %xmm2, %xmm0 676; SSE41-NEXT: retq 677; 678; AVX1-LABEL: sext_8i16_to_8i32: 679; AVX1: # BB#0: # %entry 680; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 681; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 682; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 683; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 684; AVX1-NEXT: retq 685; 686; AVX2-LABEL: sext_8i16_to_8i32: 687; AVX2: # BB#0: # %entry 688; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 689; AVX2-NEXT: retq 690; 691; AVX512-LABEL: sext_8i16_to_8i32: 692; AVX512: # BB#0: # %entry 693; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0 694; AVX512-NEXT: retq 695; 696; X32-SSE41-LABEL: sext_8i16_to_8i32: 697; X32-SSE41: # BB#0: # %entry 698; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm2 699; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 700; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm1 701; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 702; X32-SSE41-NEXT: retl 703entry: 704 %B = sext <8 x i16> %A to <8 x i32> 705 ret <8 x i32> %B 706} 707 708define <16 x i32> @sext_16i16_to_16i32(<16 x i16> %A) nounwind uwtable readnone ssp { 709; SSE2-LABEL: sext_16i16_to_16i32: 710; SSE2: # BB#0: # %entry 711; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] 712; SSE2-NEXT: psrad $16, %xmm4 713; SSE2-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7] 714; SSE2-NEXT: psrad $16, %xmm5 715; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 716; SSE2-NEXT: psrad $16, %xmm2 717; SSE2-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 718; SSE2-NEXT: psrad $16, %xmm3 719; SSE2-NEXT: movdqa %xmm4, %xmm0 720; SSE2-NEXT: movdqa %xmm5, %xmm1 721; SSE2-NEXT: retq 722; 723; SSSE3-LABEL: sext_16i16_to_16i32: 724; SSSE3: # BB#0: # %entry 725; SSSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] 726; SSSE3-NEXT: psrad $16, %xmm4 727; SSSE3-NEXT: punpckhwd {{.*#+}} xmm5 = xmm5[4],xmm0[4],xmm5[5],xmm0[5],xmm5[6],xmm0[6],xmm5[7],xmm0[7] 728; SSSE3-NEXT: psrad $16, %xmm5 729; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 730; SSSE3-NEXT: psrad $16, %xmm2 731; SSSE3-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 732; SSSE3-NEXT: psrad $16, %xmm3 733; SSSE3-NEXT: movdqa %xmm4, %xmm0 734; SSSE3-NEXT: movdqa %xmm5, %xmm1 735; SSSE3-NEXT: retq 736; 737; SSE41-LABEL: sext_16i16_to_16i32: 738; SSE41: # BB#0: # %entry 739; SSE41-NEXT: pmovsxwd %xmm0, %xmm5 740; SSE41-NEXT: pmovsxwd %xmm1, %xmm2 741; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 742; SSE41-NEXT: pmovsxwd %xmm0, %xmm4 743; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 744; SSE41-NEXT: pmovsxwd %xmm0, %xmm3 745; SSE41-NEXT: movdqa %xmm5, %xmm0 746; SSE41-NEXT: movdqa %xmm4, %xmm1 747; SSE41-NEXT: retq 748; 749; AVX1-LABEL: sext_16i16_to_16i32: 750; AVX1: # BB#0: # %entry 751; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 752; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 753; AVX1-NEXT: vpmovsxwd %xmm2, %xmm2 754; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 755; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 756; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 757; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 758; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 759; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 760; AVX1-NEXT: vmovaps %ymm2, %ymm0 761; AVX1-NEXT: retq 762; 763; AVX2-LABEL: sext_16i16_to_16i32: 764; AVX2: # BB#0: # %entry 765; AVX2-NEXT: vpmovsxwd %xmm0, %ymm2 766; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 767; AVX2-NEXT: vpmovsxwd %xmm0, %ymm1 768; AVX2-NEXT: vmovdqa %ymm2, %ymm0 769; AVX2-NEXT: retq 770; 771; AVX512-LABEL: sext_16i16_to_16i32: 772; AVX512: # BB#0: # %entry 773; AVX512-NEXT: vpmovsxwd %ymm0, %zmm0 774; AVX512-NEXT: retq 775; 776; X32-SSE41-LABEL: sext_16i16_to_16i32: 777; X32-SSE41: # BB#0: # %entry 778; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm5 779; X32-SSE41-NEXT: pmovsxwd %xmm1, %xmm2 780; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 781; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm4 782; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 783; X32-SSE41-NEXT: pmovsxwd %xmm0, %xmm3 784; X32-SSE41-NEXT: movdqa %xmm5, %xmm0 785; X32-SSE41-NEXT: movdqa %xmm4, %xmm1 786; X32-SSE41-NEXT: retl 787entry: 788 %B = sext <16 x i16> %A to <16 x i32> 789 ret <16 x i32> %B 790} 791 792define <2 x i64> @sext_8i16_to_2i64(<8 x i16> %A) nounwind uwtable readnone ssp { 793; SSE2-LABEL: sext_8i16_to_2i64: 794; SSE2: # BB#0: # %entry 795; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 796; SSE2-NEXT: movdqa %xmm0, %xmm1 797; SSE2-NEXT: psrad $31, %xmm1 798; SSE2-NEXT: psrad $16, %xmm0 799; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 800; SSE2-NEXT: retq 801; 802; SSSE3-LABEL: sext_8i16_to_2i64: 803; SSSE3: # BB#0: # %entry 804; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 805; SSSE3-NEXT: movdqa %xmm0, %xmm1 806; SSSE3-NEXT: psrad $31, %xmm1 807; SSSE3-NEXT: psrad $16, %xmm0 808; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 809; SSSE3-NEXT: retq 810; 811; SSE41-LABEL: sext_8i16_to_2i64: 812; SSE41: # BB#0: # %entry 813; SSE41-NEXT: pmovsxwq %xmm0, %xmm0 814; SSE41-NEXT: retq 815; 816; AVX-LABEL: sext_8i16_to_2i64: 817; AVX: # BB#0: # %entry 818; AVX-NEXT: vpmovsxwq %xmm0, %xmm0 819; AVX-NEXT: retq 820; 821; X32-SSE41-LABEL: sext_8i16_to_2i64: 822; X32-SSE41: # BB#0: # %entry 823; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm0 824; X32-SSE41-NEXT: retl 825entry: 826 %B = shufflevector <8 x i16> %A, <8 x i16> undef, <2 x i32> <i32 0, i32 1> 827 %C = sext <2 x i16> %B to <2 x i64> 828 ret <2 x i64> %C 829} 830 831define <4 x i64> @sext_8i16_to_4i64(<8 x i16> %A) nounwind uwtable readnone ssp { 832; SSE2-LABEL: sext_8i16_to_4i64: 833; SSE2: # BB#0: # %entry 834; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 835; SSE2-NEXT: movdqa %xmm2, %xmm1 836; SSE2-NEXT: psrad $31, %xmm1 837; SSE2-NEXT: psrad $16, %xmm2 838; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 839; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 840; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 841; SSE2-NEXT: movdqa %xmm1, %xmm0 842; SSE2-NEXT: psrad $31, %xmm0 843; SSE2-NEXT: psrad $16, %xmm1 844; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 845; SSE2-NEXT: movdqa %xmm2, %xmm0 846; SSE2-NEXT: retq 847; 848; SSSE3-LABEL: sext_8i16_to_4i64: 849; SSSE3: # BB#0: # %entry 850; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 851; SSSE3-NEXT: movdqa %xmm2, %xmm1 852; SSSE3-NEXT: psrad $31, %xmm1 853; SSSE3-NEXT: psrad $16, %xmm2 854; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 855; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 856; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 857; SSSE3-NEXT: movdqa %xmm1, %xmm0 858; SSSE3-NEXT: psrad $31, %xmm0 859; SSSE3-NEXT: psrad $16, %xmm1 860; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 861; SSSE3-NEXT: movdqa %xmm2, %xmm0 862; SSSE3-NEXT: retq 863; 864; SSE41-LABEL: sext_8i16_to_4i64: 865; SSE41: # BB#0: # %entry 866; SSE41-NEXT: pmovsxwq %xmm0, %xmm2 867; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 868; SSE41-NEXT: pmovsxwq %xmm0, %xmm1 869; SSE41-NEXT: movdqa %xmm2, %xmm0 870; SSE41-NEXT: retq 871; 872; AVX1-LABEL: sext_8i16_to_4i64: 873; AVX1: # BB#0: # %entry 874; AVX1-NEXT: vpmovsxwq %xmm0, %xmm1 875; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 876; AVX1-NEXT: vpmovsxwq %xmm0, %xmm0 877; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 878; AVX1-NEXT: retq 879; 880; AVX2-LABEL: sext_8i16_to_4i64: 881; AVX2: # BB#0: # %entry 882; AVX2-NEXT: vpmovsxwq %xmm0, %ymm0 883; AVX2-NEXT: retq 884; 885; AVX512-LABEL: sext_8i16_to_4i64: 886; AVX512: # BB#0: # %entry 887; AVX512-NEXT: vpmovsxwq %xmm0, %ymm0 888; AVX512-NEXT: retq 889; 890; X32-SSE41-LABEL: sext_8i16_to_4i64: 891; X32-SSE41: # BB#0: # %entry 892; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm2 893; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 894; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm1 895; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 896; X32-SSE41-NEXT: retl 897entry: 898 %B = shufflevector <8 x i16> %A, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 899 %C = sext <4 x i16> %B to <4 x i64> 900 ret <4 x i64> %C 901} 902 903define <8 x i64> @sext_8i16_to_8i64(<8 x i16> %A) nounwind uwtable readnone ssp { 904; SSE2-LABEL: sext_8i16_to_8i64: 905; SSE2: # BB#0: # %entry 906; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] 907; SSE2-NEXT: movdqa %xmm4, %xmm1 908; SSE2-NEXT: psrad $31, %xmm1 909; SSE2-NEXT: psrad $16, %xmm4 910; SSE2-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 911; SSE2-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 912; SSE2-NEXT: movdqa %xmm2, %xmm1 913; SSE2-NEXT: psrad $31, %xmm1 914; SSE2-NEXT: psrad $16, %xmm2 915; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 916; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 917; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 918; SSE2-NEXT: movdqa %xmm1, %xmm3 919; SSE2-NEXT: psrad $31, %xmm3 920; SSE2-NEXT: psrad $16, %xmm1 921; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 922; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 923; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3] 924; SSE2-NEXT: movdqa %xmm3, %xmm0 925; SSE2-NEXT: psrad $31, %xmm0 926; SSE2-NEXT: psrad $16, %xmm3 927; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1] 928; SSE2-NEXT: movdqa %xmm4, %xmm0 929; SSE2-NEXT: retq 930; 931; SSSE3-LABEL: sext_8i16_to_8i64: 932; SSSE3: # BB#0: # %entry 933; SSSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm0[0],xmm4[1],xmm0[1],xmm4[2],xmm0[2],xmm4[3],xmm0[3] 934; SSSE3-NEXT: movdqa %xmm4, %xmm1 935; SSSE3-NEXT: psrad $31, %xmm1 936; SSSE3-NEXT: psrad $16, %xmm4 937; SSSE3-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1] 938; SSSE3-NEXT: punpckhwd {{.*#+}} xmm2 = xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 939; SSSE3-NEXT: movdqa %xmm2, %xmm1 940; SSSE3-NEXT: psrad $31, %xmm1 941; SSSE3-NEXT: psrad $16, %xmm2 942; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 943; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 944; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 945; SSSE3-NEXT: movdqa %xmm1, %xmm3 946; SSSE3-NEXT: psrad $31, %xmm3 947; SSSE3-NEXT: psrad $16, %xmm1 948; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 949; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 950; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3] 951; SSSE3-NEXT: movdqa %xmm3, %xmm0 952; SSSE3-NEXT: psrad $31, %xmm0 953; SSSE3-NEXT: psrad $16, %xmm3 954; SSSE3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1] 955; SSSE3-NEXT: movdqa %xmm4, %xmm0 956; SSSE3-NEXT: retq 957; 958; SSE41-LABEL: sext_8i16_to_8i64: 959; SSE41: # BB#0: # %entry 960; SSE41-NEXT: pmovsxwq %xmm0, %xmm4 961; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 962; SSE41-NEXT: pmovsxwq %xmm1, %xmm1 963; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 964; SSE41-NEXT: pmovsxwq %xmm2, %xmm2 965; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 966; SSE41-NEXT: pmovsxwq %xmm0, %xmm3 967; SSE41-NEXT: movdqa %xmm4, %xmm0 968; SSE41-NEXT: retq 969; 970; AVX1-LABEL: sext_8i16_to_8i64: 971; AVX1: # BB#0: # %entry 972; AVX1-NEXT: vpmovsxwq %xmm0, %xmm1 973; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[1,1,2,3] 974; AVX1-NEXT: vpmovsxwq %xmm2, %xmm2 975; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 976; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 977; AVX1-NEXT: vpmovsxwq %xmm1, %xmm1 978; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 979; AVX1-NEXT: vpmovsxwq %xmm0, %xmm0 980; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 981; AVX1-NEXT: vmovaps %ymm2, %ymm0 982; AVX1-NEXT: retq 983; 984; AVX2-LABEL: sext_8i16_to_8i64: 985; AVX2: # BB#0: # %entry 986; AVX2-NEXT: vpmovsxwq %xmm0, %ymm2 987; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 988; AVX2-NEXT: vpmovsxwq %xmm0, %ymm1 989; AVX2-NEXT: vmovdqa %ymm2, %ymm0 990; AVX2-NEXT: retq 991; 992; AVX512-LABEL: sext_8i16_to_8i64: 993; AVX512: # BB#0: # %entry 994; AVX512-NEXT: vpmovsxwq %xmm0, %zmm0 995; AVX512-NEXT: retq 996; 997; X32-SSE41-LABEL: sext_8i16_to_8i64: 998; X32-SSE41: # BB#0: # %entry 999; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm4 1000; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 1001; X32-SSE41-NEXT: pmovsxwq %xmm1, %xmm1 1002; X32-SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 1003; X32-SSE41-NEXT: pmovsxwq %xmm2, %xmm2 1004; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[3,1,2,3] 1005; X32-SSE41-NEXT: pmovsxwq %xmm0, %xmm3 1006; X32-SSE41-NEXT: movdqa %xmm4, %xmm0 1007; X32-SSE41-NEXT: retl 1008entry: 1009 %B = sext <8 x i16> %A to <8 x i64> 1010 ret <8 x i64> %B 1011} 1012 1013define <2 x i64> @sext_4i32_to_2i64(<4 x i32> %A) nounwind uwtable readnone ssp { 1014; SSE2-LABEL: sext_4i32_to_2i64: 1015; SSE2: # BB#0: # %entry 1016; SSE2-NEXT: movdqa %xmm0, %xmm1 1017; SSE2-NEXT: psrad $31, %xmm1 1018; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1019; SSE2-NEXT: retq 1020; 1021; SSSE3-LABEL: sext_4i32_to_2i64: 1022; SSSE3: # BB#0: # %entry 1023; SSSE3-NEXT: movdqa %xmm0, %xmm1 1024; SSSE3-NEXT: psrad $31, %xmm1 1025; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1026; SSSE3-NEXT: retq 1027; 1028; SSE41-LABEL: sext_4i32_to_2i64: 1029; SSE41: # BB#0: # %entry 1030; SSE41-NEXT: pmovsxdq %xmm0, %xmm0 1031; SSE41-NEXT: retq 1032; 1033; AVX-LABEL: sext_4i32_to_2i64: 1034; AVX: # BB#0: # %entry 1035; AVX-NEXT: vpmovsxdq %xmm0, %xmm0 1036; AVX-NEXT: retq 1037; 1038; X32-SSE41-LABEL: sext_4i32_to_2i64: 1039; X32-SSE41: # BB#0: # %entry 1040; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm0 1041; X32-SSE41-NEXT: retl 1042entry: 1043 %B = shufflevector <4 x i32> %A, <4 x i32> undef, <2 x i32> <i32 0, i32 1> 1044 %C = sext <2 x i32> %B to <2 x i64> 1045 ret <2 x i64> %C 1046} 1047 1048define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp { 1049; SSE2-LABEL: sext_4i32_to_4i64: 1050; SSE2: # BB#0: # %entry 1051; SSE2-NEXT: movdqa %xmm0, %xmm2 1052; SSE2-NEXT: psrad $31, %xmm2 1053; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1054; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1055; SSE2-NEXT: movdqa %xmm1, %xmm2 1056; SSE2-NEXT: psrad $31, %xmm2 1057; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1058; SSE2-NEXT: retq 1059; 1060; SSSE3-LABEL: sext_4i32_to_4i64: 1061; SSSE3: # BB#0: # %entry 1062; SSSE3-NEXT: movdqa %xmm0, %xmm2 1063; SSSE3-NEXT: psrad $31, %xmm2 1064; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1065; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1066; SSSE3-NEXT: movdqa %xmm1, %xmm2 1067; SSSE3-NEXT: psrad $31, %xmm2 1068; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1069; SSSE3-NEXT: retq 1070; 1071; SSE41-LABEL: sext_4i32_to_4i64: 1072; SSE41: # BB#0: # %entry 1073; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 1074; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1075; SSE41-NEXT: pmovsxdq %xmm0, %xmm1 1076; SSE41-NEXT: movdqa %xmm2, %xmm0 1077; SSE41-NEXT: retq 1078; 1079; AVX1-LABEL: sext_4i32_to_4i64: 1080; AVX1: # BB#0: # %entry 1081; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1082; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1083; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1084; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1085; AVX1-NEXT: retq 1086; 1087; AVX2-LABEL: sext_4i32_to_4i64: 1088; AVX2: # BB#0: # %entry 1089; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 1090; AVX2-NEXT: retq 1091; 1092; AVX512-LABEL: sext_4i32_to_4i64: 1093; AVX512: # BB#0: # %entry 1094; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 1095; AVX512-NEXT: retq 1096; 1097; X32-SSE41-LABEL: sext_4i32_to_4i64: 1098; X32-SSE41: # BB#0: # %entry 1099; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 1100; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1101; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm1 1102; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 1103; X32-SSE41-NEXT: retl 1104entry: 1105 %B = sext <4 x i32> %A to <4 x i64> 1106 ret <4 x i64> %B 1107} 1108 1109define <8 x i64> @sext_8i32_to_8i64(<8 x i32> %A) nounwind uwtable readnone ssp { 1110; SSE2-LABEL: sext_8i32_to_8i64: 1111; SSE2: # BB#0: # %entry 1112; SSE2-NEXT: movdqa %xmm1, %xmm2 1113; SSE2-NEXT: movdqa %xmm0, %xmm3 1114; SSE2-NEXT: psrad $31, %xmm3 1115; SSE2-NEXT: movdqa %xmm2, %xmm4 1116; SSE2-NEXT: psrad $31, %xmm4 1117; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1118; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 1119; SSE2-NEXT: movdqa %xmm1, %xmm3 1120; SSE2-NEXT: psrad $31, %xmm3 1121; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 1122; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm2[2,3,0,1] 1123; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 1124; SSE2-NEXT: movdqa %xmm3, %xmm4 1125; SSE2-NEXT: psrad $31, %xmm4 1126; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 1127; SSE2-NEXT: retq 1128; 1129; SSSE3-LABEL: sext_8i32_to_8i64: 1130; SSSE3: # BB#0: # %entry 1131; SSSE3-NEXT: movdqa %xmm1, %xmm2 1132; SSSE3-NEXT: movdqa %xmm0, %xmm3 1133; SSSE3-NEXT: psrad $31, %xmm3 1134; SSSE3-NEXT: movdqa %xmm2, %xmm4 1135; SSSE3-NEXT: psrad $31, %xmm4 1136; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1137; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 1138; SSSE3-NEXT: movdqa %xmm1, %xmm3 1139; SSSE3-NEXT: psrad $31, %xmm3 1140; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 1141; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm2[2,3,0,1] 1142; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 1143; SSSE3-NEXT: movdqa %xmm3, %xmm4 1144; SSSE3-NEXT: psrad $31, %xmm4 1145; SSSE3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1] 1146; SSSE3-NEXT: retq 1147; 1148; SSE41-LABEL: sext_8i32_to_8i64: 1149; SSE41: # BB#0: # %entry 1150; SSE41-NEXT: pmovsxdq %xmm0, %xmm5 1151; SSE41-NEXT: pmovsxdq %xmm1, %xmm2 1152; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1153; SSE41-NEXT: pmovsxdq %xmm0, %xmm4 1154; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 1155; SSE41-NEXT: pmovsxdq %xmm0, %xmm3 1156; SSE41-NEXT: movdqa %xmm5, %xmm0 1157; SSE41-NEXT: movdqa %xmm4, %xmm1 1158; SSE41-NEXT: retq 1159; 1160; AVX1-LABEL: sext_8i32_to_8i64: 1161; AVX1: # BB#0: # %entry 1162; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1163; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 1164; AVX1-NEXT: vpmovsxdq %xmm2, %xmm2 1165; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm2 1166; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1167; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1168; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1169; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1170; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm1 1171; AVX1-NEXT: vmovaps %ymm2, %ymm0 1172; AVX1-NEXT: retq 1173; 1174; AVX2-LABEL: sext_8i32_to_8i64: 1175; AVX2: # BB#0: # %entry 1176; AVX2-NEXT: vpmovsxdq %xmm0, %ymm2 1177; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 1178; AVX2-NEXT: vpmovsxdq %xmm0, %ymm1 1179; AVX2-NEXT: vmovdqa %ymm2, %ymm0 1180; AVX2-NEXT: retq 1181; 1182; AVX512-LABEL: sext_8i32_to_8i64: 1183; AVX512: # BB#0: # %entry 1184; AVX512-NEXT: vpmovsxdq %ymm0, %zmm0 1185; AVX512-NEXT: retq 1186; 1187; X32-SSE41-LABEL: sext_8i32_to_8i64: 1188; X32-SSE41: # BB#0: # %entry 1189; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm5 1190; X32-SSE41-NEXT: pmovsxdq %xmm1, %xmm2 1191; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1192; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm4 1193; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 1194; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm3 1195; X32-SSE41-NEXT: movdqa %xmm5, %xmm0 1196; X32-SSE41-NEXT: movdqa %xmm4, %xmm1 1197; X32-SSE41-NEXT: retl 1198entry: 1199 %B = sext <8 x i32> %A to <8 x i64> 1200 ret <8 x i64> %B 1201} 1202 1203define <2 x i64> @load_sext_2i1_to_2i64(<2 x i1> *%ptr) { 1204; SSE-LABEL: load_sext_2i1_to_2i64: 1205; SSE: # BB#0: # %entry 1206; SSE-NEXT: movzbl (%rdi), %eax 1207; SSE-NEXT: movq %rax, %rcx 1208; SSE-NEXT: shlq $62, %rcx 1209; SSE-NEXT: sarq $63, %rcx 1210; SSE-NEXT: movq %rcx, %xmm1 1211; SSE-NEXT: shlq $63, %rax 1212; SSE-NEXT: sarq $63, %rax 1213; SSE-NEXT: movq %rax, %xmm0 1214; SSE-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1215; SSE-NEXT: retq 1216; 1217; AVX1-LABEL: load_sext_2i1_to_2i64: 1218; AVX1: # BB#0: # %entry 1219; AVX1-NEXT: movzbl (%rdi), %eax 1220; AVX1-NEXT: movq %rax, %rcx 1221; AVX1-NEXT: shlq $62, %rcx 1222; AVX1-NEXT: sarq $63, %rcx 1223; AVX1-NEXT: vmovq %rcx, %xmm0 1224; AVX1-NEXT: shlq $63, %rax 1225; AVX1-NEXT: sarq $63, %rax 1226; AVX1-NEXT: vmovq %rax, %xmm1 1227; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1228; AVX1-NEXT: retq 1229; 1230; AVX2-LABEL: load_sext_2i1_to_2i64: 1231; AVX2: # BB#0: # %entry 1232; AVX2-NEXT: movzbl (%rdi), %eax 1233; AVX2-NEXT: movq %rax, %rcx 1234; AVX2-NEXT: shlq $62, %rcx 1235; AVX2-NEXT: sarq $63, %rcx 1236; AVX2-NEXT: vmovq %rcx, %xmm0 1237; AVX2-NEXT: shlq $63, %rax 1238; AVX2-NEXT: sarq $63, %rax 1239; AVX2-NEXT: vmovq %rax, %xmm1 1240; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1241; AVX2-NEXT: retq 1242; 1243; AVX512F-LABEL: load_sext_2i1_to_2i64: 1244; AVX512F: # BB#0: # %entry 1245; AVX512F-NEXT: movzbl (%rdi), %eax 1246; AVX512F-NEXT: kmovw %eax, %k1 1247; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 1248; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 1249; AVX512F-NEXT: vzeroupper 1250; AVX512F-NEXT: retq 1251; 1252; AVX512BW-LABEL: load_sext_2i1_to_2i64: 1253; AVX512BW: # BB#0: # %entry 1254; AVX512BW-NEXT: movzbl (%rdi), %eax 1255; AVX512BW-NEXT: kmovd %eax, %k1 1256; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 1257; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 1258; AVX512BW-NEXT: vzeroupper 1259; AVX512BW-NEXT: retq 1260; 1261; X32-SSE41-LABEL: load_sext_2i1_to_2i64: 1262; X32-SSE41: # BB#0: # %entry 1263; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1264; X32-SSE41-NEXT: movzbl (%eax), %eax 1265; X32-SSE41-NEXT: movl %eax, %ecx 1266; X32-SSE41-NEXT: shll $31, %ecx 1267; X32-SSE41-NEXT: sarl $31, %ecx 1268; X32-SSE41-NEXT: movd %ecx, %xmm0 1269; X32-SSE41-NEXT: pinsrd $1, %ecx, %xmm0 1270; X32-SSE41-NEXT: shll $30, %eax 1271; X32-SSE41-NEXT: sarl $31, %eax 1272; X32-SSE41-NEXT: pinsrd $2, %eax, %xmm0 1273; X32-SSE41-NEXT: pinsrd $3, %eax, %xmm0 1274; X32-SSE41-NEXT: retl 1275entry: 1276 %X = load <2 x i1>, <2 x i1>* %ptr 1277 %Y = sext <2 x i1> %X to <2 x i64> 1278 ret <2 x i64> %Y 1279} 1280 1281define <2 x i64> @load_sext_2i8_to_2i64(<2 x i8> *%ptr) { 1282; SSE2-LABEL: load_sext_2i8_to_2i64: 1283; SSE2: # BB#0: # %entry 1284; SSE2-NEXT: movzwl (%rdi), %eax 1285; SSE2-NEXT: movd %eax, %xmm0 1286; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1287; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1288; SSE2-NEXT: movdqa %xmm0, %xmm1 1289; SSE2-NEXT: psrad $31, %xmm1 1290; SSE2-NEXT: psrad $24, %xmm0 1291; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1292; SSE2-NEXT: retq 1293; 1294; SSSE3-LABEL: load_sext_2i8_to_2i64: 1295; SSSE3: # BB#0: # %entry 1296; SSSE3-NEXT: movzwl (%rdi), %eax 1297; SSSE3-NEXT: movd %eax, %xmm0 1298; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1299; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1300; SSSE3-NEXT: movdqa %xmm0, %xmm1 1301; SSSE3-NEXT: psrad $31, %xmm1 1302; SSSE3-NEXT: psrad $24, %xmm0 1303; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1304; SSSE3-NEXT: retq 1305; 1306; SSE41-LABEL: load_sext_2i8_to_2i64: 1307; SSE41: # BB#0: # %entry 1308; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 1309; SSE41-NEXT: retq 1310; 1311; AVX-LABEL: load_sext_2i8_to_2i64: 1312; AVX: # BB#0: # %entry 1313; AVX-NEXT: vpmovsxbq (%rdi), %xmm0 1314; AVX-NEXT: retq 1315; 1316; X32-SSE41-LABEL: load_sext_2i8_to_2i64: 1317; X32-SSE41: # BB#0: # %entry 1318; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1319; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 1320; X32-SSE41-NEXT: retl 1321entry: 1322 %X = load <2 x i8>, <2 x i8>* %ptr 1323 %Y = sext <2 x i8> %X to <2 x i64> 1324 ret <2 x i64> %Y 1325} 1326 1327define <4 x i32> @load_sext_4i1_to_4i32(<4 x i1> *%ptr) { 1328; SSE2-LABEL: load_sext_4i1_to_4i32: 1329; SSE2: # BB#0: # %entry 1330; SSE2-NEXT: movzbl (%rdi), %eax 1331; SSE2-NEXT: movq %rax, %rcx 1332; SSE2-NEXT: shlq $60, %rcx 1333; SSE2-NEXT: sarq $63, %rcx 1334; SSE2-NEXT: movd %ecx, %xmm0 1335; SSE2-NEXT: movq %rax, %rcx 1336; SSE2-NEXT: shlq $61, %rcx 1337; SSE2-NEXT: sarq $63, %rcx 1338; SSE2-NEXT: movd %ecx, %xmm1 1339; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1340; SSE2-NEXT: movq %rax, %rcx 1341; SSE2-NEXT: shlq $62, %rcx 1342; SSE2-NEXT: sarq $63, %rcx 1343; SSE2-NEXT: movd %ecx, %xmm2 1344; SSE2-NEXT: shlq $63, %rax 1345; SSE2-NEXT: sarq $63, %rax 1346; SSE2-NEXT: movd %eax, %xmm0 1347; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1348; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1349; SSE2-NEXT: retq 1350; 1351; SSSE3-LABEL: load_sext_4i1_to_4i32: 1352; SSSE3: # BB#0: # %entry 1353; SSSE3-NEXT: movzbl (%rdi), %eax 1354; SSSE3-NEXT: movq %rax, %rcx 1355; SSSE3-NEXT: shlq $60, %rcx 1356; SSSE3-NEXT: sarq $63, %rcx 1357; SSSE3-NEXT: movd %ecx, %xmm0 1358; SSSE3-NEXT: movq %rax, %rcx 1359; SSSE3-NEXT: shlq $61, %rcx 1360; SSSE3-NEXT: sarq $63, %rcx 1361; SSSE3-NEXT: movd %ecx, %xmm1 1362; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1363; SSSE3-NEXT: movq %rax, %rcx 1364; SSSE3-NEXT: shlq $62, %rcx 1365; SSSE3-NEXT: sarq $63, %rcx 1366; SSSE3-NEXT: movd %ecx, %xmm2 1367; SSSE3-NEXT: shlq $63, %rax 1368; SSSE3-NEXT: sarq $63, %rax 1369; SSSE3-NEXT: movd %eax, %xmm0 1370; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1371; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1372; SSSE3-NEXT: retq 1373; 1374; SSE41-LABEL: load_sext_4i1_to_4i32: 1375; SSE41: # BB#0: # %entry 1376; SSE41-NEXT: movzbl (%rdi), %eax 1377; SSE41-NEXT: movq %rax, %rcx 1378; SSE41-NEXT: shlq $62, %rcx 1379; SSE41-NEXT: sarq $63, %rcx 1380; SSE41-NEXT: movq %rax, %rdx 1381; SSE41-NEXT: shlq $63, %rdx 1382; SSE41-NEXT: sarq $63, %rdx 1383; SSE41-NEXT: movd %edx, %xmm0 1384; SSE41-NEXT: pinsrd $1, %ecx, %xmm0 1385; SSE41-NEXT: movq %rax, %rcx 1386; SSE41-NEXT: shlq $61, %rcx 1387; SSE41-NEXT: sarq $63, %rcx 1388; SSE41-NEXT: pinsrd $2, %ecx, %xmm0 1389; SSE41-NEXT: shlq $60, %rax 1390; SSE41-NEXT: sarq $63, %rax 1391; SSE41-NEXT: pinsrd $3, %eax, %xmm0 1392; SSE41-NEXT: retq 1393; 1394; AVX1-LABEL: load_sext_4i1_to_4i32: 1395; AVX1: # BB#0: # %entry 1396; AVX1-NEXT: movzbl (%rdi), %eax 1397; AVX1-NEXT: movq %rax, %rcx 1398; AVX1-NEXT: shlq $62, %rcx 1399; AVX1-NEXT: sarq $63, %rcx 1400; AVX1-NEXT: movq %rax, %rdx 1401; AVX1-NEXT: shlq $63, %rdx 1402; AVX1-NEXT: sarq $63, %rdx 1403; AVX1-NEXT: vmovd %edx, %xmm0 1404; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 1405; AVX1-NEXT: movq %rax, %rcx 1406; AVX1-NEXT: shlq $61, %rcx 1407; AVX1-NEXT: sarq $63, %rcx 1408; AVX1-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 1409; AVX1-NEXT: shlq $60, %rax 1410; AVX1-NEXT: sarq $63, %rax 1411; AVX1-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 1412; AVX1-NEXT: retq 1413; 1414; AVX2-LABEL: load_sext_4i1_to_4i32: 1415; AVX2: # BB#0: # %entry 1416; AVX2-NEXT: movzbl (%rdi), %eax 1417; AVX2-NEXT: movq %rax, %rcx 1418; AVX2-NEXT: shlq $62, %rcx 1419; AVX2-NEXT: sarq $63, %rcx 1420; AVX2-NEXT: movq %rax, %rdx 1421; AVX2-NEXT: shlq $63, %rdx 1422; AVX2-NEXT: sarq $63, %rdx 1423; AVX2-NEXT: vmovd %edx, %xmm0 1424; AVX2-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 1425; AVX2-NEXT: movq %rax, %rcx 1426; AVX2-NEXT: shlq $61, %rcx 1427; AVX2-NEXT: sarq $63, %rcx 1428; AVX2-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 1429; AVX2-NEXT: shlq $60, %rax 1430; AVX2-NEXT: sarq $63, %rax 1431; AVX2-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 1432; AVX2-NEXT: retq 1433; 1434; AVX512F-LABEL: load_sext_4i1_to_4i32: 1435; AVX512F: # BB#0: # %entry 1436; AVX512F-NEXT: movzbl (%rdi), %eax 1437; AVX512F-NEXT: kmovw %eax, %k1 1438; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 1439; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 1440; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1441; AVX512F-NEXT: vzeroupper 1442; AVX512F-NEXT: retq 1443; 1444; AVX512BW-LABEL: load_sext_4i1_to_4i32: 1445; AVX512BW: # BB#0: # %entry 1446; AVX512BW-NEXT: movzbl (%rdi), %eax 1447; AVX512BW-NEXT: kmovd %eax, %k1 1448; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 1449; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 1450; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1451; AVX512BW-NEXT: vzeroupper 1452; AVX512BW-NEXT: retq 1453; 1454; X32-SSE41-LABEL: load_sext_4i1_to_4i32: 1455; X32-SSE41: # BB#0: # %entry 1456; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1457; X32-SSE41-NEXT: movl (%eax), %eax 1458; X32-SSE41-NEXT: movl %eax, %ecx 1459; X32-SSE41-NEXT: shll $30, %ecx 1460; X32-SSE41-NEXT: sarl $31, %ecx 1461; X32-SSE41-NEXT: movl %eax, %edx 1462; X32-SSE41-NEXT: shll $31, %edx 1463; X32-SSE41-NEXT: sarl $31, %edx 1464; X32-SSE41-NEXT: movd %edx, %xmm0 1465; X32-SSE41-NEXT: pinsrd $1, %ecx, %xmm0 1466; X32-SSE41-NEXT: movl %eax, %ecx 1467; X32-SSE41-NEXT: shll $29, %ecx 1468; X32-SSE41-NEXT: sarl $31, %ecx 1469; X32-SSE41-NEXT: pinsrd $2, %ecx, %xmm0 1470; X32-SSE41-NEXT: shll $28, %eax 1471; X32-SSE41-NEXT: sarl $31, %eax 1472; X32-SSE41-NEXT: pinsrd $3, %eax, %xmm0 1473; X32-SSE41-NEXT: retl 1474entry: 1475 %X = load <4 x i1>, <4 x i1>* %ptr 1476 %Y = sext <4 x i1> %X to <4 x i32> 1477 ret <4 x i32> %Y 1478} 1479 1480define <4 x i32> @load_sext_4i8_to_4i32(<4 x i8> *%ptr) { 1481; SSE2-LABEL: load_sext_4i8_to_4i32: 1482; SSE2: # BB#0: # %entry 1483; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 1484; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1485; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1486; SSE2-NEXT: psrad $24, %xmm0 1487; SSE2-NEXT: retq 1488; 1489; SSSE3-LABEL: load_sext_4i8_to_4i32: 1490; SSSE3: # BB#0: # %entry 1491; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 1492; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1493; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1494; SSSE3-NEXT: psrad $24, %xmm0 1495; SSSE3-NEXT: retq 1496; 1497; SSE41-LABEL: load_sext_4i8_to_4i32: 1498; SSE41: # BB#0: # %entry 1499; SSE41-NEXT: pmovsxbd (%rdi), %xmm0 1500; SSE41-NEXT: retq 1501; 1502; AVX-LABEL: load_sext_4i8_to_4i32: 1503; AVX: # BB#0: # %entry 1504; AVX-NEXT: vpmovsxbd (%rdi), %xmm0 1505; AVX-NEXT: retq 1506; 1507; X32-SSE41-LABEL: load_sext_4i8_to_4i32: 1508; X32-SSE41: # BB#0: # %entry 1509; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1510; X32-SSE41-NEXT: pmovsxbd (%eax), %xmm0 1511; X32-SSE41-NEXT: retl 1512entry: 1513 %X = load <4 x i8>, <4 x i8>* %ptr 1514 %Y = sext <4 x i8> %X to <4 x i32> 1515 ret <4 x i32> %Y 1516} 1517 1518define <4 x i64> @load_sext_4i1_to_4i64(<4 x i1> *%ptr) { 1519; SSE2-LABEL: load_sext_4i1_to_4i64: 1520; SSE2: # BB#0: # %entry 1521; SSE2-NEXT: movl (%rdi), %eax 1522; SSE2-NEXT: movl %eax, %ecx 1523; SSE2-NEXT: shrl $3, %ecx 1524; SSE2-NEXT: movd %ecx, %xmm0 1525; SSE2-NEXT: movl %eax, %ecx 1526; SSE2-NEXT: shrl $2, %ecx 1527; SSE2-NEXT: movd %ecx, %xmm1 1528; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1529; SSE2-NEXT: movd %eax, %xmm2 1530; SSE2-NEXT: shrl %eax 1531; SSE2-NEXT: movd %eax, %xmm0 1532; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 1533; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0] 1534; SSE2-NEXT: pand {{.*}}(%rip), %xmm2 1535; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,1,1,3] 1536; SSE2-NEXT: psllq $63, %xmm0 1537; SSE2-NEXT: psrad $31, %xmm0 1538; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1539; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,1,3,3] 1540; SSE2-NEXT: psllq $63, %xmm1 1541; SSE2-NEXT: psrad $31, %xmm1 1542; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1543; SSE2-NEXT: retq 1544; 1545; SSSE3-LABEL: load_sext_4i1_to_4i64: 1546; SSSE3: # BB#0: # %entry 1547; SSSE3-NEXT: movl (%rdi), %eax 1548; SSSE3-NEXT: movl %eax, %ecx 1549; SSSE3-NEXT: shrl $3, %ecx 1550; SSSE3-NEXT: movd %ecx, %xmm0 1551; SSSE3-NEXT: movl %eax, %ecx 1552; SSSE3-NEXT: shrl $2, %ecx 1553; SSSE3-NEXT: movd %ecx, %xmm1 1554; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1555; SSSE3-NEXT: movd %eax, %xmm2 1556; SSSE3-NEXT: shrl %eax 1557; SSSE3-NEXT: movd %eax, %xmm0 1558; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 1559; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0] 1560; SSSE3-NEXT: pand {{.*}}(%rip), %xmm2 1561; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm2[0,1,1,3] 1562; SSSE3-NEXT: psllq $63, %xmm0 1563; SSSE3-NEXT: psrad $31, %xmm0 1564; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1565; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,1,3,3] 1566; SSSE3-NEXT: psllq $63, %xmm1 1567; SSSE3-NEXT: psrad $31, %xmm1 1568; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1569; SSSE3-NEXT: retq 1570; 1571; SSE41-LABEL: load_sext_4i1_to_4i64: 1572; SSE41: # BB#0: # %entry 1573; SSE41-NEXT: movl (%rdi), %eax 1574; SSE41-NEXT: movl %eax, %ecx 1575; SSE41-NEXT: shrl %ecx 1576; SSE41-NEXT: movd %eax, %xmm1 1577; SSE41-NEXT: pinsrd $1, %ecx, %xmm1 1578; SSE41-NEXT: movl %eax, %ecx 1579; SSE41-NEXT: shrl $2, %ecx 1580; SSE41-NEXT: pinsrd $2, %ecx, %xmm1 1581; SSE41-NEXT: shrl $3, %eax 1582; SSE41-NEXT: pinsrd $3, %eax, %xmm1 1583; SSE41-NEXT: pand {{.*}}(%rip), %xmm1 1584; SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero 1585; SSE41-NEXT: psllq $63, %xmm0 1586; SSE41-NEXT: psrad $31, %xmm0 1587; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1588; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,2,3,3] 1589; SSE41-NEXT: psllq $63, %xmm1 1590; SSE41-NEXT: psrad $31, %xmm1 1591; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1592; SSE41-NEXT: retq 1593; 1594; AVX1-LABEL: load_sext_4i1_to_4i64: 1595; AVX1: # BB#0: # %entry 1596; AVX1-NEXT: movzbl (%rdi), %eax 1597; AVX1-NEXT: movq %rax, %rcx 1598; AVX1-NEXT: shlq $62, %rcx 1599; AVX1-NEXT: sarq $63, %rcx 1600; AVX1-NEXT: movq %rax, %rdx 1601; AVX1-NEXT: shlq $63, %rdx 1602; AVX1-NEXT: sarq $63, %rdx 1603; AVX1-NEXT: vmovd %edx, %xmm0 1604; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 1605; AVX1-NEXT: movq %rax, %rcx 1606; AVX1-NEXT: shlq $61, %rcx 1607; AVX1-NEXT: sarq $63, %rcx 1608; AVX1-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 1609; AVX1-NEXT: shlq $60, %rax 1610; AVX1-NEXT: sarq $63, %rax 1611; AVX1-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0 1612; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1613; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1614; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1615; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1616; AVX1-NEXT: retq 1617; 1618; AVX2-LABEL: load_sext_4i1_to_4i64: 1619; AVX2: # BB#0: # %entry 1620; AVX2-NEXT: movzbl (%rdi), %eax 1621; AVX2-NEXT: movq %rax, %rcx 1622; AVX2-NEXT: shlq $60, %rcx 1623; AVX2-NEXT: sarq $63, %rcx 1624; AVX2-NEXT: vmovq %rcx, %xmm0 1625; AVX2-NEXT: movq %rax, %rcx 1626; AVX2-NEXT: shlq $61, %rcx 1627; AVX2-NEXT: sarq $63, %rcx 1628; AVX2-NEXT: vmovq %rcx, %xmm1 1629; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0] 1630; AVX2-NEXT: movq %rax, %rcx 1631; AVX2-NEXT: shlq $62, %rcx 1632; AVX2-NEXT: sarq $63, %rcx 1633; AVX2-NEXT: vmovq %rcx, %xmm1 1634; AVX2-NEXT: shlq $63, %rax 1635; AVX2-NEXT: sarq $63, %rax 1636; AVX2-NEXT: vmovq %rax, %xmm2 1637; AVX2-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0] 1638; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 1639; AVX2-NEXT: retq 1640; 1641; AVX512F-LABEL: load_sext_4i1_to_4i64: 1642; AVX512F: # BB#0: # %entry 1643; AVX512F-NEXT: movzbl (%rdi), %eax 1644; AVX512F-NEXT: kmovw %eax, %k1 1645; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 1646; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 1647; AVX512F-NEXT: retq 1648; 1649; AVX512BW-LABEL: load_sext_4i1_to_4i64: 1650; AVX512BW: # BB#0: # %entry 1651; AVX512BW-NEXT: movzbl (%rdi), %eax 1652; AVX512BW-NEXT: kmovd %eax, %k1 1653; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 1654; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 1655; AVX512BW-NEXT: retq 1656; 1657; X32-SSE41-LABEL: load_sext_4i1_to_4i64: 1658; X32-SSE41: # BB#0: # %entry 1659; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1660; X32-SSE41-NEXT: movzbl (%eax), %eax 1661; X32-SSE41-NEXT: movl %eax, %ecx 1662; X32-SSE41-NEXT: shrl %ecx 1663; X32-SSE41-NEXT: movd %eax, %xmm1 1664; X32-SSE41-NEXT: pinsrd $1, %ecx, %xmm1 1665; X32-SSE41-NEXT: movl %eax, %ecx 1666; X32-SSE41-NEXT: shrl $2, %ecx 1667; X32-SSE41-NEXT: pinsrd $2, %ecx, %xmm1 1668; X32-SSE41-NEXT: shrl $3, %eax 1669; X32-SSE41-NEXT: pinsrd $3, %eax, %xmm1 1670; X32-SSE41-NEXT: pand {{\.LCPI.*}}, %xmm1 1671; X32-SSE41-NEXT: pmovzxdq {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero 1672; X32-SSE41-NEXT: psllq $63, %xmm0 1673; X32-SSE41-NEXT: psrad $31, %xmm0 1674; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1675; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,2,3,3] 1676; X32-SSE41-NEXT: psllq $63, %xmm1 1677; X32-SSE41-NEXT: psrad $31, %xmm1 1678; X32-SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1679; X32-SSE41-NEXT: retl 1680entry: 1681 %X = load <4 x i1>, <4 x i1>* %ptr 1682 %Y = sext <4 x i1> %X to <4 x i64> 1683 ret <4 x i64> %Y 1684} 1685 1686define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) { 1687; SSE2-LABEL: load_sext_4i8_to_4i64: 1688; SSE2: # BB#0: # %entry 1689; SSE2-NEXT: movsbq 1(%rdi), %rax 1690; SSE2-NEXT: movq %rax, %xmm1 1691; SSE2-NEXT: movsbq (%rdi), %rax 1692; SSE2-NEXT: movq %rax, %xmm0 1693; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1694; SSE2-NEXT: movsbq 3(%rdi), %rax 1695; SSE2-NEXT: movq %rax, %xmm2 1696; SSE2-NEXT: movsbq 2(%rdi), %rax 1697; SSE2-NEXT: movq %rax, %xmm1 1698; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 1699; SSE2-NEXT: retq 1700; 1701; SSSE3-LABEL: load_sext_4i8_to_4i64: 1702; SSSE3: # BB#0: # %entry 1703; SSSE3-NEXT: movsbq 1(%rdi), %rax 1704; SSSE3-NEXT: movq %rax, %xmm1 1705; SSSE3-NEXT: movsbq (%rdi), %rax 1706; SSSE3-NEXT: movq %rax, %xmm0 1707; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1708; SSSE3-NEXT: movsbq 3(%rdi), %rax 1709; SSSE3-NEXT: movq %rax, %xmm2 1710; SSSE3-NEXT: movsbq 2(%rdi), %rax 1711; SSSE3-NEXT: movq %rax, %xmm1 1712; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 1713; SSSE3-NEXT: retq 1714; 1715; SSE41-LABEL: load_sext_4i8_to_4i64: 1716; SSE41: # BB#0: # %entry 1717; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 1718; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm1 1719; SSE41-NEXT: retq 1720; 1721; AVX1-LABEL: load_sext_4i8_to_4i64: 1722; AVX1: # BB#0: # %entry 1723; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0 1724; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 1725; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1726; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1727; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1728; AVX1-NEXT: retq 1729; 1730; AVX2-LABEL: load_sext_4i8_to_4i64: 1731; AVX2: # BB#0: # %entry 1732; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0 1733; AVX2-NEXT: retq 1734; 1735; AVX512-LABEL: load_sext_4i8_to_4i64: 1736; AVX512: # BB#0: # %entry 1737; AVX512-NEXT: vpmovsxbq (%rdi), %ymm0 1738; AVX512-NEXT: retq 1739; 1740; X32-SSE41-LABEL: load_sext_4i8_to_4i64: 1741; X32-SSE41: # BB#0: # %entry 1742; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1743; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 1744; X32-SSE41-NEXT: pmovsxbq 2(%eax), %xmm1 1745; X32-SSE41-NEXT: retl 1746entry: 1747 %X = load <4 x i8>, <4 x i8>* %ptr 1748 %Y = sext <4 x i8> %X to <4 x i64> 1749 ret <4 x i64> %Y 1750} 1751 1752define <2 x i64> @load_sext_4i8_to_4i64_extract(<4 x i8> *%ptr) { 1753; SSE2-LABEL: load_sext_4i8_to_4i64_extract: 1754; SSE2: # BB#0: 1755; SSE2-NEXT: movsbq 3(%rdi), %rax 1756; SSE2-NEXT: movq %rax, %xmm1 1757; SSE2-NEXT: movsbq 2(%rdi), %rax 1758; SSE2-NEXT: movq %rax, %xmm0 1759; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1760; SSE2-NEXT: retq 1761; 1762; SSSE3-LABEL: load_sext_4i8_to_4i64_extract: 1763; SSSE3: # BB#0: 1764; SSSE3-NEXT: movsbq 3(%rdi), %rax 1765; SSSE3-NEXT: movq %rax, %xmm1 1766; SSSE3-NEXT: movsbq 2(%rdi), %rax 1767; SSSE3-NEXT: movq %rax, %xmm0 1768; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1769; SSSE3-NEXT: retq 1770; 1771; SSE41-LABEL: load_sext_4i8_to_4i64_extract: 1772; SSE41: # BB#0: 1773; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm0 1774; SSE41-NEXT: retq 1775; 1776; AVX1-LABEL: load_sext_4i8_to_4i64_extract: 1777; AVX1: # BB#0: 1778; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0 1779; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1780; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 1781; AVX1-NEXT: retq 1782; 1783; AVX2-LABEL: load_sext_4i8_to_4i64_extract: 1784; AVX2: # BB#0: 1785; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0 1786; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 1787; AVX2-NEXT: vzeroupper 1788; AVX2-NEXT: retq 1789; 1790; AVX512-LABEL: load_sext_4i8_to_4i64_extract: 1791; AVX512: # BB#0: 1792; AVX512-NEXT: vpmovsxbq (%rdi), %ymm0 1793; AVX512-NEXT: vextracti128 $1, %ymm0, %xmm0 1794; AVX512-NEXT: vzeroupper 1795; AVX512-NEXT: retq 1796; 1797; X32-SSE41-LABEL: load_sext_4i8_to_4i64_extract: 1798; X32-SSE41: # BB#0: 1799; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 1800; X32-SSE41-NEXT: pmovsxbq 2(%eax), %xmm0 1801; X32-SSE41-NEXT: retl 1802 %ld = load <4 x i8>, <4 x i8>* %ptr 1803 %sext = sext <4 x i8> %ld to <4 x i64> 1804 %extract = shufflevector <4 x i64> %sext, <4 x i64> undef, <2 x i32> <i32 2, i32 3> 1805 ret <2 x i64> %extract 1806} 1807 1808define <8 x i16> @load_sext_8i1_to_8i16(<8 x i1> *%ptr) { 1809; SSE2-LABEL: load_sext_8i1_to_8i16: 1810; SSE2: # BB#0: # %entry 1811; SSE2-NEXT: movsbq (%rdi), %rax 1812; SSE2-NEXT: movq %rax, %rcx 1813; SSE2-NEXT: shrq $7, %rcx 1814; SSE2-NEXT: movd %ecx, %xmm0 1815; SSE2-NEXT: movq %rax, %rcx 1816; SSE2-NEXT: shlq $57, %rcx 1817; SSE2-NEXT: sarq $63, %rcx 1818; SSE2-NEXT: movd %ecx, %xmm2 1819; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1820; SSE2-NEXT: movq %rax, %rcx 1821; SSE2-NEXT: shlq $58, %rcx 1822; SSE2-NEXT: sarq $63, %rcx 1823; SSE2-NEXT: movd %ecx, %xmm0 1824; SSE2-NEXT: movq %rax, %rcx 1825; SSE2-NEXT: shlq $59, %rcx 1826; SSE2-NEXT: sarq $63, %rcx 1827; SSE2-NEXT: movd %ecx, %xmm1 1828; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 1829; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1830; SSE2-NEXT: movq %rax, %rcx 1831; SSE2-NEXT: shlq $60, %rcx 1832; SSE2-NEXT: sarq $63, %rcx 1833; SSE2-NEXT: movd %ecx, %xmm0 1834; SSE2-NEXT: movq %rax, %rcx 1835; SSE2-NEXT: shlq $61, %rcx 1836; SSE2-NEXT: sarq $63, %rcx 1837; SSE2-NEXT: movd %ecx, %xmm2 1838; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1839; SSE2-NEXT: movq %rax, %rcx 1840; SSE2-NEXT: shlq $62, %rcx 1841; SSE2-NEXT: sarq $63, %rcx 1842; SSE2-NEXT: movd %ecx, %xmm3 1843; SSE2-NEXT: shlq $63, %rax 1844; SSE2-NEXT: sarq $63, %rax 1845; SSE2-NEXT: movd %eax, %xmm0 1846; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 1847; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1848; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1849; SSE2-NEXT: retq 1850; 1851; SSSE3-LABEL: load_sext_8i1_to_8i16: 1852; SSSE3: # BB#0: # %entry 1853; SSSE3-NEXT: movsbq (%rdi), %rax 1854; SSSE3-NEXT: movq %rax, %rcx 1855; SSSE3-NEXT: shrq $7, %rcx 1856; SSSE3-NEXT: movd %ecx, %xmm0 1857; SSSE3-NEXT: movq %rax, %rcx 1858; SSSE3-NEXT: shlq $57, %rcx 1859; SSSE3-NEXT: sarq $63, %rcx 1860; SSSE3-NEXT: movd %ecx, %xmm2 1861; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1862; SSSE3-NEXT: movq %rax, %rcx 1863; SSSE3-NEXT: shlq $58, %rcx 1864; SSSE3-NEXT: sarq $63, %rcx 1865; SSSE3-NEXT: movd %ecx, %xmm0 1866; SSSE3-NEXT: movq %rax, %rcx 1867; SSSE3-NEXT: shlq $59, %rcx 1868; SSSE3-NEXT: sarq $63, %rcx 1869; SSSE3-NEXT: movd %ecx, %xmm1 1870; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 1871; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1872; SSSE3-NEXT: movq %rax, %rcx 1873; SSSE3-NEXT: shlq $60, %rcx 1874; SSSE3-NEXT: sarq $63, %rcx 1875; SSSE3-NEXT: movd %ecx, %xmm0 1876; SSSE3-NEXT: movq %rax, %rcx 1877; SSSE3-NEXT: shlq $61, %rcx 1878; SSSE3-NEXT: sarq $63, %rcx 1879; SSSE3-NEXT: movd %ecx, %xmm2 1880; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 1881; SSSE3-NEXT: movq %rax, %rcx 1882; SSSE3-NEXT: shlq $62, %rcx 1883; SSSE3-NEXT: sarq $63, %rcx 1884; SSSE3-NEXT: movd %ecx, %xmm3 1885; SSSE3-NEXT: shlq $63, %rax 1886; SSSE3-NEXT: sarq $63, %rax 1887; SSSE3-NEXT: movd %eax, %xmm0 1888; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 1889; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1890; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 1891; SSSE3-NEXT: retq 1892; 1893; SSE41-LABEL: load_sext_8i1_to_8i16: 1894; SSE41: # BB#0: # %entry 1895; SSE41-NEXT: movsbq (%rdi), %rax 1896; SSE41-NEXT: movq %rax, %rcx 1897; SSE41-NEXT: shlq $62, %rcx 1898; SSE41-NEXT: sarq $63, %rcx 1899; SSE41-NEXT: movq %rax, %rdx 1900; SSE41-NEXT: shlq $63, %rdx 1901; SSE41-NEXT: sarq $63, %rdx 1902; SSE41-NEXT: movd %edx, %xmm0 1903; SSE41-NEXT: pinsrw $1, %ecx, %xmm0 1904; SSE41-NEXT: movq %rax, %rcx 1905; SSE41-NEXT: shlq $61, %rcx 1906; SSE41-NEXT: sarq $63, %rcx 1907; SSE41-NEXT: pinsrw $2, %ecx, %xmm0 1908; SSE41-NEXT: movq %rax, %rcx 1909; SSE41-NEXT: shlq $60, %rcx 1910; SSE41-NEXT: sarq $63, %rcx 1911; SSE41-NEXT: pinsrw $3, %ecx, %xmm0 1912; SSE41-NEXT: movq %rax, %rcx 1913; SSE41-NEXT: shlq $59, %rcx 1914; SSE41-NEXT: sarq $63, %rcx 1915; SSE41-NEXT: pinsrw $4, %ecx, %xmm0 1916; SSE41-NEXT: movq %rax, %rcx 1917; SSE41-NEXT: shlq $58, %rcx 1918; SSE41-NEXT: sarq $63, %rcx 1919; SSE41-NEXT: pinsrw $5, %ecx, %xmm0 1920; SSE41-NEXT: movq %rax, %rcx 1921; SSE41-NEXT: shlq $57, %rcx 1922; SSE41-NEXT: sarq $63, %rcx 1923; SSE41-NEXT: pinsrw $6, %ecx, %xmm0 1924; SSE41-NEXT: shrq $7, %rax 1925; SSE41-NEXT: pinsrw $7, %eax, %xmm0 1926; SSE41-NEXT: retq 1927; 1928; AVX1-LABEL: load_sext_8i1_to_8i16: 1929; AVX1: # BB#0: # %entry 1930; AVX1-NEXT: movsbq (%rdi), %rax 1931; AVX1-NEXT: movq %rax, %rcx 1932; AVX1-NEXT: shlq $62, %rcx 1933; AVX1-NEXT: sarq $63, %rcx 1934; AVX1-NEXT: movq %rax, %rdx 1935; AVX1-NEXT: shlq $63, %rdx 1936; AVX1-NEXT: sarq $63, %rdx 1937; AVX1-NEXT: vmovd %edx, %xmm0 1938; AVX1-NEXT: vpinsrw $1, %ecx, %xmm0, %xmm0 1939; AVX1-NEXT: movq %rax, %rcx 1940; AVX1-NEXT: shlq $61, %rcx 1941; AVX1-NEXT: sarq $63, %rcx 1942; AVX1-NEXT: vpinsrw $2, %ecx, %xmm0, %xmm0 1943; AVX1-NEXT: movq %rax, %rcx 1944; AVX1-NEXT: shlq $60, %rcx 1945; AVX1-NEXT: sarq $63, %rcx 1946; AVX1-NEXT: vpinsrw $3, %ecx, %xmm0, %xmm0 1947; AVX1-NEXT: movq %rax, %rcx 1948; AVX1-NEXT: shlq $59, %rcx 1949; AVX1-NEXT: sarq $63, %rcx 1950; AVX1-NEXT: vpinsrw $4, %ecx, %xmm0, %xmm0 1951; AVX1-NEXT: movq %rax, %rcx 1952; AVX1-NEXT: shlq $58, %rcx 1953; AVX1-NEXT: sarq $63, %rcx 1954; AVX1-NEXT: vpinsrw $5, %ecx, %xmm0, %xmm0 1955; AVX1-NEXT: movq %rax, %rcx 1956; AVX1-NEXT: shlq $57, %rcx 1957; AVX1-NEXT: sarq $63, %rcx 1958; AVX1-NEXT: vpinsrw $6, %ecx, %xmm0, %xmm0 1959; AVX1-NEXT: shrq $7, %rax 1960; AVX1-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 1961; AVX1-NEXT: retq 1962; 1963; AVX2-LABEL: load_sext_8i1_to_8i16: 1964; AVX2: # BB#0: # %entry 1965; AVX2-NEXT: movsbq (%rdi), %rax 1966; AVX2-NEXT: movq %rax, %rcx 1967; AVX2-NEXT: shlq $62, %rcx 1968; AVX2-NEXT: sarq $63, %rcx 1969; AVX2-NEXT: movq %rax, %rdx 1970; AVX2-NEXT: shlq $63, %rdx 1971; AVX2-NEXT: sarq $63, %rdx 1972; AVX2-NEXT: vmovd %edx, %xmm0 1973; AVX2-NEXT: vpinsrw $1, %ecx, %xmm0, %xmm0 1974; AVX2-NEXT: movq %rax, %rcx 1975; AVX2-NEXT: shlq $61, %rcx 1976; AVX2-NEXT: sarq $63, %rcx 1977; AVX2-NEXT: vpinsrw $2, %ecx, %xmm0, %xmm0 1978; AVX2-NEXT: movq %rax, %rcx 1979; AVX2-NEXT: shlq $60, %rcx 1980; AVX2-NEXT: sarq $63, %rcx 1981; AVX2-NEXT: vpinsrw $3, %ecx, %xmm0, %xmm0 1982; AVX2-NEXT: movq %rax, %rcx 1983; AVX2-NEXT: shlq $59, %rcx 1984; AVX2-NEXT: sarq $63, %rcx 1985; AVX2-NEXT: vpinsrw $4, %ecx, %xmm0, %xmm0 1986; AVX2-NEXT: movq %rax, %rcx 1987; AVX2-NEXT: shlq $58, %rcx 1988; AVX2-NEXT: sarq $63, %rcx 1989; AVX2-NEXT: vpinsrw $5, %ecx, %xmm0, %xmm0 1990; AVX2-NEXT: movq %rax, %rcx 1991; AVX2-NEXT: shlq $57, %rcx 1992; AVX2-NEXT: sarq $63, %rcx 1993; AVX2-NEXT: vpinsrw $6, %ecx, %xmm0, %xmm0 1994; AVX2-NEXT: shrq $7, %rax 1995; AVX2-NEXT: vpinsrw $7, %eax, %xmm0, %xmm0 1996; AVX2-NEXT: retq 1997; 1998; AVX512F-LABEL: load_sext_8i1_to_8i16: 1999; AVX512F: # BB#0: # %entry 2000; AVX512F-NEXT: movzbl (%rdi), %eax 2001; AVX512F-NEXT: kmovw %eax, %k1 2002; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 2003; AVX512F-NEXT: vpmovqw %zmm0, %xmm0 2004; AVX512F-NEXT: vzeroupper 2005; AVX512F-NEXT: retq 2006; 2007; AVX512BW-LABEL: load_sext_8i1_to_8i16: 2008; AVX512BW: # BB#0: # %entry 2009; AVX512BW-NEXT: movzbl (%rdi), %eax 2010; AVX512BW-NEXT: kmovd %eax, %k0 2011; AVX512BW-NEXT: vpmovm2w %k0, %zmm0 2012; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 2013; AVX512BW-NEXT: vzeroupper 2014; AVX512BW-NEXT: retq 2015; 2016; X32-SSE41-LABEL: load_sext_8i1_to_8i16: 2017; X32-SSE41: # BB#0: # %entry 2018; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2019; X32-SSE41-NEXT: movsbl (%eax), %eax 2020; X32-SSE41-NEXT: movl %eax, %ecx 2021; X32-SSE41-NEXT: shll $30, %ecx 2022; X32-SSE41-NEXT: sarl $31, %ecx 2023; X32-SSE41-NEXT: movl %eax, %edx 2024; X32-SSE41-NEXT: shll $31, %edx 2025; X32-SSE41-NEXT: sarl $31, %edx 2026; X32-SSE41-NEXT: movd %edx, %xmm0 2027; X32-SSE41-NEXT: pinsrw $1, %ecx, %xmm0 2028; X32-SSE41-NEXT: movl %eax, %ecx 2029; X32-SSE41-NEXT: shll $29, %ecx 2030; X32-SSE41-NEXT: sarl $31, %ecx 2031; X32-SSE41-NEXT: pinsrw $2, %ecx, %xmm0 2032; X32-SSE41-NEXT: movl %eax, %ecx 2033; X32-SSE41-NEXT: shll $28, %ecx 2034; X32-SSE41-NEXT: sarl $31, %ecx 2035; X32-SSE41-NEXT: pinsrw $3, %ecx, %xmm0 2036; X32-SSE41-NEXT: movl %eax, %ecx 2037; X32-SSE41-NEXT: shll $27, %ecx 2038; X32-SSE41-NEXT: sarl $31, %ecx 2039; X32-SSE41-NEXT: pinsrw $4, %ecx, %xmm0 2040; X32-SSE41-NEXT: movl %eax, %ecx 2041; X32-SSE41-NEXT: shll $26, %ecx 2042; X32-SSE41-NEXT: sarl $31, %ecx 2043; X32-SSE41-NEXT: pinsrw $5, %ecx, %xmm0 2044; X32-SSE41-NEXT: movl %eax, %ecx 2045; X32-SSE41-NEXT: shll $25, %ecx 2046; X32-SSE41-NEXT: sarl $31, %ecx 2047; X32-SSE41-NEXT: pinsrw $6, %ecx, %xmm0 2048; X32-SSE41-NEXT: shrl $7, %eax 2049; X32-SSE41-NEXT: pinsrw $7, %eax, %xmm0 2050; X32-SSE41-NEXT: retl 2051entry: 2052 %X = load <8 x i1>, <8 x i1>* %ptr 2053 %Y = sext <8 x i1> %X to <8 x i16> 2054 ret <8 x i16> %Y 2055} 2056 2057define <8 x i16> @load_sext_8i8_to_8i16(<8 x i8> *%ptr) { 2058; SSE2-LABEL: load_sext_8i8_to_8i16: 2059; SSE2: # BB#0: # %entry 2060; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 2061; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2062; SSE2-NEXT: psraw $8, %xmm0 2063; SSE2-NEXT: retq 2064; 2065; SSSE3-LABEL: load_sext_8i8_to_8i16: 2066; SSSE3: # BB#0: # %entry 2067; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 2068; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2069; SSSE3-NEXT: psraw $8, %xmm0 2070; SSSE3-NEXT: retq 2071; 2072; SSE41-LABEL: load_sext_8i8_to_8i16: 2073; SSE41: # BB#0: # %entry 2074; SSE41-NEXT: pmovsxbw (%rdi), %xmm0 2075; SSE41-NEXT: retq 2076; 2077; AVX-LABEL: load_sext_8i8_to_8i16: 2078; AVX: # BB#0: # %entry 2079; AVX-NEXT: vpmovsxbw (%rdi), %xmm0 2080; AVX-NEXT: retq 2081; 2082; X32-SSE41-LABEL: load_sext_8i8_to_8i16: 2083; X32-SSE41: # BB#0: # %entry 2084; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2085; X32-SSE41-NEXT: pmovsxbw (%eax), %xmm0 2086; X32-SSE41-NEXT: retl 2087entry: 2088 %X = load <8 x i8>, <8 x i8>* %ptr 2089 %Y = sext <8 x i8> %X to <8 x i16> 2090 ret <8 x i16> %Y 2091} 2092 2093define <8 x i64> @load_sext_8i8_to_8i64(<8 x i8> *%ptr) { 2094; SSE2-LABEL: load_sext_8i8_to_8i64: 2095; SSE2: # BB#0: # %entry 2096; SSE2-NEXT: movsbq 1(%rdi), %rax 2097; SSE2-NEXT: movq %rax, %xmm1 2098; SSE2-NEXT: movsbq (%rdi), %rax 2099; SSE2-NEXT: movq %rax, %xmm0 2100; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2101; SSE2-NEXT: movsbq 3(%rdi), %rax 2102; SSE2-NEXT: movq %rax, %xmm2 2103; SSE2-NEXT: movsbq 2(%rdi), %rax 2104; SSE2-NEXT: movq %rax, %xmm1 2105; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2106; SSE2-NEXT: movsbq 5(%rdi), %rax 2107; SSE2-NEXT: movq %rax, %xmm3 2108; SSE2-NEXT: movsbq 4(%rdi), %rax 2109; SSE2-NEXT: movq %rax, %xmm2 2110; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] 2111; SSE2-NEXT: movsbq 7(%rdi), %rax 2112; SSE2-NEXT: movq %rax, %xmm4 2113; SSE2-NEXT: movsbq 6(%rdi), %rax 2114; SSE2-NEXT: movq %rax, %xmm3 2115; SSE2-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0] 2116; SSE2-NEXT: retq 2117; 2118; SSSE3-LABEL: load_sext_8i8_to_8i64: 2119; SSSE3: # BB#0: # %entry 2120; SSSE3-NEXT: movsbq 1(%rdi), %rax 2121; SSSE3-NEXT: movq %rax, %xmm1 2122; SSSE3-NEXT: movsbq (%rdi), %rax 2123; SSSE3-NEXT: movq %rax, %xmm0 2124; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2125; SSSE3-NEXT: movsbq 3(%rdi), %rax 2126; SSSE3-NEXT: movq %rax, %xmm2 2127; SSSE3-NEXT: movsbq 2(%rdi), %rax 2128; SSSE3-NEXT: movq %rax, %xmm1 2129; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2130; SSSE3-NEXT: movsbq 5(%rdi), %rax 2131; SSSE3-NEXT: movq %rax, %xmm3 2132; SSSE3-NEXT: movsbq 4(%rdi), %rax 2133; SSSE3-NEXT: movq %rax, %xmm2 2134; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0] 2135; SSSE3-NEXT: movsbq 7(%rdi), %rax 2136; SSSE3-NEXT: movq %rax, %xmm4 2137; SSSE3-NEXT: movsbq 6(%rdi), %rax 2138; SSSE3-NEXT: movq %rax, %xmm3 2139; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0] 2140; SSSE3-NEXT: retq 2141; 2142; SSE41-LABEL: load_sext_8i8_to_8i64: 2143; SSE41: # BB#0: # %entry 2144; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 2145; SSE41-NEXT: pmovsxbq 2(%rdi), %xmm1 2146; SSE41-NEXT: pmovsxbq 4(%rdi), %xmm2 2147; SSE41-NEXT: pmovsxbq 6(%rdi), %xmm3 2148; SSE41-NEXT: retq 2149; 2150; AVX1-LABEL: load_sext_8i8_to_8i64: 2151; AVX1: # BB#0: # %entry 2152; AVX1-NEXT: vpmovsxbd (%rdi), %xmm0 2153; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 2154; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 2155; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 2156; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 2157; AVX1-NEXT: vpmovsxbd 4(%rdi), %xmm1 2158; AVX1-NEXT: vpmovsxdq %xmm1, %xmm2 2159; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 2160; AVX1-NEXT: vpmovsxdq %xmm1, %xmm1 2161; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm2, %ymm1 2162; AVX1-NEXT: retq 2163; 2164; AVX2-LABEL: load_sext_8i8_to_8i64: 2165; AVX2: # BB#0: # %entry 2166; AVX2-NEXT: vpmovsxbq (%rdi), %ymm0 2167; AVX2-NEXT: vpmovsxbq 4(%rdi), %ymm1 2168; AVX2-NEXT: retq 2169; 2170; AVX512-LABEL: load_sext_8i8_to_8i64: 2171; AVX512: # BB#0: # %entry 2172; AVX512-NEXT: vpmovsxbq (%rdi), %zmm0 2173; AVX512-NEXT: retq 2174; 2175; X32-SSE41-LABEL: load_sext_8i8_to_8i64: 2176; X32-SSE41: # BB#0: # %entry 2177; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2178; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 2179; X32-SSE41-NEXT: pmovsxbq 2(%eax), %xmm1 2180; X32-SSE41-NEXT: pmovsxbq 4(%eax), %xmm2 2181; X32-SSE41-NEXT: pmovsxbq 6(%eax), %xmm3 2182; X32-SSE41-NEXT: retl 2183entry: 2184 %X = load <8 x i8>, <8 x i8>* %ptr 2185 %Y = sext <8 x i8> %X to <8 x i64> 2186 ret <8 x i64> %Y 2187} 2188 2189define <8 x i32> @load_sext_8i1_to_8i32(<8 x i1> *%ptr) { 2190; SSE2-LABEL: load_sext_8i1_to_8i32: 2191; SSE2: # BB#0: # %entry 2192; SSE2-NEXT: movzbl (%rdi), %eax 2193; SSE2-NEXT: movl %eax, %ecx 2194; SSE2-NEXT: shrl $3, %ecx 2195; SSE2-NEXT: andl $1, %ecx 2196; SSE2-NEXT: movd %ecx, %xmm0 2197; SSE2-NEXT: movl %eax, %ecx 2198; SSE2-NEXT: shrl $2, %ecx 2199; SSE2-NEXT: andl $1, %ecx 2200; SSE2-NEXT: movd %ecx, %xmm2 2201; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 2202; SSE2-NEXT: movl %eax, %ecx 2203; SSE2-NEXT: andl $1, %ecx 2204; SSE2-NEXT: movd %ecx, %xmm1 2205; SSE2-NEXT: movl %eax, %ecx 2206; SSE2-NEXT: shrl %ecx 2207; SSE2-NEXT: andl $1, %ecx 2208; SSE2-NEXT: movd %ecx, %xmm0 2209; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 2210; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 2211; SSE2-NEXT: movl %eax, %ecx 2212; SSE2-NEXT: shrl $5, %ecx 2213; SSE2-NEXT: andl $1, %ecx 2214; SSE2-NEXT: movd %ecx, %xmm0 2215; SSE2-NEXT: movl %eax, %ecx 2216; SSE2-NEXT: shrl $4, %ecx 2217; SSE2-NEXT: andl $1, %ecx 2218; SSE2-NEXT: movd %ecx, %xmm2 2219; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 2220; SSE2-NEXT: movl %eax, %ecx 2221; SSE2-NEXT: shrl $6, %ecx 2222; SSE2-NEXT: andl $1, %ecx 2223; SSE2-NEXT: movd %ecx, %xmm0 2224; SSE2-NEXT: shrl $7, %eax 2225; SSE2-NEXT: movzwl %ax, %eax 2226; SSE2-NEXT: movd %eax, %xmm3 2227; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 2228; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 2229; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2230; SSE2-NEXT: movdqa %xmm1, %xmm0 2231; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 2232; SSE2-NEXT: pslld $31, %xmm0 2233; SSE2-NEXT: psrad $31, %xmm0 2234; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2235; SSE2-NEXT: pslld $31, %xmm1 2236; SSE2-NEXT: psrad $31, %xmm1 2237; SSE2-NEXT: retq 2238; 2239; SSSE3-LABEL: load_sext_8i1_to_8i32: 2240; SSSE3: # BB#0: # %entry 2241; SSSE3-NEXT: movzbl (%rdi), %eax 2242; SSSE3-NEXT: movl %eax, %ecx 2243; SSSE3-NEXT: shrl $3, %ecx 2244; SSSE3-NEXT: andl $1, %ecx 2245; SSSE3-NEXT: movd %ecx, %xmm0 2246; SSSE3-NEXT: movl %eax, %ecx 2247; SSSE3-NEXT: shrl $2, %ecx 2248; SSSE3-NEXT: andl $1, %ecx 2249; SSSE3-NEXT: movd %ecx, %xmm2 2250; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 2251; SSSE3-NEXT: movl %eax, %ecx 2252; SSSE3-NEXT: andl $1, %ecx 2253; SSSE3-NEXT: movd %ecx, %xmm1 2254; SSSE3-NEXT: movl %eax, %ecx 2255; SSSE3-NEXT: shrl %ecx 2256; SSSE3-NEXT: andl $1, %ecx 2257; SSSE3-NEXT: movd %ecx, %xmm0 2258; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 2259; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 2260; SSSE3-NEXT: movl %eax, %ecx 2261; SSSE3-NEXT: shrl $5, %ecx 2262; SSSE3-NEXT: andl $1, %ecx 2263; SSSE3-NEXT: movd %ecx, %xmm0 2264; SSSE3-NEXT: movl %eax, %ecx 2265; SSSE3-NEXT: shrl $4, %ecx 2266; SSSE3-NEXT: andl $1, %ecx 2267; SSSE3-NEXT: movd %ecx, %xmm2 2268; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3] 2269; SSSE3-NEXT: movl %eax, %ecx 2270; SSSE3-NEXT: shrl $6, %ecx 2271; SSSE3-NEXT: andl $1, %ecx 2272; SSSE3-NEXT: movd %ecx, %xmm0 2273; SSSE3-NEXT: shrl $7, %eax 2274; SSSE3-NEXT: movzwl %ax, %eax 2275; SSSE3-NEXT: movd %eax, %xmm3 2276; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3] 2277; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 2278; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2279; SSSE3-NEXT: movdqa %xmm1, %xmm0 2280; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 2281; SSSE3-NEXT: pslld $31, %xmm0 2282; SSSE3-NEXT: psrad $31, %xmm0 2283; SSSE3-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2284; SSSE3-NEXT: pslld $31, %xmm1 2285; SSSE3-NEXT: psrad $31, %xmm1 2286; SSSE3-NEXT: retq 2287; 2288; SSE41-LABEL: load_sext_8i1_to_8i32: 2289; SSE41: # BB#0: # %entry 2290; SSE41-NEXT: movzbl (%rdi), %eax 2291; SSE41-NEXT: movl %eax, %ecx 2292; SSE41-NEXT: shrl %ecx 2293; SSE41-NEXT: andl $1, %ecx 2294; SSE41-NEXT: movl %eax, %edx 2295; SSE41-NEXT: andl $1, %edx 2296; SSE41-NEXT: movd %edx, %xmm1 2297; SSE41-NEXT: pinsrw $1, %ecx, %xmm1 2298; SSE41-NEXT: movl %eax, %ecx 2299; SSE41-NEXT: shrl $2, %ecx 2300; SSE41-NEXT: andl $1, %ecx 2301; SSE41-NEXT: pinsrw $2, %ecx, %xmm1 2302; SSE41-NEXT: movl %eax, %ecx 2303; SSE41-NEXT: shrl $3, %ecx 2304; SSE41-NEXT: andl $1, %ecx 2305; SSE41-NEXT: pinsrw $3, %ecx, %xmm1 2306; SSE41-NEXT: movl %eax, %ecx 2307; SSE41-NEXT: shrl $4, %ecx 2308; SSE41-NEXT: andl $1, %ecx 2309; SSE41-NEXT: pinsrw $4, %ecx, %xmm1 2310; SSE41-NEXT: movl %eax, %ecx 2311; SSE41-NEXT: shrl $5, %ecx 2312; SSE41-NEXT: andl $1, %ecx 2313; SSE41-NEXT: pinsrw $5, %ecx, %xmm1 2314; SSE41-NEXT: movl %eax, %ecx 2315; SSE41-NEXT: shrl $6, %ecx 2316; SSE41-NEXT: andl $1, %ecx 2317; SSE41-NEXT: pinsrw $6, %ecx, %xmm1 2318; SSE41-NEXT: shrl $7, %eax 2319; SSE41-NEXT: movzwl %ax, %eax 2320; SSE41-NEXT: pinsrw $7, %eax, %xmm1 2321; SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 2322; SSE41-NEXT: pslld $31, %xmm0 2323; SSE41-NEXT: psrad $31, %xmm0 2324; SSE41-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2325; SSE41-NEXT: pslld $31, %xmm1 2326; SSE41-NEXT: psrad $31, %xmm1 2327; SSE41-NEXT: retq 2328; 2329; AVX1-LABEL: load_sext_8i1_to_8i32: 2330; AVX1: # BB#0: # %entry 2331; AVX1-NEXT: movsbq (%rdi), %rax 2332; AVX1-NEXT: movq %rax, %rcx 2333; AVX1-NEXT: shlq $58, %rcx 2334; AVX1-NEXT: sarq $63, %rcx 2335; AVX1-NEXT: movq %rax, %rdx 2336; AVX1-NEXT: shlq $59, %rdx 2337; AVX1-NEXT: sarq $63, %rdx 2338; AVX1-NEXT: vmovd %edx, %xmm0 2339; AVX1-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 2340; AVX1-NEXT: movq %rax, %rcx 2341; AVX1-NEXT: shlq $57, %rcx 2342; AVX1-NEXT: sarq $63, %rcx 2343; AVX1-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 2344; AVX1-NEXT: movq %rax, %rcx 2345; AVX1-NEXT: shrq $7, %rcx 2346; AVX1-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0 2347; AVX1-NEXT: movq %rax, %rcx 2348; AVX1-NEXT: shlq $62, %rcx 2349; AVX1-NEXT: sarq $63, %rcx 2350; AVX1-NEXT: movq %rax, %rdx 2351; AVX1-NEXT: shlq $63, %rdx 2352; AVX1-NEXT: sarq $63, %rdx 2353; AVX1-NEXT: vmovd %edx, %xmm1 2354; AVX1-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1 2355; AVX1-NEXT: movq %rax, %rcx 2356; AVX1-NEXT: shlq $61, %rcx 2357; AVX1-NEXT: sarq $63, %rcx 2358; AVX1-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1 2359; AVX1-NEXT: shlq $60, %rax 2360; AVX1-NEXT: sarq $63, %rax 2361; AVX1-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1 2362; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 2363; AVX1-NEXT: retq 2364; 2365; AVX2-LABEL: load_sext_8i1_to_8i32: 2366; AVX2: # BB#0: # %entry 2367; AVX2-NEXT: movsbq (%rdi), %rax 2368; AVX2-NEXT: movq %rax, %rcx 2369; AVX2-NEXT: shlq $58, %rcx 2370; AVX2-NEXT: sarq $63, %rcx 2371; AVX2-NEXT: movq %rax, %rdx 2372; AVX2-NEXT: shlq $59, %rdx 2373; AVX2-NEXT: sarq $63, %rdx 2374; AVX2-NEXT: vmovd %edx, %xmm0 2375; AVX2-NEXT: vpinsrd $1, %ecx, %xmm0, %xmm0 2376; AVX2-NEXT: movq %rax, %rcx 2377; AVX2-NEXT: shlq $57, %rcx 2378; AVX2-NEXT: sarq $63, %rcx 2379; AVX2-NEXT: vpinsrd $2, %ecx, %xmm0, %xmm0 2380; AVX2-NEXT: movq %rax, %rcx 2381; AVX2-NEXT: shrq $7, %rcx 2382; AVX2-NEXT: vpinsrd $3, %ecx, %xmm0, %xmm0 2383; AVX2-NEXT: movq %rax, %rcx 2384; AVX2-NEXT: shlq $62, %rcx 2385; AVX2-NEXT: sarq $63, %rcx 2386; AVX2-NEXT: movq %rax, %rdx 2387; AVX2-NEXT: shlq $63, %rdx 2388; AVX2-NEXT: sarq $63, %rdx 2389; AVX2-NEXT: vmovd %edx, %xmm1 2390; AVX2-NEXT: vpinsrd $1, %ecx, %xmm1, %xmm1 2391; AVX2-NEXT: movq %rax, %rcx 2392; AVX2-NEXT: shlq $61, %rcx 2393; AVX2-NEXT: sarq $63, %rcx 2394; AVX2-NEXT: vpinsrd $2, %ecx, %xmm1, %xmm1 2395; AVX2-NEXT: shlq $60, %rax 2396; AVX2-NEXT: sarq $63, %rax 2397; AVX2-NEXT: vpinsrd $3, %eax, %xmm1, %xmm1 2398; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 2399; AVX2-NEXT: retq 2400; 2401; AVX512F-LABEL: load_sext_8i1_to_8i32: 2402; AVX512F: # BB#0: # %entry 2403; AVX512F-NEXT: movzbl (%rdi), %eax 2404; AVX512F-NEXT: kmovw %eax, %k1 2405; AVX512F-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 2406; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 2407; AVX512F-NEXT: retq 2408; 2409; AVX512BW-LABEL: load_sext_8i1_to_8i32: 2410; AVX512BW: # BB#0: # %entry 2411; AVX512BW-NEXT: movzbl (%rdi), %eax 2412; AVX512BW-NEXT: kmovd %eax, %k1 2413; AVX512BW-NEXT: vpternlogq $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 2414; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 2415; AVX512BW-NEXT: retq 2416; 2417; X32-SSE41-LABEL: load_sext_8i1_to_8i32: 2418; X32-SSE41: # BB#0: # %entry 2419; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2420; X32-SSE41-NEXT: movzbl (%eax), %eax 2421; X32-SSE41-NEXT: movl %eax, %ecx 2422; X32-SSE41-NEXT: shrl %ecx 2423; X32-SSE41-NEXT: andl $1, %ecx 2424; X32-SSE41-NEXT: movl %eax, %edx 2425; X32-SSE41-NEXT: andl $1, %edx 2426; X32-SSE41-NEXT: movd %edx, %xmm1 2427; X32-SSE41-NEXT: pinsrw $1, %ecx, %xmm1 2428; X32-SSE41-NEXT: movl %eax, %ecx 2429; X32-SSE41-NEXT: shrl $2, %ecx 2430; X32-SSE41-NEXT: andl $1, %ecx 2431; X32-SSE41-NEXT: pinsrw $2, %ecx, %xmm1 2432; X32-SSE41-NEXT: movl %eax, %ecx 2433; X32-SSE41-NEXT: shrl $3, %ecx 2434; X32-SSE41-NEXT: andl $1, %ecx 2435; X32-SSE41-NEXT: pinsrw $3, %ecx, %xmm1 2436; X32-SSE41-NEXT: movl %eax, %ecx 2437; X32-SSE41-NEXT: shrl $4, %ecx 2438; X32-SSE41-NEXT: andl $1, %ecx 2439; X32-SSE41-NEXT: pinsrw $4, %ecx, %xmm1 2440; X32-SSE41-NEXT: movl %eax, %ecx 2441; X32-SSE41-NEXT: shrl $5, %ecx 2442; X32-SSE41-NEXT: andl $1, %ecx 2443; X32-SSE41-NEXT: pinsrw $5, %ecx, %xmm1 2444; X32-SSE41-NEXT: movl %eax, %ecx 2445; X32-SSE41-NEXT: shrl $6, %ecx 2446; X32-SSE41-NEXT: andl $1, %ecx 2447; X32-SSE41-NEXT: pinsrw $6, %ecx, %xmm1 2448; X32-SSE41-NEXT: shrl $7, %eax 2449; X32-SSE41-NEXT: pinsrw $7, %eax, %xmm1 2450; X32-SSE41-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 2451; X32-SSE41-NEXT: pslld $31, %xmm0 2452; X32-SSE41-NEXT: psrad $31, %xmm0 2453; X32-SSE41-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2454; X32-SSE41-NEXT: pslld $31, %xmm1 2455; X32-SSE41-NEXT: psrad $31, %xmm1 2456; X32-SSE41-NEXT: retl 2457entry: 2458 %X = load <8 x i1>, <8 x i1>* %ptr 2459 %Y = sext <8 x i1> %X to <8 x i32> 2460 ret <8 x i32> %Y 2461} 2462 2463define <8 x i32> @load_sext_8i8_to_8i32(<8 x i8> *%ptr) { 2464; SSE2-LABEL: load_sext_8i8_to_8i32: 2465; SSE2: # BB#0: # %entry 2466; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 2467; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2468; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 2469; SSE2-NEXT: psrad $24, %xmm0 2470; SSE2-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 2471; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2472; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 2473; SSE2-NEXT: psrad $24, %xmm1 2474; SSE2-NEXT: retq 2475; 2476; SSSE3-LABEL: load_sext_8i8_to_8i32: 2477; SSSE3: # BB#0: # %entry 2478; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 2479; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2480; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 2481; SSSE3-NEXT: psrad $24, %xmm0 2482; SSSE3-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 2483; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2484; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 2485; SSSE3-NEXT: psrad $24, %xmm1 2486; SSSE3-NEXT: retq 2487; 2488; SSE41-LABEL: load_sext_8i8_to_8i32: 2489; SSE41: # BB#0: # %entry 2490; SSE41-NEXT: pmovsxbd (%rdi), %xmm0 2491; SSE41-NEXT: pmovsxbd 4(%rdi), %xmm1 2492; SSE41-NEXT: retq 2493; 2494; AVX1-LABEL: load_sext_8i8_to_8i32: 2495; AVX1: # BB#0: # %entry 2496; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0 2497; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 2498; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 2499; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 2500; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 2501; AVX1-NEXT: retq 2502; 2503; AVX2-LABEL: load_sext_8i8_to_8i32: 2504; AVX2: # BB#0: # %entry 2505; AVX2-NEXT: vpmovsxbd (%rdi), %ymm0 2506; AVX2-NEXT: retq 2507; 2508; AVX512-LABEL: load_sext_8i8_to_8i32: 2509; AVX512: # BB#0: # %entry 2510; AVX512-NEXT: vpmovsxbd (%rdi), %ymm0 2511; AVX512-NEXT: retq 2512; 2513; X32-SSE41-LABEL: load_sext_8i8_to_8i32: 2514; X32-SSE41: # BB#0: # %entry 2515; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2516; X32-SSE41-NEXT: pmovsxbd (%eax), %xmm0 2517; X32-SSE41-NEXT: pmovsxbd 4(%eax), %xmm1 2518; X32-SSE41-NEXT: retl 2519entry: 2520 %X = load <8 x i8>, <8 x i8>* %ptr 2521 %Y = sext <8 x i8> %X to <8 x i32> 2522 ret <8 x i32> %Y 2523} 2524 2525define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone { 2526; SSE2-LABEL: load_sext_16i1_to_16i8: 2527; SSE2: # BB#0: # %entry 2528; SSE2-NEXT: pushq %rbp 2529; SSE2-NEXT: pushq %r15 2530; SSE2-NEXT: pushq %r14 2531; SSE2-NEXT: pushq %r13 2532; SSE2-NEXT: pushq %r12 2533; SSE2-NEXT: pushq %rbx 2534; SSE2-NEXT: movswq (%rdi), %rax 2535; SSE2-NEXT: movq %rax, %r8 2536; SSE2-NEXT: movq %rax, %r9 2537; SSE2-NEXT: movq %rax, %r10 2538; SSE2-NEXT: movq %rax, %r11 2539; SSE2-NEXT: movq %rax, %r14 2540; SSE2-NEXT: movq %rax, %r15 2541; SSE2-NEXT: movq %rax, %r12 2542; SSE2-NEXT: movq %rax, %r13 2543; SSE2-NEXT: movq %rax, %rbx 2544; SSE2-NEXT: movq %rax, %rcx 2545; SSE2-NEXT: movq %rax, %rdx 2546; SSE2-NEXT: movq %rax, %rsi 2547; SSE2-NEXT: movq %rax, %rdi 2548; SSE2-NEXT: movq %rax, %rbp 2549; SSE2-NEXT: shrq $15, %rbp 2550; SSE2-NEXT: movd %ebp, %xmm0 2551; SSE2-NEXT: movq %rax, %rbp 2552; SSE2-NEXT: movsbq %al, %rax 2553; SSE2-NEXT: shlq $49, %r8 2554; SSE2-NEXT: sarq $63, %r8 2555; SSE2-NEXT: movd %r8d, %xmm1 2556; SSE2-NEXT: shlq $50, %r9 2557; SSE2-NEXT: sarq $63, %r9 2558; SSE2-NEXT: movd %r9d, %xmm2 2559; SSE2-NEXT: shlq $51, %r10 2560; SSE2-NEXT: sarq $63, %r10 2561; SSE2-NEXT: movd %r10d, %xmm3 2562; SSE2-NEXT: shlq $52, %r11 2563; SSE2-NEXT: sarq $63, %r11 2564; SSE2-NEXT: movd %r11d, %xmm4 2565; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2566; SSE2-NEXT: shlq $53, %r14 2567; SSE2-NEXT: sarq $63, %r14 2568; SSE2-NEXT: movd %r14d, %xmm0 2569; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2570; SSE2-NEXT: shlq $54, %r15 2571; SSE2-NEXT: sarq $63, %r15 2572; SSE2-NEXT: movd %r15d, %xmm2 2573; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 2574; SSE2-NEXT: shlq $55, %r12 2575; SSE2-NEXT: sarq $63, %r12 2576; SSE2-NEXT: movd %r12d, %xmm1 2577; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7] 2578; SSE2-NEXT: shlq $60, %r13 2579; SSE2-NEXT: sarq $63, %r13 2580; SSE2-NEXT: movd %r13d, %xmm4 2581; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 2582; SSE2-NEXT: shlq $61, %rbx 2583; SSE2-NEXT: sarq $63, %rbx 2584; SSE2-NEXT: movd %ebx, %xmm2 2585; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 2586; SSE2-NEXT: shlq $62, %rcx 2587; SSE2-NEXT: sarq $63, %rcx 2588; SSE2-NEXT: movd %ecx, %xmm5 2589; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 2590; SSE2-NEXT: shlq $63, %rdx 2591; SSE2-NEXT: sarq $63, %rdx 2592; SSE2-NEXT: movd %edx, %xmm0 2593; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7] 2594; SSE2-NEXT: shlq $58, %rsi 2595; SSE2-NEXT: sarq $63, %rsi 2596; SSE2-NEXT: movd %esi, %xmm3 2597; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] 2598; SSE2-NEXT: shlq $59, %rdi 2599; SSE2-NEXT: sarq $63, %rdi 2600; SSE2-NEXT: movd %edi, %xmm4 2601; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 2602; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 2603; SSE2-NEXT: shlq $57, %rbp 2604; SSE2-NEXT: sarq $63, %rbp 2605; SSE2-NEXT: movd %ebp, %xmm2 2606; SSE2-NEXT: shrq $7, %rax 2607; SSE2-NEXT: movd %eax, %xmm3 2608; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7] 2609; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3] 2610; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1] 2611; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2612; SSE2-NEXT: popq %rbx 2613; SSE2-NEXT: popq %r12 2614; SSE2-NEXT: popq %r13 2615; SSE2-NEXT: popq %r14 2616; SSE2-NEXT: popq %r15 2617; SSE2-NEXT: popq %rbp 2618; SSE2-NEXT: retq 2619; 2620; SSSE3-LABEL: load_sext_16i1_to_16i8: 2621; SSSE3: # BB#0: # %entry 2622; SSSE3-NEXT: pushq %rbp 2623; SSSE3-NEXT: pushq %r15 2624; SSSE3-NEXT: pushq %r14 2625; SSSE3-NEXT: pushq %r13 2626; SSSE3-NEXT: pushq %r12 2627; SSSE3-NEXT: pushq %rbx 2628; SSSE3-NEXT: movswq (%rdi), %rax 2629; SSSE3-NEXT: movq %rax, %r8 2630; SSSE3-NEXT: movq %rax, %r9 2631; SSSE3-NEXT: movq %rax, %r10 2632; SSSE3-NEXT: movq %rax, %r11 2633; SSSE3-NEXT: movq %rax, %r14 2634; SSSE3-NEXT: movq %rax, %r15 2635; SSSE3-NEXT: movq %rax, %r12 2636; SSSE3-NEXT: movq %rax, %r13 2637; SSSE3-NEXT: movq %rax, %rbx 2638; SSSE3-NEXT: movq %rax, %rcx 2639; SSSE3-NEXT: movq %rax, %rdx 2640; SSSE3-NEXT: movq %rax, %rsi 2641; SSSE3-NEXT: movq %rax, %rdi 2642; SSSE3-NEXT: movq %rax, %rbp 2643; SSSE3-NEXT: shrq $15, %rbp 2644; SSSE3-NEXT: movd %ebp, %xmm0 2645; SSSE3-NEXT: movq %rax, %rbp 2646; SSSE3-NEXT: movsbq %al, %rax 2647; SSSE3-NEXT: shlq $49, %r8 2648; SSSE3-NEXT: sarq $63, %r8 2649; SSSE3-NEXT: movd %r8d, %xmm1 2650; SSSE3-NEXT: shlq $50, %r9 2651; SSSE3-NEXT: sarq $63, %r9 2652; SSSE3-NEXT: movd %r9d, %xmm2 2653; SSSE3-NEXT: shlq $51, %r10 2654; SSSE3-NEXT: sarq $63, %r10 2655; SSSE3-NEXT: movd %r10d, %xmm3 2656; SSSE3-NEXT: shlq $52, %r11 2657; SSSE3-NEXT: sarq $63, %r11 2658; SSSE3-NEXT: movd %r11d, %xmm4 2659; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 2660; SSSE3-NEXT: shlq $53, %r14 2661; SSSE3-NEXT: sarq $63, %r14 2662; SSSE3-NEXT: movd %r14d, %xmm0 2663; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 2664; SSSE3-NEXT: shlq $54, %r15 2665; SSSE3-NEXT: sarq $63, %r15 2666; SSSE3-NEXT: movd %r15d, %xmm2 2667; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 2668; SSSE3-NEXT: shlq $55, %r12 2669; SSSE3-NEXT: sarq $63, %r12 2670; SSSE3-NEXT: movd %r12d, %xmm1 2671; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3],xmm0[4],xmm4[4],xmm0[5],xmm4[5],xmm0[6],xmm4[6],xmm0[7],xmm4[7] 2672; SSSE3-NEXT: shlq $60, %r13 2673; SSSE3-NEXT: sarq $63, %r13 2674; SSSE3-NEXT: movd %r13d, %xmm4 2675; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 2676; SSSE3-NEXT: shlq $61, %rbx 2677; SSSE3-NEXT: sarq $63, %rbx 2678; SSSE3-NEXT: movd %ebx, %xmm2 2679; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 2680; SSSE3-NEXT: shlq $62, %rcx 2681; SSSE3-NEXT: sarq $63, %rcx 2682; SSSE3-NEXT: movd %ecx, %xmm5 2683; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 2684; SSSE3-NEXT: shlq $63, %rdx 2685; SSSE3-NEXT: sarq $63, %rdx 2686; SSSE3-NEXT: movd %edx, %xmm0 2687; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7] 2688; SSSE3-NEXT: shlq $58, %rsi 2689; SSSE3-NEXT: sarq $63, %rsi 2690; SSSE3-NEXT: movd %esi, %xmm3 2691; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7] 2692; SSSE3-NEXT: shlq $59, %rdi 2693; SSSE3-NEXT: sarq $63, %rdi 2694; SSSE3-NEXT: movd %edi, %xmm4 2695; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 2696; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 2697; SSSE3-NEXT: shlq $57, %rbp 2698; SSSE3-NEXT: sarq $63, %rbp 2699; SSSE3-NEXT: movd %ebp, %xmm2 2700; SSSE3-NEXT: shrq $7, %rax 2701; SSSE3-NEXT: movd %eax, %xmm3 2702; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3],xmm2[4],xmm3[4],xmm2[5],xmm3[5],xmm2[6],xmm3[6],xmm2[7],xmm3[7] 2703; SSSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3] 2704; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1] 2705; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2706; SSSE3-NEXT: popq %rbx 2707; SSSE3-NEXT: popq %r12 2708; SSSE3-NEXT: popq %r13 2709; SSSE3-NEXT: popq %r14 2710; SSSE3-NEXT: popq %r15 2711; SSSE3-NEXT: popq %rbp 2712; SSSE3-NEXT: retq 2713; 2714; SSE41-LABEL: load_sext_16i1_to_16i8: 2715; SSE41: # BB#0: # %entry 2716; SSE41-NEXT: movswq (%rdi), %rax 2717; SSE41-NEXT: movq %rax, %rcx 2718; SSE41-NEXT: shlq $62, %rcx 2719; SSE41-NEXT: sarq $63, %rcx 2720; SSE41-NEXT: movq %rax, %rdx 2721; SSE41-NEXT: shlq $63, %rdx 2722; SSE41-NEXT: sarq $63, %rdx 2723; SSE41-NEXT: movd %edx, %xmm0 2724; SSE41-NEXT: pinsrb $1, %ecx, %xmm0 2725; SSE41-NEXT: movq %rax, %rcx 2726; SSE41-NEXT: shlq $61, %rcx 2727; SSE41-NEXT: sarq $63, %rcx 2728; SSE41-NEXT: pinsrb $2, %ecx, %xmm0 2729; SSE41-NEXT: movq %rax, %rcx 2730; SSE41-NEXT: shlq $60, %rcx 2731; SSE41-NEXT: sarq $63, %rcx 2732; SSE41-NEXT: pinsrb $3, %ecx, %xmm0 2733; SSE41-NEXT: movq %rax, %rcx 2734; SSE41-NEXT: shlq $59, %rcx 2735; SSE41-NEXT: sarq $63, %rcx 2736; SSE41-NEXT: pinsrb $4, %ecx, %xmm0 2737; SSE41-NEXT: movq %rax, %rcx 2738; SSE41-NEXT: shlq $58, %rcx 2739; SSE41-NEXT: sarq $63, %rcx 2740; SSE41-NEXT: pinsrb $5, %ecx, %xmm0 2741; SSE41-NEXT: movq %rax, %rcx 2742; SSE41-NEXT: shlq $57, %rcx 2743; SSE41-NEXT: sarq $63, %rcx 2744; SSE41-NEXT: pinsrb $6, %ecx, %xmm0 2745; SSE41-NEXT: movsbq %al, %rcx 2746; SSE41-NEXT: shrq $7, %rcx 2747; SSE41-NEXT: pinsrb $7, %ecx, %xmm0 2748; SSE41-NEXT: movq %rax, %rcx 2749; SSE41-NEXT: shlq $55, %rcx 2750; SSE41-NEXT: sarq $63, %rcx 2751; SSE41-NEXT: pinsrb $8, %ecx, %xmm0 2752; SSE41-NEXT: movq %rax, %rcx 2753; SSE41-NEXT: shlq $54, %rcx 2754; SSE41-NEXT: sarq $63, %rcx 2755; SSE41-NEXT: pinsrb $9, %ecx, %xmm0 2756; SSE41-NEXT: movq %rax, %rcx 2757; SSE41-NEXT: shlq $53, %rcx 2758; SSE41-NEXT: sarq $63, %rcx 2759; SSE41-NEXT: pinsrb $10, %ecx, %xmm0 2760; SSE41-NEXT: movq %rax, %rcx 2761; SSE41-NEXT: shlq $52, %rcx 2762; SSE41-NEXT: sarq $63, %rcx 2763; SSE41-NEXT: pinsrb $11, %ecx, %xmm0 2764; SSE41-NEXT: movq %rax, %rcx 2765; SSE41-NEXT: shlq $51, %rcx 2766; SSE41-NEXT: sarq $63, %rcx 2767; SSE41-NEXT: pinsrb $12, %ecx, %xmm0 2768; SSE41-NEXT: movq %rax, %rcx 2769; SSE41-NEXT: shlq $50, %rcx 2770; SSE41-NEXT: sarq $63, %rcx 2771; SSE41-NEXT: pinsrb $13, %ecx, %xmm0 2772; SSE41-NEXT: movq %rax, %rcx 2773; SSE41-NEXT: shlq $49, %rcx 2774; SSE41-NEXT: sarq $63, %rcx 2775; SSE41-NEXT: pinsrb $14, %ecx, %xmm0 2776; SSE41-NEXT: shrq $15, %rax 2777; SSE41-NEXT: pinsrb $15, %eax, %xmm0 2778; SSE41-NEXT: retq 2779; 2780; AVX1-LABEL: load_sext_16i1_to_16i8: 2781; AVX1: # BB#0: # %entry 2782; AVX1-NEXT: movswq (%rdi), %rax 2783; AVX1-NEXT: movq %rax, %rcx 2784; AVX1-NEXT: shlq $62, %rcx 2785; AVX1-NEXT: sarq $63, %rcx 2786; AVX1-NEXT: movq %rax, %rdx 2787; AVX1-NEXT: shlq $63, %rdx 2788; AVX1-NEXT: sarq $63, %rdx 2789; AVX1-NEXT: vmovd %edx, %xmm0 2790; AVX1-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0 2791; AVX1-NEXT: movq %rax, %rcx 2792; AVX1-NEXT: shlq $61, %rcx 2793; AVX1-NEXT: sarq $63, %rcx 2794; AVX1-NEXT: vpinsrb $2, %ecx, %xmm0, %xmm0 2795; AVX1-NEXT: movq %rax, %rcx 2796; AVX1-NEXT: shlq $60, %rcx 2797; AVX1-NEXT: sarq $63, %rcx 2798; AVX1-NEXT: vpinsrb $3, %ecx, %xmm0, %xmm0 2799; AVX1-NEXT: movq %rax, %rcx 2800; AVX1-NEXT: shlq $59, %rcx 2801; AVX1-NEXT: sarq $63, %rcx 2802; AVX1-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 2803; AVX1-NEXT: movq %rax, %rcx 2804; AVX1-NEXT: shlq $58, %rcx 2805; AVX1-NEXT: sarq $63, %rcx 2806; AVX1-NEXT: vpinsrb $5, %ecx, %xmm0, %xmm0 2807; AVX1-NEXT: movq %rax, %rcx 2808; AVX1-NEXT: shlq $57, %rcx 2809; AVX1-NEXT: sarq $63, %rcx 2810; AVX1-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0 2811; AVX1-NEXT: movsbq %al, %rcx 2812; AVX1-NEXT: shrq $7, %rcx 2813; AVX1-NEXT: vpinsrb $7, %ecx, %xmm0, %xmm0 2814; AVX1-NEXT: movq %rax, %rcx 2815; AVX1-NEXT: shlq $55, %rcx 2816; AVX1-NEXT: sarq $63, %rcx 2817; AVX1-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm0 2818; AVX1-NEXT: movq %rax, %rcx 2819; AVX1-NEXT: shlq $54, %rcx 2820; AVX1-NEXT: sarq $63, %rcx 2821; AVX1-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0 2822; AVX1-NEXT: movq %rax, %rcx 2823; AVX1-NEXT: shlq $53, %rcx 2824; AVX1-NEXT: sarq $63, %rcx 2825; AVX1-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0 2826; AVX1-NEXT: movq %rax, %rcx 2827; AVX1-NEXT: shlq $52, %rcx 2828; AVX1-NEXT: sarq $63, %rcx 2829; AVX1-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0 2830; AVX1-NEXT: movq %rax, %rcx 2831; AVX1-NEXT: shlq $51, %rcx 2832; AVX1-NEXT: sarq $63, %rcx 2833; AVX1-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0 2834; AVX1-NEXT: movq %rax, %rcx 2835; AVX1-NEXT: shlq $50, %rcx 2836; AVX1-NEXT: sarq $63, %rcx 2837; AVX1-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0 2838; AVX1-NEXT: movq %rax, %rcx 2839; AVX1-NEXT: shlq $49, %rcx 2840; AVX1-NEXT: sarq $63, %rcx 2841; AVX1-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0 2842; AVX1-NEXT: shrq $15, %rax 2843; AVX1-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 2844; AVX1-NEXT: retq 2845; 2846; AVX2-LABEL: load_sext_16i1_to_16i8: 2847; AVX2: # BB#0: # %entry 2848; AVX2-NEXT: movswq (%rdi), %rax 2849; AVX2-NEXT: movq %rax, %rcx 2850; AVX2-NEXT: shlq $62, %rcx 2851; AVX2-NEXT: sarq $63, %rcx 2852; AVX2-NEXT: movq %rax, %rdx 2853; AVX2-NEXT: shlq $63, %rdx 2854; AVX2-NEXT: sarq $63, %rdx 2855; AVX2-NEXT: vmovd %edx, %xmm0 2856; AVX2-NEXT: vpinsrb $1, %ecx, %xmm0, %xmm0 2857; AVX2-NEXT: movq %rax, %rcx 2858; AVX2-NEXT: shlq $61, %rcx 2859; AVX2-NEXT: sarq $63, %rcx 2860; AVX2-NEXT: vpinsrb $2, %ecx, %xmm0, %xmm0 2861; AVX2-NEXT: movq %rax, %rcx 2862; AVX2-NEXT: shlq $60, %rcx 2863; AVX2-NEXT: sarq $63, %rcx 2864; AVX2-NEXT: vpinsrb $3, %ecx, %xmm0, %xmm0 2865; AVX2-NEXT: movq %rax, %rcx 2866; AVX2-NEXT: shlq $59, %rcx 2867; AVX2-NEXT: sarq $63, %rcx 2868; AVX2-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 2869; AVX2-NEXT: movq %rax, %rcx 2870; AVX2-NEXT: shlq $58, %rcx 2871; AVX2-NEXT: sarq $63, %rcx 2872; AVX2-NEXT: vpinsrb $5, %ecx, %xmm0, %xmm0 2873; AVX2-NEXT: movq %rax, %rcx 2874; AVX2-NEXT: shlq $57, %rcx 2875; AVX2-NEXT: sarq $63, %rcx 2876; AVX2-NEXT: vpinsrb $6, %ecx, %xmm0, %xmm0 2877; AVX2-NEXT: movsbq %al, %rcx 2878; AVX2-NEXT: shrq $7, %rcx 2879; AVX2-NEXT: vpinsrb $7, %ecx, %xmm0, %xmm0 2880; AVX2-NEXT: movq %rax, %rcx 2881; AVX2-NEXT: shlq $55, %rcx 2882; AVX2-NEXT: sarq $63, %rcx 2883; AVX2-NEXT: vpinsrb $8, %ecx, %xmm0, %xmm0 2884; AVX2-NEXT: movq %rax, %rcx 2885; AVX2-NEXT: shlq $54, %rcx 2886; AVX2-NEXT: sarq $63, %rcx 2887; AVX2-NEXT: vpinsrb $9, %ecx, %xmm0, %xmm0 2888; AVX2-NEXT: movq %rax, %rcx 2889; AVX2-NEXT: shlq $53, %rcx 2890; AVX2-NEXT: sarq $63, %rcx 2891; AVX2-NEXT: vpinsrb $10, %ecx, %xmm0, %xmm0 2892; AVX2-NEXT: movq %rax, %rcx 2893; AVX2-NEXT: shlq $52, %rcx 2894; AVX2-NEXT: sarq $63, %rcx 2895; AVX2-NEXT: vpinsrb $11, %ecx, %xmm0, %xmm0 2896; AVX2-NEXT: movq %rax, %rcx 2897; AVX2-NEXT: shlq $51, %rcx 2898; AVX2-NEXT: sarq $63, %rcx 2899; AVX2-NEXT: vpinsrb $12, %ecx, %xmm0, %xmm0 2900; AVX2-NEXT: movq %rax, %rcx 2901; AVX2-NEXT: shlq $50, %rcx 2902; AVX2-NEXT: sarq $63, %rcx 2903; AVX2-NEXT: vpinsrb $13, %ecx, %xmm0, %xmm0 2904; AVX2-NEXT: movq %rax, %rcx 2905; AVX2-NEXT: shlq $49, %rcx 2906; AVX2-NEXT: sarq $63, %rcx 2907; AVX2-NEXT: vpinsrb $14, %ecx, %xmm0, %xmm0 2908; AVX2-NEXT: shrq $15, %rax 2909; AVX2-NEXT: vpinsrb $15, %eax, %xmm0, %xmm0 2910; AVX2-NEXT: retq 2911; 2912; AVX512F-LABEL: load_sext_16i1_to_16i8: 2913; AVX512F: # BB#0: # %entry 2914; AVX512F-NEXT: kmovw (%rdi), %k1 2915; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 2916; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 2917; AVX512F-NEXT: vzeroupper 2918; AVX512F-NEXT: retq 2919; 2920; AVX512BW-LABEL: load_sext_16i1_to_16i8: 2921; AVX512BW: # BB#0: # %entry 2922; AVX512BW-NEXT: kmovw (%rdi), %k0 2923; AVX512BW-NEXT: vpmovm2b %k0, %zmm0 2924; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 2925; AVX512BW-NEXT: vzeroupper 2926; AVX512BW-NEXT: retq 2927; 2928; X32-SSE41-LABEL: load_sext_16i1_to_16i8: 2929; X32-SSE41: # BB#0: # %entry 2930; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 2931; X32-SSE41-NEXT: movswl (%eax), %eax 2932; X32-SSE41-NEXT: movl %eax, %ecx 2933; X32-SSE41-NEXT: shll $30, %ecx 2934; X32-SSE41-NEXT: sarl $31, %ecx 2935; X32-SSE41-NEXT: movl %eax, %edx 2936; X32-SSE41-NEXT: shll $31, %edx 2937; X32-SSE41-NEXT: sarl $31, %edx 2938; X32-SSE41-NEXT: movd %edx, %xmm0 2939; X32-SSE41-NEXT: pinsrb $1, %ecx, %xmm0 2940; X32-SSE41-NEXT: movl %eax, %ecx 2941; X32-SSE41-NEXT: shll $29, %ecx 2942; X32-SSE41-NEXT: sarl $31, %ecx 2943; X32-SSE41-NEXT: pinsrb $2, %ecx, %xmm0 2944; X32-SSE41-NEXT: movl %eax, %ecx 2945; X32-SSE41-NEXT: shll $28, %ecx 2946; X32-SSE41-NEXT: sarl $31, %ecx 2947; X32-SSE41-NEXT: pinsrb $3, %ecx, %xmm0 2948; X32-SSE41-NEXT: movl %eax, %ecx 2949; X32-SSE41-NEXT: shll $27, %ecx 2950; X32-SSE41-NEXT: sarl $31, %ecx 2951; X32-SSE41-NEXT: pinsrb $4, %ecx, %xmm0 2952; X32-SSE41-NEXT: movl %eax, %ecx 2953; X32-SSE41-NEXT: shll $26, %ecx 2954; X32-SSE41-NEXT: sarl $31, %ecx 2955; X32-SSE41-NEXT: pinsrb $5, %ecx, %xmm0 2956; X32-SSE41-NEXT: movl %eax, %ecx 2957; X32-SSE41-NEXT: shll $25, %ecx 2958; X32-SSE41-NEXT: sarl $31, %ecx 2959; X32-SSE41-NEXT: pinsrb $6, %ecx, %xmm0 2960; X32-SSE41-NEXT: movsbl %al, %ecx 2961; X32-SSE41-NEXT: shrl $7, %ecx 2962; X32-SSE41-NEXT: pinsrb $7, %ecx, %xmm0 2963; X32-SSE41-NEXT: movl %eax, %ecx 2964; X32-SSE41-NEXT: shll $23, %ecx 2965; X32-SSE41-NEXT: sarl $31, %ecx 2966; X32-SSE41-NEXT: pinsrb $8, %ecx, %xmm0 2967; X32-SSE41-NEXT: movl %eax, %ecx 2968; X32-SSE41-NEXT: shll $22, %ecx 2969; X32-SSE41-NEXT: sarl $31, %ecx 2970; X32-SSE41-NEXT: pinsrb $9, %ecx, %xmm0 2971; X32-SSE41-NEXT: movl %eax, %ecx 2972; X32-SSE41-NEXT: shll $21, %ecx 2973; X32-SSE41-NEXT: sarl $31, %ecx 2974; X32-SSE41-NEXT: pinsrb $10, %ecx, %xmm0 2975; X32-SSE41-NEXT: movl %eax, %ecx 2976; X32-SSE41-NEXT: shll $20, %ecx 2977; X32-SSE41-NEXT: sarl $31, %ecx 2978; X32-SSE41-NEXT: pinsrb $11, %ecx, %xmm0 2979; X32-SSE41-NEXT: movl %eax, %ecx 2980; X32-SSE41-NEXT: shll $19, %ecx 2981; X32-SSE41-NEXT: sarl $31, %ecx 2982; X32-SSE41-NEXT: pinsrb $12, %ecx, %xmm0 2983; X32-SSE41-NEXT: movl %eax, %ecx 2984; X32-SSE41-NEXT: shll $18, %ecx 2985; X32-SSE41-NEXT: sarl $31, %ecx 2986; X32-SSE41-NEXT: pinsrb $13, %ecx, %xmm0 2987; X32-SSE41-NEXT: movl %eax, %ecx 2988; X32-SSE41-NEXT: shll $17, %ecx 2989; X32-SSE41-NEXT: sarl $31, %ecx 2990; X32-SSE41-NEXT: pinsrb $14, %ecx, %xmm0 2991; X32-SSE41-NEXT: shrl $15, %eax 2992; X32-SSE41-NEXT: pinsrb $15, %eax, %xmm0 2993; X32-SSE41-NEXT: retl 2994entry: 2995 %X = load <16 x i1>, <16 x i1>* %ptr 2996 %Y = sext <16 x i1> %X to <16 x i8> 2997 ret <16 x i8> %Y 2998} 2999 3000define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) { 3001; SSE2-LABEL: load_sext_16i1_to_16i16: 3002; SSE2: # BB#0: # %entry 3003; SSE2-NEXT: movzwl (%rdi), %eax 3004; SSE2-NEXT: movl %eax, %ecx 3005; SSE2-NEXT: shrl $7, %ecx 3006; SSE2-NEXT: andl $1, %ecx 3007; SSE2-NEXT: movd %ecx, %xmm0 3008; SSE2-NEXT: movl %eax, %ecx 3009; SSE2-NEXT: shrl $6, %ecx 3010; SSE2-NEXT: andl $1, %ecx 3011; SSE2-NEXT: movd %ecx, %xmm1 3012; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 3013; SSE2-NEXT: movl %eax, %ecx 3014; SSE2-NEXT: shrl $5, %ecx 3015; SSE2-NEXT: andl $1, %ecx 3016; SSE2-NEXT: movd %ecx, %xmm0 3017; SSE2-NEXT: movl %eax, %ecx 3018; SSE2-NEXT: shrl $4, %ecx 3019; SSE2-NEXT: andl $1, %ecx 3020; SSE2-NEXT: movd %ecx, %xmm2 3021; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 3022; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 3023; SSE2-NEXT: movl %eax, %ecx 3024; SSE2-NEXT: shrl $3, %ecx 3025; SSE2-NEXT: andl $1, %ecx 3026; SSE2-NEXT: movd %ecx, %xmm0 3027; SSE2-NEXT: movl %eax, %ecx 3028; SSE2-NEXT: shrl $2, %ecx 3029; SSE2-NEXT: andl $1, %ecx 3030; SSE2-NEXT: movd %ecx, %xmm3 3031; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 3032; SSE2-NEXT: movl %eax, %ecx 3033; SSE2-NEXT: andl $1, %ecx 3034; SSE2-NEXT: movd %ecx, %xmm1 3035; SSE2-NEXT: movl %eax, %ecx 3036; SSE2-NEXT: shrl %ecx 3037; SSE2-NEXT: andl $1, %ecx 3038; SSE2-NEXT: movd %ecx, %xmm0 3039; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 3040; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 3041; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 3042; SSE2-NEXT: movl %eax, %ecx 3043; SSE2-NEXT: shrl $11, %ecx 3044; SSE2-NEXT: andl $1, %ecx 3045; SSE2-NEXT: movd %ecx, %xmm0 3046; SSE2-NEXT: movl %eax, %ecx 3047; SSE2-NEXT: shrl $10, %ecx 3048; SSE2-NEXT: andl $1, %ecx 3049; SSE2-NEXT: movd %ecx, %xmm2 3050; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 3051; SSE2-NEXT: movl %eax, %ecx 3052; SSE2-NEXT: shrl $9, %ecx 3053; SSE2-NEXT: andl $1, %ecx 3054; SSE2-NEXT: movd %ecx, %xmm3 3055; SSE2-NEXT: movl %eax, %ecx 3056; SSE2-NEXT: shrl $8, %ecx 3057; SSE2-NEXT: andl $1, %ecx 3058; SSE2-NEXT: movd %ecx, %xmm0 3059; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 3060; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 3061; SSE2-NEXT: movl %eax, %ecx 3062; SSE2-NEXT: shrl $13, %ecx 3063; SSE2-NEXT: andl $1, %ecx 3064; SSE2-NEXT: movd %ecx, %xmm2 3065; SSE2-NEXT: movl %eax, %ecx 3066; SSE2-NEXT: shrl $12, %ecx 3067; SSE2-NEXT: andl $1, %ecx 3068; SSE2-NEXT: movd %ecx, %xmm3 3069; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3070; SSE2-NEXT: movl %eax, %ecx 3071; SSE2-NEXT: shrl $14, %ecx 3072; SSE2-NEXT: andl $1, %ecx 3073; SSE2-NEXT: movd %ecx, %xmm2 3074; SSE2-NEXT: shrl $15, %eax 3075; SSE2-NEXT: movzwl %ax, %eax 3076; SSE2-NEXT: movd %eax, %xmm4 3077; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7] 3078; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3] 3079; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 3080; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] 3081; SSE2-NEXT: movdqa %xmm1, %xmm0 3082; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3083; SSE2-NEXT: psllw $15, %xmm0 3084; SSE2-NEXT: psraw $15, %xmm0 3085; SSE2-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 3086; SSE2-NEXT: psllw $15, %xmm1 3087; SSE2-NEXT: psraw $15, %xmm1 3088; SSE2-NEXT: retq 3089; 3090; SSSE3-LABEL: load_sext_16i1_to_16i16: 3091; SSSE3: # BB#0: # %entry 3092; SSSE3-NEXT: movzwl (%rdi), %eax 3093; SSSE3-NEXT: movl %eax, %ecx 3094; SSSE3-NEXT: shrl $7, %ecx 3095; SSSE3-NEXT: andl $1, %ecx 3096; SSSE3-NEXT: movd %ecx, %xmm0 3097; SSSE3-NEXT: movl %eax, %ecx 3098; SSSE3-NEXT: shrl $6, %ecx 3099; SSSE3-NEXT: andl $1, %ecx 3100; SSSE3-NEXT: movd %ecx, %xmm1 3101; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 3102; SSSE3-NEXT: movl %eax, %ecx 3103; SSSE3-NEXT: shrl $5, %ecx 3104; SSSE3-NEXT: andl $1, %ecx 3105; SSSE3-NEXT: movd %ecx, %xmm0 3106; SSSE3-NEXT: movl %eax, %ecx 3107; SSSE3-NEXT: shrl $4, %ecx 3108; SSSE3-NEXT: andl $1, %ecx 3109; SSSE3-NEXT: movd %ecx, %xmm2 3110; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 3111; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 3112; SSSE3-NEXT: movl %eax, %ecx 3113; SSSE3-NEXT: shrl $3, %ecx 3114; SSSE3-NEXT: andl $1, %ecx 3115; SSSE3-NEXT: movd %ecx, %xmm0 3116; SSSE3-NEXT: movl %eax, %ecx 3117; SSSE3-NEXT: shrl $2, %ecx 3118; SSSE3-NEXT: andl $1, %ecx 3119; SSSE3-NEXT: movd %ecx, %xmm3 3120; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7] 3121; SSSE3-NEXT: movl %eax, %ecx 3122; SSSE3-NEXT: andl $1, %ecx 3123; SSSE3-NEXT: movd %ecx, %xmm1 3124; SSSE3-NEXT: movl %eax, %ecx 3125; SSSE3-NEXT: shrl %ecx 3126; SSSE3-NEXT: andl $1, %ecx 3127; SSSE3-NEXT: movd %ecx, %xmm0 3128; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 3129; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3] 3130; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 3131; SSSE3-NEXT: movl %eax, %ecx 3132; SSSE3-NEXT: shrl $11, %ecx 3133; SSSE3-NEXT: andl $1, %ecx 3134; SSSE3-NEXT: movd %ecx, %xmm0 3135; SSSE3-NEXT: movl %eax, %ecx 3136; SSSE3-NEXT: shrl $10, %ecx 3137; SSSE3-NEXT: andl $1, %ecx 3138; SSSE3-NEXT: movd %ecx, %xmm2 3139; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7] 3140; SSSE3-NEXT: movl %eax, %ecx 3141; SSSE3-NEXT: shrl $9, %ecx 3142; SSSE3-NEXT: andl $1, %ecx 3143; SSSE3-NEXT: movd %ecx, %xmm3 3144; SSSE3-NEXT: movl %eax, %ecx 3145; SSSE3-NEXT: shrl $8, %ecx 3146; SSSE3-NEXT: andl $1, %ecx 3147; SSSE3-NEXT: movd %ecx, %xmm0 3148; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7] 3149; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 3150; SSSE3-NEXT: movl %eax, %ecx 3151; SSSE3-NEXT: shrl $13, %ecx 3152; SSSE3-NEXT: andl $1, %ecx 3153; SSSE3-NEXT: movd %ecx, %xmm2 3154; SSSE3-NEXT: movl %eax, %ecx 3155; SSSE3-NEXT: shrl $12, %ecx 3156; SSSE3-NEXT: andl $1, %ecx 3157; SSSE3-NEXT: movd %ecx, %xmm3 3158; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 3159; SSSE3-NEXT: movl %eax, %ecx 3160; SSSE3-NEXT: shrl $14, %ecx 3161; SSSE3-NEXT: andl $1, %ecx 3162; SSSE3-NEXT: movd %ecx, %xmm2 3163; SSSE3-NEXT: shrl $15, %eax 3164; SSSE3-NEXT: movzwl %ax, %eax 3165; SSSE3-NEXT: movd %eax, %xmm4 3166; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7] 3167; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3] 3168; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 3169; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm0[0] 3170; SSSE3-NEXT: movdqa %xmm1, %xmm0 3171; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3172; SSSE3-NEXT: psllw $15, %xmm0 3173; SSSE3-NEXT: psraw $15, %xmm0 3174; SSSE3-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15] 3175; SSSE3-NEXT: psllw $15, %xmm1 3176; SSSE3-NEXT: psraw $15, %xmm1 3177; SSSE3-NEXT: retq 3178; 3179; SSE41-LABEL: load_sext_16i1_to_16i16: 3180; SSE41: # BB#0: # %entry 3181; SSE41-NEXT: movzwl (%rdi), %eax 3182; SSE41-NEXT: movl %eax, %ecx 3183; SSE41-NEXT: shrl %ecx 3184; SSE41-NEXT: andl $1, %ecx 3185; SSE41-NEXT: movl %eax, %edx 3186; SSE41-NEXT: andl $1, %edx 3187; SSE41-NEXT: movd %edx, %xmm1 3188; SSE41-NEXT: pinsrb $1, %ecx, %xmm1 3189; SSE41-NEXT: movl %eax, %ecx 3190; SSE41-NEXT: shrl $2, %ecx 3191; SSE41-NEXT: andl $1, %ecx 3192; SSE41-NEXT: pinsrb $2, %ecx, %xmm1 3193; SSE41-NEXT: movl %eax, %ecx 3194; SSE41-NEXT: shrl $3, %ecx 3195; SSE41-NEXT: andl $1, %ecx 3196; SSE41-NEXT: pinsrb $3, %ecx, %xmm1 3197; SSE41-NEXT: movl %eax, %ecx 3198; SSE41-NEXT: shrl $4, %ecx 3199; SSE41-NEXT: andl $1, %ecx 3200; SSE41-NEXT: pinsrb $4, %ecx, %xmm1 3201; SSE41-NEXT: movl %eax, %ecx 3202; SSE41-NEXT: shrl $5, %ecx 3203; SSE41-NEXT: andl $1, %ecx 3204; SSE41-NEXT: pinsrb $5, %ecx, %xmm1 3205; SSE41-NEXT: movl %eax, %ecx 3206; SSE41-NEXT: shrl $6, %ecx 3207; SSE41-NEXT: andl $1, %ecx 3208; SSE41-NEXT: pinsrb $6, %ecx, %xmm1 3209; SSE41-NEXT: movl %eax, %ecx 3210; SSE41-NEXT: shrl $7, %ecx 3211; SSE41-NEXT: andl $1, %ecx 3212; SSE41-NEXT: pinsrb $7, %ecx, %xmm1 3213; SSE41-NEXT: movl %eax, %ecx 3214; SSE41-NEXT: shrl $8, %ecx 3215; SSE41-NEXT: andl $1, %ecx 3216; SSE41-NEXT: pinsrb $8, %ecx, %xmm1 3217; SSE41-NEXT: movl %eax, %ecx 3218; SSE41-NEXT: shrl $9, %ecx 3219; SSE41-NEXT: andl $1, %ecx 3220; SSE41-NEXT: pinsrb $9, %ecx, %xmm1 3221; SSE41-NEXT: movl %eax, %ecx 3222; SSE41-NEXT: shrl $10, %ecx 3223; SSE41-NEXT: andl $1, %ecx 3224; SSE41-NEXT: pinsrb $10, %ecx, %xmm1 3225; SSE41-NEXT: movl %eax, %ecx 3226; SSE41-NEXT: shrl $11, %ecx 3227; SSE41-NEXT: andl $1, %ecx 3228; SSE41-NEXT: pinsrb $11, %ecx, %xmm1 3229; SSE41-NEXT: movl %eax, %ecx 3230; SSE41-NEXT: shrl $12, %ecx 3231; SSE41-NEXT: andl $1, %ecx 3232; SSE41-NEXT: pinsrb $12, %ecx, %xmm1 3233; SSE41-NEXT: movl %eax, %ecx 3234; SSE41-NEXT: shrl $13, %ecx 3235; SSE41-NEXT: andl $1, %ecx 3236; SSE41-NEXT: pinsrb $13, %ecx, %xmm1 3237; SSE41-NEXT: movl %eax, %ecx 3238; SSE41-NEXT: shrl $14, %ecx 3239; SSE41-NEXT: andl $1, %ecx 3240; SSE41-NEXT: pinsrb $14, %ecx, %xmm1 3241; SSE41-NEXT: shrl $15, %eax 3242; SSE41-NEXT: movzwl %ax, %eax 3243; SSE41-NEXT: pinsrb $15, %eax, %xmm1 3244; SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 3245; SSE41-NEXT: psllw $15, %xmm0 3246; SSE41-NEXT: psraw $15, %xmm0 3247; SSE41-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 3248; SSE41-NEXT: psllw $15, %xmm1 3249; SSE41-NEXT: psraw $15, %xmm1 3250; SSE41-NEXT: retq 3251; 3252; AVX1-LABEL: load_sext_16i1_to_16i16: 3253; AVX1: # BB#0: # %entry 3254; AVX1-NEXT: pushq %rbp 3255; AVX1-NEXT: .Lcfi0: 3256; AVX1-NEXT: .cfi_def_cfa_offset 16 3257; AVX1-NEXT: pushq %r15 3258; AVX1-NEXT: .Lcfi1: 3259; AVX1-NEXT: .cfi_def_cfa_offset 24 3260; AVX1-NEXT: pushq %r14 3261; AVX1-NEXT: .Lcfi2: 3262; AVX1-NEXT: .cfi_def_cfa_offset 32 3263; AVX1-NEXT: pushq %r13 3264; AVX1-NEXT: .Lcfi3: 3265; AVX1-NEXT: .cfi_def_cfa_offset 40 3266; AVX1-NEXT: pushq %r12 3267; AVX1-NEXT: .Lcfi4: 3268; AVX1-NEXT: .cfi_def_cfa_offset 48 3269; AVX1-NEXT: pushq %rbx 3270; AVX1-NEXT: .Lcfi5: 3271; AVX1-NEXT: .cfi_def_cfa_offset 56 3272; AVX1-NEXT: .Lcfi6: 3273; AVX1-NEXT: .cfi_offset %rbx, -56 3274; AVX1-NEXT: .Lcfi7: 3275; AVX1-NEXT: .cfi_offset %r12, -48 3276; AVX1-NEXT: .Lcfi8: 3277; AVX1-NEXT: .cfi_offset %r13, -40 3278; AVX1-NEXT: .Lcfi9: 3279; AVX1-NEXT: .cfi_offset %r14, -32 3280; AVX1-NEXT: .Lcfi10: 3281; AVX1-NEXT: .cfi_offset %r15, -24 3282; AVX1-NEXT: .Lcfi11: 3283; AVX1-NEXT: .cfi_offset %rbp, -16 3284; AVX1-NEXT: movswq (%rdi), %rax 3285; AVX1-NEXT: movq %rax, %rcx 3286; AVX1-NEXT: shlq $55, %rcx 3287; AVX1-NEXT: sarq $63, %rcx 3288; AVX1-NEXT: vmovd %ecx, %xmm0 3289; AVX1-NEXT: movq %rax, %r8 3290; AVX1-NEXT: movq %rax, %r10 3291; AVX1-NEXT: movq %rax, %r11 3292; AVX1-NEXT: movq %rax, %r14 3293; AVX1-NEXT: movq %rax, %r15 3294; AVX1-NEXT: movq %rax, %r9 3295; AVX1-NEXT: movq %rax, %r12 3296; AVX1-NEXT: movq %rax, %r13 3297; AVX1-NEXT: movq %rax, %rbx 3298; AVX1-NEXT: movq %rax, %rdi 3299; AVX1-NEXT: movq %rax, %rcx 3300; AVX1-NEXT: movq %rax, %rdx 3301; AVX1-NEXT: movq %rax, %rsi 3302; AVX1-NEXT: movsbq %al, %rbp 3303; AVX1-NEXT: shlq $54, %rax 3304; AVX1-NEXT: sarq $63, %rax 3305; AVX1-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 3306; AVX1-NEXT: shlq $53, %r8 3307; AVX1-NEXT: sarq $63, %r8 3308; AVX1-NEXT: vpinsrw $2, %r8d, %xmm0, %xmm0 3309; AVX1-NEXT: shlq $52, %r10 3310; AVX1-NEXT: sarq $63, %r10 3311; AVX1-NEXT: vpinsrw $3, %r10d, %xmm0, %xmm0 3312; AVX1-NEXT: shlq $51, %r11 3313; AVX1-NEXT: sarq $63, %r11 3314; AVX1-NEXT: vpinsrw $4, %r11d, %xmm0, %xmm0 3315; AVX1-NEXT: shlq $50, %r14 3316; AVX1-NEXT: sarq $63, %r14 3317; AVX1-NEXT: vpinsrw $5, %r14d, %xmm0, %xmm0 3318; AVX1-NEXT: shlq $49, %r15 3319; AVX1-NEXT: sarq $63, %r15 3320; AVX1-NEXT: vpinsrw $6, %r15d, %xmm0, %xmm0 3321; AVX1-NEXT: shrq $15, %r9 3322; AVX1-NEXT: vpinsrw $7, %r9d, %xmm0, %xmm0 3323; AVX1-NEXT: shlq $63, %r13 3324; AVX1-NEXT: sarq $63, %r13 3325; AVX1-NEXT: vmovd %r13d, %xmm1 3326; AVX1-NEXT: shlq $62, %r12 3327; AVX1-NEXT: sarq $63, %r12 3328; AVX1-NEXT: vpinsrw $1, %r12d, %xmm1, %xmm1 3329; AVX1-NEXT: shlq $61, %rbx 3330; AVX1-NEXT: sarq $63, %rbx 3331; AVX1-NEXT: vpinsrw $2, %ebx, %xmm1, %xmm1 3332; AVX1-NEXT: shlq $60, %rdi 3333; AVX1-NEXT: sarq $63, %rdi 3334; AVX1-NEXT: vpinsrw $3, %edi, %xmm1, %xmm1 3335; AVX1-NEXT: shlq $59, %rcx 3336; AVX1-NEXT: sarq $63, %rcx 3337; AVX1-NEXT: vpinsrw $4, %ecx, %xmm1, %xmm1 3338; AVX1-NEXT: shlq $58, %rdx 3339; AVX1-NEXT: sarq $63, %rdx 3340; AVX1-NEXT: vpinsrw $5, %edx, %xmm1, %xmm1 3341; AVX1-NEXT: shlq $57, %rsi 3342; AVX1-NEXT: sarq $63, %rsi 3343; AVX1-NEXT: vpinsrw $6, %esi, %xmm1, %xmm1 3344; AVX1-NEXT: shrq $7, %rbp 3345; AVX1-NEXT: vpinsrw $7, %ebp, %xmm1, %xmm1 3346; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 3347; AVX1-NEXT: popq %rbx 3348; AVX1-NEXT: popq %r12 3349; AVX1-NEXT: popq %r13 3350; AVX1-NEXT: popq %r14 3351; AVX1-NEXT: popq %r15 3352; AVX1-NEXT: popq %rbp 3353; AVX1-NEXT: retq 3354; 3355; AVX2-LABEL: load_sext_16i1_to_16i16: 3356; AVX2: # BB#0: # %entry 3357; AVX2-NEXT: pushq %rbp 3358; AVX2-NEXT: .Lcfi0: 3359; AVX2-NEXT: .cfi_def_cfa_offset 16 3360; AVX2-NEXT: pushq %r15 3361; AVX2-NEXT: .Lcfi1: 3362; AVX2-NEXT: .cfi_def_cfa_offset 24 3363; AVX2-NEXT: pushq %r14 3364; AVX2-NEXT: .Lcfi2: 3365; AVX2-NEXT: .cfi_def_cfa_offset 32 3366; AVX2-NEXT: pushq %r13 3367; AVX2-NEXT: .Lcfi3: 3368; AVX2-NEXT: .cfi_def_cfa_offset 40 3369; AVX2-NEXT: pushq %r12 3370; AVX2-NEXT: .Lcfi4: 3371; AVX2-NEXT: .cfi_def_cfa_offset 48 3372; AVX2-NEXT: pushq %rbx 3373; AVX2-NEXT: .Lcfi5: 3374; AVX2-NEXT: .cfi_def_cfa_offset 56 3375; AVX2-NEXT: .Lcfi6: 3376; AVX2-NEXT: .cfi_offset %rbx, -56 3377; AVX2-NEXT: .Lcfi7: 3378; AVX2-NEXT: .cfi_offset %r12, -48 3379; AVX2-NEXT: .Lcfi8: 3380; AVX2-NEXT: .cfi_offset %r13, -40 3381; AVX2-NEXT: .Lcfi9: 3382; AVX2-NEXT: .cfi_offset %r14, -32 3383; AVX2-NEXT: .Lcfi10: 3384; AVX2-NEXT: .cfi_offset %r15, -24 3385; AVX2-NEXT: .Lcfi11: 3386; AVX2-NEXT: .cfi_offset %rbp, -16 3387; AVX2-NEXT: movswq (%rdi), %rax 3388; AVX2-NEXT: movq %rax, %rcx 3389; AVX2-NEXT: shlq $55, %rcx 3390; AVX2-NEXT: sarq $63, %rcx 3391; AVX2-NEXT: vmovd %ecx, %xmm0 3392; AVX2-NEXT: movq %rax, %r8 3393; AVX2-NEXT: movq %rax, %r10 3394; AVX2-NEXT: movq %rax, %r11 3395; AVX2-NEXT: movq %rax, %r14 3396; AVX2-NEXT: movq %rax, %r15 3397; AVX2-NEXT: movq %rax, %r9 3398; AVX2-NEXT: movq %rax, %r12 3399; AVX2-NEXT: movq %rax, %r13 3400; AVX2-NEXT: movq %rax, %rbx 3401; AVX2-NEXT: movq %rax, %rdi 3402; AVX2-NEXT: movq %rax, %rcx 3403; AVX2-NEXT: movq %rax, %rdx 3404; AVX2-NEXT: movq %rax, %rsi 3405; AVX2-NEXT: movsbq %al, %rbp 3406; AVX2-NEXT: shlq $54, %rax 3407; AVX2-NEXT: sarq $63, %rax 3408; AVX2-NEXT: vpinsrw $1, %eax, %xmm0, %xmm0 3409; AVX2-NEXT: shlq $53, %r8 3410; AVX2-NEXT: sarq $63, %r8 3411; AVX2-NEXT: vpinsrw $2, %r8d, %xmm0, %xmm0 3412; AVX2-NEXT: shlq $52, %r10 3413; AVX2-NEXT: sarq $63, %r10 3414; AVX2-NEXT: vpinsrw $3, %r10d, %xmm0, %xmm0 3415; AVX2-NEXT: shlq $51, %r11 3416; AVX2-NEXT: sarq $63, %r11 3417; AVX2-NEXT: vpinsrw $4, %r11d, %xmm0, %xmm0 3418; AVX2-NEXT: shlq $50, %r14 3419; AVX2-NEXT: sarq $63, %r14 3420; AVX2-NEXT: vpinsrw $5, %r14d, %xmm0, %xmm0 3421; AVX2-NEXT: shlq $49, %r15 3422; AVX2-NEXT: sarq $63, %r15 3423; AVX2-NEXT: vpinsrw $6, %r15d, %xmm0, %xmm0 3424; AVX2-NEXT: shrq $15, %r9 3425; AVX2-NEXT: vpinsrw $7, %r9d, %xmm0, %xmm0 3426; AVX2-NEXT: shlq $63, %r13 3427; AVX2-NEXT: sarq $63, %r13 3428; AVX2-NEXT: vmovd %r13d, %xmm1 3429; AVX2-NEXT: shlq $62, %r12 3430; AVX2-NEXT: sarq $63, %r12 3431; AVX2-NEXT: vpinsrw $1, %r12d, %xmm1, %xmm1 3432; AVX2-NEXT: shlq $61, %rbx 3433; AVX2-NEXT: sarq $63, %rbx 3434; AVX2-NEXT: vpinsrw $2, %ebx, %xmm1, %xmm1 3435; AVX2-NEXT: shlq $60, %rdi 3436; AVX2-NEXT: sarq $63, %rdi 3437; AVX2-NEXT: vpinsrw $3, %edi, %xmm1, %xmm1 3438; AVX2-NEXT: shlq $59, %rcx 3439; AVX2-NEXT: sarq $63, %rcx 3440; AVX2-NEXT: vpinsrw $4, %ecx, %xmm1, %xmm1 3441; AVX2-NEXT: shlq $58, %rdx 3442; AVX2-NEXT: sarq $63, %rdx 3443; AVX2-NEXT: vpinsrw $5, %edx, %xmm1, %xmm1 3444; AVX2-NEXT: shlq $57, %rsi 3445; AVX2-NEXT: sarq $63, %rsi 3446; AVX2-NEXT: vpinsrw $6, %esi, %xmm1, %xmm1 3447; AVX2-NEXT: shrq $7, %rbp 3448; AVX2-NEXT: vpinsrw $7, %ebp, %xmm1, %xmm1 3449; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 3450; AVX2-NEXT: popq %rbx 3451; AVX2-NEXT: popq %r12 3452; AVX2-NEXT: popq %r13 3453; AVX2-NEXT: popq %r14 3454; AVX2-NEXT: popq %r15 3455; AVX2-NEXT: popq %rbp 3456; AVX2-NEXT: retq 3457; 3458; AVX512F-LABEL: load_sext_16i1_to_16i16: 3459; AVX512F: # BB#0: # %entry 3460; AVX512F-NEXT: kmovw (%rdi), %k1 3461; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 3462; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 3463; AVX512F-NEXT: retq 3464; 3465; AVX512BW-LABEL: load_sext_16i1_to_16i16: 3466; AVX512BW: # BB#0: # %entry 3467; AVX512BW-NEXT: kmovw (%rdi), %k0 3468; AVX512BW-NEXT: vpmovm2w %k0, %zmm0 3469; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 3470; AVX512BW-NEXT: retq 3471; 3472; X32-SSE41-LABEL: load_sext_16i1_to_16i16: 3473; X32-SSE41: # BB#0: # %entry 3474; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 3475; X32-SSE41-NEXT: movzwl (%eax), %eax 3476; X32-SSE41-NEXT: movl %eax, %ecx 3477; X32-SSE41-NEXT: shrl %ecx 3478; X32-SSE41-NEXT: andl $1, %ecx 3479; X32-SSE41-NEXT: movl %eax, %edx 3480; X32-SSE41-NEXT: andl $1, %edx 3481; X32-SSE41-NEXT: movd %edx, %xmm1 3482; X32-SSE41-NEXT: pinsrb $1, %ecx, %xmm1 3483; X32-SSE41-NEXT: movl %eax, %ecx 3484; X32-SSE41-NEXT: shrl $2, %ecx 3485; X32-SSE41-NEXT: andl $1, %ecx 3486; X32-SSE41-NEXT: pinsrb $2, %ecx, %xmm1 3487; X32-SSE41-NEXT: movl %eax, %ecx 3488; X32-SSE41-NEXT: shrl $3, %ecx 3489; X32-SSE41-NEXT: andl $1, %ecx 3490; X32-SSE41-NEXT: pinsrb $3, %ecx, %xmm1 3491; X32-SSE41-NEXT: movl %eax, %ecx 3492; X32-SSE41-NEXT: shrl $4, %ecx 3493; X32-SSE41-NEXT: andl $1, %ecx 3494; X32-SSE41-NEXT: pinsrb $4, %ecx, %xmm1 3495; X32-SSE41-NEXT: movl %eax, %ecx 3496; X32-SSE41-NEXT: shrl $5, %ecx 3497; X32-SSE41-NEXT: andl $1, %ecx 3498; X32-SSE41-NEXT: pinsrb $5, %ecx, %xmm1 3499; X32-SSE41-NEXT: movl %eax, %ecx 3500; X32-SSE41-NEXT: shrl $6, %ecx 3501; X32-SSE41-NEXT: andl $1, %ecx 3502; X32-SSE41-NEXT: pinsrb $6, %ecx, %xmm1 3503; X32-SSE41-NEXT: movl %eax, %ecx 3504; X32-SSE41-NEXT: shrl $7, %ecx 3505; X32-SSE41-NEXT: andl $1, %ecx 3506; X32-SSE41-NEXT: pinsrb $7, %ecx, %xmm1 3507; X32-SSE41-NEXT: movl %eax, %ecx 3508; X32-SSE41-NEXT: shrl $8, %ecx 3509; X32-SSE41-NEXT: andl $1, %ecx 3510; X32-SSE41-NEXT: pinsrb $8, %ecx, %xmm1 3511; X32-SSE41-NEXT: movl %eax, %ecx 3512; X32-SSE41-NEXT: shrl $9, %ecx 3513; X32-SSE41-NEXT: andl $1, %ecx 3514; X32-SSE41-NEXT: pinsrb $9, %ecx, %xmm1 3515; X32-SSE41-NEXT: movl %eax, %ecx 3516; X32-SSE41-NEXT: shrl $10, %ecx 3517; X32-SSE41-NEXT: andl $1, %ecx 3518; X32-SSE41-NEXT: pinsrb $10, %ecx, %xmm1 3519; X32-SSE41-NEXT: movl %eax, %ecx 3520; X32-SSE41-NEXT: shrl $11, %ecx 3521; X32-SSE41-NEXT: andl $1, %ecx 3522; X32-SSE41-NEXT: pinsrb $11, %ecx, %xmm1 3523; X32-SSE41-NEXT: movl %eax, %ecx 3524; X32-SSE41-NEXT: shrl $12, %ecx 3525; X32-SSE41-NEXT: andl $1, %ecx 3526; X32-SSE41-NEXT: pinsrb $12, %ecx, %xmm1 3527; X32-SSE41-NEXT: movl %eax, %ecx 3528; X32-SSE41-NEXT: shrl $13, %ecx 3529; X32-SSE41-NEXT: andl $1, %ecx 3530; X32-SSE41-NEXT: pinsrb $13, %ecx, %xmm1 3531; X32-SSE41-NEXT: movl %eax, %ecx 3532; X32-SSE41-NEXT: shrl $14, %ecx 3533; X32-SSE41-NEXT: andl $1, %ecx 3534; X32-SSE41-NEXT: pinsrb $14, %ecx, %xmm1 3535; X32-SSE41-NEXT: shrl $15, %eax 3536; X32-SSE41-NEXT: pinsrb $15, %eax, %xmm1 3537; X32-SSE41-NEXT: pmovzxbw {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 3538; X32-SSE41-NEXT: psllw $15, %xmm0 3539; X32-SSE41-NEXT: psraw $15, %xmm0 3540; X32-SSE41-NEXT: punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 3541; X32-SSE41-NEXT: psllw $15, %xmm1 3542; X32-SSE41-NEXT: psraw $15, %xmm1 3543; X32-SSE41-NEXT: retl 3544entry: 3545 %X = load <16 x i1>, <16 x i1>* %ptr 3546 %Y = sext <16 x i1> %X to <16 x i16> 3547 ret <16 x i16> %Y 3548} 3549 3550define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone { 3551; SSE2-LABEL: load_sext_32i1_to_32i8: 3552; SSE2: # BB#0: # %entry 3553; SSE2-NEXT: pushq %rbp 3554; SSE2-NEXT: pushq %r15 3555; SSE2-NEXT: pushq %r14 3556; SSE2-NEXT: pushq %r13 3557; SSE2-NEXT: pushq %r12 3558; SSE2-NEXT: pushq %rbx 3559; SSE2-NEXT: movswq (%rdi), %rax 3560; SSE2-NEXT: movq %rax, %r10 3561; SSE2-NEXT: movq %rax, %r8 3562; SSE2-NEXT: movq %rax, %r9 3563; SSE2-NEXT: movq %rax, %r11 3564; SSE2-NEXT: movq %rax, %r14 3565; SSE2-NEXT: movq %rax, %r15 3566; SSE2-NEXT: movq %rax, %r12 3567; SSE2-NEXT: movq %rax, %r13 3568; SSE2-NEXT: movq %rax, %rdx 3569; SSE2-NEXT: movq %rax, %rsi 3570; SSE2-NEXT: movq %rax, %rcx 3571; SSE2-NEXT: movq %rax, %rbp 3572; SSE2-NEXT: movq %rax, %rbx 3573; SSE2-NEXT: shrq $15, %rbx 3574; SSE2-NEXT: movd %ebx, %xmm0 3575; SSE2-NEXT: movq %rax, %rbx 3576; SSE2-NEXT: shlq $49, %r10 3577; SSE2-NEXT: sarq $63, %r10 3578; SSE2-NEXT: movd %r10d, %xmm15 3579; SSE2-NEXT: movq %rax, %r10 3580; SSE2-NEXT: movsbq %al, %rax 3581; SSE2-NEXT: punpcklbw {{.*#+}} xmm15 = xmm15[0],xmm0[0],xmm15[1],xmm0[1],xmm15[2],xmm0[2],xmm15[3],xmm0[3],xmm15[4],xmm0[4],xmm15[5],xmm0[5],xmm15[6],xmm0[6],xmm15[7],xmm0[7] 3582; SSE2-NEXT: shlq $50, %r8 3583; SSE2-NEXT: sarq $63, %r8 3584; SSE2-NEXT: movd %r8d, %xmm8 3585; SSE2-NEXT: shlq $51, %r9 3586; SSE2-NEXT: sarq $63, %r9 3587; SSE2-NEXT: movd %r9d, %xmm3 3588; SSE2-NEXT: shlq $52, %r11 3589; SSE2-NEXT: sarq $63, %r11 3590; SSE2-NEXT: movd %r11d, %xmm9 3591; SSE2-NEXT: shlq $53, %r14 3592; SSE2-NEXT: sarq $63, %r14 3593; SSE2-NEXT: movd %r14d, %xmm6 3594; SSE2-NEXT: shlq $54, %r15 3595; SSE2-NEXT: sarq $63, %r15 3596; SSE2-NEXT: movd %r15d, %xmm10 3597; SSE2-NEXT: shlq $55, %r12 3598; SSE2-NEXT: sarq $63, %r12 3599; SSE2-NEXT: movd %r12d, %xmm2 3600; SSE2-NEXT: shlq $60, %r13 3601; SSE2-NEXT: sarq $63, %r13 3602; SSE2-NEXT: movd %r13d, %xmm11 3603; SSE2-NEXT: shlq $61, %rdx 3604; SSE2-NEXT: sarq $63, %rdx 3605; SSE2-NEXT: movd %edx, %xmm5 3606; SSE2-NEXT: shlq $62, %rsi 3607; SSE2-NEXT: sarq $63, %rsi 3608; SSE2-NEXT: movd %esi, %xmm12 3609; SSE2-NEXT: shlq $63, %rcx 3610; SSE2-NEXT: sarq $63, %rcx 3611; SSE2-NEXT: movd %ecx, %xmm0 3612; SSE2-NEXT: shlq $58, %rbp 3613; SSE2-NEXT: sarq $63, %rbp 3614; SSE2-NEXT: movd %ebp, %xmm13 3615; SSE2-NEXT: shlq $59, %rbx 3616; SSE2-NEXT: sarq $63, %rbx 3617; SSE2-NEXT: movd %ebx, %xmm7 3618; SSE2-NEXT: shlq $57, %r10 3619; SSE2-NEXT: sarq $63, %r10 3620; SSE2-NEXT: movd %r10d, %xmm4 3621; SSE2-NEXT: shrq $7, %rax 3622; SSE2-NEXT: movd %eax, %xmm14 3623; SSE2-NEXT: movswq 2(%rdi), %rsi 3624; SSE2-NEXT: movq %rsi, %r8 3625; SSE2-NEXT: movq %rsi, %r9 3626; SSE2-NEXT: movq %rsi, %r10 3627; SSE2-NEXT: movq %rsi, %r11 3628; SSE2-NEXT: movq %rsi, %r14 3629; SSE2-NEXT: movq %rsi, %r15 3630; SSE2-NEXT: movq %rsi, %r12 3631; SSE2-NEXT: movq %rsi, %r13 3632; SSE2-NEXT: movq %rsi, %rbx 3633; SSE2-NEXT: movq %rsi, %rax 3634; SSE2-NEXT: movq %rsi, %rcx 3635; SSE2-NEXT: movq %rsi, %rdx 3636; SSE2-NEXT: movq %rsi, %rdi 3637; SSE2-NEXT: movq %rsi, %rbp 3638; SSE2-NEXT: shrq $15, %rbp 3639; SSE2-NEXT: movd %ebp, %xmm1 3640; SSE2-NEXT: movq %rsi, %rbp 3641; SSE2-NEXT: movsbq %sil, %rsi 3642; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm8[0],xmm3[1],xmm8[1],xmm3[2],xmm8[2],xmm3[3],xmm8[3],xmm3[4],xmm8[4],xmm3[5],xmm8[5],xmm3[6],xmm8[6],xmm3[7],xmm8[7] 3643; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm15[0],xmm3[1],xmm15[1],xmm3[2],xmm15[2],xmm3[3],xmm15[3] 3644; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm9[0],xmm6[1],xmm9[1],xmm6[2],xmm9[2],xmm6[3],xmm9[3],xmm6[4],xmm9[4],xmm6[5],xmm9[5],xmm6[6],xmm9[6],xmm6[7],xmm9[7] 3645; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm10[0],xmm2[1],xmm10[1],xmm2[2],xmm10[2],xmm2[3],xmm10[3],xmm2[4],xmm10[4],xmm2[5],xmm10[5],xmm2[6],xmm10[6],xmm2[7],xmm10[7] 3646; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3] 3647; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 3648; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm11[0],xmm5[1],xmm11[1],xmm5[2],xmm11[2],xmm5[3],xmm11[3],xmm5[4],xmm11[4],xmm5[5],xmm11[5],xmm5[6],xmm11[6],xmm5[7],xmm11[7] 3649; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm12[0],xmm0[1],xmm12[1],xmm0[2],xmm12[2],xmm0[3],xmm12[3],xmm0[4],xmm12[4],xmm0[5],xmm12[5],xmm0[6],xmm12[6],xmm0[7],xmm12[7] 3650; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3] 3651; SSE2-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm13[0],xmm7[1],xmm13[1],xmm7[2],xmm13[2],xmm7[3],xmm13[3],xmm7[4],xmm13[4],xmm7[5],xmm13[5],xmm7[6],xmm13[6],xmm7[7],xmm13[7] 3652; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm14[0],xmm4[1],xmm14[1],xmm4[2],xmm14[2],xmm4[3],xmm14[3],xmm4[4],xmm14[4],xmm4[5],xmm14[5],xmm4[6],xmm14[6],xmm4[7],xmm14[7] 3653; SSE2-NEXT: shlq $49, %r8 3654; SSE2-NEXT: sarq $63, %r8 3655; SSE2-NEXT: movd %r8d, %xmm3 3656; SSE2-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm4[0],xmm7[1],xmm4[1],xmm7[2],xmm4[2],xmm7[3],xmm4[3] 3657; SSE2-NEXT: shlq $50, %r9 3658; SSE2-NEXT: sarq $63, %r9 3659; SSE2-NEXT: movd %r9d, %xmm4 3660; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm7[0],xmm0[1],xmm7[1] 3661; SSE2-NEXT: shlq $51, %r10 3662; SSE2-NEXT: sarq $63, %r10 3663; SSE2-NEXT: movd %r10d, %xmm5 3664; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3665; SSE2-NEXT: shlq $52, %r11 3666; SSE2-NEXT: sarq $63, %r11 3667; SSE2-NEXT: movd %r11d, %xmm2 3668; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 3669; SSE2-NEXT: shlq $53, %r14 3670; SSE2-NEXT: sarq $63, %r14 3671; SSE2-NEXT: movd %r14d, %xmm1 3672; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7] 3673; SSE2-NEXT: shlq $54, %r15 3674; SSE2-NEXT: sarq $63, %r15 3675; SSE2-NEXT: movd %r15d, %xmm4 3676; SSE2-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3] 3677; SSE2-NEXT: shlq $55, %r12 3678; SSE2-NEXT: sarq $63, %r12 3679; SSE2-NEXT: movd %r12d, %xmm3 3680; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 3681; SSE2-NEXT: shlq $60, %r13 3682; SSE2-NEXT: sarq $63, %r13 3683; SSE2-NEXT: movd %r13d, %xmm2 3684; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 3685; SSE2-NEXT: shlq $61, %rbx 3686; SSE2-NEXT: sarq $63, %rbx 3687; SSE2-NEXT: movd %ebx, %xmm4 3688; SSE2-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 3689; SSE2-NEXT: shlq $62, %rax 3690; SSE2-NEXT: sarq $63, %rax 3691; SSE2-NEXT: movd %eax, %xmm6 3692; SSE2-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1] 3693; SSE2-NEXT: shlq $63, %rcx 3694; SSE2-NEXT: sarq $63, %rcx 3695; SSE2-NEXT: movd %ecx, %xmm1 3696; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 3697; SSE2-NEXT: shlq $58, %rdx 3698; SSE2-NEXT: sarq $63, %rdx 3699; SSE2-NEXT: movd %edx, %xmm2 3700; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3],xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7] 3701; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3] 3702; SSE2-NEXT: shlq $59, %rdi 3703; SSE2-NEXT: sarq $63, %rdi 3704; SSE2-NEXT: movd %edi, %xmm4 3705; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 3706; SSE2-NEXT: shlq $57, %rbp 3707; SSE2-NEXT: sarq $63, %rbp 3708; SSE2-NEXT: movd %ebp, %xmm2 3709; SSE2-NEXT: shrq $7, %rsi 3710; SSE2-NEXT: movd %esi, %xmm5 3711; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3],xmm2[4],xmm5[4],xmm2[5],xmm5[5],xmm2[6],xmm5[6],xmm2[7],xmm5[7] 3712; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3] 3713; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 3714; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0] 3715; SSE2-NEXT: popq %rbx 3716; SSE2-NEXT: popq %r12 3717; SSE2-NEXT: popq %r13 3718; SSE2-NEXT: popq %r14 3719; SSE2-NEXT: popq %r15 3720; SSE2-NEXT: popq %rbp 3721; SSE2-NEXT: retq 3722; 3723; SSSE3-LABEL: load_sext_32i1_to_32i8: 3724; SSSE3: # BB#0: # %entry 3725; SSSE3-NEXT: pushq %rbp 3726; SSSE3-NEXT: pushq %r15 3727; SSSE3-NEXT: pushq %r14 3728; SSSE3-NEXT: pushq %r13 3729; SSSE3-NEXT: pushq %r12 3730; SSSE3-NEXT: pushq %rbx 3731; SSSE3-NEXT: movswq (%rdi), %rax 3732; SSSE3-NEXT: movq %rax, %r10 3733; SSSE3-NEXT: movq %rax, %r8 3734; SSSE3-NEXT: movq %rax, %r9 3735; SSSE3-NEXT: movq %rax, %r11 3736; SSSE3-NEXT: movq %rax, %r14 3737; SSSE3-NEXT: movq %rax, %r15 3738; SSSE3-NEXT: movq %rax, %r12 3739; SSSE3-NEXT: movq %rax, %r13 3740; SSSE3-NEXT: movq %rax, %rdx 3741; SSSE3-NEXT: movq %rax, %rsi 3742; SSSE3-NEXT: movq %rax, %rcx 3743; SSSE3-NEXT: movq %rax, %rbp 3744; SSSE3-NEXT: movq %rax, %rbx 3745; SSSE3-NEXT: shrq $15, %rbx 3746; SSSE3-NEXT: movd %ebx, %xmm0 3747; SSSE3-NEXT: movq %rax, %rbx 3748; SSSE3-NEXT: shlq $49, %r10 3749; SSSE3-NEXT: sarq $63, %r10 3750; SSSE3-NEXT: movd %r10d, %xmm15 3751; SSSE3-NEXT: movq %rax, %r10 3752; SSSE3-NEXT: movsbq %al, %rax 3753; SSSE3-NEXT: punpcklbw {{.*#+}} xmm15 = xmm15[0],xmm0[0],xmm15[1],xmm0[1],xmm15[2],xmm0[2],xmm15[3],xmm0[3],xmm15[4],xmm0[4],xmm15[5],xmm0[5],xmm15[6],xmm0[6],xmm15[7],xmm0[7] 3754; SSSE3-NEXT: shlq $50, %r8 3755; SSSE3-NEXT: sarq $63, %r8 3756; SSSE3-NEXT: movd %r8d, %xmm8 3757; SSSE3-NEXT: shlq $51, %r9 3758; SSSE3-NEXT: sarq $63, %r9 3759; SSSE3-NEXT: movd %r9d, %xmm3 3760; SSSE3-NEXT: shlq $52, %r11 3761; SSSE3-NEXT: sarq $63, %r11 3762; SSSE3-NEXT: movd %r11d, %xmm9 3763; SSSE3-NEXT: shlq $53, %r14 3764; SSSE3-NEXT: sarq $63, %r14 3765; SSSE3-NEXT: movd %r14d, %xmm6 3766; SSSE3-NEXT: shlq $54, %r15 3767; SSSE3-NEXT: sarq $63, %r15 3768; SSSE3-NEXT: movd %r15d, %xmm10 3769; SSSE3-NEXT: shlq $55, %r12 3770; SSSE3-NEXT: sarq $63, %r12 3771; SSSE3-NEXT: movd %r12d, %xmm2 3772; SSSE3-NEXT: shlq $60, %r13 3773; SSSE3-NEXT: sarq $63, %r13 3774; SSSE3-NEXT: movd %r13d, %xmm11 3775; SSSE3-NEXT: shlq $61, %rdx 3776; SSSE3-NEXT: sarq $63, %rdx 3777; SSSE3-NEXT: movd %edx, %xmm5 3778; SSSE3-NEXT: shlq $62, %rsi 3779; SSSE3-NEXT: sarq $63, %rsi 3780; SSSE3-NEXT: movd %esi, %xmm12 3781; SSSE3-NEXT: shlq $63, %rcx 3782; SSSE3-NEXT: sarq $63, %rcx 3783; SSSE3-NEXT: movd %ecx, %xmm0 3784; SSSE3-NEXT: shlq $58, %rbp 3785; SSSE3-NEXT: sarq $63, %rbp 3786; SSSE3-NEXT: movd %ebp, %xmm13 3787; SSSE3-NEXT: shlq $59, %rbx 3788; SSSE3-NEXT: sarq $63, %rbx 3789; SSSE3-NEXT: movd %ebx, %xmm7 3790; SSSE3-NEXT: shlq $57, %r10 3791; SSSE3-NEXT: sarq $63, %r10 3792; SSSE3-NEXT: movd %r10d, %xmm4 3793; SSSE3-NEXT: shrq $7, %rax 3794; SSSE3-NEXT: movd %eax, %xmm14 3795; SSSE3-NEXT: movswq 2(%rdi), %rsi 3796; SSSE3-NEXT: movq %rsi, %r8 3797; SSSE3-NEXT: movq %rsi, %r9 3798; SSSE3-NEXT: movq %rsi, %r10 3799; SSSE3-NEXT: movq %rsi, %r11 3800; SSSE3-NEXT: movq %rsi, %r14 3801; SSSE3-NEXT: movq %rsi, %r15 3802; SSSE3-NEXT: movq %rsi, %r12 3803; SSSE3-NEXT: movq %rsi, %r13 3804; SSSE3-NEXT: movq %rsi, %rbx 3805; SSSE3-NEXT: movq %rsi, %rax 3806; SSSE3-NEXT: movq %rsi, %rcx 3807; SSSE3-NEXT: movq %rsi, %rdx 3808; SSSE3-NEXT: movq %rsi, %rdi 3809; SSSE3-NEXT: movq %rsi, %rbp 3810; SSSE3-NEXT: shrq $15, %rbp 3811; SSSE3-NEXT: movd %ebp, %xmm1 3812; SSSE3-NEXT: movq %rsi, %rbp 3813; SSSE3-NEXT: movsbq %sil, %rsi 3814; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm8[0],xmm3[1],xmm8[1],xmm3[2],xmm8[2],xmm3[3],xmm8[3],xmm3[4],xmm8[4],xmm3[5],xmm8[5],xmm3[6],xmm8[6],xmm3[7],xmm8[7] 3815; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm15[0],xmm3[1],xmm15[1],xmm3[2],xmm15[2],xmm3[3],xmm15[3] 3816; SSSE3-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm9[0],xmm6[1],xmm9[1],xmm6[2],xmm9[2],xmm6[3],xmm9[3],xmm6[4],xmm9[4],xmm6[5],xmm9[5],xmm6[6],xmm9[6],xmm6[7],xmm9[7] 3817; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm10[0],xmm2[1],xmm10[1],xmm2[2],xmm10[2],xmm2[3],xmm10[3],xmm2[4],xmm10[4],xmm2[5],xmm10[5],xmm2[6],xmm10[6],xmm2[7],xmm10[7] 3818; SSSE3-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3] 3819; SSSE3-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 3820; SSSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm11[0],xmm5[1],xmm11[1],xmm5[2],xmm11[2],xmm5[3],xmm11[3],xmm5[4],xmm11[4],xmm5[5],xmm11[5],xmm5[6],xmm11[6],xmm5[7],xmm11[7] 3821; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm12[0],xmm0[1],xmm12[1],xmm0[2],xmm12[2],xmm0[3],xmm12[3],xmm0[4],xmm12[4],xmm0[5],xmm12[5],xmm0[6],xmm12[6],xmm0[7],xmm12[7] 3822; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3] 3823; SSSE3-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm13[0],xmm7[1],xmm13[1],xmm7[2],xmm13[2],xmm7[3],xmm13[3],xmm7[4],xmm13[4],xmm7[5],xmm13[5],xmm7[6],xmm13[6],xmm7[7],xmm13[7] 3824; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm14[0],xmm4[1],xmm14[1],xmm4[2],xmm14[2],xmm4[3],xmm14[3],xmm4[4],xmm14[4],xmm4[5],xmm14[5],xmm4[6],xmm14[6],xmm4[7],xmm14[7] 3825; SSSE3-NEXT: shlq $49, %r8 3826; SSSE3-NEXT: sarq $63, %r8 3827; SSSE3-NEXT: movd %r8d, %xmm3 3828; SSSE3-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm4[0],xmm7[1],xmm4[1],xmm7[2],xmm4[2],xmm7[3],xmm4[3] 3829; SSSE3-NEXT: shlq $50, %r9 3830; SSSE3-NEXT: sarq $63, %r9 3831; SSSE3-NEXT: movd %r9d, %xmm4 3832; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm7[0],xmm0[1],xmm7[1] 3833; SSSE3-NEXT: shlq $51, %r10 3834; SSSE3-NEXT: sarq $63, %r10 3835; SSSE3-NEXT: movd %r10d, %xmm5 3836; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3837; SSSE3-NEXT: shlq $52, %r11 3838; SSSE3-NEXT: sarq $63, %r11 3839; SSSE3-NEXT: movd %r11d, %xmm2 3840; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7] 3841; SSSE3-NEXT: shlq $53, %r14 3842; SSSE3-NEXT: sarq $63, %r14 3843; SSSE3-NEXT: movd %r14d, %xmm1 3844; SSSE3-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7] 3845; SSSE3-NEXT: shlq $54, %r15 3846; SSSE3-NEXT: sarq $63, %r15 3847; SSSE3-NEXT: movd %r15d, %xmm4 3848; SSSE3-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3] 3849; SSSE3-NEXT: shlq $55, %r12 3850; SSSE3-NEXT: sarq $63, %r12 3851; SSSE3-NEXT: movd %r12d, %xmm3 3852; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 3853; SSSE3-NEXT: shlq $60, %r13 3854; SSSE3-NEXT: sarq $63, %r13 3855; SSSE3-NEXT: movd %r13d, %xmm2 3856; SSSE3-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 3857; SSSE3-NEXT: shlq $61, %rbx 3858; SSSE3-NEXT: sarq $63, %rbx 3859; SSSE3-NEXT: movd %ebx, %xmm4 3860; SSSE3-NEXT: punpcklwd {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3] 3861; SSSE3-NEXT: shlq $62, %rax 3862; SSSE3-NEXT: sarq $63, %rax 3863; SSSE3-NEXT: movd %eax, %xmm6 3864; SSSE3-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1] 3865; SSSE3-NEXT: shlq $63, %rcx 3866; SSSE3-NEXT: sarq $63, %rcx 3867; SSSE3-NEXT: movd %ecx, %xmm1 3868; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 3869; SSSE3-NEXT: shlq $58, %rdx 3870; SSSE3-NEXT: sarq $63, %rdx 3871; SSSE3-NEXT: movd %edx, %xmm2 3872; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3],xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7] 3873; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3] 3874; SSSE3-NEXT: shlq $59, %rdi 3875; SSSE3-NEXT: sarq $63, %rdi 3876; SSSE3-NEXT: movd %edi, %xmm4 3877; SSSE3-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 3878; SSSE3-NEXT: shlq $57, %rbp 3879; SSSE3-NEXT: sarq $63, %rbp 3880; SSSE3-NEXT: movd %ebp, %xmm2 3881; SSSE3-NEXT: shrq $7, %rsi 3882; SSSE3-NEXT: movd %esi, %xmm5 3883; SSSE3-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm5[0],xmm2[1],xmm5[1],xmm2[2],xmm5[2],xmm2[3],xmm5[3],xmm2[4],xmm5[4],xmm2[5],xmm5[5],xmm2[6],xmm5[6],xmm2[7],xmm5[7] 3884; SSSE3-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3] 3885; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1] 3886; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm3[0] 3887; SSSE3-NEXT: popq %rbx 3888; SSSE3-NEXT: popq %r12 3889; SSSE3-NEXT: popq %r13 3890; SSSE3-NEXT: popq %r14 3891; SSSE3-NEXT: popq %r15 3892; SSSE3-NEXT: popq %rbp 3893; SSSE3-NEXT: retq 3894; 3895; SSE41-LABEL: load_sext_32i1_to_32i8: 3896; SSE41: # BB#0: # %entry 3897; SSE41-NEXT: movswq (%rdi), %rax 3898; SSE41-NEXT: movq %rax, %rcx 3899; SSE41-NEXT: shlq $62, %rcx 3900; SSE41-NEXT: sarq $63, %rcx 3901; SSE41-NEXT: movq %rax, %rdx 3902; SSE41-NEXT: shlq $63, %rdx 3903; SSE41-NEXT: sarq $63, %rdx 3904; SSE41-NEXT: movd %edx, %xmm0 3905; SSE41-NEXT: pinsrb $1, %ecx, %xmm0 3906; SSE41-NEXT: movq %rax, %rcx 3907; SSE41-NEXT: shlq $61, %rcx 3908; SSE41-NEXT: sarq $63, %rcx 3909; SSE41-NEXT: pinsrb $2, %ecx, %xmm0 3910; SSE41-NEXT: movq %rax, %rcx 3911; SSE41-NEXT: shlq $60, %rcx 3912; SSE41-NEXT: sarq $63, %rcx 3913; SSE41-NEXT: pinsrb $3, %ecx, %xmm0 3914; SSE41-NEXT: movq %rax, %rcx 3915; SSE41-NEXT: shlq $59, %rcx 3916; SSE41-NEXT: sarq $63, %rcx 3917; SSE41-NEXT: pinsrb $4, %ecx, %xmm0 3918; SSE41-NEXT: movq %rax, %rcx 3919; SSE41-NEXT: shlq $58, %rcx 3920; SSE41-NEXT: sarq $63, %rcx 3921; SSE41-NEXT: pinsrb $5, %ecx, %xmm0 3922; SSE41-NEXT: movq %rax, %rcx 3923; SSE41-NEXT: shlq $57, %rcx 3924; SSE41-NEXT: sarq $63, %rcx 3925; SSE41-NEXT: pinsrb $6, %ecx, %xmm0 3926; SSE41-NEXT: movsbq %al, %rcx 3927; SSE41-NEXT: shrq $7, %rcx 3928; SSE41-NEXT: pinsrb $7, %ecx, %xmm0 3929; SSE41-NEXT: movq %rax, %rcx 3930; SSE41-NEXT: shlq $55, %rcx 3931; SSE41-NEXT: sarq $63, %rcx 3932; SSE41-NEXT: pinsrb $8, %ecx, %xmm0 3933; SSE41-NEXT: movq %rax, %rcx 3934; SSE41-NEXT: shlq $54, %rcx 3935; SSE41-NEXT: sarq $63, %rcx 3936; SSE41-NEXT: pinsrb $9, %ecx, %xmm0 3937; SSE41-NEXT: movq %rax, %rcx 3938; SSE41-NEXT: shlq $53, %rcx 3939; SSE41-NEXT: sarq $63, %rcx 3940; SSE41-NEXT: pinsrb $10, %ecx, %xmm0 3941; SSE41-NEXT: movq %rax, %rcx 3942; SSE41-NEXT: shlq $52, %rcx 3943; SSE41-NEXT: sarq $63, %rcx 3944; SSE41-NEXT: pinsrb $11, %ecx, %xmm0 3945; SSE41-NEXT: movq %rax, %rcx 3946; SSE41-NEXT: shlq $51, %rcx 3947; SSE41-NEXT: sarq $63, %rcx 3948; SSE41-NEXT: pinsrb $12, %ecx, %xmm0 3949; SSE41-NEXT: movq %rax, %rcx 3950; SSE41-NEXT: shlq $50, %rcx 3951; SSE41-NEXT: sarq $63, %rcx 3952; SSE41-NEXT: pinsrb $13, %ecx, %xmm0 3953; SSE41-NEXT: movq %rax, %rcx 3954; SSE41-NEXT: shlq $49, %rcx 3955; SSE41-NEXT: sarq $63, %rcx 3956; SSE41-NEXT: pinsrb $14, %ecx, %xmm0 3957; SSE41-NEXT: shrq $15, %rax 3958; SSE41-NEXT: pinsrb $15, %eax, %xmm0 3959; SSE41-NEXT: movswq 2(%rdi), %rax 3960; SSE41-NEXT: movq %rax, %rcx 3961; SSE41-NEXT: shlq $62, %rcx 3962; SSE41-NEXT: sarq $63, %rcx 3963; SSE41-NEXT: movq %rax, %rdx 3964; SSE41-NEXT: shlq $63, %rdx 3965; SSE41-NEXT: sarq $63, %rdx 3966; SSE41-NEXT: movd %edx, %xmm1 3967; SSE41-NEXT: pinsrb $1, %ecx, %xmm1 3968; SSE41-NEXT: movq %rax, %rcx 3969; SSE41-NEXT: shlq $61, %rcx 3970; SSE41-NEXT: sarq $63, %rcx 3971; SSE41-NEXT: pinsrb $2, %ecx, %xmm1 3972; SSE41-NEXT: movq %rax, %rcx 3973; SSE41-NEXT: shlq $60, %rcx 3974; SSE41-NEXT: sarq $63, %rcx 3975; SSE41-NEXT: pinsrb $3, %ecx, %xmm1 3976; SSE41-NEXT: movq %rax, %rcx 3977; SSE41-NEXT: shlq $59, %rcx 3978; SSE41-NEXT: sarq $63, %rcx 3979; SSE41-NEXT: pinsrb $4, %ecx, %xmm1 3980; SSE41-NEXT: movq %rax, %rcx 3981; SSE41-NEXT: shlq $58, %rcx 3982; SSE41-NEXT: sarq $63, %rcx 3983; SSE41-NEXT: pinsrb $5, %ecx, %xmm1 3984; SSE41-NEXT: movq %rax, %rcx 3985; SSE41-NEXT: shlq $57, %rcx 3986; SSE41-NEXT: sarq $63, %rcx 3987; SSE41-NEXT: pinsrb $6, %ecx, %xmm1 3988; SSE41-NEXT: movsbq %al, %rcx 3989; SSE41-NEXT: shrq $7, %rcx 3990; SSE41-NEXT: pinsrb $7, %ecx, %xmm1 3991; SSE41-NEXT: movq %rax, %rcx 3992; SSE41-NEXT: shlq $55, %rcx 3993; SSE41-NEXT: sarq $63, %rcx 3994; SSE41-NEXT: pinsrb $8, %ecx, %xmm1 3995; SSE41-NEXT: movq %rax, %rcx 3996; SSE41-NEXT: shlq $54, %rcx 3997; SSE41-NEXT: sarq $63, %rcx 3998; SSE41-NEXT: pinsrb $9, %ecx, %xmm1 3999; SSE41-NEXT: movq %rax, %rcx 4000; SSE41-NEXT: shlq $53, %rcx 4001; SSE41-NEXT: sarq $63, %rcx 4002; SSE41-NEXT: pinsrb $10, %ecx, %xmm1 4003; SSE41-NEXT: movq %rax, %rcx 4004; SSE41-NEXT: shlq $52, %rcx 4005; SSE41-NEXT: sarq $63, %rcx 4006; SSE41-NEXT: pinsrb $11, %ecx, %xmm1 4007; SSE41-NEXT: movq %rax, %rcx 4008; SSE41-NEXT: shlq $51, %rcx 4009; SSE41-NEXT: sarq $63, %rcx 4010; SSE41-NEXT: pinsrb $12, %ecx, %xmm1 4011; SSE41-NEXT: movq %rax, %rcx 4012; SSE41-NEXT: shlq $50, %rcx 4013; SSE41-NEXT: sarq $63, %rcx 4014; SSE41-NEXT: pinsrb $13, %ecx, %xmm1 4015; SSE41-NEXT: movq %rax, %rcx 4016; SSE41-NEXT: shlq $49, %rcx 4017; SSE41-NEXT: sarq $63, %rcx 4018; SSE41-NEXT: pinsrb $14, %ecx, %xmm1 4019; SSE41-NEXT: shrq $15, %rax 4020; SSE41-NEXT: pinsrb $15, %eax, %xmm1 4021; SSE41-NEXT: retq 4022; 4023; AVX1-LABEL: load_sext_32i1_to_32i8: 4024; AVX1: # BB#0: # %entry 4025; AVX1-NEXT: pushq %rbp 4026; AVX1-NEXT: pushq %r15 4027; AVX1-NEXT: pushq %r14 4028; AVX1-NEXT: pushq %r13 4029; AVX1-NEXT: pushq %r12 4030; AVX1-NEXT: pushq %rbx 4031; AVX1-NEXT: movslq (%rdi), %rax 4032; AVX1-NEXT: movq %rax, %rcx 4033; AVX1-NEXT: shlq $47, %rcx 4034; AVX1-NEXT: sarq $63, %rcx 4035; AVX1-NEXT: vmovd %ecx, %xmm0 4036; AVX1-NEXT: movq %rax, %r8 4037; AVX1-NEXT: movq %rax, %rdx 4038; AVX1-NEXT: movq %rax, %rcx 4039; AVX1-NEXT: movq %rax, %rdi 4040; AVX1-NEXT: movq %rax, %r13 4041; AVX1-NEXT: movq %rax, %rsi 4042; AVX1-NEXT: movq %rax, %r10 4043; AVX1-NEXT: movq %rax, %r11 4044; AVX1-NEXT: movq %rax, %r9 4045; AVX1-NEXT: movq %rax, %rbx 4046; AVX1-NEXT: movq %rax, %r14 4047; AVX1-NEXT: movq %rax, %r15 4048; AVX1-NEXT: movq %rax, %r12 4049; AVX1-NEXT: movq %rax, %rbp 4050; AVX1-NEXT: shlq $46, %rbp 4051; AVX1-NEXT: sarq $63, %rbp 4052; AVX1-NEXT: vpinsrb $1, %ebp, %xmm0, %xmm0 4053; AVX1-NEXT: movq %rax, %rbp 4054; AVX1-NEXT: shlq $45, %r8 4055; AVX1-NEXT: sarq $63, %r8 4056; AVX1-NEXT: vpinsrb $2, %r8d, %xmm0, %xmm0 4057; AVX1-NEXT: movq %rax, %r8 4058; AVX1-NEXT: shlq $44, %rdx 4059; AVX1-NEXT: sarq $63, %rdx 4060; AVX1-NEXT: vpinsrb $3, %edx, %xmm0, %xmm0 4061; AVX1-NEXT: movq %rax, %rdx 4062; AVX1-NEXT: shlq $43, %rcx 4063; AVX1-NEXT: sarq $63, %rcx 4064; AVX1-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 4065; AVX1-NEXT: movq %rax, %rcx 4066; AVX1-NEXT: shlq $42, %rdi 4067; AVX1-NEXT: sarq $63, %rdi 4068; AVX1-NEXT: vpinsrb $5, %edi, %xmm0, %xmm0 4069; AVX1-NEXT: movq %rax, %rdi 4070; AVX1-NEXT: shlq $41, %r13 4071; AVX1-NEXT: sarq $63, %r13 4072; AVX1-NEXT: vpinsrb $6, %r13d, %xmm0, %xmm0 4073; AVX1-NEXT: movq %rax, %r13 4074; AVX1-NEXT: shlq $40, %rsi 4075; AVX1-NEXT: sarq $63, %rsi 4076; AVX1-NEXT: vpinsrb $7, %esi, %xmm0, %xmm0 4077; AVX1-NEXT: movq %rax, %rsi 4078; AVX1-NEXT: shlq $39, %r10 4079; AVX1-NEXT: sarq $63, %r10 4080; AVX1-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0 4081; AVX1-NEXT: movq %rax, %r10 4082; AVX1-NEXT: shlq $38, %r11 4083; AVX1-NEXT: sarq $63, %r11 4084; AVX1-NEXT: vpinsrb $9, %r11d, %xmm0, %xmm0 4085; AVX1-NEXT: movsbq %al, %r11 4086; AVX1-NEXT: shlq $37, %r9 4087; AVX1-NEXT: sarq $63, %r9 4088; AVX1-NEXT: vpinsrb $10, %r9d, %xmm0, %xmm0 4089; AVX1-NEXT: movq %rax, %r9 4090; AVX1-NEXT: shlq $36, %rbx 4091; AVX1-NEXT: sarq $63, %rbx 4092; AVX1-NEXT: vpinsrb $11, %ebx, %xmm0, %xmm0 4093; AVX1-NEXT: movq %rax, %rbx 4094; AVX1-NEXT: shlq $35, %r14 4095; AVX1-NEXT: sarq $63, %r14 4096; AVX1-NEXT: vpinsrb $12, %r14d, %xmm0, %xmm0 4097; AVX1-NEXT: movq %rax, %r14 4098; AVX1-NEXT: shlq $34, %r15 4099; AVX1-NEXT: sarq $63, %r15 4100; AVX1-NEXT: vpinsrb $13, %r15d, %xmm0, %xmm0 4101; AVX1-NEXT: movq %rax, %r15 4102; AVX1-NEXT: shlq $33, %r12 4103; AVX1-NEXT: sarq $63, %r12 4104; AVX1-NEXT: vpinsrb $14, %r12d, %xmm0, %xmm0 4105; AVX1-NEXT: movq %rax, %r12 4106; AVX1-NEXT: shrq $31, %rbp 4107; AVX1-NEXT: vpinsrb $15, %ebp, %xmm0, %xmm0 4108; AVX1-NEXT: movq %rax, %rbp 4109; AVX1-NEXT: shlq $63, %rdx 4110; AVX1-NEXT: sarq $63, %rdx 4111; AVX1-NEXT: vmovd %edx, %xmm1 4112; AVX1-NEXT: movq %rax, %rdx 4113; AVX1-NEXT: movswq %ax, %rax 4114; AVX1-NEXT: shlq $62, %r8 4115; AVX1-NEXT: sarq $63, %r8 4116; AVX1-NEXT: vpinsrb $1, %r8d, %xmm1, %xmm1 4117; AVX1-NEXT: shlq $61, %rcx 4118; AVX1-NEXT: sarq $63, %rcx 4119; AVX1-NEXT: vpinsrb $2, %ecx, %xmm1, %xmm1 4120; AVX1-NEXT: shlq $60, %rdi 4121; AVX1-NEXT: sarq $63, %rdi 4122; AVX1-NEXT: vpinsrb $3, %edi, %xmm1, %xmm1 4123; AVX1-NEXT: shlq $59, %r13 4124; AVX1-NEXT: sarq $63, %r13 4125; AVX1-NEXT: vpinsrb $4, %r13d, %xmm1, %xmm1 4126; AVX1-NEXT: shlq $58, %rsi 4127; AVX1-NEXT: sarq $63, %rsi 4128; AVX1-NEXT: vpinsrb $5, %esi, %xmm1, %xmm1 4129; AVX1-NEXT: shlq $57, %r10 4130; AVX1-NEXT: sarq $63, %r10 4131; AVX1-NEXT: vpinsrb $6, %r10d, %xmm1, %xmm1 4132; AVX1-NEXT: shrq $7, %r11 4133; AVX1-NEXT: vpinsrb $7, %r11d, %xmm1, %xmm1 4134; AVX1-NEXT: shlq $55, %r9 4135; AVX1-NEXT: sarq $63, %r9 4136; AVX1-NEXT: vpinsrb $8, %r9d, %xmm1, %xmm1 4137; AVX1-NEXT: shlq $54, %rbx 4138; AVX1-NEXT: sarq $63, %rbx 4139; AVX1-NEXT: vpinsrb $9, %ebx, %xmm1, %xmm1 4140; AVX1-NEXT: shlq $53, %r14 4141; AVX1-NEXT: sarq $63, %r14 4142; AVX1-NEXT: vpinsrb $10, %r14d, %xmm1, %xmm1 4143; AVX1-NEXT: shlq $52, %r15 4144; AVX1-NEXT: sarq $63, %r15 4145; AVX1-NEXT: vpinsrb $11, %r15d, %xmm1, %xmm1 4146; AVX1-NEXT: shlq $51, %r12 4147; AVX1-NEXT: sarq $63, %r12 4148; AVX1-NEXT: vpinsrb $12, %r12d, %xmm1, %xmm1 4149; AVX1-NEXT: shlq $50, %rbp 4150; AVX1-NEXT: sarq $63, %rbp 4151; AVX1-NEXT: vpinsrb $13, %ebp, %xmm1, %xmm1 4152; AVX1-NEXT: shlq $49, %rdx 4153; AVX1-NEXT: sarq $63, %rdx 4154; AVX1-NEXT: vpinsrb $14, %edx, %xmm1, %xmm1 4155; AVX1-NEXT: shrq $15, %rax 4156; AVX1-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 4157; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4158; AVX1-NEXT: popq %rbx 4159; AVX1-NEXT: popq %r12 4160; AVX1-NEXT: popq %r13 4161; AVX1-NEXT: popq %r14 4162; AVX1-NEXT: popq %r15 4163; AVX1-NEXT: popq %rbp 4164; AVX1-NEXT: retq 4165; 4166; AVX2-LABEL: load_sext_32i1_to_32i8: 4167; AVX2: # BB#0: # %entry 4168; AVX2-NEXT: pushq %rbp 4169; AVX2-NEXT: pushq %r15 4170; AVX2-NEXT: pushq %r14 4171; AVX2-NEXT: pushq %r13 4172; AVX2-NEXT: pushq %r12 4173; AVX2-NEXT: pushq %rbx 4174; AVX2-NEXT: movslq (%rdi), %rax 4175; AVX2-NEXT: movq %rax, %rcx 4176; AVX2-NEXT: shlq $47, %rcx 4177; AVX2-NEXT: sarq $63, %rcx 4178; AVX2-NEXT: vmovd %ecx, %xmm0 4179; AVX2-NEXT: movq %rax, %r8 4180; AVX2-NEXT: movq %rax, %rdx 4181; AVX2-NEXT: movq %rax, %rcx 4182; AVX2-NEXT: movq %rax, %rdi 4183; AVX2-NEXT: movq %rax, %r13 4184; AVX2-NEXT: movq %rax, %rsi 4185; AVX2-NEXT: movq %rax, %r10 4186; AVX2-NEXT: movq %rax, %r11 4187; AVX2-NEXT: movq %rax, %r9 4188; AVX2-NEXT: movq %rax, %rbx 4189; AVX2-NEXT: movq %rax, %r14 4190; AVX2-NEXT: movq %rax, %r15 4191; AVX2-NEXT: movq %rax, %r12 4192; AVX2-NEXT: movq %rax, %rbp 4193; AVX2-NEXT: shlq $46, %rbp 4194; AVX2-NEXT: sarq $63, %rbp 4195; AVX2-NEXT: vpinsrb $1, %ebp, %xmm0, %xmm0 4196; AVX2-NEXT: movq %rax, %rbp 4197; AVX2-NEXT: shlq $45, %r8 4198; AVX2-NEXT: sarq $63, %r8 4199; AVX2-NEXT: vpinsrb $2, %r8d, %xmm0, %xmm0 4200; AVX2-NEXT: movq %rax, %r8 4201; AVX2-NEXT: shlq $44, %rdx 4202; AVX2-NEXT: sarq $63, %rdx 4203; AVX2-NEXT: vpinsrb $3, %edx, %xmm0, %xmm0 4204; AVX2-NEXT: movq %rax, %rdx 4205; AVX2-NEXT: shlq $43, %rcx 4206; AVX2-NEXT: sarq $63, %rcx 4207; AVX2-NEXT: vpinsrb $4, %ecx, %xmm0, %xmm0 4208; AVX2-NEXT: movq %rax, %rcx 4209; AVX2-NEXT: shlq $42, %rdi 4210; AVX2-NEXT: sarq $63, %rdi 4211; AVX2-NEXT: vpinsrb $5, %edi, %xmm0, %xmm0 4212; AVX2-NEXT: movq %rax, %rdi 4213; AVX2-NEXT: shlq $41, %r13 4214; AVX2-NEXT: sarq $63, %r13 4215; AVX2-NEXT: vpinsrb $6, %r13d, %xmm0, %xmm0 4216; AVX2-NEXT: movq %rax, %r13 4217; AVX2-NEXT: shlq $40, %rsi 4218; AVX2-NEXT: sarq $63, %rsi 4219; AVX2-NEXT: vpinsrb $7, %esi, %xmm0, %xmm0 4220; AVX2-NEXT: movq %rax, %rsi 4221; AVX2-NEXT: shlq $39, %r10 4222; AVX2-NEXT: sarq $63, %r10 4223; AVX2-NEXT: vpinsrb $8, %r10d, %xmm0, %xmm0 4224; AVX2-NEXT: movq %rax, %r10 4225; AVX2-NEXT: shlq $38, %r11 4226; AVX2-NEXT: sarq $63, %r11 4227; AVX2-NEXT: vpinsrb $9, %r11d, %xmm0, %xmm0 4228; AVX2-NEXT: movsbq %al, %r11 4229; AVX2-NEXT: shlq $37, %r9 4230; AVX2-NEXT: sarq $63, %r9 4231; AVX2-NEXT: vpinsrb $10, %r9d, %xmm0, %xmm0 4232; AVX2-NEXT: movq %rax, %r9 4233; AVX2-NEXT: shlq $36, %rbx 4234; AVX2-NEXT: sarq $63, %rbx 4235; AVX2-NEXT: vpinsrb $11, %ebx, %xmm0, %xmm0 4236; AVX2-NEXT: movq %rax, %rbx 4237; AVX2-NEXT: shlq $35, %r14 4238; AVX2-NEXT: sarq $63, %r14 4239; AVX2-NEXT: vpinsrb $12, %r14d, %xmm0, %xmm0 4240; AVX2-NEXT: movq %rax, %r14 4241; AVX2-NEXT: shlq $34, %r15 4242; AVX2-NEXT: sarq $63, %r15 4243; AVX2-NEXT: vpinsrb $13, %r15d, %xmm0, %xmm0 4244; AVX2-NEXT: movq %rax, %r15 4245; AVX2-NEXT: shlq $33, %r12 4246; AVX2-NEXT: sarq $63, %r12 4247; AVX2-NEXT: vpinsrb $14, %r12d, %xmm0, %xmm0 4248; AVX2-NEXT: movq %rax, %r12 4249; AVX2-NEXT: shrq $31, %rbp 4250; AVX2-NEXT: vpinsrb $15, %ebp, %xmm0, %xmm0 4251; AVX2-NEXT: movq %rax, %rbp 4252; AVX2-NEXT: shlq $63, %rdx 4253; AVX2-NEXT: sarq $63, %rdx 4254; AVX2-NEXT: vmovd %edx, %xmm1 4255; AVX2-NEXT: movq %rax, %rdx 4256; AVX2-NEXT: movswq %ax, %rax 4257; AVX2-NEXT: shlq $62, %r8 4258; AVX2-NEXT: sarq $63, %r8 4259; AVX2-NEXT: vpinsrb $1, %r8d, %xmm1, %xmm1 4260; AVX2-NEXT: shlq $61, %rcx 4261; AVX2-NEXT: sarq $63, %rcx 4262; AVX2-NEXT: vpinsrb $2, %ecx, %xmm1, %xmm1 4263; AVX2-NEXT: shlq $60, %rdi 4264; AVX2-NEXT: sarq $63, %rdi 4265; AVX2-NEXT: vpinsrb $3, %edi, %xmm1, %xmm1 4266; AVX2-NEXT: shlq $59, %r13 4267; AVX2-NEXT: sarq $63, %r13 4268; AVX2-NEXT: vpinsrb $4, %r13d, %xmm1, %xmm1 4269; AVX2-NEXT: shlq $58, %rsi 4270; AVX2-NEXT: sarq $63, %rsi 4271; AVX2-NEXT: vpinsrb $5, %esi, %xmm1, %xmm1 4272; AVX2-NEXT: shlq $57, %r10 4273; AVX2-NEXT: sarq $63, %r10 4274; AVX2-NEXT: vpinsrb $6, %r10d, %xmm1, %xmm1 4275; AVX2-NEXT: shrq $7, %r11 4276; AVX2-NEXT: vpinsrb $7, %r11d, %xmm1, %xmm1 4277; AVX2-NEXT: shlq $55, %r9 4278; AVX2-NEXT: sarq $63, %r9 4279; AVX2-NEXT: vpinsrb $8, %r9d, %xmm1, %xmm1 4280; AVX2-NEXT: shlq $54, %rbx 4281; AVX2-NEXT: sarq $63, %rbx 4282; AVX2-NEXT: vpinsrb $9, %ebx, %xmm1, %xmm1 4283; AVX2-NEXT: shlq $53, %r14 4284; AVX2-NEXT: sarq $63, %r14 4285; AVX2-NEXT: vpinsrb $10, %r14d, %xmm1, %xmm1 4286; AVX2-NEXT: shlq $52, %r15 4287; AVX2-NEXT: sarq $63, %r15 4288; AVX2-NEXT: vpinsrb $11, %r15d, %xmm1, %xmm1 4289; AVX2-NEXT: shlq $51, %r12 4290; AVX2-NEXT: sarq $63, %r12 4291; AVX2-NEXT: vpinsrb $12, %r12d, %xmm1, %xmm1 4292; AVX2-NEXT: shlq $50, %rbp 4293; AVX2-NEXT: sarq $63, %rbp 4294; AVX2-NEXT: vpinsrb $13, %ebp, %xmm1, %xmm1 4295; AVX2-NEXT: shlq $49, %rdx 4296; AVX2-NEXT: sarq $63, %rdx 4297; AVX2-NEXT: vpinsrb $14, %edx, %xmm1, %xmm1 4298; AVX2-NEXT: shrq $15, %rax 4299; AVX2-NEXT: vpinsrb $15, %eax, %xmm1, %xmm1 4300; AVX2-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0 4301; AVX2-NEXT: popq %rbx 4302; AVX2-NEXT: popq %r12 4303; AVX2-NEXT: popq %r13 4304; AVX2-NEXT: popq %r14 4305; AVX2-NEXT: popq %r15 4306; AVX2-NEXT: popq %rbp 4307; AVX2-NEXT: retq 4308; 4309; AVX512F-LABEL: load_sext_32i1_to_32i8: 4310; AVX512F: # BB#0: # %entry 4311; AVX512F-NEXT: kmovw (%rdi), %k1 4312; AVX512F-NEXT: kmovw 2(%rdi), %k2 4313; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 4314; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 4315; AVX512F-NEXT: vpternlogd $255, %zmm1, %zmm1, %zmm1 {%k2} {z} 4316; AVX512F-NEXT: vpmovdb %zmm1, %xmm1 4317; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 4318; AVX512F-NEXT: retq 4319; 4320; AVX512BW-LABEL: load_sext_32i1_to_32i8: 4321; AVX512BW: # BB#0: # %entry 4322; AVX512BW-NEXT: kmovd (%rdi), %k0 4323; AVX512BW-NEXT: vpmovm2b %k0, %zmm0 4324; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 4325; AVX512BW-NEXT: retq 4326; 4327; X32-SSE41-LABEL: load_sext_32i1_to_32i8: 4328; X32-SSE41: # BB#0: # %entry 4329; X32-SSE41-NEXT: pushl %esi 4330; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4331; X32-SSE41-NEXT: movswl (%eax), %ecx 4332; X32-SSE41-NEXT: movl %ecx, %edx 4333; X32-SSE41-NEXT: shll $30, %edx 4334; X32-SSE41-NEXT: sarl $31, %edx 4335; X32-SSE41-NEXT: movl %ecx, %esi 4336; X32-SSE41-NEXT: shll $31, %esi 4337; X32-SSE41-NEXT: sarl $31, %esi 4338; X32-SSE41-NEXT: movd %esi, %xmm0 4339; X32-SSE41-NEXT: pinsrb $1, %edx, %xmm0 4340; X32-SSE41-NEXT: movl %ecx, %edx 4341; X32-SSE41-NEXT: shll $29, %edx 4342; X32-SSE41-NEXT: sarl $31, %edx 4343; X32-SSE41-NEXT: pinsrb $2, %edx, %xmm0 4344; X32-SSE41-NEXT: movl %ecx, %edx 4345; X32-SSE41-NEXT: shll $28, %edx 4346; X32-SSE41-NEXT: sarl $31, %edx 4347; X32-SSE41-NEXT: pinsrb $3, %edx, %xmm0 4348; X32-SSE41-NEXT: movl %ecx, %edx 4349; X32-SSE41-NEXT: shll $27, %edx 4350; X32-SSE41-NEXT: sarl $31, %edx 4351; X32-SSE41-NEXT: pinsrb $4, %edx, %xmm0 4352; X32-SSE41-NEXT: movl %ecx, %edx 4353; X32-SSE41-NEXT: shll $26, %edx 4354; X32-SSE41-NEXT: sarl $31, %edx 4355; X32-SSE41-NEXT: pinsrb $5, %edx, %xmm0 4356; X32-SSE41-NEXT: movl %ecx, %edx 4357; X32-SSE41-NEXT: shll $25, %edx 4358; X32-SSE41-NEXT: sarl $31, %edx 4359; X32-SSE41-NEXT: pinsrb $6, %edx, %xmm0 4360; X32-SSE41-NEXT: movsbl %cl, %edx 4361; X32-SSE41-NEXT: shrl $7, %edx 4362; X32-SSE41-NEXT: pinsrb $7, %edx, %xmm0 4363; X32-SSE41-NEXT: movl %ecx, %edx 4364; X32-SSE41-NEXT: shll $23, %edx 4365; X32-SSE41-NEXT: sarl $31, %edx 4366; X32-SSE41-NEXT: pinsrb $8, %edx, %xmm0 4367; X32-SSE41-NEXT: movl %ecx, %edx 4368; X32-SSE41-NEXT: shll $22, %edx 4369; X32-SSE41-NEXT: sarl $31, %edx 4370; X32-SSE41-NEXT: pinsrb $9, %edx, %xmm0 4371; X32-SSE41-NEXT: movl %ecx, %edx 4372; X32-SSE41-NEXT: shll $21, %edx 4373; X32-SSE41-NEXT: sarl $31, %edx 4374; X32-SSE41-NEXT: pinsrb $10, %edx, %xmm0 4375; X32-SSE41-NEXT: movl %ecx, %edx 4376; X32-SSE41-NEXT: shll $20, %edx 4377; X32-SSE41-NEXT: sarl $31, %edx 4378; X32-SSE41-NEXT: pinsrb $11, %edx, %xmm0 4379; X32-SSE41-NEXT: movl %ecx, %edx 4380; X32-SSE41-NEXT: shll $19, %edx 4381; X32-SSE41-NEXT: sarl $31, %edx 4382; X32-SSE41-NEXT: pinsrb $12, %edx, %xmm0 4383; X32-SSE41-NEXT: movl %ecx, %edx 4384; X32-SSE41-NEXT: shll $18, %edx 4385; X32-SSE41-NEXT: sarl $31, %edx 4386; X32-SSE41-NEXT: pinsrb $13, %edx, %xmm0 4387; X32-SSE41-NEXT: movl %ecx, %edx 4388; X32-SSE41-NEXT: shll $17, %edx 4389; X32-SSE41-NEXT: sarl $31, %edx 4390; X32-SSE41-NEXT: pinsrb $14, %edx, %xmm0 4391; X32-SSE41-NEXT: shrl $15, %ecx 4392; X32-SSE41-NEXT: pinsrb $15, %ecx, %xmm0 4393; X32-SSE41-NEXT: movswl 2(%eax), %eax 4394; X32-SSE41-NEXT: movl %eax, %ecx 4395; X32-SSE41-NEXT: shll $30, %ecx 4396; X32-SSE41-NEXT: sarl $31, %ecx 4397; X32-SSE41-NEXT: movl %eax, %edx 4398; X32-SSE41-NEXT: shll $31, %edx 4399; X32-SSE41-NEXT: sarl $31, %edx 4400; X32-SSE41-NEXT: movd %edx, %xmm1 4401; X32-SSE41-NEXT: pinsrb $1, %ecx, %xmm1 4402; X32-SSE41-NEXT: movl %eax, %ecx 4403; X32-SSE41-NEXT: shll $29, %ecx 4404; X32-SSE41-NEXT: sarl $31, %ecx 4405; X32-SSE41-NEXT: pinsrb $2, %ecx, %xmm1 4406; X32-SSE41-NEXT: movl %eax, %ecx 4407; X32-SSE41-NEXT: shll $28, %ecx 4408; X32-SSE41-NEXT: sarl $31, %ecx 4409; X32-SSE41-NEXT: pinsrb $3, %ecx, %xmm1 4410; X32-SSE41-NEXT: movl %eax, %ecx 4411; X32-SSE41-NEXT: shll $27, %ecx 4412; X32-SSE41-NEXT: sarl $31, %ecx 4413; X32-SSE41-NEXT: pinsrb $4, %ecx, %xmm1 4414; X32-SSE41-NEXT: movl %eax, %ecx 4415; X32-SSE41-NEXT: shll $26, %ecx 4416; X32-SSE41-NEXT: sarl $31, %ecx 4417; X32-SSE41-NEXT: pinsrb $5, %ecx, %xmm1 4418; X32-SSE41-NEXT: movl %eax, %ecx 4419; X32-SSE41-NEXT: shll $25, %ecx 4420; X32-SSE41-NEXT: sarl $31, %ecx 4421; X32-SSE41-NEXT: pinsrb $6, %ecx, %xmm1 4422; X32-SSE41-NEXT: movsbl %al, %ecx 4423; X32-SSE41-NEXT: shrl $7, %ecx 4424; X32-SSE41-NEXT: pinsrb $7, %ecx, %xmm1 4425; X32-SSE41-NEXT: movl %eax, %ecx 4426; X32-SSE41-NEXT: shll $23, %ecx 4427; X32-SSE41-NEXT: sarl $31, %ecx 4428; X32-SSE41-NEXT: pinsrb $8, %ecx, %xmm1 4429; X32-SSE41-NEXT: movl %eax, %ecx 4430; X32-SSE41-NEXT: shll $22, %ecx 4431; X32-SSE41-NEXT: sarl $31, %ecx 4432; X32-SSE41-NEXT: pinsrb $9, %ecx, %xmm1 4433; X32-SSE41-NEXT: movl %eax, %ecx 4434; X32-SSE41-NEXT: shll $21, %ecx 4435; X32-SSE41-NEXT: sarl $31, %ecx 4436; X32-SSE41-NEXT: pinsrb $10, %ecx, %xmm1 4437; X32-SSE41-NEXT: movl %eax, %ecx 4438; X32-SSE41-NEXT: shll $20, %ecx 4439; X32-SSE41-NEXT: sarl $31, %ecx 4440; X32-SSE41-NEXT: pinsrb $11, %ecx, %xmm1 4441; X32-SSE41-NEXT: movl %eax, %ecx 4442; X32-SSE41-NEXT: shll $19, %ecx 4443; X32-SSE41-NEXT: sarl $31, %ecx 4444; X32-SSE41-NEXT: pinsrb $12, %ecx, %xmm1 4445; X32-SSE41-NEXT: movl %eax, %ecx 4446; X32-SSE41-NEXT: shll $18, %ecx 4447; X32-SSE41-NEXT: sarl $31, %ecx 4448; X32-SSE41-NEXT: pinsrb $13, %ecx, %xmm1 4449; X32-SSE41-NEXT: movl %eax, %ecx 4450; X32-SSE41-NEXT: shll $17, %ecx 4451; X32-SSE41-NEXT: sarl $31, %ecx 4452; X32-SSE41-NEXT: pinsrb $14, %ecx, %xmm1 4453; X32-SSE41-NEXT: shrl $15, %eax 4454; X32-SSE41-NEXT: pinsrb $15, %eax, %xmm1 4455; X32-SSE41-NEXT: popl %esi 4456; X32-SSE41-NEXT: retl 4457entry: 4458 %X = load <32 x i1>, <32 x i1>* %ptr 4459 %Y = sext <32 x i1> %X to <32 x i8> 4460 ret <32 x i8> %Y 4461} 4462 4463define <16 x i16> @load_sext_16i8_to_16i16(<16 x i8> *%ptr) { 4464; SSE2-LABEL: load_sext_16i8_to_16i16: 4465; SSE2: # BB#0: # %entry 4466; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4467; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4468; SSE2-NEXT: psraw $8, %xmm0 4469; SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4470; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4471; SSE2-NEXT: psraw $8, %xmm1 4472; SSE2-NEXT: retq 4473; 4474; SSSE3-LABEL: load_sext_16i8_to_16i16: 4475; SSSE3: # BB#0: # %entry 4476; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4477; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4478; SSSE3-NEXT: psraw $8, %xmm0 4479; SSSE3-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4480; SSSE3-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4481; SSSE3-NEXT: psraw $8, %xmm1 4482; SSSE3-NEXT: retq 4483; 4484; SSE41-LABEL: load_sext_16i8_to_16i16: 4485; SSE41: # BB#0: # %entry 4486; SSE41-NEXT: pmovsxbw (%rdi), %xmm0 4487; SSE41-NEXT: pmovsxbw 8(%rdi), %xmm1 4488; SSE41-NEXT: retq 4489; 4490; AVX1-LABEL: load_sext_16i8_to_16i16: 4491; AVX1: # BB#0: # %entry 4492; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0 4493; AVX1-NEXT: vpmovsxbw 8(%rdi), %xmm1 4494; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4495; AVX1-NEXT: retq 4496; 4497; AVX2-LABEL: load_sext_16i8_to_16i16: 4498; AVX2: # BB#0: # %entry 4499; AVX2-NEXT: vpmovsxbw (%rdi), %ymm0 4500; AVX2-NEXT: retq 4501; 4502; AVX512-LABEL: load_sext_16i8_to_16i16: 4503; AVX512: # BB#0: # %entry 4504; AVX512-NEXT: vpmovsxbw (%rdi), %ymm0 4505; AVX512-NEXT: retq 4506; 4507; X32-SSE41-LABEL: load_sext_16i8_to_16i16: 4508; X32-SSE41: # BB#0: # %entry 4509; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4510; X32-SSE41-NEXT: pmovsxbw (%eax), %xmm0 4511; X32-SSE41-NEXT: pmovsxbw 8(%eax), %xmm1 4512; X32-SSE41-NEXT: retl 4513entry: 4514 %X = load <16 x i8>, <16 x i8>* %ptr 4515 %Y = sext <16 x i8> %X to <16 x i16> 4516 ret <16 x i16> %Y 4517} 4518 4519define <2 x i64> @load_sext_2i16_to_2i64(<2 x i16> *%ptr) { 4520; SSE2-LABEL: load_sext_2i16_to_2i64: 4521; SSE2: # BB#0: # %entry 4522; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 4523; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,1,4,5,6,7] 4524; SSE2-NEXT: movdqa %xmm0, %xmm1 4525; SSE2-NEXT: psrad $31, %xmm1 4526; SSE2-NEXT: psrad $16, %xmm0 4527; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4528; SSE2-NEXT: retq 4529; 4530; SSSE3-LABEL: load_sext_2i16_to_2i64: 4531; SSSE3: # BB#0: # %entry 4532; SSSE3-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 4533; SSSE3-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,0,2,1,4,5,6,7] 4534; SSSE3-NEXT: movdqa %xmm0, %xmm1 4535; SSSE3-NEXT: psrad $31, %xmm1 4536; SSSE3-NEXT: psrad $16, %xmm0 4537; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4538; SSSE3-NEXT: retq 4539; 4540; SSE41-LABEL: load_sext_2i16_to_2i64: 4541; SSE41: # BB#0: # %entry 4542; SSE41-NEXT: pmovsxwq (%rdi), %xmm0 4543; SSE41-NEXT: retq 4544; 4545; AVX-LABEL: load_sext_2i16_to_2i64: 4546; AVX: # BB#0: # %entry 4547; AVX-NEXT: vpmovsxwq (%rdi), %xmm0 4548; AVX-NEXT: retq 4549; 4550; X32-SSE41-LABEL: load_sext_2i16_to_2i64: 4551; X32-SSE41: # BB#0: # %entry 4552; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4553; X32-SSE41-NEXT: pmovsxwq (%eax), %xmm0 4554; X32-SSE41-NEXT: retl 4555entry: 4556 %X = load <2 x i16>, <2 x i16>* %ptr 4557 %Y = sext <2 x i16> %X to <2 x i64> 4558 ret <2 x i64> %Y 4559} 4560 4561define <4 x i32> @load_sext_4i16_to_4i32(<4 x i16> *%ptr) { 4562; SSE2-LABEL: load_sext_4i16_to_4i32: 4563; SSE2: # BB#0: # %entry 4564; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4565; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4566; SSE2-NEXT: psrad $16, %xmm0 4567; SSE2-NEXT: retq 4568; 4569; SSSE3-LABEL: load_sext_4i16_to_4i32: 4570; SSSE3: # BB#0: # %entry 4571; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4572; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4573; SSSE3-NEXT: psrad $16, %xmm0 4574; SSSE3-NEXT: retq 4575; 4576; SSE41-LABEL: load_sext_4i16_to_4i32: 4577; SSE41: # BB#0: # %entry 4578; SSE41-NEXT: pmovsxwd (%rdi), %xmm0 4579; SSE41-NEXT: retq 4580; 4581; AVX-LABEL: load_sext_4i16_to_4i32: 4582; AVX: # BB#0: # %entry 4583; AVX-NEXT: vpmovsxwd (%rdi), %xmm0 4584; AVX-NEXT: retq 4585; 4586; X32-SSE41-LABEL: load_sext_4i16_to_4i32: 4587; X32-SSE41: # BB#0: # %entry 4588; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4589; X32-SSE41-NEXT: pmovsxwd (%eax), %xmm0 4590; X32-SSE41-NEXT: retl 4591entry: 4592 %X = load <4 x i16>, <4 x i16>* %ptr 4593 %Y = sext <4 x i16> %X to <4 x i32> 4594 ret <4 x i32> %Y 4595} 4596 4597define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) { 4598; SSE2-LABEL: load_sext_4i16_to_4i64: 4599; SSE2: # BB#0: # %entry 4600; SSE2-NEXT: movswq 2(%rdi), %rax 4601; SSE2-NEXT: movq %rax, %xmm1 4602; SSE2-NEXT: movswq (%rdi), %rax 4603; SSE2-NEXT: movq %rax, %xmm0 4604; SSE2-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4605; SSE2-NEXT: movswq 6(%rdi), %rax 4606; SSE2-NEXT: movq %rax, %xmm2 4607; SSE2-NEXT: movswq 4(%rdi), %rax 4608; SSE2-NEXT: movq %rax, %xmm1 4609; SSE2-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 4610; SSE2-NEXT: retq 4611; 4612; SSSE3-LABEL: load_sext_4i16_to_4i64: 4613; SSSE3: # BB#0: # %entry 4614; SSSE3-NEXT: movswq 2(%rdi), %rax 4615; SSSE3-NEXT: movq %rax, %xmm1 4616; SSSE3-NEXT: movswq (%rdi), %rax 4617; SSSE3-NEXT: movq %rax, %xmm0 4618; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0] 4619; SSSE3-NEXT: movswq 6(%rdi), %rax 4620; SSSE3-NEXT: movq %rax, %xmm2 4621; SSSE3-NEXT: movswq 4(%rdi), %rax 4622; SSSE3-NEXT: movq %rax, %xmm1 4623; SSSE3-NEXT: punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0] 4624; SSSE3-NEXT: retq 4625; 4626; SSE41-LABEL: load_sext_4i16_to_4i64: 4627; SSE41: # BB#0: # %entry 4628; SSE41-NEXT: pmovsxwq (%rdi), %xmm0 4629; SSE41-NEXT: pmovsxwq 4(%rdi), %xmm1 4630; SSE41-NEXT: retq 4631; 4632; AVX1-LABEL: load_sext_4i16_to_4i64: 4633; AVX1: # BB#0: # %entry 4634; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0 4635; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 4636; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4637; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 4638; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4639; AVX1-NEXT: retq 4640; 4641; AVX2-LABEL: load_sext_4i16_to_4i64: 4642; AVX2: # BB#0: # %entry 4643; AVX2-NEXT: vpmovsxwq (%rdi), %ymm0 4644; AVX2-NEXT: retq 4645; 4646; AVX512-LABEL: load_sext_4i16_to_4i64: 4647; AVX512: # BB#0: # %entry 4648; AVX512-NEXT: vpmovsxwq (%rdi), %ymm0 4649; AVX512-NEXT: retq 4650; 4651; X32-SSE41-LABEL: load_sext_4i16_to_4i64: 4652; X32-SSE41: # BB#0: # %entry 4653; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4654; X32-SSE41-NEXT: pmovsxwq (%eax), %xmm0 4655; X32-SSE41-NEXT: pmovsxwq 4(%eax), %xmm1 4656; X32-SSE41-NEXT: retl 4657entry: 4658 %X = load <4 x i16>, <4 x i16>* %ptr 4659 %Y = sext <4 x i16> %X to <4 x i64> 4660 ret <4 x i64> %Y 4661} 4662 4663define <8 x i32> @load_sext_8i16_to_8i32(<8 x i16> *%ptr) { 4664; SSE2-LABEL: load_sext_8i16_to_8i32: 4665; SSE2: # BB#0: # %entry 4666; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4667; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4668; SSE2-NEXT: psrad $16, %xmm0 4669; SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4670; SSE2-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 4671; SSE2-NEXT: psrad $16, %xmm1 4672; SSE2-NEXT: retq 4673; 4674; SSSE3-LABEL: load_sext_8i16_to_8i32: 4675; SSSE3: # BB#0: # %entry 4676; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4677; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 4678; SSSE3-NEXT: psrad $16, %xmm0 4679; SSSE3-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4680; SSSE3-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 4681; SSSE3-NEXT: psrad $16, %xmm1 4682; SSSE3-NEXT: retq 4683; 4684; SSE41-LABEL: load_sext_8i16_to_8i32: 4685; SSE41: # BB#0: # %entry 4686; SSE41-NEXT: pmovsxwd (%rdi), %xmm0 4687; SSE41-NEXT: pmovsxwd 8(%rdi), %xmm1 4688; SSE41-NEXT: retq 4689; 4690; AVX1-LABEL: load_sext_8i16_to_8i32: 4691; AVX1: # BB#0: # %entry 4692; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0 4693; AVX1-NEXT: vpmovsxwd 8(%rdi), %xmm1 4694; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4695; AVX1-NEXT: retq 4696; 4697; AVX2-LABEL: load_sext_8i16_to_8i32: 4698; AVX2: # BB#0: # %entry 4699; AVX2-NEXT: vpmovsxwd (%rdi), %ymm0 4700; AVX2-NEXT: retq 4701; 4702; AVX512-LABEL: load_sext_8i16_to_8i32: 4703; AVX512: # BB#0: # %entry 4704; AVX512-NEXT: vpmovsxwd (%rdi), %ymm0 4705; AVX512-NEXT: retq 4706; 4707; X32-SSE41-LABEL: load_sext_8i16_to_8i32: 4708; X32-SSE41: # BB#0: # %entry 4709; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4710; X32-SSE41-NEXT: pmovsxwd (%eax), %xmm0 4711; X32-SSE41-NEXT: pmovsxwd 8(%eax), %xmm1 4712; X32-SSE41-NEXT: retl 4713entry: 4714 %X = load <8 x i16>, <8 x i16>* %ptr 4715 %Y = sext <8 x i16> %X to <8 x i32> 4716 ret <8 x i32> %Y 4717} 4718 4719define <2 x i64> @load_sext_2i32_to_2i64(<2 x i32> *%ptr) { 4720; SSE2-LABEL: load_sext_2i32_to_2i64: 4721; SSE2: # BB#0: # %entry 4722; SSE2-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4723; SSE2-NEXT: movdqa %xmm0, %xmm1 4724; SSE2-NEXT: psrad $31, %xmm1 4725; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4726; SSE2-NEXT: retq 4727; 4728; SSSE3-LABEL: load_sext_2i32_to_2i64: 4729; SSSE3: # BB#0: # %entry 4730; SSSE3-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4731; SSSE3-NEXT: movdqa %xmm0, %xmm1 4732; SSSE3-NEXT: psrad $31, %xmm1 4733; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 4734; SSSE3-NEXT: retq 4735; 4736; SSE41-LABEL: load_sext_2i32_to_2i64: 4737; SSE41: # BB#0: # %entry 4738; SSE41-NEXT: pmovsxdq (%rdi), %xmm0 4739; SSE41-NEXT: retq 4740; 4741; AVX-LABEL: load_sext_2i32_to_2i64: 4742; AVX: # BB#0: # %entry 4743; AVX-NEXT: vpmovsxdq (%rdi), %xmm0 4744; AVX-NEXT: retq 4745; 4746; X32-SSE41-LABEL: load_sext_2i32_to_2i64: 4747; X32-SSE41: # BB#0: # %entry 4748; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4749; X32-SSE41-NEXT: pmovsxdq (%eax), %xmm0 4750; X32-SSE41-NEXT: retl 4751entry: 4752 %X = load <2 x i32>, <2 x i32>* %ptr 4753 %Y = sext <2 x i32> %X to <2 x i64> 4754 ret <2 x i64> %Y 4755} 4756 4757define <4 x i64> @load_sext_4i32_to_4i64(<4 x i32> *%ptr) { 4758; SSE2-LABEL: load_sext_4i32_to_4i64: 4759; SSE2: # BB#0: # %entry 4760; SSE2-NEXT: movdqa (%rdi), %xmm0 4761; SSE2-NEXT: movdqa %xmm0, %xmm2 4762; SSE2-NEXT: psrad $31, %xmm2 4763; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4764; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4765; SSE2-NEXT: movdqa %xmm1, %xmm2 4766; SSE2-NEXT: psrad $31, %xmm2 4767; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4768; SSE2-NEXT: retq 4769; 4770; SSSE3-LABEL: load_sext_4i32_to_4i64: 4771; SSSE3: # BB#0: # %entry 4772; SSSE3-NEXT: movdqa (%rdi), %xmm0 4773; SSSE3-NEXT: movdqa %xmm0, %xmm2 4774; SSSE3-NEXT: psrad $31, %xmm2 4775; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4776; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4777; SSSE3-NEXT: movdqa %xmm1, %xmm2 4778; SSSE3-NEXT: psrad $31, %xmm2 4779; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4780; SSSE3-NEXT: retq 4781; 4782; SSE41-LABEL: load_sext_4i32_to_4i64: 4783; SSE41: # BB#0: # %entry 4784; SSE41-NEXT: pmovsxdq (%rdi), %xmm0 4785; SSE41-NEXT: pmovsxdq 8(%rdi), %xmm1 4786; SSE41-NEXT: retq 4787; 4788; AVX1-LABEL: load_sext_4i32_to_4i64: 4789; AVX1: # BB#0: # %entry 4790; AVX1-NEXT: vpmovsxdq (%rdi), %xmm0 4791; AVX1-NEXT: vpmovsxdq 8(%rdi), %xmm1 4792; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4793; AVX1-NEXT: retq 4794; 4795; AVX2-LABEL: load_sext_4i32_to_4i64: 4796; AVX2: # BB#0: # %entry 4797; AVX2-NEXT: vpmovsxdq (%rdi), %ymm0 4798; AVX2-NEXT: retq 4799; 4800; AVX512-LABEL: load_sext_4i32_to_4i64: 4801; AVX512: # BB#0: # %entry 4802; AVX512-NEXT: vpmovsxdq (%rdi), %ymm0 4803; AVX512-NEXT: retq 4804; 4805; X32-SSE41-LABEL: load_sext_4i32_to_4i64: 4806; X32-SSE41: # BB#0: # %entry 4807; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 4808; X32-SSE41-NEXT: pmovsxdq (%eax), %xmm0 4809; X32-SSE41-NEXT: pmovsxdq 8(%eax), %xmm1 4810; X32-SSE41-NEXT: retl 4811entry: 4812 %X = load <4 x i32>, <4 x i32>* %ptr 4813 %Y = sext <4 x i32> %X to <4 x i64> 4814 ret <4 x i64> %Y 4815} 4816 4817define i32 @sext_2i8_to_i32(<16 x i8> %A) nounwind uwtable readnone ssp { 4818; SSE2-LABEL: sext_2i8_to_i32: 4819; SSE2: # BB#0: # %entry 4820; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4821; SSE2-NEXT: psraw $8, %xmm0 4822; SSE2-NEXT: movd %xmm0, %eax 4823; SSE2-NEXT: retq 4824; 4825; SSSE3-LABEL: sext_2i8_to_i32: 4826; SSSE3: # BB#0: # %entry 4827; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 4828; SSSE3-NEXT: psraw $8, %xmm0 4829; SSSE3-NEXT: movd %xmm0, %eax 4830; SSSE3-NEXT: retq 4831; 4832; SSE41-LABEL: sext_2i8_to_i32: 4833; SSE41: # BB#0: # %entry 4834; SSE41-NEXT: pmovsxbw %xmm0, %xmm0 4835; SSE41-NEXT: movd %xmm0, %eax 4836; SSE41-NEXT: retq 4837; 4838; AVX-LABEL: sext_2i8_to_i32: 4839; AVX: # BB#0: # %entry 4840; AVX-NEXT: vpmovsxbw %xmm0, %xmm0 4841; AVX-NEXT: vmovd %xmm0, %eax 4842; AVX-NEXT: retq 4843; 4844; X32-SSE41-LABEL: sext_2i8_to_i32: 4845; X32-SSE41: # BB#0: # %entry 4846; X32-SSE41-NEXT: pushl %eax 4847; X32-SSE41-NEXT: .Lcfi0: 4848; X32-SSE41-NEXT: .cfi_def_cfa_offset 8 4849; X32-SSE41-NEXT: pmovsxbw %xmm0, %xmm0 4850; X32-SSE41-NEXT: movd %xmm0, %eax 4851; X32-SSE41-NEXT: popl %ecx 4852; X32-SSE41-NEXT: retl 4853entry: 4854 %Shuf = shufflevector <16 x i8> %A, <16 x i8> undef, <2 x i32> <i32 0, i32 1> 4855 %Ex = sext <2 x i8> %Shuf to <2 x i16> 4856 %Bc = bitcast <2 x i16> %Ex to i32 4857 ret i32 %Bc 4858} 4859 4860define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) { 4861; SSE2-LABEL: sext_4i1_to_4i64: 4862; SSE2: # BB#0: 4863; SSE2-NEXT: pslld $31, %xmm0 4864; SSE2-NEXT: psrad $31, %xmm0 4865; SSE2-NEXT: movdqa %xmm0, %xmm2 4866; SSE2-NEXT: psrad $31, %xmm2 4867; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4868; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4869; SSE2-NEXT: movdqa %xmm1, %xmm2 4870; SSE2-NEXT: psrad $31, %xmm2 4871; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4872; SSE2-NEXT: retq 4873; 4874; SSSE3-LABEL: sext_4i1_to_4i64: 4875; SSSE3: # BB#0: 4876; SSSE3-NEXT: pslld $31, %xmm0 4877; SSSE3-NEXT: psrad $31, %xmm0 4878; SSSE3-NEXT: movdqa %xmm0, %xmm2 4879; SSSE3-NEXT: psrad $31, %xmm2 4880; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4881; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4882; SSSE3-NEXT: movdqa %xmm1, %xmm2 4883; SSSE3-NEXT: psrad $31, %xmm2 4884; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4885; SSSE3-NEXT: retq 4886; 4887; SSE41-LABEL: sext_4i1_to_4i64: 4888; SSE41: # BB#0: 4889; SSE41-NEXT: pslld $31, %xmm0 4890; SSE41-NEXT: psrad $31, %xmm0 4891; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4892; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4893; SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4894; SSE41-NEXT: movdqa %xmm2, %xmm0 4895; SSE41-NEXT: retq 4896; 4897; AVX1-LABEL: sext_4i1_to_4i64: 4898; AVX1: # BB#0: 4899; AVX1-NEXT: vpslld $31, %xmm0, %xmm0 4900; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0 4901; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 4902; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4903; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 4904; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4905; AVX1-NEXT: retq 4906; 4907; AVX2-LABEL: sext_4i1_to_4i64: 4908; AVX2: # BB#0: 4909; AVX2-NEXT: vpslld $31, %xmm0, %xmm0 4910; AVX2-NEXT: vpsrad $31, %xmm0, %xmm0 4911; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 4912; AVX2-NEXT: retq 4913; 4914; AVX512-LABEL: sext_4i1_to_4i64: 4915; AVX512: # BB#0: 4916; AVX512-NEXT: vpslld $31, %xmm0, %xmm0 4917; AVX512-NEXT: vpsrad $31, %xmm0, %xmm0 4918; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 4919; AVX512-NEXT: retq 4920; 4921; X32-SSE41-LABEL: sext_4i1_to_4i64: 4922; X32-SSE41: # BB#0: 4923; X32-SSE41-NEXT: pslld $31, %xmm0 4924; X32-SSE41-NEXT: psrad $31, %xmm0 4925; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4926; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4927; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4928; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 4929; X32-SSE41-NEXT: retl 4930 %extmask = sext <4 x i1> %mask to <4 x i64> 4931 ret <4 x i64> %extmask 4932} 4933 4934define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) { 4935; SSE2-LABEL: sext_4i8_to_4i64: 4936; SSE2: # BB#0: 4937; SSE2-NEXT: pslld $24, %xmm0 4938; SSE2-NEXT: psrad $24, %xmm0 4939; SSE2-NEXT: movdqa %xmm0, %xmm2 4940; SSE2-NEXT: psrad $31, %xmm2 4941; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4942; SSE2-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4943; SSE2-NEXT: movdqa %xmm1, %xmm2 4944; SSE2-NEXT: psrad $31, %xmm2 4945; SSE2-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4946; SSE2-NEXT: retq 4947; 4948; SSSE3-LABEL: sext_4i8_to_4i64: 4949; SSSE3: # BB#0: 4950; SSSE3-NEXT: pslld $24, %xmm0 4951; SSSE3-NEXT: psrad $24, %xmm0 4952; SSSE3-NEXT: movdqa %xmm0, %xmm2 4953; SSSE3-NEXT: psrad $31, %xmm2 4954; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 4955; SSSE3-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 4956; SSSE3-NEXT: movdqa %xmm1, %xmm2 4957; SSSE3-NEXT: psrad $31, %xmm2 4958; SSSE3-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4959; SSSE3-NEXT: retq 4960; 4961; SSE41-LABEL: sext_4i8_to_4i64: 4962; SSE41: # BB#0: 4963; SSE41-NEXT: pslld $24, %xmm0 4964; SSE41-NEXT: psrad $24, %xmm0 4965; SSE41-NEXT: pmovsxdq %xmm0, %xmm2 4966; SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4967; SSE41-NEXT: pmovsxdq %xmm0, %xmm1 4968; SSE41-NEXT: movdqa %xmm2, %xmm0 4969; SSE41-NEXT: retq 4970; 4971; AVX1-LABEL: sext_4i8_to_4i64: 4972; AVX1: # BB#0: 4973; AVX1-NEXT: vpslld $24, %xmm0, %xmm0 4974; AVX1-NEXT: vpsrad $24, %xmm0, %xmm0 4975; AVX1-NEXT: vpmovsxdq %xmm0, %xmm1 4976; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4977; AVX1-NEXT: vpmovsxdq %xmm0, %xmm0 4978; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4979; AVX1-NEXT: retq 4980; 4981; AVX2-LABEL: sext_4i8_to_4i64: 4982; AVX2: # BB#0: 4983; AVX2-NEXT: vpslld $24, %xmm0, %xmm0 4984; AVX2-NEXT: vpsrad $24, %xmm0, %xmm0 4985; AVX2-NEXT: vpmovsxdq %xmm0, %ymm0 4986; AVX2-NEXT: retq 4987; 4988; AVX512-LABEL: sext_4i8_to_4i64: 4989; AVX512: # BB#0: 4990; AVX512-NEXT: vpslld $24, %xmm0, %xmm0 4991; AVX512-NEXT: vpsrad $24, %xmm0, %xmm0 4992; AVX512-NEXT: vpmovsxdq %xmm0, %ymm0 4993; AVX512-NEXT: retq 4994; 4995; X32-SSE41-LABEL: sext_4i8_to_4i64: 4996; X32-SSE41: # BB#0: 4997; X32-SSE41-NEXT: pslld $24, %xmm0 4998; X32-SSE41-NEXT: psrad $24, %xmm0 4999; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm2 5000; X32-SSE41-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 5001; X32-SSE41-NEXT: pmovsxdq %xmm0, %xmm1 5002; X32-SSE41-NEXT: movdqa %xmm2, %xmm0 5003; X32-SSE41-NEXT: retl 5004 %extmask = sext <4 x i8> %mask to <4 x i64> 5005 ret <4 x i64> %extmask 5006} 5007 5008define <32 x i8> @sext_32xi1_to_32xi8(<32 x i16> %c1, <32 x i16> %c2)nounwind { 5009; SSE-LABEL: sext_32xi1_to_32xi8: 5010; SSE: # BB#0: 5011; SSE-NEXT: pcmpeqw %xmm5, %xmm1 5012; SSE-NEXT: pcmpeqw %xmm4, %xmm0 5013; SSE-NEXT: packsswb %xmm1, %xmm0 5014; SSE-NEXT: pcmpeqw %xmm7, %xmm3 5015; SSE-NEXT: pcmpeqw %xmm6, %xmm2 5016; SSE-NEXT: packsswb %xmm3, %xmm2 5017; SSE-NEXT: movdqa %xmm2, %xmm1 5018; SSE-NEXT: retq 5019; 5020; AVX1-LABEL: sext_32xi1_to_32xi8: 5021; AVX1: # BB#0: 5022; AVX1-NEXT: vextractf128 $1, %ymm3, %xmm4 5023; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm5 5024; AVX1-NEXT: vpcmpeqw %xmm4, %xmm5, %xmm4 5025; AVX1-NEXT: vpcmpeqw %xmm3, %xmm1, %xmm1 5026; AVX1-NEXT: vpacksswb %xmm4, %xmm1, %xmm1 5027; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm3 5028; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 5029; AVX1-NEXT: vpcmpeqw %xmm3, %xmm4, %xmm3 5030; AVX1-NEXT: vpcmpeqw %xmm2, %xmm0, %xmm0 5031; AVX1-NEXT: vpacksswb %xmm3, %xmm0, %xmm0 5032; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 5033; AVX1-NEXT: retq 5034; 5035; AVX2-LABEL: sext_32xi1_to_32xi8: 5036; AVX2: # BB#0: 5037; AVX2-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 5038; AVX2-NEXT: vpcmpeqw %ymm2, %ymm0, %ymm0 5039; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 5040; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,1,3] 5041; AVX2-NEXT: retq 5042; 5043; AVX512F-LABEL: sext_32xi1_to_32xi8: 5044; AVX512F: # BB#0: 5045; AVX512F-NEXT: vpcmpeqw %ymm2, %ymm0, %ymm0 5046; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 5047; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 5048; AVX512F-NEXT: vpcmpeqw %ymm3, %ymm1, %ymm1 5049; AVX512F-NEXT: vpmovsxwd %ymm1, %zmm1 5050; AVX512F-NEXT: vpmovdb %zmm1, %xmm1 5051; AVX512F-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 5052; AVX512F-NEXT: retq 5053; 5054; AVX512BW-LABEL: sext_32xi1_to_32xi8: 5055; AVX512BW: # BB#0: 5056; AVX512BW-NEXT: vpcmpeqw %zmm1, %zmm0, %k0 5057; AVX512BW-NEXT: vpmovm2b %k0, %zmm0 5058; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 5059; AVX512BW-NEXT: retq 5060; 5061; X32-SSE41-LABEL: sext_32xi1_to_32xi8: 5062; X32-SSE41: # BB#0: 5063; X32-SSE41-NEXT: pushl %ebp 5064; X32-SSE41-NEXT: movl %esp, %ebp 5065; X32-SSE41-NEXT: andl $-16, %esp 5066; X32-SSE41-NEXT: subl $16, %esp 5067; X32-SSE41-NEXT: movdqa 8(%ebp), %xmm3 5068; X32-SSE41-NEXT: pcmpeqw 40(%ebp), %xmm1 5069; X32-SSE41-NEXT: pcmpeqw 24(%ebp), %xmm0 5070; X32-SSE41-NEXT: packsswb %xmm1, %xmm0 5071; X32-SSE41-NEXT: pcmpeqw 72(%ebp), %xmm3 5072; X32-SSE41-NEXT: pcmpeqw 56(%ebp), %xmm2 5073; X32-SSE41-NEXT: packsswb %xmm3, %xmm2 5074; X32-SSE41-NEXT: movdqa %xmm2, %xmm1 5075; X32-SSE41-NEXT: movl %ebp, %esp 5076; X32-SSE41-NEXT: popl %ebp 5077; X32-SSE41-NEXT: retl 5078 %a = icmp eq <32 x i16> %c1, %c2 5079 %b = sext <32 x i1> %a to <32 x i8> 5080 ret <32 x i8> %b 5081} 5082 5083define <2 x i32> @sext_2i8_to_2i32(<2 x i8>* %addr) { 5084; SSE2-LABEL: sext_2i8_to_2i32: 5085; SSE2: # BB#0: 5086; SSE2-NEXT: movzwl (%rdi), %eax 5087; SSE2-NEXT: movd %eax, %xmm0 5088; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 5089; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 5090; SSE2-NEXT: psrad $24, %xmm0 5091; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3] 5092; SSE2-NEXT: paddq %xmm0, %xmm0 5093; SSE2-NEXT: retq 5094; 5095; SSSE3-LABEL: sext_2i8_to_2i32: 5096; SSSE3: # BB#0: 5097; SSSE3-NEXT: movzwl (%rdi), %eax 5098; SSSE3-NEXT: movd %eax, %xmm0 5099; SSSE3-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 5100; SSSE3-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 5101; SSSE3-NEXT: psrad $24, %xmm0 5102; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,1,1,3] 5103; SSSE3-NEXT: paddq %xmm0, %xmm0 5104; SSSE3-NEXT: retq 5105; 5106; SSE41-LABEL: sext_2i8_to_2i32: 5107; SSE41: # BB#0: 5108; SSE41-NEXT: pmovsxbq (%rdi), %xmm0 5109; SSE41-NEXT: paddq %xmm0, %xmm0 5110; SSE41-NEXT: retq 5111; 5112; AVX-LABEL: sext_2i8_to_2i32: 5113; AVX: # BB#0: 5114; AVX-NEXT: vpmovsxbq (%rdi), %xmm0 5115; AVX-NEXT: vpaddq %xmm0, %xmm0, %xmm0 5116; AVX-NEXT: retq 5117; 5118; X32-SSE41-LABEL: sext_2i8_to_2i32: 5119; X32-SSE41: # BB#0: 5120; X32-SSE41-NEXT: movl {{[0-9]+}}(%esp), %eax 5121; X32-SSE41-NEXT: pmovsxbq (%eax), %xmm0 5122; X32-SSE41-NEXT: paddq %xmm0, %xmm0 5123; X32-SSE41-NEXT: retl 5124 %x = load <2 x i8>, <2 x i8>* %addr, align 1 5125 %y = sext <2 x i8> %x to <2 x i32> 5126 %z = add <2 x i32>%y, %y 5127 ret <2 x i32>%z 5128} 5129 5130