1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE --check-prefix=SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefix=SSE --check-prefix=SSSE3
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE --check-prefix=SSE41
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX --check-prefix=AVX1
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=AVX --check-prefix=AVX2
7;
8; Just one 32-bit run to make sure we do reasonable things there.
9; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=X32-SSE41
10
11define <8 x i16> @sext_16i8_to_8i16(<16 x i8> %A) nounwind uwtable readnone ssp {
12; SSE2-LABEL: sext_16i8_to_8i16:
13; SSE2:       # BB#0: # %entry
14; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
15; SSE2-NEXT:    psraw $8, %xmm0
16; SSE2-NEXT:    retq
17;
18; SSSE3-LABEL: sext_16i8_to_8i16:
19; SSSE3:       # BB#0: # %entry
20; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
21; SSSE3-NEXT:    psraw $8, %xmm0
22; SSSE3-NEXT:    retq
23;
24; SSE41-LABEL: sext_16i8_to_8i16:
25; SSE41:       # BB#0: # %entry
26; SSE41-NEXT:    pmovsxbw %xmm0, %xmm0
27; SSE41-NEXT:    retq
28;
29; AVX-LABEL: sext_16i8_to_8i16:
30; AVX:       # BB#0: # %entry
31; AVX-NEXT:    vpmovsxbw %xmm0, %xmm0
32; AVX-NEXT:    retq
33;
34; X32-SSE41-LABEL: sext_16i8_to_8i16:
35; X32-SSE41:       # BB#0: # %entry
36; X32-SSE41-NEXT:    pmovsxbw %xmm0, %xmm0
37; X32-SSE41-NEXT:    retl
38entry:
39  %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
40  %C = sext <8 x i8> %B to <8 x i16>
41  ret <8 x i16> %C
42}
43
44define <16 x i16> @sext_16i8_to_16i16(<16 x i8> %A) nounwind uwtable readnone ssp {
45; SSE2-LABEL: sext_16i8_to_16i16:
46; SSE2:       # BB#0: # %entry
47; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
48; SSE2-NEXT:    psraw $8, %xmm2
49; SSE2-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
50; SSE2-NEXT:    psraw $8, %xmm1
51; SSE2-NEXT:    movdqa %xmm2, %xmm0
52; SSE2-NEXT:    retq
53;
54; SSSE3-LABEL: sext_16i8_to_16i16:
55; SSSE3:       # BB#0: # %entry
56; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
57; SSSE3-NEXT:    psraw $8, %xmm2
58; SSSE3-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
59; SSSE3-NEXT:    psraw $8, %xmm1
60; SSSE3-NEXT:    movdqa %xmm2, %xmm0
61; SSSE3-NEXT:    retq
62;
63; SSE41-LABEL: sext_16i8_to_16i16:
64; SSE41:       # BB#0: # %entry
65; SSE41-NEXT:    pmovsxbw %xmm0, %xmm2
66; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
67; SSE41-NEXT:    pmovsxbw %xmm0, %xmm1
68; SSE41-NEXT:    movdqa %xmm2, %xmm0
69; SSE41-NEXT:    retq
70;
71; AVX1-LABEL: sext_16i8_to_16i16:
72; AVX1:       # BB#0: # %entry
73; AVX1-NEXT:    vpmovsxbw %xmm0, %xmm1
74; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
75; AVX1-NEXT:    vpmovsxbw %xmm0, %xmm0
76; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
77; AVX1-NEXT:    retq
78;
79; AVX2-LABEL: sext_16i8_to_16i16:
80; AVX2:       # BB#0: # %entry
81; AVX2-NEXT:    vpmovsxbw %xmm0, %ymm0
82; AVX2-NEXT:    retq
83;
84; X32-SSE41-LABEL: sext_16i8_to_16i16:
85; X32-SSE41:       # BB#0: # %entry
86; X32-SSE41-NEXT:    pmovsxbw %xmm0, %xmm2
87; X32-SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
88; X32-SSE41-NEXT:    pmovsxbw %xmm0, %xmm1
89; X32-SSE41-NEXT:    movdqa %xmm2, %xmm0
90; X32-SSE41-NEXT:    retl
91entry:
92  %B = sext <16 x i8> %A to <16 x i16>
93  ret <16 x i16> %B
94}
95
96define <4 x i32> @sext_16i8_to_4i32(<16 x i8> %A) nounwind uwtable readnone ssp {
97; SSE2-LABEL: sext_16i8_to_4i32:
98; SSE2:       # BB#0: # %entry
99; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
100; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
101; SSE2-NEXT:    psrad $24, %xmm0
102; SSE2-NEXT:    retq
103;
104; SSSE3-LABEL: sext_16i8_to_4i32:
105; SSSE3:       # BB#0: # %entry
106; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
107; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
108; SSSE3-NEXT:    psrad $24, %xmm0
109; SSSE3-NEXT:    retq
110;
111; SSE41-LABEL: sext_16i8_to_4i32:
112; SSE41:       # BB#0: # %entry
113; SSE41-NEXT:    pmovsxbd %xmm0, %xmm0
114; SSE41-NEXT:    retq
115;
116; AVX-LABEL: sext_16i8_to_4i32:
117; AVX:       # BB#0: # %entry
118; AVX-NEXT:    vpmovsxbd %xmm0, %xmm0
119; AVX-NEXT:    retq
120;
121; X32-SSE41-LABEL: sext_16i8_to_4i32:
122; X32-SSE41:       # BB#0: # %entry
123; X32-SSE41-NEXT:    pmovsxbd %xmm0, %xmm0
124; X32-SSE41-NEXT:    retl
125entry:
126  %B = shufflevector <16 x i8> %A, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
127  %C = sext <4 x i8> %B to <4 x i32>
128  ret <4 x i32> %C
129}
130
131define <8 x i32> @sext_16i8_to_8i32(<16 x i8> %A) nounwind uwtable readnone ssp {
132; SSE2-LABEL: sext_16i8_to_8i32:
133; SSE2:       # BB#0: # %entry
134; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
135; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
136; SSE2-NEXT:    psrad $24, %xmm2
137; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
138; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
139; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
140; SSE2-NEXT:    psrad $24, %xmm1
141; SSE2-NEXT:    movdqa %xmm2, %xmm0
142; SSE2-NEXT:    retq
143;
144; SSSE3-LABEL: sext_16i8_to_8i32:
145; SSSE3:       # BB#0: # %entry
146; SSSE3-NEXT:    movdqa %xmm0, %xmm1
147; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7]
148; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
149; SSSE3-NEXT:    psrad $24, %xmm0
150; SSSE3-NEXT:    pshufb {{.*#+}} xmm1 = xmm1[u,u,u,4,u,u,u,5,u,u,u,6,u,u,u,7]
151; SSSE3-NEXT:    psrad $24, %xmm1
152; SSSE3-NEXT:    retq
153;
154; SSE41-LABEL: sext_16i8_to_8i32:
155; SSE41:       # BB#0: # %entry
156; SSE41-NEXT:    pmovsxbd %xmm0, %xmm2
157; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
158; SSE41-NEXT:    pmovsxbd %xmm0, %xmm1
159; SSE41-NEXT:    movdqa %xmm2, %xmm0
160; SSE41-NEXT:    retq
161;
162; AVX1-LABEL: sext_16i8_to_8i32:
163; AVX1:       # BB#0: # %entry
164; AVX1-NEXT:    vpmovsxbd %xmm0, %xmm1
165; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
166; AVX1-NEXT:    vpmovsxbd %xmm0, %xmm0
167; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
168; AVX1-NEXT:    retq
169;
170; AVX2-LABEL: sext_16i8_to_8i32:
171; AVX2:       # BB#0: # %entry
172; AVX2-NEXT:    vpmovsxbd %xmm0, %ymm0
173; AVX2-NEXT:    retq
174;
175; X32-SSE41-LABEL: sext_16i8_to_8i32:
176; X32-SSE41:       # BB#0: # %entry
177; X32-SSE41-NEXT:    pmovsxbd %xmm0, %xmm2
178; X32-SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
179; X32-SSE41-NEXT:    pmovsxbd %xmm0, %xmm1
180; X32-SSE41-NEXT:    movdqa %xmm2, %xmm0
181; X32-SSE41-NEXT:    retl
182entry:
183  %B = shufflevector <16 x i8> %A, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
184  %C = sext <8 x i8> %B to <8 x i32>
185  ret <8 x i32> %C
186}
187
188define <2 x i64> @sext_16i8_to_2i64(<16 x i8> %A) nounwind uwtable readnone ssp {
189; SSE2-LABEL: sext_16i8_to_2i64:
190; SSE2:       # BB#0: # %entry
191; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
192; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
193; SSE2-NEXT:    movdqa %xmm0, %xmm1
194; SSE2-NEXT:    psrad $31, %xmm1
195; SSE2-NEXT:    psrad $24, %xmm0
196; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
197; SSE2-NEXT:    retq
198;
199; SSSE3-LABEL: sext_16i8_to_2i64:
200; SSSE3:       # BB#0: # %entry
201; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
202; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
203; SSSE3-NEXT:    movdqa %xmm0, %xmm1
204; SSSE3-NEXT:    psrad $31, %xmm1
205; SSSE3-NEXT:    psrad $24, %xmm0
206; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
207; SSSE3-NEXT:    retq
208;
209; SSE41-LABEL: sext_16i8_to_2i64:
210; SSE41:       # BB#0: # %entry
211; SSE41-NEXT:    pmovsxbq %xmm0, %xmm0
212; SSE41-NEXT:    retq
213;
214; AVX-LABEL: sext_16i8_to_2i64:
215; AVX:       # BB#0: # %entry
216; AVX-NEXT:    vpmovsxbq %xmm0, %xmm0
217; AVX-NEXT:    retq
218;
219; X32-SSE41-LABEL: sext_16i8_to_2i64:
220; X32-SSE41:       # BB#0: # %entry
221; X32-SSE41-NEXT:    pmovsxbq %xmm0, %xmm0
222; X32-SSE41-NEXT:    retl
223entry:
224  %B = shufflevector <16 x i8> %A, <16 x i8> undef, <2 x i32> <i32 0, i32 1>
225  %C = sext <2 x i8> %B to <2 x i64>
226  ret <2 x i64> %C
227}
228
229define <4 x i64> @sext_16i8_to_4i64(<16 x i8> %A) nounwind uwtable readnone ssp {
230; SSE2-LABEL: sext_16i8_to_4i64:
231; SSE2:       # BB#0: # %entry
232; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
233; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
234; SSE2-NEXT:    movdqa %xmm2, %xmm1
235; SSE2-NEXT:    psrad $31, %xmm1
236; SSE2-NEXT:    psrad $24, %xmm2
237; SSE2-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
238; SSE2-NEXT:    psrld $16, %xmm0
239; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
240; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
241; SSE2-NEXT:    movdqa %xmm1, %xmm0
242; SSE2-NEXT:    psrad $31, %xmm0
243; SSE2-NEXT:    psrad $24, %xmm1
244; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
245; SSE2-NEXT:    movdqa %xmm2, %xmm0
246; SSE2-NEXT:    retq
247;
248; SSSE3-LABEL: sext_16i8_to_4i64:
249; SSSE3:       # BB#0: # %entry
250; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
251; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
252; SSSE3-NEXT:    movdqa %xmm2, %xmm1
253; SSSE3-NEXT:    psrad $31, %xmm1
254; SSSE3-NEXT:    psrad $24, %xmm2
255; SSSE3-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
256; SSSE3-NEXT:    psrld $16, %xmm0
257; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
258; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
259; SSSE3-NEXT:    movdqa %xmm1, %xmm0
260; SSSE3-NEXT:    psrad $31, %xmm0
261; SSSE3-NEXT:    psrad $24, %xmm1
262; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
263; SSSE3-NEXT:    movdqa %xmm2, %xmm0
264; SSSE3-NEXT:    retq
265;
266; SSE41-LABEL: sext_16i8_to_4i64:
267; SSE41:       # BB#0: # %entry
268; SSE41-NEXT:    pmovsxbq %xmm0, %xmm2
269; SSE41-NEXT:    psrld $16, %xmm0
270; SSE41-NEXT:    pmovsxbq %xmm0, %xmm1
271; SSE41-NEXT:    movdqa %xmm2, %xmm0
272; SSE41-NEXT:    retq
273;
274; AVX1-LABEL: sext_16i8_to_4i64:
275; AVX1:       # BB#0: # %entry
276; AVX1-NEXT:    vpmovsxbq %xmm0, %xmm1
277; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm0
278; AVX1-NEXT:    vpmovsxbq %xmm0, %xmm0
279; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
280; AVX1-NEXT:    retq
281;
282; AVX2-LABEL: sext_16i8_to_4i64:
283; AVX2:       # BB#0: # %entry
284; AVX2-NEXT:    vpmovsxbq %xmm0, %ymm0
285; AVX2-NEXT:    retq
286;
287; X32-SSE41-LABEL: sext_16i8_to_4i64:
288; X32-SSE41:       # BB#0: # %entry
289; X32-SSE41-NEXT:    pmovsxbq %xmm0, %xmm2
290; X32-SSE41-NEXT:    psrld $16, %xmm0
291; X32-SSE41-NEXT:    pmovsxbq %xmm0, %xmm1
292; X32-SSE41-NEXT:    movdqa %xmm2, %xmm0
293; X32-SSE41-NEXT:    retl
294entry:
295  %B = shufflevector <16 x i8> %A, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
296  %C = sext <4 x i8> %B to <4 x i64>
297  ret <4 x i64> %C
298}
299
300define <4 x i32> @sext_8i16_to_4i32(<8 x i16> %A) nounwind uwtable readnone ssp {
301; SSE2-LABEL: sext_8i16_to_4i32:
302; SSE2:       # BB#0: # %entry
303; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
304; SSE2-NEXT:    psrad $16, %xmm0
305; SSE2-NEXT:    retq
306;
307; SSSE3-LABEL: sext_8i16_to_4i32:
308; SSSE3:       # BB#0: # %entry
309; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
310; SSSE3-NEXT:    psrad $16, %xmm0
311; SSSE3-NEXT:    retq
312;
313; SSE41-LABEL: sext_8i16_to_4i32:
314; SSE41:       # BB#0: # %entry
315; SSE41-NEXT:    pmovsxwd %xmm0, %xmm0
316; SSE41-NEXT:    retq
317;
318; AVX-LABEL: sext_8i16_to_4i32:
319; AVX:       # BB#0: # %entry
320; AVX-NEXT:    vpmovsxwd %xmm0, %xmm0
321; AVX-NEXT:    retq
322;
323; X32-SSE41-LABEL: sext_8i16_to_4i32:
324; X32-SSE41:       # BB#0: # %entry
325; X32-SSE41-NEXT:    pmovsxwd %xmm0, %xmm0
326; X32-SSE41-NEXT:    retl
327entry:
328  %B = shufflevector <8 x i16> %A, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
329  %C = sext <4 x i16> %B to <4 x i32>
330  ret <4 x i32> %C
331}
332
333define <8 x i32> @sext_8i16_to_8i32(<8 x i16> %A) nounwind uwtable readnone ssp {
334; SSE2-LABEL: sext_8i16_to_8i32:
335; SSE2:       # BB#0: # %entry
336; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
337; SSE2-NEXT:    psrad $16, %xmm2
338; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
339; SSE2-NEXT:    psrad $16, %xmm1
340; SSE2-NEXT:    movdqa %xmm2, %xmm0
341; SSE2-NEXT:    retq
342;
343; SSSE3-LABEL: sext_8i16_to_8i32:
344; SSSE3:       # BB#0: # %entry
345; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
346; SSSE3-NEXT:    psrad $16, %xmm2
347; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
348; SSSE3-NEXT:    psrad $16, %xmm1
349; SSSE3-NEXT:    movdqa %xmm2, %xmm0
350; SSSE3-NEXT:    retq
351;
352; SSE41-LABEL: sext_8i16_to_8i32:
353; SSE41:       # BB#0: # %entry
354; SSE41-NEXT:    pmovsxwd %xmm0, %xmm2
355; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
356; SSE41-NEXT:    pmovsxwd %xmm0, %xmm1
357; SSE41-NEXT:    movdqa %xmm2, %xmm0
358; SSE41-NEXT:    retq
359;
360; AVX1-LABEL: sext_8i16_to_8i32:
361; AVX1:       # BB#0: # %entry
362; AVX1-NEXT:    vpmovsxwd %xmm0, %xmm1
363; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
364; AVX1-NEXT:    vpmovsxwd %xmm0, %xmm0
365; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
366; AVX1-NEXT:    retq
367;
368; AVX2-LABEL: sext_8i16_to_8i32:
369; AVX2:       # BB#0: # %entry
370; AVX2-NEXT:    vpmovsxwd %xmm0, %ymm0
371; AVX2-NEXT:    retq
372;
373; X32-SSE41-LABEL: sext_8i16_to_8i32:
374; X32-SSE41:       # BB#0: # %entry
375; X32-SSE41-NEXT:    pmovsxwd %xmm0, %xmm2
376; X32-SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
377; X32-SSE41-NEXT:    pmovsxwd %xmm0, %xmm1
378; X32-SSE41-NEXT:    movdqa %xmm2, %xmm0
379; X32-SSE41-NEXT:    retl
380entry:
381  %B = sext <8 x i16> %A to <8 x i32>
382  ret <8 x i32> %B
383}
384
385define <2 x i64> @sext_8i16_to_2i64(<8 x i16> %A) nounwind uwtable readnone ssp {
386; SSE2-LABEL: sext_8i16_to_2i64:
387; SSE2:       # BB#0: # %entry
388; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
389; SSE2-NEXT:    movdqa %xmm0, %xmm1
390; SSE2-NEXT:    psrad $31, %xmm1
391; SSE2-NEXT:    psrad $16, %xmm0
392; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
393; SSE2-NEXT:    retq
394;
395; SSSE3-LABEL: sext_8i16_to_2i64:
396; SSSE3:       # BB#0: # %entry
397; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
398; SSSE3-NEXT:    movdqa %xmm0, %xmm1
399; SSSE3-NEXT:    psrad $31, %xmm1
400; SSSE3-NEXT:    psrad $16, %xmm0
401; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
402; SSSE3-NEXT:    retq
403;
404; SSE41-LABEL: sext_8i16_to_2i64:
405; SSE41:       # BB#0: # %entry
406; SSE41-NEXT:    pmovsxwq %xmm0, %xmm0
407; SSE41-NEXT:    retq
408;
409; AVX-LABEL: sext_8i16_to_2i64:
410; AVX:       # BB#0: # %entry
411; AVX-NEXT:    vpmovsxwq %xmm0, %xmm0
412; AVX-NEXT:    retq
413;
414; X32-SSE41-LABEL: sext_8i16_to_2i64:
415; X32-SSE41:       # BB#0: # %entry
416; X32-SSE41-NEXT:    pmovsxwq %xmm0, %xmm0
417; X32-SSE41-NEXT:    retl
418entry:
419  %B = shufflevector <8 x i16> %A, <8 x i16> undef, <2 x i32> <i32 0, i32 1>
420  %C = sext <2 x i16> %B to <2 x i64>
421  ret <2 x i64> %C
422}
423
424define <4 x i64> @sext_8i16_to_4i64(<8 x i16> %A) nounwind uwtable readnone ssp {
425; SSE2-LABEL: sext_8i16_to_4i64:
426; SSE2:       # BB#0: # %entry
427; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
428; SSE2-NEXT:    movdqa %xmm2, %xmm1
429; SSE2-NEXT:    psrad $31, %xmm1
430; SSE2-NEXT:    psrad $16, %xmm2
431; SSE2-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
432; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
433; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
434; SSE2-NEXT:    movdqa %xmm1, %xmm0
435; SSE2-NEXT:    psrad $31, %xmm0
436; SSE2-NEXT:    psrad $16, %xmm1
437; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
438; SSE2-NEXT:    movdqa %xmm2, %xmm0
439; SSE2-NEXT:    retq
440;
441; SSSE3-LABEL: sext_8i16_to_4i64:
442; SSSE3:       # BB#0: # %entry
443; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
444; SSSE3-NEXT:    movdqa %xmm2, %xmm1
445; SSSE3-NEXT:    psrad $31, %xmm1
446; SSSE3-NEXT:    psrad $16, %xmm2
447; SSSE3-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
448; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
449; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
450; SSSE3-NEXT:    movdqa %xmm1, %xmm0
451; SSSE3-NEXT:    psrad $31, %xmm0
452; SSSE3-NEXT:    psrad $16, %xmm1
453; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
454; SSSE3-NEXT:    movdqa %xmm2, %xmm0
455; SSSE3-NEXT:    retq
456;
457; SSE41-LABEL: sext_8i16_to_4i64:
458; SSE41:       # BB#0: # %entry
459; SSE41-NEXT:    pmovsxwq %xmm0, %xmm2
460; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
461; SSE41-NEXT:    pmovsxwq %xmm0, %xmm1
462; SSE41-NEXT:    movdqa %xmm2, %xmm0
463; SSE41-NEXT:    retq
464;
465; AVX1-LABEL: sext_8i16_to_4i64:
466; AVX1:       # BB#0: # %entry
467; AVX1-NEXT:    vpmovsxwq %xmm0, %xmm1
468; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
469; AVX1-NEXT:    vpmovsxwq %xmm0, %xmm0
470; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
471; AVX1-NEXT:    retq
472;
473; AVX2-LABEL: sext_8i16_to_4i64:
474; AVX2:       # BB#0: # %entry
475; AVX2-NEXT:    vpmovsxwq %xmm0, %ymm0
476; AVX2-NEXT:    retq
477;
478; X32-SSE41-LABEL: sext_8i16_to_4i64:
479; X32-SSE41:       # BB#0: # %entry
480; X32-SSE41-NEXT:    pmovsxwq %xmm0, %xmm2
481; X32-SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3]
482; X32-SSE41-NEXT:    pmovsxwq %xmm0, %xmm1
483; X32-SSE41-NEXT:    movdqa %xmm2, %xmm0
484; X32-SSE41-NEXT:    retl
485entry:
486  %B = shufflevector <8 x i16> %A, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
487  %C = sext <4 x i16> %B to <4 x i64>
488  ret <4 x i64> %C
489}
490
491define <2 x i64> @sext_4i32_to_2i64(<4 x i32> %A) nounwind uwtable readnone ssp {
492; SSE2-LABEL: sext_4i32_to_2i64:
493; SSE2:       # BB#0: # %entry
494; SSE2-NEXT:    movdqa %xmm0, %xmm1
495; SSE2-NEXT:    psrad $31, %xmm1
496; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
497; SSE2-NEXT:    retq
498;
499; SSSE3-LABEL: sext_4i32_to_2i64:
500; SSSE3:       # BB#0: # %entry
501; SSSE3-NEXT:    movdqa %xmm0, %xmm1
502; SSSE3-NEXT:    psrad $31, %xmm1
503; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
504; SSSE3-NEXT:    retq
505;
506; SSE41-LABEL: sext_4i32_to_2i64:
507; SSE41:       # BB#0: # %entry
508; SSE41-NEXT:    pmovsxdq %xmm0, %xmm0
509; SSE41-NEXT:    retq
510;
511; AVX-LABEL: sext_4i32_to_2i64:
512; AVX:       # BB#0: # %entry
513; AVX-NEXT:    vpmovsxdq %xmm0, %xmm0
514; AVX-NEXT:    retq
515;
516; X32-SSE41-LABEL: sext_4i32_to_2i64:
517; X32-SSE41:       # BB#0: # %entry
518; X32-SSE41-NEXT:    pmovsxdq %xmm0, %xmm0
519; X32-SSE41-NEXT:    retl
520entry:
521  %B = shufflevector <4 x i32> %A, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
522  %C = sext <2 x i32> %B to <2 x i64>
523  ret <2 x i64> %C
524}
525
526define <4 x i64> @sext_4i32_to_4i64(<4 x i32> %A) nounwind uwtable readnone ssp {
527; SSE2-LABEL: sext_4i32_to_4i64:
528; SSE2:       # BB#0: # %entry
529; SSE2-NEXT:    movdqa %xmm0, %xmm2
530; SSE2-NEXT:    psrad $31, %xmm2
531; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
532; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
533; SSE2-NEXT:    movdqa %xmm1, %xmm2
534; SSE2-NEXT:    psrad $31, %xmm2
535; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
536; SSE2-NEXT:    retq
537;
538; SSSE3-LABEL: sext_4i32_to_4i64:
539; SSSE3:       # BB#0: # %entry
540; SSSE3-NEXT:    movdqa %xmm0, %xmm2
541; SSSE3-NEXT:    psrad $31, %xmm2
542; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
543; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
544; SSSE3-NEXT:    movdqa %xmm1, %xmm2
545; SSSE3-NEXT:    psrad $31, %xmm2
546; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
547; SSSE3-NEXT:    retq
548;
549; SSE41-LABEL: sext_4i32_to_4i64:
550; SSE41:       # BB#0: # %entry
551; SSE41-NEXT:    pmovsxdq %xmm0, %xmm2
552; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
553; SSE41-NEXT:    pmovsxdq %xmm0, %xmm1
554; SSE41-NEXT:    movdqa %xmm2, %xmm0
555; SSE41-NEXT:    retq
556;
557; AVX1-LABEL: sext_4i32_to_4i64:
558; AVX1:       # BB#0: # %entry
559; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm1
560; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
561; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm0
562; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
563; AVX1-NEXT:    retq
564;
565; AVX2-LABEL: sext_4i32_to_4i64:
566; AVX2:       # BB#0: # %entry
567; AVX2-NEXT:    vpmovsxdq %xmm0, %ymm0
568; AVX2-NEXT:    retq
569;
570; X32-SSE41-LABEL: sext_4i32_to_4i64:
571; X32-SSE41:       # BB#0: # %entry
572; X32-SSE41-NEXT:    pmovsxdq %xmm0, %xmm2
573; X32-SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
574; X32-SSE41-NEXT:    pmovsxdq %xmm0, %xmm1
575; X32-SSE41-NEXT:    movdqa %xmm2, %xmm0
576; X32-SSE41-NEXT:    retl
577entry:
578  %B = sext <4 x i32> %A to <4 x i64>
579  ret <4 x i64> %B
580}
581
582define <2 x i64> @load_sext_2i1_to_2i64(<2 x i1> *%ptr) {
583; SSE-LABEL: load_sext_2i1_to_2i64:
584; SSE:       # BB#0: # %entry
585; SSE-NEXT:    movzbl (%rdi), %eax
586; SSE-NEXT:    movq %rax, %rcx
587; SSE-NEXT:    shlq $62, %rcx
588; SSE-NEXT:    sarq $63, %rcx
589; SSE-NEXT:    movd %rcx, %xmm1
590; SSE-NEXT:    shlq $63, %rax
591; SSE-NEXT:    sarq $63, %rax
592; SSE-NEXT:    movd %rax, %xmm0
593; SSE-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
594; SSE-NEXT:    retq
595;
596; AVX-LABEL: load_sext_2i1_to_2i64:
597; AVX:       # BB#0: # %entry
598; AVX-NEXT:    movzbl (%rdi), %eax
599; AVX-NEXT:    movq %rax, %rcx
600; AVX-NEXT:    shlq $62, %rcx
601; AVX-NEXT:    sarq $63, %rcx
602; AVX-NEXT:    vmovq %rcx, %xmm0
603; AVX-NEXT:    shlq $63, %rax
604; AVX-NEXT:    sarq $63, %rax
605; AVX-NEXT:    vmovq %rax, %xmm1
606; AVX-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
607; AVX-NEXT:    retq
608;
609; X32-SSE41-LABEL: load_sext_2i1_to_2i64:
610; X32-SSE41:       # BB#0: # %entry
611; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
612; X32-SSE41-NEXT:    movzbl (%eax), %eax
613; X32-SSE41-NEXT:    movl %eax, %ecx
614; X32-SSE41-NEXT:    shll $31, %ecx
615; X32-SSE41-NEXT:    sarl $31, %ecx
616; X32-SSE41-NEXT:    movd %ecx, %xmm0
617; X32-SSE41-NEXT:    pinsrd $1, %ecx, %xmm0
618; X32-SSE41-NEXT:    shll $30, %eax
619; X32-SSE41-NEXT:    sarl $31, %eax
620; X32-SSE41-NEXT:    pinsrd $2, %eax, %xmm0
621; X32-SSE41-NEXT:    pinsrd $3, %eax, %xmm0
622; X32-SSE41-NEXT:    retl
623entry:
624 %X = load <2 x i1>, <2 x i1>* %ptr
625 %Y = sext <2 x i1> %X to <2 x i64>
626 ret <2 x i64> %Y
627}
628
629define <2 x i64> @load_sext_2i8_to_2i64(<2 x i8> *%ptr) {
630; SSE2-LABEL: load_sext_2i8_to_2i64:
631; SSE2:       # BB#0: # %entry
632; SSE2-NEXT:    movzwl (%rdi), %eax
633; SSE2-NEXT:    movd %eax, %xmm0
634; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
635; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
636; SSE2-NEXT:    movdqa %xmm0, %xmm1
637; SSE2-NEXT:    psrad $31, %xmm1
638; SSE2-NEXT:    psrad $24, %xmm0
639; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
640; SSE2-NEXT:    retq
641;
642; SSSE3-LABEL: load_sext_2i8_to_2i64:
643; SSSE3:       # BB#0: # %entry
644; SSSE3-NEXT:    movzwl (%rdi), %eax
645; SSSE3-NEXT:    movd %eax, %xmm0
646; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
647; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
648; SSSE3-NEXT:    movdqa %xmm0, %xmm1
649; SSSE3-NEXT:    psrad $31, %xmm1
650; SSSE3-NEXT:    psrad $24, %xmm0
651; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
652; SSSE3-NEXT:    retq
653;
654; SSE41-LABEL: load_sext_2i8_to_2i64:
655; SSE41:       # BB#0: # %entry
656; SSE41-NEXT:    pmovsxbq (%rdi), %xmm0
657; SSE41-NEXT:    retq
658;
659; AVX-LABEL: load_sext_2i8_to_2i64:
660; AVX:       # BB#0: # %entry
661; AVX-NEXT:    vpmovsxbq (%rdi), %xmm0
662; AVX-NEXT:    retq
663;
664; X32-SSE41-LABEL: load_sext_2i8_to_2i64:
665; X32-SSE41:       # BB#0: # %entry
666; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
667; X32-SSE41-NEXT:    pmovsxbq (%eax), %xmm0
668; X32-SSE41-NEXT:    retl
669entry:
670 %X = load <2 x i8>, <2 x i8>* %ptr
671 %Y = sext <2 x i8> %X to <2 x i64>
672 ret <2 x i64> %Y
673}
674
675define <4 x i32> @load_sext_4i1_to_4i32(<4 x i1> *%ptr) {
676; SSE2-LABEL: load_sext_4i1_to_4i32:
677; SSE2:       # BB#0: # %entry
678; SSE2-NEXT:    movzbl (%rdi), %eax
679; SSE2-NEXT:    movq %rax, %rcx
680; SSE2-NEXT:    shlq $60, %rcx
681; SSE2-NEXT:    sarq $63, %rcx
682; SSE2-NEXT:    movd %ecx, %xmm0
683; SSE2-NEXT:    movq %rax, %rcx
684; SSE2-NEXT:    shlq $62, %rcx
685; SSE2-NEXT:    sarq $63, %rcx
686; SSE2-NEXT:    movd %ecx, %xmm1
687; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
688; SSE2-NEXT:    movq %rax, %rcx
689; SSE2-NEXT:    shlq $61, %rcx
690; SSE2-NEXT:    sarq $63, %rcx
691; SSE2-NEXT:    movd %ecx, %xmm2
692; SSE2-NEXT:    shlq $63, %rax
693; SSE2-NEXT:    sarq $63, %rax
694; SSE2-NEXT:    movd %eax, %xmm0
695; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
696; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
697; SSE2-NEXT:    retq
698;
699; SSSE3-LABEL: load_sext_4i1_to_4i32:
700; SSSE3:       # BB#0: # %entry
701; SSSE3-NEXT:    movzbl (%rdi), %eax
702; SSSE3-NEXT:    movq %rax, %rcx
703; SSSE3-NEXT:    shlq $60, %rcx
704; SSSE3-NEXT:    sarq $63, %rcx
705; SSSE3-NEXT:    movd %ecx, %xmm0
706; SSSE3-NEXT:    movq %rax, %rcx
707; SSSE3-NEXT:    shlq $62, %rcx
708; SSSE3-NEXT:    sarq $63, %rcx
709; SSSE3-NEXT:    movd %ecx, %xmm1
710; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
711; SSSE3-NEXT:    movq %rax, %rcx
712; SSSE3-NEXT:    shlq $61, %rcx
713; SSSE3-NEXT:    sarq $63, %rcx
714; SSSE3-NEXT:    movd %ecx, %xmm2
715; SSSE3-NEXT:    shlq $63, %rax
716; SSSE3-NEXT:    sarq $63, %rax
717; SSSE3-NEXT:    movd %eax, %xmm0
718; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
719; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
720; SSSE3-NEXT:    retq
721;
722; SSE41-LABEL: load_sext_4i1_to_4i32:
723; SSE41:       # BB#0: # %entry
724; SSE41-NEXT:    movzbl (%rdi), %eax
725; SSE41-NEXT:    movq %rax, %rcx
726; SSE41-NEXT:    shlq $62, %rcx
727; SSE41-NEXT:    sarq $63, %rcx
728; SSE41-NEXT:    movq %rax, %rdx
729; SSE41-NEXT:    shlq $63, %rdx
730; SSE41-NEXT:    sarq $63, %rdx
731; SSE41-NEXT:    movd %edx, %xmm0
732; SSE41-NEXT:    pinsrd $1, %ecx, %xmm0
733; SSE41-NEXT:    movq %rax, %rcx
734; SSE41-NEXT:    shlq $61, %rcx
735; SSE41-NEXT:    sarq $63, %rcx
736; SSE41-NEXT:    pinsrd $2, %ecx, %xmm0
737; SSE41-NEXT:    shlq $60, %rax
738; SSE41-NEXT:    sarq $63, %rax
739; SSE41-NEXT:    pinsrd $3, %eax, %xmm0
740; SSE41-NEXT:    retq
741;
742; AVX-LABEL: load_sext_4i1_to_4i32:
743; AVX:       # BB#0: # %entry
744; AVX-NEXT:    movzbl (%rdi), %eax
745; AVX-NEXT:    movq %rax, %rcx
746; AVX-NEXT:    shlq $62, %rcx
747; AVX-NEXT:    sarq $63, %rcx
748; AVX-NEXT:    movq %rax, %rdx
749; AVX-NEXT:    shlq $63, %rdx
750; AVX-NEXT:    sarq $63, %rdx
751; AVX-NEXT:    vmovd %edx, %xmm0
752; AVX-NEXT:    vpinsrd $1, %ecx, %xmm0, %xmm0
753; AVX-NEXT:    movq %rax, %rcx
754; AVX-NEXT:    shlq $61, %rcx
755; AVX-NEXT:    sarq $63, %rcx
756; AVX-NEXT:    vpinsrd $2, %ecx, %xmm0, %xmm0
757; AVX-NEXT:    shlq $60, %rax
758; AVX-NEXT:    sarq $63, %rax
759; AVX-NEXT:    vpinsrd $3, %eax, %xmm0, %xmm0
760; AVX-NEXT:    retq
761;
762; X32-SSE41-LABEL: load_sext_4i1_to_4i32:
763; X32-SSE41:       # BB#0: # %entry
764; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
765; X32-SSE41-NEXT:    movl (%eax), %eax
766; X32-SSE41-NEXT:    movl %eax, %ecx
767; X32-SSE41-NEXT:    shll $30, %ecx
768; X32-SSE41-NEXT:    sarl $31, %ecx
769; X32-SSE41-NEXT:    movl %eax, %edx
770; X32-SSE41-NEXT:    shll $31, %edx
771; X32-SSE41-NEXT:    sarl $31, %edx
772; X32-SSE41-NEXT:    movd %edx, %xmm0
773; X32-SSE41-NEXT:    pinsrd $1, %ecx, %xmm0
774; X32-SSE41-NEXT:    movl %eax, %ecx
775; X32-SSE41-NEXT:    shll $29, %ecx
776; X32-SSE41-NEXT:    sarl $31, %ecx
777; X32-SSE41-NEXT:    pinsrd $2, %ecx, %xmm0
778; X32-SSE41-NEXT:    shll $28, %eax
779; X32-SSE41-NEXT:    sarl $31, %eax
780; X32-SSE41-NEXT:    pinsrd $3, %eax, %xmm0
781; X32-SSE41-NEXT:    retl
782entry:
783 %X = load <4 x i1>, <4 x i1>* %ptr
784 %Y = sext <4 x i1> %X to <4 x i32>
785 ret <4 x i32> %Y
786}
787
788define <4 x i32> @load_sext_4i8_to_4i32(<4 x i8> *%ptr) {
789; SSE2-LABEL: load_sext_4i8_to_4i32:
790; SSE2:       # BB#0: # %entry
791; SSE2-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
792; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
793; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
794; SSE2-NEXT:    psrad $24, %xmm0
795; SSE2-NEXT:    retq
796;
797; SSSE3-LABEL: load_sext_4i8_to_4i32:
798; SSSE3:       # BB#0: # %entry
799; SSSE3-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
800; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
801; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
802; SSSE3-NEXT:    psrad $24, %xmm0
803; SSSE3-NEXT:    retq
804;
805; SSE41-LABEL: load_sext_4i8_to_4i32:
806; SSE41:       # BB#0: # %entry
807; SSE41-NEXT:    pmovsxbd (%rdi), %xmm0
808; SSE41-NEXT:    retq
809;
810; AVX-LABEL: load_sext_4i8_to_4i32:
811; AVX:       # BB#0: # %entry
812; AVX-NEXT:    vpmovsxbd (%rdi), %xmm0
813; AVX-NEXT:    retq
814;
815; X32-SSE41-LABEL: load_sext_4i8_to_4i32:
816; X32-SSE41:       # BB#0: # %entry
817; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
818; X32-SSE41-NEXT:    pmovsxbd (%eax), %xmm0
819; X32-SSE41-NEXT:    retl
820entry:
821 %X = load <4 x i8>, <4 x i8>* %ptr
822 %Y = sext <4 x i8> %X to <4 x i32>
823 ret <4 x i32> %Y
824}
825
826define <4 x i64> @load_sext_4i1_to_4i64(<4 x i1> *%ptr) {
827; SSE2-LABEL: load_sext_4i1_to_4i64:
828; SSE2:       # BB#0: # %entry
829; SSE2-NEXT:    movzbl (%rdi), %eax
830; SSE2-NEXT:    movl %eax, %ecx
831; SSE2-NEXT:    shrl $3, %ecx
832; SSE2-NEXT:    andl $1, %ecx
833; SSE2-NEXT:    movd %ecx, %xmm0
834; SSE2-NEXT:    movl %eax, %ecx
835; SSE2-NEXT:    shrl %ecx
836; SSE2-NEXT:    andl $1, %ecx
837; SSE2-NEXT:    movd %ecx, %xmm1
838; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
839; SSE2-NEXT:    movl %eax, %ecx
840; SSE2-NEXT:    andl $1, %ecx
841; SSE2-NEXT:    movd %ecx, %xmm2
842; SSE2-NEXT:    shrl $2, %eax
843; SSE2-NEXT:    andl $1, %eax
844; SSE2-NEXT:    movd %eax, %xmm0
845; SSE2-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
846; SSE2-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
847; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,1,1,3]
848; SSE2-NEXT:    psllq $63, %xmm0
849; SSE2-NEXT:    psrad $31, %xmm0
850; SSE2-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
851; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[2,1,3,3]
852; SSE2-NEXT:    psllq $63, %xmm1
853; SSE2-NEXT:    psrad $31, %xmm1
854; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
855; SSE2-NEXT:    retq
856;
857; SSSE3-LABEL: load_sext_4i1_to_4i64:
858; SSSE3:       # BB#0: # %entry
859; SSSE3-NEXT:    movzbl (%rdi), %eax
860; SSSE3-NEXT:    movl %eax, %ecx
861; SSSE3-NEXT:    shrl $3, %ecx
862; SSSE3-NEXT:    andl $1, %ecx
863; SSSE3-NEXT:    movd %ecx, %xmm0
864; SSSE3-NEXT:    movl %eax, %ecx
865; SSSE3-NEXT:    shrl %ecx
866; SSSE3-NEXT:    andl $1, %ecx
867; SSSE3-NEXT:    movd %ecx, %xmm1
868; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
869; SSSE3-NEXT:    movl %eax, %ecx
870; SSSE3-NEXT:    andl $1, %ecx
871; SSSE3-NEXT:    movd %ecx, %xmm2
872; SSSE3-NEXT:    shrl $2, %eax
873; SSSE3-NEXT:    andl $1, %eax
874; SSSE3-NEXT:    movd %eax, %xmm0
875; SSSE3-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
876; SSSE3-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1]
877; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[0,1,1,3]
878; SSSE3-NEXT:    psllq $63, %xmm0
879; SSSE3-NEXT:    psrad $31, %xmm0
880; SSSE3-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
881; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[2,1,3,3]
882; SSSE3-NEXT:    psllq $63, %xmm1
883; SSSE3-NEXT:    psrad $31, %xmm1
884; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
885; SSSE3-NEXT:    retq
886;
887; SSE41-LABEL: load_sext_4i1_to_4i64:
888; SSE41:       # BB#0: # %entry
889; SSE41-NEXT:    movzbl (%rdi), %eax
890; SSE41-NEXT:    movl %eax, %ecx
891; SSE41-NEXT:    shrl %ecx
892; SSE41-NEXT:    andl $1, %ecx
893; SSE41-NEXT:    movl %eax, %edx
894; SSE41-NEXT:    andl $1, %edx
895; SSE41-NEXT:    movd %edx, %xmm1
896; SSE41-NEXT:    pinsrd $1, %ecx, %xmm1
897; SSE41-NEXT:    movl %eax, %ecx
898; SSE41-NEXT:    shrl $2, %ecx
899; SSE41-NEXT:    andl $1, %ecx
900; SSE41-NEXT:    pinsrd $2, %ecx, %xmm1
901; SSE41-NEXT:    shrl $3, %eax
902; SSE41-NEXT:    andl $1, %eax
903; SSE41-NEXT:    pinsrd $3, %eax, %xmm1
904; SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero
905; SSE41-NEXT:    psllq $63, %xmm0
906; SSE41-NEXT:    psrad $31, %xmm0
907; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
908; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,2,3,3]
909; SSE41-NEXT:    psllq $63, %xmm1
910; SSE41-NEXT:    psrad $31, %xmm1
911; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
912; SSE41-NEXT:    retq
913;
914; AVX1-LABEL: load_sext_4i1_to_4i64:
915; AVX1:       # BB#0: # %entry
916; AVX1-NEXT:    movzbl (%rdi), %eax
917; AVX1-NEXT:    movq %rax, %rcx
918; AVX1-NEXT:    shlq $62, %rcx
919; AVX1-NEXT:    sarq $63, %rcx
920; AVX1-NEXT:    movq %rax, %rdx
921; AVX1-NEXT:    shlq $63, %rdx
922; AVX1-NEXT:    sarq $63, %rdx
923; AVX1-NEXT:    vmovd %edx, %xmm0
924; AVX1-NEXT:    vpinsrd $1, %ecx, %xmm0, %xmm0
925; AVX1-NEXT:    movq %rax, %rcx
926; AVX1-NEXT:    shlq $61, %rcx
927; AVX1-NEXT:    sarq $63, %rcx
928; AVX1-NEXT:    vpinsrd $2, %ecx, %xmm0, %xmm0
929; AVX1-NEXT:    shlq $60, %rax
930; AVX1-NEXT:    sarq $63, %rax
931; AVX1-NEXT:    vpinsrd $3, %eax, %xmm0, %xmm0
932; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm1
933; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
934; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm0
935; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
936; AVX1-NEXT:    retq
937;
938; AVX2-LABEL: load_sext_4i1_to_4i64:
939; AVX2:       # BB#0: # %entry
940; AVX2-NEXT:    movzbl (%rdi), %eax
941; AVX2-NEXT:    movq %rax, %rcx
942; AVX2-NEXT:    shlq $60, %rcx
943; AVX2-NEXT:    sarq $63, %rcx
944; AVX2-NEXT:    vmovq %rcx, %xmm0
945; AVX2-NEXT:    movq %rax, %rcx
946; AVX2-NEXT:    shlq $61, %rcx
947; AVX2-NEXT:    sarq $63, %rcx
948; AVX2-NEXT:    vmovq %rcx, %xmm1
949; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
950; AVX2-NEXT:    movq %rax, %rcx
951; AVX2-NEXT:    shlq $62, %rcx
952; AVX2-NEXT:    sarq $63, %rcx
953; AVX2-NEXT:    vmovq %rcx, %xmm1
954; AVX2-NEXT:    shlq $63, %rax
955; AVX2-NEXT:    sarq $63, %rax
956; AVX2-NEXT:    vmovq %rax, %xmm2
957; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
958; AVX2-NEXT:    vinserti128 $1, %xmm0, %ymm1, %ymm0
959; AVX2-NEXT:    retq
960;
961; X32-SSE41-LABEL: load_sext_4i1_to_4i64:
962; X32-SSE41:       # BB#0: # %entry
963; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
964; X32-SSE41-NEXT:    movzbl (%eax), %eax
965; X32-SSE41-NEXT:    movl %eax, %ecx
966; X32-SSE41-NEXT:    shrl %ecx
967; X32-SSE41-NEXT:    andl $1, %ecx
968; X32-SSE41-NEXT:    movl %eax, %edx
969; X32-SSE41-NEXT:    andl $1, %edx
970; X32-SSE41-NEXT:    movd %edx, %xmm1
971; X32-SSE41-NEXT:    pinsrd $1, %ecx, %xmm1
972; X32-SSE41-NEXT:    movl %eax, %ecx
973; X32-SSE41-NEXT:    shrl $2, %ecx
974; X32-SSE41-NEXT:    andl $1, %ecx
975; X32-SSE41-NEXT:    pinsrd $2, %ecx, %xmm1
976; X32-SSE41-NEXT:    shrl $3, %eax
977; X32-SSE41-NEXT:    andl $1, %eax
978; X32-SSE41-NEXT:    pinsrd $3, %eax, %xmm1
979; X32-SSE41-NEXT:    pmovzxdq {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero
980; X32-SSE41-NEXT:    psllq $63, %xmm0
981; X32-SSE41-NEXT:    psrad $31, %xmm0
982; X32-SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3]
983; X32-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,2,3,3]
984; X32-SSE41-NEXT:    psllq $63, %xmm1
985; X32-SSE41-NEXT:    psrad $31, %xmm1
986; X32-SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
987; X32-SSE41-NEXT:    retl
988entry:
989 %X = load <4 x i1>, <4 x i1>* %ptr
990 %Y = sext <4 x i1> %X to <4 x i64>
991 ret <4 x i64> %Y
992}
993
994define <4 x i64> @load_sext_4i8_to_4i64(<4 x i8> *%ptr) {
995; SSE2-LABEL: load_sext_4i8_to_4i64:
996; SSE2:       # BB#0: # %entry
997; SSE2-NEXT:    movsbq 1(%rdi), %rax
998; SSE2-NEXT:    movd %rax, %xmm1
999; SSE2-NEXT:    movsbq (%rdi), %rax
1000; SSE2-NEXT:    movd %rax, %xmm0
1001; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1002; SSE2-NEXT:    movsbq 3(%rdi), %rax
1003; SSE2-NEXT:    movd %rax, %xmm2
1004; SSE2-NEXT:    movsbq 2(%rdi), %rax
1005; SSE2-NEXT:    movd %rax, %xmm1
1006; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
1007; SSE2-NEXT:    retq
1008;
1009; SSSE3-LABEL: load_sext_4i8_to_4i64:
1010; SSSE3:       # BB#0: # %entry
1011; SSSE3-NEXT:    movsbq 1(%rdi), %rax
1012; SSSE3-NEXT:    movd %rax, %xmm1
1013; SSSE3-NEXT:    movsbq (%rdi), %rax
1014; SSSE3-NEXT:    movd %rax, %xmm0
1015; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1016; SSSE3-NEXT:    movsbq 3(%rdi), %rax
1017; SSSE3-NEXT:    movd %rax, %xmm2
1018; SSSE3-NEXT:    movsbq 2(%rdi), %rax
1019; SSSE3-NEXT:    movd %rax, %xmm1
1020; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
1021; SSSE3-NEXT:    retq
1022;
1023; SSE41-LABEL: load_sext_4i8_to_4i64:
1024; SSE41:       # BB#0: # %entry
1025; SSE41-NEXT:    pmovsxbq (%rdi), %xmm0
1026; SSE41-NEXT:    pmovsxbq 2(%rdi), %xmm1
1027; SSE41-NEXT:    retq
1028;
1029; AVX1-LABEL: load_sext_4i8_to_4i64:
1030; AVX1:       # BB#0: # %entry
1031; AVX1-NEXT:    vpmovsxbd (%rdi), %xmm0
1032; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm1
1033; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
1034; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm0
1035; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
1036; AVX1-NEXT:    retq
1037;
1038; AVX2-LABEL: load_sext_4i8_to_4i64:
1039; AVX2:       # BB#0: # %entry
1040; AVX2-NEXT:    vpmovsxbq (%rdi), %ymm0
1041; AVX2-NEXT:    retq
1042;
1043; X32-SSE41-LABEL: load_sext_4i8_to_4i64:
1044; X32-SSE41:       # BB#0: # %entry
1045; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
1046; X32-SSE41-NEXT:    pmovsxbq (%eax), %xmm0
1047; X32-SSE41-NEXT:    pmovsxbq 2(%eax), %xmm1
1048; X32-SSE41-NEXT:    retl
1049entry:
1050 %X = load <4 x i8>, <4 x i8>* %ptr
1051 %Y = sext <4 x i8> %X to <4 x i64>
1052 ret <4 x i64> %Y
1053}
1054
1055define <8 x i16> @load_sext_8i1_to_8i16(<8 x i1> *%ptr) {
1056; SSE2-LABEL: load_sext_8i1_to_8i16:
1057; SSE2:       # BB#0: # %entry
1058; SSE2-NEXT:    movsbq (%rdi), %rax
1059; SSE2-NEXT:    movq %rax, %rcx
1060; SSE2-NEXT:    shrq $7, %rcx
1061; SSE2-NEXT:    movd %ecx, %xmm0
1062; SSE2-NEXT:    movq %rax, %rcx
1063; SSE2-NEXT:    shlq $60, %rcx
1064; SSE2-NEXT:    sarq $63, %rcx
1065; SSE2-NEXT:    movd %ecx, %xmm2
1066; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
1067; SSE2-NEXT:    movq %rax, %rcx
1068; SSE2-NEXT:    shlq $58, %rcx
1069; SSE2-NEXT:    sarq $63, %rcx
1070; SSE2-NEXT:    movd %ecx, %xmm0
1071; SSE2-NEXT:    movq %rax, %rcx
1072; SSE2-NEXT:    shlq $62, %rcx
1073; SSE2-NEXT:    sarq $63, %rcx
1074; SSE2-NEXT:    movd %ecx, %xmm1
1075; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1076; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
1077; SSE2-NEXT:    movq %rax, %rcx
1078; SSE2-NEXT:    shlq $57, %rcx
1079; SSE2-NEXT:    sarq $63, %rcx
1080; SSE2-NEXT:    movd %ecx, %xmm0
1081; SSE2-NEXT:    movq %rax, %rcx
1082; SSE2-NEXT:    shlq $61, %rcx
1083; SSE2-NEXT:    sarq $63, %rcx
1084; SSE2-NEXT:    movd %ecx, %xmm2
1085; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
1086; SSE2-NEXT:    movq %rax, %rcx
1087; SSE2-NEXT:    shlq $59, %rcx
1088; SSE2-NEXT:    sarq $63, %rcx
1089; SSE2-NEXT:    movd %ecx, %xmm3
1090; SSE2-NEXT:    shlq $63, %rax
1091; SSE2-NEXT:    sarq $63, %rax
1092; SSE2-NEXT:    movd %eax, %xmm0
1093; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
1094; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1095; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1096; SSE2-NEXT:    retq
1097;
1098; SSSE3-LABEL: load_sext_8i1_to_8i16:
1099; SSSE3:       # BB#0: # %entry
1100; SSSE3-NEXT:    movsbq (%rdi), %rax
1101; SSSE3-NEXT:    movq %rax, %rcx
1102; SSSE3-NEXT:    shrq $7, %rcx
1103; SSSE3-NEXT:    movd %ecx, %xmm0
1104; SSSE3-NEXT:    movq %rax, %rcx
1105; SSSE3-NEXT:    shlq $60, %rcx
1106; SSSE3-NEXT:    sarq $63, %rcx
1107; SSSE3-NEXT:    movd %ecx, %xmm2
1108; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
1109; SSSE3-NEXT:    movq %rax, %rcx
1110; SSSE3-NEXT:    shlq $58, %rcx
1111; SSSE3-NEXT:    sarq $63, %rcx
1112; SSSE3-NEXT:    movd %ecx, %xmm0
1113; SSSE3-NEXT:    movq %rax, %rcx
1114; SSSE3-NEXT:    shlq $62, %rcx
1115; SSSE3-NEXT:    sarq $63, %rcx
1116; SSSE3-NEXT:    movd %ecx, %xmm1
1117; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1118; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
1119; SSSE3-NEXT:    movq %rax, %rcx
1120; SSSE3-NEXT:    shlq $57, %rcx
1121; SSSE3-NEXT:    sarq $63, %rcx
1122; SSSE3-NEXT:    movd %ecx, %xmm0
1123; SSSE3-NEXT:    movq %rax, %rcx
1124; SSSE3-NEXT:    shlq $61, %rcx
1125; SSSE3-NEXT:    sarq $63, %rcx
1126; SSSE3-NEXT:    movd %ecx, %xmm2
1127; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
1128; SSSE3-NEXT:    movq %rax, %rcx
1129; SSSE3-NEXT:    shlq $59, %rcx
1130; SSSE3-NEXT:    sarq $63, %rcx
1131; SSSE3-NEXT:    movd %ecx, %xmm3
1132; SSSE3-NEXT:    shlq $63, %rax
1133; SSSE3-NEXT:    sarq $63, %rax
1134; SSSE3-NEXT:    movd %eax, %xmm0
1135; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
1136; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3]
1137; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3]
1138; SSSE3-NEXT:    retq
1139;
1140; SSE41-LABEL: load_sext_8i1_to_8i16:
1141; SSE41:       # BB#0: # %entry
1142; SSE41-NEXT:    movsbq (%rdi), %rax
1143; SSE41-NEXT:    movq %rax, %rcx
1144; SSE41-NEXT:    shlq $62, %rcx
1145; SSE41-NEXT:    sarq $63, %rcx
1146; SSE41-NEXT:    movq %rax, %rdx
1147; SSE41-NEXT:    shlq $63, %rdx
1148; SSE41-NEXT:    sarq $63, %rdx
1149; SSE41-NEXT:    movd %edx, %xmm0
1150; SSE41-NEXT:    pinsrw $1, %ecx, %xmm0
1151; SSE41-NEXT:    movq %rax, %rcx
1152; SSE41-NEXT:    shlq $61, %rcx
1153; SSE41-NEXT:    sarq $63, %rcx
1154; SSE41-NEXT:    pinsrw $2, %ecx, %xmm0
1155; SSE41-NEXT:    movq %rax, %rcx
1156; SSE41-NEXT:    shlq $60, %rcx
1157; SSE41-NEXT:    sarq $63, %rcx
1158; SSE41-NEXT:    pinsrw $3, %ecx, %xmm0
1159; SSE41-NEXT:    movq %rax, %rcx
1160; SSE41-NEXT:    shlq $59, %rcx
1161; SSE41-NEXT:    sarq $63, %rcx
1162; SSE41-NEXT:    pinsrw $4, %ecx, %xmm0
1163; SSE41-NEXT:    movq %rax, %rcx
1164; SSE41-NEXT:    shlq $58, %rcx
1165; SSE41-NEXT:    sarq $63, %rcx
1166; SSE41-NEXT:    pinsrw $5, %ecx, %xmm0
1167; SSE41-NEXT:    movq %rax, %rcx
1168; SSE41-NEXT:    shlq $57, %rcx
1169; SSE41-NEXT:    sarq $63, %rcx
1170; SSE41-NEXT:    pinsrw $6, %ecx, %xmm0
1171; SSE41-NEXT:    shrq $7, %rax
1172; SSE41-NEXT:    pinsrw $7, %eax, %xmm0
1173; SSE41-NEXT:    retq
1174;
1175; AVX-LABEL: load_sext_8i1_to_8i16:
1176; AVX:       # BB#0: # %entry
1177; AVX-NEXT:    movsbq (%rdi), %rax
1178; AVX-NEXT:    movq %rax, %rcx
1179; AVX-NEXT:    shlq $62, %rcx
1180; AVX-NEXT:    sarq $63, %rcx
1181; AVX-NEXT:    movq %rax, %rdx
1182; AVX-NEXT:    shlq $63, %rdx
1183; AVX-NEXT:    sarq $63, %rdx
1184; AVX-NEXT:    vmovd %edx, %xmm0
1185; AVX-NEXT:    vpinsrw $1, %ecx, %xmm0, %xmm0
1186; AVX-NEXT:    movq %rax, %rcx
1187; AVX-NEXT:    shlq $61, %rcx
1188; AVX-NEXT:    sarq $63, %rcx
1189; AVX-NEXT:    vpinsrw $2, %ecx, %xmm0, %xmm0
1190; AVX-NEXT:    movq %rax, %rcx
1191; AVX-NEXT:    shlq $60, %rcx
1192; AVX-NEXT:    sarq $63, %rcx
1193; AVX-NEXT:    vpinsrw $3, %ecx, %xmm0, %xmm0
1194; AVX-NEXT:    movq %rax, %rcx
1195; AVX-NEXT:    shlq $59, %rcx
1196; AVX-NEXT:    sarq $63, %rcx
1197; AVX-NEXT:    vpinsrw $4, %ecx, %xmm0, %xmm0
1198; AVX-NEXT:    movq %rax, %rcx
1199; AVX-NEXT:    shlq $58, %rcx
1200; AVX-NEXT:    sarq $63, %rcx
1201; AVX-NEXT:    vpinsrw $5, %ecx, %xmm0, %xmm0
1202; AVX-NEXT:    movq %rax, %rcx
1203; AVX-NEXT:    shlq $57, %rcx
1204; AVX-NEXT:    sarq $63, %rcx
1205; AVX-NEXT:    vpinsrw $6, %ecx, %xmm0, %xmm0
1206; AVX-NEXT:    shrq $7, %rax
1207; AVX-NEXT:    vpinsrw $7, %eax, %xmm0, %xmm0
1208; AVX-NEXT:    retq
1209;
1210; X32-SSE41-LABEL: load_sext_8i1_to_8i16:
1211; X32-SSE41:       # BB#0: # %entry
1212; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
1213; X32-SSE41-NEXT:    movsbl (%eax), %eax
1214; X32-SSE41-NEXT:    movl %eax, %ecx
1215; X32-SSE41-NEXT:    shll $30, %ecx
1216; X32-SSE41-NEXT:    sarl $31, %ecx
1217; X32-SSE41-NEXT:    movl %eax, %edx
1218; X32-SSE41-NEXT:    shll $31, %edx
1219; X32-SSE41-NEXT:    sarl $31, %edx
1220; X32-SSE41-NEXT:    movd %edx, %xmm0
1221; X32-SSE41-NEXT:    pinsrw $1, %ecx, %xmm0
1222; X32-SSE41-NEXT:    movl %eax, %ecx
1223; X32-SSE41-NEXT:    shll $29, %ecx
1224; X32-SSE41-NEXT:    sarl $31, %ecx
1225; X32-SSE41-NEXT:    pinsrw $2, %ecx, %xmm0
1226; X32-SSE41-NEXT:    movl %eax, %ecx
1227; X32-SSE41-NEXT:    shll $28, %ecx
1228; X32-SSE41-NEXT:    sarl $31, %ecx
1229; X32-SSE41-NEXT:    pinsrw $3, %ecx, %xmm0
1230; X32-SSE41-NEXT:    movl %eax, %ecx
1231; X32-SSE41-NEXT:    shll $27, %ecx
1232; X32-SSE41-NEXT:    sarl $31, %ecx
1233; X32-SSE41-NEXT:    pinsrw $4, %ecx, %xmm0
1234; X32-SSE41-NEXT:    movl %eax, %ecx
1235; X32-SSE41-NEXT:    shll $26, %ecx
1236; X32-SSE41-NEXT:    sarl $31, %ecx
1237; X32-SSE41-NEXT:    pinsrw $5, %ecx, %xmm0
1238; X32-SSE41-NEXT:    movl %eax, %ecx
1239; X32-SSE41-NEXT:    shll $25, %ecx
1240; X32-SSE41-NEXT:    sarl $31, %ecx
1241; X32-SSE41-NEXT:    pinsrw $6, %ecx, %xmm0
1242; X32-SSE41-NEXT:    shrl $7, %eax
1243; X32-SSE41-NEXT:    pinsrw $7, %eax, %xmm0
1244; X32-SSE41-NEXT:    retl
1245entry:
1246 %X = load <8 x i1>, <8 x i1>* %ptr
1247 %Y = sext <8 x i1> %X to <8 x i16>
1248 ret <8 x i16> %Y
1249}
1250
1251define <8 x i16> @load_sext_8i8_to_8i16(<8 x i8> *%ptr) {
1252; SSE2-LABEL: load_sext_8i8_to_8i16:
1253; SSE2:       # BB#0: # %entry
1254; SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
1255; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1256; SSE2-NEXT:    psraw $8, %xmm0
1257; SSE2-NEXT:    retq
1258;
1259; SSSE3-LABEL: load_sext_8i8_to_8i16:
1260; SSSE3:       # BB#0: # %entry
1261; SSSE3-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
1262; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1263; SSSE3-NEXT:    psraw $8, %xmm0
1264; SSSE3-NEXT:    retq
1265;
1266; SSE41-LABEL: load_sext_8i8_to_8i16:
1267; SSE41:       # BB#0: # %entry
1268; SSE41-NEXT:    pmovsxbw (%rdi), %xmm0
1269; SSE41-NEXT:    retq
1270;
1271; AVX-LABEL: load_sext_8i8_to_8i16:
1272; AVX:       # BB#0: # %entry
1273; AVX-NEXT:    vpmovsxbw (%rdi), %xmm0
1274; AVX-NEXT:    retq
1275;
1276; X32-SSE41-LABEL: load_sext_8i8_to_8i16:
1277; X32-SSE41:       # BB#0: # %entry
1278; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
1279; X32-SSE41-NEXT:    pmovsxbw (%eax), %xmm0
1280; X32-SSE41-NEXT:    retl
1281entry:
1282 %X = load <8 x i8>, <8 x i8>* %ptr
1283 %Y = sext <8 x i8> %X to <8 x i16>
1284 ret <8 x i16> %Y
1285}
1286
1287define <8 x i64> @load_sext_8i8_to_8i64(<8 x i8> *%ptr) {
1288; SSE2-LABEL: load_sext_8i8_to_8i64:
1289; SSE2:       # BB#0: # %entry
1290; SSE2-NEXT:    movsbq 1(%rdi), %rax
1291; SSE2-NEXT:    movd %rax, %xmm1
1292; SSE2-NEXT:    movsbq (%rdi), %rax
1293; SSE2-NEXT:    movd %rax, %xmm0
1294; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1295; SSE2-NEXT:    movsbq 3(%rdi), %rax
1296; SSE2-NEXT:    movd %rax, %xmm2
1297; SSE2-NEXT:    movsbq 2(%rdi), %rax
1298; SSE2-NEXT:    movd %rax, %xmm1
1299; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
1300; SSE2-NEXT:    movsbq 5(%rdi), %rax
1301; SSE2-NEXT:    movd %rax, %xmm3
1302; SSE2-NEXT:    movsbq 4(%rdi), %rax
1303; SSE2-NEXT:    movd %rax, %xmm2
1304; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1305; SSE2-NEXT:    movsbq 7(%rdi), %rax
1306; SSE2-NEXT:    movd %rax, %xmm4
1307; SSE2-NEXT:    movsbq 6(%rdi), %rax
1308; SSE2-NEXT:    movd %rax, %xmm3
1309; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0]
1310; SSE2-NEXT:    retq
1311;
1312; SSSE3-LABEL: load_sext_8i8_to_8i64:
1313; SSSE3:       # BB#0: # %entry
1314; SSSE3-NEXT:    movsbq 1(%rdi), %rax
1315; SSSE3-NEXT:    movd %rax, %xmm1
1316; SSSE3-NEXT:    movsbq (%rdi), %rax
1317; SSSE3-NEXT:    movd %rax, %xmm0
1318; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1319; SSSE3-NEXT:    movsbq 3(%rdi), %rax
1320; SSSE3-NEXT:    movd %rax, %xmm2
1321; SSSE3-NEXT:    movsbq 2(%rdi), %rax
1322; SSSE3-NEXT:    movd %rax, %xmm1
1323; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
1324; SSSE3-NEXT:    movsbq 5(%rdi), %rax
1325; SSSE3-NEXT:    movd %rax, %xmm3
1326; SSSE3-NEXT:    movsbq 4(%rdi), %rax
1327; SSSE3-NEXT:    movd %rax, %xmm2
1328; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1329; SSSE3-NEXT:    movsbq 7(%rdi), %rax
1330; SSSE3-NEXT:    movd %rax, %xmm4
1331; SSSE3-NEXT:    movsbq 6(%rdi), %rax
1332; SSSE3-NEXT:    movd %rax, %xmm3
1333; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm4[0]
1334; SSSE3-NEXT:    retq
1335;
1336; SSE41-LABEL: load_sext_8i8_to_8i64:
1337; SSE41:       # BB#0: # %entry
1338; SSE41-NEXT:    pmovsxbq (%rdi), %xmm0
1339; SSE41-NEXT:    pmovsxbq 2(%rdi), %xmm1
1340; SSE41-NEXT:    pmovsxbq 4(%rdi), %xmm2
1341; SSE41-NEXT:    pmovsxbq 6(%rdi), %xmm3
1342; SSE41-NEXT:    retq
1343;
1344; AVX1-LABEL: load_sext_8i8_to_8i64:
1345; AVX1:       # BB#0: # %entry
1346; AVX1-NEXT:    vpmovsxbd (%rdi), %xmm0
1347; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm1
1348; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
1349; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm0
1350; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
1351; AVX1-NEXT:    vpmovsxbd 4(%rdi), %xmm1
1352; AVX1-NEXT:    vpmovsxdq %xmm1, %xmm2
1353; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
1354; AVX1-NEXT:    vpmovsxdq %xmm1, %xmm1
1355; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
1356; AVX1-NEXT:    retq
1357;
1358; AVX2-LABEL: load_sext_8i8_to_8i64:
1359; AVX2:       # BB#0: # %entry
1360; AVX2-NEXT:    vpmovsxbq (%rdi), %ymm0
1361; AVX2-NEXT:    vpmovsxbq 4(%rdi), %ymm1
1362; AVX2-NEXT:    retq
1363;
1364; X32-SSE41-LABEL: load_sext_8i8_to_8i64:
1365; X32-SSE41:       # BB#0: # %entry
1366; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
1367; X32-SSE41-NEXT:    pmovsxbq (%eax), %xmm0
1368; X32-SSE41-NEXT:    pmovsxbq 2(%eax), %xmm1
1369; X32-SSE41-NEXT:    pmovsxbq 4(%eax), %xmm2
1370; X32-SSE41-NEXT:    pmovsxbq 6(%eax), %xmm3
1371; X32-SSE41-NEXT:    retl
1372entry:
1373 %X = load <8 x i8>, <8 x i8>* %ptr
1374 %Y = sext <8 x i8> %X to <8 x i64>
1375 ret <8 x i64> %Y
1376}
1377
1378define <8 x i32> @load_sext_8i1_to_8i32(<8 x i1> *%ptr) {
1379; SSE2-LABEL: load_sext_8i1_to_8i32:
1380; SSE2:       # BB#0: # %entry
1381; SSE2-NEXT:    movzbl (%rdi), %eax
1382; SSE2-NEXT:    movl %eax, %ecx
1383; SSE2-NEXT:    shrl $6, %ecx
1384; SSE2-NEXT:    andl $1, %ecx
1385; SSE2-NEXT:    movd %ecx, %xmm0
1386; SSE2-NEXT:    movl %eax, %ecx
1387; SSE2-NEXT:    shrl $2, %ecx
1388; SSE2-NEXT:    andl $1, %ecx
1389; SSE2-NEXT:    movd %ecx, %xmm2
1390; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
1391; SSE2-NEXT:    movl %eax, %ecx
1392; SSE2-NEXT:    andl $1, %ecx
1393; SSE2-NEXT:    movd %ecx, %xmm1
1394; SSE2-NEXT:    movl %eax, %ecx
1395; SSE2-NEXT:    shrl $4, %ecx
1396; SSE2-NEXT:    andl $1, %ecx
1397; SSE2-NEXT:    movd %ecx, %xmm0
1398; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1399; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
1400; SSE2-NEXT:    movl %eax, %ecx
1401; SSE2-NEXT:    shrl $5, %ecx
1402; SSE2-NEXT:    andl $1, %ecx
1403; SSE2-NEXT:    movd %ecx, %xmm0
1404; SSE2-NEXT:    movl %eax, %ecx
1405; SSE2-NEXT:    shrl %ecx
1406; SSE2-NEXT:    andl $1, %ecx
1407; SSE2-NEXT:    movd %ecx, %xmm2
1408; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
1409; SSE2-NEXT:    movl %eax, %ecx
1410; SSE2-NEXT:    shrl $3, %ecx
1411; SSE2-NEXT:    andl $1, %ecx
1412; SSE2-NEXT:    movd %ecx, %xmm0
1413; SSE2-NEXT:    shrl $7, %eax
1414; SSE2-NEXT:    movzwl %ax, %eax
1415; SSE2-NEXT:    movd %eax, %xmm3
1416; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
1417; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
1418; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
1419; SSE2-NEXT:    movdqa %xmm1, %xmm0
1420; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
1421; SSE2-NEXT:    pslld $31, %xmm0
1422; SSE2-NEXT:    psrad $31, %xmm0
1423; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1424; SSE2-NEXT:    pslld $31, %xmm1
1425; SSE2-NEXT:    psrad $31, %xmm1
1426; SSE2-NEXT:    retq
1427;
1428; SSSE3-LABEL: load_sext_8i1_to_8i32:
1429; SSSE3:       # BB#0: # %entry
1430; SSSE3-NEXT:    movzbl (%rdi), %eax
1431; SSSE3-NEXT:    movl %eax, %ecx
1432; SSSE3-NEXT:    shrl $6, %ecx
1433; SSSE3-NEXT:    andl $1, %ecx
1434; SSSE3-NEXT:    movd %ecx, %xmm0
1435; SSSE3-NEXT:    movl %eax, %ecx
1436; SSSE3-NEXT:    shrl $2, %ecx
1437; SSSE3-NEXT:    andl $1, %ecx
1438; SSSE3-NEXT:    movd %ecx, %xmm2
1439; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
1440; SSSE3-NEXT:    movl %eax, %ecx
1441; SSSE3-NEXT:    andl $1, %ecx
1442; SSSE3-NEXT:    movd %ecx, %xmm1
1443; SSSE3-NEXT:    movl %eax, %ecx
1444; SSSE3-NEXT:    shrl $4, %ecx
1445; SSSE3-NEXT:    andl $1, %ecx
1446; SSSE3-NEXT:    movd %ecx, %xmm0
1447; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3]
1448; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
1449; SSSE3-NEXT:    movl %eax, %ecx
1450; SSSE3-NEXT:    shrl $5, %ecx
1451; SSSE3-NEXT:    andl $1, %ecx
1452; SSSE3-NEXT:    movd %ecx, %xmm0
1453; SSSE3-NEXT:    movl %eax, %ecx
1454; SSSE3-NEXT:    shrl %ecx
1455; SSSE3-NEXT:    andl $1, %ecx
1456; SSSE3-NEXT:    movd %ecx, %xmm2
1457; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
1458; SSSE3-NEXT:    movl %eax, %ecx
1459; SSSE3-NEXT:    shrl $3, %ecx
1460; SSSE3-NEXT:    andl $1, %ecx
1461; SSSE3-NEXT:    movd %ecx, %xmm0
1462; SSSE3-NEXT:    shrl $7, %eax
1463; SSSE3-NEXT:    movzwl %ax, %eax
1464; SSSE3-NEXT:    movd %eax, %xmm3
1465; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3]
1466; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
1467; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3]
1468; SSSE3-NEXT:    movdqa %xmm1, %xmm0
1469; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
1470; SSSE3-NEXT:    pslld $31, %xmm0
1471; SSSE3-NEXT:    psrad $31, %xmm0
1472; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1473; SSSE3-NEXT:    pslld $31, %xmm1
1474; SSSE3-NEXT:    psrad $31, %xmm1
1475; SSSE3-NEXT:    retq
1476;
1477; SSE41-LABEL: load_sext_8i1_to_8i32:
1478; SSE41:       # BB#0: # %entry
1479; SSE41-NEXT:    movzbl (%rdi), %eax
1480; SSE41-NEXT:    movl %eax, %ecx
1481; SSE41-NEXT:    shrl %ecx
1482; SSE41-NEXT:    andl $1, %ecx
1483; SSE41-NEXT:    movl %eax, %edx
1484; SSE41-NEXT:    andl $1, %edx
1485; SSE41-NEXT:    movd %edx, %xmm1
1486; SSE41-NEXT:    pinsrw $1, %ecx, %xmm1
1487; SSE41-NEXT:    movl %eax, %ecx
1488; SSE41-NEXT:    shrl $2, %ecx
1489; SSE41-NEXT:    andl $1, %ecx
1490; SSE41-NEXT:    pinsrw $2, %ecx, %xmm1
1491; SSE41-NEXT:    movl %eax, %ecx
1492; SSE41-NEXT:    shrl $3, %ecx
1493; SSE41-NEXT:    andl $1, %ecx
1494; SSE41-NEXT:    pinsrw $3, %ecx, %xmm1
1495; SSE41-NEXT:    movl %eax, %ecx
1496; SSE41-NEXT:    shrl $4, %ecx
1497; SSE41-NEXT:    andl $1, %ecx
1498; SSE41-NEXT:    pinsrw $4, %ecx, %xmm1
1499; SSE41-NEXT:    movl %eax, %ecx
1500; SSE41-NEXT:    shrl $5, %ecx
1501; SSE41-NEXT:    andl $1, %ecx
1502; SSE41-NEXT:    pinsrw $5, %ecx, %xmm1
1503; SSE41-NEXT:    movl %eax, %ecx
1504; SSE41-NEXT:    shrl $6, %ecx
1505; SSE41-NEXT:    andl $1, %ecx
1506; SSE41-NEXT:    pinsrw $6, %ecx, %xmm1
1507; SSE41-NEXT:    shrl $7, %eax
1508; SSE41-NEXT:    movzwl %ax, %eax
1509; SSE41-NEXT:    pinsrw $7, %eax, %xmm1
1510; SSE41-NEXT:    pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
1511; SSE41-NEXT:    pslld $31, %xmm0
1512; SSE41-NEXT:    psrad $31, %xmm0
1513; SSE41-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1514; SSE41-NEXT:    pslld $31, %xmm1
1515; SSE41-NEXT:    psrad $31, %xmm1
1516; SSE41-NEXT:    retq
1517;
1518; AVX1-LABEL: load_sext_8i1_to_8i32:
1519; AVX1:       # BB#0: # %entry
1520; AVX1-NEXT:    movsbq (%rdi), %rax
1521; AVX1-NEXT:    movq %rax, %rcx
1522; AVX1-NEXT:    shlq $58, %rcx
1523; AVX1-NEXT:    sarq $63, %rcx
1524; AVX1-NEXT:    movq %rax, %rdx
1525; AVX1-NEXT:    shlq $59, %rdx
1526; AVX1-NEXT:    sarq $63, %rdx
1527; AVX1-NEXT:    vmovd %edx, %xmm0
1528; AVX1-NEXT:    vpinsrd $1, %ecx, %xmm0, %xmm0
1529; AVX1-NEXT:    movq %rax, %rcx
1530; AVX1-NEXT:    shlq $57, %rcx
1531; AVX1-NEXT:    sarq $63, %rcx
1532; AVX1-NEXT:    vpinsrd $2, %ecx, %xmm0, %xmm0
1533; AVX1-NEXT:    movq %rax, %rcx
1534; AVX1-NEXT:    shrq $7, %rcx
1535; AVX1-NEXT:    vpinsrd $3, %ecx, %xmm0, %xmm0
1536; AVX1-NEXT:    movq %rax, %rcx
1537; AVX1-NEXT:    shlq $62, %rcx
1538; AVX1-NEXT:    sarq $63, %rcx
1539; AVX1-NEXT:    movq %rax, %rdx
1540; AVX1-NEXT:    shlq $63, %rdx
1541; AVX1-NEXT:    sarq $63, %rdx
1542; AVX1-NEXT:    vmovd %edx, %xmm1
1543; AVX1-NEXT:    vpinsrd $1, %ecx, %xmm1, %xmm1
1544; AVX1-NEXT:    movq %rax, %rcx
1545; AVX1-NEXT:    shlq $61, %rcx
1546; AVX1-NEXT:    sarq $63, %rcx
1547; AVX1-NEXT:    vpinsrd $2, %ecx, %xmm1, %xmm1
1548; AVX1-NEXT:    shlq $60, %rax
1549; AVX1-NEXT:    sarq $63, %rax
1550; AVX1-NEXT:    vpinsrd $3, %eax, %xmm1, %xmm1
1551; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
1552; AVX1-NEXT:    retq
1553;
1554; AVX2-LABEL: load_sext_8i1_to_8i32:
1555; AVX2:       # BB#0: # %entry
1556; AVX2-NEXT:    movsbq (%rdi), %rax
1557; AVX2-NEXT:    movq %rax, %rcx
1558; AVX2-NEXT:    shlq $58, %rcx
1559; AVX2-NEXT:    sarq $63, %rcx
1560; AVX2-NEXT:    movq %rax, %rdx
1561; AVX2-NEXT:    shlq $59, %rdx
1562; AVX2-NEXT:    sarq $63, %rdx
1563; AVX2-NEXT:    vmovd %edx, %xmm0
1564; AVX2-NEXT:    vpinsrd $1, %ecx, %xmm0, %xmm0
1565; AVX2-NEXT:    movq %rax, %rcx
1566; AVX2-NEXT:    shlq $57, %rcx
1567; AVX2-NEXT:    sarq $63, %rcx
1568; AVX2-NEXT:    vpinsrd $2, %ecx, %xmm0, %xmm0
1569; AVX2-NEXT:    movq %rax, %rcx
1570; AVX2-NEXT:    shrq $7, %rcx
1571; AVX2-NEXT:    vpinsrd $3, %ecx, %xmm0, %xmm0
1572; AVX2-NEXT:    movq %rax, %rcx
1573; AVX2-NEXT:    shlq $62, %rcx
1574; AVX2-NEXT:    sarq $63, %rcx
1575; AVX2-NEXT:    movq %rax, %rdx
1576; AVX2-NEXT:    shlq $63, %rdx
1577; AVX2-NEXT:    sarq $63, %rdx
1578; AVX2-NEXT:    vmovd %edx, %xmm1
1579; AVX2-NEXT:    vpinsrd $1, %ecx, %xmm1, %xmm1
1580; AVX2-NEXT:    movq %rax, %rcx
1581; AVX2-NEXT:    shlq $61, %rcx
1582; AVX2-NEXT:    sarq $63, %rcx
1583; AVX2-NEXT:    vpinsrd $2, %ecx, %xmm1, %xmm1
1584; AVX2-NEXT:    shlq $60, %rax
1585; AVX2-NEXT:    sarq $63, %rax
1586; AVX2-NEXT:    vpinsrd $3, %eax, %xmm1, %xmm1
1587; AVX2-NEXT:    vinserti128 $1, %xmm0, %ymm1, %ymm0
1588; AVX2-NEXT:    retq
1589;
1590; X32-SSE41-LABEL: load_sext_8i1_to_8i32:
1591; X32-SSE41:       # BB#0: # %entry
1592; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
1593; X32-SSE41-NEXT:    movzbl (%eax), %eax
1594; X32-SSE41-NEXT:    movl %eax, %ecx
1595; X32-SSE41-NEXT:    shrl %ecx
1596; X32-SSE41-NEXT:    andl $1, %ecx
1597; X32-SSE41-NEXT:    movl %eax, %edx
1598; X32-SSE41-NEXT:    andl $1, %edx
1599; X32-SSE41-NEXT:    movd %edx, %xmm1
1600; X32-SSE41-NEXT:    pinsrw $1, %ecx, %xmm1
1601; X32-SSE41-NEXT:    movl %eax, %ecx
1602; X32-SSE41-NEXT:    shrl $2, %ecx
1603; X32-SSE41-NEXT:    andl $1, %ecx
1604; X32-SSE41-NEXT:    pinsrw $2, %ecx, %xmm1
1605; X32-SSE41-NEXT:    movl %eax, %ecx
1606; X32-SSE41-NEXT:    shrl $3, %ecx
1607; X32-SSE41-NEXT:    andl $1, %ecx
1608; X32-SSE41-NEXT:    pinsrw $3, %ecx, %xmm1
1609; X32-SSE41-NEXT:    movl %eax, %ecx
1610; X32-SSE41-NEXT:    shrl $4, %ecx
1611; X32-SSE41-NEXT:    andl $1, %ecx
1612; X32-SSE41-NEXT:    pinsrw $4, %ecx, %xmm1
1613; X32-SSE41-NEXT:    movl %eax, %ecx
1614; X32-SSE41-NEXT:    shrl $5, %ecx
1615; X32-SSE41-NEXT:    andl $1, %ecx
1616; X32-SSE41-NEXT:    pinsrw $5, %ecx, %xmm1
1617; X32-SSE41-NEXT:    movl %eax, %ecx
1618; X32-SSE41-NEXT:    shrl $6, %ecx
1619; X32-SSE41-NEXT:    andl $1, %ecx
1620; X32-SSE41-NEXT:    pinsrw $6, %ecx, %xmm1
1621; X32-SSE41-NEXT:    shrl $7, %eax
1622; X32-SSE41-NEXT:    pinsrw $7, %eax, %xmm1
1623; X32-SSE41-NEXT:    pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero
1624; X32-SSE41-NEXT:    pslld $31, %xmm0
1625; X32-SSE41-NEXT:    psrad $31, %xmm0
1626; X32-SSE41-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1627; X32-SSE41-NEXT:    pslld $31, %xmm1
1628; X32-SSE41-NEXT:    psrad $31, %xmm1
1629; X32-SSE41-NEXT:    retl
1630entry:
1631 %X = load <8 x i1>, <8 x i1>* %ptr
1632 %Y = sext <8 x i1> %X to <8 x i32>
1633 ret <8 x i32> %Y
1634}
1635
1636define <8 x i32> @load_sext_8i8_to_8i32(<8 x i8> *%ptr) {
1637; SSE2-LABEL: load_sext_8i8_to_8i32:
1638; SSE2:       # BB#0: # %entry
1639; SSE2-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1640; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1641; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
1642; SSE2-NEXT:    psrad $24, %xmm0
1643; SSE2-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
1644; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1645; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3]
1646; SSE2-NEXT:    psrad $24, %xmm1
1647; SSE2-NEXT:    retq
1648;
1649; SSSE3-LABEL: load_sext_8i8_to_8i32:
1650; SSSE3:       # BB#0: # %entry
1651; SSSE3-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
1652; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1653; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
1654; SSSE3-NEXT:    psrad $24, %xmm0
1655; SSSE3-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
1656; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
1657; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3]
1658; SSSE3-NEXT:    psrad $24, %xmm1
1659; SSSE3-NEXT:    retq
1660;
1661; SSE41-LABEL: load_sext_8i8_to_8i32:
1662; SSE41:       # BB#0: # %entry
1663; SSE41-NEXT:    pmovsxbd (%rdi), %xmm0
1664; SSE41-NEXT:    pmovsxbd 4(%rdi), %xmm1
1665; SSE41-NEXT:    retq
1666;
1667; AVX1-LABEL: load_sext_8i8_to_8i32:
1668; AVX1:       # BB#0: # %entry
1669; AVX1-NEXT:    vpmovsxbw (%rdi), %xmm0
1670; AVX1-NEXT:    vpmovsxwd %xmm0, %xmm1
1671; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
1672; AVX1-NEXT:    vpmovsxwd %xmm0, %xmm0
1673; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
1674; AVX1-NEXT:    retq
1675;
1676; AVX2-LABEL: load_sext_8i8_to_8i32:
1677; AVX2:       # BB#0: # %entry
1678; AVX2-NEXT:    vpmovsxbd (%rdi), %ymm0
1679; AVX2-NEXT:    retq
1680;
1681; X32-SSE41-LABEL: load_sext_8i8_to_8i32:
1682; X32-SSE41:       # BB#0: # %entry
1683; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
1684; X32-SSE41-NEXT:    pmovsxbd (%eax), %xmm0
1685; X32-SSE41-NEXT:    pmovsxbd 4(%eax), %xmm1
1686; X32-SSE41-NEXT:    retl
1687entry:
1688 %X = load <8 x i8>, <8 x i8>* %ptr
1689 %Y = sext <8 x i8> %X to <8 x i32>
1690 ret <8 x i32> %Y
1691}
1692
1693define <16 x i8> @load_sext_16i1_to_16i8(<16 x i1> *%ptr) nounwind readnone {
1694; SSE2-LABEL: load_sext_16i1_to_16i8:
1695; SSE2:       # BB#0: # %entry
1696; SSE2-NEXT:    pushq %rbp
1697; SSE2-NEXT:    pushq %r15
1698; SSE2-NEXT:    pushq %r14
1699; SSE2-NEXT:    pushq %r13
1700; SSE2-NEXT:    pushq %r12
1701; SSE2-NEXT:    pushq %rbx
1702; SSE2-NEXT:    movswq (%rdi), %rax
1703; SSE2-NEXT:    movq %rax, %r8
1704; SSE2-NEXT:    movq %rax, %r9
1705; SSE2-NEXT:    movq %rax, %r10
1706; SSE2-NEXT:    movq %rax, %r11
1707; SSE2-NEXT:    movq %rax, %r14
1708; SSE2-NEXT:    movq %rax, %r15
1709; SSE2-NEXT:    movq %rax, %r12
1710; SSE2-NEXT:    movq %rax, %r13
1711; SSE2-NEXT:    movq %rax, %rbx
1712; SSE2-NEXT:    movq %rax, %rcx
1713; SSE2-NEXT:    movq %rax, %rdx
1714; SSE2-NEXT:    movq %rax, %rsi
1715; SSE2-NEXT:    movq %rax, %rdi
1716; SSE2-NEXT:    movq %rax, %rbp
1717; SSE2-NEXT:    shlq $49, %rbp
1718; SSE2-NEXT:    sarq $63, %rbp
1719; SSE2-NEXT:    movd %ebp, %xmm0
1720; SSE2-NEXT:    movq %rax, %rbp
1721; SSE2-NEXT:    movsbq %al, %rax
1722; SSE2-NEXT:    shlq $57, %r8
1723; SSE2-NEXT:    sarq $63, %r8
1724; SSE2-NEXT:    movd %r8d, %xmm1
1725; SSE2-NEXT:    shlq $53, %r9
1726; SSE2-NEXT:    sarq $63, %r9
1727; SSE2-NEXT:    movd %r9d, %xmm2
1728; SSE2-NEXT:    shlq $61, %r10
1729; SSE2-NEXT:    sarq $63, %r10
1730; SSE2-NEXT:    movd %r10d, %xmm3
1731; SSE2-NEXT:    shlq $51, %r11
1732; SSE2-NEXT:    sarq $63, %r11
1733; SSE2-NEXT:    movd %r11d, %xmm4
1734; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1735; SSE2-NEXT:    shlq $59, %r14
1736; SSE2-NEXT:    sarq $63, %r14
1737; SSE2-NEXT:    movd %r14d, %xmm5
1738; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
1739; SSE2-NEXT:    shlq $55, %r15
1740; SSE2-NEXT:    sarq $63, %r15
1741; SSE2-NEXT:    movd %r15d, %xmm2
1742; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
1743; SSE2-NEXT:    shlq $63, %r12
1744; SSE2-NEXT:    sarq $63, %r12
1745; SSE2-NEXT:    movd %r12d, %xmm0
1746; SSE2-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
1747; SSE2-NEXT:    shlq $50, %r13
1748; SSE2-NEXT:    sarq $63, %r13
1749; SSE2-NEXT:    movd %r13d, %xmm1
1750; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
1751; SSE2-NEXT:    shlq $58, %rbx
1752; SSE2-NEXT:    sarq $63, %rbx
1753; SSE2-NEXT:    movd %ebx, %xmm2
1754; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7]
1755; SSE2-NEXT:    shlq $54, %rcx
1756; SSE2-NEXT:    sarq $63, %rcx
1757; SSE2-NEXT:    movd %ecx, %xmm4
1758; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
1759; SSE2-NEXT:    shlq $62, %rdx
1760; SSE2-NEXT:    sarq $63, %rdx
1761; SSE2-NEXT:    movd %edx, %xmm3
1762; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
1763; SSE2-NEXT:    shlq $52, %rsi
1764; SSE2-NEXT:    sarq $63, %rsi
1765; SSE2-NEXT:    movd %esi, %xmm1
1766; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
1767; SSE2-NEXT:    shlq $60, %rdi
1768; SSE2-NEXT:    sarq $63, %rdi
1769; SSE2-NEXT:    movd %edi, %xmm4
1770; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
1771; SSE2-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7]
1772; SSE2-NEXT:    shrq $15, %rbp
1773; SSE2-NEXT:    movd %ebp, %xmm1
1774; SSE2-NEXT:    shrq $7, %rax
1775; SSE2-NEXT:    movd %eax, %xmm2
1776; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
1777; SSE2-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
1778; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
1779; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
1780; SSE2-NEXT:    popq %rbx
1781; SSE2-NEXT:    popq %r12
1782; SSE2-NEXT:    popq %r13
1783; SSE2-NEXT:    popq %r14
1784; SSE2-NEXT:    popq %r15
1785; SSE2-NEXT:    popq %rbp
1786; SSE2-NEXT:    retq
1787;
1788; SSSE3-LABEL: load_sext_16i1_to_16i8:
1789; SSSE3:       # BB#0: # %entry
1790; SSSE3-NEXT:    pushq %rbp
1791; SSSE3-NEXT:    pushq %r15
1792; SSSE3-NEXT:    pushq %r14
1793; SSSE3-NEXT:    pushq %r13
1794; SSSE3-NEXT:    pushq %r12
1795; SSSE3-NEXT:    pushq %rbx
1796; SSSE3-NEXT:    movswq (%rdi), %rax
1797; SSSE3-NEXT:    movq %rax, %r8
1798; SSSE3-NEXT:    movq %rax, %r9
1799; SSSE3-NEXT:    movq %rax, %r10
1800; SSSE3-NEXT:    movq %rax, %r11
1801; SSSE3-NEXT:    movq %rax, %r14
1802; SSSE3-NEXT:    movq %rax, %r15
1803; SSSE3-NEXT:    movq %rax, %r12
1804; SSSE3-NEXT:    movq %rax, %r13
1805; SSSE3-NEXT:    movq %rax, %rbx
1806; SSSE3-NEXT:    movq %rax, %rcx
1807; SSSE3-NEXT:    movq %rax, %rdx
1808; SSSE3-NEXT:    movq %rax, %rsi
1809; SSSE3-NEXT:    movq %rax, %rdi
1810; SSSE3-NEXT:    movq %rax, %rbp
1811; SSSE3-NEXT:    shlq $49, %rbp
1812; SSSE3-NEXT:    sarq $63, %rbp
1813; SSSE3-NEXT:    movd %ebp, %xmm0
1814; SSSE3-NEXT:    movq %rax, %rbp
1815; SSSE3-NEXT:    movsbq %al, %rax
1816; SSSE3-NEXT:    shlq $57, %r8
1817; SSSE3-NEXT:    sarq $63, %r8
1818; SSSE3-NEXT:    movd %r8d, %xmm1
1819; SSSE3-NEXT:    shlq $53, %r9
1820; SSSE3-NEXT:    sarq $63, %r9
1821; SSSE3-NEXT:    movd %r9d, %xmm2
1822; SSSE3-NEXT:    shlq $61, %r10
1823; SSSE3-NEXT:    sarq $63, %r10
1824; SSSE3-NEXT:    movd %r10d, %xmm3
1825; SSSE3-NEXT:    shlq $51, %r11
1826; SSSE3-NEXT:    sarq $63, %r11
1827; SSSE3-NEXT:    movd %r11d, %xmm4
1828; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
1829; SSSE3-NEXT:    shlq $59, %r14
1830; SSSE3-NEXT:    sarq $63, %r14
1831; SSSE3-NEXT:    movd %r14d, %xmm5
1832; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
1833; SSSE3-NEXT:    shlq $55, %r15
1834; SSSE3-NEXT:    sarq $63, %r15
1835; SSSE3-NEXT:    movd %r15d, %xmm2
1836; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm1[0],xmm3[1],xmm1[1],xmm3[2],xmm1[2],xmm3[3],xmm1[3],xmm3[4],xmm1[4],xmm3[5],xmm1[5],xmm3[6],xmm1[6],xmm3[7],xmm1[7]
1837; SSSE3-NEXT:    shlq $63, %r12
1838; SSSE3-NEXT:    sarq $63, %r12
1839; SSSE3-NEXT:    movd %r12d, %xmm0
1840; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3],xmm5[4],xmm4[4],xmm5[5],xmm4[5],xmm5[6],xmm4[6],xmm5[7],xmm4[7]
1841; SSSE3-NEXT:    shlq $50, %r13
1842; SSSE3-NEXT:    sarq $63, %r13
1843; SSSE3-NEXT:    movd %r13d, %xmm1
1844; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
1845; SSSE3-NEXT:    shlq $58, %rbx
1846; SSSE3-NEXT:    sarq $63, %rbx
1847; SSSE3-NEXT:    movd %ebx, %xmm2
1848; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7]
1849; SSSE3-NEXT:    shlq $54, %rcx
1850; SSSE3-NEXT:    sarq $63, %rcx
1851; SSSE3-NEXT:    movd %ecx, %xmm4
1852; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
1853; SSSE3-NEXT:    shlq $62, %rdx
1854; SSSE3-NEXT:    sarq $63, %rdx
1855; SSSE3-NEXT:    movd %edx, %xmm3
1856; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
1857; SSSE3-NEXT:    shlq $52, %rsi
1858; SSSE3-NEXT:    sarq $63, %rsi
1859; SSSE3-NEXT:    movd %esi, %xmm1
1860; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
1861; SSSE3-NEXT:    shlq $60, %rdi
1862; SSSE3-NEXT:    sarq $63, %rdi
1863; SSSE3-NEXT:    movd %edi, %xmm4
1864; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
1865; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3],xmm4[4],xmm1[4],xmm4[5],xmm1[5],xmm4[6],xmm1[6],xmm4[7],xmm1[7]
1866; SSSE3-NEXT:    shrq $15, %rbp
1867; SSSE3-NEXT:    movd %ebp, %xmm1
1868; SSSE3-NEXT:    shrq $7, %rax
1869; SSSE3-NEXT:    movd %eax, %xmm2
1870; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
1871; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
1872; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[1],xmm4[1],xmm3[2],xmm4[2],xmm3[3],xmm4[3],xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7]
1873; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
1874; SSSE3-NEXT:    popq %rbx
1875; SSSE3-NEXT:    popq %r12
1876; SSSE3-NEXT:    popq %r13
1877; SSSE3-NEXT:    popq %r14
1878; SSSE3-NEXT:    popq %r15
1879; SSSE3-NEXT:    popq %rbp
1880; SSSE3-NEXT:    retq
1881;
1882; SSE41-LABEL: load_sext_16i1_to_16i8:
1883; SSE41:       # BB#0: # %entry
1884; SSE41-NEXT:    movswq (%rdi), %rax
1885; SSE41-NEXT:    movq %rax, %rcx
1886; SSE41-NEXT:    shlq $62, %rcx
1887; SSE41-NEXT:    sarq $63, %rcx
1888; SSE41-NEXT:    movq %rax, %rdx
1889; SSE41-NEXT:    shlq $63, %rdx
1890; SSE41-NEXT:    sarq $63, %rdx
1891; SSE41-NEXT:    movd %edx, %xmm0
1892; SSE41-NEXT:    pinsrb $1, %ecx, %xmm0
1893; SSE41-NEXT:    movq %rax, %rcx
1894; SSE41-NEXT:    shlq $61, %rcx
1895; SSE41-NEXT:    sarq $63, %rcx
1896; SSE41-NEXT:    pinsrb $2, %ecx, %xmm0
1897; SSE41-NEXT:    movq %rax, %rcx
1898; SSE41-NEXT:    shlq $60, %rcx
1899; SSE41-NEXT:    sarq $63, %rcx
1900; SSE41-NEXT:    pinsrb $3, %ecx, %xmm0
1901; SSE41-NEXT:    movq %rax, %rcx
1902; SSE41-NEXT:    shlq $59, %rcx
1903; SSE41-NEXT:    sarq $63, %rcx
1904; SSE41-NEXT:    pinsrb $4, %ecx, %xmm0
1905; SSE41-NEXT:    movq %rax, %rcx
1906; SSE41-NEXT:    shlq $58, %rcx
1907; SSE41-NEXT:    sarq $63, %rcx
1908; SSE41-NEXT:    pinsrb $5, %ecx, %xmm0
1909; SSE41-NEXT:    movq %rax, %rcx
1910; SSE41-NEXT:    shlq $57, %rcx
1911; SSE41-NEXT:    sarq $63, %rcx
1912; SSE41-NEXT:    pinsrb $6, %ecx, %xmm0
1913; SSE41-NEXT:    movsbq %al, %rcx
1914; SSE41-NEXT:    shrq $7, %rcx
1915; SSE41-NEXT:    pinsrb $7, %ecx, %xmm0
1916; SSE41-NEXT:    movq %rax, %rcx
1917; SSE41-NEXT:    shlq $55, %rcx
1918; SSE41-NEXT:    sarq $63, %rcx
1919; SSE41-NEXT:    pinsrb $8, %ecx, %xmm0
1920; SSE41-NEXT:    movq %rax, %rcx
1921; SSE41-NEXT:    shlq $54, %rcx
1922; SSE41-NEXT:    sarq $63, %rcx
1923; SSE41-NEXT:    pinsrb $9, %ecx, %xmm0
1924; SSE41-NEXT:    movq %rax, %rcx
1925; SSE41-NEXT:    shlq $53, %rcx
1926; SSE41-NEXT:    sarq $63, %rcx
1927; SSE41-NEXT:    pinsrb $10, %ecx, %xmm0
1928; SSE41-NEXT:    movq %rax, %rcx
1929; SSE41-NEXT:    shlq $52, %rcx
1930; SSE41-NEXT:    sarq $63, %rcx
1931; SSE41-NEXT:    pinsrb $11, %ecx, %xmm0
1932; SSE41-NEXT:    movq %rax, %rcx
1933; SSE41-NEXT:    shlq $51, %rcx
1934; SSE41-NEXT:    sarq $63, %rcx
1935; SSE41-NEXT:    pinsrb $12, %ecx, %xmm0
1936; SSE41-NEXT:    movq %rax, %rcx
1937; SSE41-NEXT:    shlq $50, %rcx
1938; SSE41-NEXT:    sarq $63, %rcx
1939; SSE41-NEXT:    pinsrb $13, %ecx, %xmm0
1940; SSE41-NEXT:    movq %rax, %rcx
1941; SSE41-NEXT:    shlq $49, %rcx
1942; SSE41-NEXT:    sarq $63, %rcx
1943; SSE41-NEXT:    pinsrb $14, %ecx, %xmm0
1944; SSE41-NEXT:    shrq $15, %rax
1945; SSE41-NEXT:    pinsrb $15, %eax, %xmm0
1946; SSE41-NEXT:    retq
1947;
1948; AVX-LABEL: load_sext_16i1_to_16i8:
1949; AVX:       # BB#0: # %entry
1950; AVX-NEXT:    movswq (%rdi), %rax
1951; AVX-NEXT:    movq %rax, %rcx
1952; AVX-NEXT:    shlq $62, %rcx
1953; AVX-NEXT:    sarq $63, %rcx
1954; AVX-NEXT:    movq %rax, %rdx
1955; AVX-NEXT:    shlq $63, %rdx
1956; AVX-NEXT:    sarq $63, %rdx
1957; AVX-NEXT:    vmovd %edx, %xmm0
1958; AVX-NEXT:    vpinsrb $1, %ecx, %xmm0, %xmm0
1959; AVX-NEXT:    movq %rax, %rcx
1960; AVX-NEXT:    shlq $61, %rcx
1961; AVX-NEXT:    sarq $63, %rcx
1962; AVX-NEXT:    vpinsrb $2, %ecx, %xmm0, %xmm0
1963; AVX-NEXT:    movq %rax, %rcx
1964; AVX-NEXT:    shlq $60, %rcx
1965; AVX-NEXT:    sarq $63, %rcx
1966; AVX-NEXT:    vpinsrb $3, %ecx, %xmm0, %xmm0
1967; AVX-NEXT:    movq %rax, %rcx
1968; AVX-NEXT:    shlq $59, %rcx
1969; AVX-NEXT:    sarq $63, %rcx
1970; AVX-NEXT:    vpinsrb $4, %ecx, %xmm0, %xmm0
1971; AVX-NEXT:    movq %rax, %rcx
1972; AVX-NEXT:    shlq $58, %rcx
1973; AVX-NEXT:    sarq $63, %rcx
1974; AVX-NEXT:    vpinsrb $5, %ecx, %xmm0, %xmm0
1975; AVX-NEXT:    movq %rax, %rcx
1976; AVX-NEXT:    shlq $57, %rcx
1977; AVX-NEXT:    sarq $63, %rcx
1978; AVX-NEXT:    vpinsrb $6, %ecx, %xmm0, %xmm0
1979; AVX-NEXT:    movsbq %al, %rcx
1980; AVX-NEXT:    shrq $7, %rcx
1981; AVX-NEXT:    vpinsrb $7, %ecx, %xmm0, %xmm0
1982; AVX-NEXT:    movq %rax, %rcx
1983; AVX-NEXT:    shlq $55, %rcx
1984; AVX-NEXT:    sarq $63, %rcx
1985; AVX-NEXT:    vpinsrb $8, %ecx, %xmm0, %xmm0
1986; AVX-NEXT:    movq %rax, %rcx
1987; AVX-NEXT:    shlq $54, %rcx
1988; AVX-NEXT:    sarq $63, %rcx
1989; AVX-NEXT:    vpinsrb $9, %ecx, %xmm0, %xmm0
1990; AVX-NEXT:    movq %rax, %rcx
1991; AVX-NEXT:    shlq $53, %rcx
1992; AVX-NEXT:    sarq $63, %rcx
1993; AVX-NEXT:    vpinsrb $10, %ecx, %xmm0, %xmm0
1994; AVX-NEXT:    movq %rax, %rcx
1995; AVX-NEXT:    shlq $52, %rcx
1996; AVX-NEXT:    sarq $63, %rcx
1997; AVX-NEXT:    vpinsrb $11, %ecx, %xmm0, %xmm0
1998; AVX-NEXT:    movq %rax, %rcx
1999; AVX-NEXT:    shlq $51, %rcx
2000; AVX-NEXT:    sarq $63, %rcx
2001; AVX-NEXT:    vpinsrb $12, %ecx, %xmm0, %xmm0
2002; AVX-NEXT:    movq %rax, %rcx
2003; AVX-NEXT:    shlq $50, %rcx
2004; AVX-NEXT:    sarq $63, %rcx
2005; AVX-NEXT:    vpinsrb $13, %ecx, %xmm0, %xmm0
2006; AVX-NEXT:    movq %rax, %rcx
2007; AVX-NEXT:    shlq $49, %rcx
2008; AVX-NEXT:    sarq $63, %rcx
2009; AVX-NEXT:    vpinsrb $14, %ecx, %xmm0, %xmm0
2010; AVX-NEXT:    shrq $15, %rax
2011; AVX-NEXT:    vpinsrb $15, %eax, %xmm0, %xmm0
2012; AVX-NEXT:    retq
2013;
2014; X32-SSE41-LABEL: load_sext_16i1_to_16i8:
2015; X32-SSE41:       # BB#0: # %entry
2016; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
2017; X32-SSE41-NEXT:    movswl (%eax), %eax
2018; X32-SSE41-NEXT:    movl %eax, %ecx
2019; X32-SSE41-NEXT:    shll $30, %ecx
2020; X32-SSE41-NEXT:    sarl $31, %ecx
2021; X32-SSE41-NEXT:    movl %eax, %edx
2022; X32-SSE41-NEXT:    shll $31, %edx
2023; X32-SSE41-NEXT:    sarl $31, %edx
2024; X32-SSE41-NEXT:    movd %edx, %xmm0
2025; X32-SSE41-NEXT:    pinsrb $1, %ecx, %xmm0
2026; X32-SSE41-NEXT:    movl %eax, %ecx
2027; X32-SSE41-NEXT:    shll $29, %ecx
2028; X32-SSE41-NEXT:    sarl $31, %ecx
2029; X32-SSE41-NEXT:    pinsrb $2, %ecx, %xmm0
2030; X32-SSE41-NEXT:    movl %eax, %ecx
2031; X32-SSE41-NEXT:    shll $28, %ecx
2032; X32-SSE41-NEXT:    sarl $31, %ecx
2033; X32-SSE41-NEXT:    pinsrb $3, %ecx, %xmm0
2034; X32-SSE41-NEXT:    movl %eax, %ecx
2035; X32-SSE41-NEXT:    shll $27, %ecx
2036; X32-SSE41-NEXT:    sarl $31, %ecx
2037; X32-SSE41-NEXT:    pinsrb $4, %ecx, %xmm0
2038; X32-SSE41-NEXT:    movl %eax, %ecx
2039; X32-SSE41-NEXT:    shll $26, %ecx
2040; X32-SSE41-NEXT:    sarl $31, %ecx
2041; X32-SSE41-NEXT:    pinsrb $5, %ecx, %xmm0
2042; X32-SSE41-NEXT:    movl %eax, %ecx
2043; X32-SSE41-NEXT:    shll $25, %ecx
2044; X32-SSE41-NEXT:    sarl $31, %ecx
2045; X32-SSE41-NEXT:    pinsrb $6, %ecx, %xmm0
2046; X32-SSE41-NEXT:    movsbl %al, %ecx
2047; X32-SSE41-NEXT:    shrl $7, %ecx
2048; X32-SSE41-NEXT:    pinsrb $7, %ecx, %xmm0
2049; X32-SSE41-NEXT:    movl %eax, %ecx
2050; X32-SSE41-NEXT:    shll $23, %ecx
2051; X32-SSE41-NEXT:    sarl $31, %ecx
2052; X32-SSE41-NEXT:    pinsrb $8, %ecx, %xmm0
2053; X32-SSE41-NEXT:    movl %eax, %ecx
2054; X32-SSE41-NEXT:    shll $22, %ecx
2055; X32-SSE41-NEXT:    sarl $31, %ecx
2056; X32-SSE41-NEXT:    pinsrb $9, %ecx, %xmm0
2057; X32-SSE41-NEXT:    movl %eax, %ecx
2058; X32-SSE41-NEXT:    shll $21, %ecx
2059; X32-SSE41-NEXT:    sarl $31, %ecx
2060; X32-SSE41-NEXT:    pinsrb $10, %ecx, %xmm0
2061; X32-SSE41-NEXT:    movl %eax, %ecx
2062; X32-SSE41-NEXT:    shll $20, %ecx
2063; X32-SSE41-NEXT:    sarl $31, %ecx
2064; X32-SSE41-NEXT:    pinsrb $11, %ecx, %xmm0
2065; X32-SSE41-NEXT:    movl %eax, %ecx
2066; X32-SSE41-NEXT:    shll $19, %ecx
2067; X32-SSE41-NEXT:    sarl $31, %ecx
2068; X32-SSE41-NEXT:    pinsrb $12, %ecx, %xmm0
2069; X32-SSE41-NEXT:    movl %eax, %ecx
2070; X32-SSE41-NEXT:    shll $18, %ecx
2071; X32-SSE41-NEXT:    sarl $31, %ecx
2072; X32-SSE41-NEXT:    pinsrb $13, %ecx, %xmm0
2073; X32-SSE41-NEXT:    movl %eax, %ecx
2074; X32-SSE41-NEXT:    shll $17, %ecx
2075; X32-SSE41-NEXT:    sarl $31, %ecx
2076; X32-SSE41-NEXT:    pinsrb $14, %ecx, %xmm0
2077; X32-SSE41-NEXT:    shrl $15, %eax
2078; X32-SSE41-NEXT:    pinsrb $15, %eax, %xmm0
2079; X32-SSE41-NEXT:    retl
2080entry:
2081 %X = load <16 x i1>, <16 x i1>* %ptr
2082 %Y = sext <16 x i1> %X to <16 x i8>
2083 ret <16 x i8> %Y
2084}
2085
2086define <16 x i16> @load_sext_16i1_to_16i16(<16 x i1> *%ptr) {
2087; SSE2-LABEL: load_sext_16i1_to_16i16:
2088; SSE2:       # BB#0: # %entry
2089; SSE2-NEXT:    movzwl (%rdi), %eax
2090; SSE2-NEXT:    movl %eax, %ecx
2091; SSE2-NEXT:    shrl $14, %ecx
2092; SSE2-NEXT:    andl $1, %ecx
2093; SSE2-NEXT:    movd %ecx, %xmm0
2094; SSE2-NEXT:    movl %eax, %ecx
2095; SSE2-NEXT:    shrl $6, %ecx
2096; SSE2-NEXT:    andl $1, %ecx
2097; SSE2-NEXT:    movd %ecx, %xmm1
2098; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
2099; SSE2-NEXT:    movl %eax, %ecx
2100; SSE2-NEXT:    shrl $10, %ecx
2101; SSE2-NEXT:    andl $1, %ecx
2102; SSE2-NEXT:    movd %ecx, %xmm0
2103; SSE2-NEXT:    movl %eax, %ecx
2104; SSE2-NEXT:    shrl $2, %ecx
2105; SSE2-NEXT:    andl $1, %ecx
2106; SSE2-NEXT:    movd %ecx, %xmm2
2107; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
2108; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
2109; SSE2-NEXT:    movl %eax, %ecx
2110; SSE2-NEXT:    shrl $12, %ecx
2111; SSE2-NEXT:    andl $1, %ecx
2112; SSE2-NEXT:    movd %ecx, %xmm0
2113; SSE2-NEXT:    movl %eax, %ecx
2114; SSE2-NEXT:    shrl $4, %ecx
2115; SSE2-NEXT:    andl $1, %ecx
2116; SSE2-NEXT:    movd %ecx, %xmm3
2117; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
2118; SSE2-NEXT:    movl %eax, %ecx
2119; SSE2-NEXT:    andl $1, %ecx
2120; SSE2-NEXT:    movd %ecx, %xmm1
2121; SSE2-NEXT:    movl %eax, %ecx
2122; SSE2-NEXT:    shrl $8, %ecx
2123; SSE2-NEXT:    andl $1, %ecx
2124; SSE2-NEXT:    movd %ecx, %xmm0
2125; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
2126; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
2127; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
2128; SSE2-NEXT:    movl %eax, %ecx
2129; SSE2-NEXT:    shrl $13, %ecx
2130; SSE2-NEXT:    andl $1, %ecx
2131; SSE2-NEXT:    movd %ecx, %xmm0
2132; SSE2-NEXT:    movl %eax, %ecx
2133; SSE2-NEXT:    shrl $5, %ecx
2134; SSE2-NEXT:    andl $1, %ecx
2135; SSE2-NEXT:    movd %ecx, %xmm2
2136; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
2137; SSE2-NEXT:    movl %eax, %ecx
2138; SSE2-NEXT:    shrl $9, %ecx
2139; SSE2-NEXT:    andl $1, %ecx
2140; SSE2-NEXT:    movd %ecx, %xmm3
2141; SSE2-NEXT:    movl %eax, %ecx
2142; SSE2-NEXT:    shrl %ecx
2143; SSE2-NEXT:    andl $1, %ecx
2144; SSE2-NEXT:    movd %ecx, %xmm0
2145; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
2146; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
2147; SSE2-NEXT:    movl %eax, %ecx
2148; SSE2-NEXT:    shrl $11, %ecx
2149; SSE2-NEXT:    andl $1, %ecx
2150; SSE2-NEXT:    movd %ecx, %xmm2
2151; SSE2-NEXT:    movl %eax, %ecx
2152; SSE2-NEXT:    shrl $3, %ecx
2153; SSE2-NEXT:    andl $1, %ecx
2154; SSE2-NEXT:    movd %ecx, %xmm3
2155; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
2156; SSE2-NEXT:    movl %eax, %ecx
2157; SSE2-NEXT:    shrl $7, %ecx
2158; SSE2-NEXT:    andl $1, %ecx
2159; SSE2-NEXT:    movd %ecx, %xmm2
2160; SSE2-NEXT:    shrl $15, %eax
2161; SSE2-NEXT:    movzwl %ax, %eax
2162; SSE2-NEXT:    movd %eax, %xmm4
2163; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
2164; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
2165; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
2166; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
2167; SSE2-NEXT:    movdqa %xmm1, %xmm0
2168; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
2169; SSE2-NEXT:    psllw $15, %xmm0
2170; SSE2-NEXT:    psraw $15, %xmm0
2171; SSE2-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
2172; SSE2-NEXT:    psllw $15, %xmm1
2173; SSE2-NEXT:    psraw $15, %xmm1
2174; SSE2-NEXT:    retq
2175;
2176; SSSE3-LABEL: load_sext_16i1_to_16i16:
2177; SSSE3:       # BB#0: # %entry
2178; SSSE3-NEXT:    movzwl (%rdi), %eax
2179; SSSE3-NEXT:    movl %eax, %ecx
2180; SSSE3-NEXT:    shrl $14, %ecx
2181; SSSE3-NEXT:    andl $1, %ecx
2182; SSSE3-NEXT:    movd %ecx, %xmm0
2183; SSSE3-NEXT:    movl %eax, %ecx
2184; SSSE3-NEXT:    shrl $6, %ecx
2185; SSSE3-NEXT:    andl $1, %ecx
2186; SSSE3-NEXT:    movd %ecx, %xmm1
2187; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
2188; SSSE3-NEXT:    movl %eax, %ecx
2189; SSSE3-NEXT:    shrl $10, %ecx
2190; SSSE3-NEXT:    andl $1, %ecx
2191; SSSE3-NEXT:    movd %ecx, %xmm0
2192; SSSE3-NEXT:    movl %eax, %ecx
2193; SSSE3-NEXT:    shrl $2, %ecx
2194; SSSE3-NEXT:    andl $1, %ecx
2195; SSSE3-NEXT:    movd %ecx, %xmm2
2196; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
2197; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
2198; SSSE3-NEXT:    movl %eax, %ecx
2199; SSSE3-NEXT:    shrl $12, %ecx
2200; SSSE3-NEXT:    andl $1, %ecx
2201; SSSE3-NEXT:    movd %ecx, %xmm0
2202; SSSE3-NEXT:    movl %eax, %ecx
2203; SSSE3-NEXT:    shrl $4, %ecx
2204; SSSE3-NEXT:    andl $1, %ecx
2205; SSSE3-NEXT:    movd %ecx, %xmm3
2206; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1],xmm3[2],xmm0[2],xmm3[3],xmm0[3],xmm3[4],xmm0[4],xmm3[5],xmm0[5],xmm3[6],xmm0[6],xmm3[7],xmm0[7]
2207; SSSE3-NEXT:    movl %eax, %ecx
2208; SSSE3-NEXT:    andl $1, %ecx
2209; SSSE3-NEXT:    movd %ecx, %xmm1
2210; SSSE3-NEXT:    movl %eax, %ecx
2211; SSSE3-NEXT:    shrl $8, %ecx
2212; SSSE3-NEXT:    andl $1, %ecx
2213; SSSE3-NEXT:    movd %ecx, %xmm0
2214; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
2215; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
2216; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7]
2217; SSSE3-NEXT:    movl %eax, %ecx
2218; SSSE3-NEXT:    shrl $13, %ecx
2219; SSSE3-NEXT:    andl $1, %ecx
2220; SSSE3-NEXT:    movd %ecx, %xmm0
2221; SSSE3-NEXT:    movl %eax, %ecx
2222; SSSE3-NEXT:    shrl $5, %ecx
2223; SSSE3-NEXT:    andl $1, %ecx
2224; SSSE3-NEXT:    movd %ecx, %xmm2
2225; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3],xmm2[4],xmm0[4],xmm2[5],xmm0[5],xmm2[6],xmm0[6],xmm2[7],xmm0[7]
2226; SSSE3-NEXT:    movl %eax, %ecx
2227; SSSE3-NEXT:    shrl $9, %ecx
2228; SSSE3-NEXT:    andl $1, %ecx
2229; SSSE3-NEXT:    movd %ecx, %xmm3
2230; SSSE3-NEXT:    movl %eax, %ecx
2231; SSSE3-NEXT:    shrl %ecx
2232; SSSE3-NEXT:    andl $1, %ecx
2233; SSSE3-NEXT:    movd %ecx, %xmm0
2234; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
2235; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
2236; SSSE3-NEXT:    movl %eax, %ecx
2237; SSSE3-NEXT:    shrl $11, %ecx
2238; SSSE3-NEXT:    andl $1, %ecx
2239; SSSE3-NEXT:    movd %ecx, %xmm2
2240; SSSE3-NEXT:    movl %eax, %ecx
2241; SSSE3-NEXT:    shrl $3, %ecx
2242; SSSE3-NEXT:    andl $1, %ecx
2243; SSSE3-NEXT:    movd %ecx, %xmm3
2244; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
2245; SSSE3-NEXT:    movl %eax, %ecx
2246; SSSE3-NEXT:    shrl $7, %ecx
2247; SSSE3-NEXT:    andl $1, %ecx
2248; SSSE3-NEXT:    movd %ecx, %xmm2
2249; SSSE3-NEXT:    shrl $15, %eax
2250; SSSE3-NEXT:    movzwl %ax, %eax
2251; SSSE3-NEXT:    movd %eax, %xmm4
2252; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3],xmm2[4],xmm4[4],xmm2[5],xmm4[5],xmm2[6],xmm4[6],xmm2[7],xmm4[7]
2253; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
2254; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1],xmm0[2],xmm3[2],xmm0[3],xmm3[3],xmm0[4],xmm3[4],xmm0[5],xmm3[5],xmm0[6],xmm3[6],xmm0[7],xmm3[7]
2255; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7]
2256; SSSE3-NEXT:    movdqa %xmm1, %xmm0
2257; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
2258; SSSE3-NEXT:    psllw $15, %xmm0
2259; SSSE3-NEXT:    psraw $15, %xmm0
2260; SSSE3-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8],xmm0[8],xmm1[9],xmm0[9],xmm1[10],xmm0[10],xmm1[11],xmm0[11],xmm1[12],xmm0[12],xmm1[13],xmm0[13],xmm1[14],xmm0[14],xmm1[15],xmm0[15]
2261; SSSE3-NEXT:    psllw $15, %xmm1
2262; SSSE3-NEXT:    psraw $15, %xmm1
2263; SSSE3-NEXT:    retq
2264;
2265; SSE41-LABEL: load_sext_16i1_to_16i16:
2266; SSE41:       # BB#0: # %entry
2267; SSE41-NEXT:    movzwl (%rdi), %eax
2268; SSE41-NEXT:    movl %eax, %ecx
2269; SSE41-NEXT:    shrl %ecx
2270; SSE41-NEXT:    andl $1, %ecx
2271; SSE41-NEXT:    movl %eax, %edx
2272; SSE41-NEXT:    andl $1, %edx
2273; SSE41-NEXT:    movd %edx, %xmm1
2274; SSE41-NEXT:    pinsrb $1, %ecx, %xmm1
2275; SSE41-NEXT:    movl %eax, %ecx
2276; SSE41-NEXT:    shrl $2, %ecx
2277; SSE41-NEXT:    andl $1, %ecx
2278; SSE41-NEXT:    pinsrb $2, %ecx, %xmm1
2279; SSE41-NEXT:    movl %eax, %ecx
2280; SSE41-NEXT:    shrl $3, %ecx
2281; SSE41-NEXT:    andl $1, %ecx
2282; SSE41-NEXT:    pinsrb $3, %ecx, %xmm1
2283; SSE41-NEXT:    movl %eax, %ecx
2284; SSE41-NEXT:    shrl $4, %ecx
2285; SSE41-NEXT:    andl $1, %ecx
2286; SSE41-NEXT:    pinsrb $4, %ecx, %xmm1
2287; SSE41-NEXT:    movl %eax, %ecx
2288; SSE41-NEXT:    shrl $5, %ecx
2289; SSE41-NEXT:    andl $1, %ecx
2290; SSE41-NEXT:    pinsrb $5, %ecx, %xmm1
2291; SSE41-NEXT:    movl %eax, %ecx
2292; SSE41-NEXT:    shrl $6, %ecx
2293; SSE41-NEXT:    andl $1, %ecx
2294; SSE41-NEXT:    pinsrb $6, %ecx, %xmm1
2295; SSE41-NEXT:    movl %eax, %ecx
2296; SSE41-NEXT:    shrl $7, %ecx
2297; SSE41-NEXT:    andl $1, %ecx
2298; SSE41-NEXT:    pinsrb $7, %ecx, %xmm1
2299; SSE41-NEXT:    movl %eax, %ecx
2300; SSE41-NEXT:    shrl $8, %ecx
2301; SSE41-NEXT:    andl $1, %ecx
2302; SSE41-NEXT:    pinsrb $8, %ecx, %xmm1
2303; SSE41-NEXT:    movl %eax, %ecx
2304; SSE41-NEXT:    shrl $9, %ecx
2305; SSE41-NEXT:    andl $1, %ecx
2306; SSE41-NEXT:    pinsrb $9, %ecx, %xmm1
2307; SSE41-NEXT:    movl %eax, %ecx
2308; SSE41-NEXT:    shrl $10, %ecx
2309; SSE41-NEXT:    andl $1, %ecx
2310; SSE41-NEXT:    pinsrb $10, %ecx, %xmm1
2311; SSE41-NEXT:    movl %eax, %ecx
2312; SSE41-NEXT:    shrl $11, %ecx
2313; SSE41-NEXT:    andl $1, %ecx
2314; SSE41-NEXT:    pinsrb $11, %ecx, %xmm1
2315; SSE41-NEXT:    movl %eax, %ecx
2316; SSE41-NEXT:    shrl $12, %ecx
2317; SSE41-NEXT:    andl $1, %ecx
2318; SSE41-NEXT:    pinsrb $12, %ecx, %xmm1
2319; SSE41-NEXT:    movl %eax, %ecx
2320; SSE41-NEXT:    shrl $13, %ecx
2321; SSE41-NEXT:    andl $1, %ecx
2322; SSE41-NEXT:    pinsrb $13, %ecx, %xmm1
2323; SSE41-NEXT:    movl %eax, %ecx
2324; SSE41-NEXT:    shrl $14, %ecx
2325; SSE41-NEXT:    andl $1, %ecx
2326; SSE41-NEXT:    pinsrb $14, %ecx, %xmm1
2327; SSE41-NEXT:    shrl $15, %eax
2328; SSE41-NEXT:    movzwl %ax, %eax
2329; SSE41-NEXT:    pinsrb $15, %eax, %xmm1
2330; SSE41-NEXT:    pmovzxbw {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
2331; SSE41-NEXT:    psllw $15, %xmm0
2332; SSE41-NEXT:    psraw $15, %xmm0
2333; SSE41-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
2334; SSE41-NEXT:    psllw $15, %xmm1
2335; SSE41-NEXT:    psraw $15, %xmm1
2336; SSE41-NEXT:    retq
2337;
2338; AVX1-LABEL: load_sext_16i1_to_16i16:
2339; AVX1:       # BB#0: # %entry
2340; AVX1-NEXT:    pushq %rbp
2341; AVX1-NEXT:  .Ltmp0:
2342; AVX1-NEXT:    .cfi_def_cfa_offset 16
2343; AVX1-NEXT:    pushq %r15
2344; AVX1-NEXT:  .Ltmp1:
2345; AVX1-NEXT:    .cfi_def_cfa_offset 24
2346; AVX1-NEXT:    pushq %r14
2347; AVX1-NEXT:  .Ltmp2:
2348; AVX1-NEXT:    .cfi_def_cfa_offset 32
2349; AVX1-NEXT:    pushq %r13
2350; AVX1-NEXT:  .Ltmp3:
2351; AVX1-NEXT:    .cfi_def_cfa_offset 40
2352; AVX1-NEXT:    pushq %r12
2353; AVX1-NEXT:  .Ltmp4:
2354; AVX1-NEXT:    .cfi_def_cfa_offset 48
2355; AVX1-NEXT:    pushq %rbx
2356; AVX1-NEXT:  .Ltmp5:
2357; AVX1-NEXT:    .cfi_def_cfa_offset 56
2358; AVX1-NEXT:  .Ltmp6:
2359; AVX1-NEXT:    .cfi_offset %rbx, -56
2360; AVX1-NEXT:  .Ltmp7:
2361; AVX1-NEXT:    .cfi_offset %r12, -48
2362; AVX1-NEXT:  .Ltmp8:
2363; AVX1-NEXT:    .cfi_offset %r13, -40
2364; AVX1-NEXT:  .Ltmp9:
2365; AVX1-NEXT:    .cfi_offset %r14, -32
2366; AVX1-NEXT:  .Ltmp10:
2367; AVX1-NEXT:    .cfi_offset %r15, -24
2368; AVX1-NEXT:  .Ltmp11:
2369; AVX1-NEXT:    .cfi_offset %rbp, -16
2370; AVX1-NEXT:    movswq (%rdi), %rax
2371; AVX1-NEXT:    movq %rax, %rcx
2372; AVX1-NEXT:    shlq $55, %rcx
2373; AVX1-NEXT:    sarq $63, %rcx
2374; AVX1-NEXT:    vmovd %ecx, %xmm0
2375; AVX1-NEXT:    movq %rax, %r8
2376; AVX1-NEXT:    movq %rax, %r10
2377; AVX1-NEXT:    movq %rax, %r11
2378; AVX1-NEXT:    movq %rax, %r14
2379; AVX1-NEXT:    movq %rax, %r15
2380; AVX1-NEXT:    movq %rax, %r9
2381; AVX1-NEXT:    movq %rax, %r12
2382; AVX1-NEXT:    movq %rax, %r13
2383; AVX1-NEXT:    movq %rax, %rbx
2384; AVX1-NEXT:    movq %rax, %rdi
2385; AVX1-NEXT:    movq %rax, %rcx
2386; AVX1-NEXT:    movq %rax, %rdx
2387; AVX1-NEXT:    movq %rax, %rsi
2388; AVX1-NEXT:    movsbq %al, %rbp
2389; AVX1-NEXT:    shlq $54, %rax
2390; AVX1-NEXT:    sarq $63, %rax
2391; AVX1-NEXT:    vpinsrw $1, %eax, %xmm0, %xmm0
2392; AVX1-NEXT:    shlq $53, %r8
2393; AVX1-NEXT:    sarq $63, %r8
2394; AVX1-NEXT:    vpinsrw $2, %r8d, %xmm0, %xmm0
2395; AVX1-NEXT:    shlq $52, %r10
2396; AVX1-NEXT:    sarq $63, %r10
2397; AVX1-NEXT:    vpinsrw $3, %r10d, %xmm0, %xmm0
2398; AVX1-NEXT:    shlq $51, %r11
2399; AVX1-NEXT:    sarq $63, %r11
2400; AVX1-NEXT:    vpinsrw $4, %r11d, %xmm0, %xmm0
2401; AVX1-NEXT:    shlq $50, %r14
2402; AVX1-NEXT:    sarq $63, %r14
2403; AVX1-NEXT:    vpinsrw $5, %r14d, %xmm0, %xmm0
2404; AVX1-NEXT:    shlq $49, %r15
2405; AVX1-NEXT:    sarq $63, %r15
2406; AVX1-NEXT:    vpinsrw $6, %r15d, %xmm0, %xmm0
2407; AVX1-NEXT:    shrq $15, %r9
2408; AVX1-NEXT:    vpinsrw $7, %r9d, %xmm0, %xmm0
2409; AVX1-NEXT:    shlq $63, %r13
2410; AVX1-NEXT:    sarq $63, %r13
2411; AVX1-NEXT:    vmovd %r13d, %xmm1
2412; AVX1-NEXT:    shlq $62, %r12
2413; AVX1-NEXT:    sarq $63, %r12
2414; AVX1-NEXT:    vpinsrw $1, %r12d, %xmm1, %xmm1
2415; AVX1-NEXT:    shlq $61, %rbx
2416; AVX1-NEXT:    sarq $63, %rbx
2417; AVX1-NEXT:    vpinsrw $2, %ebx, %xmm1, %xmm1
2418; AVX1-NEXT:    shlq $60, %rdi
2419; AVX1-NEXT:    sarq $63, %rdi
2420; AVX1-NEXT:    vpinsrw $3, %edi, %xmm1, %xmm1
2421; AVX1-NEXT:    shlq $59, %rcx
2422; AVX1-NEXT:    sarq $63, %rcx
2423; AVX1-NEXT:    vpinsrw $4, %ecx, %xmm1, %xmm1
2424; AVX1-NEXT:    shlq $58, %rdx
2425; AVX1-NEXT:    sarq $63, %rdx
2426; AVX1-NEXT:    vpinsrw $5, %edx, %xmm1, %xmm1
2427; AVX1-NEXT:    shlq $57, %rsi
2428; AVX1-NEXT:    sarq $63, %rsi
2429; AVX1-NEXT:    vpinsrw $6, %esi, %xmm1, %xmm1
2430; AVX1-NEXT:    shrq $7, %rbp
2431; AVX1-NEXT:    vpinsrw $7, %ebp, %xmm1, %xmm1
2432; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
2433; AVX1-NEXT:    popq %rbx
2434; AVX1-NEXT:    popq %r12
2435; AVX1-NEXT:    popq %r13
2436; AVX1-NEXT:    popq %r14
2437; AVX1-NEXT:    popq %r15
2438; AVX1-NEXT:    popq %rbp
2439; AVX1-NEXT:    retq
2440;
2441; AVX2-LABEL: load_sext_16i1_to_16i16:
2442; AVX2:       # BB#0: # %entry
2443; AVX2-NEXT:    pushq %rbp
2444; AVX2-NEXT:  .Ltmp0:
2445; AVX2-NEXT:    .cfi_def_cfa_offset 16
2446; AVX2-NEXT:    pushq %r15
2447; AVX2-NEXT:  .Ltmp1:
2448; AVX2-NEXT:    .cfi_def_cfa_offset 24
2449; AVX2-NEXT:    pushq %r14
2450; AVX2-NEXT:  .Ltmp2:
2451; AVX2-NEXT:    .cfi_def_cfa_offset 32
2452; AVX2-NEXT:    pushq %r13
2453; AVX2-NEXT:  .Ltmp3:
2454; AVX2-NEXT:    .cfi_def_cfa_offset 40
2455; AVX2-NEXT:    pushq %r12
2456; AVX2-NEXT:  .Ltmp4:
2457; AVX2-NEXT:    .cfi_def_cfa_offset 48
2458; AVX2-NEXT:    pushq %rbx
2459; AVX2-NEXT:  .Ltmp5:
2460; AVX2-NEXT:    .cfi_def_cfa_offset 56
2461; AVX2-NEXT:  .Ltmp6:
2462; AVX2-NEXT:    .cfi_offset %rbx, -56
2463; AVX2-NEXT:  .Ltmp7:
2464; AVX2-NEXT:    .cfi_offset %r12, -48
2465; AVX2-NEXT:  .Ltmp8:
2466; AVX2-NEXT:    .cfi_offset %r13, -40
2467; AVX2-NEXT:  .Ltmp9:
2468; AVX2-NEXT:    .cfi_offset %r14, -32
2469; AVX2-NEXT:  .Ltmp10:
2470; AVX2-NEXT:    .cfi_offset %r15, -24
2471; AVX2-NEXT:  .Ltmp11:
2472; AVX2-NEXT:    .cfi_offset %rbp, -16
2473; AVX2-NEXT:    movswq (%rdi), %rax
2474; AVX2-NEXT:    movq %rax, %rcx
2475; AVX2-NEXT:    shlq $55, %rcx
2476; AVX2-NEXT:    sarq $63, %rcx
2477; AVX2-NEXT:    vmovd %ecx, %xmm0
2478; AVX2-NEXT:    movq %rax, %r8
2479; AVX2-NEXT:    movq %rax, %r10
2480; AVX2-NEXT:    movq %rax, %r11
2481; AVX2-NEXT:    movq %rax, %r14
2482; AVX2-NEXT:    movq %rax, %r15
2483; AVX2-NEXT:    movq %rax, %r9
2484; AVX2-NEXT:    movq %rax, %r12
2485; AVX2-NEXT:    movq %rax, %r13
2486; AVX2-NEXT:    movq %rax, %rbx
2487; AVX2-NEXT:    movq %rax, %rdi
2488; AVX2-NEXT:    movq %rax, %rcx
2489; AVX2-NEXT:    movq %rax, %rdx
2490; AVX2-NEXT:    movq %rax, %rsi
2491; AVX2-NEXT:    movsbq %al, %rbp
2492; AVX2-NEXT:    shlq $54, %rax
2493; AVX2-NEXT:    sarq $63, %rax
2494; AVX2-NEXT:    vpinsrw $1, %eax, %xmm0, %xmm0
2495; AVX2-NEXT:    shlq $53, %r8
2496; AVX2-NEXT:    sarq $63, %r8
2497; AVX2-NEXT:    vpinsrw $2, %r8d, %xmm0, %xmm0
2498; AVX2-NEXT:    shlq $52, %r10
2499; AVX2-NEXT:    sarq $63, %r10
2500; AVX2-NEXT:    vpinsrw $3, %r10d, %xmm0, %xmm0
2501; AVX2-NEXT:    shlq $51, %r11
2502; AVX2-NEXT:    sarq $63, %r11
2503; AVX2-NEXT:    vpinsrw $4, %r11d, %xmm0, %xmm0
2504; AVX2-NEXT:    shlq $50, %r14
2505; AVX2-NEXT:    sarq $63, %r14
2506; AVX2-NEXT:    vpinsrw $5, %r14d, %xmm0, %xmm0
2507; AVX2-NEXT:    shlq $49, %r15
2508; AVX2-NEXT:    sarq $63, %r15
2509; AVX2-NEXT:    vpinsrw $6, %r15d, %xmm0, %xmm0
2510; AVX2-NEXT:    shrq $15, %r9
2511; AVX2-NEXT:    vpinsrw $7, %r9d, %xmm0, %xmm0
2512; AVX2-NEXT:    shlq $63, %r13
2513; AVX2-NEXT:    sarq $63, %r13
2514; AVX2-NEXT:    vmovd %r13d, %xmm1
2515; AVX2-NEXT:    shlq $62, %r12
2516; AVX2-NEXT:    sarq $63, %r12
2517; AVX2-NEXT:    vpinsrw $1, %r12d, %xmm1, %xmm1
2518; AVX2-NEXT:    shlq $61, %rbx
2519; AVX2-NEXT:    sarq $63, %rbx
2520; AVX2-NEXT:    vpinsrw $2, %ebx, %xmm1, %xmm1
2521; AVX2-NEXT:    shlq $60, %rdi
2522; AVX2-NEXT:    sarq $63, %rdi
2523; AVX2-NEXT:    vpinsrw $3, %edi, %xmm1, %xmm1
2524; AVX2-NEXT:    shlq $59, %rcx
2525; AVX2-NEXT:    sarq $63, %rcx
2526; AVX2-NEXT:    vpinsrw $4, %ecx, %xmm1, %xmm1
2527; AVX2-NEXT:    shlq $58, %rdx
2528; AVX2-NEXT:    sarq $63, %rdx
2529; AVX2-NEXT:    vpinsrw $5, %edx, %xmm1, %xmm1
2530; AVX2-NEXT:    shlq $57, %rsi
2531; AVX2-NEXT:    sarq $63, %rsi
2532; AVX2-NEXT:    vpinsrw $6, %esi, %xmm1, %xmm1
2533; AVX2-NEXT:    shrq $7, %rbp
2534; AVX2-NEXT:    vpinsrw $7, %ebp, %xmm1, %xmm1
2535; AVX2-NEXT:    vinserti128 $1, %xmm0, %ymm1, %ymm0
2536; AVX2-NEXT:    popq %rbx
2537; AVX2-NEXT:    popq %r12
2538; AVX2-NEXT:    popq %r13
2539; AVX2-NEXT:    popq %r14
2540; AVX2-NEXT:    popq %r15
2541; AVX2-NEXT:    popq %rbp
2542; AVX2-NEXT:    retq
2543;
2544; X32-SSE41-LABEL: load_sext_16i1_to_16i16:
2545; X32-SSE41:       # BB#0: # %entry
2546; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
2547; X32-SSE41-NEXT:    movzwl (%eax), %eax
2548; X32-SSE41-NEXT:    movl %eax, %ecx
2549; X32-SSE41-NEXT:    shrl %ecx
2550; X32-SSE41-NEXT:    andl $1, %ecx
2551; X32-SSE41-NEXT:    movl %eax, %edx
2552; X32-SSE41-NEXT:    andl $1, %edx
2553; X32-SSE41-NEXT:    movd %edx, %xmm1
2554; X32-SSE41-NEXT:    pinsrb $1, %ecx, %xmm1
2555; X32-SSE41-NEXT:    movl %eax, %ecx
2556; X32-SSE41-NEXT:    shrl $2, %ecx
2557; X32-SSE41-NEXT:    andl $1, %ecx
2558; X32-SSE41-NEXT:    pinsrb $2, %ecx, %xmm1
2559; X32-SSE41-NEXT:    movl %eax, %ecx
2560; X32-SSE41-NEXT:    shrl $3, %ecx
2561; X32-SSE41-NEXT:    andl $1, %ecx
2562; X32-SSE41-NEXT:    pinsrb $3, %ecx, %xmm1
2563; X32-SSE41-NEXT:    movl %eax, %ecx
2564; X32-SSE41-NEXT:    shrl $4, %ecx
2565; X32-SSE41-NEXT:    andl $1, %ecx
2566; X32-SSE41-NEXT:    pinsrb $4, %ecx, %xmm1
2567; X32-SSE41-NEXT:    movl %eax, %ecx
2568; X32-SSE41-NEXT:    shrl $5, %ecx
2569; X32-SSE41-NEXT:    andl $1, %ecx
2570; X32-SSE41-NEXT:    pinsrb $5, %ecx, %xmm1
2571; X32-SSE41-NEXT:    movl %eax, %ecx
2572; X32-SSE41-NEXT:    shrl $6, %ecx
2573; X32-SSE41-NEXT:    andl $1, %ecx
2574; X32-SSE41-NEXT:    pinsrb $6, %ecx, %xmm1
2575; X32-SSE41-NEXT:    movl %eax, %ecx
2576; X32-SSE41-NEXT:    shrl $7, %ecx
2577; X32-SSE41-NEXT:    andl $1, %ecx
2578; X32-SSE41-NEXT:    pinsrb $7, %ecx, %xmm1
2579; X32-SSE41-NEXT:    movl %eax, %ecx
2580; X32-SSE41-NEXT:    shrl $8, %ecx
2581; X32-SSE41-NEXT:    andl $1, %ecx
2582; X32-SSE41-NEXT:    pinsrb $8, %ecx, %xmm1
2583; X32-SSE41-NEXT:    movl %eax, %ecx
2584; X32-SSE41-NEXT:    shrl $9, %ecx
2585; X32-SSE41-NEXT:    andl $1, %ecx
2586; X32-SSE41-NEXT:    pinsrb $9, %ecx, %xmm1
2587; X32-SSE41-NEXT:    movl %eax, %ecx
2588; X32-SSE41-NEXT:    shrl $10, %ecx
2589; X32-SSE41-NEXT:    andl $1, %ecx
2590; X32-SSE41-NEXT:    pinsrb $10, %ecx, %xmm1
2591; X32-SSE41-NEXT:    movl %eax, %ecx
2592; X32-SSE41-NEXT:    shrl $11, %ecx
2593; X32-SSE41-NEXT:    andl $1, %ecx
2594; X32-SSE41-NEXT:    pinsrb $11, %ecx, %xmm1
2595; X32-SSE41-NEXT:    movl %eax, %ecx
2596; X32-SSE41-NEXT:    shrl $12, %ecx
2597; X32-SSE41-NEXT:    andl $1, %ecx
2598; X32-SSE41-NEXT:    pinsrb $12, %ecx, %xmm1
2599; X32-SSE41-NEXT:    movl %eax, %ecx
2600; X32-SSE41-NEXT:    shrl $13, %ecx
2601; X32-SSE41-NEXT:    andl $1, %ecx
2602; X32-SSE41-NEXT:    pinsrb $13, %ecx, %xmm1
2603; X32-SSE41-NEXT:    movl %eax, %ecx
2604; X32-SSE41-NEXT:    shrl $14, %ecx
2605; X32-SSE41-NEXT:    andl $1, %ecx
2606; X32-SSE41-NEXT:    pinsrb $14, %ecx, %xmm1
2607; X32-SSE41-NEXT:    shrl $15, %eax
2608; X32-SSE41-NEXT:    pinsrb $15, %eax, %xmm1
2609; X32-SSE41-NEXT:    pmovzxbw {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero
2610; X32-SSE41-NEXT:    psllw $15, %xmm0
2611; X32-SSE41-NEXT:    psraw $15, %xmm0
2612; X32-SSE41-NEXT:    punpckhbw {{.*#+}} xmm1 = xmm1[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
2613; X32-SSE41-NEXT:    psllw $15, %xmm1
2614; X32-SSE41-NEXT:    psraw $15, %xmm1
2615; X32-SSE41-NEXT:    retl
2616entry:
2617 %X = load <16 x i1>, <16 x i1>* %ptr
2618 %Y = sext <16 x i1> %X to <16 x i16>
2619 ret <16 x i16> %Y
2620}
2621
2622define <32 x i8> @load_sext_32i1_to_32i8(<32 x i1> *%ptr) nounwind readnone {
2623; SSE2-LABEL: load_sext_32i1_to_32i8:
2624; SSE2:       # BB#0: # %entry
2625; SSE2-NEXT:    pushq %rbp
2626; SSE2-NEXT:    pushq %r15
2627; SSE2-NEXT:    pushq %r14
2628; SSE2-NEXT:    pushq %r13
2629; SSE2-NEXT:    pushq %r12
2630; SSE2-NEXT:    pushq %rbx
2631; SSE2-NEXT:    movswq (%rdi), %rbx
2632; SSE2-NEXT:    movq %rbx, %r10
2633; SSE2-NEXT:    movq %rbx, %r8
2634; SSE2-NEXT:    movq %rbx, %r9
2635; SSE2-NEXT:    movq %rbx, %r11
2636; SSE2-NEXT:    movq %rbx, %r14
2637; SSE2-NEXT:    movq %rbx, %r15
2638; SSE2-NEXT:    movq %rbx, %r12
2639; SSE2-NEXT:    movq %rbx, %r13
2640; SSE2-NEXT:    movq %rbx, %rdx
2641; SSE2-NEXT:    movq %rbx, %rsi
2642; SSE2-NEXT:    movq %rbx, %rcx
2643; SSE2-NEXT:    movq %rbx, %rbp
2644; SSE2-NEXT:    movq %rbx, %rax
2645; SSE2-NEXT:    shlq $49, %rax
2646; SSE2-NEXT:    sarq $63, %rax
2647; SSE2-NEXT:    movd %eax, %xmm0
2648; SSE2-NEXT:    movq %rbx, %rax
2649; SSE2-NEXT:    shlq $57, %r10
2650; SSE2-NEXT:    sarq $63, %r10
2651; SSE2-NEXT:    movd %r10d, %xmm15
2652; SSE2-NEXT:    movq %rbx, %r10
2653; SSE2-NEXT:    movsbq %bl, %rbx
2654; SSE2-NEXT:    punpcklbw {{.*#+}} xmm15 = xmm15[0],xmm0[0],xmm15[1],xmm0[1],xmm15[2],xmm0[2],xmm15[3],xmm0[3],xmm15[4],xmm0[4],xmm15[5],xmm0[5],xmm15[6],xmm0[6],xmm15[7],xmm0[7]
2655; SSE2-NEXT:    shlq $53, %r8
2656; SSE2-NEXT:    sarq $63, %r8
2657; SSE2-NEXT:    movd %r8d, %xmm8
2658; SSE2-NEXT:    shlq $61, %r9
2659; SSE2-NEXT:    sarq $63, %r9
2660; SSE2-NEXT:    movd %r9d, %xmm2
2661; SSE2-NEXT:    shlq $51, %r11
2662; SSE2-NEXT:    sarq $63, %r11
2663; SSE2-NEXT:    movd %r11d, %xmm9
2664; SSE2-NEXT:    shlq $59, %r14
2665; SSE2-NEXT:    sarq $63, %r14
2666; SSE2-NEXT:    movd %r14d, %xmm5
2667; SSE2-NEXT:    shlq $55, %r15
2668; SSE2-NEXT:    sarq $63, %r15
2669; SSE2-NEXT:    movd %r15d, %xmm10
2670; SSE2-NEXT:    shlq $63, %r12
2671; SSE2-NEXT:    sarq $63, %r12
2672; SSE2-NEXT:    movd %r12d, %xmm0
2673; SSE2-NEXT:    shlq $50, %r13
2674; SSE2-NEXT:    sarq $63, %r13
2675; SSE2-NEXT:    movd %r13d, %xmm11
2676; SSE2-NEXT:    shlq $58, %rdx
2677; SSE2-NEXT:    sarq $63, %rdx
2678; SSE2-NEXT:    movd %edx, %xmm4
2679; SSE2-NEXT:    shlq $54, %rsi
2680; SSE2-NEXT:    sarq $63, %rsi
2681; SSE2-NEXT:    movd %esi, %xmm12
2682; SSE2-NEXT:    shlq $62, %rcx
2683; SSE2-NEXT:    sarq $63, %rcx
2684; SSE2-NEXT:    movd %ecx, %xmm6
2685; SSE2-NEXT:    shlq $52, %rbp
2686; SSE2-NEXT:    sarq $63, %rbp
2687; SSE2-NEXT:    movd %ebp, %xmm13
2688; SSE2-NEXT:    shlq $60, %rax
2689; SSE2-NEXT:    sarq $63, %rax
2690; SSE2-NEXT:    movd %eax, %xmm7
2691; SSE2-NEXT:    shrq $15, %r10
2692; SSE2-NEXT:    movd %r10d, %xmm14
2693; SSE2-NEXT:    shrq $7, %rbx
2694; SSE2-NEXT:    movd %ebx, %xmm3
2695; SSE2-NEXT:    movswq 2(%rdi), %rdx
2696; SSE2-NEXT:    movq %rdx, %r8
2697; SSE2-NEXT:    movq %rdx, %r9
2698; SSE2-NEXT:    movq %rdx, %r10
2699; SSE2-NEXT:    movq %rdx, %r11
2700; SSE2-NEXT:    movq %rdx, %r14
2701; SSE2-NEXT:    movq %rdx, %r15
2702; SSE2-NEXT:    movq %rdx, %r12
2703; SSE2-NEXT:    movq %rdx, %r13
2704; SSE2-NEXT:    movq %rdx, %rbx
2705; SSE2-NEXT:    movq %rdx, %rax
2706; SSE2-NEXT:    movq %rdx, %rcx
2707; SSE2-NEXT:    movq %rdx, %rsi
2708; SSE2-NEXT:    movq %rdx, %rdi
2709; SSE2-NEXT:    movq %rdx, %rbp
2710; SSE2-NEXT:    shlq $49, %rbp
2711; SSE2-NEXT:    sarq $63, %rbp
2712; SSE2-NEXT:    movd %ebp, %xmm1
2713; SSE2-NEXT:    movq %rdx, %rbp
2714; SSE2-NEXT:    movsbq %dl, %rdx
2715; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm8[0],xmm2[1],xmm8[1],xmm2[2],xmm8[2],xmm2[3],xmm8[3],xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
2716; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm15[0],xmm2[1],xmm15[1],xmm2[2],xmm15[2],xmm2[3],xmm15[3],xmm2[4],xmm15[4],xmm2[5],xmm15[5],xmm2[6],xmm15[6],xmm2[7],xmm15[7]
2717; SSE2-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm9[0],xmm5[1],xmm9[1],xmm5[2],xmm9[2],xmm5[3],xmm9[3],xmm5[4],xmm9[4],xmm5[5],xmm9[5],xmm5[6],xmm9[6],xmm5[7],xmm9[7]
2718; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm10[0],xmm0[1],xmm10[1],xmm0[2],xmm10[2],xmm0[3],xmm10[3],xmm0[4],xmm10[4],xmm0[5],xmm10[5],xmm0[6],xmm10[6],xmm0[7],xmm10[7]
2719; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7]
2720; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
2721; SSE2-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm11[0],xmm4[1],xmm11[1],xmm4[2],xmm11[2],xmm4[3],xmm11[3],xmm4[4],xmm11[4],xmm4[5],xmm11[5],xmm4[6],xmm11[6],xmm4[7],xmm11[7]
2722; SSE2-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3],xmm6[4],xmm12[4],xmm6[5],xmm12[5],xmm6[6],xmm12[6],xmm6[7],xmm12[7]
2723; SSE2-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3],xmm6[4],xmm4[4],xmm6[5],xmm4[5],xmm6[6],xmm4[6],xmm6[7],xmm4[7]
2724; SSE2-NEXT:    punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm13[0],xmm7[1],xmm13[1],xmm7[2],xmm13[2],xmm7[3],xmm13[3],xmm7[4],xmm13[4],xmm7[5],xmm13[5],xmm7[6],xmm13[6],xmm7[7],xmm13[7]
2725; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm14[0],xmm3[1],xmm14[1],xmm3[2],xmm14[2],xmm3[3],xmm14[3],xmm3[4],xmm14[4],xmm3[5],xmm14[5],xmm3[6],xmm14[6],xmm3[7],xmm14[7]
2726; SSE2-NEXT:    shlq $57, %r8
2727; SSE2-NEXT:    sarq $63, %r8
2728; SSE2-NEXT:    movd %r8d, %xmm2
2729; SSE2-NEXT:    punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3],xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7]
2730; SSE2-NEXT:    shlq $53, %r9
2731; SSE2-NEXT:    sarq $63, %r9
2732; SSE2-NEXT:    movd %r9d, %xmm3
2733; SSE2-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3],xmm6[4],xmm7[4],xmm6[5],xmm7[5],xmm6[6],xmm7[6],xmm6[7],xmm7[7]
2734; SSE2-NEXT:    shlq $61, %r10
2735; SSE2-NEXT:    sarq $63, %r10
2736; SSE2-NEXT:    movd %r10d, %xmm4
2737; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm6[0],xmm0[1],xmm6[1],xmm0[2],xmm6[2],xmm0[3],xmm6[3],xmm0[4],xmm6[4],xmm0[5],xmm6[5],xmm0[6],xmm6[6],xmm0[7],xmm6[7]
2738; SSE2-NEXT:    shlq $51, %r11
2739; SSE2-NEXT:    sarq $63, %r11
2740; SSE2-NEXT:    movd %r11d, %xmm5
2741; SSE2-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
2742; SSE2-NEXT:    shlq $59, %r14
2743; SSE2-NEXT:    sarq $63, %r14
2744; SSE2-NEXT:    movd %r14d, %xmm6
2745; SSE2-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
2746; SSE2-NEXT:    shlq $55, %r15
2747; SSE2-NEXT:    sarq $63, %r15
2748; SSE2-NEXT:    movd %r15d, %xmm3
2749; SSE2-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
2750; SSE2-NEXT:    shlq $63, %r12
2751; SSE2-NEXT:    sarq $63, %r12
2752; SSE2-NEXT:    movd %r12d, %xmm1
2753; SSE2-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
2754; SSE2-NEXT:    shlq $50, %r13
2755; SSE2-NEXT:    sarq $63, %r13
2756; SSE2-NEXT:    movd %r13d, %xmm2
2757; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
2758; SSE2-NEXT:    shlq $58, %rbx
2759; SSE2-NEXT:    sarq $63, %rbx
2760; SSE2-NEXT:    movd %ebx, %xmm3
2761; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3],xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7]
2762; SSE2-NEXT:    shlq $54, %rax
2763; SSE2-NEXT:    sarq $63, %rax
2764; SSE2-NEXT:    movd %eax, %xmm5
2765; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7]
2766; SSE2-NEXT:    shlq $62, %rcx
2767; SSE2-NEXT:    sarq $63, %rcx
2768; SSE2-NEXT:    movd %ecx, %xmm4
2769; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
2770; SSE2-NEXT:    shlq $52, %rsi
2771; SSE2-NEXT:    sarq $63, %rsi
2772; SSE2-NEXT:    movd %esi, %xmm2
2773; SSE2-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3],xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7]
2774; SSE2-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
2775; SSE2-NEXT:    shlq $60, %rdi
2776; SSE2-NEXT:    sarq $63, %rdi
2777; SSE2-NEXT:    movd %edi, %xmm3
2778; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
2779; SSE2-NEXT:    shrq $15, %rbp
2780; SSE2-NEXT:    movd %ebp, %xmm2
2781; SSE2-NEXT:    shrq $7, %rdx
2782; SSE2-NEXT:    movd %edx, %xmm5
2783; SSE2-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7]
2784; SSE2-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
2785; SSE2-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
2786; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7]
2787; SSE2-NEXT:    popq %rbx
2788; SSE2-NEXT:    popq %r12
2789; SSE2-NEXT:    popq %r13
2790; SSE2-NEXT:    popq %r14
2791; SSE2-NEXT:    popq %r15
2792; SSE2-NEXT:    popq %rbp
2793; SSE2-NEXT:    retq
2794;
2795; SSSE3-LABEL: load_sext_32i1_to_32i8:
2796; SSSE3:       # BB#0: # %entry
2797; SSSE3-NEXT:    pushq %rbp
2798; SSSE3-NEXT:    pushq %r15
2799; SSSE3-NEXT:    pushq %r14
2800; SSSE3-NEXT:    pushq %r13
2801; SSSE3-NEXT:    pushq %r12
2802; SSSE3-NEXT:    pushq %rbx
2803; SSSE3-NEXT:    movswq (%rdi), %rbx
2804; SSSE3-NEXT:    movq %rbx, %r10
2805; SSSE3-NEXT:    movq %rbx, %r8
2806; SSSE3-NEXT:    movq %rbx, %r9
2807; SSSE3-NEXT:    movq %rbx, %r11
2808; SSSE3-NEXT:    movq %rbx, %r14
2809; SSSE3-NEXT:    movq %rbx, %r15
2810; SSSE3-NEXT:    movq %rbx, %r12
2811; SSSE3-NEXT:    movq %rbx, %r13
2812; SSSE3-NEXT:    movq %rbx, %rdx
2813; SSSE3-NEXT:    movq %rbx, %rsi
2814; SSSE3-NEXT:    movq %rbx, %rcx
2815; SSSE3-NEXT:    movq %rbx, %rbp
2816; SSSE3-NEXT:    movq %rbx, %rax
2817; SSSE3-NEXT:    shlq $49, %rax
2818; SSSE3-NEXT:    sarq $63, %rax
2819; SSSE3-NEXT:    movd %eax, %xmm0
2820; SSSE3-NEXT:    movq %rbx, %rax
2821; SSSE3-NEXT:    shlq $57, %r10
2822; SSSE3-NEXT:    sarq $63, %r10
2823; SSSE3-NEXT:    movd %r10d, %xmm15
2824; SSSE3-NEXT:    movq %rbx, %r10
2825; SSSE3-NEXT:    movsbq %bl, %rbx
2826; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm15 = xmm15[0],xmm0[0],xmm15[1],xmm0[1],xmm15[2],xmm0[2],xmm15[3],xmm0[3],xmm15[4],xmm0[4],xmm15[5],xmm0[5],xmm15[6],xmm0[6],xmm15[7],xmm0[7]
2827; SSSE3-NEXT:    shlq $53, %r8
2828; SSSE3-NEXT:    sarq $63, %r8
2829; SSSE3-NEXT:    movd %r8d, %xmm8
2830; SSSE3-NEXT:    shlq $61, %r9
2831; SSSE3-NEXT:    sarq $63, %r9
2832; SSSE3-NEXT:    movd %r9d, %xmm2
2833; SSSE3-NEXT:    shlq $51, %r11
2834; SSSE3-NEXT:    sarq $63, %r11
2835; SSSE3-NEXT:    movd %r11d, %xmm9
2836; SSSE3-NEXT:    shlq $59, %r14
2837; SSSE3-NEXT:    sarq $63, %r14
2838; SSSE3-NEXT:    movd %r14d, %xmm5
2839; SSSE3-NEXT:    shlq $55, %r15
2840; SSSE3-NEXT:    sarq $63, %r15
2841; SSSE3-NEXT:    movd %r15d, %xmm10
2842; SSSE3-NEXT:    shlq $63, %r12
2843; SSSE3-NEXT:    sarq $63, %r12
2844; SSSE3-NEXT:    movd %r12d, %xmm0
2845; SSSE3-NEXT:    shlq $50, %r13
2846; SSSE3-NEXT:    sarq $63, %r13
2847; SSSE3-NEXT:    movd %r13d, %xmm11
2848; SSSE3-NEXT:    shlq $58, %rdx
2849; SSSE3-NEXT:    sarq $63, %rdx
2850; SSSE3-NEXT:    movd %edx, %xmm4
2851; SSSE3-NEXT:    shlq $54, %rsi
2852; SSSE3-NEXT:    sarq $63, %rsi
2853; SSSE3-NEXT:    movd %esi, %xmm12
2854; SSSE3-NEXT:    shlq $62, %rcx
2855; SSSE3-NEXT:    sarq $63, %rcx
2856; SSSE3-NEXT:    movd %ecx, %xmm6
2857; SSSE3-NEXT:    shlq $52, %rbp
2858; SSSE3-NEXT:    sarq $63, %rbp
2859; SSSE3-NEXT:    movd %ebp, %xmm13
2860; SSSE3-NEXT:    shlq $60, %rax
2861; SSSE3-NEXT:    sarq $63, %rax
2862; SSSE3-NEXT:    movd %eax, %xmm7
2863; SSSE3-NEXT:    shrq $15, %r10
2864; SSSE3-NEXT:    movd %r10d, %xmm14
2865; SSSE3-NEXT:    shrq $7, %rbx
2866; SSSE3-NEXT:    movd %ebx, %xmm3
2867; SSSE3-NEXT:    movswq 2(%rdi), %rdx
2868; SSSE3-NEXT:    movq %rdx, %r8
2869; SSSE3-NEXT:    movq %rdx, %r9
2870; SSSE3-NEXT:    movq %rdx, %r10
2871; SSSE3-NEXT:    movq %rdx, %r11
2872; SSSE3-NEXT:    movq %rdx, %r14
2873; SSSE3-NEXT:    movq %rdx, %r15
2874; SSSE3-NEXT:    movq %rdx, %r12
2875; SSSE3-NEXT:    movq %rdx, %r13
2876; SSSE3-NEXT:    movq %rdx, %rbx
2877; SSSE3-NEXT:    movq %rdx, %rax
2878; SSSE3-NEXT:    movq %rdx, %rcx
2879; SSSE3-NEXT:    movq %rdx, %rsi
2880; SSSE3-NEXT:    movq %rdx, %rdi
2881; SSSE3-NEXT:    movq %rdx, %rbp
2882; SSSE3-NEXT:    shlq $49, %rbp
2883; SSSE3-NEXT:    sarq $63, %rbp
2884; SSSE3-NEXT:    movd %ebp, %xmm1
2885; SSSE3-NEXT:    movq %rdx, %rbp
2886; SSSE3-NEXT:    movsbq %dl, %rdx
2887; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm8[0],xmm2[1],xmm8[1],xmm2[2],xmm8[2],xmm2[3],xmm8[3],xmm2[4],xmm8[4],xmm2[5],xmm8[5],xmm2[6],xmm8[6],xmm2[7],xmm8[7]
2888; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm15[0],xmm2[1],xmm15[1],xmm2[2],xmm15[2],xmm2[3],xmm15[3],xmm2[4],xmm15[4],xmm2[5],xmm15[5],xmm2[6],xmm15[6],xmm2[7],xmm15[7]
2889; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm9[0],xmm5[1],xmm9[1],xmm5[2],xmm9[2],xmm5[3],xmm9[3],xmm5[4],xmm9[4],xmm5[5],xmm9[5],xmm5[6],xmm9[6],xmm5[7],xmm9[7]
2890; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm10[0],xmm0[1],xmm10[1],xmm0[2],xmm10[2],xmm0[3],xmm10[3],xmm0[4],xmm10[4],xmm0[5],xmm10[5],xmm0[6],xmm10[6],xmm0[7],xmm10[7]
2891; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1],xmm0[2],xmm5[2],xmm0[3],xmm5[3],xmm0[4],xmm5[4],xmm0[5],xmm5[5],xmm0[6],xmm5[6],xmm0[7],xmm5[7]
2892; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3],xmm0[4],xmm2[4],xmm0[5],xmm2[5],xmm0[6],xmm2[6],xmm0[7],xmm2[7]
2893; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm11[0],xmm4[1],xmm11[1],xmm4[2],xmm11[2],xmm4[3],xmm11[3],xmm4[4],xmm11[4],xmm4[5],xmm11[5],xmm4[6],xmm11[6],xmm4[7],xmm11[7]
2894; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm12[0],xmm6[1],xmm12[1],xmm6[2],xmm12[2],xmm6[3],xmm12[3],xmm6[4],xmm12[4],xmm6[5],xmm12[5],xmm6[6],xmm12[6],xmm6[7],xmm12[7]
2895; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3],xmm6[4],xmm4[4],xmm6[5],xmm4[5],xmm6[6],xmm4[6],xmm6[7],xmm4[7]
2896; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm13[0],xmm7[1],xmm13[1],xmm7[2],xmm13[2],xmm7[3],xmm13[3],xmm7[4],xmm13[4],xmm7[5],xmm13[5],xmm7[6],xmm13[6],xmm7[7],xmm13[7]
2897; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm14[0],xmm3[1],xmm14[1],xmm3[2],xmm14[2],xmm3[3],xmm14[3],xmm3[4],xmm14[4],xmm3[5],xmm14[5],xmm3[6],xmm14[6],xmm3[7],xmm14[7]
2898; SSSE3-NEXT:    shlq $57, %r8
2899; SSSE3-NEXT:    sarq $63, %r8
2900; SSSE3-NEXT:    movd %r8d, %xmm2
2901; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3],xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7]
2902; SSSE3-NEXT:    shlq $53, %r9
2903; SSSE3-NEXT:    sarq $63, %r9
2904; SSSE3-NEXT:    movd %r9d, %xmm3
2905; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[1],xmm7[1],xmm6[2],xmm7[2],xmm6[3],xmm7[3],xmm6[4],xmm7[4],xmm6[5],xmm7[5],xmm6[6],xmm7[6],xmm6[7],xmm7[7]
2906; SSSE3-NEXT:    shlq $61, %r10
2907; SSSE3-NEXT:    sarq $63, %r10
2908; SSSE3-NEXT:    movd %r10d, %xmm4
2909; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm6[0],xmm0[1],xmm6[1],xmm0[2],xmm6[2],xmm0[3],xmm6[3],xmm0[4],xmm6[4],xmm0[5],xmm6[5],xmm0[6],xmm6[6],xmm0[7],xmm6[7]
2910; SSSE3-NEXT:    shlq $51, %r11
2911; SSSE3-NEXT:    sarq $63, %r11
2912; SSSE3-NEXT:    movd %r11d, %xmm5
2913; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3],xmm2[4],xmm1[4],xmm2[5],xmm1[5],xmm2[6],xmm1[6],xmm2[7],xmm1[7]
2914; SSSE3-NEXT:    shlq $59, %r14
2915; SSSE3-NEXT:    sarq $63, %r14
2916; SSSE3-NEXT:    movd %r14d, %xmm6
2917; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
2918; SSSE3-NEXT:    shlq $55, %r15
2919; SSSE3-NEXT:    sarq $63, %r15
2920; SSSE3-NEXT:    movd %r15d, %xmm3
2921; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7]
2922; SSSE3-NEXT:    shlq $63, %r12
2923; SSSE3-NEXT:    sarq $63, %r12
2924; SSSE3-NEXT:    movd %r12d, %xmm1
2925; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1],xmm6[2],xmm5[2],xmm6[3],xmm5[3],xmm6[4],xmm5[4],xmm6[5],xmm5[5],xmm6[6],xmm5[6],xmm6[7],xmm5[7]
2926; SSSE3-NEXT:    shlq $50, %r13
2927; SSSE3-NEXT:    sarq $63, %r13
2928; SSSE3-NEXT:    movd %r13d, %xmm2
2929; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
2930; SSSE3-NEXT:    shlq $58, %rbx
2931; SSSE3-NEXT:    sarq $63, %rbx
2932; SSSE3-NEXT:    movd %ebx, %xmm3
2933; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm6[0],xmm1[1],xmm6[1],xmm1[2],xmm6[2],xmm1[3],xmm6[3],xmm1[4],xmm6[4],xmm1[5],xmm6[5],xmm1[6],xmm6[6],xmm1[7],xmm6[7]
2934; SSSE3-NEXT:    shlq $54, %rax
2935; SSSE3-NEXT:    sarq $63, %rax
2936; SSSE3-NEXT:    movd %eax, %xmm5
2937; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7]
2938; SSSE3-NEXT:    shlq $62, %rcx
2939; SSSE3-NEXT:    sarq $63, %rcx
2940; SSSE3-NEXT:    movd %ecx, %xmm4
2941; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
2942; SSSE3-NEXT:    shlq $52, %rsi
2943; SSSE3-NEXT:    sarq $63, %rsi
2944; SSSE3-NEXT:    movd %esi, %xmm2
2945; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm5[0],xmm4[1],xmm5[1],xmm4[2],xmm5[2],xmm4[3],xmm5[3],xmm4[4],xmm5[4],xmm4[5],xmm5[5],xmm4[6],xmm5[6],xmm4[7],xmm5[7]
2946; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
2947; SSSE3-NEXT:    shlq $60, %rdi
2948; SSSE3-NEXT:    sarq $63, %rdi
2949; SSSE3-NEXT:    movd %edi, %xmm3
2950; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7]
2951; SSSE3-NEXT:    shrq $15, %rbp
2952; SSSE3-NEXT:    movd %ebp, %xmm2
2953; SSSE3-NEXT:    shrq $7, %rdx
2954; SSSE3-NEXT:    movd %edx, %xmm5
2955; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7]
2956; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[1],xmm5[1],xmm3[2],xmm5[2],xmm3[3],xmm5[3],xmm3[4],xmm5[4],xmm3[5],xmm5[5],xmm3[6],xmm5[6],xmm3[7],xmm5[7]
2957; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7]
2958; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm4[0],xmm1[1],xmm4[1],xmm1[2],xmm4[2],xmm1[3],xmm4[3],xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7]
2959; SSSE3-NEXT:    popq %rbx
2960; SSSE3-NEXT:    popq %r12
2961; SSSE3-NEXT:    popq %r13
2962; SSSE3-NEXT:    popq %r14
2963; SSSE3-NEXT:    popq %r15
2964; SSSE3-NEXT:    popq %rbp
2965; SSSE3-NEXT:    retq
2966;
2967; SSE41-LABEL: load_sext_32i1_to_32i8:
2968; SSE41:       # BB#0: # %entry
2969; SSE41-NEXT:    movswq (%rdi), %rax
2970; SSE41-NEXT:    movq %rax, %rcx
2971; SSE41-NEXT:    shlq $62, %rcx
2972; SSE41-NEXT:    sarq $63, %rcx
2973; SSE41-NEXT:    movq %rax, %rdx
2974; SSE41-NEXT:    shlq $63, %rdx
2975; SSE41-NEXT:    sarq $63, %rdx
2976; SSE41-NEXT:    movd %edx, %xmm0
2977; SSE41-NEXT:    pinsrb $1, %ecx, %xmm0
2978; SSE41-NEXT:    movq %rax, %rcx
2979; SSE41-NEXT:    shlq $61, %rcx
2980; SSE41-NEXT:    sarq $63, %rcx
2981; SSE41-NEXT:    pinsrb $2, %ecx, %xmm0
2982; SSE41-NEXT:    movq %rax, %rcx
2983; SSE41-NEXT:    shlq $60, %rcx
2984; SSE41-NEXT:    sarq $63, %rcx
2985; SSE41-NEXT:    pinsrb $3, %ecx, %xmm0
2986; SSE41-NEXT:    movq %rax, %rcx
2987; SSE41-NEXT:    shlq $59, %rcx
2988; SSE41-NEXT:    sarq $63, %rcx
2989; SSE41-NEXT:    pinsrb $4, %ecx, %xmm0
2990; SSE41-NEXT:    movq %rax, %rcx
2991; SSE41-NEXT:    shlq $58, %rcx
2992; SSE41-NEXT:    sarq $63, %rcx
2993; SSE41-NEXT:    pinsrb $5, %ecx, %xmm0
2994; SSE41-NEXT:    movq %rax, %rcx
2995; SSE41-NEXT:    shlq $57, %rcx
2996; SSE41-NEXT:    sarq $63, %rcx
2997; SSE41-NEXT:    pinsrb $6, %ecx, %xmm0
2998; SSE41-NEXT:    movsbq %al, %rcx
2999; SSE41-NEXT:    shrq $7, %rcx
3000; SSE41-NEXT:    pinsrb $7, %ecx, %xmm0
3001; SSE41-NEXT:    movq %rax, %rcx
3002; SSE41-NEXT:    shlq $55, %rcx
3003; SSE41-NEXT:    sarq $63, %rcx
3004; SSE41-NEXT:    pinsrb $8, %ecx, %xmm0
3005; SSE41-NEXT:    movq %rax, %rcx
3006; SSE41-NEXT:    shlq $54, %rcx
3007; SSE41-NEXT:    sarq $63, %rcx
3008; SSE41-NEXT:    pinsrb $9, %ecx, %xmm0
3009; SSE41-NEXT:    movq %rax, %rcx
3010; SSE41-NEXT:    shlq $53, %rcx
3011; SSE41-NEXT:    sarq $63, %rcx
3012; SSE41-NEXT:    pinsrb $10, %ecx, %xmm0
3013; SSE41-NEXT:    movq %rax, %rcx
3014; SSE41-NEXT:    shlq $52, %rcx
3015; SSE41-NEXT:    sarq $63, %rcx
3016; SSE41-NEXT:    pinsrb $11, %ecx, %xmm0
3017; SSE41-NEXT:    movq %rax, %rcx
3018; SSE41-NEXT:    shlq $51, %rcx
3019; SSE41-NEXT:    sarq $63, %rcx
3020; SSE41-NEXT:    pinsrb $12, %ecx, %xmm0
3021; SSE41-NEXT:    movq %rax, %rcx
3022; SSE41-NEXT:    shlq $50, %rcx
3023; SSE41-NEXT:    sarq $63, %rcx
3024; SSE41-NEXT:    pinsrb $13, %ecx, %xmm0
3025; SSE41-NEXT:    movq %rax, %rcx
3026; SSE41-NEXT:    shlq $49, %rcx
3027; SSE41-NEXT:    sarq $63, %rcx
3028; SSE41-NEXT:    pinsrb $14, %ecx, %xmm0
3029; SSE41-NEXT:    shrq $15, %rax
3030; SSE41-NEXT:    pinsrb $15, %eax, %xmm0
3031; SSE41-NEXT:    movswq 2(%rdi), %rax
3032; SSE41-NEXT:    movq %rax, %rcx
3033; SSE41-NEXT:    shlq $62, %rcx
3034; SSE41-NEXT:    sarq $63, %rcx
3035; SSE41-NEXT:    movq %rax, %rdx
3036; SSE41-NEXT:    shlq $63, %rdx
3037; SSE41-NEXT:    sarq $63, %rdx
3038; SSE41-NEXT:    movd %edx, %xmm1
3039; SSE41-NEXT:    pinsrb $1, %ecx, %xmm1
3040; SSE41-NEXT:    movq %rax, %rcx
3041; SSE41-NEXT:    shlq $61, %rcx
3042; SSE41-NEXT:    sarq $63, %rcx
3043; SSE41-NEXT:    pinsrb $2, %ecx, %xmm1
3044; SSE41-NEXT:    movq %rax, %rcx
3045; SSE41-NEXT:    shlq $60, %rcx
3046; SSE41-NEXT:    sarq $63, %rcx
3047; SSE41-NEXT:    pinsrb $3, %ecx, %xmm1
3048; SSE41-NEXT:    movq %rax, %rcx
3049; SSE41-NEXT:    shlq $59, %rcx
3050; SSE41-NEXT:    sarq $63, %rcx
3051; SSE41-NEXT:    pinsrb $4, %ecx, %xmm1
3052; SSE41-NEXT:    movq %rax, %rcx
3053; SSE41-NEXT:    shlq $58, %rcx
3054; SSE41-NEXT:    sarq $63, %rcx
3055; SSE41-NEXT:    pinsrb $5, %ecx, %xmm1
3056; SSE41-NEXT:    movq %rax, %rcx
3057; SSE41-NEXT:    shlq $57, %rcx
3058; SSE41-NEXT:    sarq $63, %rcx
3059; SSE41-NEXT:    pinsrb $6, %ecx, %xmm1
3060; SSE41-NEXT:    movsbq %al, %rcx
3061; SSE41-NEXT:    shrq $7, %rcx
3062; SSE41-NEXT:    pinsrb $7, %ecx, %xmm1
3063; SSE41-NEXT:    movq %rax, %rcx
3064; SSE41-NEXT:    shlq $55, %rcx
3065; SSE41-NEXT:    sarq $63, %rcx
3066; SSE41-NEXT:    pinsrb $8, %ecx, %xmm1
3067; SSE41-NEXT:    movq %rax, %rcx
3068; SSE41-NEXT:    shlq $54, %rcx
3069; SSE41-NEXT:    sarq $63, %rcx
3070; SSE41-NEXT:    pinsrb $9, %ecx, %xmm1
3071; SSE41-NEXT:    movq %rax, %rcx
3072; SSE41-NEXT:    shlq $53, %rcx
3073; SSE41-NEXT:    sarq $63, %rcx
3074; SSE41-NEXT:    pinsrb $10, %ecx, %xmm1
3075; SSE41-NEXT:    movq %rax, %rcx
3076; SSE41-NEXT:    shlq $52, %rcx
3077; SSE41-NEXT:    sarq $63, %rcx
3078; SSE41-NEXT:    pinsrb $11, %ecx, %xmm1
3079; SSE41-NEXT:    movq %rax, %rcx
3080; SSE41-NEXT:    shlq $51, %rcx
3081; SSE41-NEXT:    sarq $63, %rcx
3082; SSE41-NEXT:    pinsrb $12, %ecx, %xmm1
3083; SSE41-NEXT:    movq %rax, %rcx
3084; SSE41-NEXT:    shlq $50, %rcx
3085; SSE41-NEXT:    sarq $63, %rcx
3086; SSE41-NEXT:    pinsrb $13, %ecx, %xmm1
3087; SSE41-NEXT:    movq %rax, %rcx
3088; SSE41-NEXT:    shlq $49, %rcx
3089; SSE41-NEXT:    sarq $63, %rcx
3090; SSE41-NEXT:    pinsrb $14, %ecx, %xmm1
3091; SSE41-NEXT:    shrq $15, %rax
3092; SSE41-NEXT:    pinsrb $15, %eax, %xmm1
3093; SSE41-NEXT:    retq
3094;
3095; AVX1-LABEL: load_sext_32i1_to_32i8:
3096; AVX1:       # BB#0: # %entry
3097; AVX1-NEXT:    pushq %rbp
3098; AVX1-NEXT:    pushq %r15
3099; AVX1-NEXT:    pushq %r14
3100; AVX1-NEXT:    pushq %r13
3101; AVX1-NEXT:    pushq %r12
3102; AVX1-NEXT:    pushq %rbx
3103; AVX1-NEXT:    movslq (%rdi), %rax
3104; AVX1-NEXT:    movq %rax, %rcx
3105; AVX1-NEXT:    shlq $47, %rcx
3106; AVX1-NEXT:    sarq $63, %rcx
3107; AVX1-NEXT:    vmovd %ecx, %xmm0
3108; AVX1-NEXT:    movq %rax, %r8
3109; AVX1-NEXT:    movq %rax, %rdx
3110; AVX1-NEXT:    movq %rax, %rcx
3111; AVX1-NEXT:    movq %rax, %rdi
3112; AVX1-NEXT:    movq %rax, %r13
3113; AVX1-NEXT:    movq %rax, %rsi
3114; AVX1-NEXT:    movq %rax, %r10
3115; AVX1-NEXT:    movq %rax, %r11
3116; AVX1-NEXT:    movq %rax, %r9
3117; AVX1-NEXT:    movq %rax, %rbx
3118; AVX1-NEXT:    movq %rax, %r14
3119; AVX1-NEXT:    movq %rax, %r15
3120; AVX1-NEXT:    movq %rax, %r12
3121; AVX1-NEXT:    movq %rax, %rbp
3122; AVX1-NEXT:    shlq $46, %rbp
3123; AVX1-NEXT:    sarq $63, %rbp
3124; AVX1-NEXT:    vpinsrb $1, %ebp, %xmm0, %xmm0
3125; AVX1-NEXT:    movq %rax, %rbp
3126; AVX1-NEXT:    shlq $45, %r8
3127; AVX1-NEXT:    sarq $63, %r8
3128; AVX1-NEXT:    vpinsrb $2, %r8d, %xmm0, %xmm0
3129; AVX1-NEXT:    movq %rax, %r8
3130; AVX1-NEXT:    shlq $44, %rdx
3131; AVX1-NEXT:    sarq $63, %rdx
3132; AVX1-NEXT:    vpinsrb $3, %edx, %xmm0, %xmm0
3133; AVX1-NEXT:    movq %rax, %rdx
3134; AVX1-NEXT:    shlq $43, %rcx
3135; AVX1-NEXT:    sarq $63, %rcx
3136; AVX1-NEXT:    vpinsrb $4, %ecx, %xmm0, %xmm0
3137; AVX1-NEXT:    movq %rax, %rcx
3138; AVX1-NEXT:    shlq $42, %rdi
3139; AVX1-NEXT:    sarq $63, %rdi
3140; AVX1-NEXT:    vpinsrb $5, %edi, %xmm0, %xmm0
3141; AVX1-NEXT:    movq %rax, %rdi
3142; AVX1-NEXT:    shlq $41, %r13
3143; AVX1-NEXT:    sarq $63, %r13
3144; AVX1-NEXT:    vpinsrb $6, %r13d, %xmm0, %xmm0
3145; AVX1-NEXT:    movq %rax, %r13
3146; AVX1-NEXT:    shlq $40, %rsi
3147; AVX1-NEXT:    sarq $63, %rsi
3148; AVX1-NEXT:    vpinsrb $7, %esi, %xmm0, %xmm0
3149; AVX1-NEXT:    movq %rax, %rsi
3150; AVX1-NEXT:    shlq $39, %r10
3151; AVX1-NEXT:    sarq $63, %r10
3152; AVX1-NEXT:    vpinsrb $8, %r10d, %xmm0, %xmm0
3153; AVX1-NEXT:    movq %rax, %r10
3154; AVX1-NEXT:    shlq $38, %r11
3155; AVX1-NEXT:    sarq $63, %r11
3156; AVX1-NEXT:    vpinsrb $9, %r11d, %xmm0, %xmm0
3157; AVX1-NEXT:    movsbq %al, %r11
3158; AVX1-NEXT:    shlq $37, %r9
3159; AVX1-NEXT:    sarq $63, %r9
3160; AVX1-NEXT:    vpinsrb $10, %r9d, %xmm0, %xmm0
3161; AVX1-NEXT:    movq %rax, %r9
3162; AVX1-NEXT:    shlq $36, %rbx
3163; AVX1-NEXT:    sarq $63, %rbx
3164; AVX1-NEXT:    vpinsrb $11, %ebx, %xmm0, %xmm0
3165; AVX1-NEXT:    movq %rax, %rbx
3166; AVX1-NEXT:    shlq $35, %r14
3167; AVX1-NEXT:    sarq $63, %r14
3168; AVX1-NEXT:    vpinsrb $12, %r14d, %xmm0, %xmm0
3169; AVX1-NEXT:    movq %rax, %r14
3170; AVX1-NEXT:    shlq $34, %r15
3171; AVX1-NEXT:    sarq $63, %r15
3172; AVX1-NEXT:    vpinsrb $13, %r15d, %xmm0, %xmm0
3173; AVX1-NEXT:    movq %rax, %r15
3174; AVX1-NEXT:    shlq $33, %r12
3175; AVX1-NEXT:    sarq $63, %r12
3176; AVX1-NEXT:    vpinsrb $14, %r12d, %xmm0, %xmm0
3177; AVX1-NEXT:    movq %rax, %r12
3178; AVX1-NEXT:    shrq $31, %rbp
3179; AVX1-NEXT:    vpinsrb $15, %ebp, %xmm0, %xmm0
3180; AVX1-NEXT:    movq %rax, %rbp
3181; AVX1-NEXT:    shlq $63, %rdx
3182; AVX1-NEXT:    sarq $63, %rdx
3183; AVX1-NEXT:    vmovd %edx, %xmm1
3184; AVX1-NEXT:    movq %rax, %rdx
3185; AVX1-NEXT:    movswq %ax, %rax
3186; AVX1-NEXT:    shlq $62, %r8
3187; AVX1-NEXT:    sarq $63, %r8
3188; AVX1-NEXT:    vpinsrb $1, %r8d, %xmm1, %xmm1
3189; AVX1-NEXT:    shlq $61, %rcx
3190; AVX1-NEXT:    sarq $63, %rcx
3191; AVX1-NEXT:    vpinsrb $2, %ecx, %xmm1, %xmm1
3192; AVX1-NEXT:    shlq $60, %rdi
3193; AVX1-NEXT:    sarq $63, %rdi
3194; AVX1-NEXT:    vpinsrb $3, %edi, %xmm1, %xmm1
3195; AVX1-NEXT:    shlq $59, %r13
3196; AVX1-NEXT:    sarq $63, %r13
3197; AVX1-NEXT:    vpinsrb $4, %r13d, %xmm1, %xmm1
3198; AVX1-NEXT:    shlq $58, %rsi
3199; AVX1-NEXT:    sarq $63, %rsi
3200; AVX1-NEXT:    vpinsrb $5, %esi, %xmm1, %xmm1
3201; AVX1-NEXT:    shlq $57, %r10
3202; AVX1-NEXT:    sarq $63, %r10
3203; AVX1-NEXT:    vpinsrb $6, %r10d, %xmm1, %xmm1
3204; AVX1-NEXT:    shrq $7, %r11
3205; AVX1-NEXT:    vpinsrb $7, %r11d, %xmm1, %xmm1
3206; AVX1-NEXT:    shlq $55, %r9
3207; AVX1-NEXT:    sarq $63, %r9
3208; AVX1-NEXT:    vpinsrb $8, %r9d, %xmm1, %xmm1
3209; AVX1-NEXT:    shlq $54, %rbx
3210; AVX1-NEXT:    sarq $63, %rbx
3211; AVX1-NEXT:    vpinsrb $9, %ebx, %xmm1, %xmm1
3212; AVX1-NEXT:    shlq $53, %r14
3213; AVX1-NEXT:    sarq $63, %r14
3214; AVX1-NEXT:    vpinsrb $10, %r14d, %xmm1, %xmm1
3215; AVX1-NEXT:    shlq $52, %r15
3216; AVX1-NEXT:    sarq $63, %r15
3217; AVX1-NEXT:    vpinsrb $11, %r15d, %xmm1, %xmm1
3218; AVX1-NEXT:    shlq $51, %r12
3219; AVX1-NEXT:    sarq $63, %r12
3220; AVX1-NEXT:    vpinsrb $12, %r12d, %xmm1, %xmm1
3221; AVX1-NEXT:    shlq $50, %rbp
3222; AVX1-NEXT:    sarq $63, %rbp
3223; AVX1-NEXT:    vpinsrb $13, %ebp, %xmm1, %xmm1
3224; AVX1-NEXT:    shlq $49, %rdx
3225; AVX1-NEXT:    sarq $63, %rdx
3226; AVX1-NEXT:    vpinsrb $14, %edx, %xmm1, %xmm1
3227; AVX1-NEXT:    shrq $15, %rax
3228; AVX1-NEXT:    vpinsrb $15, %eax, %xmm1, %xmm1
3229; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
3230; AVX1-NEXT:    popq %rbx
3231; AVX1-NEXT:    popq %r12
3232; AVX1-NEXT:    popq %r13
3233; AVX1-NEXT:    popq %r14
3234; AVX1-NEXT:    popq %r15
3235; AVX1-NEXT:    popq %rbp
3236; AVX1-NEXT:    retq
3237;
3238; AVX2-LABEL: load_sext_32i1_to_32i8:
3239; AVX2:       # BB#0: # %entry
3240; AVX2-NEXT:    pushq %rbp
3241; AVX2-NEXT:    pushq %r15
3242; AVX2-NEXT:    pushq %r14
3243; AVX2-NEXT:    pushq %r13
3244; AVX2-NEXT:    pushq %r12
3245; AVX2-NEXT:    pushq %rbx
3246; AVX2-NEXT:    movslq (%rdi), %rax
3247; AVX2-NEXT:    movq %rax, %rcx
3248; AVX2-NEXT:    shlq $47, %rcx
3249; AVX2-NEXT:    sarq $63, %rcx
3250; AVX2-NEXT:    vmovd %ecx, %xmm0
3251; AVX2-NEXT:    movq %rax, %r8
3252; AVX2-NEXT:    movq %rax, %rdx
3253; AVX2-NEXT:    movq %rax, %rcx
3254; AVX2-NEXT:    movq %rax, %rdi
3255; AVX2-NEXT:    movq %rax, %r13
3256; AVX2-NEXT:    movq %rax, %rsi
3257; AVX2-NEXT:    movq %rax, %r10
3258; AVX2-NEXT:    movq %rax, %r11
3259; AVX2-NEXT:    movq %rax, %r9
3260; AVX2-NEXT:    movq %rax, %rbx
3261; AVX2-NEXT:    movq %rax, %r14
3262; AVX2-NEXT:    movq %rax, %r15
3263; AVX2-NEXT:    movq %rax, %r12
3264; AVX2-NEXT:    movq %rax, %rbp
3265; AVX2-NEXT:    shlq $46, %rbp
3266; AVX2-NEXT:    sarq $63, %rbp
3267; AVX2-NEXT:    vpinsrb $1, %ebp, %xmm0, %xmm0
3268; AVX2-NEXT:    movq %rax, %rbp
3269; AVX2-NEXT:    shlq $45, %r8
3270; AVX2-NEXT:    sarq $63, %r8
3271; AVX2-NEXT:    vpinsrb $2, %r8d, %xmm0, %xmm0
3272; AVX2-NEXT:    movq %rax, %r8
3273; AVX2-NEXT:    shlq $44, %rdx
3274; AVX2-NEXT:    sarq $63, %rdx
3275; AVX2-NEXT:    vpinsrb $3, %edx, %xmm0, %xmm0
3276; AVX2-NEXT:    movq %rax, %rdx
3277; AVX2-NEXT:    shlq $43, %rcx
3278; AVX2-NEXT:    sarq $63, %rcx
3279; AVX2-NEXT:    vpinsrb $4, %ecx, %xmm0, %xmm0
3280; AVX2-NEXT:    movq %rax, %rcx
3281; AVX2-NEXT:    shlq $42, %rdi
3282; AVX2-NEXT:    sarq $63, %rdi
3283; AVX2-NEXT:    vpinsrb $5, %edi, %xmm0, %xmm0
3284; AVX2-NEXT:    movq %rax, %rdi
3285; AVX2-NEXT:    shlq $41, %r13
3286; AVX2-NEXT:    sarq $63, %r13
3287; AVX2-NEXT:    vpinsrb $6, %r13d, %xmm0, %xmm0
3288; AVX2-NEXT:    movq %rax, %r13
3289; AVX2-NEXT:    shlq $40, %rsi
3290; AVX2-NEXT:    sarq $63, %rsi
3291; AVX2-NEXT:    vpinsrb $7, %esi, %xmm0, %xmm0
3292; AVX2-NEXT:    movq %rax, %rsi
3293; AVX2-NEXT:    shlq $39, %r10
3294; AVX2-NEXT:    sarq $63, %r10
3295; AVX2-NEXT:    vpinsrb $8, %r10d, %xmm0, %xmm0
3296; AVX2-NEXT:    movq %rax, %r10
3297; AVX2-NEXT:    shlq $38, %r11
3298; AVX2-NEXT:    sarq $63, %r11
3299; AVX2-NEXT:    vpinsrb $9, %r11d, %xmm0, %xmm0
3300; AVX2-NEXT:    movsbq %al, %r11
3301; AVX2-NEXT:    shlq $37, %r9
3302; AVX2-NEXT:    sarq $63, %r9
3303; AVX2-NEXT:    vpinsrb $10, %r9d, %xmm0, %xmm0
3304; AVX2-NEXT:    movq %rax, %r9
3305; AVX2-NEXT:    shlq $36, %rbx
3306; AVX2-NEXT:    sarq $63, %rbx
3307; AVX2-NEXT:    vpinsrb $11, %ebx, %xmm0, %xmm0
3308; AVX2-NEXT:    movq %rax, %rbx
3309; AVX2-NEXT:    shlq $35, %r14
3310; AVX2-NEXT:    sarq $63, %r14
3311; AVX2-NEXT:    vpinsrb $12, %r14d, %xmm0, %xmm0
3312; AVX2-NEXT:    movq %rax, %r14
3313; AVX2-NEXT:    shlq $34, %r15
3314; AVX2-NEXT:    sarq $63, %r15
3315; AVX2-NEXT:    vpinsrb $13, %r15d, %xmm0, %xmm0
3316; AVX2-NEXT:    movq %rax, %r15
3317; AVX2-NEXT:    shlq $33, %r12
3318; AVX2-NEXT:    sarq $63, %r12
3319; AVX2-NEXT:    vpinsrb $14, %r12d, %xmm0, %xmm0
3320; AVX2-NEXT:    movq %rax, %r12
3321; AVX2-NEXT:    shrq $31, %rbp
3322; AVX2-NEXT:    vpinsrb $15, %ebp, %xmm0, %xmm0
3323; AVX2-NEXT:    movq %rax, %rbp
3324; AVX2-NEXT:    shlq $63, %rdx
3325; AVX2-NEXT:    sarq $63, %rdx
3326; AVX2-NEXT:    vmovd %edx, %xmm1
3327; AVX2-NEXT:    movq %rax, %rdx
3328; AVX2-NEXT:    movswq %ax, %rax
3329; AVX2-NEXT:    shlq $62, %r8
3330; AVX2-NEXT:    sarq $63, %r8
3331; AVX2-NEXT:    vpinsrb $1, %r8d, %xmm1, %xmm1
3332; AVX2-NEXT:    shlq $61, %rcx
3333; AVX2-NEXT:    sarq $63, %rcx
3334; AVX2-NEXT:    vpinsrb $2, %ecx, %xmm1, %xmm1
3335; AVX2-NEXT:    shlq $60, %rdi
3336; AVX2-NEXT:    sarq $63, %rdi
3337; AVX2-NEXT:    vpinsrb $3, %edi, %xmm1, %xmm1
3338; AVX2-NEXT:    shlq $59, %r13
3339; AVX2-NEXT:    sarq $63, %r13
3340; AVX2-NEXT:    vpinsrb $4, %r13d, %xmm1, %xmm1
3341; AVX2-NEXT:    shlq $58, %rsi
3342; AVX2-NEXT:    sarq $63, %rsi
3343; AVX2-NEXT:    vpinsrb $5, %esi, %xmm1, %xmm1
3344; AVX2-NEXT:    shlq $57, %r10
3345; AVX2-NEXT:    sarq $63, %r10
3346; AVX2-NEXT:    vpinsrb $6, %r10d, %xmm1, %xmm1
3347; AVX2-NEXT:    shrq $7, %r11
3348; AVX2-NEXT:    vpinsrb $7, %r11d, %xmm1, %xmm1
3349; AVX2-NEXT:    shlq $55, %r9
3350; AVX2-NEXT:    sarq $63, %r9
3351; AVX2-NEXT:    vpinsrb $8, %r9d, %xmm1, %xmm1
3352; AVX2-NEXT:    shlq $54, %rbx
3353; AVX2-NEXT:    sarq $63, %rbx
3354; AVX2-NEXT:    vpinsrb $9, %ebx, %xmm1, %xmm1
3355; AVX2-NEXT:    shlq $53, %r14
3356; AVX2-NEXT:    sarq $63, %r14
3357; AVX2-NEXT:    vpinsrb $10, %r14d, %xmm1, %xmm1
3358; AVX2-NEXT:    shlq $52, %r15
3359; AVX2-NEXT:    sarq $63, %r15
3360; AVX2-NEXT:    vpinsrb $11, %r15d, %xmm1, %xmm1
3361; AVX2-NEXT:    shlq $51, %r12
3362; AVX2-NEXT:    sarq $63, %r12
3363; AVX2-NEXT:    vpinsrb $12, %r12d, %xmm1, %xmm1
3364; AVX2-NEXT:    shlq $50, %rbp
3365; AVX2-NEXT:    sarq $63, %rbp
3366; AVX2-NEXT:    vpinsrb $13, %ebp, %xmm1, %xmm1
3367; AVX2-NEXT:    shlq $49, %rdx
3368; AVX2-NEXT:    sarq $63, %rdx
3369; AVX2-NEXT:    vpinsrb $14, %edx, %xmm1, %xmm1
3370; AVX2-NEXT:    shrq $15, %rax
3371; AVX2-NEXT:    vpinsrb $15, %eax, %xmm1, %xmm1
3372; AVX2-NEXT:    vinserti128 $1, %xmm0, %ymm1, %ymm0
3373; AVX2-NEXT:    popq %rbx
3374; AVX2-NEXT:    popq %r12
3375; AVX2-NEXT:    popq %r13
3376; AVX2-NEXT:    popq %r14
3377; AVX2-NEXT:    popq %r15
3378; AVX2-NEXT:    popq %rbp
3379; AVX2-NEXT:    retq
3380;
3381; X32-SSE41-LABEL: load_sext_32i1_to_32i8:
3382; X32-SSE41:       # BB#0: # %entry
3383; X32-SSE41-NEXT:    pushl %esi
3384; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
3385; X32-SSE41-NEXT:    movswl (%eax), %ecx
3386; X32-SSE41-NEXT:    movl %ecx, %edx
3387; X32-SSE41-NEXT:    shll $30, %edx
3388; X32-SSE41-NEXT:    sarl $31, %edx
3389; X32-SSE41-NEXT:    movl %ecx, %esi
3390; X32-SSE41-NEXT:    shll $31, %esi
3391; X32-SSE41-NEXT:    sarl $31, %esi
3392; X32-SSE41-NEXT:    movd %esi, %xmm0
3393; X32-SSE41-NEXT:    pinsrb $1, %edx, %xmm0
3394; X32-SSE41-NEXT:    movl %ecx, %edx
3395; X32-SSE41-NEXT:    shll $29, %edx
3396; X32-SSE41-NEXT:    sarl $31, %edx
3397; X32-SSE41-NEXT:    pinsrb $2, %edx, %xmm0
3398; X32-SSE41-NEXT:    movl %ecx, %edx
3399; X32-SSE41-NEXT:    shll $28, %edx
3400; X32-SSE41-NEXT:    sarl $31, %edx
3401; X32-SSE41-NEXT:    pinsrb $3, %edx, %xmm0
3402; X32-SSE41-NEXT:    movl %ecx, %edx
3403; X32-SSE41-NEXT:    shll $27, %edx
3404; X32-SSE41-NEXT:    sarl $31, %edx
3405; X32-SSE41-NEXT:    pinsrb $4, %edx, %xmm0
3406; X32-SSE41-NEXT:    movl %ecx, %edx
3407; X32-SSE41-NEXT:    shll $26, %edx
3408; X32-SSE41-NEXT:    sarl $31, %edx
3409; X32-SSE41-NEXT:    pinsrb $5, %edx, %xmm0
3410; X32-SSE41-NEXT:    movl %ecx, %edx
3411; X32-SSE41-NEXT:    shll $25, %edx
3412; X32-SSE41-NEXT:    sarl $31, %edx
3413; X32-SSE41-NEXT:    pinsrb $6, %edx, %xmm0
3414; X32-SSE41-NEXT:    movsbl %cl, %edx
3415; X32-SSE41-NEXT:    shrl $7, %edx
3416; X32-SSE41-NEXT:    pinsrb $7, %edx, %xmm0
3417; X32-SSE41-NEXT:    movl %ecx, %edx
3418; X32-SSE41-NEXT:    shll $23, %edx
3419; X32-SSE41-NEXT:    sarl $31, %edx
3420; X32-SSE41-NEXT:    pinsrb $8, %edx, %xmm0
3421; X32-SSE41-NEXT:    movl %ecx, %edx
3422; X32-SSE41-NEXT:    shll $22, %edx
3423; X32-SSE41-NEXT:    sarl $31, %edx
3424; X32-SSE41-NEXT:    pinsrb $9, %edx, %xmm0
3425; X32-SSE41-NEXT:    movl %ecx, %edx
3426; X32-SSE41-NEXT:    shll $21, %edx
3427; X32-SSE41-NEXT:    sarl $31, %edx
3428; X32-SSE41-NEXT:    pinsrb $10, %edx, %xmm0
3429; X32-SSE41-NEXT:    movl %ecx, %edx
3430; X32-SSE41-NEXT:    shll $20, %edx
3431; X32-SSE41-NEXT:    sarl $31, %edx
3432; X32-SSE41-NEXT:    pinsrb $11, %edx, %xmm0
3433; X32-SSE41-NEXT:    movl %ecx, %edx
3434; X32-SSE41-NEXT:    shll $19, %edx
3435; X32-SSE41-NEXT:    sarl $31, %edx
3436; X32-SSE41-NEXT:    pinsrb $12, %edx, %xmm0
3437; X32-SSE41-NEXT:    movl %ecx, %edx
3438; X32-SSE41-NEXT:    shll $18, %edx
3439; X32-SSE41-NEXT:    sarl $31, %edx
3440; X32-SSE41-NEXT:    pinsrb $13, %edx, %xmm0
3441; X32-SSE41-NEXT:    movl %ecx, %edx
3442; X32-SSE41-NEXT:    shll $17, %edx
3443; X32-SSE41-NEXT:    sarl $31, %edx
3444; X32-SSE41-NEXT:    pinsrb $14, %edx, %xmm0
3445; X32-SSE41-NEXT:    shrl $15, %ecx
3446; X32-SSE41-NEXT:    pinsrb $15, %ecx, %xmm0
3447; X32-SSE41-NEXT:    movswl 2(%eax), %eax
3448; X32-SSE41-NEXT:    movl %eax, %ecx
3449; X32-SSE41-NEXT:    shll $30, %ecx
3450; X32-SSE41-NEXT:    sarl $31, %ecx
3451; X32-SSE41-NEXT:    movl %eax, %edx
3452; X32-SSE41-NEXT:    shll $31, %edx
3453; X32-SSE41-NEXT:    sarl $31, %edx
3454; X32-SSE41-NEXT:    movd %edx, %xmm1
3455; X32-SSE41-NEXT:    pinsrb $1, %ecx, %xmm1
3456; X32-SSE41-NEXT:    movl %eax, %ecx
3457; X32-SSE41-NEXT:    shll $29, %ecx
3458; X32-SSE41-NEXT:    sarl $31, %ecx
3459; X32-SSE41-NEXT:    pinsrb $2, %ecx, %xmm1
3460; X32-SSE41-NEXT:    movl %eax, %ecx
3461; X32-SSE41-NEXT:    shll $28, %ecx
3462; X32-SSE41-NEXT:    sarl $31, %ecx
3463; X32-SSE41-NEXT:    pinsrb $3, %ecx, %xmm1
3464; X32-SSE41-NEXT:    movl %eax, %ecx
3465; X32-SSE41-NEXT:    shll $27, %ecx
3466; X32-SSE41-NEXT:    sarl $31, %ecx
3467; X32-SSE41-NEXT:    pinsrb $4, %ecx, %xmm1
3468; X32-SSE41-NEXT:    movl %eax, %ecx
3469; X32-SSE41-NEXT:    shll $26, %ecx
3470; X32-SSE41-NEXT:    sarl $31, %ecx
3471; X32-SSE41-NEXT:    pinsrb $5, %ecx, %xmm1
3472; X32-SSE41-NEXT:    movl %eax, %ecx
3473; X32-SSE41-NEXT:    shll $25, %ecx
3474; X32-SSE41-NEXT:    sarl $31, %ecx
3475; X32-SSE41-NEXT:    pinsrb $6, %ecx, %xmm1
3476; X32-SSE41-NEXT:    movsbl %al, %ecx
3477; X32-SSE41-NEXT:    shrl $7, %ecx
3478; X32-SSE41-NEXT:    pinsrb $7, %ecx, %xmm1
3479; X32-SSE41-NEXT:    movl %eax, %ecx
3480; X32-SSE41-NEXT:    shll $23, %ecx
3481; X32-SSE41-NEXT:    sarl $31, %ecx
3482; X32-SSE41-NEXT:    pinsrb $8, %ecx, %xmm1
3483; X32-SSE41-NEXT:    movl %eax, %ecx
3484; X32-SSE41-NEXT:    shll $22, %ecx
3485; X32-SSE41-NEXT:    sarl $31, %ecx
3486; X32-SSE41-NEXT:    pinsrb $9, %ecx, %xmm1
3487; X32-SSE41-NEXT:    movl %eax, %ecx
3488; X32-SSE41-NEXT:    shll $21, %ecx
3489; X32-SSE41-NEXT:    sarl $31, %ecx
3490; X32-SSE41-NEXT:    pinsrb $10, %ecx, %xmm1
3491; X32-SSE41-NEXT:    movl %eax, %ecx
3492; X32-SSE41-NEXT:    shll $20, %ecx
3493; X32-SSE41-NEXT:    sarl $31, %ecx
3494; X32-SSE41-NEXT:    pinsrb $11, %ecx, %xmm1
3495; X32-SSE41-NEXT:    movl %eax, %ecx
3496; X32-SSE41-NEXT:    shll $19, %ecx
3497; X32-SSE41-NEXT:    sarl $31, %ecx
3498; X32-SSE41-NEXT:    pinsrb $12, %ecx, %xmm1
3499; X32-SSE41-NEXT:    movl %eax, %ecx
3500; X32-SSE41-NEXT:    shll $18, %ecx
3501; X32-SSE41-NEXT:    sarl $31, %ecx
3502; X32-SSE41-NEXT:    pinsrb $13, %ecx, %xmm1
3503; X32-SSE41-NEXT:    movl %eax, %ecx
3504; X32-SSE41-NEXT:    shll $17, %ecx
3505; X32-SSE41-NEXT:    sarl $31, %ecx
3506; X32-SSE41-NEXT:    pinsrb $14, %ecx, %xmm1
3507; X32-SSE41-NEXT:    shrl $15, %eax
3508; X32-SSE41-NEXT:    pinsrb $15, %eax, %xmm1
3509; X32-SSE41-NEXT:    popl %esi
3510; X32-SSE41-NEXT:    retl
3511entry:
3512 %X = load <32 x i1>, <32 x i1>* %ptr
3513 %Y = sext <32 x i1> %X to <32 x i8>
3514 ret <32 x i8> %Y
3515}
3516
3517define <16 x i16> @load_sext_16i8_to_16i16(<16 x i8> *%ptr) {
3518; SSE2-LABEL: load_sext_16i8_to_16i16:
3519; SSE2:       # BB#0: # %entry
3520; SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
3521; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
3522; SSE2-NEXT:    psraw $8, %xmm0
3523; SSE2-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero
3524; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
3525; SSE2-NEXT:    psraw $8, %xmm1
3526; SSE2-NEXT:    retq
3527;
3528; SSSE3-LABEL: load_sext_16i8_to_16i16:
3529; SSSE3:       # BB#0: # %entry
3530; SSSE3-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
3531; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
3532; SSSE3-NEXT:    psraw $8, %xmm0
3533; SSSE3-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero
3534; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
3535; SSSE3-NEXT:    psraw $8, %xmm1
3536; SSSE3-NEXT:    retq
3537;
3538; SSE41-LABEL: load_sext_16i8_to_16i16:
3539; SSE41:       # BB#0: # %entry
3540; SSE41-NEXT:    pmovsxbw (%rdi), %xmm0
3541; SSE41-NEXT:    pmovsxbw 8(%rdi), %xmm1
3542; SSE41-NEXT:    retq
3543;
3544; AVX1-LABEL: load_sext_16i8_to_16i16:
3545; AVX1:       # BB#0: # %entry
3546; AVX1-NEXT:    vpmovsxbw (%rdi), %xmm0
3547; AVX1-NEXT:    vpmovsxbw 8(%rdi), %xmm1
3548; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
3549; AVX1-NEXT:    retq
3550;
3551; AVX2-LABEL: load_sext_16i8_to_16i16:
3552; AVX2:       # BB#0: # %entry
3553; AVX2-NEXT:    vpmovsxbw (%rdi), %ymm0
3554; AVX2-NEXT:    retq
3555;
3556; X32-SSE41-LABEL: load_sext_16i8_to_16i16:
3557; X32-SSE41:       # BB#0: # %entry
3558; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
3559; X32-SSE41-NEXT:    pmovsxbw (%eax), %xmm0
3560; X32-SSE41-NEXT:    pmovsxbw 8(%eax), %xmm1
3561; X32-SSE41-NEXT:    retl
3562entry:
3563 %X = load <16 x i8>, <16 x i8>* %ptr
3564 %Y = sext <16 x i8> %X to <16 x i16>
3565 ret <16 x i16> %Y
3566}
3567
3568define <2 x i64> @load_sext_2i16_to_2i64(<2 x i16> *%ptr) {
3569; SSE2-LABEL: load_sext_2i16_to_2i64:
3570; SSE2:       # BB#0: # %entry
3571; SSE2-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
3572; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
3573; SSE2-NEXT:    movdqa %xmm0, %xmm1
3574; SSE2-NEXT:    psrad $31, %xmm1
3575; SSE2-NEXT:    psrad $16, %xmm0
3576; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
3577; SSE2-NEXT:    retq
3578;
3579; SSSE3-LABEL: load_sext_2i16_to_2i64:
3580; SSSE3:       # BB#0: # %entry
3581; SSSE3-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
3582; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
3583; SSSE3-NEXT:    movdqa %xmm0, %xmm1
3584; SSSE3-NEXT:    psrad $31, %xmm1
3585; SSSE3-NEXT:    psrad $16, %xmm0
3586; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
3587; SSSE3-NEXT:    retq
3588;
3589; SSE41-LABEL: load_sext_2i16_to_2i64:
3590; SSE41:       # BB#0: # %entry
3591; SSE41-NEXT:    pmovsxwq (%rdi), %xmm0
3592; SSE41-NEXT:    retq
3593;
3594; AVX-LABEL: load_sext_2i16_to_2i64:
3595; AVX:       # BB#0: # %entry
3596; AVX-NEXT:    vpmovsxwq (%rdi), %xmm0
3597; AVX-NEXT:    retq
3598;
3599; X32-SSE41-LABEL: load_sext_2i16_to_2i64:
3600; X32-SSE41:       # BB#0: # %entry
3601; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
3602; X32-SSE41-NEXT:    pmovsxwq (%eax), %xmm0
3603; X32-SSE41-NEXT:    retl
3604entry:
3605 %X = load <2 x i16>, <2 x i16>* %ptr
3606 %Y = sext <2 x i16> %X to <2 x i64>
3607 ret <2 x i64> %Y
3608}
3609
3610define <4 x i32> @load_sext_4i16_to_4i32(<4 x i16> *%ptr) {
3611; SSE2-LABEL: load_sext_4i16_to_4i32:
3612; SSE2:       # BB#0: # %entry
3613; SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
3614; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
3615; SSE2-NEXT:    psrad $16, %xmm0
3616; SSE2-NEXT:    retq
3617;
3618; SSSE3-LABEL: load_sext_4i16_to_4i32:
3619; SSSE3:       # BB#0: # %entry
3620; SSSE3-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
3621; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
3622; SSSE3-NEXT:    psrad $16, %xmm0
3623; SSSE3-NEXT:    retq
3624;
3625; SSE41-LABEL: load_sext_4i16_to_4i32:
3626; SSE41:       # BB#0: # %entry
3627; SSE41-NEXT:    pmovsxwd (%rdi), %xmm0
3628; SSE41-NEXT:    retq
3629;
3630; AVX-LABEL: load_sext_4i16_to_4i32:
3631; AVX:       # BB#0: # %entry
3632; AVX-NEXT:    vpmovsxwd (%rdi), %xmm0
3633; AVX-NEXT:    retq
3634;
3635; X32-SSE41-LABEL: load_sext_4i16_to_4i32:
3636; X32-SSE41:       # BB#0: # %entry
3637; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
3638; X32-SSE41-NEXT:    pmovsxwd (%eax), %xmm0
3639; X32-SSE41-NEXT:    retl
3640entry:
3641 %X = load <4 x i16>, <4 x i16>* %ptr
3642 %Y = sext <4 x i16> %X to <4 x i32>
3643 ret <4 x i32> %Y
3644}
3645
3646define <4 x i64> @load_sext_4i16_to_4i64(<4 x i16> *%ptr) {
3647; SSE2-LABEL: load_sext_4i16_to_4i64:
3648; SSE2:       # BB#0: # %entry
3649; SSE2-NEXT:    movswq 2(%rdi), %rax
3650; SSE2-NEXT:    movd %rax, %xmm1
3651; SSE2-NEXT:    movswq (%rdi), %rax
3652; SSE2-NEXT:    movd %rax, %xmm0
3653; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
3654; SSE2-NEXT:    movswq 6(%rdi), %rax
3655; SSE2-NEXT:    movd %rax, %xmm2
3656; SSE2-NEXT:    movswq 4(%rdi), %rax
3657; SSE2-NEXT:    movd %rax, %xmm1
3658; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
3659; SSE2-NEXT:    retq
3660;
3661; SSSE3-LABEL: load_sext_4i16_to_4i64:
3662; SSSE3:       # BB#0: # %entry
3663; SSSE3-NEXT:    movswq 2(%rdi), %rax
3664; SSSE3-NEXT:    movd %rax, %xmm1
3665; SSSE3-NEXT:    movswq (%rdi), %rax
3666; SSSE3-NEXT:    movd %rax, %xmm0
3667; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
3668; SSSE3-NEXT:    movswq 6(%rdi), %rax
3669; SSSE3-NEXT:    movd %rax, %xmm2
3670; SSSE3-NEXT:    movswq 4(%rdi), %rax
3671; SSSE3-NEXT:    movd %rax, %xmm1
3672; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm1 = xmm1[0],xmm2[0]
3673; SSSE3-NEXT:    retq
3674;
3675; SSE41-LABEL: load_sext_4i16_to_4i64:
3676; SSE41:       # BB#0: # %entry
3677; SSE41-NEXT:    pmovsxwq (%rdi), %xmm0
3678; SSE41-NEXT:    pmovsxwq 4(%rdi), %xmm1
3679; SSE41-NEXT:    retq
3680;
3681; AVX1-LABEL: load_sext_4i16_to_4i64:
3682; AVX1:       # BB#0: # %entry
3683; AVX1-NEXT:    vpmovsxwd (%rdi), %xmm0
3684; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm1
3685; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
3686; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm0
3687; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
3688; AVX1-NEXT:    retq
3689;
3690; AVX2-LABEL: load_sext_4i16_to_4i64:
3691; AVX2:       # BB#0: # %entry
3692; AVX2-NEXT:    vpmovsxwq (%rdi), %ymm0
3693; AVX2-NEXT:    retq
3694;
3695; X32-SSE41-LABEL: load_sext_4i16_to_4i64:
3696; X32-SSE41:       # BB#0: # %entry
3697; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
3698; X32-SSE41-NEXT:    pmovsxwq (%eax), %xmm0
3699; X32-SSE41-NEXT:    pmovsxwq 4(%eax), %xmm1
3700; X32-SSE41-NEXT:    retl
3701entry:
3702 %X = load <4 x i16>, <4 x i16>* %ptr
3703 %Y = sext <4 x i16> %X to <4 x i64>
3704 ret <4 x i64> %Y
3705}
3706
3707define <8 x i32> @load_sext_8i16_to_8i32(<8 x i16> *%ptr) {
3708; SSE2-LABEL: load_sext_8i16_to_8i32:
3709; SSE2:       # BB#0: # %entry
3710; SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
3711; SSE2-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
3712; SSE2-NEXT:    psrad $16, %xmm0
3713; SSE2-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero
3714; SSE2-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3]
3715; SSE2-NEXT:    psrad $16, %xmm1
3716; SSE2-NEXT:    retq
3717;
3718; SSSE3-LABEL: load_sext_8i16_to_8i32:
3719; SSSE3:       # BB#0: # %entry
3720; SSSE3-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
3721; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3]
3722; SSSE3-NEXT:    psrad $16, %xmm0
3723; SSSE3-NEXT:    movq {{.*#+}} xmm1 = mem[0],zero
3724; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3]
3725; SSSE3-NEXT:    psrad $16, %xmm1
3726; SSSE3-NEXT:    retq
3727;
3728; SSE41-LABEL: load_sext_8i16_to_8i32:
3729; SSE41:       # BB#0: # %entry
3730; SSE41-NEXT:    pmovsxwd (%rdi), %xmm0
3731; SSE41-NEXT:    pmovsxwd 8(%rdi), %xmm1
3732; SSE41-NEXT:    retq
3733;
3734; AVX1-LABEL: load_sext_8i16_to_8i32:
3735; AVX1:       # BB#0: # %entry
3736; AVX1-NEXT:    vpmovsxwd (%rdi), %xmm0
3737; AVX1-NEXT:    vpmovsxwd 8(%rdi), %xmm1
3738; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
3739; AVX1-NEXT:    retq
3740;
3741; AVX2-LABEL: load_sext_8i16_to_8i32:
3742; AVX2:       # BB#0: # %entry
3743; AVX2-NEXT:    vpmovsxwd (%rdi), %ymm0
3744; AVX2-NEXT:    retq
3745;
3746; X32-SSE41-LABEL: load_sext_8i16_to_8i32:
3747; X32-SSE41:       # BB#0: # %entry
3748; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
3749; X32-SSE41-NEXT:    pmovsxwd (%eax), %xmm0
3750; X32-SSE41-NEXT:    pmovsxwd 8(%eax), %xmm1
3751; X32-SSE41-NEXT:    retl
3752entry:
3753 %X = load <8 x i16>, <8 x i16>* %ptr
3754 %Y = sext <8 x i16> %X to <8 x i32>
3755 ret <8 x i32> %Y
3756}
3757
3758define <2 x i64> @load_sext_2i32_to_2i64(<2 x i32> *%ptr) {
3759; SSE2-LABEL: load_sext_2i32_to_2i64:
3760; SSE2:       # BB#0: # %entry
3761; SSE2-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
3762; SSE2-NEXT:    movdqa %xmm0, %xmm1
3763; SSE2-NEXT:    psrad $31, %xmm1
3764; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
3765; SSE2-NEXT:    retq
3766;
3767; SSSE3-LABEL: load_sext_2i32_to_2i64:
3768; SSSE3:       # BB#0: # %entry
3769; SSSE3-NEXT:    movq {{.*#+}} xmm0 = mem[0],zero
3770; SSSE3-NEXT:    movdqa %xmm0, %xmm1
3771; SSSE3-NEXT:    psrad $31, %xmm1
3772; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
3773; SSSE3-NEXT:    retq
3774;
3775; SSE41-LABEL: load_sext_2i32_to_2i64:
3776; SSE41:       # BB#0: # %entry
3777; SSE41-NEXT:    pmovsxdq (%rdi), %xmm0
3778; SSE41-NEXT:    retq
3779;
3780; AVX-LABEL: load_sext_2i32_to_2i64:
3781; AVX:       # BB#0: # %entry
3782; AVX-NEXT:    vpmovsxdq (%rdi), %xmm0
3783; AVX-NEXT:    retq
3784;
3785; X32-SSE41-LABEL: load_sext_2i32_to_2i64:
3786; X32-SSE41:       # BB#0: # %entry
3787; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
3788; X32-SSE41-NEXT:    pmovsxdq (%eax), %xmm0
3789; X32-SSE41-NEXT:    retl
3790entry:
3791 %X = load <2 x i32>, <2 x i32>* %ptr
3792 %Y = sext <2 x i32> %X to <2 x i64>
3793 ret <2 x i64> %Y
3794}
3795
3796define <4 x i64> @load_sext_4i32_to_4i64(<4 x i32> *%ptr) {
3797; SSE2-LABEL: load_sext_4i32_to_4i64:
3798; SSE2:       # BB#0: # %entry
3799; SSE2-NEXT:    movdqa (%rdi), %xmm0
3800; SSE2-NEXT:    movdqa %xmm0, %xmm2
3801; SSE2-NEXT:    psrad $31, %xmm2
3802; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
3803; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
3804; SSE2-NEXT:    movdqa %xmm1, %xmm2
3805; SSE2-NEXT:    psrad $31, %xmm2
3806; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
3807; SSE2-NEXT:    retq
3808;
3809; SSSE3-LABEL: load_sext_4i32_to_4i64:
3810; SSSE3:       # BB#0: # %entry
3811; SSSE3-NEXT:    movdqa (%rdi), %xmm0
3812; SSSE3-NEXT:    movdqa %xmm0, %xmm2
3813; SSSE3-NEXT:    psrad $31, %xmm2
3814; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
3815; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
3816; SSSE3-NEXT:    movdqa %xmm1, %xmm2
3817; SSSE3-NEXT:    psrad $31, %xmm2
3818; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
3819; SSSE3-NEXT:    retq
3820;
3821; SSE41-LABEL: load_sext_4i32_to_4i64:
3822; SSE41:       # BB#0: # %entry
3823; SSE41-NEXT:    pmovsxdq (%rdi), %xmm0
3824; SSE41-NEXT:    pmovsxdq 8(%rdi), %xmm1
3825; SSE41-NEXT:    retq
3826;
3827; AVX1-LABEL: load_sext_4i32_to_4i64:
3828; AVX1:       # BB#0: # %entry
3829; AVX1-NEXT:    vpmovsxdq (%rdi), %xmm0
3830; AVX1-NEXT:    vpmovsxdq 8(%rdi), %xmm1
3831; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
3832; AVX1-NEXT:    retq
3833;
3834; AVX2-LABEL: load_sext_4i32_to_4i64:
3835; AVX2:       # BB#0: # %entry
3836; AVX2-NEXT:    vpmovsxdq (%rdi), %ymm0
3837; AVX2-NEXT:    retq
3838;
3839; X32-SSE41-LABEL: load_sext_4i32_to_4i64:
3840; X32-SSE41:       # BB#0: # %entry
3841; X32-SSE41-NEXT:    movl {{[0-9]+}}(%esp), %eax
3842; X32-SSE41-NEXT:    pmovsxdq (%eax), %xmm0
3843; X32-SSE41-NEXT:    pmovsxdq 8(%eax), %xmm1
3844; X32-SSE41-NEXT:    retl
3845entry:
3846 %X = load <4 x i32>, <4 x i32>* %ptr
3847 %Y = sext <4 x i32> %X to <4 x i64>
3848 ret <4 x i64> %Y
3849}
3850
3851define i32 @sext_2i8_to_i32(<16 x i8> %A) nounwind uwtable readnone ssp {
3852; SSE2-LABEL: sext_2i8_to_i32:
3853; SSE2:       # BB#0: # %entry
3854; SSE2-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
3855; SSE2-NEXT:    psraw $8, %xmm0
3856; SSE2-NEXT:    movd %xmm0, %eax
3857; SSE2-NEXT:    retq
3858;
3859; SSSE3-LABEL: sext_2i8_to_i32:
3860; SSSE3:       # BB#0: # %entry
3861; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
3862; SSSE3-NEXT:    psraw $8, %xmm0
3863; SSSE3-NEXT:    movd %xmm0, %eax
3864; SSSE3-NEXT:    retq
3865;
3866; SSE41-LABEL: sext_2i8_to_i32:
3867; SSE41:       # BB#0: # %entry
3868; SSE41-NEXT:    pmovsxbw %xmm0, %xmm0
3869; SSE41-NEXT:    movd %xmm0, %eax
3870; SSE41-NEXT:    retq
3871;
3872; AVX-LABEL: sext_2i8_to_i32:
3873; AVX:       # BB#0: # %entry
3874; AVX-NEXT:    vpmovsxbw %xmm0, %xmm0
3875; AVX-NEXT:    vmovd %xmm0, %eax
3876; AVX-NEXT:    retq
3877;
3878; X32-SSE41-LABEL: sext_2i8_to_i32:
3879; X32-SSE41:       # BB#0: # %entry
3880; X32-SSE41-NEXT:    pushl %eax
3881; X32-SSE41-NEXT:  .Ltmp0:
3882; X32-SSE41-NEXT:    .cfi_def_cfa_offset 8
3883; X32-SSE41-NEXT:    pmovsxbw %xmm0, %xmm0
3884; X32-SSE41-NEXT:    movd %xmm0, %eax
3885; X32-SSE41-NEXT:    popl %ecx
3886; X32-SSE41-NEXT:    retl
3887entry:
3888  %Shuf = shufflevector <16 x i8> %A, <16 x i8> undef, <2 x i32> <i32 0, i32 1>
3889  %Ex = sext <2 x i8> %Shuf to <2 x i16>
3890  %Bc = bitcast <2 x i16> %Ex to i32
3891  ret i32 %Bc
3892}
3893
3894define <4 x i64> @sext_4i1_to_4i64(<4 x i1> %mask) {
3895; SSE2-LABEL: sext_4i1_to_4i64:
3896; SSE2:       # BB#0:
3897; SSE2-NEXT:    pslld $31, %xmm0
3898; SSE2-NEXT:    psrad $31, %xmm0
3899; SSE2-NEXT:    movdqa %xmm0, %xmm2
3900; SSE2-NEXT:    psrad $31, %xmm2
3901; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
3902; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
3903; SSE2-NEXT:    movdqa %xmm1, %xmm2
3904; SSE2-NEXT:    psrad $31, %xmm2
3905; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
3906; SSE2-NEXT:    retq
3907;
3908; SSSE3-LABEL: sext_4i1_to_4i64:
3909; SSSE3:       # BB#0:
3910; SSSE3-NEXT:    pslld $31, %xmm0
3911; SSSE3-NEXT:    psrad $31, %xmm0
3912; SSSE3-NEXT:    movdqa %xmm0, %xmm2
3913; SSSE3-NEXT:    psrad $31, %xmm2
3914; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
3915; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
3916; SSSE3-NEXT:    movdqa %xmm1, %xmm2
3917; SSSE3-NEXT:    psrad $31, %xmm2
3918; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
3919; SSSE3-NEXT:    retq
3920;
3921; SSE41-LABEL: sext_4i1_to_4i64:
3922; SSE41:       # BB#0:
3923; SSE41-NEXT:    pslld $31, %xmm0
3924; SSE41-NEXT:    psrad $31, %xmm0
3925; SSE41-NEXT:    pmovsxdq %xmm0, %xmm2
3926; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
3927; SSE41-NEXT:    pmovsxdq %xmm0, %xmm1
3928; SSE41-NEXT:    movdqa %xmm2, %xmm0
3929; SSE41-NEXT:    retq
3930;
3931; AVX1-LABEL: sext_4i1_to_4i64:
3932; AVX1:       # BB#0:
3933; AVX1-NEXT:    vpslld $31, %xmm0, %xmm0
3934; AVX1-NEXT:    vpsrad $31, %xmm0, %xmm0
3935; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm1
3936; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
3937; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm0
3938; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
3939; AVX1-NEXT:    retq
3940;
3941; AVX2-LABEL: sext_4i1_to_4i64:
3942; AVX2:       # BB#0:
3943; AVX2-NEXT:    vpslld $31, %xmm0, %xmm0
3944; AVX2-NEXT:    vpsrad $31, %xmm0, %xmm0
3945; AVX2-NEXT:    vpmovsxdq %xmm0, %ymm0
3946; AVX2-NEXT:    retq
3947;
3948; X32-SSE41-LABEL: sext_4i1_to_4i64:
3949; X32-SSE41:       # BB#0:
3950; X32-SSE41-NEXT:    pslld $31, %xmm0
3951; X32-SSE41-NEXT:    psrad $31, %xmm0
3952; X32-SSE41-NEXT:    pmovsxdq %xmm0, %xmm2
3953; X32-SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
3954; X32-SSE41-NEXT:    pmovsxdq %xmm0, %xmm1
3955; X32-SSE41-NEXT:    movdqa %xmm2, %xmm0
3956; X32-SSE41-NEXT:    retl
3957  %extmask = sext <4 x i1> %mask to <4 x i64>
3958  ret <4 x i64> %extmask
3959}
3960
3961define <4 x i64> @sext_4i8_to_4i64(<4 x i8> %mask) {
3962; SSE2-LABEL: sext_4i8_to_4i64:
3963; SSE2:       # BB#0:
3964; SSE2-NEXT:    pslld $24, %xmm0
3965; SSE2-NEXT:    psrad $24, %xmm0
3966; SSE2-NEXT:    movdqa %xmm0, %xmm2
3967; SSE2-NEXT:    psrad $31, %xmm2
3968; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
3969; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
3970; SSE2-NEXT:    movdqa %xmm1, %xmm2
3971; SSE2-NEXT:    psrad $31, %xmm2
3972; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
3973; SSE2-NEXT:    retq
3974;
3975; SSSE3-LABEL: sext_4i8_to_4i64:
3976; SSSE3:       # BB#0:
3977; SSSE3-NEXT:    pslld $24, %xmm0
3978; SSSE3-NEXT:    psrad $24, %xmm0
3979; SSSE3-NEXT:    movdqa %xmm0, %xmm2
3980; SSSE3-NEXT:    psrad $31, %xmm2
3981; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1]
3982; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
3983; SSSE3-NEXT:    movdqa %xmm1, %xmm2
3984; SSSE3-NEXT:    psrad $31, %xmm2
3985; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1]
3986; SSSE3-NEXT:    retq
3987;
3988; SSE41-LABEL: sext_4i8_to_4i64:
3989; SSE41:       # BB#0:
3990; SSE41-NEXT:    pslld $24, %xmm0
3991; SSE41-NEXT:    psrad $24, %xmm0
3992; SSE41-NEXT:    pmovsxdq %xmm0, %xmm2
3993; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
3994; SSE41-NEXT:    pmovsxdq %xmm0, %xmm1
3995; SSE41-NEXT:    movdqa %xmm2, %xmm0
3996; SSE41-NEXT:    retq
3997;
3998; AVX1-LABEL: sext_4i8_to_4i64:
3999; AVX1:       # BB#0:
4000; AVX1-NEXT:    vpslld $24, %xmm0, %xmm0
4001; AVX1-NEXT:    vpsrad $24, %xmm0, %xmm0
4002; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm1
4003; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
4004; AVX1-NEXT:    vpmovsxdq %xmm0, %xmm0
4005; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm1, %ymm0
4006; AVX1-NEXT:    retq
4007;
4008; AVX2-LABEL: sext_4i8_to_4i64:
4009; AVX2:       # BB#0:
4010; AVX2-NEXT:    vpslld $24, %xmm0, %xmm0
4011; AVX2-NEXT:    vpsrad $24, %xmm0, %xmm0
4012; AVX2-NEXT:    vpmovsxdq %xmm0, %ymm0
4013; AVX2-NEXT:    retq
4014;
4015; X32-SSE41-LABEL: sext_4i8_to_4i64:
4016; X32-SSE41:       # BB#0:
4017; X32-SSE41-NEXT:    pslld $24, %xmm0
4018; X32-SSE41-NEXT:    psrad $24, %xmm0
4019; X32-SSE41-NEXT:    pmovsxdq %xmm0, %xmm2
4020; X32-SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
4021; X32-SSE41-NEXT:    pmovsxdq %xmm0, %xmm1
4022; X32-SSE41-NEXT:    movdqa %xmm2, %xmm0
4023; X32-SSE41-NEXT:    retl
4024  %extmask = sext <4 x i8> %mask to <4 x i64>
4025  ret <4 x i64> %extmask
4026}
4027