1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=SSE
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512
8
9;
10; vXi64
11;
12
13define i1 @test_v2i64(<2 x i64> %a0) {
14; SSE-LABEL: test_v2i64:
15; SSE:       # %bb.0:
16; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
17; SSE-NEXT:    pand %xmm0, %xmm1
18; SSE-NEXT:    movq %xmm1, %rax
19; SSE-NEXT:    testq %rax, %rax
20; SSE-NEXT:    sete %al
21; SSE-NEXT:    retq
22;
23; AVX-LABEL: test_v2i64:
24; AVX:       # %bb.0:
25; AVX-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
26; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
27; AVX-NEXT:    vmovq %xmm0, %rax
28; AVX-NEXT:    testq %rax, %rax
29; AVX-NEXT:    sete %al
30; AVX-NEXT:    retq
31  %1 = call i64 @llvm.vector.reduce.and.v2i64(<2 x i64> %a0)
32  %2 = icmp eq i64 %1, 0
33  ret i1 %2
34}
35
36define i1 @test_v4i64(<4 x i64> %a0) {
37; SSE-LABEL: test_v4i64:
38; SSE:       # %bb.0:
39; SSE-NEXT:    pand %xmm1, %xmm0
40; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
41; SSE-NEXT:    pand %xmm0, %xmm1
42; SSE-NEXT:    movq %xmm1, %rax
43; SSE-NEXT:    testq %rax, %rax
44; SSE-NEXT:    setne %al
45; SSE-NEXT:    retq
46;
47; AVX1-LABEL: test_v4i64:
48; AVX1:       # %bb.0:
49; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
50; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
51; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
52; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
53; AVX1-NEXT:    vmovq %xmm0, %rax
54; AVX1-NEXT:    testq %rax, %rax
55; AVX1-NEXT:    setne %al
56; AVX1-NEXT:    vzeroupper
57; AVX1-NEXT:    retq
58;
59; AVX2-LABEL: test_v4i64:
60; AVX2:       # %bb.0:
61; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
62; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
63; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
64; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
65; AVX2-NEXT:    vmovq %xmm0, %rax
66; AVX2-NEXT:    testq %rax, %rax
67; AVX2-NEXT:    setne %al
68; AVX2-NEXT:    vzeroupper
69; AVX2-NEXT:    retq
70;
71; AVX512-LABEL: test_v4i64:
72; AVX512:       # %bb.0:
73; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
74; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
75; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
76; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
77; AVX512-NEXT:    vmovq %xmm0, %rax
78; AVX512-NEXT:    testq %rax, %rax
79; AVX512-NEXT:    setne %al
80; AVX512-NEXT:    vzeroupper
81; AVX512-NEXT:    retq
82  %1 = call i64 @llvm.vector.reduce.and.v4i64(<4 x i64> %a0)
83  %2 = icmp ne i64 %1, 0
84  ret i1 %2
85}
86
87define i1 @test_v8i64(<8 x i64> %a0) {
88; SSE-LABEL: test_v8i64:
89; SSE:       # %bb.0:
90; SSE-NEXT:    pand %xmm3, %xmm1
91; SSE-NEXT:    pand %xmm2, %xmm1
92; SSE-NEXT:    pand %xmm0, %xmm1
93; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
94; SSE-NEXT:    pand %xmm1, %xmm0
95; SSE-NEXT:    movq %xmm0, %rax
96; SSE-NEXT:    testq %rax, %rax
97; SSE-NEXT:    sete %al
98; SSE-NEXT:    retq
99;
100; AVX1-LABEL: test_v8i64:
101; AVX1:       # %bb.0:
102; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
103; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
104; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
105; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]
106; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
107; AVX1-NEXT:    vmovq %xmm0, %rax
108; AVX1-NEXT:    testq %rax, %rax
109; AVX1-NEXT:    sete %al
110; AVX1-NEXT:    vzeroupper
111; AVX1-NEXT:    retq
112;
113; AVX2-LABEL: test_v8i64:
114; AVX2:       # %bb.0:
115; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
116; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
117; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
118; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
119; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
120; AVX2-NEXT:    vmovq %xmm0, %rax
121; AVX2-NEXT:    testq %rax, %rax
122; AVX2-NEXT:    sete %al
123; AVX2-NEXT:    vzeroupper
124; AVX2-NEXT:    retq
125;
126; AVX512-LABEL: test_v8i64:
127; AVX512:       # %bb.0:
128; AVX512-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
129; AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
130; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
131; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
132; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
133; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
134; AVX512-NEXT:    vmovq %xmm0, %rax
135; AVX512-NEXT:    testq %rax, %rax
136; AVX512-NEXT:    sete %al
137; AVX512-NEXT:    vzeroupper
138; AVX512-NEXT:    retq
139  %1 = call i64 @llvm.vector.reduce.and.v8i64(<8 x i64> %a0)
140  %2 = icmp eq i64 %1, 0
141  ret i1 %2
142}
143
144define i1 @test_v16i64(<16 x i64> %a0) {
145; SSE-LABEL: test_v16i64:
146; SSE:       # %bb.0:
147; SSE-NEXT:    pand %xmm6, %xmm2
148; SSE-NEXT:    pand %xmm7, %xmm3
149; SSE-NEXT:    pand %xmm5, %xmm3
150; SSE-NEXT:    pand %xmm1, %xmm3
151; SSE-NEXT:    pand %xmm4, %xmm2
152; SSE-NEXT:    pand %xmm3, %xmm2
153; SSE-NEXT:    pand %xmm0, %xmm2
154; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
155; SSE-NEXT:    pand %xmm2, %xmm0
156; SSE-NEXT:    movq %xmm0, %rax
157; SSE-NEXT:    testq %rax, %rax
158; SSE-NEXT:    setne %al
159; SSE-NEXT:    retq
160;
161; AVX1-LABEL: test_v16i64:
162; AVX1:       # %bb.0:
163; AVX1-NEXT:    vandps %ymm3, %ymm1, %ymm1
164; AVX1-NEXT:    vandps %ymm1, %ymm2, %ymm1
165; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
166; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
167; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
168; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]
169; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
170; AVX1-NEXT:    vmovq %xmm0, %rax
171; AVX1-NEXT:    testq %rax, %rax
172; AVX1-NEXT:    setne %al
173; AVX1-NEXT:    vzeroupper
174; AVX1-NEXT:    retq
175;
176; AVX2-LABEL: test_v16i64:
177; AVX2:       # %bb.0:
178; AVX2-NEXT:    vpand %ymm3, %ymm1, %ymm1
179; AVX2-NEXT:    vpand %ymm1, %ymm2, %ymm1
180; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
181; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
182; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
183; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
184; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
185; AVX2-NEXT:    vmovq %xmm0, %rax
186; AVX2-NEXT:    testq %rax, %rax
187; AVX2-NEXT:    setne %al
188; AVX2-NEXT:    vzeroupper
189; AVX2-NEXT:    retq
190;
191; AVX512-LABEL: test_v16i64:
192; AVX512:       # %bb.0:
193; AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
194; AVX512-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
195; AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
196; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
197; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
198; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
199; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
200; AVX512-NEXT:    vmovq %xmm0, %rax
201; AVX512-NEXT:    testq %rax, %rax
202; AVX512-NEXT:    setne %al
203; AVX512-NEXT:    vzeroupper
204; AVX512-NEXT:    retq
205  %1 = call i64 @llvm.vector.reduce.and.v16i64(<16 x i64> %a0)
206  %2 = icmp ne i64 %1, 0
207  ret i1 %2
208}
209
210;
211; vXi32
212;
213
214define i1 @test_v2i32(<2 x i32> %a0) {
215; SSE-LABEL: test_v2i32:
216; SSE:       # %bb.0:
217; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
218; SSE-NEXT:    pand %xmm0, %xmm1
219; SSE-NEXT:    movd %xmm1, %eax
220; SSE-NEXT:    testl %eax, %eax
221; SSE-NEXT:    sete %al
222; SSE-NEXT:    retq
223;
224; AVX-LABEL: test_v2i32:
225; AVX:       # %bb.0:
226; AVX-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
227; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
228; AVX-NEXT:    vmovd %xmm0, %eax
229; AVX-NEXT:    testl %eax, %eax
230; AVX-NEXT:    sete %al
231; AVX-NEXT:    retq
232  %1 = call i32 @llvm.vector.reduce.and.v2i32(<2 x i32> %a0)
233  %2 = icmp eq i32 %1, 0
234  ret i1 %2
235}
236
237define i1 @test_v4i32(<4 x i32> %a0) {
238; SSE-LABEL: test_v4i32:
239; SSE:       # %bb.0:
240; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
241; SSE-NEXT:    pand %xmm0, %xmm1
242; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
243; SSE-NEXT:    pand %xmm1, %xmm0
244; SSE-NEXT:    movd %xmm0, %eax
245; SSE-NEXT:    testl %eax, %eax
246; SSE-NEXT:    setne %al
247; SSE-NEXT:    retq
248;
249; AVX-LABEL: test_v4i32:
250; AVX:       # %bb.0:
251; AVX-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
252; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
253; AVX-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
254; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
255; AVX-NEXT:    vmovd %xmm0, %eax
256; AVX-NEXT:    testl %eax, %eax
257; AVX-NEXT:    setne %al
258; AVX-NEXT:    retq
259  %1 = call i32 @llvm.vector.reduce.and.v4i32(<4 x i32> %a0)
260  %2 = icmp ne i32 %1, 0
261  ret i1 %2
262}
263
264define i1 @test_v8i32(<8 x i32> %a0) {
265; SSE-LABEL: test_v8i32:
266; SSE:       # %bb.0:
267; SSE-NEXT:    pand %xmm1, %xmm0
268; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
269; SSE-NEXT:    pand %xmm0, %xmm1
270; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
271; SSE-NEXT:    pand %xmm1, %xmm0
272; SSE-NEXT:    movd %xmm0, %eax
273; SSE-NEXT:    testl %eax, %eax
274; SSE-NEXT:    sete %al
275; SSE-NEXT:    retq
276;
277; AVX1-LABEL: test_v8i32:
278; AVX1:       # %bb.0:
279; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
280; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
281; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
282; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
283; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
284; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
285; AVX1-NEXT:    vmovd %xmm0, %eax
286; AVX1-NEXT:    testl %eax, %eax
287; AVX1-NEXT:    sete %al
288; AVX1-NEXT:    vzeroupper
289; AVX1-NEXT:    retq
290;
291; AVX2-LABEL: test_v8i32:
292; AVX2:       # %bb.0:
293; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
294; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
295; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
296; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
297; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
298; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
299; AVX2-NEXT:    vmovd %xmm0, %eax
300; AVX2-NEXT:    testl %eax, %eax
301; AVX2-NEXT:    sete %al
302; AVX2-NEXT:    vzeroupper
303; AVX2-NEXT:    retq
304;
305; AVX512-LABEL: test_v8i32:
306; AVX512:       # %bb.0:
307; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
308; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
309; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
310; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
311; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
312; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
313; AVX512-NEXT:    vmovd %xmm0, %eax
314; AVX512-NEXT:    testl %eax, %eax
315; AVX512-NEXT:    sete %al
316; AVX512-NEXT:    vzeroupper
317; AVX512-NEXT:    retq
318  %1 = call i32 @llvm.vector.reduce.and.v8i32(<8 x i32> %a0)
319  %2 = icmp eq i32 %1, 0
320  ret i1 %2
321}
322
323define i1 @test_v16i32(<16 x i32> %a0) {
324; SSE-LABEL: test_v16i32:
325; SSE:       # %bb.0:
326; SSE-NEXT:    pand %xmm3, %xmm1
327; SSE-NEXT:    pand %xmm2, %xmm1
328; SSE-NEXT:    pand %xmm0, %xmm1
329; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
330; SSE-NEXT:    pand %xmm1, %xmm0
331; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
332; SSE-NEXT:    pand %xmm0, %xmm1
333; SSE-NEXT:    movd %xmm1, %eax
334; SSE-NEXT:    testl %eax, %eax
335; SSE-NEXT:    setne %al
336; SSE-NEXT:    retq
337;
338; AVX1-LABEL: test_v16i32:
339; AVX1:       # %bb.0:
340; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
341; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
342; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
343; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]
344; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
345; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[1,1,1,1]
346; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
347; AVX1-NEXT:    vmovd %xmm0, %eax
348; AVX1-NEXT:    testl %eax, %eax
349; AVX1-NEXT:    setne %al
350; AVX1-NEXT:    vzeroupper
351; AVX1-NEXT:    retq
352;
353; AVX2-LABEL: test_v16i32:
354; AVX2:       # %bb.0:
355; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
356; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
357; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
358; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
359; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
360; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
361; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
362; AVX2-NEXT:    vmovd %xmm0, %eax
363; AVX2-NEXT:    testl %eax, %eax
364; AVX2-NEXT:    setne %al
365; AVX2-NEXT:    vzeroupper
366; AVX2-NEXT:    retq
367;
368; AVX512-LABEL: test_v16i32:
369; AVX512:       # %bb.0:
370; AVX512-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
371; AVX512-NEXT:    vpandd %zmm1, %zmm0, %zmm0
372; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
373; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
374; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
375; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
376; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
377; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
378; AVX512-NEXT:    vmovd %xmm0, %eax
379; AVX512-NEXT:    testl %eax, %eax
380; AVX512-NEXT:    setne %al
381; AVX512-NEXT:    vzeroupper
382; AVX512-NEXT:    retq
383  %1 = call i32 @llvm.vector.reduce.and.v16i32(<16 x i32> %a0)
384  %2 = icmp ne i32 %1, 0
385  ret i1 %2
386}
387
388define i1 @test_v32i32(<32 x i32> %a0) {
389; SSE-LABEL: test_v32i32:
390; SSE:       # %bb.0:
391; SSE-NEXT:    pand %xmm6, %xmm2
392; SSE-NEXT:    pand %xmm7, %xmm3
393; SSE-NEXT:    pand %xmm5, %xmm3
394; SSE-NEXT:    pand %xmm1, %xmm3
395; SSE-NEXT:    pand %xmm4, %xmm2
396; SSE-NEXT:    pand %xmm3, %xmm2
397; SSE-NEXT:    pand %xmm0, %xmm2
398; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
399; SSE-NEXT:    pand %xmm2, %xmm0
400; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
401; SSE-NEXT:    pand %xmm0, %xmm1
402; SSE-NEXT:    movd %xmm1, %eax
403; SSE-NEXT:    testl %eax, %eax
404; SSE-NEXT:    sete %al
405; SSE-NEXT:    retq
406;
407; AVX1-LABEL: test_v32i32:
408; AVX1:       # %bb.0:
409; AVX1-NEXT:    vandps %ymm3, %ymm1, %ymm1
410; AVX1-NEXT:    vandps %ymm1, %ymm2, %ymm1
411; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
412; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
413; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
414; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]
415; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
416; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[1,1,1,1]
417; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
418; AVX1-NEXT:    vmovd %xmm0, %eax
419; AVX1-NEXT:    testl %eax, %eax
420; AVX1-NEXT:    sete %al
421; AVX1-NEXT:    vzeroupper
422; AVX1-NEXT:    retq
423;
424; AVX2-LABEL: test_v32i32:
425; AVX2:       # %bb.0:
426; AVX2-NEXT:    vpand %ymm3, %ymm1, %ymm1
427; AVX2-NEXT:    vpand %ymm1, %ymm2, %ymm1
428; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
429; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
430; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
431; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
432; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
433; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
434; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
435; AVX2-NEXT:    vmovd %xmm0, %eax
436; AVX2-NEXT:    testl %eax, %eax
437; AVX2-NEXT:    sete %al
438; AVX2-NEXT:    vzeroupper
439; AVX2-NEXT:    retq
440;
441; AVX512-LABEL: test_v32i32:
442; AVX512:       # %bb.0:
443; AVX512-NEXT:    vpandd %zmm1, %zmm0, %zmm0
444; AVX512-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
445; AVX512-NEXT:    vpandd %zmm1, %zmm0, %zmm0
446; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
447; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
448; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
449; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
450; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
451; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
452; AVX512-NEXT:    vmovd %xmm0, %eax
453; AVX512-NEXT:    testl %eax, %eax
454; AVX512-NEXT:    sete %al
455; AVX512-NEXT:    vzeroupper
456; AVX512-NEXT:    retq
457  %1 = call i32 @llvm.vector.reduce.and.v32i32(<32 x i32> %a0)
458  %2 = icmp eq i32 %1, 0
459  ret i1 %2
460}
461
462;
463; vXi16
464;
465
466define i1 @test_v2i16(<2 x i16> %a0) {
467; SSE-LABEL: test_v2i16:
468; SSE:       # %bb.0:
469; SSE-NEXT:    movdqa %xmm0, %xmm1
470; SSE-NEXT:    psrld $16, %xmm1
471; SSE-NEXT:    pand %xmm0, %xmm1
472; SSE-NEXT:    movd %xmm1, %eax
473; SSE-NEXT:    testl %eax, %eax
474; SSE-NEXT:    sete %al
475; SSE-NEXT:    retq
476;
477; AVX-LABEL: test_v2i16:
478; AVX:       # %bb.0:
479; AVX-NEXT:    vpsrld $16, %xmm0, %xmm1
480; AVX-NEXT:    vpand %xmm0, %xmm1, %xmm0
481; AVX-NEXT:    vmovd %xmm0, %eax
482; AVX-NEXT:    testl %eax, %eax
483; AVX-NEXT:    sete %al
484; AVX-NEXT:    retq
485  %1 = call i16 @llvm.vector.reduce.and.v2i16(<2 x i16> %a0)
486  %2 = icmp eq i16 %1, 0
487  ret i1 %2
488}
489
490define i1 @test_v4i16(<4 x i16> %a0) {
491; SSE-LABEL: test_v4i16:
492; SSE:       # %bb.0:
493; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
494; SSE-NEXT:    pand %xmm0, %xmm1
495; SSE-NEXT:    movdqa %xmm1, %xmm0
496; SSE-NEXT:    psrld $16, %xmm0
497; SSE-NEXT:    pand %xmm1, %xmm0
498; SSE-NEXT:    movd %xmm0, %eax
499; SSE-NEXT:    testl %eax, %eax
500; SSE-NEXT:    setne %al
501; SSE-NEXT:    retq
502;
503; AVX-LABEL: test_v4i16:
504; AVX:       # %bb.0:
505; AVX-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
506; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
507; AVX-NEXT:    vpsrld $16, %xmm0, %xmm1
508; AVX-NEXT:    vpand %xmm0, %xmm1, %xmm0
509; AVX-NEXT:    vmovd %xmm0, %eax
510; AVX-NEXT:    testl %eax, %eax
511; AVX-NEXT:    setne %al
512; AVX-NEXT:    retq
513  %1 = call i16 @llvm.vector.reduce.and.v4i16(<4 x i16> %a0)
514  %2 = icmp ne i16 %1, 0
515  ret i1 %2
516}
517
518define i1 @test_v8i16(<8 x i16> %a0) {
519; SSE-LABEL: test_v8i16:
520; SSE:       # %bb.0:
521; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
522; SSE-NEXT:    pand %xmm0, %xmm1
523; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
524; SSE-NEXT:    pand %xmm1, %xmm0
525; SSE-NEXT:    movdqa %xmm0, %xmm1
526; SSE-NEXT:    psrld $16, %xmm1
527; SSE-NEXT:    pand %xmm0, %xmm1
528; SSE-NEXT:    movd %xmm1, %eax
529; SSE-NEXT:    testl %eax, %eax
530; SSE-NEXT:    sete %al
531; SSE-NEXT:    retq
532;
533; AVX-LABEL: test_v8i16:
534; AVX:       # %bb.0:
535; AVX-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
536; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
537; AVX-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
538; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
539; AVX-NEXT:    vpsrld $16, %xmm0, %xmm1
540; AVX-NEXT:    vpand %xmm0, %xmm1, %xmm0
541; AVX-NEXT:    vmovd %xmm0, %eax
542; AVX-NEXT:    testl %eax, %eax
543; AVX-NEXT:    sete %al
544; AVX-NEXT:    retq
545  %1 = call i16 @llvm.vector.reduce.and.v8i16(<8 x i16> %a0)
546  %2 = icmp eq i16 %1, 0
547  ret i1 %2
548}
549
550define i1 @test_v16i16(<16 x i16> %a0) {
551; SSE-LABEL: test_v16i16:
552; SSE:       # %bb.0:
553; SSE-NEXT:    pand %xmm1, %xmm0
554; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
555; SSE-NEXT:    pand %xmm0, %xmm1
556; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
557; SSE-NEXT:    pand %xmm1, %xmm0
558; SSE-NEXT:    movdqa %xmm0, %xmm1
559; SSE-NEXT:    psrld $16, %xmm1
560; SSE-NEXT:    pand %xmm0, %xmm1
561; SSE-NEXT:    movd %xmm1, %eax
562; SSE-NEXT:    testl %eax, %eax
563; SSE-NEXT:    setne %al
564; SSE-NEXT:    retq
565;
566; AVX1-LABEL: test_v16i16:
567; AVX1:       # %bb.0:
568; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
569; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
570; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
571; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
572; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
573; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
574; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm1
575; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
576; AVX1-NEXT:    vmovd %xmm0, %eax
577; AVX1-NEXT:    testl %eax, %eax
578; AVX1-NEXT:    setne %al
579; AVX1-NEXT:    vzeroupper
580; AVX1-NEXT:    retq
581;
582; AVX2-LABEL: test_v16i16:
583; AVX2:       # %bb.0:
584; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
585; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
586; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
587; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
588; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
589; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
590; AVX2-NEXT:    vpsrld $16, %xmm0, %xmm1
591; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
592; AVX2-NEXT:    vmovd %xmm0, %eax
593; AVX2-NEXT:    testl %eax, %eax
594; AVX2-NEXT:    setne %al
595; AVX2-NEXT:    vzeroupper
596; AVX2-NEXT:    retq
597;
598; AVX512-LABEL: test_v16i16:
599; AVX512:       # %bb.0:
600; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
601; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
602; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
603; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
604; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
605; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
606; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm1
607; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
608; AVX512-NEXT:    vmovd %xmm0, %eax
609; AVX512-NEXT:    testl %eax, %eax
610; AVX512-NEXT:    setne %al
611; AVX512-NEXT:    vzeroupper
612; AVX512-NEXT:    retq
613  %1 = call i16 @llvm.vector.reduce.and.v16i16(<16 x i16> %a0)
614  %2 = icmp ne i16 %1, 0
615  ret i1 %2
616}
617
618define i1 @test_v32i16(<32 x i16> %a0) {
619; SSE-LABEL: test_v32i16:
620; SSE:       # %bb.0:
621; SSE-NEXT:    pand %xmm3, %xmm1
622; SSE-NEXT:    pand %xmm2, %xmm1
623; SSE-NEXT:    pand %xmm0, %xmm1
624; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
625; SSE-NEXT:    pand %xmm1, %xmm0
626; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
627; SSE-NEXT:    pand %xmm0, %xmm1
628; SSE-NEXT:    movdqa %xmm1, %xmm0
629; SSE-NEXT:    psrld $16, %xmm0
630; SSE-NEXT:    pand %xmm1, %xmm0
631; SSE-NEXT:    movd %xmm0, %eax
632; SSE-NEXT:    testl %eax, %eax
633; SSE-NEXT:    sete %al
634; SSE-NEXT:    retq
635;
636; AVX1-LABEL: test_v32i16:
637; AVX1:       # %bb.0:
638; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
639; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
640; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
641; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]
642; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
643; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[1,1,1,1]
644; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
645; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm1
646; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
647; AVX1-NEXT:    vmovd %xmm0, %eax
648; AVX1-NEXT:    testl %eax, %eax
649; AVX1-NEXT:    sete %al
650; AVX1-NEXT:    vzeroupper
651; AVX1-NEXT:    retq
652;
653; AVX2-LABEL: test_v32i16:
654; AVX2:       # %bb.0:
655; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
656; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
657; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
658; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
659; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
660; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
661; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
662; AVX2-NEXT:    vpsrld $16, %xmm0, %xmm1
663; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
664; AVX2-NEXT:    vmovd %xmm0, %eax
665; AVX2-NEXT:    testl %eax, %eax
666; AVX2-NEXT:    sete %al
667; AVX2-NEXT:    vzeroupper
668; AVX2-NEXT:    retq
669;
670; AVX512-LABEL: test_v32i16:
671; AVX512:       # %bb.0:
672; AVX512-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
673; AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
674; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
675; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
676; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
677; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
678; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
679; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
680; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm1
681; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
682; AVX512-NEXT:    vmovd %xmm0, %eax
683; AVX512-NEXT:    testl %eax, %eax
684; AVX512-NEXT:    sete %al
685; AVX512-NEXT:    vzeroupper
686; AVX512-NEXT:    retq
687  %1 = call i16 @llvm.vector.reduce.and.v32i16(<32 x i16> %a0)
688  %2 = icmp eq i16 %1, 0
689  ret i1 %2
690}
691
692define i1 @test_v64i16(<64 x i16> %a0) {
693; SSE-LABEL: test_v64i16:
694; SSE:       # %bb.0:
695; SSE-NEXT:    pand %xmm6, %xmm2
696; SSE-NEXT:    pand %xmm7, %xmm3
697; SSE-NEXT:    pand %xmm5, %xmm3
698; SSE-NEXT:    pand %xmm1, %xmm3
699; SSE-NEXT:    pand %xmm4, %xmm2
700; SSE-NEXT:    pand %xmm3, %xmm2
701; SSE-NEXT:    pand %xmm0, %xmm2
702; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
703; SSE-NEXT:    pand %xmm2, %xmm0
704; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
705; SSE-NEXT:    pand %xmm0, %xmm1
706; SSE-NEXT:    movdqa %xmm1, %xmm0
707; SSE-NEXT:    psrld $16, %xmm0
708; SSE-NEXT:    pand %xmm1, %xmm0
709; SSE-NEXT:    movd %xmm0, %eax
710; SSE-NEXT:    testl %eax, %eax
711; SSE-NEXT:    setne %al
712; SSE-NEXT:    retq
713;
714; AVX1-LABEL: test_v64i16:
715; AVX1:       # %bb.0:
716; AVX1-NEXT:    vandps %ymm3, %ymm1, %ymm1
717; AVX1-NEXT:    vandps %ymm1, %ymm2, %ymm1
718; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
719; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
720; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
721; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]
722; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
723; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[1,1,1,1]
724; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
725; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm1
726; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
727; AVX1-NEXT:    vmovd %xmm0, %eax
728; AVX1-NEXT:    testl %eax, %eax
729; AVX1-NEXT:    setne %al
730; AVX1-NEXT:    vzeroupper
731; AVX1-NEXT:    retq
732;
733; AVX2-LABEL: test_v64i16:
734; AVX2:       # %bb.0:
735; AVX2-NEXT:    vpand %ymm3, %ymm1, %ymm1
736; AVX2-NEXT:    vpand %ymm1, %ymm2, %ymm1
737; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
738; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
739; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
740; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
741; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
742; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
743; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
744; AVX2-NEXT:    vpsrld $16, %xmm0, %xmm1
745; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
746; AVX2-NEXT:    vmovd %xmm0, %eax
747; AVX2-NEXT:    testl %eax, %eax
748; AVX2-NEXT:    setne %al
749; AVX2-NEXT:    vzeroupper
750; AVX2-NEXT:    retq
751;
752; AVX512-LABEL: test_v64i16:
753; AVX512:       # %bb.0:
754; AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
755; AVX512-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
756; AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
757; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
758; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
759; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
760; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
761; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
762; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
763; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm1
764; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
765; AVX512-NEXT:    vmovd %xmm0, %eax
766; AVX512-NEXT:    testl %eax, %eax
767; AVX512-NEXT:    setne %al
768; AVX512-NEXT:    vzeroupper
769; AVX512-NEXT:    retq
770  %1 = call i16 @llvm.vector.reduce.and.v64i16(<64 x i16> %a0)
771  %2 = icmp ne i16 %1, 0
772  ret i1 %2
773}
774
775;
776; vXi8
777;
778
779define i1 @test_v2i8(<2 x i8> %a0) {
780; SSE-LABEL: test_v2i8:
781; SSE:       # %bb.0:
782; SSE-NEXT:    movdqa %xmm0, %xmm1
783; SSE-NEXT:    psrlw $8, %xmm1
784; SSE-NEXT:    pand %xmm0, %xmm1
785; SSE-NEXT:    movd %xmm1, %eax
786; SSE-NEXT:    testb %al, %al
787; SSE-NEXT:    sete %al
788; SSE-NEXT:    retq
789;
790; AVX-LABEL: test_v2i8:
791; AVX:       # %bb.0:
792; AVX-NEXT:    vpsrlw $8, %xmm0, %xmm1
793; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
794; AVX-NEXT:    vmovd %xmm0, %eax
795; AVX-NEXT:    testb %al, %al
796; AVX-NEXT:    sete %al
797; AVX-NEXT:    retq
798  %1 = call i8 @llvm.vector.reduce.and.v2i8(<2 x i8> %a0)
799  %2 = icmp eq i8 %1, 0
800  ret i1 %2
801}
802
803define i1 @test_v4i8(<4 x i8> %a0) {
804; SSE-LABEL: test_v4i8:
805; SSE:       # %bb.0:
806; SSE-NEXT:    movdqa %xmm0, %xmm1
807; SSE-NEXT:    psrld $16, %xmm1
808; SSE-NEXT:    pand %xmm0, %xmm1
809; SSE-NEXT:    movdqa %xmm1, %xmm0
810; SSE-NEXT:    psrlw $8, %xmm0
811; SSE-NEXT:    pand %xmm1, %xmm0
812; SSE-NEXT:    movd %xmm0, %eax
813; SSE-NEXT:    testl %eax, %eax
814; SSE-NEXT:    setne %al
815; SSE-NEXT:    retq
816;
817; AVX-LABEL: test_v4i8:
818; AVX:       # %bb.0:
819; AVX-NEXT:    vpsrld $16, %xmm0, %xmm1
820; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
821; AVX-NEXT:    vpsrlw $8, %xmm0, %xmm1
822; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
823; AVX-NEXT:    vmovd %xmm0, %eax
824; AVX-NEXT:    testl %eax, %eax
825; AVX-NEXT:    setne %al
826; AVX-NEXT:    retq
827  %1 = call i8 @llvm.vector.reduce.and.v4i8(<4 x i8> %a0)
828  %2 = icmp ne i8 %1, 0
829  ret i1 %2
830}
831
832define i1 @test_v8i8(<8 x i8> %a0) {
833; SSE-LABEL: test_v8i8:
834; SSE:       # %bb.0:
835; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
836; SSE-NEXT:    pand %xmm0, %xmm1
837; SSE-NEXT:    movdqa %xmm1, %xmm0
838; SSE-NEXT:    psrld $16, %xmm0
839; SSE-NEXT:    pand %xmm1, %xmm0
840; SSE-NEXT:    movdqa %xmm0, %xmm1
841; SSE-NEXT:    psrlw $8, %xmm1
842; SSE-NEXT:    pand %xmm0, %xmm1
843; SSE-NEXT:    movd %xmm1, %eax
844; SSE-NEXT:    testl %eax, %eax
845; SSE-NEXT:    sete %al
846; SSE-NEXT:    retq
847;
848; AVX-LABEL: test_v8i8:
849; AVX:       # %bb.0:
850; AVX-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
851; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
852; AVX-NEXT:    vpsrld $16, %xmm0, %xmm1
853; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
854; AVX-NEXT:    vpsrlw $8, %xmm0, %xmm1
855; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
856; AVX-NEXT:    vmovd %xmm0, %eax
857; AVX-NEXT:    testl %eax, %eax
858; AVX-NEXT:    sete %al
859; AVX-NEXT:    retq
860  %1 = call i8 @llvm.vector.reduce.and.v8i8(<8 x i8> %a0)
861  %2 = icmp eq i8 %1, 0
862  ret i1 %2
863}
864
865define i1 @test_v16i8(<16 x i8> %a0) {
866; SSE-LABEL: test_v16i8:
867; SSE:       # %bb.0:
868; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
869; SSE-NEXT:    pand %xmm0, %xmm1
870; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
871; SSE-NEXT:    pand %xmm1, %xmm0
872; SSE-NEXT:    movdqa %xmm0, %xmm1
873; SSE-NEXT:    psrld $16, %xmm1
874; SSE-NEXT:    pand %xmm0, %xmm1
875; SSE-NEXT:    movdqa %xmm1, %xmm0
876; SSE-NEXT:    psrlw $8, %xmm0
877; SSE-NEXT:    pand %xmm1, %xmm0
878; SSE-NEXT:    movd %xmm0, %eax
879; SSE-NEXT:    testl %eax, %eax
880; SSE-NEXT:    setne %al
881; SSE-NEXT:    retq
882;
883; AVX-LABEL: test_v16i8:
884; AVX:       # %bb.0:
885; AVX-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
886; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
887; AVX-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
888; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
889; AVX-NEXT:    vpsrld $16, %xmm0, %xmm1
890; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
891; AVX-NEXT:    vpsrlw $8, %xmm0, %xmm1
892; AVX-NEXT:    vpand %xmm1, %xmm0, %xmm0
893; AVX-NEXT:    vmovd %xmm0, %eax
894; AVX-NEXT:    testl %eax, %eax
895; AVX-NEXT:    setne %al
896; AVX-NEXT:    retq
897  %1 = call i8 @llvm.vector.reduce.and.v16i8(<16 x i8> %a0)
898  %2 = icmp ne i8 %1, 0
899  ret i1 %2
900}
901
902define i1 @test_v32i8(<32 x i8> %a0) {
903; SSE-LABEL: test_v32i8:
904; SSE:       # %bb.0:
905; SSE-NEXT:    pand %xmm1, %xmm0
906; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
907; SSE-NEXT:    pand %xmm0, %xmm1
908; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[1,1,1,1]
909; SSE-NEXT:    pand %xmm1, %xmm0
910; SSE-NEXT:    movdqa %xmm0, %xmm1
911; SSE-NEXT:    psrld $16, %xmm1
912; SSE-NEXT:    pand %xmm0, %xmm1
913; SSE-NEXT:    movdqa %xmm1, %xmm0
914; SSE-NEXT:    psrlw $8, %xmm0
915; SSE-NEXT:    pand %xmm1, %xmm0
916; SSE-NEXT:    movd %xmm0, %eax
917; SSE-NEXT:    testl %eax, %eax
918; SSE-NEXT:    sete %al
919; SSE-NEXT:    retq
920;
921; AVX1-LABEL: test_v32i8:
922; AVX1:       # %bb.0:
923; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
924; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
925; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
926; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
927; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
928; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
929; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm1
930; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
931; AVX1-NEXT:    vpsrlw $8, %xmm0, %xmm1
932; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
933; AVX1-NEXT:    vmovd %xmm0, %eax
934; AVX1-NEXT:    testl %eax, %eax
935; AVX1-NEXT:    sete %al
936; AVX1-NEXT:    vzeroupper
937; AVX1-NEXT:    retq
938;
939; AVX2-LABEL: test_v32i8:
940; AVX2:       # %bb.0:
941; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
942; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
943; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
944; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
945; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
946; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
947; AVX2-NEXT:    vpsrld $16, %xmm0, %xmm1
948; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
949; AVX2-NEXT:    vpsrlw $8, %xmm0, %xmm1
950; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
951; AVX2-NEXT:    vmovd %xmm0, %eax
952; AVX2-NEXT:    testl %eax, %eax
953; AVX2-NEXT:    sete %al
954; AVX2-NEXT:    vzeroupper
955; AVX2-NEXT:    retq
956;
957; AVX512-LABEL: test_v32i8:
958; AVX512:       # %bb.0:
959; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
960; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
961; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
962; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
963; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
964; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
965; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm1
966; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
967; AVX512-NEXT:    vpsrlw $8, %xmm0, %xmm1
968; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
969; AVX512-NEXT:    vmovd %xmm0, %eax
970; AVX512-NEXT:    testl %eax, %eax
971; AVX512-NEXT:    sete %al
972; AVX512-NEXT:    vzeroupper
973; AVX512-NEXT:    retq
974  %1 = call i8 @llvm.vector.reduce.and.v32i8(<32 x i8> %a0)
975  %2 = icmp eq i8 %1, 0
976  ret i1 %2
977}
978
979define i1 @test_v64i8(<64 x i8> %a0) {
980; SSE-LABEL: test_v64i8:
981; SSE:       # %bb.0:
982; SSE-NEXT:    pand %xmm3, %xmm1
983; SSE-NEXT:    pand %xmm2, %xmm1
984; SSE-NEXT:    pand %xmm0, %xmm1
985; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm1[2,3,2,3]
986; SSE-NEXT:    pand %xmm1, %xmm0
987; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
988; SSE-NEXT:    pand %xmm0, %xmm1
989; SSE-NEXT:    movdqa %xmm1, %xmm0
990; SSE-NEXT:    psrld $16, %xmm0
991; SSE-NEXT:    pand %xmm1, %xmm0
992; SSE-NEXT:    movdqa %xmm0, %xmm1
993; SSE-NEXT:    psrlw $8, %xmm1
994; SSE-NEXT:    pand %xmm0, %xmm1
995; SSE-NEXT:    movd %xmm1, %eax
996; SSE-NEXT:    testl %eax, %eax
997; SSE-NEXT:    setne %al
998; SSE-NEXT:    retq
999;
1000; AVX1-LABEL: test_v64i8:
1001; AVX1:       # %bb.0:
1002; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
1003; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
1004; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
1005; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]
1006; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
1007; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[1,1,1,1]
1008; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
1009; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm1
1010; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
1011; AVX1-NEXT:    vpsrlw $8, %xmm0, %xmm1
1012; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
1013; AVX1-NEXT:    vmovd %xmm0, %eax
1014; AVX1-NEXT:    testl %eax, %eax
1015; AVX1-NEXT:    setne %al
1016; AVX1-NEXT:    vzeroupper
1017; AVX1-NEXT:    retq
1018;
1019; AVX2-LABEL: test_v64i8:
1020; AVX2:       # %bb.0:
1021; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
1022; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
1023; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
1024; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
1025; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
1026; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
1027; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
1028; AVX2-NEXT:    vpsrld $16, %xmm0, %xmm1
1029; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
1030; AVX2-NEXT:    vpsrlw $8, %xmm0, %xmm1
1031; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
1032; AVX2-NEXT:    vmovd %xmm0, %eax
1033; AVX2-NEXT:    testl %eax, %eax
1034; AVX2-NEXT:    setne %al
1035; AVX2-NEXT:    vzeroupper
1036; AVX2-NEXT:    retq
1037;
1038; AVX512-LABEL: test_v64i8:
1039; AVX512:       # %bb.0:
1040; AVX512-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
1041; AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
1042; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
1043; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
1044; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
1045; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
1046; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
1047; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
1048; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm1
1049; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
1050; AVX512-NEXT:    vpsrlw $8, %xmm0, %xmm1
1051; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
1052; AVX512-NEXT:    vmovd %xmm0, %eax
1053; AVX512-NEXT:    testb %al, %al
1054; AVX512-NEXT:    setne %al
1055; AVX512-NEXT:    vzeroupper
1056; AVX512-NEXT:    retq
1057  %1 = call i8 @llvm.vector.reduce.and.v64i8(<64 x i8> %a0)
1058  %2 = icmp ne i8 %1, 0
1059  ret i1 %2
1060}
1061
1062define i1 @test_v128i8(<128 x i8> %a0) {
1063; SSE-LABEL: test_v128i8:
1064; SSE:       # %bb.0:
1065; SSE-NEXT:    pand %xmm6, %xmm2
1066; SSE-NEXT:    pand %xmm7, %xmm3
1067; SSE-NEXT:    pand %xmm5, %xmm3
1068; SSE-NEXT:    pand %xmm1, %xmm3
1069; SSE-NEXT:    pand %xmm4, %xmm2
1070; SSE-NEXT:    pand %xmm3, %xmm2
1071; SSE-NEXT:    pand %xmm0, %xmm2
1072; SSE-NEXT:    pshufd {{.*#+}} xmm0 = xmm2[2,3,2,3]
1073; SSE-NEXT:    pand %xmm2, %xmm0
1074; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
1075; SSE-NEXT:    pand %xmm0, %xmm1
1076; SSE-NEXT:    movdqa %xmm1, %xmm0
1077; SSE-NEXT:    psrld $16, %xmm0
1078; SSE-NEXT:    pand %xmm1, %xmm0
1079; SSE-NEXT:    movdqa %xmm0, %xmm1
1080; SSE-NEXT:    psrlw $8, %xmm1
1081; SSE-NEXT:    pand %xmm0, %xmm1
1082; SSE-NEXT:    movd %xmm1, %eax
1083; SSE-NEXT:    testl %eax, %eax
1084; SSE-NEXT:    sete %al
1085; SSE-NEXT:    retq
1086;
1087; AVX1-LABEL: test_v128i8:
1088; AVX1:       # %bb.0:
1089; AVX1-NEXT:    vandps %ymm3, %ymm1, %ymm1
1090; AVX1-NEXT:    vandps %ymm1, %ymm2, %ymm1
1091; AVX1-NEXT:    vandps %ymm1, %ymm0, %ymm0
1092; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
1093; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
1094; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[2,3,2,3]
1095; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
1096; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[1,1,1,1]
1097; AVX1-NEXT:    vandps %xmm1, %xmm0, %xmm0
1098; AVX1-NEXT:    vpsrld $16, %xmm0, %xmm1
1099; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
1100; AVX1-NEXT:    vpsrlw $8, %xmm0, %xmm1
1101; AVX1-NEXT:    vpand %xmm1, %xmm0, %xmm0
1102; AVX1-NEXT:    vmovd %xmm0, %eax
1103; AVX1-NEXT:    testb %al, %al
1104; AVX1-NEXT:    sete %al
1105; AVX1-NEXT:    vzeroupper
1106; AVX1-NEXT:    retq
1107;
1108; AVX2-LABEL: test_v128i8:
1109; AVX2:       # %bb.0:
1110; AVX2-NEXT:    vpand %ymm3, %ymm1, %ymm1
1111; AVX2-NEXT:    vpand %ymm1, %ymm2, %ymm1
1112; AVX2-NEXT:    vpand %ymm1, %ymm0, %ymm0
1113; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm1
1114; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
1115; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
1116; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
1117; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
1118; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
1119; AVX2-NEXT:    vpsrld $16, %xmm0, %xmm1
1120; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
1121; AVX2-NEXT:    vpsrlw $8, %xmm0, %xmm1
1122; AVX2-NEXT:    vpand %xmm1, %xmm0, %xmm0
1123; AVX2-NEXT:    vmovd %xmm0, %eax
1124; AVX2-NEXT:    testb %al, %al
1125; AVX2-NEXT:    sete %al
1126; AVX2-NEXT:    vzeroupper
1127; AVX2-NEXT:    retq
1128;
1129; AVX512-LABEL: test_v128i8:
1130; AVX512:       # %bb.0:
1131; AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
1132; AVX512-NEXT:    vextracti64x4 $1, %zmm0, %ymm1
1133; AVX512-NEXT:    vpandq %zmm1, %zmm0, %zmm0
1134; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm1
1135; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
1136; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[2,3,2,3]
1137; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
1138; AVX512-NEXT:    vpshufd {{.*#+}} xmm1 = xmm0[1,1,1,1]
1139; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
1140; AVX512-NEXT:    vpsrld $16, %xmm0, %xmm1
1141; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
1142; AVX512-NEXT:    vpsrlw $8, %xmm0, %xmm1
1143; AVX512-NEXT:    vpand %xmm1, %xmm0, %xmm0
1144; AVX512-NEXT:    vmovd %xmm0, %eax
1145; AVX512-NEXT:    testb %al, %al
1146; AVX512-NEXT:    sete %al
1147; AVX512-NEXT:    vzeroupper
1148; AVX512-NEXT:    retq
1149  %1 = call i8 @llvm.vector.reduce.and.v128i8(<128 x i8> %a0)
1150  %2 = icmp eq i8 %1, 0
1151  ret i1 %2
1152}
1153
1154declare i64 @llvm.vector.reduce.and.v2i64(<2 x i64>)
1155declare i64 @llvm.vector.reduce.and.v4i64(<4 x i64>)
1156declare i64 @llvm.vector.reduce.and.v8i64(<8 x i64>)
1157declare i64 @llvm.vector.reduce.and.v16i64(<16 x i64>)
1158
1159declare i32 @llvm.vector.reduce.and.v2i32(<2 x i32>)
1160declare i32 @llvm.vector.reduce.and.v4i32(<4 x i32>)
1161declare i32 @llvm.vector.reduce.and.v8i32(<8 x i32>)
1162declare i32 @llvm.vector.reduce.and.v16i32(<16 x i32>)
1163declare i32 @llvm.vector.reduce.and.v32i32(<32 x i32>)
1164
1165declare i16 @llvm.vector.reduce.and.v2i16(<2 x i16>)
1166declare i16 @llvm.vector.reduce.and.v4i16(<4 x i16>)
1167declare i16 @llvm.vector.reduce.and.v8i16(<8 x i16>)
1168declare i16 @llvm.vector.reduce.and.v16i16(<16 x i16>)
1169declare i16 @llvm.vector.reduce.and.v32i16(<32 x i16>)
1170declare i16 @llvm.vector.reduce.and.v64i16(<64 x i16>)
1171
1172declare i8 @llvm.vector.reduce.and.v2i8(<2 x i8>)
1173declare i8 @llvm.vector.reduce.and.v4i8(<4 x i8>)
1174declare i8 @llvm.vector.reduce.and.v8i8(<8 x i8>)
1175declare i8 @llvm.vector.reduce.and.v16i8(<16 x i8>)
1176declare i8 @llvm.vector.reduce.and.v32i8(<32 x i8>)
1177declare i8 @llvm.vector.reduce.and.v64i8(<64 x i8>)
1178declare i8 @llvm.vector.reduce.and.v128i8(<128 x i8>)
1179