1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE42 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512F 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl,+avx512dq,+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512DQBW 8 9; Lower common integer comparisons such as 'isPositive' efficiently: 10; https://llvm.org/bugs/show_bug.cgi?id=26701 11 12define <16 x i8> @test_pcmpgtb(<16 x i8> %x) { 13; SSE-LABEL: test_pcmpgtb: 14; SSE: # %bb.0: 15; SSE-NEXT: pcmpeqd %xmm1, %xmm1 16; SSE-NEXT: pcmpgtb %xmm1, %xmm0 17; SSE-NEXT: retq 18; 19; AVX-LABEL: test_pcmpgtb: 20; AVX: # %bb.0: 21; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 22; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 23; AVX-NEXT: retq 24 %sign = ashr <16 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7> 25 %not = xor <16 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 26 ret <16 x i8> %not 27} 28 29define <8 x i16> @test_pcmpgtw(<8 x i16> %x) { 30; SSE-LABEL: test_pcmpgtw: 31; SSE: # %bb.0: 32; SSE-NEXT: pcmpeqd %xmm1, %xmm1 33; SSE-NEXT: pcmpgtw %xmm1, %xmm0 34; SSE-NEXT: retq 35; 36; AVX-LABEL: test_pcmpgtw: 37; AVX: # %bb.0: 38; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 39; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 40; AVX-NEXT: retq 41 %sign = ashr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15> 42 %not = xor <8 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 43 ret <8 x i16> %not 44} 45 46define <4 x i32> @test_pcmpgtd(<4 x i32> %x) { 47; SSE-LABEL: test_pcmpgtd: 48; SSE: # %bb.0: 49; SSE-NEXT: pcmpeqd %xmm1, %xmm1 50; SSE-NEXT: pcmpgtd %xmm1, %xmm0 51; SSE-NEXT: retq 52; 53; AVX-LABEL: test_pcmpgtd: 54; AVX: # %bb.0: 55; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 56; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 57; AVX-NEXT: retq 58 %sign = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31> 59 %not = xor <4 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1> 60 ret <4 x i32> %not 61} 62 63define <2 x i64> @test_pcmpgtq(<2 x i64> %x) { 64; SSE2-LABEL: test_pcmpgtq: 65; SSE2: # %bb.0: 66; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 67; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 68; SSE2-NEXT: pcmpgtd %xmm1, %xmm0 69; SSE2-NEXT: retq 70; 71; SSE42-LABEL: test_pcmpgtq: 72; SSE42: # %bb.0: 73; SSE42-NEXT: pcmpeqd %xmm1, %xmm1 74; SSE42-NEXT: pcmpgtq %xmm1, %xmm0 75; SSE42-NEXT: retq 76; 77; AVX-LABEL: test_pcmpgtq: 78; AVX: # %bb.0: 79; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 80; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 81; AVX-NEXT: retq 82 %sign = ashr <2 x i64> %x, <i64 63, i64 63> 83 %not = xor <2 x i64> %sign, <i64 -1, i64 -1> 84 ret <2 x i64> %not 85} 86 87define <1 x i128> @test_strange_type(<1 x i128> %x) { 88; CHECK-LABEL: test_strange_type: 89; CHECK: # %bb.0: 90; CHECK-NEXT: movq %rsi, %rax 91; CHECK-NEXT: sarq $63, %rax 92; CHECK-NEXT: notq %rax 93; CHECK-NEXT: movq %rax, %rdx 94; CHECK-NEXT: retq 95 %sign = ashr <1 x i128> %x, <i128 127> 96 %not = xor <1 x i128> %sign, <i128 -1> 97 ret <1 x i128> %not 98} 99 100define <32 x i8> @test_pcmpgtb_256(<32 x i8> %x) { 101; SSE-LABEL: test_pcmpgtb_256: 102; SSE: # %bb.0: 103; SSE-NEXT: pcmpeqd %xmm2, %xmm2 104; SSE-NEXT: pcmpgtb %xmm2, %xmm0 105; SSE-NEXT: pcmpgtb %xmm2, %xmm1 106; SSE-NEXT: retq 107; 108; AVX1-LABEL: test_pcmpgtb_256: 109; AVX1: # %bb.0: 110; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 111; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 112; AVX1-NEXT: vpcmpgtb %xmm1, %xmm2, %xmm1 113; AVX1-NEXT: vpcmpgtb %xmm0, %xmm2, %xmm0 114; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 115; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 116; AVX1-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1 117; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 118; AVX1-NEXT: retq 119; 120; AVX2-LABEL: test_pcmpgtb_256: 121; AVX2: # %bb.0: 122; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 123; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0 124; AVX2-NEXT: retq 125; 126; AVX512-LABEL: test_pcmpgtb_256: 127; AVX512: # %bb.0: 128; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 129; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0 130; AVX512-NEXT: retq 131 %sign = ashr <32 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7> 132 %not = xor <32 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 133 ret <32 x i8> %not 134} 135 136define <16 x i16> @test_pcmpgtw_256(<16 x i16> %x) { 137; SSE-LABEL: test_pcmpgtw_256: 138; SSE: # %bb.0: 139; SSE-NEXT: pcmpeqd %xmm2, %xmm2 140; SSE-NEXT: pcmpgtw %xmm2, %xmm0 141; SSE-NEXT: pcmpgtw %xmm2, %xmm1 142; SSE-NEXT: retq 143; 144; AVX1-LABEL: test_pcmpgtw_256: 145; AVX1: # %bb.0: 146; AVX1-NEXT: vpsraw $15, %xmm0, %xmm1 147; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 148; AVX1-NEXT: vpsraw $15, %xmm0, %xmm0 149; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 150; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 151; AVX1-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1 152; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 153; AVX1-NEXT: retq 154; 155; AVX2-LABEL: test_pcmpgtw_256: 156; AVX2: # %bb.0: 157; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 158; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 159; AVX2-NEXT: retq 160; 161; AVX512-LABEL: test_pcmpgtw_256: 162; AVX512: # %bb.0: 163; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 164; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 165; AVX512-NEXT: retq 166 %sign = ashr <16 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15> 167 %not = xor <16 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 168 ret <16 x i16> %not 169} 170 171define <8 x i32> @test_pcmpgtd_256(<8 x i32> %x) { 172; SSE-LABEL: test_pcmpgtd_256: 173; SSE: # %bb.0: 174; SSE-NEXT: pcmpeqd %xmm2, %xmm2 175; SSE-NEXT: pcmpgtd %xmm2, %xmm0 176; SSE-NEXT: pcmpgtd %xmm2, %xmm1 177; SSE-NEXT: retq 178; 179; AVX1-LABEL: test_pcmpgtd_256: 180; AVX1: # %bb.0: 181; AVX1-NEXT: vpsrad $31, %xmm0, %xmm1 182; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 183; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0 184; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 185; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 186; AVX1-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1 187; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 188; AVX1-NEXT: retq 189; 190; AVX2-LABEL: test_pcmpgtd_256: 191; AVX2: # %bb.0: 192; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 193; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 194; AVX2-NEXT: retq 195; 196; AVX512-LABEL: test_pcmpgtd_256: 197; AVX512: # %bb.0: 198; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 199; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 200; AVX512-NEXT: retq 201 %sign = ashr <8 x i32> %x, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31> 202 %not = xor <8 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 203 ret <8 x i32> %not 204} 205 206define <4 x i64> @test_pcmpgtq_256(<4 x i64> %x) { 207; SSE2-LABEL: test_pcmpgtq_256: 208; SSE2: # %bb.0: 209; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 210; SSE2-NEXT: pcmpeqd %xmm2, %xmm2 211; SSE2-NEXT: pcmpgtd %xmm2, %xmm0 212; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 213; SSE2-NEXT: pcmpgtd %xmm2, %xmm1 214; SSE2-NEXT: retq 215; 216; SSE42-LABEL: test_pcmpgtq_256: 217; SSE42: # %bb.0: 218; SSE42-NEXT: pcmpeqd %xmm2, %xmm2 219; SSE42-NEXT: pcmpgtq %xmm2, %xmm0 220; SSE42-NEXT: pcmpgtq %xmm2, %xmm1 221; SSE42-NEXT: retq 222; 223; AVX1-LABEL: test_pcmpgtq_256: 224; AVX1: # %bb.0: 225; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 226; AVX1-NEXT: vpxor %xmm2, %xmm2, %xmm2 227; AVX1-NEXT: vpcmpgtq %xmm1, %xmm2, %xmm1 228; AVX1-NEXT: vpcmpgtq %xmm0, %xmm2, %xmm0 229; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 230; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 231; AVX1-NEXT: vcmptrueps %ymm1, %ymm1, %ymm1 232; AVX1-NEXT: vxorps %ymm1, %ymm0, %ymm0 233; AVX1-NEXT: retq 234; 235; AVX2-LABEL: test_pcmpgtq_256: 236; AVX2: # %bb.0: 237; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 238; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0 239; AVX2-NEXT: retq 240; 241; AVX512-LABEL: test_pcmpgtq_256: 242; AVX512: # %bb.0: 243; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 244; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0 245; AVX512-NEXT: retq 246 %sign = ashr <4 x i64> %x, <i64 63, i64 63, i64 63, i64 63> 247 %not = xor <4 x i64> %sign, <i64 -1, i64 -1, i64 -1, i64 -1> 248 ret <4 x i64> %not 249} 250 251define <16 x i8> @cmpeq_zext_v16i8(<16 x i8> %a, <16 x i8> %b) { 252; SSE-LABEL: cmpeq_zext_v16i8: 253; SSE: # %bb.0: 254; SSE-NEXT: pcmpeqb %xmm1, %xmm0 255; SSE-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 256; SSE-NEXT: retq 257; 258; AVX-LABEL: cmpeq_zext_v16i8: 259; AVX: # %bb.0: 260; AVX-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0 261; AVX-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0 262; AVX-NEXT: retq 263 %cmp = icmp eq <16 x i8> %a, %b 264 %zext = zext <16 x i1> %cmp to <16 x i8> 265 ret <16 x i8> %zext 266} 267 268define <16 x i16> @cmpeq_zext_v16i16(<16 x i16> %a, <16 x i16> %b) { 269; SSE-LABEL: cmpeq_zext_v16i16: 270; SSE: # %bb.0: 271; SSE-NEXT: pcmpeqw %xmm2, %xmm0 272; SSE-NEXT: psrlw $15, %xmm0 273; SSE-NEXT: pcmpeqw %xmm3, %xmm1 274; SSE-NEXT: psrlw $15, %xmm1 275; SSE-NEXT: retq 276; 277; AVX1-LABEL: cmpeq_zext_v16i16: 278; AVX1: # %bb.0: 279; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 280; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 281; AVX1-NEXT: vpcmpeqw %xmm2, %xmm3, %xmm2 282; AVX1-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0 283; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 284; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 285; AVX1-NEXT: retq 286; 287; AVX2-LABEL: cmpeq_zext_v16i16: 288; AVX2: # %bb.0: 289; AVX2-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0 290; AVX2-NEXT: vpsrlw $15, %ymm0, %ymm0 291; AVX2-NEXT: retq 292; 293; AVX512-LABEL: cmpeq_zext_v16i16: 294; AVX512: # %bb.0: 295; AVX512-NEXT: vpcmpeqw %ymm1, %ymm0, %ymm0 296; AVX512-NEXT: vpsrlw $15, %ymm0, %ymm0 297; AVX512-NEXT: retq 298 %cmp = icmp eq <16 x i16> %a, %b 299 %zext = zext <16 x i1> %cmp to <16 x i16> 300 ret <16 x i16> %zext 301} 302 303define <4 x i32> @cmpeq_zext_v4i32(<4 x i32> %a, <4 x i32> %b) { 304; SSE-LABEL: cmpeq_zext_v4i32: 305; SSE: # %bb.0: 306; SSE-NEXT: pcmpeqd %xmm1, %xmm0 307; SSE-NEXT: psrld $31, %xmm0 308; SSE-NEXT: retq 309; 310; AVX-LABEL: cmpeq_zext_v4i32: 311; AVX: # %bb.0: 312; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0 313; AVX-NEXT: vpsrld $31, %xmm0, %xmm0 314; AVX-NEXT: retq 315 %cmp = icmp eq <4 x i32> %a, %b 316 %zext = zext <4 x i1> %cmp to <4 x i32> 317 ret <4 x i32> %zext 318} 319 320define <4 x i64> @cmpeq_zext_v4i64(<4 x i64> %a, <4 x i64> %b) { 321; SSE2-LABEL: cmpeq_zext_v4i64: 322; SSE2: # %bb.0: 323; SSE2-NEXT: pcmpeqd %xmm2, %xmm0 324; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm0[1,0,3,2] 325; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [1,1] 326; SSE2-NEXT: pand %xmm4, %xmm2 327; SSE2-NEXT: pand %xmm2, %xmm0 328; SSE2-NEXT: pcmpeqd %xmm3, %xmm1 329; SSE2-NEXT: pshufd {{.*#+}} xmm2 = xmm1[1,0,3,2] 330; SSE2-NEXT: pand %xmm4, %xmm2 331; SSE2-NEXT: pand %xmm2, %xmm1 332; SSE2-NEXT: retq 333; 334; SSE42-LABEL: cmpeq_zext_v4i64: 335; SSE42: # %bb.0: 336; SSE42-NEXT: pcmpeqq %xmm2, %xmm0 337; SSE42-NEXT: psrlq $63, %xmm0 338; SSE42-NEXT: pcmpeqq %xmm3, %xmm1 339; SSE42-NEXT: psrlq $63, %xmm1 340; SSE42-NEXT: retq 341; 342; AVX1-LABEL: cmpeq_zext_v4i64: 343; AVX1: # %bb.0: 344; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 345; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 346; AVX1-NEXT: vpcmpeqq %xmm2, %xmm3, %xmm2 347; AVX1-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0 348; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 349; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 350; AVX1-NEXT: retq 351; 352; AVX2-LABEL: cmpeq_zext_v4i64: 353; AVX2: # %bb.0: 354; AVX2-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0 355; AVX2-NEXT: vpsrlq $63, %ymm0, %ymm0 356; AVX2-NEXT: retq 357; 358; AVX512-LABEL: cmpeq_zext_v4i64: 359; AVX512: # %bb.0: 360; AVX512-NEXT: vpcmpeqq %ymm1, %ymm0, %ymm0 361; AVX512-NEXT: vpsrlq $63, %ymm0, %ymm0 362; AVX512-NEXT: retq 363 %cmp = icmp eq <4 x i64> %a, %b 364 %zext = zext <4 x i1> %cmp to <4 x i64> 365 ret <4 x i64> %zext 366} 367 368define <32 x i8> @cmpgt_zext_v32i8(<32 x i8> %a, <32 x i8> %b) { 369; SSE-LABEL: cmpgt_zext_v32i8: 370; SSE: # %bb.0: 371; SSE-NEXT: pcmpgtb %xmm2, %xmm0 372; SSE-NEXT: movdqa {{.*#+}} xmm2 = [1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1] 373; SSE-NEXT: pand %xmm2, %xmm0 374; SSE-NEXT: pcmpgtb %xmm3, %xmm1 375; SSE-NEXT: pand %xmm2, %xmm1 376; SSE-NEXT: retq 377; 378; AVX1-LABEL: cmpgt_zext_v32i8: 379; AVX1: # %bb.0: 380; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 381; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 382; AVX1-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2 383; AVX1-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 384; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 385; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 386; AVX1-NEXT: retq 387; 388; AVX2-LABEL: cmpgt_zext_v32i8: 389; AVX2: # %bb.0: 390; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0 391; AVX2-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 392; AVX2-NEXT: retq 393; 394; AVX512-LABEL: cmpgt_zext_v32i8: 395; AVX512: # %bb.0: 396; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0 397; AVX512-NEXT: vpand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 398; AVX512-NEXT: retq 399 %cmp = icmp sgt <32 x i8> %a, %b 400 %zext = zext <32 x i1> %cmp to <32 x i8> 401 ret <32 x i8> %zext 402} 403 404define <8 x i16> @cmpgt_zext_v8i16(<8 x i16> %a, <8 x i16> %b) { 405; SSE-LABEL: cmpgt_zext_v8i16: 406; SSE: # %bb.0: 407; SSE-NEXT: pcmpgtw %xmm1, %xmm0 408; SSE-NEXT: psrlw $15, %xmm0 409; SSE-NEXT: retq 410; 411; AVX-LABEL: cmpgt_zext_v8i16: 412; AVX: # %bb.0: 413; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 414; AVX-NEXT: vpsrlw $15, %xmm0, %xmm0 415; AVX-NEXT: retq 416 %cmp = icmp sgt <8 x i16> %a, %b 417 %zext = zext <8 x i1> %cmp to <8 x i16> 418 ret <8 x i16> %zext 419} 420 421define <8 x i32> @cmpgt_zext_v8i32(<8 x i32> %a, <8 x i32> %b) { 422; SSE-LABEL: cmpgt_zext_v8i32: 423; SSE: # %bb.0: 424; SSE-NEXT: pcmpgtd %xmm2, %xmm0 425; SSE-NEXT: psrld $31, %xmm0 426; SSE-NEXT: pcmpgtd %xmm3, %xmm1 427; SSE-NEXT: psrld $31, %xmm1 428; SSE-NEXT: retq 429; 430; AVX1-LABEL: cmpgt_zext_v8i32: 431; AVX1: # %bb.0: 432; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 433; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 434; AVX1-NEXT: vpcmpgtd %xmm2, %xmm3, %xmm2 435; AVX1-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 436; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 437; AVX1-NEXT: vandps {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0, %ymm0 438; AVX1-NEXT: retq 439; 440; AVX2-LABEL: cmpgt_zext_v8i32: 441; AVX2: # %bb.0: 442; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 443; AVX2-NEXT: vpsrld $31, %ymm0, %ymm0 444; AVX2-NEXT: retq 445; 446; AVX512-LABEL: cmpgt_zext_v8i32: 447; AVX512: # %bb.0: 448; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 449; AVX512-NEXT: vpsrld $31, %ymm0, %ymm0 450; AVX512-NEXT: retq 451 %cmp = icmp sgt <8 x i32> %a, %b 452 %zext = zext <8 x i1> %cmp to <8 x i32> 453 ret <8 x i32> %zext 454} 455 456define <2 x i64> @cmpgt_zext_v2i64(<2 x i64> %a, <2 x i64> %b) { 457; SSE2-LABEL: cmpgt_zext_v2i64: 458; SSE2: # %bb.0: 459; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,2147483648] 460; SSE2-NEXT: pxor %xmm2, %xmm1 461; SSE2-NEXT: pxor %xmm2, %xmm0 462; SSE2-NEXT: movdqa %xmm0, %xmm2 463; SSE2-NEXT: pcmpgtd %xmm1, %xmm2 464; SSE2-NEXT: pcmpeqd %xmm1, %xmm0 465; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,3,3] 466; SSE2-NEXT: pand %xmm2, %xmm1 467; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm2[1,1,3,3] 468; SSE2-NEXT: por %xmm1, %xmm0 469; SSE2-NEXT: pand {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 470; SSE2-NEXT: retq 471; 472; SSE42-LABEL: cmpgt_zext_v2i64: 473; SSE42: # %bb.0: 474; SSE42-NEXT: pcmpgtq %xmm1, %xmm0 475; SSE42-NEXT: psrlq $63, %xmm0 476; SSE42-NEXT: retq 477; 478; AVX-LABEL: cmpgt_zext_v2i64: 479; AVX: # %bb.0: 480; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 481; AVX-NEXT: vpsrlq $63, %xmm0, %xmm0 482; AVX-NEXT: retq 483 %cmp = icmp sgt <2 x i64> %a, %b 484 %zext = zext <2 x i1> %cmp to <2 x i64> 485 ret <2 x i64> %zext 486} 487 488; Test that we optimize a zext of a vector setcc ne zero where all bits but the 489; lsb are known to be zero. 490define <8 x i32> @cmpne_knownzeros_zext_v8i16_v8i32(<8 x i16> %x) { 491; SSE2-LABEL: cmpne_knownzeros_zext_v8i16_v8i32: 492; SSE2: # %bb.0: 493; SSE2-NEXT: movdqa %xmm0, %xmm1 494; SSE2-NEXT: psrlw $15, %xmm1 495; SSE2-NEXT: pxor %xmm2, %xmm2 496; SSE2-NEXT: movdqa %xmm1, %xmm0 497; SSE2-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 498; SSE2-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 499; SSE2-NEXT: retq 500; 501; SSE42-LABEL: cmpne_knownzeros_zext_v8i16_v8i32: 502; SSE42: # %bb.0: 503; SSE42-NEXT: movdqa %xmm0, %xmm1 504; SSE42-NEXT: psrlw $15, %xmm1 505; SSE42-NEXT: pxor %xmm2, %xmm2 506; SSE42-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 507; SSE42-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 508; SSE42-NEXT: retq 509; 510; AVX1-LABEL: cmpne_knownzeros_zext_v8i16_v8i32: 511; AVX1: # %bb.0: 512; AVX1-NEXT: vpsrlw $15, %xmm0, %xmm0 513; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 514; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 515; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 516; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 517; AVX1-NEXT: retq 518; 519; AVX2-LABEL: cmpne_knownzeros_zext_v8i16_v8i32: 520; AVX2: # %bb.0: 521; AVX2-NEXT: vpsrlw $15, %xmm0, %xmm0 522; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 523; AVX2-NEXT: retq 524; 525; AVX512-LABEL: cmpne_knownzeros_zext_v8i16_v8i32: 526; AVX512: # %bb.0: 527; AVX512-NEXT: vpsrlw $15, %xmm0, %xmm0 528; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 529; AVX512-NEXT: retq 530 %a = lshr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15> 531 %b = icmp ne <8 x i16> %a, zeroinitializer 532 %c = zext <8 x i1> %b to <8 x i32> 533 ret <8 x i32> %c 534} 535 536define <8 x i32> @cmpne_knownzeros_zext_v8i32_v8i32(<8 x i32> %x) { 537; SSE-LABEL: cmpne_knownzeros_zext_v8i32_v8i32: 538; SSE: # %bb.0: 539; SSE-NEXT: psrld $31, %xmm0 540; SSE-NEXT: psrld $31, %xmm1 541; SSE-NEXT: retq 542; 543; AVX1-LABEL: cmpne_knownzeros_zext_v8i32_v8i32: 544; AVX1: # %bb.0: 545; AVX1-NEXT: vpsrld $31, %xmm0, %xmm1 546; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 547; AVX1-NEXT: vpsrld $31, %xmm0, %xmm0 548; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 549; AVX1-NEXT: retq 550; 551; AVX2-LABEL: cmpne_knownzeros_zext_v8i32_v8i32: 552; AVX2: # %bb.0: 553; AVX2-NEXT: vpsrld $31, %ymm0, %ymm0 554; AVX2-NEXT: retq 555; 556; AVX512-LABEL: cmpne_knownzeros_zext_v8i32_v8i32: 557; AVX512: # %bb.0: 558; AVX512-NEXT: vpsrld $31, %ymm0, %ymm0 559; AVX512-NEXT: retq 560 %a = lshr <8 x i32> %x, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31> 561 %b = icmp ne <8 x i32> %a, zeroinitializer 562 %c = zext <8 x i1> %b to <8 x i32> 563 ret <8 x i32> %c 564} 565 566define <8 x i16> @cmpne_knownzeros_zext_v8i32_v8i16(<8 x i32> %x) { 567; SSE2-LABEL: cmpne_knownzeros_zext_v8i32_v8i16: 568; SSE2: # %bb.0: 569; SSE2-NEXT: psrld $31, %xmm1 570; SSE2-NEXT: psrld $31, %xmm0 571; SSE2-NEXT: packuswb %xmm1, %xmm0 572; SSE2-NEXT: retq 573; 574; SSE42-LABEL: cmpne_knownzeros_zext_v8i32_v8i16: 575; SSE42: # %bb.0: 576; SSE42-NEXT: psrld $31, %xmm1 577; SSE42-NEXT: psrld $31, %xmm0 578; SSE42-NEXT: packusdw %xmm1, %xmm0 579; SSE42-NEXT: retq 580; 581; AVX1-LABEL: cmpne_knownzeros_zext_v8i32_v8i16: 582; AVX1: # %bb.0: 583; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 584; AVX1-NEXT: vpsrld $31, %xmm1, %xmm1 585; AVX1-NEXT: vpsrld $31, %xmm0, %xmm0 586; AVX1-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 587; AVX1-NEXT: vzeroupper 588; AVX1-NEXT: retq 589; 590; AVX2-LABEL: cmpne_knownzeros_zext_v8i32_v8i16: 591; AVX2: # %bb.0: 592; AVX2-NEXT: vpsrld $31, %ymm0, %ymm0 593; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 594; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 595; AVX2-NEXT: vzeroupper 596; AVX2-NEXT: retq 597; 598; AVX512-LABEL: cmpne_knownzeros_zext_v8i32_v8i16: 599; AVX512: # %bb.0: 600; AVX512-NEXT: vpsrld $31, %ymm0, %ymm0 601; AVX512-NEXT: vpmovdw %ymm0, %xmm0 602; AVX512-NEXT: vzeroupper 603; AVX512-NEXT: retq 604 %a = lshr <8 x i32> %x, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31> 605 %b = icmp ne <8 x i32> %a, zeroinitializer 606 %c = zext <8 x i1> %b to <8 x i16> 607 ret <8 x i16> %c 608} 609 610; PR26697 611define <4 x i32> @cmpeq_one_mask_bit(<4 x i32> %mask) { 612; SSE-LABEL: cmpeq_one_mask_bit: 613; SSE: # %bb.0: 614; SSE-NEXT: psrad $31, %xmm0 615; SSE-NEXT: retq 616; 617; AVX-LABEL: cmpeq_one_mask_bit: 618; AVX: # %bb.0: 619; AVX-NEXT: vpsrad $31, %xmm0, %xmm0 620; AVX-NEXT: retq 621 %mask_signbit = and <4 x i32> %mask, <i32 2147483648, i32 2147483648, i32 2147483648, i32 2147483648> 622 %mask_bool = icmp ne <4 x i32> %mask_signbit, zeroinitializer 623 %mask_bool_ext = sext <4 x i1> %mask_bool to <4 x i32> 624 ret <4 x i32> %mask_bool_ext 625} 626 627define <2 x i64> @not_signbit_mask_v2i64(<2 x i64> %x, <2 x i64> %y) { 628; SSE2-LABEL: not_signbit_mask_v2i64: 629; SSE2: # %bb.0: 630; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 631; SSE2-NEXT: pcmpeqd %xmm2, %xmm2 632; SSE2-NEXT: pcmpgtd %xmm2, %xmm0 633; SSE2-NEXT: pand %xmm1, %xmm0 634; SSE2-NEXT: retq 635; 636; SSE42-LABEL: not_signbit_mask_v2i64: 637; SSE42: # %bb.0: 638; SSE42-NEXT: pcmpeqd %xmm2, %xmm2 639; SSE42-NEXT: pcmpgtq %xmm2, %xmm0 640; SSE42-NEXT: pand %xmm1, %xmm0 641; SSE42-NEXT: retq 642; 643; AVX-LABEL: not_signbit_mask_v2i64: 644; AVX: # %bb.0: 645; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 646; AVX-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm0 647; AVX-NEXT: vpand %xmm0, %xmm1, %xmm0 648; AVX-NEXT: retq 649 %sh = ashr <2 x i64> %x, <i64 63, i64 63> 650 %not = xor <2 x i64> %sh, <i64 -1, i64 -1> 651 %and = and <2 x i64> %y, %not 652 ret <2 x i64> %and 653} 654 655define <4 x i32> @not_signbit_mask_v4i32(<4 x i32> %x, <4 x i32> %y) { 656; SSE-LABEL: not_signbit_mask_v4i32: 657; SSE: # %bb.0: 658; SSE-NEXT: pcmpeqd %xmm2, %xmm2 659; SSE-NEXT: pcmpgtd %xmm2, %xmm0 660; SSE-NEXT: pand %xmm1, %xmm0 661; SSE-NEXT: retq 662; 663; AVX-LABEL: not_signbit_mask_v4i32: 664; AVX: # %bb.0: 665; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 666; AVX-NEXT: vpcmpgtd %xmm2, %xmm0, %xmm0 667; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0 668; AVX-NEXT: retq 669 %sh = ashr <4 x i32> %x, <i32 31, i32 31, i32 31, i32 31> 670 %not = xor <4 x i32> %sh, <i32 -1, i32 -1, i32 -1, i32 -1> 671 %and = and <4 x i32> %not, %y 672 ret <4 x i32> %and 673} 674 675define <8 x i16> @not_signbit_mask_v8i16(<8 x i16> %x, <8 x i16> %y) { 676; SSE-LABEL: not_signbit_mask_v8i16: 677; SSE: # %bb.0: 678; SSE-NEXT: pcmpeqd %xmm2, %xmm2 679; SSE-NEXT: pcmpgtw %xmm2, %xmm0 680; SSE-NEXT: pand %xmm1, %xmm0 681; SSE-NEXT: retq 682; 683; AVX-LABEL: not_signbit_mask_v8i16: 684; AVX: # %bb.0: 685; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 686; AVX-NEXT: vpcmpgtw %xmm2, %xmm0, %xmm0 687; AVX-NEXT: vpand %xmm0, %xmm1, %xmm0 688; AVX-NEXT: retq 689 %sh = ashr <8 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15> 690 %not = xor <8 x i16> %sh, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 691 %and = and <8 x i16> %y, %not 692 ret <8 x i16> %and 693} 694 695define <16 x i8> @not_signbit_mask_v16i8(<16 x i8> %x, <16 x i8> %y) { 696; SSE-LABEL: not_signbit_mask_v16i8: 697; SSE: # %bb.0: 698; SSE-NEXT: pcmpeqd %xmm2, %xmm2 699; SSE-NEXT: pcmpgtb %xmm2, %xmm0 700; SSE-NEXT: pand %xmm1, %xmm0 701; SSE-NEXT: retq 702; 703; AVX-LABEL: not_signbit_mask_v16i8: 704; AVX: # %bb.0: 705; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 706; AVX-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0 707; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0 708; AVX-NEXT: retq 709 %sh = ashr <16 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7> 710 %not = xor <16 x i8> %sh, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 711 %and = and <16 x i8> %not, %y 712 ret <16 x i8> %and 713} 714 715define <4 x i64> @not_signbit_mask_v4i64(<4 x i64> %x, <4 x i64> %y) { 716; SSE2-LABEL: not_signbit_mask_v4i64: 717; SSE2: # %bb.0: 718; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 719; SSE2-NEXT: pcmpeqd %xmm4, %xmm4 720; SSE2-NEXT: pcmpgtd %xmm4, %xmm1 721; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 722; SSE2-NEXT: pcmpgtd %xmm4, %xmm0 723; SSE2-NEXT: pand %xmm2, %xmm0 724; SSE2-NEXT: pand %xmm3, %xmm1 725; SSE2-NEXT: retq 726; 727; SSE42-LABEL: not_signbit_mask_v4i64: 728; SSE42: # %bb.0: 729; SSE42-NEXT: pcmpeqd %xmm4, %xmm4 730; SSE42-NEXT: pcmpgtq %xmm4, %xmm1 731; SSE42-NEXT: pcmpgtq %xmm4, %xmm0 732; SSE42-NEXT: pand %xmm2, %xmm0 733; SSE42-NEXT: pand %xmm3, %xmm1 734; SSE42-NEXT: retq 735; 736; AVX1-LABEL: not_signbit_mask_v4i64: 737; AVX1: # %bb.0: 738; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 739; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 740; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2 741; AVX1-NEXT: vpcmpgtq %xmm0, %xmm3, %xmm0 742; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 743; AVX1-NEXT: vandnps %ymm1, %ymm0, %ymm0 744; AVX1-NEXT: retq 745; 746; AVX2-LABEL: not_signbit_mask_v4i64: 747; AVX2: # %bb.0: 748; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 749; AVX2-NEXT: vpcmpgtq %ymm2, %ymm0, %ymm0 750; AVX2-NEXT: vpand %ymm0, %ymm1, %ymm0 751; AVX2-NEXT: retq 752; 753; AVX512-LABEL: not_signbit_mask_v4i64: 754; AVX512: # %bb.0: 755; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 756; AVX512-NEXT: vpcmpgtq %ymm2, %ymm0, %ymm0 757; AVX512-NEXT: vpand %ymm0, %ymm1, %ymm0 758; AVX512-NEXT: retq 759 %sh = ashr <4 x i64> %x, <i64 63, i64 63, i64 63, i64 63> 760 %not = xor <4 x i64> %sh, <i64 -1, i64 -1, i64 -1, i64 -1> 761 %and = and <4 x i64> %y, %not 762 ret <4 x i64> %and 763} 764 765define <8 x i32> @not_signbit_mask_v8i32(<8 x i32> %x, <8 x i32> %y) { 766; SSE-LABEL: not_signbit_mask_v8i32: 767; SSE: # %bb.0: 768; SSE-NEXT: pcmpeqd %xmm4, %xmm4 769; SSE-NEXT: pcmpgtd %xmm4, %xmm1 770; SSE-NEXT: pcmpgtd %xmm4, %xmm0 771; SSE-NEXT: pand %xmm2, %xmm0 772; SSE-NEXT: pand %xmm3, %xmm1 773; SSE-NEXT: retq 774; 775; AVX1-LABEL: not_signbit_mask_v8i32: 776; AVX1: # %bb.0: 777; AVX1-NEXT: vpsrad $31, %xmm0, %xmm2 778; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 779; AVX1-NEXT: vpsrad $31, %xmm0, %xmm0 780; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 781; AVX1-NEXT: vandnps %ymm1, %ymm0, %ymm0 782; AVX1-NEXT: retq 783; 784; AVX2-LABEL: not_signbit_mask_v8i32: 785; AVX2: # %bb.0: 786; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 787; AVX2-NEXT: vpcmpgtd %ymm2, %ymm0, %ymm0 788; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 789; AVX2-NEXT: retq 790; 791; AVX512-LABEL: not_signbit_mask_v8i32: 792; AVX512: # %bb.0: 793; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 794; AVX512-NEXT: vpcmpgtd %ymm2, %ymm0, %ymm0 795; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0 796; AVX512-NEXT: retq 797 %sh = ashr <8 x i32> %x, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31> 798 %not = xor <8 x i32> %sh, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 799 %and = and <8 x i32> %not, %y 800 ret <8 x i32> %and 801} 802 803define <16 x i16> @not_signbit_mask_v16i16(<16 x i16> %x, <16 x i16> %y) { 804; SSE-LABEL: not_signbit_mask_v16i16: 805; SSE: # %bb.0: 806; SSE-NEXT: pcmpeqd %xmm4, %xmm4 807; SSE-NEXT: pcmpgtw %xmm4, %xmm1 808; SSE-NEXT: pcmpgtw %xmm4, %xmm0 809; SSE-NEXT: pand %xmm2, %xmm0 810; SSE-NEXT: pand %xmm3, %xmm1 811; SSE-NEXT: retq 812; 813; AVX1-LABEL: not_signbit_mask_v16i16: 814; AVX1: # %bb.0: 815; AVX1-NEXT: vpsraw $15, %xmm0, %xmm2 816; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 817; AVX1-NEXT: vpsraw $15, %xmm0, %xmm0 818; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0 819; AVX1-NEXT: vandnps %ymm1, %ymm0, %ymm0 820; AVX1-NEXT: retq 821; 822; AVX2-LABEL: not_signbit_mask_v16i16: 823; AVX2: # %bb.0: 824; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 825; AVX2-NEXT: vpcmpgtw %ymm2, %ymm0, %ymm0 826; AVX2-NEXT: vpand %ymm0, %ymm1, %ymm0 827; AVX2-NEXT: retq 828; 829; AVX512-LABEL: not_signbit_mask_v16i16: 830; AVX512: # %bb.0: 831; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 832; AVX512-NEXT: vpcmpgtw %ymm2, %ymm0, %ymm0 833; AVX512-NEXT: vpand %ymm0, %ymm1, %ymm0 834; AVX512-NEXT: retq 835 %sh = ashr <16 x i16> %x, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15> 836 %not = xor <16 x i16> %sh, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 837 %and = and <16 x i16> %y, %not 838 ret <16 x i16> %and 839} 840 841define <32 x i8> @not_signbit_mask_v32i8(<32 x i8> %x, <32 x i8> %y) { 842; SSE-LABEL: not_signbit_mask_v32i8: 843; SSE: # %bb.0: 844; SSE-NEXT: pcmpeqd %xmm4, %xmm4 845; SSE-NEXT: pcmpgtb %xmm4, %xmm1 846; SSE-NEXT: pcmpgtb %xmm4, %xmm0 847; SSE-NEXT: pand %xmm2, %xmm0 848; SSE-NEXT: pand %xmm3, %xmm1 849; SSE-NEXT: retq 850; 851; AVX1-LABEL: not_signbit_mask_v32i8: 852; AVX1: # %bb.0: 853; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 854; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 855; AVX1-NEXT: vpcmpgtb %xmm2, %xmm3, %xmm2 856; AVX1-NEXT: vpcmpgtb %xmm0, %xmm3, %xmm0 857; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 858; AVX1-NEXT: vandnps %ymm1, %ymm0, %ymm0 859; AVX1-NEXT: retq 860; 861; AVX2-LABEL: not_signbit_mask_v32i8: 862; AVX2: # %bb.0: 863; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 864; AVX2-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0 865; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 866; AVX2-NEXT: retq 867; 868; AVX512-LABEL: not_signbit_mask_v32i8: 869; AVX512: # %bb.0: 870; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 871; AVX512-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0 872; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0 873; AVX512-NEXT: retq 874 %sh = ashr <32 x i8> %x, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7> 875 %not = xor <32 x i8> %sh, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 876 %and = and <32 x i8> %not, %y 877 ret <32 x i8> %and 878} 879 880define <2 x i64> @ispositive_mask_v2i64(<2 x i64> %x, <2 x i64> %y) { 881; SSE2-LABEL: ispositive_mask_v2i64: 882; SSE2: # %bb.0: 883; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 884; SSE2-NEXT: pcmpeqd %xmm2, %xmm2 885; SSE2-NEXT: pcmpgtd %xmm2, %xmm0 886; SSE2-NEXT: pand %xmm1, %xmm0 887; SSE2-NEXT: retq 888; 889; SSE42-LABEL: ispositive_mask_v2i64: 890; SSE42: # %bb.0: 891; SSE42-NEXT: pcmpeqd %xmm2, %xmm2 892; SSE42-NEXT: pcmpgtq %xmm2, %xmm0 893; SSE42-NEXT: pand %xmm1, %xmm0 894; SSE42-NEXT: retq 895; 896; AVX-LABEL: ispositive_mask_v2i64: 897; AVX: # %bb.0: 898; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 899; AVX-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm0 900; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0 901; AVX-NEXT: retq 902 %cmp = icmp sgt <2 x i64> %x, <i64 -1, i64 -1> 903 %mask = sext <2 x i1> %cmp to <2 x i64> 904 %and = and <2 x i64> %mask, %y 905 ret <2 x i64> %and 906} 907 908define <4 x i32> @is_positive_mask_v4i32(<4 x i32> %x, <4 x i32> %y) { 909; SSE-LABEL: is_positive_mask_v4i32: 910; SSE: # %bb.0: 911; SSE-NEXT: pcmpeqd %xmm2, %xmm2 912; SSE-NEXT: pcmpgtd %xmm2, %xmm0 913; SSE-NEXT: pand %xmm1, %xmm0 914; SSE-NEXT: retq 915; 916; AVX-LABEL: is_positive_mask_v4i32: 917; AVX: # %bb.0: 918; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 919; AVX-NEXT: vpcmpgtd %xmm2, %xmm0, %xmm0 920; AVX-NEXT: vpand %xmm0, %xmm1, %xmm0 921; AVX-NEXT: retq 922 %cmp = icmp sgt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> 923 %mask = sext <4 x i1> %cmp to <4 x i32> 924 %and = and <4 x i32> %y, %mask 925 ret <4 x i32> %and 926} 927 928define <8 x i16> @is_positive_mask_v8i16(<8 x i16> %x, <8 x i16> %y) { 929; SSE-LABEL: is_positive_mask_v8i16: 930; SSE: # %bb.0: 931; SSE-NEXT: pcmpeqd %xmm2, %xmm2 932; SSE-NEXT: pcmpgtw %xmm2, %xmm0 933; SSE-NEXT: pand %xmm1, %xmm0 934; SSE-NEXT: retq 935; 936; AVX-LABEL: is_positive_mask_v8i16: 937; AVX: # %bb.0: 938; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 939; AVX-NEXT: vpcmpgtw %xmm2, %xmm0, %xmm0 940; AVX-NEXT: vpand %xmm1, %xmm0, %xmm0 941; AVX-NEXT: retq 942 %cmp = icmp sgt <8 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 943 %mask = sext <8 x i1> %cmp to <8 x i16> 944 %and = and <8 x i16> %mask, %y 945 ret <8 x i16> %and 946} 947 948define <16 x i8> @is_positive_mask_v16i8(<16 x i8> %x, <16 x i8> %y) { 949; SSE-LABEL: is_positive_mask_v16i8: 950; SSE: # %bb.0: 951; SSE-NEXT: pcmpeqd %xmm2, %xmm2 952; SSE-NEXT: pcmpgtb %xmm2, %xmm0 953; SSE-NEXT: pand %xmm1, %xmm0 954; SSE-NEXT: retq 955; 956; AVX-LABEL: is_positive_mask_v16i8: 957; AVX: # %bb.0: 958; AVX-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 959; AVX-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0 960; AVX-NEXT: vpand %xmm0, %xmm1, %xmm0 961; AVX-NEXT: retq 962 %cmp = icmp sgt <16 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 963 %mask = sext <16 x i1> %cmp to <16 x i8> 964 %and = and <16 x i8> %y, %mask 965 ret <16 x i8> %and 966} 967 968define <4 x i64> @is_positive_mask_v4i64(<4 x i64> %x, <4 x i64> %y) { 969; SSE2-LABEL: is_positive_mask_v4i64: 970; SSE2: # %bb.0: 971; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 972; SSE2-NEXT: pcmpeqd %xmm4, %xmm4 973; SSE2-NEXT: pcmpgtd %xmm4, %xmm1 974; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 975; SSE2-NEXT: pcmpgtd %xmm4, %xmm0 976; SSE2-NEXT: pand %xmm2, %xmm0 977; SSE2-NEXT: pand %xmm3, %xmm1 978; SSE2-NEXT: retq 979; 980; SSE42-LABEL: is_positive_mask_v4i64: 981; SSE42: # %bb.0: 982; SSE42-NEXT: pcmpeqd %xmm4, %xmm4 983; SSE42-NEXT: pcmpgtq %xmm4, %xmm1 984; SSE42-NEXT: pcmpgtq %xmm4, %xmm0 985; SSE42-NEXT: pand %xmm2, %xmm0 986; SSE42-NEXT: pand %xmm3, %xmm1 987; SSE42-NEXT: retq 988; 989; AVX1-LABEL: is_positive_mask_v4i64: 990; AVX1: # %bb.0: 991; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 992; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 993; AVX1-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2 994; AVX1-NEXT: vpcmpgtq %xmm3, %xmm0, %xmm0 995; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 996; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 997; AVX1-NEXT: retq 998; 999; AVX2-LABEL: is_positive_mask_v4i64: 1000; AVX2: # %bb.0: 1001; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1002; AVX2-NEXT: vpcmpgtq %ymm2, %ymm0, %ymm0 1003; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 1004; AVX2-NEXT: retq 1005; 1006; AVX512-LABEL: is_positive_mask_v4i64: 1007; AVX512: # %bb.0: 1008; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1009; AVX512-NEXT: vpcmpgtq %ymm2, %ymm0, %ymm0 1010; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0 1011; AVX512-NEXT: retq 1012 %cmp = icmp sgt <4 x i64> %x, <i64 -1, i64 -1, i64 -1, i64 -1> 1013 %mask = sext <4 x i1> %cmp to <4 x i64> 1014 %and = and <4 x i64> %mask, %y 1015 ret <4 x i64> %and 1016} 1017 1018define <8 x i32> @is_positive_mask_v8i32(<8 x i32> %x, <8 x i32> %y) { 1019; SSE-LABEL: is_positive_mask_v8i32: 1020; SSE: # %bb.0: 1021; SSE-NEXT: pcmpeqd %xmm4, %xmm4 1022; SSE-NEXT: pcmpgtd %xmm4, %xmm1 1023; SSE-NEXT: pcmpgtd %xmm4, %xmm0 1024; SSE-NEXT: pand %xmm2, %xmm0 1025; SSE-NEXT: pand %xmm3, %xmm1 1026; SSE-NEXT: retq 1027; 1028; AVX1-LABEL: is_positive_mask_v8i32: 1029; AVX1: # %bb.0: 1030; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1031; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 1032; AVX1-NEXT: vpcmpgtd %xmm3, %xmm2, %xmm2 1033; AVX1-NEXT: vpcmpgtd %xmm3, %xmm0, %xmm0 1034; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1035; AVX1-NEXT: vandps %ymm0, %ymm1, %ymm0 1036; AVX1-NEXT: retq 1037; 1038; AVX2-LABEL: is_positive_mask_v8i32: 1039; AVX2: # %bb.0: 1040; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1041; AVX2-NEXT: vpcmpgtd %ymm2, %ymm0, %ymm0 1042; AVX2-NEXT: vpand %ymm0, %ymm1, %ymm0 1043; AVX2-NEXT: retq 1044; 1045; AVX512-LABEL: is_positive_mask_v8i32: 1046; AVX512: # %bb.0: 1047; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1048; AVX512-NEXT: vpcmpgtd %ymm2, %ymm0, %ymm0 1049; AVX512-NEXT: vpand %ymm0, %ymm1, %ymm0 1050; AVX512-NEXT: retq 1051 %cmp = icmp sgt <8 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 1052 %mask = sext <8 x i1> %cmp to <8 x i32> 1053 %and = and <8 x i32> %y, %mask 1054 ret <8 x i32> %and 1055} 1056 1057define <16 x i16> @is_positive_mask_v16i16(<16 x i16> %x, <16 x i16> %y) { 1058; SSE-LABEL: is_positive_mask_v16i16: 1059; SSE: # %bb.0: 1060; SSE-NEXT: pcmpeqd %xmm4, %xmm4 1061; SSE-NEXT: pcmpgtw %xmm4, %xmm1 1062; SSE-NEXT: pcmpgtw %xmm4, %xmm0 1063; SSE-NEXT: pand %xmm2, %xmm0 1064; SSE-NEXT: pand %xmm3, %xmm1 1065; SSE-NEXT: retq 1066; 1067; AVX1-LABEL: is_positive_mask_v16i16: 1068; AVX1: # %bb.0: 1069; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1070; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 1071; AVX1-NEXT: vpcmpgtw %xmm3, %xmm2, %xmm2 1072; AVX1-NEXT: vpcmpgtw %xmm3, %xmm0, %xmm0 1073; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1074; AVX1-NEXT: vandps %ymm1, %ymm0, %ymm0 1075; AVX1-NEXT: retq 1076; 1077; AVX2-LABEL: is_positive_mask_v16i16: 1078; AVX2: # %bb.0: 1079; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1080; AVX2-NEXT: vpcmpgtw %ymm2, %ymm0, %ymm0 1081; AVX2-NEXT: vpand %ymm1, %ymm0, %ymm0 1082; AVX2-NEXT: retq 1083; 1084; AVX512-LABEL: is_positive_mask_v16i16: 1085; AVX512: # %bb.0: 1086; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1087; AVX512-NEXT: vpcmpgtw %ymm2, %ymm0, %ymm0 1088; AVX512-NEXT: vpand %ymm1, %ymm0, %ymm0 1089; AVX512-NEXT: retq 1090 %cmp = icmp sgt <16 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 1091 %mask = sext <16 x i1> %cmp to <16 x i16> 1092 %and = and <16 x i16> %mask, %y 1093 ret <16 x i16> %and 1094} 1095 1096define <32 x i8> @is_positive_mask_v32i8(<32 x i8> %x, <32 x i8> %y) { 1097; SSE-LABEL: is_positive_mask_v32i8: 1098; SSE: # %bb.0: 1099; SSE-NEXT: pcmpeqd %xmm4, %xmm4 1100; SSE-NEXT: pcmpgtb %xmm4, %xmm1 1101; SSE-NEXT: pcmpgtb %xmm4, %xmm0 1102; SSE-NEXT: pand %xmm2, %xmm0 1103; SSE-NEXT: pand %xmm3, %xmm1 1104; SSE-NEXT: retq 1105; 1106; AVX1-LABEL: is_positive_mask_v32i8: 1107; AVX1: # %bb.0: 1108; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1109; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 1110; AVX1-NEXT: vpcmpgtb %xmm3, %xmm2, %xmm2 1111; AVX1-NEXT: vpcmpgtb %xmm3, %xmm0, %xmm0 1112; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1113; AVX1-NEXT: vandps %ymm0, %ymm1, %ymm0 1114; AVX1-NEXT: retq 1115; 1116; AVX2-LABEL: is_positive_mask_v32i8: 1117; AVX2: # %bb.0: 1118; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1119; AVX2-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0 1120; AVX2-NEXT: vpand %ymm0, %ymm1, %ymm0 1121; AVX2-NEXT: retq 1122; 1123; AVX512-LABEL: is_positive_mask_v32i8: 1124; AVX512: # %bb.0: 1125; AVX512-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1126; AVX512-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0 1127; AVX512-NEXT: vpand %ymm0, %ymm1, %ymm0 1128; AVX512-NEXT: retq 1129 %cmp = icmp sgt <32 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 1130 %mask = sext <32 x i1> %cmp to <32 x i8> 1131 %and = and <32 x i8> %y, %mask 1132 ret <32 x i8> %and 1133} 1134 1135define <2 x i64> @ispositive_mask_load_v2i64(<2 x i64> %x, <2 x i64>* %p) { 1136; SSE2-LABEL: ispositive_mask_load_v2i64: 1137; SSE2: # %bb.0: 1138; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1139; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 1140; SSE2-NEXT: pcmpgtd %xmm1, %xmm0 1141; SSE2-NEXT: pand (%rdi), %xmm0 1142; SSE2-NEXT: retq 1143; 1144; SSE42-LABEL: ispositive_mask_load_v2i64: 1145; SSE42: # %bb.0: 1146; SSE42-NEXT: pcmpeqd %xmm1, %xmm1 1147; SSE42-NEXT: pcmpgtq %xmm1, %xmm0 1148; SSE42-NEXT: pand (%rdi), %xmm0 1149; SSE42-NEXT: retq 1150; 1151; AVX-LABEL: ispositive_mask_load_v2i64: 1152; AVX: # %bb.0: 1153; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 1154; AVX-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm0 1155; AVX-NEXT: vpand (%rdi), %xmm0, %xmm0 1156; AVX-NEXT: retq 1157 %cmp = icmp sgt <2 x i64> %x, <i64 -1, i64 -1> 1158 %mask = sext <2 x i1> %cmp to <2 x i64> 1159 %y = load <2 x i64>, <2 x i64>* %p 1160 %and = and <2 x i64> %mask, %y 1161 ret <2 x i64> %and 1162} 1163 1164define <4 x i32> @is_positive_mask_load_v4i32(<4 x i32> %x, <4 x i32>* %p) { 1165; SSE-LABEL: is_positive_mask_load_v4i32: 1166; SSE: # %bb.0: 1167; SSE-NEXT: pcmpeqd %xmm1, %xmm1 1168; SSE-NEXT: pcmpgtd %xmm1, %xmm0 1169; SSE-NEXT: pand (%rdi), %xmm0 1170; SSE-NEXT: retq 1171; 1172; AVX-LABEL: is_positive_mask_load_v4i32: 1173; AVX: # %bb.0: 1174; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 1175; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0 1176; AVX-NEXT: vpand (%rdi), %xmm0, %xmm0 1177; AVX-NEXT: retq 1178 %cmp = icmp sgt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> 1179 %mask = sext <4 x i1> %cmp to <4 x i32> 1180 %y = load <4 x i32>, <4 x i32>* %p 1181 %and = and <4 x i32> %y, %mask 1182 ret <4 x i32> %and 1183} 1184 1185define <8 x i16> @is_positive_mask_load_v8i16(<8 x i16> %x, <8 x i16>* %p) { 1186; SSE-LABEL: is_positive_mask_load_v8i16: 1187; SSE: # %bb.0: 1188; SSE-NEXT: pcmpeqd %xmm1, %xmm1 1189; SSE-NEXT: pcmpgtw %xmm1, %xmm0 1190; SSE-NEXT: pand (%rdi), %xmm0 1191; SSE-NEXT: retq 1192; 1193; AVX-LABEL: is_positive_mask_load_v8i16: 1194; AVX: # %bb.0: 1195; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 1196; AVX-NEXT: vpcmpgtw %xmm1, %xmm0, %xmm0 1197; AVX-NEXT: vpand (%rdi), %xmm0, %xmm0 1198; AVX-NEXT: retq 1199 %cmp = icmp sgt <8 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 1200 %mask = sext <8 x i1> %cmp to <8 x i16> 1201 %y = load <8 x i16>, <8 x i16>* %p 1202 %and = and <8 x i16> %mask, %y 1203 ret <8 x i16> %and 1204} 1205 1206define <16 x i8> @is_positive_mask_load_v16i8(<16 x i8> %x, <16 x i8>* %p) { 1207; SSE-LABEL: is_positive_mask_load_v16i8: 1208; SSE: # %bb.0: 1209; SSE-NEXT: pcmpeqd %xmm1, %xmm1 1210; SSE-NEXT: pcmpgtb %xmm1, %xmm0 1211; SSE-NEXT: pand (%rdi), %xmm0 1212; SSE-NEXT: retq 1213; 1214; AVX-LABEL: is_positive_mask_load_v16i8: 1215; AVX: # %bb.0: 1216; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 1217; AVX-NEXT: vpcmpgtb %xmm1, %xmm0, %xmm0 1218; AVX-NEXT: vpand (%rdi), %xmm0, %xmm0 1219; AVX-NEXT: retq 1220 %cmp = icmp sgt <16 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 1221 %mask = sext <16 x i1> %cmp to <16 x i8> 1222 %y = load <16 x i8>, <16 x i8>* %p 1223 %and = and <16 x i8> %y, %mask 1224 ret <16 x i8> %and 1225} 1226 1227define <4 x i64> @is_positive_mask_load_v4i64(<4 x i64> %x, <4 x i64>* %p) { 1228; SSE2-LABEL: is_positive_mask_load_v4i64: 1229; SSE2: # %bb.0: 1230; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3] 1231; SSE2-NEXT: pcmpeqd %xmm2, %xmm2 1232; SSE2-NEXT: pcmpgtd %xmm2, %xmm1 1233; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1234; SSE2-NEXT: pcmpgtd %xmm2, %xmm0 1235; SSE2-NEXT: pand (%rdi), %xmm0 1236; SSE2-NEXT: pand 16(%rdi), %xmm1 1237; SSE2-NEXT: retq 1238; 1239; SSE42-LABEL: is_positive_mask_load_v4i64: 1240; SSE42: # %bb.0: 1241; SSE42-NEXT: pcmpeqd %xmm2, %xmm2 1242; SSE42-NEXT: pcmpgtq %xmm2, %xmm1 1243; SSE42-NEXT: pcmpgtq %xmm2, %xmm0 1244; SSE42-NEXT: pand (%rdi), %xmm0 1245; SSE42-NEXT: pand 16(%rdi), %xmm1 1246; SSE42-NEXT: retq 1247; 1248; AVX1-LABEL: is_positive_mask_load_v4i64: 1249; AVX1: # %bb.0: 1250; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 1251; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1252; AVX1-NEXT: vpcmpgtq %xmm2, %xmm1, %xmm1 1253; AVX1-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm0 1254; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 1255; AVX1-NEXT: vandps (%rdi), %ymm0, %ymm0 1256; AVX1-NEXT: retq 1257; 1258; AVX2-LABEL: is_positive_mask_load_v4i64: 1259; AVX2: # %bb.0: 1260; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1261; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0 1262; AVX2-NEXT: vpand (%rdi), %ymm0, %ymm0 1263; AVX2-NEXT: retq 1264; 1265; AVX512-LABEL: is_positive_mask_load_v4i64: 1266; AVX512: # %bb.0: 1267; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1268; AVX512-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm0 1269; AVX512-NEXT: vpand (%rdi), %ymm0, %ymm0 1270; AVX512-NEXT: retq 1271 %cmp = icmp sgt <4 x i64> %x, <i64 -1, i64 -1, i64 -1, i64 -1> 1272 %mask = sext <4 x i1> %cmp to <4 x i64> 1273 %y = load <4 x i64>, <4 x i64>* %p 1274 %and = and <4 x i64> %mask, %y 1275 ret <4 x i64> %and 1276} 1277 1278define <8 x i32> @is_positive_mask_load_v8i32(<8 x i32> %x, <8 x i32>* %p) { 1279; SSE-LABEL: is_positive_mask_load_v8i32: 1280; SSE: # %bb.0: 1281; SSE-NEXT: pcmpeqd %xmm2, %xmm2 1282; SSE-NEXT: pcmpgtd %xmm2, %xmm1 1283; SSE-NEXT: pcmpgtd %xmm2, %xmm0 1284; SSE-NEXT: pand (%rdi), %xmm0 1285; SSE-NEXT: pand 16(%rdi), %xmm1 1286; SSE-NEXT: retq 1287; 1288; AVX1-LABEL: is_positive_mask_load_v8i32: 1289; AVX1: # %bb.0: 1290; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 1291; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1292; AVX1-NEXT: vpcmpgtd %xmm2, %xmm1, %xmm1 1293; AVX1-NEXT: vpcmpgtd %xmm2, %xmm0, %xmm0 1294; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 1295; AVX1-NEXT: vandps (%rdi), %ymm0, %ymm0 1296; AVX1-NEXT: retq 1297; 1298; AVX2-LABEL: is_positive_mask_load_v8i32: 1299; AVX2: # %bb.0: 1300; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1301; AVX2-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 1302; AVX2-NEXT: vpand (%rdi), %ymm0, %ymm0 1303; AVX2-NEXT: retq 1304; 1305; AVX512-LABEL: is_positive_mask_load_v8i32: 1306; AVX512: # %bb.0: 1307; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1308; AVX512-NEXT: vpcmpgtd %ymm1, %ymm0, %ymm0 1309; AVX512-NEXT: vpand (%rdi), %ymm0, %ymm0 1310; AVX512-NEXT: retq 1311 %cmp = icmp sgt <8 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 1312 %mask = sext <8 x i1> %cmp to <8 x i32> 1313 %y = load <8 x i32>, <8 x i32>* %p 1314 %and = and <8 x i32> %y, %mask 1315 ret <8 x i32> %and 1316} 1317 1318define <16 x i16> @is_positive_mask_load_v16i16(<16 x i16> %x, <16 x i16>* %p) { 1319; SSE-LABEL: is_positive_mask_load_v16i16: 1320; SSE: # %bb.0: 1321; SSE-NEXT: pcmpeqd %xmm2, %xmm2 1322; SSE-NEXT: pcmpgtw %xmm2, %xmm1 1323; SSE-NEXT: pcmpgtw %xmm2, %xmm0 1324; SSE-NEXT: pand (%rdi), %xmm0 1325; SSE-NEXT: pand 16(%rdi), %xmm1 1326; SSE-NEXT: retq 1327; 1328; AVX1-LABEL: is_positive_mask_load_v16i16: 1329; AVX1: # %bb.0: 1330; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 1331; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1332; AVX1-NEXT: vpcmpgtw %xmm2, %xmm1, %xmm1 1333; AVX1-NEXT: vpcmpgtw %xmm2, %xmm0, %xmm0 1334; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 1335; AVX1-NEXT: vandps (%rdi), %ymm0, %ymm0 1336; AVX1-NEXT: retq 1337; 1338; AVX2-LABEL: is_positive_mask_load_v16i16: 1339; AVX2: # %bb.0: 1340; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1341; AVX2-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 1342; AVX2-NEXT: vpand (%rdi), %ymm0, %ymm0 1343; AVX2-NEXT: retq 1344; 1345; AVX512-LABEL: is_positive_mask_load_v16i16: 1346; AVX512: # %bb.0: 1347; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1348; AVX512-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 1349; AVX512-NEXT: vpand (%rdi), %ymm0, %ymm0 1350; AVX512-NEXT: retq 1351 %cmp = icmp sgt <16 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 1352 %mask = sext <16 x i1> %cmp to <16 x i16> 1353 %y = load <16 x i16>, <16 x i16>* %p 1354 %and = and <16 x i16> %mask, %y 1355 ret <16 x i16> %and 1356} 1357 1358define <32 x i8> @is_positive_mask_load_v32i8(<32 x i8> %x, <32 x i8>* %p) { 1359; SSE-LABEL: is_positive_mask_load_v32i8: 1360; SSE: # %bb.0: 1361; SSE-NEXT: pcmpeqd %xmm2, %xmm2 1362; SSE-NEXT: pcmpgtb %xmm2, %xmm1 1363; SSE-NEXT: pcmpgtb %xmm2, %xmm0 1364; SSE-NEXT: pand (%rdi), %xmm0 1365; SSE-NEXT: pand 16(%rdi), %xmm1 1366; SSE-NEXT: retq 1367; 1368; AVX1-LABEL: is_positive_mask_load_v32i8: 1369; AVX1: # %bb.0: 1370; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 1371; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1372; AVX1-NEXT: vpcmpgtb %xmm2, %xmm1, %xmm1 1373; AVX1-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0 1374; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 1375; AVX1-NEXT: vandps (%rdi), %ymm0, %ymm0 1376; AVX1-NEXT: retq 1377; 1378; AVX2-LABEL: is_positive_mask_load_v32i8: 1379; AVX2: # %bb.0: 1380; AVX2-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1381; AVX2-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0 1382; AVX2-NEXT: vpand (%rdi), %ymm0, %ymm0 1383; AVX2-NEXT: retq 1384; 1385; AVX512-LABEL: is_positive_mask_load_v32i8: 1386; AVX512: # %bb.0: 1387; AVX512-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1388; AVX512-NEXT: vpcmpgtb %ymm1, %ymm0, %ymm0 1389; AVX512-NEXT: vpand (%rdi), %ymm0, %ymm0 1390; AVX512-NEXT: retq 1391 %cmp = icmp sgt <32 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 1392 %mask = sext <32 x i1> %cmp to <32 x i8> 1393 %y = load <32 x i8>, <32 x i8>* %p 1394 %and = and <32 x i8> %y, %mask 1395 ret <32 x i8> %and 1396} 1397 1398define <2 x i1> @ispositive_mask_v2i64_v2i1(<2 x i64> %x, <2 x i1> %y) { 1399; SSE2-LABEL: ispositive_mask_v2i64_v2i1: 1400; SSE2: # %bb.0: 1401; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,3,3] 1402; SSE2-NEXT: pcmpeqd %xmm2, %xmm2 1403; SSE2-NEXT: pcmpgtd %xmm2, %xmm0 1404; SSE2-NEXT: pand %xmm1, %xmm0 1405; SSE2-NEXT: retq 1406; 1407; SSE42-LABEL: ispositive_mask_v2i64_v2i1: 1408; SSE42: # %bb.0: 1409; SSE42-NEXT: pcmpeqd %xmm2, %xmm2 1410; SSE42-NEXT: pcmpgtq %xmm2, %xmm0 1411; SSE42-NEXT: pand %xmm1, %xmm0 1412; SSE42-NEXT: retq 1413; 1414; AVX1-LABEL: ispositive_mask_v2i64_v2i1: 1415; AVX1: # %bb.0: 1416; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1417; AVX1-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm0 1418; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 1419; AVX1-NEXT: retq 1420; 1421; AVX2-LABEL: ispositive_mask_v2i64_v2i1: 1422; AVX2: # %bb.0: 1423; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1424; AVX2-NEXT: vpcmpgtq %xmm2, %xmm0, %xmm0 1425; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 1426; AVX2-NEXT: retq 1427; 1428; AVX512F-LABEL: ispositive_mask_v2i64_v2i1: 1429; AVX512F: # %bb.0: 1430; AVX512F-NEXT: vpsllq $63, %xmm1, %xmm1 1431; AVX512F-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1432; AVX512F-NEXT: vpcmpgtq %xmm2, %xmm0, %k1 1433; AVX512F-NEXT: vptestmq %xmm1, %xmm1, %k1 {%k1} 1434; AVX512F-NEXT: vmovdqa64 %xmm2, %xmm0 {%k1} {z} 1435; AVX512F-NEXT: retq 1436; 1437; AVX512DQBW-LABEL: ispositive_mask_v2i64_v2i1: 1438; AVX512DQBW: # %bb.0: 1439; AVX512DQBW-NEXT: vpsllq $63, %xmm1, %xmm1 1440; AVX512DQBW-NEXT: vpxor %xmm2, %xmm2, %xmm2 1441; AVX512DQBW-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 1442; AVX512DQBW-NEXT: vpcmpgtq %xmm3, %xmm0, %k1 1443; AVX512DQBW-NEXT: vpcmpgtq %xmm1, %xmm2, %k0 {%k1} 1444; AVX512DQBW-NEXT: vpmovm2q %k0, %xmm0 1445; AVX512DQBW-NEXT: retq 1446 %cmp = icmp sgt <2 x i64> %x, <i64 -1, i64 -1> 1447 %and = and <2 x i1> %cmp, %y 1448 ret <2 x i1> %and 1449} 1450 1451define <4 x i1> @is_positive_mask_v4i32_v4i1(<4 x i32> %x, <4 x i1> %y) { 1452; SSE-LABEL: is_positive_mask_v4i32_v4i1: 1453; SSE: # %bb.0: 1454; SSE-NEXT: pcmpeqd %xmm2, %xmm2 1455; SSE-NEXT: pcmpgtd %xmm2, %xmm0 1456; SSE-NEXT: pand %xmm1, %xmm0 1457; SSE-NEXT: retq 1458; 1459; AVX1-LABEL: is_positive_mask_v4i32_v4i1: 1460; AVX1: # %bb.0: 1461; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1462; AVX1-NEXT: vpcmpgtd %xmm2, %xmm0, %xmm0 1463; AVX1-NEXT: vpand %xmm0, %xmm1, %xmm0 1464; AVX1-NEXT: retq 1465; 1466; AVX2-LABEL: is_positive_mask_v4i32_v4i1: 1467; AVX2: # %bb.0: 1468; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1469; AVX2-NEXT: vpcmpgtd %xmm2, %xmm0, %xmm0 1470; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0 1471; AVX2-NEXT: retq 1472; 1473; AVX512F-LABEL: is_positive_mask_v4i32_v4i1: 1474; AVX512F: # %bb.0: 1475; AVX512F-NEXT: vpslld $31, %xmm1, %xmm1 1476; AVX512F-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1477; AVX512F-NEXT: vpcmpgtd %xmm2, %xmm0, %k1 1478; AVX512F-NEXT: vptestmd %xmm1, %xmm1, %k1 {%k1} 1479; AVX512F-NEXT: vmovdqa32 %xmm2, %xmm0 {%k1} {z} 1480; AVX512F-NEXT: retq 1481; 1482; AVX512DQBW-LABEL: is_positive_mask_v4i32_v4i1: 1483; AVX512DQBW: # %bb.0: 1484; AVX512DQBW-NEXT: vpslld $31, %xmm1, %xmm1 1485; AVX512DQBW-NEXT: vpmovd2m %xmm1, %k1 1486; AVX512DQBW-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 1487; AVX512DQBW-NEXT: vpcmpgtd %xmm1, %xmm0, %k0 {%k1} 1488; AVX512DQBW-NEXT: vpmovm2d %k0, %xmm0 1489; AVX512DQBW-NEXT: retq 1490 %cmp = icmp sgt <4 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1> 1491 %and = and <4 x i1> %y, %cmp 1492 ret <4 x i1> %and 1493} 1494 1495define <8 x i1> @is_positive_mask_v8i16_v8i1(<8 x i16> %x, <8 x i1> %y) { 1496; SSE-LABEL: is_positive_mask_v8i16_v8i1: 1497; SSE: # %bb.0: 1498; SSE-NEXT: pcmpeqd %xmm2, %xmm2 1499; SSE-NEXT: pcmpgtw %xmm2, %xmm0 1500; SSE-NEXT: pand %xmm1, %xmm0 1501; SSE-NEXT: retq 1502; 1503; AVX1-LABEL: is_positive_mask_v8i16_v8i1: 1504; AVX1: # %bb.0: 1505; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1506; AVX1-NEXT: vpcmpgtw %xmm2, %xmm0, %xmm0 1507; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 1508; AVX1-NEXT: retq 1509; 1510; AVX2-LABEL: is_positive_mask_v8i16_v8i1: 1511; AVX2: # %bb.0: 1512; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1513; AVX2-NEXT: vpcmpgtw %xmm2, %xmm0, %xmm0 1514; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 1515; AVX2-NEXT: retq 1516; 1517; AVX512F-LABEL: is_positive_mask_v8i16_v8i1: 1518; AVX512F: # %bb.0: 1519; AVX512F-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1520; AVX512F-NEXT: vpcmpgtw %xmm2, %xmm0, %xmm0 1521; AVX512F-NEXT: vpand %xmm1, %xmm0, %xmm0 1522; AVX512F-NEXT: retq 1523; 1524; AVX512DQBW-LABEL: is_positive_mask_v8i16_v8i1: 1525; AVX512DQBW: # %bb.0: 1526; AVX512DQBW-NEXT: vpsllw $15, %xmm1, %xmm1 1527; AVX512DQBW-NEXT: vpxor %xmm2, %xmm2, %xmm2 1528; AVX512DQBW-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 1529; AVX512DQBW-NEXT: vpcmpgtw %xmm3, %xmm0, %k1 1530; AVX512DQBW-NEXT: vpcmpgtw %xmm1, %xmm2, %k0 {%k1} 1531; AVX512DQBW-NEXT: vpmovm2w %k0, %xmm0 1532; AVX512DQBW-NEXT: retq 1533 %cmp = icmp sgt <8 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 1534 %and = and <8 x i1> %cmp, %y 1535 ret <8 x i1> %and 1536} 1537 1538define <16 x i1> @is_positive_mask_v16i8_v16i1(<16 x i8> %x, <16 x i1> %y) { 1539; SSE-LABEL: is_positive_mask_v16i8_v16i1: 1540; SSE: # %bb.0: 1541; SSE-NEXT: pcmpeqd %xmm2, %xmm2 1542; SSE-NEXT: pcmpgtb %xmm2, %xmm0 1543; SSE-NEXT: pand %xmm1, %xmm0 1544; SSE-NEXT: retq 1545; 1546; AVX1-LABEL: is_positive_mask_v16i8_v16i1: 1547; AVX1: # %bb.0: 1548; AVX1-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1549; AVX1-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0 1550; AVX1-NEXT: vpand %xmm0, %xmm1, %xmm0 1551; AVX1-NEXT: retq 1552; 1553; AVX2-LABEL: is_positive_mask_v16i8_v16i1: 1554; AVX2: # %bb.0: 1555; AVX2-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1556; AVX2-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0 1557; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0 1558; AVX2-NEXT: retq 1559; 1560; AVX512F-LABEL: is_positive_mask_v16i8_v16i1: 1561; AVX512F: # %bb.0: 1562; AVX512F-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2 1563; AVX512F-NEXT: vpcmpgtb %xmm2, %xmm0, %xmm0 1564; AVX512F-NEXT: vpand %xmm0, %xmm1, %xmm0 1565; AVX512F-NEXT: retq 1566; 1567; AVX512DQBW-LABEL: is_positive_mask_v16i8_v16i1: 1568; AVX512DQBW: # %bb.0: 1569; AVX512DQBW-NEXT: vpsllw $7, %xmm1, %xmm1 1570; AVX512DQBW-NEXT: vpmovb2m %xmm1, %k1 1571; AVX512DQBW-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1 1572; AVX512DQBW-NEXT: vpcmpgtb %xmm1, %xmm0, %k0 {%k1} 1573; AVX512DQBW-NEXT: vpmovm2b %k0, %xmm0 1574; AVX512DQBW-NEXT: retq 1575 %cmp = icmp sgt <16 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 1576 %and = and <16 x i1> %y, %cmp 1577 ret <16 x i1> %and 1578} 1579 1580define <4 x i1> @is_positive_mask_v4i64_v4i1(<4 x i64> %x, <4 x i1> %y) { 1581; SSE2-LABEL: is_positive_mask_v4i64_v4i1: 1582; SSE2: # %bb.0: 1583; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[1,3],xmm1[1,3] 1584; SSE2-NEXT: pcmpeqd %xmm1, %xmm1 1585; SSE2-NEXT: pcmpgtd %xmm1, %xmm0 1586; SSE2-NEXT: pand %xmm2, %xmm0 1587; SSE2-NEXT: retq 1588; 1589; SSE42-LABEL: is_positive_mask_v4i64_v4i1: 1590; SSE42: # %bb.0: 1591; SSE42-NEXT: pcmpeqd %xmm3, %xmm3 1592; SSE42-NEXT: pcmpgtq %xmm3, %xmm1 1593; SSE42-NEXT: pcmpgtq %xmm3, %xmm0 1594; SSE42-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] 1595; SSE42-NEXT: andps %xmm2, %xmm0 1596; SSE42-NEXT: retq 1597; 1598; AVX1-LABEL: is_positive_mask_v4i64_v4i1: 1599; AVX1: # %bb.0: 1600; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1601; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 1602; AVX1-NEXT: vpcmpgtq %xmm3, %xmm2, %xmm2 1603; AVX1-NEXT: vpcmpgtq %xmm3, %xmm0, %xmm0 1604; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0 1605; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 1606; AVX1-NEXT: vzeroupper 1607; AVX1-NEXT: retq 1608; 1609; AVX2-LABEL: is_positive_mask_v4i64_v4i1: 1610; AVX2: # %bb.0: 1611; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1612; AVX2-NEXT: vpcmpgtq %ymm2, %ymm0, %ymm0 1613; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 1614; AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0 1615; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 1616; AVX2-NEXT: vzeroupper 1617; AVX2-NEXT: retq 1618; 1619; AVX512F-LABEL: is_positive_mask_v4i64_v4i1: 1620; AVX512F: # %bb.0: 1621; AVX512F-NEXT: vpslld $31, %xmm1, %xmm1 1622; AVX512F-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1623; AVX512F-NEXT: vpcmpgtq %ymm2, %ymm0, %k1 1624; AVX512F-NEXT: vptestmd %xmm1, %xmm1, %k1 {%k1} 1625; AVX512F-NEXT: vpcmpeqd %xmm0, %xmm0, %xmm0 1626; AVX512F-NEXT: vmovdqa32 %xmm0, %xmm0 {%k1} {z} 1627; AVX512F-NEXT: vzeroupper 1628; AVX512F-NEXT: retq 1629; 1630; AVX512DQBW-LABEL: is_positive_mask_v4i64_v4i1: 1631; AVX512DQBW: # %bb.0: 1632; AVX512DQBW-NEXT: vpslld $31, %xmm1, %xmm1 1633; AVX512DQBW-NEXT: vpxor %xmm2, %xmm2, %xmm2 1634; AVX512DQBW-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3 1635; AVX512DQBW-NEXT: vpcmpgtq %ymm3, %ymm0, %k1 1636; AVX512DQBW-NEXT: vpcmpgtd %xmm1, %xmm2, %k0 {%k1} 1637; AVX512DQBW-NEXT: vpmovm2d %k0, %xmm0 1638; AVX512DQBW-NEXT: vzeroupper 1639; AVX512DQBW-NEXT: retq 1640 %cmp = icmp sgt <4 x i64> %x, <i64 -1, i64 -1, i64 -1, i64 -1> 1641 %and = and <4 x i1> %cmp, %y 1642 ret <4 x i1> %and 1643} 1644 1645define <8 x i1> @is_positive_mask_v8i32_v8i1(<8 x i32> %x, <8 x i1> %y) { 1646; SSE-LABEL: is_positive_mask_v8i32_v8i1: 1647; SSE: # %bb.0: 1648; SSE-NEXT: pcmpeqd %xmm3, %xmm3 1649; SSE-NEXT: pcmpgtd %xmm3, %xmm1 1650; SSE-NEXT: pcmpgtd %xmm3, %xmm0 1651; SSE-NEXT: packssdw %xmm1, %xmm0 1652; SSE-NEXT: pand %xmm2, %xmm0 1653; SSE-NEXT: retq 1654; 1655; AVX1-LABEL: is_positive_mask_v8i32_v8i1: 1656; AVX1: # %bb.0: 1657; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1658; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 1659; AVX1-NEXT: vpcmpgtd %xmm3, %xmm2, %xmm2 1660; AVX1-NEXT: vpcmpgtd %xmm3, %xmm0, %xmm0 1661; AVX1-NEXT: vpackssdw %xmm2, %xmm0, %xmm0 1662; AVX1-NEXT: vpand %xmm0, %xmm1, %xmm0 1663; AVX1-NEXT: vzeroupper 1664; AVX1-NEXT: retq 1665; 1666; AVX2-LABEL: is_positive_mask_v8i32_v8i1: 1667; AVX2: # %bb.0: 1668; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1669; AVX2-NEXT: vpcmpgtd %ymm2, %ymm0, %ymm0 1670; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 1671; AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0 1672; AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0 1673; AVX2-NEXT: vzeroupper 1674; AVX2-NEXT: retq 1675; 1676; AVX512F-LABEL: is_positive_mask_v8i32_v8i1: 1677; AVX512F: # %bb.0: 1678; AVX512F-NEXT: vpmovsxwd %xmm1, %ymm1 1679; AVX512F-NEXT: vpslld $31, %ymm1, %ymm1 1680; AVX512F-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1681; AVX512F-NEXT: vpcmpgtd %ymm2, %ymm0, %k1 1682; AVX512F-NEXT: vptestmd %ymm1, %ymm1, %k1 {%k1} 1683; AVX512F-NEXT: vmovdqa32 %ymm2, %ymm0 {%k1} {z} 1684; AVX512F-NEXT: vpmovdw %ymm0, %xmm0 1685; AVX512F-NEXT: vzeroupper 1686; AVX512F-NEXT: retq 1687; 1688; AVX512DQBW-LABEL: is_positive_mask_v8i32_v8i1: 1689; AVX512DQBW: # %bb.0: 1690; AVX512DQBW-NEXT: vpsllw $15, %xmm1, %xmm1 1691; AVX512DQBW-NEXT: vpmovw2m %xmm1, %k1 1692; AVX512DQBW-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1693; AVX512DQBW-NEXT: vpcmpgtd %ymm1, %ymm0, %k0 {%k1} 1694; AVX512DQBW-NEXT: vpmovm2w %k0, %xmm0 1695; AVX512DQBW-NEXT: vzeroupper 1696; AVX512DQBW-NEXT: retq 1697 %cmp = icmp sgt <8 x i32> %x, <i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1, i32 -1> 1698 %and = and <8 x i1> %y, %cmp 1699 ret <8 x i1> %and 1700} 1701 1702define <16 x i1> @is_positive_mask_v16i16_v16i1(<16 x i16> %x, <16 x i1> %y) { 1703; SSE-LABEL: is_positive_mask_v16i16_v16i1: 1704; SSE: # %bb.0: 1705; SSE-NEXT: pcmpeqd %xmm3, %xmm3 1706; SSE-NEXT: pcmpgtw %xmm3, %xmm1 1707; SSE-NEXT: pcmpgtw %xmm3, %xmm0 1708; SSE-NEXT: packsswb %xmm1, %xmm0 1709; SSE-NEXT: pand %xmm2, %xmm0 1710; SSE-NEXT: retq 1711; 1712; AVX1-LABEL: is_positive_mask_v16i16_v16i1: 1713; AVX1: # %bb.0: 1714; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1715; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 1716; AVX1-NEXT: vpcmpgtw %xmm3, %xmm2, %xmm2 1717; AVX1-NEXT: vpcmpgtw %xmm3, %xmm0, %xmm0 1718; AVX1-NEXT: vpacksswb %xmm2, %xmm0, %xmm0 1719; AVX1-NEXT: vpand %xmm1, %xmm0, %xmm0 1720; AVX1-NEXT: vzeroupper 1721; AVX1-NEXT: retq 1722; 1723; AVX2-LABEL: is_positive_mask_v16i16_v16i1: 1724; AVX2: # %bb.0: 1725; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1726; AVX2-NEXT: vpcmpgtw %ymm2, %ymm0, %ymm0 1727; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm2 1728; AVX2-NEXT: vpacksswb %xmm2, %xmm0, %xmm0 1729; AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0 1730; AVX2-NEXT: vzeroupper 1731; AVX2-NEXT: retq 1732; 1733; AVX512F-LABEL: is_positive_mask_v16i16_v16i1: 1734; AVX512F: # %bb.0: 1735; AVX512F-NEXT: vpmovsxbd %xmm1, %zmm1 1736; AVX512F-NEXT: vpslld $31, %zmm1, %zmm1 1737; AVX512F-NEXT: vptestmd %zmm1, %zmm1, %k1 1738; AVX512F-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1739; AVX512F-NEXT: vpcmpgtw %ymm1, %ymm0, %ymm0 1740; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 1741; AVX512F-NEXT: vptestmd %zmm0, %zmm0, %k1 {%k1} 1742; AVX512F-NEXT: vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z} 1743; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 1744; AVX512F-NEXT: vzeroupper 1745; AVX512F-NEXT: retq 1746; 1747; AVX512DQBW-LABEL: is_positive_mask_v16i16_v16i1: 1748; AVX512DQBW: # %bb.0: 1749; AVX512DQBW-NEXT: vpsllw $7, %xmm1, %xmm1 1750; AVX512DQBW-NEXT: vpxor %xmm2, %xmm2, %xmm2 1751; AVX512DQBW-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3 1752; AVX512DQBW-NEXT: vpcmpgtw %ymm3, %ymm0, %k1 1753; AVX512DQBW-NEXT: vpcmpgtb %xmm1, %xmm2, %k0 {%k1} 1754; AVX512DQBW-NEXT: vpmovm2b %k0, %xmm0 1755; AVX512DQBW-NEXT: vzeroupper 1756; AVX512DQBW-NEXT: retq 1757 %cmp = icmp sgt <16 x i16> %x, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1> 1758 %and = and <16 x i1> %cmp, %y 1759 ret <16 x i1> %and 1760} 1761 1762define <32 x i1> @is_positive_mask_v32i8_v32i1(<32 x i8> %x, <32 x i1> %y) { 1763; SSE2-LABEL: is_positive_mask_v32i8_v32i1: 1764; SSE2: # %bb.0: 1765; SSE2-NEXT: movq %rdi, %rax 1766; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 1767; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1768; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 1769; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 1770; SSE2-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero 1771; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 1772; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3] 1773; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 1774; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1775; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 1776; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 1777; SSE2-NEXT: movd {{.*#+}} xmm5 = mem[0],zero,zero,zero 1778; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm2[0],xmm5[1],xmm2[1],xmm5[2],xmm2[2],xmm5[3],xmm2[3],xmm5[4],xmm2[4],xmm5[5],xmm2[5],xmm5[6],xmm2[6],xmm5[7],xmm2[7] 1779; SSE2-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3] 1780; SSE2-NEXT: punpckldq {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1] 1781; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 1782; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1783; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 1784; SSE2-NEXT: movd %r9d, %xmm4 1785; SSE2-NEXT: movd {{.*#+}} xmm2 = mem[0],zero,zero,zero 1786; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm2[0],xmm4[1],xmm2[1],xmm4[2],xmm2[2],xmm4[3],xmm2[3],xmm4[4],xmm2[4],xmm4[5],xmm2[5],xmm4[6],xmm2[6],xmm4[7],xmm2[7] 1787; SSE2-NEXT: punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3] 1788; SSE2-NEXT: movd %r8d, %xmm2 1789; SSE2-NEXT: movd %ecx, %xmm3 1790; SSE2-NEXT: punpcklbw {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1],xmm3[2],xmm2[2],xmm3[3],xmm2[3],xmm3[4],xmm2[4],xmm3[5],xmm2[5],xmm3[6],xmm2[6],xmm3[7],xmm2[7] 1791; SSE2-NEXT: movd %edx, %xmm6 1792; SSE2-NEXT: movd %esi, %xmm2 1793; SSE2-NEXT: punpcklbw {{.*#+}} xmm2 = xmm2[0],xmm6[0],xmm2[1],xmm6[1],xmm2[2],xmm6[2],xmm2[3],xmm6[3],xmm2[4],xmm6[4],xmm2[5],xmm6[5],xmm2[6],xmm6[6],xmm2[7],xmm6[7] 1794; SSE2-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1],xmm2[2],xmm3[2],xmm2[3],xmm3[3] 1795; SSE2-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1] 1796; SSE2-NEXT: punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm5[0] 1797; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1798; SSE2-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero 1799; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 1800; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1801; SSE2-NEXT: movd {{.*#+}} xmm5 = mem[0],zero,zero,zero 1802; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3],xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7] 1803; SSE2-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3] 1804; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1805; SSE2-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero 1806; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 1807; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1808; SSE2-NEXT: movd {{.*#+}} xmm6 = mem[0],zero,zero,zero 1809; SSE2-NEXT: punpcklbw {{.*#+}} xmm6 = xmm6[0],xmm3[0],xmm6[1],xmm3[1],xmm6[2],xmm3[2],xmm6[3],xmm3[3],xmm6[4],xmm3[4],xmm6[5],xmm3[5],xmm6[6],xmm3[6],xmm6[7],xmm3[7] 1810; SSE2-NEXT: punpcklwd {{.*#+}} xmm6 = xmm6[0],xmm4[0],xmm6[1],xmm4[1],xmm6[2],xmm4[2],xmm6[3],xmm4[3] 1811; SSE2-NEXT: punpckldq {{.*#+}} xmm6 = xmm6[0],xmm5[0],xmm6[1],xmm5[1] 1812; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1813; SSE2-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero 1814; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 1815; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1816; SSE2-NEXT: movd {{.*#+}} xmm5 = mem[0],zero,zero,zero 1817; SSE2-NEXT: punpcklbw {{.*#+}} xmm5 = xmm5[0],xmm3[0],xmm5[1],xmm3[1],xmm5[2],xmm3[2],xmm5[3],xmm3[3],xmm5[4],xmm3[4],xmm5[5],xmm3[5],xmm5[6],xmm3[6],xmm5[7],xmm3[7] 1818; SSE2-NEXT: punpcklwd {{.*#+}} xmm5 = xmm5[0],xmm4[0],xmm5[1],xmm4[1],xmm5[2],xmm4[2],xmm5[3],xmm4[3] 1819; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1820; SSE2-NEXT: movd {{.*#+}} xmm4 = mem[0],zero,zero,zero 1821; SSE2-NEXT: punpcklbw {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1],xmm4[2],xmm3[2],xmm4[3],xmm3[3],xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 1822; SSE2-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1823; SSE2-NEXT: movd {{.*#+}} xmm7 = mem[0],zero,zero,zero 1824; SSE2-NEXT: punpcklbw {{.*#+}} xmm7 = xmm7[0],xmm3[0],xmm7[1],xmm3[1],xmm7[2],xmm3[2],xmm7[3],xmm3[3],xmm7[4],xmm3[4],xmm7[5],xmm3[5],xmm7[6],xmm3[6],xmm7[7],xmm3[7] 1825; SSE2-NEXT: punpcklwd {{.*#+}} xmm7 = xmm7[0],xmm4[0],xmm7[1],xmm4[1],xmm7[2],xmm4[2],xmm7[3],xmm4[3] 1826; SSE2-NEXT: punpckldq {{.*#+}} xmm7 = xmm7[0],xmm5[0],xmm7[1],xmm5[1] 1827; SSE2-NEXT: punpcklqdq {{.*#+}} xmm7 = xmm7[0],xmm6[0] 1828; SSE2-NEXT: pcmpeqd %xmm3, %xmm3 1829; SSE2-NEXT: pcmpgtb %xmm3, %xmm0 1830; SSE2-NEXT: pand %xmm2, %xmm0 1831; SSE2-NEXT: pcmpgtb %xmm3, %xmm1 1832; SSE2-NEXT: pand %xmm7, %xmm1 1833; SSE2-NEXT: psllw $7, %xmm1 1834; SSE2-NEXT: pmovmskb %xmm1, %ecx 1835; SSE2-NEXT: shll $16, %ecx 1836; SSE2-NEXT: psllw $7, %xmm0 1837; SSE2-NEXT: pmovmskb %xmm0, %edx 1838; SSE2-NEXT: orl %ecx, %edx 1839; SSE2-NEXT: movl %edx, (%rdi) 1840; SSE2-NEXT: retq 1841; 1842; SSE42-LABEL: is_positive_mask_v32i8_v32i1: 1843; SSE42: # %bb.0: 1844; SSE42-NEXT: movq %rdi, %rax 1845; SSE42-NEXT: movd %esi, %xmm2 1846; SSE42-NEXT: pinsrb $1, %edx, %xmm2 1847; SSE42-NEXT: pinsrb $2, %ecx, %xmm2 1848; SSE42-NEXT: pinsrb $3, %r8d, %xmm2 1849; SSE42-NEXT: pinsrb $4, %r9d, %xmm2 1850; SSE42-NEXT: pinsrb $5, {{[0-9]+}}(%rsp), %xmm2 1851; SSE42-NEXT: pinsrb $6, {{[0-9]+}}(%rsp), %xmm2 1852; SSE42-NEXT: pinsrb $7, {{[0-9]+}}(%rsp), %xmm2 1853; SSE42-NEXT: pinsrb $8, {{[0-9]+}}(%rsp), %xmm2 1854; SSE42-NEXT: pinsrb $9, {{[0-9]+}}(%rsp), %xmm2 1855; SSE42-NEXT: pinsrb $10, {{[0-9]+}}(%rsp), %xmm2 1856; SSE42-NEXT: pinsrb $11, {{[0-9]+}}(%rsp), %xmm2 1857; SSE42-NEXT: pinsrb $12, {{[0-9]+}}(%rsp), %xmm2 1858; SSE42-NEXT: pinsrb $13, {{[0-9]+}}(%rsp), %xmm2 1859; SSE42-NEXT: pinsrb $14, {{[0-9]+}}(%rsp), %xmm2 1860; SSE42-NEXT: pinsrb $15, {{[0-9]+}}(%rsp), %xmm2 1861; SSE42-NEXT: movd {{.*#+}} xmm3 = mem[0],zero,zero,zero 1862; SSE42-NEXT: pinsrb $1, {{[0-9]+}}(%rsp), %xmm3 1863; SSE42-NEXT: pinsrb $2, {{[0-9]+}}(%rsp), %xmm3 1864; SSE42-NEXT: pinsrb $3, {{[0-9]+}}(%rsp), %xmm3 1865; SSE42-NEXT: pinsrb $4, {{[0-9]+}}(%rsp), %xmm3 1866; SSE42-NEXT: pinsrb $5, {{[0-9]+}}(%rsp), %xmm3 1867; SSE42-NEXT: pinsrb $6, {{[0-9]+}}(%rsp), %xmm3 1868; SSE42-NEXT: pinsrb $7, {{[0-9]+}}(%rsp), %xmm3 1869; SSE42-NEXT: pinsrb $8, {{[0-9]+}}(%rsp), %xmm3 1870; SSE42-NEXT: pinsrb $9, {{[0-9]+}}(%rsp), %xmm3 1871; SSE42-NEXT: pinsrb $10, {{[0-9]+}}(%rsp), %xmm3 1872; SSE42-NEXT: pinsrb $11, {{[0-9]+}}(%rsp), %xmm3 1873; SSE42-NEXT: pinsrb $12, {{[0-9]+}}(%rsp), %xmm3 1874; SSE42-NEXT: pinsrb $13, {{[0-9]+}}(%rsp), %xmm3 1875; SSE42-NEXT: pinsrb $14, {{[0-9]+}}(%rsp), %xmm3 1876; SSE42-NEXT: pinsrb $15, {{[0-9]+}}(%rsp), %xmm3 1877; SSE42-NEXT: pcmpeqd %xmm4, %xmm4 1878; SSE42-NEXT: pcmpgtb %xmm4, %xmm1 1879; SSE42-NEXT: pand %xmm3, %xmm1 1880; SSE42-NEXT: pcmpgtb %xmm4, %xmm0 1881; SSE42-NEXT: pand %xmm2, %xmm0 1882; SSE42-NEXT: psllw $7, %xmm0 1883; SSE42-NEXT: pmovmskb %xmm0, %ecx 1884; SSE42-NEXT: psllw $7, %xmm1 1885; SSE42-NEXT: pmovmskb %xmm1, %edx 1886; SSE42-NEXT: shll $16, %edx 1887; SSE42-NEXT: orl %ecx, %edx 1888; SSE42-NEXT: movl %edx, (%rdi) 1889; SSE42-NEXT: retq 1890; 1891; AVX1-LABEL: is_positive_mask_v32i8_v32i1: 1892; AVX1: # %bb.0: 1893; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 1894; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 1895; AVX1-NEXT: vpcmpgtb %xmm3, %xmm2, %xmm2 1896; AVX1-NEXT: vpcmpgtb %xmm3, %xmm0, %xmm0 1897; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1898; AVX1-NEXT: vandps %ymm0, %ymm1, %ymm0 1899; AVX1-NEXT: retq 1900; 1901; AVX2-LABEL: is_positive_mask_v32i8_v32i1: 1902; AVX2: # %bb.0: 1903; AVX2-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1904; AVX2-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0 1905; AVX2-NEXT: vpand %ymm0, %ymm1, %ymm0 1906; AVX2-NEXT: retq 1907; 1908; AVX512F-LABEL: is_positive_mask_v32i8_v32i1: 1909; AVX512F: # %bb.0: 1910; AVX512F-NEXT: vpcmpeqd %ymm2, %ymm2, %ymm2 1911; AVX512F-NEXT: vpcmpgtb %ymm2, %ymm0, %ymm0 1912; AVX512F-NEXT: vpand %ymm0, %ymm1, %ymm0 1913; AVX512F-NEXT: retq 1914; 1915; AVX512DQBW-LABEL: is_positive_mask_v32i8_v32i1: 1916; AVX512DQBW: # %bb.0: 1917; AVX512DQBW-NEXT: vpsllw $7, %ymm1, %ymm1 1918; AVX512DQBW-NEXT: vpmovb2m %ymm1, %k1 1919; AVX512DQBW-NEXT: vpcmpeqd %ymm1, %ymm1, %ymm1 1920; AVX512DQBW-NEXT: vpcmpgtb %ymm1, %ymm0, %k0 {%k1} 1921; AVX512DQBW-NEXT: vpmovm2b %k0, %ymm0 1922; AVX512DQBW-NEXT: retq 1923 %cmp = icmp sgt <32 x i8> %x, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1> 1924 %and = and <32 x i1> %y, %cmp 1925 ret <32 x i1> %and 1926} 1927