1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X86 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefix=X64 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop | FileCheck %s --check-prefix=X64-AVX --check-prefix=X64-XOP 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX --check-prefix=X64-AVX2 6 7; 8; PowOf2 (uniform) 9; 10 11define <2 x i64> @mul_v2i64_8(<2 x i64> %a0) nounwind { 12; X86-LABEL: mul_v2i64_8: 13; X86: # %bb.0: 14; X86-NEXT: psllq $3, %xmm0 15; X86-NEXT: retl 16; 17; X64-LABEL: mul_v2i64_8: 18; X64: # %bb.0: 19; X64-NEXT: psllq $3, %xmm0 20; X64-NEXT: retq 21; 22; X64-AVX-LABEL: mul_v2i64_8: 23; X64-AVX: # %bb.0: 24; X64-AVX-NEXT: vpsllq $3, %xmm0, %xmm0 25; X64-AVX-NEXT: retq 26 %1 = mul <2 x i64> %a0, <i64 8, i64 8> 27 ret <2 x i64> %1 28} 29 30define <4 x i32> @mul_v4i32_8(<4 x i32> %a0) nounwind { 31; X86-LABEL: mul_v4i32_8: 32; X86: # %bb.0: 33; X86-NEXT: pslld $3, %xmm0 34; X86-NEXT: retl 35; 36; X64-LABEL: mul_v4i32_8: 37; X64: # %bb.0: 38; X64-NEXT: pslld $3, %xmm0 39; X64-NEXT: retq 40; 41; X64-AVX-LABEL: mul_v4i32_8: 42; X64-AVX: # %bb.0: 43; X64-AVX-NEXT: vpslld $3, %xmm0, %xmm0 44; X64-AVX-NEXT: retq 45 %1 = mul <4 x i32> %a0, <i32 8, i32 8, i32 8, i32 8> 46 ret <4 x i32> %1 47} 48 49define <8 x i16> @mul_v8i16_8(<8 x i16> %a0) nounwind { 50; X86-LABEL: mul_v8i16_8: 51; X86: # %bb.0: 52; X86-NEXT: psllw $3, %xmm0 53; X86-NEXT: retl 54; 55; X64-LABEL: mul_v8i16_8: 56; X64: # %bb.0: 57; X64-NEXT: psllw $3, %xmm0 58; X64-NEXT: retq 59; 60; X64-AVX-LABEL: mul_v8i16_8: 61; X64-AVX: # %bb.0: 62; X64-AVX-NEXT: vpsllw $3, %xmm0, %xmm0 63; X64-AVX-NEXT: retq 64 %1 = mul <8 x i16> %a0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8> 65 ret <8 x i16> %1 66} 67 68define <16 x i8> @mul_v16i8_32(<16 x i8> %a0) nounwind { 69; X86-LABEL: mul_v16i8_32: 70; X86: # %bb.0: 71; X86-NEXT: psllw $5, %xmm0 72; X86-NEXT: pand {{\.LCPI.*}}, %xmm0 73; X86-NEXT: retl 74; 75; X64-LABEL: mul_v16i8_32: 76; X64: # %bb.0: 77; X64-NEXT: psllw $5, %xmm0 78; X64-NEXT: pand {{.*}}(%rip), %xmm0 79; X64-NEXT: retq 80; 81; X64-XOP-LABEL: mul_v16i8_32: 82; X64-XOP: # %bb.0: 83; X64-XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm0 84; X64-XOP-NEXT: retq 85; 86; X64-AVX2-LABEL: mul_v16i8_32: 87; X64-AVX2: # %bb.0: 88; X64-AVX2-NEXT: vpsllw $5, %xmm0, %xmm0 89; X64-AVX2-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 90; X64-AVX2-NEXT: retq 91 %1 = mul <16 x i8> %a0, <i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32, i8 32> 92 ret <16 x i8> %1 93} 94 95; 96; PowOf2 (non-uniform) 97; 98 99define <2 x i64> @mul_v2i64_32_8(<2 x i64> %a0) nounwind { 100; X86-LABEL: mul_v2i64_32_8: 101; X86: # %bb.0: 102; X86-NEXT: movdqa %xmm0, %xmm1 103; X86-NEXT: psllq $3, %xmm1 104; X86-NEXT: psllq $5, %xmm0 105; X86-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 106; X86-NEXT: retl 107; 108; X64-LABEL: mul_v2i64_32_8: 109; X64: # %bb.0: 110; X64-NEXT: movdqa %xmm0, %xmm1 111; X64-NEXT: psllq $3, %xmm1 112; X64-NEXT: psllq $5, %xmm0 113; X64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0,1,2,3],xmm1[4,5,6,7] 114; X64-NEXT: retq 115; 116; X64-XOP-LABEL: mul_v2i64_32_8: 117; X64-XOP: # %bb.0: 118; X64-XOP-NEXT: vpshlq {{.*}}(%rip), %xmm0, %xmm0 119; X64-XOP-NEXT: retq 120; 121; X64-AVX2-LABEL: mul_v2i64_32_8: 122; X64-AVX2: # %bb.0: 123; X64-AVX2-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm0 124; X64-AVX2-NEXT: retq 125 %1 = mul <2 x i64> %a0, <i64 32, i64 8> 126 ret <2 x i64> %1 127} 128 129define <4 x i32> @mul_v4i32_1_2_4_8(<4 x i32> %a0) nounwind { 130; X86-LABEL: mul_v4i32_1_2_4_8: 131; X86: # %bb.0: 132; X86-NEXT: pmulld {{\.LCPI.*}}, %xmm0 133; X86-NEXT: retl 134; 135; X64-LABEL: mul_v4i32_1_2_4_8: 136; X64: # %bb.0: 137; X64-NEXT: pmulld {{.*}}(%rip), %xmm0 138; X64-NEXT: retq 139; 140; X64-XOP-LABEL: mul_v4i32_1_2_4_8: 141; X64-XOP: # %bb.0: 142; X64-XOP-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm0 143; X64-XOP-NEXT: retq 144; 145; X64-AVX2-LABEL: mul_v4i32_1_2_4_8: 146; X64-AVX2: # %bb.0: 147; X64-AVX2-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm0 148; X64-AVX2-NEXT: retq 149 %1 = mul <4 x i32> %a0, <i32 1, i32 2, i32 4, i32 8> 150 ret <4 x i32> %1 151} 152 153define <8 x i16> @mul_v8i16_1_2_4_8_16_32_64_128(<8 x i16> %a0) nounwind { 154; X86-LABEL: mul_v8i16_1_2_4_8_16_32_64_128: 155; X86: # %bb.0: 156; X86-NEXT: pmullw {{\.LCPI.*}}, %xmm0 157; X86-NEXT: retl 158; 159; X64-LABEL: mul_v8i16_1_2_4_8_16_32_64_128: 160; X64: # %bb.0: 161; X64-NEXT: pmullw {{.*}}(%rip), %xmm0 162; X64-NEXT: retq 163; 164; X64-XOP-LABEL: mul_v8i16_1_2_4_8_16_32_64_128: 165; X64-XOP: # %bb.0: 166; X64-XOP-NEXT: vpshlw {{.*}}(%rip), %xmm0, %xmm0 167; X64-XOP-NEXT: retq 168; 169; X64-AVX2-LABEL: mul_v8i16_1_2_4_8_16_32_64_128: 170; X64-AVX2: # %bb.0: 171; X64-AVX2-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 172; X64-AVX2-NEXT: retq 173 %1 = mul <8 x i16> %a0, <i16 1, i16 2, i16 4, i16 8, i16 16, i16 32, i16 64, i16 128> 174 ret <8 x i16> %1 175} 176 177define <16 x i8> @mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8(<16 x i8> %a0) nounwind { 178; X86-LABEL: mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8: 179; X86: # %bb.0: 180; X86-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 181; X86-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 182; X86-NEXT: movdqa {{.*#+}} xmm2 = [1,2,4,8,1,2,4,8] 183; X86-NEXT: pmullw %xmm2, %xmm0 184; X86-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255] 185; X86-NEXT: pand %xmm3, %xmm0 186; X86-NEXT: pmullw %xmm2, %xmm1 187; X86-NEXT: pand %xmm3, %xmm1 188; X86-NEXT: packuswb %xmm0, %xmm1 189; X86-NEXT: movdqa %xmm1, %xmm0 190; X86-NEXT: retl 191; 192; X64-LABEL: mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8: 193; X64: # %bb.0: 194; X64-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 195; X64-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 196; X64-NEXT: movdqa {{.*#+}} xmm2 = [1,2,4,8,1,2,4,8] 197; X64-NEXT: pmullw %xmm2, %xmm0 198; X64-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255] 199; X64-NEXT: pand %xmm3, %xmm0 200; X64-NEXT: pmullw %xmm2, %xmm1 201; X64-NEXT: pand %xmm3, %xmm1 202; X64-NEXT: packuswb %xmm0, %xmm1 203; X64-NEXT: movdqa %xmm1, %xmm0 204; X64-NEXT: retq 205; 206; X64-XOP-LABEL: mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8: 207; X64-XOP: # %bb.0: 208; X64-XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm0 209; X64-XOP-NEXT: retq 210; 211; X64-AVX2-LABEL: mul_v16i8_1_2_4_8_1_2_4_8_1_2_4_8_1_2_4_8: 212; X64-AVX2: # %bb.0: 213; X64-AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero 214; X64-AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 215; X64-AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 216; X64-AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 217; X64-AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 218; X64-AVX2-NEXT: vzeroupper 219; X64-AVX2-NEXT: retq 220 %1 = mul <16 x i8> %a0, <i8 1, i8 2, i8 4, i8 8, i8 1, i8 2, i8 4, i8 8, i8 1, i8 2, i8 4, i8 8, i8 1, i8 2, i8 4, i8 8> 221 ret <16 x i8> %1 222} 223 224; 225; PowOf2 + 1 (uniform) 226; 227 228define <2 x i64> @mul_v2i64_17(<2 x i64> %a0) nounwind { 229; X86-LABEL: mul_v2i64_17: 230; X86: # %bb.0: 231; X86-NEXT: movdqa %xmm0, %xmm1 232; X86-NEXT: psllq $4, %xmm1 233; X86-NEXT: paddq %xmm0, %xmm1 234; X86-NEXT: movdqa %xmm1, %xmm0 235; X86-NEXT: retl 236; 237; X64-LABEL: mul_v2i64_17: 238; X64: # %bb.0: 239; X64-NEXT: movdqa %xmm0, %xmm1 240; X64-NEXT: psllq $4, %xmm1 241; X64-NEXT: paddq %xmm0, %xmm1 242; X64-NEXT: movdqa %xmm1, %xmm0 243; X64-NEXT: retq 244; 245; X64-AVX-LABEL: mul_v2i64_17: 246; X64-AVX: # %bb.0: 247; X64-AVX-NEXT: vpsllq $4, %xmm0, %xmm1 248; X64-AVX-NEXT: vpaddq %xmm0, %xmm1, %xmm0 249; X64-AVX-NEXT: retq 250 %1 = mul <2 x i64> %a0, <i64 17, i64 17> 251 ret <2 x i64> %1 252} 253 254define <4 x i32> @mul_v4i32_17(<4 x i32> %a0) nounwind { 255; X86-LABEL: mul_v4i32_17: 256; X86: # %bb.0: 257; X86-NEXT: pmulld {{\.LCPI.*}}, %xmm0 258; X86-NEXT: retl 259; 260; X64-LABEL: mul_v4i32_17: 261; X64: # %bb.0: 262; X64-NEXT: pmulld {{.*}}(%rip), %xmm0 263; X64-NEXT: retq 264; 265; X64-XOP-LABEL: mul_v4i32_17: 266; X64-XOP: # %bb.0: 267; X64-XOP-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 268; X64-XOP-NEXT: retq 269; 270; X64-AVX2-LABEL: mul_v4i32_17: 271; X64-AVX2: # %bb.0: 272; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [17,17,17,17] 273; X64-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0 274; X64-AVX2-NEXT: retq 275 %1 = mul <4 x i32> %a0, <i32 17, i32 17, i32 17, i32 17> 276 ret <4 x i32> %1 277} 278 279define <8 x i16> @mul_v8i16_17(<8 x i16> %a0) nounwind { 280; X86-LABEL: mul_v8i16_17: 281; X86: # %bb.0: 282; X86-NEXT: pmullw {{\.LCPI.*}}, %xmm0 283; X86-NEXT: retl 284; 285; X64-LABEL: mul_v8i16_17: 286; X64: # %bb.0: 287; X64-NEXT: pmullw {{.*}}(%rip), %xmm0 288; X64-NEXT: retq 289; 290; X64-AVX-LABEL: mul_v8i16_17: 291; X64-AVX: # %bb.0: 292; X64-AVX-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 293; X64-AVX-NEXT: retq 294 %1 = mul <8 x i16> %a0, <i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17> 295 ret <8 x i16> %1 296} 297 298define <16 x i8> @mul_v16i8_17(<16 x i8> %a0) nounwind { 299; X86-LABEL: mul_v16i8_17: 300; X86: # %bb.0: 301; X86-NEXT: movdqa %xmm0, %xmm1 302; X86-NEXT: psllw $4, %xmm1 303; X86-NEXT: pand {{\.LCPI.*}}, %xmm1 304; X86-NEXT: paddb %xmm0, %xmm1 305; X86-NEXT: movdqa %xmm1, %xmm0 306; X86-NEXT: retl 307; 308; X64-LABEL: mul_v16i8_17: 309; X64: # %bb.0: 310; X64-NEXT: movdqa %xmm0, %xmm1 311; X64-NEXT: psllw $4, %xmm1 312; X64-NEXT: pand {{.*}}(%rip), %xmm1 313; X64-NEXT: paddb %xmm0, %xmm1 314; X64-NEXT: movdqa %xmm1, %xmm0 315; X64-NEXT: retq 316; 317; X64-XOP-LABEL: mul_v16i8_17: 318; X64-XOP: # %bb.0: 319; X64-XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm1 320; X64-XOP-NEXT: vpaddb %xmm0, %xmm1, %xmm0 321; X64-XOP-NEXT: retq 322; 323; X64-AVX2-LABEL: mul_v16i8_17: 324; X64-AVX2: # %bb.0: 325; X64-AVX2-NEXT: vpsllw $4, %xmm0, %xmm1 326; X64-AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 327; X64-AVX2-NEXT: vpaddb %xmm0, %xmm1, %xmm0 328; X64-AVX2-NEXT: retq 329 %1 = mul <16 x i8> %a0, <i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17> 330 ret <16 x i8> %1 331} 332 333; 334; -(PowOf2 + 1) (uniform) 335; 336 337define <2 x i64> @mul_v2i64_neg1025(<2 x i64> %a0) nounwind { 338; X86-LABEL: mul_v2i64_neg1025: 339; X86: # %bb.0: 340; X86-NEXT: movdqa %xmm0, %xmm1 341; X86-NEXT: psllq $10, %xmm1 342; X86-NEXT: paddq %xmm0, %xmm1 343; X86-NEXT: pxor %xmm0, %xmm0 344; X86-NEXT: psubq %xmm1, %xmm0 345; X86-NEXT: retl 346; 347; X64-LABEL: mul_v2i64_neg1025: 348; X64: # %bb.0: 349; X64-NEXT: movdqa %xmm0, %xmm1 350; X64-NEXT: psllq $10, %xmm1 351; X64-NEXT: paddq %xmm0, %xmm1 352; X64-NEXT: pxor %xmm0, %xmm0 353; X64-NEXT: psubq %xmm1, %xmm0 354; X64-NEXT: retq 355; 356; X64-AVX-LABEL: mul_v2i64_neg1025: 357; X64-AVX: # %bb.0: 358; X64-AVX-NEXT: vpsllq $10, %xmm0, %xmm1 359; X64-AVX-NEXT: vpaddq %xmm0, %xmm1, %xmm0 360; X64-AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1 361; X64-AVX-NEXT: vpsubq %xmm0, %xmm1, %xmm0 362; X64-AVX-NEXT: retq 363 %1 = mul <2 x i64> %a0, <i64 -1025, i64 -1025> 364 ret <2 x i64> %1 365} 366 367define <4 x i32> @mul_v4i32_neg33(<4 x i32> %a0) nounwind { 368; X86-LABEL: mul_v4i32_neg33: 369; X86: # %bb.0: 370; X86-NEXT: pmulld {{\.LCPI.*}}, %xmm0 371; X86-NEXT: retl 372; 373; X64-LABEL: mul_v4i32_neg33: 374; X64: # %bb.0: 375; X64-NEXT: pmulld {{.*}}(%rip), %xmm0 376; X64-NEXT: retq 377; 378; X64-XOP-LABEL: mul_v4i32_neg33: 379; X64-XOP: # %bb.0: 380; X64-XOP-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 381; X64-XOP-NEXT: retq 382; 383; X64-AVX2-LABEL: mul_v4i32_neg33: 384; X64-AVX2: # %bb.0: 385; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967263,4294967263,4294967263,4294967263] 386; X64-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0 387; X64-AVX2-NEXT: retq 388 %1 = mul <4 x i32> %a0, <i32 -33, i32 -33, i32 -33, i32 -33> 389 ret <4 x i32> %1 390} 391 392define <8 x i16> @mul_v8i16_neg9(<8 x i16> %a0) nounwind { 393; X86-LABEL: mul_v8i16_neg9: 394; X86: # %bb.0: 395; X86-NEXT: pmullw {{\.LCPI.*}}, %xmm0 396; X86-NEXT: retl 397; 398; X64-LABEL: mul_v8i16_neg9: 399; X64: # %bb.0: 400; X64-NEXT: pmullw {{.*}}(%rip), %xmm0 401; X64-NEXT: retq 402; 403; X64-AVX-LABEL: mul_v8i16_neg9: 404; X64-AVX: # %bb.0: 405; X64-AVX-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 406; X64-AVX-NEXT: retq 407 %1 = mul <8 x i16> %a0, <i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9, i16 -9> 408 ret <8 x i16> %1 409} 410 411define <16 x i8> @mul_v16i8_neg5(<16 x i8> %a0) nounwind { 412; X86-LABEL: mul_v16i8_neg5: 413; X86: # %bb.0: 414; X86-NEXT: movdqa %xmm0, %xmm1 415; X86-NEXT: psllw $2, %xmm1 416; X86-NEXT: pand {{\.LCPI.*}}, %xmm1 417; X86-NEXT: paddb %xmm0, %xmm1 418; X86-NEXT: pxor %xmm0, %xmm0 419; X86-NEXT: psubb %xmm1, %xmm0 420; X86-NEXT: retl 421; 422; X64-LABEL: mul_v16i8_neg5: 423; X64: # %bb.0: 424; X64-NEXT: movdqa %xmm0, %xmm1 425; X64-NEXT: psllw $2, %xmm1 426; X64-NEXT: pand {{.*}}(%rip), %xmm1 427; X64-NEXT: paddb %xmm0, %xmm1 428; X64-NEXT: pxor %xmm0, %xmm0 429; X64-NEXT: psubb %xmm1, %xmm0 430; X64-NEXT: retq 431; 432; X64-XOP-LABEL: mul_v16i8_neg5: 433; X64-XOP: # %bb.0: 434; X64-XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm1 435; X64-XOP-NEXT: vpaddb %xmm0, %xmm1, %xmm0 436; X64-XOP-NEXT: vpxor %xmm1, %xmm1, %xmm1 437; X64-XOP-NEXT: vpsubb %xmm0, %xmm1, %xmm0 438; X64-XOP-NEXT: retq 439; 440; X64-AVX2-LABEL: mul_v16i8_neg5: 441; X64-AVX2: # %bb.0: 442; X64-AVX2-NEXT: vpsllw $2, %xmm0, %xmm1 443; X64-AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 444; X64-AVX2-NEXT: vpaddb %xmm0, %xmm1, %xmm0 445; X64-AVX2-NEXT: vpxor %xmm1, %xmm1, %xmm1 446; X64-AVX2-NEXT: vpsubb %xmm0, %xmm1, %xmm0 447; X64-AVX2-NEXT: retq 448 %1 = mul <16 x i8> %a0, <i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5, i8 -5> 449 ret <16 x i8> %1 450} 451 452; 453; PowOf2 + 1 (non-uniform) 454; 455 456define <2 x i64> @mul_v2i64_17_65(<2 x i64> %a0) nounwind { 457; X86-LABEL: mul_v2i64_17_65: 458; X86: # %bb.0: 459; X86-NEXT: movdqa {{.*#+}} xmm1 = [17,0,65,0] 460; X86-NEXT: movdqa %xmm0, %xmm2 461; X86-NEXT: pmuludq %xmm1, %xmm2 462; X86-NEXT: psrlq $32, %xmm0 463; X86-NEXT: pmuludq %xmm1, %xmm0 464; X86-NEXT: psllq $32, %xmm0 465; X86-NEXT: paddq %xmm2, %xmm0 466; X86-NEXT: retl 467; 468; X64-LABEL: mul_v2i64_17_65: 469; X64: # %bb.0: 470; X64-NEXT: movdqa {{.*#+}} xmm1 = [17,65] 471; X64-NEXT: movdqa %xmm0, %xmm2 472; X64-NEXT: pmuludq %xmm1, %xmm2 473; X64-NEXT: psrlq $32, %xmm0 474; X64-NEXT: pmuludq %xmm1, %xmm0 475; X64-NEXT: psllq $32, %xmm0 476; X64-NEXT: paddq %xmm2, %xmm0 477; X64-NEXT: retq 478; 479; X64-AVX-LABEL: mul_v2i64_17_65: 480; X64-AVX: # %bb.0: 481; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [17,65] 482; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 483; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm0 484; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 485; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0 486; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0 487; X64-AVX-NEXT: retq 488 %1 = mul <2 x i64> %a0, <i64 17, i64 65> 489 ret <2 x i64> %1 490} 491 492define <4 x i32> @mul_v4i32_5_17_33_65(<4 x i32> %a0) nounwind { 493; X86-LABEL: mul_v4i32_5_17_33_65: 494; X86: # %bb.0: 495; X86-NEXT: pmulld {{\.LCPI.*}}, %xmm0 496; X86-NEXT: retl 497; 498; X64-LABEL: mul_v4i32_5_17_33_65: 499; X64: # %bb.0: 500; X64-NEXT: pmulld {{.*}}(%rip), %xmm0 501; X64-NEXT: retq 502; 503; X64-AVX-LABEL: mul_v4i32_5_17_33_65: 504; X64-AVX: # %bb.0: 505; X64-AVX-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 506; X64-AVX-NEXT: retq 507 %1 = mul <4 x i32> %a0, <i32 5, i32 17, i32 33, i32 65> 508 ret <4 x i32> %1 509} 510 511define <8 x i16> @mul_v8i16_2_3_9_17_33_65_129_257(<8 x i16> %a0) nounwind { 512; X86-LABEL: mul_v8i16_2_3_9_17_33_65_129_257: 513; X86: # %bb.0: 514; X86-NEXT: pmullw {{\.LCPI.*}}, %xmm0 515; X86-NEXT: retl 516; 517; X64-LABEL: mul_v8i16_2_3_9_17_33_65_129_257: 518; X64: # %bb.0: 519; X64-NEXT: pmullw {{.*}}(%rip), %xmm0 520; X64-NEXT: retq 521; 522; X64-AVX-LABEL: mul_v8i16_2_3_9_17_33_65_129_257: 523; X64-AVX: # %bb.0: 524; X64-AVX-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 525; X64-AVX-NEXT: retq 526 %1 = mul <8 x i16> %a0, <i16 2, i16 3, i16 9, i16 17, i16 33, i16 65, i16 129, i16 257> 527 ret <8 x i16> %1 528} 529 530define <16 x i8> @mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3(<16 x i8> %a0) nounwind { 531; X86-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3: 532; X86: # %bb.0: 533; X86-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 534; X86-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 535; X86-NEXT: pmullw {{\.LCPI.*}}, %xmm0 536; X86-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 537; X86-NEXT: pand %xmm2, %xmm0 538; X86-NEXT: pmullw {{\.LCPI.*}}, %xmm1 539; X86-NEXT: pand %xmm2, %xmm1 540; X86-NEXT: packuswb %xmm0, %xmm1 541; X86-NEXT: movdqa %xmm1, %xmm0 542; X86-NEXT: retl 543; 544; X64-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3: 545; X64: # %bb.0: 546; X64-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 547; X64-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 548; X64-NEXT: pmullw {{.*}}(%rip), %xmm0 549; X64-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] 550; X64-NEXT: pand %xmm2, %xmm0 551; X64-NEXT: pmullw {{.*}}(%rip), %xmm1 552; X64-NEXT: pand %xmm2, %xmm1 553; X64-NEXT: packuswb %xmm0, %xmm1 554; X64-NEXT: movdqa %xmm1, %xmm0 555; X64-NEXT: retq 556; 557; X64-XOP-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3: 558; X64-XOP: # %bb.0: 559; X64-XOP-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 560; X64-XOP-NEXT: vpmullw {{.*}}(%rip), %xmm1, %xmm1 561; X64-XOP-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 562; X64-XOP-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 563; X64-XOP-NEXT: vpperm {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14],xmm1[0,2,4,6,8,10,12,14] 564; X64-XOP-NEXT: retq 565; 566; X64-AVX2-LABEL: mul_v16i8_2_3_9_17_33_65_129_2_3_9_17_33_65_129_2_3: 567; X64-AVX2: # %bb.0: 568; X64-AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero 569; X64-AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 570; X64-AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 571; X64-AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 572; X64-AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 573; X64-AVX2-NEXT: vzeroupper 574; X64-AVX2-NEXT: retq 575 %1 = mul <16 x i8> %a0, <i8 2, i8 3, i8 9, i8 17, i8 33, i8 65, i8 129, i8 2, i8 3, i8 9, i8 17, i8 33, i8 65, i8 129, i8 2, i8 3> 576 ret <16 x i8> %1 577} 578 579; 580; PowOf2 - 1 (uniform) 581; 582 583define <2 x i64> @mul_v2i64_7(<2 x i64> %a0) nounwind { 584; X86-LABEL: mul_v2i64_7: 585; X86: # %bb.0: 586; X86-NEXT: movdqa %xmm0, %xmm1 587; X86-NEXT: psllq $3, %xmm1 588; X86-NEXT: psubq %xmm0, %xmm1 589; X86-NEXT: movdqa %xmm1, %xmm0 590; X86-NEXT: retl 591; 592; X64-LABEL: mul_v2i64_7: 593; X64: # %bb.0: 594; X64-NEXT: movdqa %xmm0, %xmm1 595; X64-NEXT: psllq $3, %xmm1 596; X64-NEXT: psubq %xmm0, %xmm1 597; X64-NEXT: movdqa %xmm1, %xmm0 598; X64-NEXT: retq 599; 600; X64-AVX-LABEL: mul_v2i64_7: 601; X64-AVX: # %bb.0: 602; X64-AVX-NEXT: vpsllq $3, %xmm0, %xmm1 603; X64-AVX-NEXT: vpsubq %xmm0, %xmm1, %xmm0 604; X64-AVX-NEXT: retq 605 %1 = mul <2 x i64> %a0, <i64 7, i64 7> 606 ret <2 x i64> %1 607} 608 609define <4 x i32> @mul_v4i32_7(<4 x i32> %a0) nounwind { 610; X86-LABEL: mul_v4i32_7: 611; X86: # %bb.0: 612; X86-NEXT: pmulld {{\.LCPI.*}}, %xmm0 613; X86-NEXT: retl 614; 615; X64-LABEL: mul_v4i32_7: 616; X64: # %bb.0: 617; X64-NEXT: pmulld {{.*}}(%rip), %xmm0 618; X64-NEXT: retq 619; 620; X64-XOP-LABEL: mul_v4i32_7: 621; X64-XOP: # %bb.0: 622; X64-XOP-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 623; X64-XOP-NEXT: retq 624; 625; X64-AVX2-LABEL: mul_v4i32_7: 626; X64-AVX2: # %bb.0: 627; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [7,7,7,7] 628; X64-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0 629; X64-AVX2-NEXT: retq 630 %1 = mul <4 x i32> %a0, <i32 7, i32 7, i32 7, i32 7> 631 ret <4 x i32> %1 632} 633 634define <8 x i16> @mul_v8i16_7(<8 x i16> %a0) nounwind { 635; X86-LABEL: mul_v8i16_7: 636; X86: # %bb.0: 637; X86-NEXT: pmullw {{\.LCPI.*}}, %xmm0 638; X86-NEXT: retl 639; 640; X64-LABEL: mul_v8i16_7: 641; X64: # %bb.0: 642; X64-NEXT: pmullw {{.*}}(%rip), %xmm0 643; X64-NEXT: retq 644; 645; X64-AVX-LABEL: mul_v8i16_7: 646; X64-AVX: # %bb.0: 647; X64-AVX-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 648; X64-AVX-NEXT: retq 649 %1 = mul <8 x i16> %a0, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7> 650 ret <8 x i16> %1 651} 652 653define <16 x i8> @mul_v16i8_31(<16 x i8> %a0) nounwind { 654; X86-LABEL: mul_v16i8_31: 655; X86: # %bb.0: 656; X86-NEXT: movdqa %xmm0, %xmm1 657; X86-NEXT: psllw $5, %xmm1 658; X86-NEXT: pand {{\.LCPI.*}}, %xmm1 659; X86-NEXT: psubb %xmm0, %xmm1 660; X86-NEXT: movdqa %xmm1, %xmm0 661; X86-NEXT: retl 662; 663; X64-LABEL: mul_v16i8_31: 664; X64: # %bb.0: 665; X64-NEXT: movdqa %xmm0, %xmm1 666; X64-NEXT: psllw $5, %xmm1 667; X64-NEXT: pand {{.*}}(%rip), %xmm1 668; X64-NEXT: psubb %xmm0, %xmm1 669; X64-NEXT: movdqa %xmm1, %xmm0 670; X64-NEXT: retq 671; 672; X64-XOP-LABEL: mul_v16i8_31: 673; X64-XOP: # %bb.0: 674; X64-XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm1 675; X64-XOP-NEXT: vpsubb %xmm0, %xmm1, %xmm0 676; X64-XOP-NEXT: retq 677; 678; X64-AVX2-LABEL: mul_v16i8_31: 679; X64-AVX2: # %bb.0: 680; X64-AVX2-NEXT: vpsllw $5, %xmm0, %xmm1 681; X64-AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 682; X64-AVX2-NEXT: vpsubb %xmm0, %xmm1, %xmm0 683; X64-AVX2-NEXT: retq 684 %1 = mul <16 x i8> %a0, <i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31> 685 ret <16 x i8> %1 686} 687 688; 689; -(PowOf2 - 1) (uniform) 690; 691 692define <2 x i64> @mul_v2i64_neg7(<2 x i64> %a0) nounwind { 693; X86-LABEL: mul_v2i64_neg7: 694; X86: # %bb.0: 695; X86-NEXT: movdqa %xmm0, %xmm1 696; X86-NEXT: psllq $3, %xmm1 697; X86-NEXT: psubq %xmm1, %xmm0 698; X86-NEXT: retl 699; 700; X64-LABEL: mul_v2i64_neg7: 701; X64: # %bb.0: 702; X64-NEXT: movdqa %xmm0, %xmm1 703; X64-NEXT: psllq $3, %xmm1 704; X64-NEXT: psubq %xmm1, %xmm0 705; X64-NEXT: retq 706; 707; X64-AVX-LABEL: mul_v2i64_neg7: 708; X64-AVX: # %bb.0: 709; X64-AVX-NEXT: vpsllq $3, %xmm0, %xmm1 710; X64-AVX-NEXT: vpsubq %xmm1, %xmm0, %xmm0 711; X64-AVX-NEXT: retq 712 %1 = mul <2 x i64> %a0, <i64 -7, i64 -7> 713 ret <2 x i64> %1 714} 715 716define <4 x i32> @mul_v4i32_neg63(<4 x i32> %a0) nounwind { 717; X86-LABEL: mul_v4i32_neg63: 718; X86: # %bb.0: 719; X86-NEXT: pmulld {{\.LCPI.*}}, %xmm0 720; X86-NEXT: retl 721; 722; X64-LABEL: mul_v4i32_neg63: 723; X64: # %bb.0: 724; X64-NEXT: pmulld {{.*}}(%rip), %xmm0 725; X64-NEXT: retq 726; 727; X64-XOP-LABEL: mul_v4i32_neg63: 728; X64-XOP: # %bb.0: 729; X64-XOP-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 730; X64-XOP-NEXT: retq 731; 732; X64-AVX2-LABEL: mul_v4i32_neg63: 733; X64-AVX2: # %bb.0: 734; X64-AVX2-NEXT: vpbroadcastd {{.*#+}} xmm1 = [4294967233,4294967233,4294967233,4294967233] 735; X64-AVX2-NEXT: vpmulld %xmm1, %xmm0, %xmm0 736; X64-AVX2-NEXT: retq 737 %1 = mul <4 x i32> %a0, <i32 -63, i32 -63, i32 -63, i32 -63> 738 ret <4 x i32> %1 739} 740 741define <8 x i16> @mul_v8i16_neg31(<8 x i16> %a0) nounwind { 742; X86-LABEL: mul_v8i16_neg31: 743; X86: # %bb.0: 744; X86-NEXT: pmullw {{\.LCPI.*}}, %xmm0 745; X86-NEXT: retl 746; 747; X64-LABEL: mul_v8i16_neg31: 748; X64: # %bb.0: 749; X64-NEXT: pmullw {{.*}}(%rip), %xmm0 750; X64-NEXT: retq 751; 752; X64-AVX-LABEL: mul_v8i16_neg31: 753; X64-AVX: # %bb.0: 754; X64-AVX-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 755; X64-AVX-NEXT: retq 756 %1 = mul <8 x i16> %a0, <i16 -31, i16 -31, i16 -31, i16 -31, i16 -31, i16 -31, i16 -31, i16 -31> 757 ret <8 x i16> %1 758} 759 760define <16 x i8> @mul_v16i8_neg15(<16 x i8> %a0) nounwind { 761; X86-LABEL: mul_v16i8_neg15: 762; X86: # %bb.0: 763; X86-NEXT: movdqa %xmm0, %xmm1 764; X86-NEXT: psllw $4, %xmm1 765; X86-NEXT: pand {{\.LCPI.*}}, %xmm1 766; X86-NEXT: psubb %xmm1, %xmm0 767; X86-NEXT: retl 768; 769; X64-LABEL: mul_v16i8_neg15: 770; X64: # %bb.0: 771; X64-NEXT: movdqa %xmm0, %xmm1 772; X64-NEXT: psllw $4, %xmm1 773; X64-NEXT: pand {{.*}}(%rip), %xmm1 774; X64-NEXT: psubb %xmm1, %xmm0 775; X64-NEXT: retq 776; 777; X64-XOP-LABEL: mul_v16i8_neg15: 778; X64-XOP: # %bb.0: 779; X64-XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm1 780; X64-XOP-NEXT: vpsubb %xmm1, %xmm0, %xmm0 781; X64-XOP-NEXT: retq 782; 783; X64-AVX2-LABEL: mul_v16i8_neg15: 784; X64-AVX2: # %bb.0: 785; X64-AVX2-NEXT: vpsllw $4, %xmm0, %xmm1 786; X64-AVX2-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1 787; X64-AVX2-NEXT: vpsubb %xmm1, %xmm0, %xmm0 788; X64-AVX2-NEXT: retq 789 %1 = mul <16 x i8> %a0, <i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15, i8 -15> 790 ret <16 x i8> %1 791} 792 793; 794; PowOf2 - 1 (non-uniform) 795; 796 797define <2 x i64> @mul_v2i64_15_63(<2 x i64> %a0) nounwind { 798; X86-LABEL: mul_v2i64_15_63: 799; X86: # %bb.0: 800; X86-NEXT: movdqa {{.*#+}} xmm1 = [15,0,63,0] 801; X86-NEXT: movdqa %xmm0, %xmm2 802; X86-NEXT: pmuludq %xmm1, %xmm2 803; X86-NEXT: psrlq $32, %xmm0 804; X86-NEXT: pmuludq %xmm1, %xmm0 805; X86-NEXT: psllq $32, %xmm0 806; X86-NEXT: paddq %xmm2, %xmm0 807; X86-NEXT: retl 808; 809; X64-LABEL: mul_v2i64_15_63: 810; X64: # %bb.0: 811; X64-NEXT: movdqa {{.*#+}} xmm1 = [15,63] 812; X64-NEXT: movdqa %xmm0, %xmm2 813; X64-NEXT: pmuludq %xmm1, %xmm2 814; X64-NEXT: psrlq $32, %xmm0 815; X64-NEXT: pmuludq %xmm1, %xmm0 816; X64-NEXT: psllq $32, %xmm0 817; X64-NEXT: paddq %xmm2, %xmm0 818; X64-NEXT: retq 819; 820; X64-AVX-LABEL: mul_v2i64_15_63: 821; X64-AVX: # %bb.0: 822; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [15,63] 823; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 824; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm0 825; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 826; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0 827; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0 828; X64-AVX-NEXT: retq 829 %1 = mul <2 x i64> %a0, <i64 15, i64 63> 830 ret <2 x i64> %1 831} 832 833define <2 x i64> @mul_v2i64_neg_15_63(<2 x i64> %a0) nounwind { 834; X86-LABEL: mul_v2i64_neg_15_63: 835; X86: # %bb.0: 836; X86-NEXT: pcmpeqd %xmm1, %xmm1 837; X86-NEXT: pmuludq %xmm0, %xmm1 838; X86-NEXT: movdqa %xmm0, %xmm2 839; X86-NEXT: psrlq $32, %xmm2 840; X86-NEXT: movdqa {{.*#+}} xmm3 = [4294967281,4294967295,4294967233,4294967295] 841; X86-NEXT: pmuludq %xmm3, %xmm2 842; X86-NEXT: paddq %xmm1, %xmm2 843; X86-NEXT: psllq $32, %xmm2 844; X86-NEXT: pmuludq %xmm3, %xmm0 845; X86-NEXT: paddq %xmm2, %xmm0 846; X86-NEXT: retl 847; 848; X64-LABEL: mul_v2i64_neg_15_63: 849; X64: # %bb.0: 850; X64-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551601,18446744073709551553] 851; X64-NEXT: movdqa %xmm0, %xmm2 852; X64-NEXT: pmuludq %xmm1, %xmm2 853; X64-NEXT: movdqa %xmm0, %xmm3 854; X64-NEXT: psrlq $32, %xmm3 855; X64-NEXT: pmuludq %xmm1, %xmm3 856; X64-NEXT: pmuludq {{.*}}(%rip), %xmm0 857; X64-NEXT: paddq %xmm3, %xmm0 858; X64-NEXT: psllq $32, %xmm0 859; X64-NEXT: paddq %xmm2, %xmm0 860; X64-NEXT: retq 861; 862; X64-AVX-LABEL: mul_v2i64_neg_15_63: 863; X64-AVX: # %bb.0: 864; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551601,18446744073709551553] 865; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 866; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm3 867; X64-AVX-NEXT: vpmuludq %xmm1, %xmm3, %xmm1 868; X64-AVX-NEXT: vpmuludq {{.*}}(%rip), %xmm0, %xmm0 869; X64-AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 870; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0 871; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0 872; X64-AVX-NEXT: retq 873 %1 = mul <2 x i64> %a0, <i64 -15, i64 -63> 874 ret <2 x i64> %1 875} 876 877define <2 x i64> @mul_v2i64_neg_17_65(<2 x i64> %a0) nounwind { 878; X86-LABEL: mul_v2i64_neg_17_65: 879; X86: # %bb.0: 880; X86-NEXT: pcmpeqd %xmm1, %xmm1 881; X86-NEXT: pmuludq %xmm0, %xmm1 882; X86-NEXT: movdqa %xmm0, %xmm2 883; X86-NEXT: psrlq $32, %xmm2 884; X86-NEXT: movdqa {{.*#+}} xmm3 = [4294967279,4294967295,4294967231,4294967295] 885; X86-NEXT: pmuludq %xmm3, %xmm2 886; X86-NEXT: paddq %xmm1, %xmm2 887; X86-NEXT: psllq $32, %xmm2 888; X86-NEXT: pmuludq %xmm3, %xmm0 889; X86-NEXT: paddq %xmm2, %xmm0 890; X86-NEXT: retl 891; 892; X64-LABEL: mul_v2i64_neg_17_65: 893; X64: # %bb.0: 894; X64-NEXT: movdqa {{.*#+}} xmm1 = [18446744073709551599,18446744073709551551] 895; X64-NEXT: movdqa %xmm0, %xmm2 896; X64-NEXT: pmuludq %xmm1, %xmm2 897; X64-NEXT: movdqa %xmm0, %xmm3 898; X64-NEXT: psrlq $32, %xmm3 899; X64-NEXT: pmuludq %xmm1, %xmm3 900; X64-NEXT: pmuludq {{.*}}(%rip), %xmm0 901; X64-NEXT: paddq %xmm3, %xmm0 902; X64-NEXT: psllq $32, %xmm0 903; X64-NEXT: paddq %xmm2, %xmm0 904; X64-NEXT: retq 905; 906; X64-AVX-LABEL: mul_v2i64_neg_17_65: 907; X64-AVX: # %bb.0: 908; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [18446744073709551599,18446744073709551551] 909; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 910; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm3 911; X64-AVX-NEXT: vpmuludq %xmm1, %xmm3, %xmm1 912; X64-AVX-NEXT: vpmuludq {{.*}}(%rip), %xmm0, %xmm0 913; X64-AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 914; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0 915; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0 916; X64-AVX-NEXT: retq 917 %1 = mul <2 x i64> %a0, <i64 -17, i64 -65> 918 ret <2 x i64> %1 919} 920 921define <2 x i64> @mul_v2i64_0_1(<2 x i64> %a0) nounwind { 922; X86-LABEL: mul_v2i64_0_1: 923; X86: # %bb.0: 924; X86-NEXT: movdqa {{.*#+}} xmm1 = [0,0,1,0] 925; X86-NEXT: movdqa %xmm0, %xmm2 926; X86-NEXT: pmuludq %xmm1, %xmm2 927; X86-NEXT: psrlq $32, %xmm0 928; X86-NEXT: pmuludq %xmm1, %xmm0 929; X86-NEXT: psllq $32, %xmm0 930; X86-NEXT: paddq %xmm2, %xmm0 931; X86-NEXT: retl 932; 933; X64-LABEL: mul_v2i64_0_1: 934; X64: # %bb.0: 935; X64-NEXT: movl $1, %eax 936; X64-NEXT: movq %rax, %xmm1 937; X64-NEXT: pslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] 938; X64-NEXT: movdqa %xmm0, %xmm2 939; X64-NEXT: pmuludq %xmm1, %xmm2 940; X64-NEXT: psrlq $32, %xmm0 941; X64-NEXT: pmuludq %xmm1, %xmm0 942; X64-NEXT: psllq $32, %xmm0 943; X64-NEXT: paddq %xmm2, %xmm0 944; X64-NEXT: retq 945; 946; X64-AVX-LABEL: mul_v2i64_0_1: 947; X64-AVX: # %bb.0: 948; X64-AVX-NEXT: movl $1, %eax 949; X64-AVX-NEXT: vmovq %rax, %xmm1 950; X64-AVX-NEXT: vpslldq {{.*#+}} xmm1 = zero,zero,zero,zero,zero,zero,zero,zero,xmm1[0,1,2,3,4,5,6,7] 951; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 952; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm0 953; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 954; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0 955; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0 956; X64-AVX-NEXT: retq 957 %1 = mul <2 x i64> %a0, <i64 0, i64 1> 958 ret <2 x i64> %1 959} 960 961define <2 x i64> @mul_v2i64_neg_0_1(<2 x i64> %a0) nounwind { 962; X86-LABEL: mul_v2i64_neg_0_1: 963; X86: # %bb.0: 964; X86-NEXT: movdqa %xmm0, %xmm1 965; X86-NEXT: psrlq $32, %xmm1 966; X86-NEXT: movdqa {{.*#+}} xmm2 = [0,0,4294967295,4294967295] 967; X86-NEXT: pmuludq %xmm2, %xmm1 968; X86-NEXT: movdqa %xmm2, %xmm3 969; X86-NEXT: psrlq $32, %xmm3 970; X86-NEXT: pmuludq %xmm0, %xmm3 971; X86-NEXT: paddq %xmm1, %xmm3 972; X86-NEXT: psllq $32, %xmm3 973; X86-NEXT: pmuludq %xmm2, %xmm0 974; X86-NEXT: paddq %xmm3, %xmm0 975; X86-NEXT: retl 976; 977; X64-LABEL: mul_v2i64_neg_0_1: 978; X64: # %bb.0: 979; X64-NEXT: movdqa %xmm0, %xmm1 980; X64-NEXT: psrlq $32, %xmm1 981; X64-NEXT: movq $-1, %rax 982; X64-NEXT: movq %rax, %xmm2 983; X64-NEXT: pslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 984; X64-NEXT: pmuludq %xmm2, %xmm1 985; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF 986; X64-NEXT: movq %rax, %xmm3 987; X64-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6,7] 988; X64-NEXT: pmuludq %xmm0, %xmm3 989; X64-NEXT: paddq %xmm1, %xmm3 990; X64-NEXT: psllq $32, %xmm3 991; X64-NEXT: pmuludq %xmm2, %xmm0 992; X64-NEXT: paddq %xmm3, %xmm0 993; X64-NEXT: retq 994; 995; X64-AVX-LABEL: mul_v2i64_neg_0_1: 996; X64-AVX: # %bb.0: 997; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm1 998; X64-AVX-NEXT: movq $-1, %rax 999; X64-AVX-NEXT: vmovq %rax, %xmm2 1000; X64-AVX-NEXT: vpslldq {{.*#+}} xmm2 = zero,zero,zero,zero,zero,zero,zero,zero,xmm2[0,1,2,3,4,5,6,7] 1001; X64-AVX-NEXT: vpmuludq %xmm2, %xmm1, %xmm1 1002; X64-AVX-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF 1003; X64-AVX-NEXT: vmovq %rax, %xmm3 1004; X64-AVX-NEXT: vpslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6,7] 1005; X64-AVX-NEXT: vpmuludq %xmm3, %xmm0, %xmm3 1006; X64-AVX-NEXT: vpaddq %xmm1, %xmm3, %xmm1 1007; X64-AVX-NEXT: vpsllq $32, %xmm1, %xmm1 1008; X64-AVX-NEXT: vpmuludq %xmm2, %xmm0, %xmm0 1009; X64-AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 1010; X64-AVX-NEXT: retq 1011 %1 = mul <2 x i64> %a0, <i64 0, i64 -1> 1012 ret <2 x i64> %1 1013} 1014 1015define <2 x i64> @mul_v2i64_15_neg_63(<2 x i64> %a0) nounwind { 1016; X86-LABEL: mul_v2i64_15_neg_63: 1017; X86: # %bb.0: 1018; X86-NEXT: movdqa %xmm0, %xmm1 1019; X86-NEXT: psrlq $32, %xmm1 1020; X86-NEXT: movdqa {{.*#+}} xmm2 = [15,0,4294967233,4294967295] 1021; X86-NEXT: pmuludq %xmm2, %xmm1 1022; X86-NEXT: movdqa %xmm2, %xmm3 1023; X86-NEXT: psrlq $32, %xmm3 1024; X86-NEXT: pmuludq %xmm0, %xmm3 1025; X86-NEXT: paddq %xmm1, %xmm3 1026; X86-NEXT: psllq $32, %xmm3 1027; X86-NEXT: pmuludq %xmm2, %xmm0 1028; X86-NEXT: paddq %xmm3, %xmm0 1029; X86-NEXT: retl 1030; 1031; X64-LABEL: mul_v2i64_15_neg_63: 1032; X64: # %bb.0: 1033; X64-NEXT: movdqa %xmm0, %xmm1 1034; X64-NEXT: psrlq $32, %xmm1 1035; X64-NEXT: movdqa {{.*#+}} xmm2 = [15,18446744073709551553] 1036; X64-NEXT: pmuludq %xmm2, %xmm1 1037; X64-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF 1038; X64-NEXT: movq %rax, %xmm3 1039; X64-NEXT: pslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6,7] 1040; X64-NEXT: pmuludq %xmm0, %xmm3 1041; X64-NEXT: paddq %xmm1, %xmm3 1042; X64-NEXT: psllq $32, %xmm3 1043; X64-NEXT: pmuludq %xmm2, %xmm0 1044; X64-NEXT: paddq %xmm3, %xmm0 1045; X64-NEXT: retq 1046; 1047; X64-AVX-LABEL: mul_v2i64_15_neg_63: 1048; X64-AVX: # %bb.0: 1049; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm1 1050; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [15,18446744073709551553] 1051; X64-AVX-NEXT: vpmuludq %xmm2, %xmm1, %xmm1 1052; X64-AVX-NEXT: movl $4294967295, %eax # imm = 0xFFFFFFFF 1053; X64-AVX-NEXT: vmovq %rax, %xmm3 1054; X64-AVX-NEXT: vpslldq {{.*#+}} xmm3 = zero,zero,zero,zero,zero,zero,zero,zero,xmm3[0,1,2,3,4,5,6,7] 1055; X64-AVX-NEXT: vpmuludq %xmm3, %xmm0, %xmm3 1056; X64-AVX-NEXT: vpaddq %xmm1, %xmm3, %xmm1 1057; X64-AVX-NEXT: vpsllq $32, %xmm1, %xmm1 1058; X64-AVX-NEXT: vpmuludq %xmm2, %xmm0, %xmm0 1059; X64-AVX-NEXT: vpaddq %xmm1, %xmm0, %xmm0 1060; X64-AVX-NEXT: retq 1061 %1 = mul <2 x i64> %a0, <i64 15, i64 -63> 1062 ret <2 x i64> %1 1063} 1064 1065define <4 x i32> @mul_v4i32_0_15_31_7(<4 x i32> %a0) nounwind { 1066; X86-LABEL: mul_v4i32_0_15_31_7: 1067; X86: # %bb.0: 1068; X86-NEXT: pmulld {{\.LCPI.*}}, %xmm0 1069; X86-NEXT: retl 1070; 1071; X64-LABEL: mul_v4i32_0_15_31_7: 1072; X64: # %bb.0: 1073; X64-NEXT: pmulld {{.*}}(%rip), %xmm0 1074; X64-NEXT: retq 1075; 1076; X64-AVX-LABEL: mul_v4i32_0_15_31_7: 1077; X64-AVX: # %bb.0: 1078; X64-AVX-NEXT: vpmulld {{.*}}(%rip), %xmm0, %xmm0 1079; X64-AVX-NEXT: retq 1080 %1 = mul <4 x i32> %a0, <i32 0, i32 15, i32 31, i32 7> 1081 ret <4 x i32> %1 1082} 1083 1084define <8 x i16> @mul_v8i16_0_1_7_15_31_63_127_255(<8 x i16> %a0) nounwind { 1085; X86-LABEL: mul_v8i16_0_1_7_15_31_63_127_255: 1086; X86: # %bb.0: 1087; X86-NEXT: pmullw {{\.LCPI.*}}, %xmm0 1088; X86-NEXT: retl 1089; 1090; X64-LABEL: mul_v8i16_0_1_7_15_31_63_127_255: 1091; X64: # %bb.0: 1092; X64-NEXT: pmullw {{.*}}(%rip), %xmm0 1093; X64-NEXT: retq 1094; 1095; X64-AVX-LABEL: mul_v8i16_0_1_7_15_31_63_127_255: 1096; X64-AVX: # %bb.0: 1097; X64-AVX-NEXT: vpmullw {{.*}}(%rip), %xmm0, %xmm0 1098; X64-AVX-NEXT: retq 1099 %1 = mul <8 x i16> %a0, <i16 0, i16 1, i16 7, i16 15, i16 31, i16 63, i16 127, i16 255> 1100 ret <8 x i16> %1 1101} 1102 1103define <16 x i8> @mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127(<16 x i8> %a0) nounwind { 1104; X86-LABEL: mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127: 1105; X86: # %bb.0: 1106; X86-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 1107; X86-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 1108; X86-NEXT: movdqa {{.*#+}} xmm2 = [0,1,3,7,15,31,63,127] 1109; X86-NEXT: pmullw %xmm2, %xmm0 1110; X86-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255] 1111; X86-NEXT: pand %xmm3, %xmm0 1112; X86-NEXT: pmullw %xmm2, %xmm1 1113; X86-NEXT: pand %xmm3, %xmm1 1114; X86-NEXT: packuswb %xmm0, %xmm1 1115; X86-NEXT: movdqa %xmm1, %xmm0 1116; X86-NEXT: retl 1117; 1118; X64-LABEL: mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127: 1119; X64: # %bb.0: 1120; X64-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 1121; X64-NEXT: punpckhbw {{.*#+}} xmm0 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 1122; X64-NEXT: movdqa {{.*#+}} xmm2 = [0,1,3,7,15,31,63,127] 1123; X64-NEXT: pmullw %xmm2, %xmm0 1124; X64-NEXT: movdqa {{.*#+}} xmm3 = [255,255,255,255,255,255,255,255] 1125; X64-NEXT: pand %xmm3, %xmm0 1126; X64-NEXT: pmullw %xmm2, %xmm1 1127; X64-NEXT: pand %xmm3, %xmm1 1128; X64-NEXT: packuswb %xmm0, %xmm1 1129; X64-NEXT: movdqa %xmm1, %xmm0 1130; X64-NEXT: retq 1131; 1132; X64-XOP-LABEL: mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127: 1133; X64-XOP: # %bb.0: 1134; X64-XOP-NEXT: vpunpckhbw {{.*#+}} xmm1 = xmm0[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15] 1135; X64-XOP-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,3,7,15,31,63,127] 1136; X64-XOP-NEXT: vpmullw %xmm2, %xmm1, %xmm1 1137; X64-XOP-NEXT: vpmovzxbw {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 1138; X64-XOP-NEXT: vpmullw %xmm2, %xmm0, %xmm0 1139; X64-XOP-NEXT: vpperm {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14],xmm1[0,2,4,6,8,10,12,14] 1140; X64-XOP-NEXT: retq 1141; 1142; X64-AVX2-LABEL: mul_v16i8_0_1_3_7_15_31_63_127_0_1_3_7_15_31_63_127: 1143; X64-AVX2: # %bb.0: 1144; X64-AVX2-NEXT: vpmovzxbw {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero,xmm0[8],zero,xmm0[9],zero,xmm0[10],zero,xmm0[11],zero,xmm0[12],zero,xmm0[13],zero,xmm0[14],zero,xmm0[15],zero 1145; X64-AVX2-NEXT: vpmullw {{.*}}(%rip), %ymm0, %ymm0 1146; X64-AVX2-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0 1147; X64-AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 1148; X64-AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 1149; X64-AVX2-NEXT: vzeroupper 1150; X64-AVX2-NEXT: retq 1151 %1 = mul <16 x i8> %a0, <i8 0, i8 1, i8 3, i8 7, i8 15, i8 31, i8 63, i8 127, i8 0, i8 1, i8 3, i8 7, i8 15, i8 31, i8 63, i8 127> 1152 ret <16 x i8> %1 1153} 1154 1155define <2 x i64> @mul_v2i64_68_132(<2 x i64> %x) nounwind { 1156; X86-LABEL: mul_v2i64_68_132: 1157; X86: # %bb.0: 1158; X86-NEXT: movdqa {{.*#+}} xmm1 = [68,0,132,0] 1159; X86-NEXT: movdqa %xmm0, %xmm2 1160; X86-NEXT: pmuludq %xmm1, %xmm2 1161; X86-NEXT: psrlq $32, %xmm0 1162; X86-NEXT: pmuludq %xmm1, %xmm0 1163; X86-NEXT: psllq $32, %xmm0 1164; X86-NEXT: paddq %xmm2, %xmm0 1165; X86-NEXT: retl 1166; 1167; X64-LABEL: mul_v2i64_68_132: 1168; X64: # %bb.0: 1169; X64-NEXT: movdqa {{.*#+}} xmm1 = [68,132] 1170; X64-NEXT: movdqa %xmm0, %xmm2 1171; X64-NEXT: pmuludq %xmm1, %xmm2 1172; X64-NEXT: psrlq $32, %xmm0 1173; X64-NEXT: pmuludq %xmm1, %xmm0 1174; X64-NEXT: psllq $32, %xmm0 1175; X64-NEXT: paddq %xmm2, %xmm0 1176; X64-NEXT: retq 1177; 1178; X64-AVX-LABEL: mul_v2i64_68_132: 1179; X64-AVX: # %bb.0: 1180; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [68,132] 1181; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 1182; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm0 1183; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 1184; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0 1185; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0 1186; X64-AVX-NEXT: retq 1187 %mul = mul <2 x i64> %x, <i64 68, i64 132> 1188 ret <2 x i64> %mul 1189} 1190 1191define <2 x i64> @mul_v2i64_60_120(<2 x i64> %x) nounwind { 1192; X86-LABEL: mul_v2i64_60_120: 1193; X86: # %bb.0: 1194; X86-NEXT: movdqa {{.*#+}} xmm1 = [60,0,124,0] 1195; X86-NEXT: movdqa %xmm0, %xmm2 1196; X86-NEXT: pmuludq %xmm1, %xmm2 1197; X86-NEXT: psrlq $32, %xmm0 1198; X86-NEXT: pmuludq %xmm1, %xmm0 1199; X86-NEXT: psllq $32, %xmm0 1200; X86-NEXT: paddq %xmm2, %xmm0 1201; X86-NEXT: retl 1202; 1203; X64-LABEL: mul_v2i64_60_120: 1204; X64: # %bb.0: 1205; X64-NEXT: movdqa {{.*#+}} xmm1 = [60,124] 1206; X64-NEXT: movdqa %xmm0, %xmm2 1207; X64-NEXT: pmuludq %xmm1, %xmm2 1208; X64-NEXT: psrlq $32, %xmm0 1209; X64-NEXT: pmuludq %xmm1, %xmm0 1210; X64-NEXT: psllq $32, %xmm0 1211; X64-NEXT: paddq %xmm2, %xmm0 1212; X64-NEXT: retq 1213; 1214; X64-AVX-LABEL: mul_v2i64_60_120: 1215; X64-AVX: # %bb.0: 1216; X64-AVX-NEXT: vmovdqa {{.*#+}} xmm1 = [60,124] 1217; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm2 1218; X64-AVX-NEXT: vpsrlq $32, %xmm0, %xmm0 1219; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 1220; X64-AVX-NEXT: vpsllq $32, %xmm0, %xmm0 1221; X64-AVX-NEXT: vpaddq %xmm0, %xmm2, %xmm0 1222; X64-AVX-NEXT: retq 1223 %mul = mul <2 x i64> %x, <i64 60, i64 124> 1224 ret <2 x i64> %mul 1225} 1226 1227; We unfortunately can't see the zext that lives in the other basic block so we 1228; don't know that we only need one pmuludq to compute the full 64 bits. This 1229; sort of issue is more likely to occur when there is a loop and one of the 1230; multiply inputs is loop invariant. 1231; FIXME: We should be able to insert an AssertZExt for this. 1232define <2 x i64> @mul_v2i64_zext_cross_bb(<2 x i32>* %in, <2 x i32>* %y) { 1233; X86-LABEL: mul_v2i64_zext_cross_bb: 1234; X86: # %bb.0: 1235; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 1236; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 1237; X86-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero 1238; X86-NEXT: pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero 1239; X86-NEXT: pmuludq %xmm1, %xmm0 1240; X86-NEXT: retl 1241; 1242; X64-LABEL: mul_v2i64_zext_cross_bb: 1243; X64: # %bb.0: 1244; X64-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero 1245; X64-NEXT: pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero 1246; X64-NEXT: pmuludq %xmm1, %xmm0 1247; X64-NEXT: retq 1248; 1249; X64-AVX-LABEL: mul_v2i64_zext_cross_bb: 1250; X64-AVX: # %bb.0: 1251; X64-AVX-NEXT: vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero 1252; X64-AVX-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero 1253; X64-AVX-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 1254; X64-AVX-NEXT: retq 1255 %a = load <2 x i32>, <2 x i32>* %in 1256 %b = zext <2 x i32> %a to <2 x i64> 1257 br label %foo 1258 1259foo: 1260 %c = load <2 x i32>, <2 x i32>* %y 1261 %d = zext <2 x i32> %c to <2 x i64> 1262 %e = mul <2 x i64> %b, %d 1263 ret <2 x i64> %e 1264} 1265 1266define <4 x i64> @mul_v4i64_zext_cross_bb(<4 x i32>* %in, <4 x i32>* %y) { 1267; X86-LABEL: mul_v4i64_zext_cross_bb: 1268; X86: # %bb.0: 1269; X86-NEXT: movl {{[0-9]+}}(%esp), %eax 1270; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx 1271; X86-NEXT: pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero 1272; X86-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero 1273; X86-NEXT: pmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero 1274; X86-NEXT: pmuludq %xmm2, %xmm1 1275; X86-NEXT: pmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero 1276; X86-NEXT: pmuludq %xmm2, %xmm0 1277; X86-NEXT: retl 1278; 1279; X64-LABEL: mul_v4i64_zext_cross_bb: 1280; X64: # %bb.0: 1281; X64-NEXT: pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero 1282; X64-NEXT: pmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero 1283; X64-NEXT: pmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero 1284; X64-NEXT: pmuludq %xmm2, %xmm1 1285; X64-NEXT: pmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero 1286; X64-NEXT: pmuludq %xmm2, %xmm0 1287; X64-NEXT: retq 1288; 1289; X64-XOP-LABEL: mul_v4i64_zext_cross_bb: 1290; X64-XOP: # %bb.0: 1291; X64-XOP-NEXT: vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero 1292; X64-XOP-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero 1293; X64-XOP-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1294; X64-XOP-NEXT: vpmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero 1295; X64-XOP-NEXT: vpmovzxdq {{.*#+}} xmm2 = mem[0],zero,mem[1],zero 1296; X64-XOP-NEXT: vextractf128 $1, %ymm0, %xmm3 1297; X64-XOP-NEXT: vpmuludq %xmm2, %xmm3, %xmm2 1298; X64-XOP-NEXT: vpmuludq %xmm1, %xmm0, %xmm0 1299; X64-XOP-NEXT: vinsertf128 $1, %xmm2, %ymm0, %ymm0 1300; X64-XOP-NEXT: retq 1301; 1302; X64-AVX2-LABEL: mul_v4i64_zext_cross_bb: 1303; X64-AVX2: # %bb.0: 1304; X64-AVX2-NEXT: vpmovzxdq {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero 1305; X64-AVX2-NEXT: vpmovzxdq {{.*#+}} ymm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero 1306; X64-AVX2-NEXT: vpmuludq %ymm1, %ymm0, %ymm0 1307; X64-AVX2-NEXT: retq 1308 %a = load <4 x i32>, <4 x i32>* %in 1309 %b = zext <4 x i32> %a to <4 x i64> 1310 br label %foo 1311 1312foo: 1313 %c = load <4 x i32>, <4 x i32>* %y 1314 %d = zext <4 x i32> %c to <4 x i64> 1315 %e = mul <4 x i64> %b, %d 1316 ret <4 x i64> %e 1317} 1318