1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx,+f16c | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2,+f16c | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+f16c | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512
5
6;
7; Half to Float
8;
9
10define float @cvt_i16_to_f32(i16 %a0) {
11; ALL-LABEL: cvt_i16_to_f32:
12; ALL:       # BB#0:
13; ALL-NEXT:    movswl %di, %eax
14; ALL-NEXT:    vmovd %eax, %xmm0
15; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
16; ALL-NEXT:    retq
17  %1 = bitcast i16 %a0 to half
18  %2 = fpext half %1 to float
19  ret float %2
20}
21
22define <4 x float> @cvt_4i16_to_4f32(<4 x i16> %a0) {
23; ALL-LABEL: cvt_4i16_to_4f32:
24; ALL:       # BB#0:
25; ALL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
26; ALL-NEXT:    vmovq %xmm0, %rax
27; ALL-NEXT:    movq %rax, %rcx
28; ALL-NEXT:    movq %rax, %rdx
29; ALL-NEXT:    movswl %ax, %esi
30; ALL-NEXT:    shrl $16, %eax
31; ALL-NEXT:    shrq $32, %rcx
32; ALL-NEXT:    shrq $48, %rdx
33; ALL-NEXT:    movswl %dx, %edx
34; ALL-NEXT:    vmovd %edx, %xmm0
35; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
36; ALL-NEXT:    movswl %cx, %ecx
37; ALL-NEXT:    vmovd %ecx, %xmm1
38; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
39; ALL-NEXT:    cwtl
40; ALL-NEXT:    vmovd %eax, %xmm2
41; ALL-NEXT:    vcvtph2ps %xmm2, %xmm2
42; ALL-NEXT:    vmovd %esi, %xmm3
43; ALL-NEXT:    vcvtph2ps %xmm3, %xmm3
44; ALL-NEXT:    vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3]
45; ALL-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
46; ALL-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
47; ALL-NEXT:    retq
48  %1 = bitcast <4 x i16> %a0 to <4 x half>
49  %2 = fpext <4 x half> %1 to <4 x float>
50  ret <4 x float> %2
51}
52
53define <4 x float> @cvt_8i16_to_4f32(<8 x i16> %a0) {
54; ALL-LABEL: cvt_8i16_to_4f32:
55; ALL:       # BB#0:
56; ALL-NEXT:    vmovq %xmm0, %rax
57; ALL-NEXT:    movq %rax, %rcx
58; ALL-NEXT:    movq %rax, %rdx
59; ALL-NEXT:    movswl %ax, %esi
60; ALL-NEXT:    shrl $16, %eax
61; ALL-NEXT:    shrq $32, %rcx
62; ALL-NEXT:    shrq $48, %rdx
63; ALL-NEXT:    movswl %dx, %edx
64; ALL-NEXT:    vmovd %edx, %xmm0
65; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
66; ALL-NEXT:    movswl %cx, %ecx
67; ALL-NEXT:    vmovd %ecx, %xmm1
68; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
69; ALL-NEXT:    cwtl
70; ALL-NEXT:    vmovd %eax, %xmm2
71; ALL-NEXT:    vcvtph2ps %xmm2, %xmm2
72; ALL-NEXT:    vmovd %esi, %xmm3
73; ALL-NEXT:    vcvtph2ps %xmm3, %xmm3
74; ALL-NEXT:    vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3]
75; ALL-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
76; ALL-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
77; ALL-NEXT:    retq
78  %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
79  %2 = bitcast <4 x i16> %1 to <4 x half>
80  %3 = fpext <4 x half> %2 to <4 x float>
81  ret <4 x float> %3
82}
83
84define <8 x float> @cvt_8i16_to_8f32(<8 x i16> %a0) {
85; AVX1-LABEL: cvt_8i16_to_8f32:
86; AVX1:       # BB#0:
87; AVX1-NEXT:    vpextrq $1, %xmm0, %rdx
88; AVX1-NEXT:    movq %rdx, %r8
89; AVX1-NEXT:    movq %rdx, %r10
90; AVX1-NEXT:    movswl %dx, %r9d
91; AVX1-NEXT:    shrl $16, %edx
92; AVX1-NEXT:    shrq $32, %r8
93; AVX1-NEXT:    shrq $48, %r10
94; AVX1-NEXT:    vmovq %xmm0, %rdi
95; AVX1-NEXT:    movq %rdi, %rax
96; AVX1-NEXT:    movq %rdi, %rsi
97; AVX1-NEXT:    movswl %di, %ecx
98; AVX1-NEXT:    shrl $16, %edi
99; AVX1-NEXT:    shrq $32, %rax
100; AVX1-NEXT:    shrq $48, %rsi
101; AVX1-NEXT:    movswl %si, %esi
102; AVX1-NEXT:    vmovd %esi, %xmm0
103; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm0
104; AVX1-NEXT:    cwtl
105; AVX1-NEXT:    vmovd %eax, %xmm1
106; AVX1-NEXT:    vcvtph2ps %xmm1, %xmm1
107; AVX1-NEXT:    movswl %di, %eax
108; AVX1-NEXT:    vmovd %eax, %xmm2
109; AVX1-NEXT:    vcvtph2ps %xmm2, %xmm2
110; AVX1-NEXT:    vmovd %ecx, %xmm3
111; AVX1-NEXT:    vcvtph2ps %xmm3, %xmm3
112; AVX1-NEXT:    movswl %r10w, %eax
113; AVX1-NEXT:    vmovd %eax, %xmm4
114; AVX1-NEXT:    vcvtph2ps %xmm4, %xmm4
115; AVX1-NEXT:    movswl %r8w, %eax
116; AVX1-NEXT:    vmovd %eax, %xmm5
117; AVX1-NEXT:    vcvtph2ps %xmm5, %xmm5
118; AVX1-NEXT:    movswl %dx, %eax
119; AVX1-NEXT:    vmovd %eax, %xmm6
120; AVX1-NEXT:    vcvtph2ps %xmm6, %xmm6
121; AVX1-NEXT:    vmovd %r9d, %xmm7
122; AVX1-NEXT:    vcvtph2ps %xmm7, %xmm7
123; AVX1-NEXT:    vinsertps {{.*#+}} xmm6 = xmm7[0],xmm6[0],xmm7[2,3]
124; AVX1-NEXT:    vinsertps {{.*#+}} xmm5 = xmm6[0,1],xmm5[0],xmm6[3]
125; AVX1-NEXT:    vinsertps {{.*#+}} xmm4 = xmm5[0,1,2],xmm4[0]
126; AVX1-NEXT:    vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3]
127; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
128; AVX1-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
129; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
130; AVX1-NEXT:    retq
131;
132; AVX2-LABEL: cvt_8i16_to_8f32:
133; AVX2:       # BB#0:
134; AVX2-NEXT:    vpextrq $1, %xmm0, %rdx
135; AVX2-NEXT:    movq %rdx, %r8
136; AVX2-NEXT:    movq %rdx, %r10
137; AVX2-NEXT:    movswl %dx, %r9d
138; AVX2-NEXT:    shrl $16, %edx
139; AVX2-NEXT:    shrq $32, %r8
140; AVX2-NEXT:    shrq $48, %r10
141; AVX2-NEXT:    vmovq %xmm0, %rdi
142; AVX2-NEXT:    movq %rdi, %rax
143; AVX2-NEXT:    movq %rdi, %rsi
144; AVX2-NEXT:    movswl %di, %ecx
145; AVX2-NEXT:    shrl $16, %edi
146; AVX2-NEXT:    shrq $32, %rax
147; AVX2-NEXT:    shrq $48, %rsi
148; AVX2-NEXT:    movswl %si, %esi
149; AVX2-NEXT:    vmovd %esi, %xmm0
150; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm0
151; AVX2-NEXT:    cwtl
152; AVX2-NEXT:    vmovd %eax, %xmm1
153; AVX2-NEXT:    vcvtph2ps %xmm1, %xmm1
154; AVX2-NEXT:    movswl %di, %eax
155; AVX2-NEXT:    vmovd %eax, %xmm2
156; AVX2-NEXT:    vcvtph2ps %xmm2, %xmm2
157; AVX2-NEXT:    vmovd %ecx, %xmm3
158; AVX2-NEXT:    vcvtph2ps %xmm3, %xmm3
159; AVX2-NEXT:    movswl %r10w, %eax
160; AVX2-NEXT:    vmovd %eax, %xmm4
161; AVX2-NEXT:    vcvtph2ps %xmm4, %xmm4
162; AVX2-NEXT:    movswl %r8w, %eax
163; AVX2-NEXT:    vmovd %eax, %xmm5
164; AVX2-NEXT:    vcvtph2ps %xmm5, %xmm5
165; AVX2-NEXT:    movswl %dx, %eax
166; AVX2-NEXT:    vmovd %eax, %xmm6
167; AVX2-NEXT:    vcvtph2ps %xmm6, %xmm6
168; AVX2-NEXT:    vmovd %r9d, %xmm7
169; AVX2-NEXT:    vcvtph2ps %xmm7, %xmm7
170; AVX2-NEXT:    vinsertps {{.*#+}} xmm6 = xmm7[0],xmm6[0],xmm7[2,3]
171; AVX2-NEXT:    vinsertps {{.*#+}} xmm5 = xmm6[0,1],xmm5[0],xmm6[3]
172; AVX2-NEXT:    vinsertps {{.*#+}} xmm4 = xmm5[0,1,2],xmm4[0]
173; AVX2-NEXT:    vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3]
174; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
175; AVX2-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
176; AVX2-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
177; AVX2-NEXT:    retq
178;
179; AVX512-LABEL: cvt_8i16_to_8f32:
180; AVX512:       # BB#0:
181; AVX512-NEXT:    vpextrq $1, %xmm0, %rdx
182; AVX512-NEXT:    movq %rdx, %r8
183; AVX512-NEXT:    movq %rdx, %r10
184; AVX512-NEXT:    movswl %dx, %r9d
185; AVX512-NEXT:    shrl $16, %edx
186; AVX512-NEXT:    shrq $32, %r8
187; AVX512-NEXT:    shrq $48, %r10
188; AVX512-NEXT:    vmovq %xmm0, %rdi
189; AVX512-NEXT:    movq %rdi, %rax
190; AVX512-NEXT:    movq %rdi, %rsi
191; AVX512-NEXT:    movswl %di, %ecx
192; AVX512-NEXT:    shrl $16, %edi
193; AVX512-NEXT:    shrq $32, %rax
194; AVX512-NEXT:    shrq $48, %rsi
195; AVX512-NEXT:    movswl %si, %esi
196; AVX512-NEXT:    vmovd %esi, %xmm0
197; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
198; AVX512-NEXT:    cwtl
199; AVX512-NEXT:    vmovd %eax, %xmm1
200; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm1
201; AVX512-NEXT:    movswl %di, %eax
202; AVX512-NEXT:    vmovd %eax, %xmm2
203; AVX512-NEXT:    vcvtph2ps %xmm2, %xmm2
204; AVX512-NEXT:    vmovd %ecx, %xmm3
205; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm3
206; AVX512-NEXT:    movswl %r10w, %eax
207; AVX512-NEXT:    vmovd %eax, %xmm4
208; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
209; AVX512-NEXT:    movswl %r8w, %eax
210; AVX512-NEXT:    vmovd %eax, %xmm5
211; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
212; AVX512-NEXT:    movswl %dx, %eax
213; AVX512-NEXT:    vmovd %eax, %xmm6
214; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
215; AVX512-NEXT:    vmovd %r9d, %xmm7
216; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
217; AVX512-NEXT:    vinsertps {{.*#+}} xmm6 = xmm7[0],xmm6[0],xmm7[2,3]
218; AVX512-NEXT:    vinsertps {{.*#+}} xmm5 = xmm6[0,1],xmm5[0],xmm6[3]
219; AVX512-NEXT:    vinsertps {{.*#+}} xmm4 = xmm5[0,1,2],xmm4[0]
220; AVX512-NEXT:    vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3]
221; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
222; AVX512-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
223; AVX512-NEXT:    vinserti128 $1, %xmm4, %ymm0, %ymm0
224; AVX512-NEXT:    retq
225  %1 = bitcast <8 x i16> %a0 to <8 x half>
226  %2 = fpext <8 x half> %1 to <8 x float>
227  ret <8 x float> %2
228}
229
230define <16 x float> @cvt_16i16_to_16f32(<16 x i16> %a0) {
231; AVX1-LABEL: cvt_16i16_to_16f32:
232; AVX1:       # BB#0:
233; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm4
234; AVX1-NEXT:    vmovq %xmm4, %rax
235; AVX1-NEXT:    movq %rax, %rcx
236; AVX1-NEXT:    shrq $48, %rcx
237; AVX1-NEXT:    movswl %cx, %ecx
238; AVX1-NEXT:    vmovd %ecx, %xmm8
239; AVX1-NEXT:    movq %rax, %rcx
240; AVX1-NEXT:    shrq $32, %rcx
241; AVX1-NEXT:    movswl %cx, %ecx
242; AVX1-NEXT:    vmovd %ecx, %xmm9
243; AVX1-NEXT:    movswl %ax, %ecx
244; AVX1-NEXT:    shrl $16, %eax
245; AVX1-NEXT:    cwtl
246; AVX1-NEXT:    vmovd %eax, %xmm10
247; AVX1-NEXT:    vpextrq $1, %xmm4, %rax
248; AVX1-NEXT:    vmovd %ecx, %xmm11
249; AVX1-NEXT:    movq %rax, %rcx
250; AVX1-NEXT:    shrq $48, %rcx
251; AVX1-NEXT:    movswl %cx, %ecx
252; AVX1-NEXT:    vmovd %ecx, %xmm12
253; AVX1-NEXT:    movq %rax, %rcx
254; AVX1-NEXT:    shrq $32, %rcx
255; AVX1-NEXT:    movswl %cx, %ecx
256; AVX1-NEXT:    vmovd %ecx, %xmm13
257; AVX1-NEXT:    movswl %ax, %ecx
258; AVX1-NEXT:    shrl $16, %eax
259; AVX1-NEXT:    cwtl
260; AVX1-NEXT:    vmovd %eax, %xmm14
261; AVX1-NEXT:    vmovq %xmm0, %rax
262; AVX1-NEXT:    vmovd %ecx, %xmm15
263; AVX1-NEXT:    movq %rax, %rcx
264; AVX1-NEXT:    shrq $48, %rcx
265; AVX1-NEXT:    movswl %cx, %ecx
266; AVX1-NEXT:    vmovd %ecx, %xmm2
267; AVX1-NEXT:    movq %rax, %rcx
268; AVX1-NEXT:    shrq $32, %rcx
269; AVX1-NEXT:    movswl %cx, %ecx
270; AVX1-NEXT:    vmovd %ecx, %xmm3
271; AVX1-NEXT:    movswl %ax, %ecx
272; AVX1-NEXT:    shrl $16, %eax
273; AVX1-NEXT:    cwtl
274; AVX1-NEXT:    vmovd %eax, %xmm4
275; AVX1-NEXT:    vpextrq $1, %xmm0, %rax
276; AVX1-NEXT:    vmovd %ecx, %xmm0
277; AVX1-NEXT:    movq %rax, %rcx
278; AVX1-NEXT:    shrq $48, %rcx
279; AVX1-NEXT:    movswl %cx, %ecx
280; AVX1-NEXT:    vmovd %ecx, %xmm5
281; AVX1-NEXT:    movq %rax, %rcx
282; AVX1-NEXT:    shrq $32, %rcx
283; AVX1-NEXT:    movswl %cx, %ecx
284; AVX1-NEXT:    vmovd %ecx, %xmm6
285; AVX1-NEXT:    movl %eax, %ecx
286; AVX1-NEXT:    shrl $16, %ecx
287; AVX1-NEXT:    movswl %cx, %ecx
288; AVX1-NEXT:    vmovd %ecx, %xmm7
289; AVX1-NEXT:    cwtl
290; AVX1-NEXT:    vmovd %eax, %xmm1
291; AVX1-NEXT:    vcvtph2ps %xmm8, %xmm8
292; AVX1-NEXT:    vcvtph2ps %xmm9, %xmm9
293; AVX1-NEXT:    vcvtph2ps %xmm10, %xmm10
294; AVX1-NEXT:    vcvtph2ps %xmm11, %xmm11
295; AVX1-NEXT:    vcvtph2ps %xmm12, %xmm12
296; AVX1-NEXT:    vcvtph2ps %xmm13, %xmm13
297; AVX1-NEXT:    vcvtph2ps %xmm14, %xmm14
298; AVX1-NEXT:    vcvtph2ps %xmm15, %xmm15
299; AVX1-NEXT:    vcvtph2ps %xmm2, %xmm2
300; AVX1-NEXT:    vcvtph2ps %xmm3, %xmm3
301; AVX1-NEXT:    vcvtph2ps %xmm4, %xmm4
302; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm0
303; AVX1-NEXT:    vcvtph2ps %xmm5, %xmm5
304; AVX1-NEXT:    vcvtph2ps %xmm6, %xmm6
305; AVX1-NEXT:    vcvtph2ps %xmm7, %xmm7
306; AVX1-NEXT:    vcvtph2ps %xmm1, %xmm1
307; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0],xmm7[0],xmm1[2,3]
308; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm6[0],xmm1[3]
309; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm5[0]
310; AVX1-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[2,3]
311; AVX1-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm3[0],xmm0[3]
312; AVX1-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm2[0]
313; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
314; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm15[0],xmm14[0],xmm15[2,3]
315; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm13[0],xmm1[3]
316; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm12[0]
317; AVX1-NEXT:    vinsertps {{.*#+}} xmm2 = xmm11[0],xmm10[0],xmm11[2,3]
318; AVX1-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm9[0],xmm2[3]
319; AVX1-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm8[0]
320; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
321; AVX1-NEXT:    retq
322;
323; AVX2-LABEL: cvt_16i16_to_16f32:
324; AVX2:       # BB#0:
325; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm4
326; AVX2-NEXT:    vmovq %xmm4, %rax
327; AVX2-NEXT:    movq %rax, %rcx
328; AVX2-NEXT:    shrq $48, %rcx
329; AVX2-NEXT:    movswl %cx, %ecx
330; AVX2-NEXT:    vmovd %ecx, %xmm8
331; AVX2-NEXT:    movq %rax, %rcx
332; AVX2-NEXT:    shrq $32, %rcx
333; AVX2-NEXT:    movswl %cx, %ecx
334; AVX2-NEXT:    vmovd %ecx, %xmm9
335; AVX2-NEXT:    movswl %ax, %ecx
336; AVX2-NEXT:    shrl $16, %eax
337; AVX2-NEXT:    cwtl
338; AVX2-NEXT:    vmovd %eax, %xmm10
339; AVX2-NEXT:    vpextrq $1, %xmm4, %rax
340; AVX2-NEXT:    vmovd %ecx, %xmm11
341; AVX2-NEXT:    movq %rax, %rcx
342; AVX2-NEXT:    shrq $48, %rcx
343; AVX2-NEXT:    movswl %cx, %ecx
344; AVX2-NEXT:    vmovd %ecx, %xmm12
345; AVX2-NEXT:    movq %rax, %rcx
346; AVX2-NEXT:    shrq $32, %rcx
347; AVX2-NEXT:    movswl %cx, %ecx
348; AVX2-NEXT:    vmovd %ecx, %xmm13
349; AVX2-NEXT:    movswl %ax, %ecx
350; AVX2-NEXT:    shrl $16, %eax
351; AVX2-NEXT:    cwtl
352; AVX2-NEXT:    vmovd %eax, %xmm14
353; AVX2-NEXT:    vmovq %xmm0, %rax
354; AVX2-NEXT:    vmovd %ecx, %xmm15
355; AVX2-NEXT:    movq %rax, %rcx
356; AVX2-NEXT:    shrq $48, %rcx
357; AVX2-NEXT:    movswl %cx, %ecx
358; AVX2-NEXT:    vmovd %ecx, %xmm2
359; AVX2-NEXT:    movq %rax, %rcx
360; AVX2-NEXT:    shrq $32, %rcx
361; AVX2-NEXT:    movswl %cx, %ecx
362; AVX2-NEXT:    vmovd %ecx, %xmm3
363; AVX2-NEXT:    movswl %ax, %ecx
364; AVX2-NEXT:    shrl $16, %eax
365; AVX2-NEXT:    cwtl
366; AVX2-NEXT:    vmovd %eax, %xmm4
367; AVX2-NEXT:    vpextrq $1, %xmm0, %rax
368; AVX2-NEXT:    vmovd %ecx, %xmm0
369; AVX2-NEXT:    movq %rax, %rcx
370; AVX2-NEXT:    shrq $48, %rcx
371; AVX2-NEXT:    movswl %cx, %ecx
372; AVX2-NEXT:    vmovd %ecx, %xmm5
373; AVX2-NEXT:    movq %rax, %rcx
374; AVX2-NEXT:    shrq $32, %rcx
375; AVX2-NEXT:    movswl %cx, %ecx
376; AVX2-NEXT:    vmovd %ecx, %xmm6
377; AVX2-NEXT:    movl %eax, %ecx
378; AVX2-NEXT:    shrl $16, %ecx
379; AVX2-NEXT:    movswl %cx, %ecx
380; AVX2-NEXT:    vmovd %ecx, %xmm7
381; AVX2-NEXT:    cwtl
382; AVX2-NEXT:    vmovd %eax, %xmm1
383; AVX2-NEXT:    vcvtph2ps %xmm8, %xmm8
384; AVX2-NEXT:    vcvtph2ps %xmm9, %xmm9
385; AVX2-NEXT:    vcvtph2ps %xmm10, %xmm10
386; AVX2-NEXT:    vcvtph2ps %xmm11, %xmm11
387; AVX2-NEXT:    vcvtph2ps %xmm12, %xmm12
388; AVX2-NEXT:    vcvtph2ps %xmm13, %xmm13
389; AVX2-NEXT:    vcvtph2ps %xmm14, %xmm14
390; AVX2-NEXT:    vcvtph2ps %xmm15, %xmm15
391; AVX2-NEXT:    vcvtph2ps %xmm2, %xmm2
392; AVX2-NEXT:    vcvtph2ps %xmm3, %xmm3
393; AVX2-NEXT:    vcvtph2ps %xmm4, %xmm4
394; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm0
395; AVX2-NEXT:    vcvtph2ps %xmm5, %xmm5
396; AVX2-NEXT:    vcvtph2ps %xmm6, %xmm6
397; AVX2-NEXT:    vcvtph2ps %xmm7, %xmm7
398; AVX2-NEXT:    vcvtph2ps %xmm1, %xmm1
399; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0],xmm7[0],xmm1[2,3]
400; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm6[0],xmm1[3]
401; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm5[0]
402; AVX2-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[2,3]
403; AVX2-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm3[0],xmm0[3]
404; AVX2-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm2[0]
405; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
406; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm15[0],xmm14[0],xmm15[2,3]
407; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm13[0],xmm1[3]
408; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm12[0]
409; AVX2-NEXT:    vinsertps {{.*#+}} xmm2 = xmm11[0],xmm10[0],xmm11[2,3]
410; AVX2-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm9[0],xmm2[3]
411; AVX2-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm8[0]
412; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
413; AVX2-NEXT:    retq
414;
415; AVX512-LABEL: cvt_16i16_to_16f32:
416; AVX512:       # BB#0:
417; AVX512-NEXT:    vextracti128 $1, %ymm0, %xmm10
418; AVX512-NEXT:    vmovq %xmm0, %rax
419; AVX512-NEXT:    movq %rax, %rcx
420; AVX512-NEXT:    shrq $48, %rcx
421; AVX512-NEXT:    movswl %cx, %ecx
422; AVX512-NEXT:    vmovd %ecx, %xmm8
423; AVX512-NEXT:    movq %rax, %rcx
424; AVX512-NEXT:    shrq $32, %rcx
425; AVX512-NEXT:    movswl %cx, %ecx
426; AVX512-NEXT:    vmovd %ecx, %xmm9
427; AVX512-NEXT:    movswl %ax, %ecx
428; AVX512-NEXT:    shrl $16, %eax
429; AVX512-NEXT:    cwtl
430; AVX512-NEXT:    vmovd %eax, %xmm11
431; AVX512-NEXT:    vpextrq $1, %xmm0, %rax
432; AVX512-NEXT:    vmovd %ecx, %xmm12
433; AVX512-NEXT:    movq %rax, %rcx
434; AVX512-NEXT:    shrq $48, %rcx
435; AVX512-NEXT:    movswl %cx, %ecx
436; AVX512-NEXT:    vmovd %ecx, %xmm13
437; AVX512-NEXT:    movq %rax, %rcx
438; AVX512-NEXT:    shrq $32, %rcx
439; AVX512-NEXT:    movswl %cx, %ecx
440; AVX512-NEXT:    vmovd %ecx, %xmm14
441; AVX512-NEXT:    movswl %ax, %ecx
442; AVX512-NEXT:    shrl $16, %eax
443; AVX512-NEXT:    cwtl
444; AVX512-NEXT:    vmovd %eax, %xmm15
445; AVX512-NEXT:    vmovq %xmm10, %rax
446; AVX512-NEXT:    vmovd %ecx, %xmm2
447; AVX512-NEXT:    movq %rax, %rcx
448; AVX512-NEXT:    shrq $48, %rcx
449; AVX512-NEXT:    movswl %cx, %ecx
450; AVX512-NEXT:    vmovd %ecx, %xmm3
451; AVX512-NEXT:    movq %rax, %rcx
452; AVX512-NEXT:    shrq $32, %rcx
453; AVX512-NEXT:    movswl %cx, %ecx
454; AVX512-NEXT:    vmovd %ecx, %xmm1
455; AVX512-NEXT:    movswl %ax, %ecx
456; AVX512-NEXT:    shrl $16, %eax
457; AVX512-NEXT:    cwtl
458; AVX512-NEXT:    vmovd %eax, %xmm4
459; AVX512-NEXT:    vpextrq $1, %xmm10, %rax
460; AVX512-NEXT:    vmovd %ecx, %xmm10
461; AVX512-NEXT:    movq %rax, %rcx
462; AVX512-NEXT:    shrq $48, %rcx
463; AVX512-NEXT:    movswl %cx, %ecx
464; AVX512-NEXT:    vmovd %ecx, %xmm5
465; AVX512-NEXT:    movq %rax, %rcx
466; AVX512-NEXT:    shrq $32, %rcx
467; AVX512-NEXT:    movswl %cx, %ecx
468; AVX512-NEXT:    vmovd %ecx, %xmm6
469; AVX512-NEXT:    movl %eax, %ecx
470; AVX512-NEXT:    shrl $16, %ecx
471; AVX512-NEXT:    movswl %cx, %ecx
472; AVX512-NEXT:    vmovd %ecx, %xmm7
473; AVX512-NEXT:    cwtl
474; AVX512-NEXT:    vmovd %eax, %xmm0
475; AVX512-NEXT:    vcvtph2ps %xmm8, %xmm8
476; AVX512-NEXT:    vcvtph2ps %xmm9, %xmm9
477; AVX512-NEXT:    vcvtph2ps %xmm11, %xmm11
478; AVX512-NEXT:    vcvtph2ps %xmm12, %xmm12
479; AVX512-NEXT:    vcvtph2ps %xmm13, %xmm13
480; AVX512-NEXT:    vcvtph2ps %xmm14, %xmm14
481; AVX512-NEXT:    vcvtph2ps %xmm15, %xmm15
482; AVX512-NEXT:    vcvtph2ps %xmm2, %xmm2
483; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm3
484; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm1
485; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
486; AVX512-NEXT:    vcvtph2ps %xmm10, %xmm10
487; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
488; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
489; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
490; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
491; AVX512-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0],xmm7[0],xmm0[2,3]
492; AVX512-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm6[0],xmm0[3]
493; AVX512-NEXT:    vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm5[0]
494; AVX512-NEXT:    vinsertps {{.*#+}} xmm4 = xmm10[0],xmm4[0],xmm10[2,3]
495; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm4[0,1],xmm1[0],xmm4[3]
496; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm3[0]
497; AVX512-NEXT:    vinserti128 $1, %xmm0, %ymm1, %ymm0
498; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0],xmm15[0],xmm2[2,3]
499; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm14[0],xmm1[3]
500; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm13[0]
501; AVX512-NEXT:    vinsertps {{.*#+}} xmm2 = xmm12[0],xmm11[0],xmm12[2,3]
502; AVX512-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm9[0],xmm2[3]
503; AVX512-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm8[0]
504; AVX512-NEXT:    vinserti128 $1, %xmm1, %ymm2, %ymm1
505; AVX512-NEXT:    vinsertf64x4 $1, %ymm0, %zmm1, %zmm0
506; AVX512-NEXT:    retq
507  %1 = bitcast <16 x i16> %a0 to <16 x half>
508  %2 = fpext <16 x half> %1 to <16 x float>
509  ret <16 x float> %2
510}
511
512;
513; Half to Float (Load)
514;
515
516define float @load_cvt_i16_to_f32(i16* %a0) {
517; ALL-LABEL: load_cvt_i16_to_f32:
518; ALL:       # BB#0:
519; ALL-NEXT:    movswl (%rdi), %eax
520; ALL-NEXT:    vmovd %eax, %xmm0
521; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
522; ALL-NEXT:    retq
523  %1 = load i16, i16* %a0
524  %2 = bitcast i16 %1 to half
525  %3 = fpext half %2 to float
526  ret float %3
527}
528
529define <4 x float> @load_cvt_4i16_to_4f32(<4 x i16>* %a0) {
530; ALL-LABEL: load_cvt_4i16_to_4f32:
531; ALL:       # BB#0:
532; ALL-NEXT:    movswl 6(%rdi), %eax
533; ALL-NEXT:    vmovd %eax, %xmm0
534; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
535; ALL-NEXT:    movswl 4(%rdi), %eax
536; ALL-NEXT:    vmovd %eax, %xmm1
537; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
538; ALL-NEXT:    movswl (%rdi), %eax
539; ALL-NEXT:    vmovd %eax, %xmm2
540; ALL-NEXT:    vcvtph2ps %xmm2, %xmm2
541; ALL-NEXT:    movswl 2(%rdi), %eax
542; ALL-NEXT:    vmovd %eax, %xmm3
543; ALL-NEXT:    vcvtph2ps %xmm3, %xmm3
544; ALL-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
545; ALL-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
546; ALL-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
547; ALL-NEXT:    retq
548  %1 = load <4 x i16>, <4 x i16>* %a0
549  %2 = bitcast <4 x i16> %1 to <4 x half>
550  %3 = fpext <4 x half> %2 to <4 x float>
551  ret <4 x float> %3
552}
553
554define <4 x float> @load_cvt_8i16_to_4f32(<8 x i16>* %a0) {
555; ALL-LABEL: load_cvt_8i16_to_4f32:
556; ALL:       # BB#0:
557; ALL-NEXT:    movq (%rdi), %rax
558; ALL-NEXT:    movq %rax, %rcx
559; ALL-NEXT:    movq %rax, %rdx
560; ALL-NEXT:    movswl %ax, %esi
561; ALL-NEXT:    shrl $16, %eax
562; ALL-NEXT:    shrq $32, %rcx
563; ALL-NEXT:    shrq $48, %rdx
564; ALL-NEXT:    movswl %dx, %edx
565; ALL-NEXT:    vmovd %edx, %xmm0
566; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
567; ALL-NEXT:    movswl %cx, %ecx
568; ALL-NEXT:    vmovd %ecx, %xmm1
569; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
570; ALL-NEXT:    cwtl
571; ALL-NEXT:    vmovd %eax, %xmm2
572; ALL-NEXT:    vcvtph2ps %xmm2, %xmm2
573; ALL-NEXT:    vmovd %esi, %xmm3
574; ALL-NEXT:    vcvtph2ps %xmm3, %xmm3
575; ALL-NEXT:    vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3]
576; ALL-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
577; ALL-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
578; ALL-NEXT:    retq
579  %1 = load <8 x i16>, <8 x i16>* %a0
580  %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
581  %3 = bitcast <4 x i16> %2 to <4 x half>
582  %4 = fpext <4 x half> %3 to <4 x float>
583  ret <4 x float> %4
584}
585
586define <8 x float> @load_cvt_8i16_to_8f32(<8 x i16>* %a0) {
587; AVX1-LABEL: load_cvt_8i16_to_8f32:
588; AVX1:       # BB#0:
589; AVX1-NEXT:    movswl 6(%rdi), %eax
590; AVX1-NEXT:    vmovd %eax, %xmm0
591; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm0
592; AVX1-NEXT:    movswl 4(%rdi), %eax
593; AVX1-NEXT:    vmovd %eax, %xmm1
594; AVX1-NEXT:    vcvtph2ps %xmm1, %xmm1
595; AVX1-NEXT:    movswl (%rdi), %eax
596; AVX1-NEXT:    vmovd %eax, %xmm2
597; AVX1-NEXT:    vcvtph2ps %xmm2, %xmm2
598; AVX1-NEXT:    movswl 2(%rdi), %eax
599; AVX1-NEXT:    vmovd %eax, %xmm3
600; AVX1-NEXT:    vcvtph2ps %xmm3, %xmm3
601; AVX1-NEXT:    movswl 14(%rdi), %eax
602; AVX1-NEXT:    vmovd %eax, %xmm4
603; AVX1-NEXT:    vcvtph2ps %xmm4, %xmm4
604; AVX1-NEXT:    movswl 12(%rdi), %eax
605; AVX1-NEXT:    vmovd %eax, %xmm5
606; AVX1-NEXT:    vcvtph2ps %xmm5, %xmm5
607; AVX1-NEXT:    movswl 8(%rdi), %eax
608; AVX1-NEXT:    vmovd %eax, %xmm6
609; AVX1-NEXT:    vcvtph2ps %xmm6, %xmm6
610; AVX1-NEXT:    movswl 10(%rdi), %eax
611; AVX1-NEXT:    vmovd %eax, %xmm7
612; AVX1-NEXT:    vcvtph2ps %xmm7, %xmm7
613; AVX1-NEXT:    vinsertps {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[2,3]
614; AVX1-NEXT:    vinsertps {{.*#+}} xmm5 = xmm6[0,1],xmm5[0],xmm6[3]
615; AVX1-NEXT:    vinsertps {{.*#+}} xmm4 = xmm5[0,1,2],xmm4[0]
616; AVX1-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
617; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
618; AVX1-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
619; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
620; AVX1-NEXT:    retq
621;
622; AVX2-LABEL: load_cvt_8i16_to_8f32:
623; AVX2:       # BB#0:
624; AVX2-NEXT:    movswl 6(%rdi), %eax
625; AVX2-NEXT:    vmovd %eax, %xmm0
626; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm0
627; AVX2-NEXT:    movswl 4(%rdi), %eax
628; AVX2-NEXT:    vmovd %eax, %xmm1
629; AVX2-NEXT:    vcvtph2ps %xmm1, %xmm1
630; AVX2-NEXT:    movswl (%rdi), %eax
631; AVX2-NEXT:    vmovd %eax, %xmm2
632; AVX2-NEXT:    vcvtph2ps %xmm2, %xmm2
633; AVX2-NEXT:    movswl 2(%rdi), %eax
634; AVX2-NEXT:    vmovd %eax, %xmm3
635; AVX2-NEXT:    vcvtph2ps %xmm3, %xmm3
636; AVX2-NEXT:    movswl 14(%rdi), %eax
637; AVX2-NEXT:    vmovd %eax, %xmm4
638; AVX2-NEXT:    vcvtph2ps %xmm4, %xmm4
639; AVX2-NEXT:    movswl 12(%rdi), %eax
640; AVX2-NEXT:    vmovd %eax, %xmm5
641; AVX2-NEXT:    vcvtph2ps %xmm5, %xmm5
642; AVX2-NEXT:    movswl 8(%rdi), %eax
643; AVX2-NEXT:    vmovd %eax, %xmm6
644; AVX2-NEXT:    vcvtph2ps %xmm6, %xmm6
645; AVX2-NEXT:    movswl 10(%rdi), %eax
646; AVX2-NEXT:    vmovd %eax, %xmm7
647; AVX2-NEXT:    vcvtph2ps %xmm7, %xmm7
648; AVX2-NEXT:    vinsertps {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[2,3]
649; AVX2-NEXT:    vinsertps {{.*#+}} xmm5 = xmm6[0,1],xmm5[0],xmm6[3]
650; AVX2-NEXT:    vinsertps {{.*#+}} xmm4 = xmm5[0,1,2],xmm4[0]
651; AVX2-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
652; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
653; AVX2-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
654; AVX2-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
655; AVX2-NEXT:    retq
656;
657; AVX512-LABEL: load_cvt_8i16_to_8f32:
658; AVX512:       # BB#0:
659; AVX512-NEXT:    movswl 6(%rdi), %eax
660; AVX512-NEXT:    vmovd %eax, %xmm0
661; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
662; AVX512-NEXT:    movswl 4(%rdi), %eax
663; AVX512-NEXT:    vmovd %eax, %xmm1
664; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm1
665; AVX512-NEXT:    movswl (%rdi), %eax
666; AVX512-NEXT:    vmovd %eax, %xmm2
667; AVX512-NEXT:    vcvtph2ps %xmm2, %xmm2
668; AVX512-NEXT:    movswl 2(%rdi), %eax
669; AVX512-NEXT:    vmovd %eax, %xmm3
670; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm3
671; AVX512-NEXT:    movswl 14(%rdi), %eax
672; AVX512-NEXT:    vmovd %eax, %xmm4
673; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
674; AVX512-NEXT:    movswl 12(%rdi), %eax
675; AVX512-NEXT:    vmovd %eax, %xmm5
676; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
677; AVX512-NEXT:    movswl 8(%rdi), %eax
678; AVX512-NEXT:    vmovd %eax, %xmm6
679; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
680; AVX512-NEXT:    movswl 10(%rdi), %eax
681; AVX512-NEXT:    vmovd %eax, %xmm7
682; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
683; AVX512-NEXT:    vinsertps {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[2,3]
684; AVX512-NEXT:    vinsertps {{.*#+}} xmm5 = xmm6[0,1],xmm5[0],xmm6[3]
685; AVX512-NEXT:    vinsertps {{.*#+}} xmm4 = xmm5[0,1,2],xmm4[0]
686; AVX512-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
687; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
688; AVX512-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
689; AVX512-NEXT:    vinserti128 $1, %xmm4, %ymm0, %ymm0
690; AVX512-NEXT:    retq
691  %1 = load <8 x i16>, <8 x i16>* %a0
692  %2 = bitcast <8 x i16> %1 to <8 x half>
693  %3 = fpext <8 x half> %2 to <8 x float>
694  ret <8 x float> %3
695}
696
697define <16 x float> @load_cvt_16i16_to_16f32(<16 x i16>* %a0) {
698; AVX1-LABEL: load_cvt_16i16_to_16f32:
699; AVX1:       # BB#0:
700; AVX1-NEXT:    movswl 22(%rdi), %eax
701; AVX1-NEXT:    vmovd %eax, %xmm0
702; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm8
703; AVX1-NEXT:    movswl 20(%rdi), %eax
704; AVX1-NEXT:    vmovd %eax, %xmm0
705; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm9
706; AVX1-NEXT:    movswl 16(%rdi), %eax
707; AVX1-NEXT:    vmovd %eax, %xmm0
708; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm10
709; AVX1-NEXT:    movswl 18(%rdi), %eax
710; AVX1-NEXT:    vmovd %eax, %xmm0
711; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm11
712; AVX1-NEXT:    movswl 30(%rdi), %eax
713; AVX1-NEXT:    vmovd %eax, %xmm0
714; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm12
715; AVX1-NEXT:    movswl 28(%rdi), %eax
716; AVX1-NEXT:    vmovd %eax, %xmm0
717; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm13
718; AVX1-NEXT:    movswl 24(%rdi), %eax
719; AVX1-NEXT:    vmovd %eax, %xmm0
720; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm14
721; AVX1-NEXT:    movswl 26(%rdi), %eax
722; AVX1-NEXT:    vmovd %eax, %xmm0
723; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm15
724; AVX1-NEXT:    movswl 6(%rdi), %eax
725; AVX1-NEXT:    vmovd %eax, %xmm0
726; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm0
727; AVX1-NEXT:    movswl 4(%rdi), %eax
728; AVX1-NEXT:    vmovd %eax, %xmm2
729; AVX1-NEXT:    vcvtph2ps %xmm2, %xmm2
730; AVX1-NEXT:    movswl (%rdi), %eax
731; AVX1-NEXT:    vmovd %eax, %xmm3
732; AVX1-NEXT:    vcvtph2ps %xmm3, %xmm3
733; AVX1-NEXT:    movswl 2(%rdi), %eax
734; AVX1-NEXT:    vmovd %eax, %xmm4
735; AVX1-NEXT:    vcvtph2ps %xmm4, %xmm4
736; AVX1-NEXT:    movswl 14(%rdi), %eax
737; AVX1-NEXT:    vmovd %eax, %xmm5
738; AVX1-NEXT:    vcvtph2ps %xmm5, %xmm5
739; AVX1-NEXT:    movswl 12(%rdi), %eax
740; AVX1-NEXT:    vmovd %eax, %xmm6
741; AVX1-NEXT:    vcvtph2ps %xmm6, %xmm6
742; AVX1-NEXT:    movswl 8(%rdi), %eax
743; AVX1-NEXT:    vmovd %eax, %xmm7
744; AVX1-NEXT:    vcvtph2ps %xmm7, %xmm7
745; AVX1-NEXT:    movswl 10(%rdi), %eax
746; AVX1-NEXT:    vmovd %eax, %xmm1
747; AVX1-NEXT:    vcvtph2ps %xmm1, %xmm1
748; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm7[0],xmm1[0],xmm7[2,3]
749; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm6[0],xmm1[3]
750; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm5[0]
751; AVX1-NEXT:    vinsertps {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[2,3]
752; AVX1-NEXT:    vinsertps {{.*#+}} xmm2 = xmm3[0,1],xmm2[0],xmm3[3]
753; AVX1-NEXT:    vinsertps {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[0]
754; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
755; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm14[0],xmm15[0],xmm14[2,3]
756; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm13[0],xmm1[3]
757; AVX1-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm12[0]
758; AVX1-NEXT:    vinsertps {{.*#+}} xmm2 = xmm10[0],xmm11[0],xmm10[2,3]
759; AVX1-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm9[0],xmm2[3]
760; AVX1-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm8[0]
761; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
762; AVX1-NEXT:    retq
763;
764; AVX2-LABEL: load_cvt_16i16_to_16f32:
765; AVX2:       # BB#0:
766; AVX2-NEXT:    movswl 22(%rdi), %eax
767; AVX2-NEXT:    vmovd %eax, %xmm0
768; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm8
769; AVX2-NEXT:    movswl 20(%rdi), %eax
770; AVX2-NEXT:    vmovd %eax, %xmm0
771; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm9
772; AVX2-NEXT:    movswl 16(%rdi), %eax
773; AVX2-NEXT:    vmovd %eax, %xmm0
774; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm10
775; AVX2-NEXT:    movswl 18(%rdi), %eax
776; AVX2-NEXT:    vmovd %eax, %xmm0
777; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm11
778; AVX2-NEXT:    movswl 30(%rdi), %eax
779; AVX2-NEXT:    vmovd %eax, %xmm0
780; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm12
781; AVX2-NEXT:    movswl 28(%rdi), %eax
782; AVX2-NEXT:    vmovd %eax, %xmm0
783; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm13
784; AVX2-NEXT:    movswl 24(%rdi), %eax
785; AVX2-NEXT:    vmovd %eax, %xmm0
786; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm14
787; AVX2-NEXT:    movswl 26(%rdi), %eax
788; AVX2-NEXT:    vmovd %eax, %xmm0
789; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm15
790; AVX2-NEXT:    movswl 6(%rdi), %eax
791; AVX2-NEXT:    vmovd %eax, %xmm0
792; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm0
793; AVX2-NEXT:    movswl 4(%rdi), %eax
794; AVX2-NEXT:    vmovd %eax, %xmm2
795; AVX2-NEXT:    vcvtph2ps %xmm2, %xmm2
796; AVX2-NEXT:    movswl (%rdi), %eax
797; AVX2-NEXT:    vmovd %eax, %xmm3
798; AVX2-NEXT:    vcvtph2ps %xmm3, %xmm3
799; AVX2-NEXT:    movswl 2(%rdi), %eax
800; AVX2-NEXT:    vmovd %eax, %xmm4
801; AVX2-NEXT:    vcvtph2ps %xmm4, %xmm4
802; AVX2-NEXT:    movswl 14(%rdi), %eax
803; AVX2-NEXT:    vmovd %eax, %xmm5
804; AVX2-NEXT:    vcvtph2ps %xmm5, %xmm5
805; AVX2-NEXT:    movswl 12(%rdi), %eax
806; AVX2-NEXT:    vmovd %eax, %xmm6
807; AVX2-NEXT:    vcvtph2ps %xmm6, %xmm6
808; AVX2-NEXT:    movswl 8(%rdi), %eax
809; AVX2-NEXT:    vmovd %eax, %xmm7
810; AVX2-NEXT:    vcvtph2ps %xmm7, %xmm7
811; AVX2-NEXT:    movswl 10(%rdi), %eax
812; AVX2-NEXT:    vmovd %eax, %xmm1
813; AVX2-NEXT:    vcvtph2ps %xmm1, %xmm1
814; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm7[0],xmm1[0],xmm7[2,3]
815; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm6[0],xmm1[3]
816; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm5[0]
817; AVX2-NEXT:    vinsertps {{.*#+}} xmm3 = xmm3[0],xmm4[0],xmm3[2,3]
818; AVX2-NEXT:    vinsertps {{.*#+}} xmm2 = xmm3[0,1],xmm2[0],xmm3[3]
819; AVX2-NEXT:    vinsertps {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[0]
820; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm0, %ymm0
821; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm14[0],xmm15[0],xmm14[2,3]
822; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm13[0],xmm1[3]
823; AVX2-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm12[0]
824; AVX2-NEXT:    vinsertps {{.*#+}} xmm2 = xmm10[0],xmm11[0],xmm10[2,3]
825; AVX2-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm9[0],xmm2[3]
826; AVX2-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm8[0]
827; AVX2-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
828; AVX2-NEXT:    retq
829;
830; AVX512-LABEL: load_cvt_16i16_to_16f32:
831; AVX512:       # BB#0:
832; AVX512-NEXT:    movswl 6(%rdi), %eax
833; AVX512-NEXT:    vmovd %eax, %xmm0
834; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm8
835; AVX512-NEXT:    movswl 4(%rdi), %eax
836; AVX512-NEXT:    vmovd %eax, %xmm0
837; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm9
838; AVX512-NEXT:    movswl (%rdi), %eax
839; AVX512-NEXT:    vmovd %eax, %xmm0
840; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm10
841; AVX512-NEXT:    movswl 2(%rdi), %eax
842; AVX512-NEXT:    vmovd %eax, %xmm0
843; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm11
844; AVX512-NEXT:    movswl 14(%rdi), %eax
845; AVX512-NEXT:    vmovd %eax, %xmm0
846; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm12
847; AVX512-NEXT:    movswl 12(%rdi), %eax
848; AVX512-NEXT:    vmovd %eax, %xmm0
849; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm13
850; AVX512-NEXT:    movswl 8(%rdi), %eax
851; AVX512-NEXT:    vmovd %eax, %xmm0
852; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm14
853; AVX512-NEXT:    movswl 10(%rdi), %eax
854; AVX512-NEXT:    vmovd %eax, %xmm0
855; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm15
856; AVX512-NEXT:    movswl 22(%rdi), %eax
857; AVX512-NEXT:    vmovd %eax, %xmm0
858; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
859; AVX512-NEXT:    movswl 20(%rdi), %eax
860; AVX512-NEXT:    vmovd %eax, %xmm1
861; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm1
862; AVX512-NEXT:    movswl 16(%rdi), %eax
863; AVX512-NEXT:    vmovd %eax, %xmm2
864; AVX512-NEXT:    vcvtph2ps %xmm2, %xmm2
865; AVX512-NEXT:    movswl 18(%rdi), %eax
866; AVX512-NEXT:    vmovd %eax, %xmm3
867; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm3
868; AVX512-NEXT:    movswl 30(%rdi), %eax
869; AVX512-NEXT:    vmovd %eax, %xmm4
870; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
871; AVX512-NEXT:    movswl 28(%rdi), %eax
872; AVX512-NEXT:    vmovd %eax, %xmm5
873; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
874; AVX512-NEXT:    movswl 24(%rdi), %eax
875; AVX512-NEXT:    vmovd %eax, %xmm6
876; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
877; AVX512-NEXT:    movswl 26(%rdi), %eax
878; AVX512-NEXT:    vmovd %eax, %xmm7
879; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
880; AVX512-NEXT:    vinsertps {{.*#+}} xmm6 = xmm6[0],xmm7[0],xmm6[2,3]
881; AVX512-NEXT:    vinsertps {{.*#+}} xmm5 = xmm6[0,1],xmm5[0],xmm6[3]
882; AVX512-NEXT:    vinsertps {{.*#+}} xmm4 = xmm5[0,1,2],xmm4[0]
883; AVX512-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[2,3]
884; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm2[0,1],xmm1[0],xmm2[3]
885; AVX512-NEXT:    vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0]
886; AVX512-NEXT:    vinserti128 $1, %xmm4, %ymm0, %ymm0
887; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm14[0],xmm15[0],xmm14[2,3]
888; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm13[0],xmm1[3]
889; AVX512-NEXT:    vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm12[0]
890; AVX512-NEXT:    vinsertps {{.*#+}} xmm2 = xmm10[0],xmm11[0],xmm10[2,3]
891; AVX512-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm9[0],xmm2[3]
892; AVX512-NEXT:    vinsertps {{.*#+}} xmm2 = xmm2[0,1,2],xmm8[0]
893; AVX512-NEXT:    vinserti128 $1, %xmm1, %ymm2, %ymm1
894; AVX512-NEXT:    vinsertf64x4 $1, %ymm0, %zmm1, %zmm0
895; AVX512-NEXT:    retq
896  %1 = load <16 x i16>, <16 x i16>* %a0
897  %2 = bitcast <16 x i16> %1 to <16 x half>
898  %3 = fpext <16 x half> %2 to <16 x float>
899  ret <16 x float> %3
900}
901
902;
903; Half to Double
904;
905
906define double @cvt_i16_to_f64(i16 %a0) {
907; ALL-LABEL: cvt_i16_to_f64:
908; ALL:       # BB#0:
909; ALL-NEXT:    movswl %di, %eax
910; ALL-NEXT:    vmovd %eax, %xmm0
911; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
912; ALL-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
913; ALL-NEXT:    retq
914  %1 = bitcast i16 %a0 to half
915  %2 = fpext half %1 to double
916  ret double %2
917}
918
919define <2 x double> @cvt_2i16_to_2f64(<2 x i16> %a0) {
920; ALL-LABEL: cvt_2i16_to_2f64:
921; ALL:       # BB#0:
922; ALL-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
923; ALL-NEXT:    vpshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7]
924; ALL-NEXT:    vmovd %xmm0, %eax
925; ALL-NEXT:    movswl %ax, %ecx
926; ALL-NEXT:    shrl $16, %eax
927; ALL-NEXT:    cwtl
928; ALL-NEXT:    vmovd %eax, %xmm0
929; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
930; ALL-NEXT:    vmovd %ecx, %xmm1
931; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
932; ALL-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
933; ALL-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
934; ALL-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
935; ALL-NEXT:    retq
936  %1 = bitcast <2 x i16> %a0 to <2 x half>
937  %2 = fpext <2 x half> %1 to <2 x double>
938  ret <2 x double> %2
939}
940
941define <4 x double> @cvt_4i16_to_4f64(<4 x i16> %a0) {
942; ALL-LABEL: cvt_4i16_to_4f64:
943; ALL:       # BB#0:
944; ALL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
945; ALL-NEXT:    vmovq %xmm0, %rax
946; ALL-NEXT:    movq %rax, %rcx
947; ALL-NEXT:    movl %eax, %edx
948; ALL-NEXT:    movswl %ax, %esi
949; ALL-NEXT:    shrq $48, %rax
950; ALL-NEXT:    shrq $32, %rcx
951; ALL-NEXT:    shrl $16, %edx
952; ALL-NEXT:    movswl %dx, %edx
953; ALL-NEXT:    vmovd %edx, %xmm0
954; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
955; ALL-NEXT:    vmovd %esi, %xmm1
956; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
957; ALL-NEXT:    movswl %cx, %ecx
958; ALL-NEXT:    vmovd %ecx, %xmm2
959; ALL-NEXT:    vcvtph2ps %xmm2, %xmm2
960; ALL-NEXT:    cwtl
961; ALL-NEXT:    vmovd %eax, %xmm3
962; ALL-NEXT:    vcvtph2ps %xmm3, %xmm3
963; ALL-NEXT:    vcvtss2sd %xmm3, %xmm3, %xmm3
964; ALL-NEXT:    vcvtss2sd %xmm2, %xmm2, %xmm2
965; ALL-NEXT:    vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
966; ALL-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
967; ALL-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
968; ALL-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
969; ALL-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
970; ALL-NEXT:    retq
971  %1 = bitcast <4 x i16> %a0 to <4 x half>
972  %2 = fpext <4 x half> %1 to <4 x double>
973  ret <4 x double> %2
974}
975
976define <2 x double> @cvt_8i16_to_2f64(<8 x i16> %a0) {
977; ALL-LABEL: cvt_8i16_to_2f64:
978; ALL:       # BB#0:
979; ALL-NEXT:    vmovd %xmm0, %eax
980; ALL-NEXT:    movswl %ax, %ecx
981; ALL-NEXT:    shrl $16, %eax
982; ALL-NEXT:    cwtl
983; ALL-NEXT:    vmovd %eax, %xmm0
984; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
985; ALL-NEXT:    vmovd %ecx, %xmm1
986; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
987; ALL-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
988; ALL-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
989; ALL-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
990; ALL-NEXT:    retq
991  %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <2 x i32> <i32 0, i32 1>
992  %2 = bitcast <2 x i16> %1 to <2 x half>
993  %3 = fpext <2 x half> %2 to <2 x double>
994  ret <2 x double> %3
995}
996
997define <4 x double> @cvt_8i16_to_4f64(<8 x i16> %a0) {
998; ALL-LABEL: cvt_8i16_to_4f64:
999; ALL:       # BB#0:
1000; ALL-NEXT:    vmovq %xmm0, %rax
1001; ALL-NEXT:    movq %rax, %rcx
1002; ALL-NEXT:    movl %eax, %edx
1003; ALL-NEXT:    movswl %ax, %esi
1004; ALL-NEXT:    shrq $48, %rax
1005; ALL-NEXT:    shrq $32, %rcx
1006; ALL-NEXT:    shrl $16, %edx
1007; ALL-NEXT:    movswl %dx, %edx
1008; ALL-NEXT:    vmovd %edx, %xmm0
1009; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
1010; ALL-NEXT:    vmovd %esi, %xmm1
1011; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
1012; ALL-NEXT:    movswl %cx, %ecx
1013; ALL-NEXT:    vmovd %ecx, %xmm2
1014; ALL-NEXT:    vcvtph2ps %xmm2, %xmm2
1015; ALL-NEXT:    cwtl
1016; ALL-NEXT:    vmovd %eax, %xmm3
1017; ALL-NEXT:    vcvtph2ps %xmm3, %xmm3
1018; ALL-NEXT:    vcvtss2sd %xmm3, %xmm3, %xmm3
1019; ALL-NEXT:    vcvtss2sd %xmm2, %xmm2, %xmm2
1020; ALL-NEXT:    vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1021; ALL-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
1022; ALL-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1023; ALL-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1024; ALL-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1025; ALL-NEXT:    retq
1026  %1 = shufflevector <8 x i16> %a0, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
1027  %2 = bitcast <4 x i16> %1 to <4 x half>
1028  %3 = fpext <4 x half> %2 to <4 x double>
1029  ret <4 x double> %3
1030}
1031
1032define <8 x double> @cvt_8i16_to_8f64(<8 x i16> %a0) {
1033; AVX1-LABEL: cvt_8i16_to_8f64:
1034; AVX1:       # BB#0:
1035; AVX1-NEXT:    vmovq %xmm0, %rdx
1036; AVX1-NEXT:    movq %rdx, %r9
1037; AVX1-NEXT:    movl %edx, %r10d
1038; AVX1-NEXT:    movswl %dx, %r8d
1039; AVX1-NEXT:    shrq $48, %rdx
1040; AVX1-NEXT:    shrq $32, %r9
1041; AVX1-NEXT:    shrl $16, %r10d
1042; AVX1-NEXT:    vpextrq $1, %xmm0, %rdi
1043; AVX1-NEXT:    movq %rdi, %rsi
1044; AVX1-NEXT:    movl %edi, %eax
1045; AVX1-NEXT:    movswl %di, %ecx
1046; AVX1-NEXT:    shrq $48, %rdi
1047; AVX1-NEXT:    shrq $32, %rsi
1048; AVX1-NEXT:    shrl $16, %eax
1049; AVX1-NEXT:    cwtl
1050; AVX1-NEXT:    vmovd %eax, %xmm0
1051; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm1
1052; AVX1-NEXT:    vmovd %ecx, %xmm0
1053; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm2
1054; AVX1-NEXT:    movswl %si, %eax
1055; AVX1-NEXT:    vmovd %eax, %xmm0
1056; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm3
1057; AVX1-NEXT:    movswl %di, %eax
1058; AVX1-NEXT:    vmovd %eax, %xmm0
1059; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm4
1060; AVX1-NEXT:    movswl %r10w, %eax
1061; AVX1-NEXT:    vmovd %eax, %xmm0
1062; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm0
1063; AVX1-NEXT:    vmovd %r8d, %xmm5
1064; AVX1-NEXT:    vcvtph2ps %xmm5, %xmm5
1065; AVX1-NEXT:    movswl %r9w, %eax
1066; AVX1-NEXT:    vmovd %eax, %xmm6
1067; AVX1-NEXT:    vcvtph2ps %xmm6, %xmm6
1068; AVX1-NEXT:    movswl %dx, %eax
1069; AVX1-NEXT:    vmovd %eax, %xmm7
1070; AVX1-NEXT:    vcvtph2ps %xmm7, %xmm7
1071; AVX1-NEXT:    vcvtss2sd %xmm7, %xmm7, %xmm7
1072; AVX1-NEXT:    vcvtss2sd %xmm6, %xmm6, %xmm6
1073; AVX1-NEXT:    vunpcklpd {{.*#+}} xmm6 = xmm6[0],xmm7[0]
1074; AVX1-NEXT:    vcvtss2sd %xmm5, %xmm5, %xmm5
1075; AVX1-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1076; AVX1-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm5[0],xmm0[0]
1077; AVX1-NEXT:    vinsertf128 $1, %xmm6, %ymm0, %ymm0
1078; AVX1-NEXT:    vcvtss2sd %xmm4, %xmm4, %xmm4
1079; AVX1-NEXT:    vcvtss2sd %xmm3, %xmm3, %xmm3
1080; AVX1-NEXT:    vunpcklpd {{.*#+}} xmm3 = xmm3[0],xmm4[0]
1081; AVX1-NEXT:    vcvtss2sd %xmm2, %xmm2, %xmm2
1082; AVX1-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
1083; AVX1-NEXT:    vunpcklpd {{.*#+}} xmm1 = xmm2[0],xmm1[0]
1084; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
1085; AVX1-NEXT:    retq
1086;
1087; AVX2-LABEL: cvt_8i16_to_8f64:
1088; AVX2:       # BB#0:
1089; AVX2-NEXT:    vmovq %xmm0, %rdx
1090; AVX2-NEXT:    movq %rdx, %r9
1091; AVX2-NEXT:    movl %edx, %r10d
1092; AVX2-NEXT:    movswl %dx, %r8d
1093; AVX2-NEXT:    shrq $48, %rdx
1094; AVX2-NEXT:    shrq $32, %r9
1095; AVX2-NEXT:    shrl $16, %r10d
1096; AVX2-NEXT:    vpextrq $1, %xmm0, %rdi
1097; AVX2-NEXT:    movq %rdi, %rsi
1098; AVX2-NEXT:    movl %edi, %eax
1099; AVX2-NEXT:    movswl %di, %ecx
1100; AVX2-NEXT:    shrq $48, %rdi
1101; AVX2-NEXT:    shrq $32, %rsi
1102; AVX2-NEXT:    shrl $16, %eax
1103; AVX2-NEXT:    cwtl
1104; AVX2-NEXT:    vmovd %eax, %xmm0
1105; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm1
1106; AVX2-NEXT:    vmovd %ecx, %xmm0
1107; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm2
1108; AVX2-NEXT:    movswl %si, %eax
1109; AVX2-NEXT:    vmovd %eax, %xmm0
1110; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm3
1111; AVX2-NEXT:    movswl %di, %eax
1112; AVX2-NEXT:    vmovd %eax, %xmm0
1113; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm4
1114; AVX2-NEXT:    movswl %r10w, %eax
1115; AVX2-NEXT:    vmovd %eax, %xmm0
1116; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm0
1117; AVX2-NEXT:    vmovd %r8d, %xmm5
1118; AVX2-NEXT:    vcvtph2ps %xmm5, %xmm5
1119; AVX2-NEXT:    movswl %r9w, %eax
1120; AVX2-NEXT:    vmovd %eax, %xmm6
1121; AVX2-NEXT:    vcvtph2ps %xmm6, %xmm6
1122; AVX2-NEXT:    movswl %dx, %eax
1123; AVX2-NEXT:    vmovd %eax, %xmm7
1124; AVX2-NEXT:    vcvtph2ps %xmm7, %xmm7
1125; AVX2-NEXT:    vcvtss2sd %xmm7, %xmm7, %xmm7
1126; AVX2-NEXT:    vcvtss2sd %xmm6, %xmm6, %xmm6
1127; AVX2-NEXT:    vunpcklpd {{.*#+}} xmm6 = xmm6[0],xmm7[0]
1128; AVX2-NEXT:    vcvtss2sd %xmm5, %xmm5, %xmm5
1129; AVX2-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1130; AVX2-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm5[0],xmm0[0]
1131; AVX2-NEXT:    vinsertf128 $1, %xmm6, %ymm0, %ymm0
1132; AVX2-NEXT:    vcvtss2sd %xmm4, %xmm4, %xmm4
1133; AVX2-NEXT:    vcvtss2sd %xmm3, %xmm3, %xmm3
1134; AVX2-NEXT:    vunpcklpd {{.*#+}} xmm3 = xmm3[0],xmm4[0]
1135; AVX2-NEXT:    vcvtss2sd %xmm2, %xmm2, %xmm2
1136; AVX2-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
1137; AVX2-NEXT:    vunpcklpd {{.*#+}} xmm1 = xmm2[0],xmm1[0]
1138; AVX2-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
1139; AVX2-NEXT:    retq
1140;
1141; AVX512-LABEL: cvt_8i16_to_8f64:
1142; AVX512:       # BB#0:
1143; AVX512-NEXT:    vpextrq $1, %xmm0, %rdx
1144; AVX512-NEXT:    movq %rdx, %r8
1145; AVX512-NEXT:    movl %edx, %r10d
1146; AVX512-NEXT:    movswl %dx, %r9d
1147; AVX512-NEXT:    shrq $48, %rdx
1148; AVX512-NEXT:    shrq $32, %r8
1149; AVX512-NEXT:    shrl $16, %r10d
1150; AVX512-NEXT:    vmovq %xmm0, %rdi
1151; AVX512-NEXT:    movq %rdi, %rax
1152; AVX512-NEXT:    movl %edi, %esi
1153; AVX512-NEXT:    movswl %di, %ecx
1154; AVX512-NEXT:    shrq $48, %rdi
1155; AVX512-NEXT:    shrq $32, %rax
1156; AVX512-NEXT:    shrl $16, %esi
1157; AVX512-NEXT:    movswl %si, %esi
1158; AVX512-NEXT:    vmovd %esi, %xmm0
1159; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
1160; AVX512-NEXT:    vmovd %ecx, %xmm1
1161; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm1
1162; AVX512-NEXT:    cwtl
1163; AVX512-NEXT:    vmovd %eax, %xmm2
1164; AVX512-NEXT:    vcvtph2ps %xmm2, %xmm2
1165; AVX512-NEXT:    movswl %di, %eax
1166; AVX512-NEXT:    vmovd %eax, %xmm3
1167; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm3
1168; AVX512-NEXT:    movswl %r10w, %eax
1169; AVX512-NEXT:    vmovd %eax, %xmm4
1170; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
1171; AVX512-NEXT:    vmovd %r9d, %xmm5
1172; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
1173; AVX512-NEXT:    movswl %r8w, %eax
1174; AVX512-NEXT:    vmovd %eax, %xmm6
1175; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
1176; AVX512-NEXT:    movswl %dx, %eax
1177; AVX512-NEXT:    vmovd %eax, %xmm7
1178; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
1179; AVX512-NEXT:    vcvtss2sd %xmm7, %xmm7, %xmm7
1180; AVX512-NEXT:    vcvtss2sd %xmm6, %xmm6, %xmm6
1181; AVX512-NEXT:    vunpcklpd {{.*#+}} xmm6 = xmm6[0],xmm7[0]
1182; AVX512-NEXT:    vcvtss2sd %xmm5, %xmm5, %xmm5
1183; AVX512-NEXT:    vcvtss2sd %xmm4, %xmm4, %xmm4
1184; AVX512-NEXT:    vunpcklpd {{.*#+}} xmm4 = xmm5[0],xmm4[0]
1185; AVX512-NEXT:    vinsertf128 $1, %xmm6, %ymm4, %ymm4
1186; AVX512-NEXT:    vcvtss2sd %xmm3, %xmm3, %xmm3
1187; AVX512-NEXT:    vcvtss2sd %xmm2, %xmm2, %xmm2
1188; AVX512-NEXT:    vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1189; AVX512-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
1190; AVX512-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1191; AVX512-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1192; AVX512-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1193; AVX512-NEXT:    vinsertf64x4 $1, %ymm4, %zmm0, %zmm0
1194; AVX512-NEXT:    retq
1195  %1 = bitcast <8 x i16> %a0 to <8 x half>
1196  %2 = fpext <8 x half> %1 to <8 x double>
1197  ret <8 x double> %2
1198}
1199
1200;
1201; Half to Double (Load)
1202;
1203
1204define double @load_cvt_i16_to_f64(i16* %a0) {
1205; ALL-LABEL: load_cvt_i16_to_f64:
1206; ALL:       # BB#0:
1207; ALL-NEXT:    movswl (%rdi), %eax
1208; ALL-NEXT:    vmovd %eax, %xmm0
1209; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
1210; ALL-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1211; ALL-NEXT:    retq
1212  %1 = load i16, i16* %a0
1213  %2 = bitcast i16 %1 to half
1214  %3 = fpext half %2 to double
1215  ret double %3
1216}
1217
1218define <2 x double> @load_cvt_2i16_to_2f64(<2 x i16>* %a0) {
1219; ALL-LABEL: load_cvt_2i16_to_2f64:
1220; ALL:       # BB#0:
1221; ALL-NEXT:    movswl (%rdi), %eax
1222; ALL-NEXT:    vmovd %eax, %xmm0
1223; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
1224; ALL-NEXT:    movswl 2(%rdi), %eax
1225; ALL-NEXT:    vmovd %eax, %xmm1
1226; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
1227; ALL-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
1228; ALL-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1229; ALL-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1230; ALL-NEXT:    retq
1231  %1 = load <2 x i16>, <2 x i16>* %a0
1232  %2 = bitcast <2 x i16> %1 to <2 x half>
1233  %3 = fpext <2 x half> %2 to <2 x double>
1234  ret <2 x double> %3
1235}
1236
1237define <4 x double> @load_cvt_4i16_to_4f64(<4 x i16>* %a0) {
1238; ALL-LABEL: load_cvt_4i16_to_4f64:
1239; ALL:       # BB#0:
1240; ALL-NEXT:    movswl (%rdi), %eax
1241; ALL-NEXT:    vmovd %eax, %xmm0
1242; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
1243; ALL-NEXT:    movswl 2(%rdi), %eax
1244; ALL-NEXT:    vmovd %eax, %xmm1
1245; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
1246; ALL-NEXT:    movswl 4(%rdi), %eax
1247; ALL-NEXT:    vmovd %eax, %xmm2
1248; ALL-NEXT:    vcvtph2ps %xmm2, %xmm2
1249; ALL-NEXT:    movswl 6(%rdi), %eax
1250; ALL-NEXT:    vmovd %eax, %xmm3
1251; ALL-NEXT:    vcvtph2ps %xmm3, %xmm3
1252; ALL-NEXT:    vcvtss2sd %xmm3, %xmm3, %xmm3
1253; ALL-NEXT:    vcvtss2sd %xmm2, %xmm2, %xmm2
1254; ALL-NEXT:    vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1255; ALL-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
1256; ALL-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1257; ALL-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1258; ALL-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1259; ALL-NEXT:    retq
1260  %1 = load <4 x i16>, <4 x i16>* %a0
1261  %2 = bitcast <4 x i16> %1 to <4 x half>
1262  %3 = fpext <4 x half> %2 to <4 x double>
1263  ret <4 x double> %3
1264}
1265
1266define <4 x double> @load_cvt_8i16_to_4f64(<8 x i16>* %a0) {
1267; ALL-LABEL: load_cvt_8i16_to_4f64:
1268; ALL:       # BB#0:
1269; ALL-NEXT:    movq (%rdi), %rax
1270; ALL-NEXT:    movq %rax, %rcx
1271; ALL-NEXT:    movl %eax, %edx
1272; ALL-NEXT:    movswl %ax, %esi
1273; ALL-NEXT:    shrq $48, %rax
1274; ALL-NEXT:    shrq $32, %rcx
1275; ALL-NEXT:    shrl $16, %edx
1276; ALL-NEXT:    movswl %dx, %edx
1277; ALL-NEXT:    vmovd %edx, %xmm0
1278; ALL-NEXT:    vcvtph2ps %xmm0, %xmm0
1279; ALL-NEXT:    vmovd %esi, %xmm1
1280; ALL-NEXT:    vcvtph2ps %xmm1, %xmm1
1281; ALL-NEXT:    movswl %cx, %ecx
1282; ALL-NEXT:    vmovd %ecx, %xmm2
1283; ALL-NEXT:    vcvtph2ps %xmm2, %xmm2
1284; ALL-NEXT:    cwtl
1285; ALL-NEXT:    vmovd %eax, %xmm3
1286; ALL-NEXT:    vcvtph2ps %xmm3, %xmm3
1287; ALL-NEXT:    vcvtss2sd %xmm3, %xmm3, %xmm3
1288; ALL-NEXT:    vcvtss2sd %xmm2, %xmm2, %xmm2
1289; ALL-NEXT:    vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1290; ALL-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
1291; ALL-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1292; ALL-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1293; ALL-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1294; ALL-NEXT:    retq
1295  %1 = load <8 x i16>, <8 x i16>* %a0
1296  %2 = shufflevector <8 x i16> %1, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
1297  %3 = bitcast <4 x i16> %2 to <4 x half>
1298  %4 = fpext <4 x half> %3 to <4 x double>
1299  ret <4 x double> %4
1300}
1301
1302define <8 x double> @load_cvt_8i16_to_8f64(<8 x i16>* %a0) {
1303; AVX1-LABEL: load_cvt_8i16_to_8f64:
1304; AVX1:       # BB#0:
1305; AVX1-NEXT:    movswl 8(%rdi), %eax
1306; AVX1-NEXT:    vmovd %eax, %xmm0
1307; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm1
1308; AVX1-NEXT:    movswl 10(%rdi), %eax
1309; AVX1-NEXT:    vmovd %eax, %xmm0
1310; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm2
1311; AVX1-NEXT:    movswl 12(%rdi), %eax
1312; AVX1-NEXT:    vmovd %eax, %xmm0
1313; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm3
1314; AVX1-NEXT:    movswl 14(%rdi), %eax
1315; AVX1-NEXT:    vmovd %eax, %xmm0
1316; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm4
1317; AVX1-NEXT:    movswl (%rdi), %eax
1318; AVX1-NEXT:    vmovd %eax, %xmm0
1319; AVX1-NEXT:    vcvtph2ps %xmm0, %xmm0
1320; AVX1-NEXT:    movswl 2(%rdi), %eax
1321; AVX1-NEXT:    vmovd %eax, %xmm5
1322; AVX1-NEXT:    vcvtph2ps %xmm5, %xmm5
1323; AVX1-NEXT:    movswl 4(%rdi), %eax
1324; AVX1-NEXT:    vmovd %eax, %xmm6
1325; AVX1-NEXT:    vcvtph2ps %xmm6, %xmm6
1326; AVX1-NEXT:    movswl 6(%rdi), %eax
1327; AVX1-NEXT:    vmovd %eax, %xmm7
1328; AVX1-NEXT:    vcvtph2ps %xmm7, %xmm7
1329; AVX1-NEXT:    vcvtss2sd %xmm7, %xmm7, %xmm7
1330; AVX1-NEXT:    vcvtss2sd %xmm6, %xmm6, %xmm6
1331; AVX1-NEXT:    vunpcklpd {{.*#+}} xmm6 = xmm6[0],xmm7[0]
1332; AVX1-NEXT:    vcvtss2sd %xmm5, %xmm5, %xmm5
1333; AVX1-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1334; AVX1-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm5[0]
1335; AVX1-NEXT:    vinsertf128 $1, %xmm6, %ymm0, %ymm0
1336; AVX1-NEXT:    vcvtss2sd %xmm4, %xmm4, %xmm4
1337; AVX1-NEXT:    vcvtss2sd %xmm3, %xmm3, %xmm3
1338; AVX1-NEXT:    vunpcklpd {{.*#+}} xmm3 = xmm3[0],xmm4[0]
1339; AVX1-NEXT:    vcvtss2sd %xmm2, %xmm2, %xmm2
1340; AVX1-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
1341; AVX1-NEXT:    vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
1342; AVX1-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
1343; AVX1-NEXT:    retq
1344;
1345; AVX2-LABEL: load_cvt_8i16_to_8f64:
1346; AVX2:       # BB#0:
1347; AVX2-NEXT:    movswl 8(%rdi), %eax
1348; AVX2-NEXT:    vmovd %eax, %xmm0
1349; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm1
1350; AVX2-NEXT:    movswl 10(%rdi), %eax
1351; AVX2-NEXT:    vmovd %eax, %xmm0
1352; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm2
1353; AVX2-NEXT:    movswl 12(%rdi), %eax
1354; AVX2-NEXT:    vmovd %eax, %xmm0
1355; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm3
1356; AVX2-NEXT:    movswl 14(%rdi), %eax
1357; AVX2-NEXT:    vmovd %eax, %xmm0
1358; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm4
1359; AVX2-NEXT:    movswl (%rdi), %eax
1360; AVX2-NEXT:    vmovd %eax, %xmm0
1361; AVX2-NEXT:    vcvtph2ps %xmm0, %xmm0
1362; AVX2-NEXT:    movswl 2(%rdi), %eax
1363; AVX2-NEXT:    vmovd %eax, %xmm5
1364; AVX2-NEXT:    vcvtph2ps %xmm5, %xmm5
1365; AVX2-NEXT:    movswl 4(%rdi), %eax
1366; AVX2-NEXT:    vmovd %eax, %xmm6
1367; AVX2-NEXT:    vcvtph2ps %xmm6, %xmm6
1368; AVX2-NEXT:    movswl 6(%rdi), %eax
1369; AVX2-NEXT:    vmovd %eax, %xmm7
1370; AVX2-NEXT:    vcvtph2ps %xmm7, %xmm7
1371; AVX2-NEXT:    vcvtss2sd %xmm7, %xmm7, %xmm7
1372; AVX2-NEXT:    vcvtss2sd %xmm6, %xmm6, %xmm6
1373; AVX2-NEXT:    vunpcklpd {{.*#+}} xmm6 = xmm6[0],xmm7[0]
1374; AVX2-NEXT:    vcvtss2sd %xmm5, %xmm5, %xmm5
1375; AVX2-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1376; AVX2-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm5[0]
1377; AVX2-NEXT:    vinsertf128 $1, %xmm6, %ymm0, %ymm0
1378; AVX2-NEXT:    vcvtss2sd %xmm4, %xmm4, %xmm4
1379; AVX2-NEXT:    vcvtss2sd %xmm3, %xmm3, %xmm3
1380; AVX2-NEXT:    vunpcklpd {{.*#+}} xmm3 = xmm3[0],xmm4[0]
1381; AVX2-NEXT:    vcvtss2sd %xmm2, %xmm2, %xmm2
1382; AVX2-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
1383; AVX2-NEXT:    vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
1384; AVX2-NEXT:    vinsertf128 $1, %xmm3, %ymm1, %ymm1
1385; AVX2-NEXT:    retq
1386;
1387; AVX512-LABEL: load_cvt_8i16_to_8f64:
1388; AVX512:       # BB#0:
1389; AVX512-NEXT:    movswl (%rdi), %eax
1390; AVX512-NEXT:    vmovd %eax, %xmm0
1391; AVX512-NEXT:    vcvtph2ps %xmm0, %xmm0
1392; AVX512-NEXT:    movswl 2(%rdi), %eax
1393; AVX512-NEXT:    vmovd %eax, %xmm1
1394; AVX512-NEXT:    vcvtph2ps %xmm1, %xmm1
1395; AVX512-NEXT:    movswl 4(%rdi), %eax
1396; AVX512-NEXT:    vmovd %eax, %xmm2
1397; AVX512-NEXT:    vcvtph2ps %xmm2, %xmm2
1398; AVX512-NEXT:    movswl 6(%rdi), %eax
1399; AVX512-NEXT:    vmovd %eax, %xmm3
1400; AVX512-NEXT:    vcvtph2ps %xmm3, %xmm3
1401; AVX512-NEXT:    movswl 8(%rdi), %eax
1402; AVX512-NEXT:    vmovd %eax, %xmm4
1403; AVX512-NEXT:    vcvtph2ps %xmm4, %xmm4
1404; AVX512-NEXT:    movswl 10(%rdi), %eax
1405; AVX512-NEXT:    vmovd %eax, %xmm5
1406; AVX512-NEXT:    vcvtph2ps %xmm5, %xmm5
1407; AVX512-NEXT:    movswl 12(%rdi), %eax
1408; AVX512-NEXT:    vmovd %eax, %xmm6
1409; AVX512-NEXT:    vcvtph2ps %xmm6, %xmm6
1410; AVX512-NEXT:    movswl 14(%rdi), %eax
1411; AVX512-NEXT:    vmovd %eax, %xmm7
1412; AVX512-NEXT:    vcvtph2ps %xmm7, %xmm7
1413; AVX512-NEXT:    vcvtss2sd %xmm7, %xmm7, %xmm7
1414; AVX512-NEXT:    vcvtss2sd %xmm6, %xmm6, %xmm6
1415; AVX512-NEXT:    vunpcklpd {{.*#+}} xmm6 = xmm6[0],xmm7[0]
1416; AVX512-NEXT:    vcvtss2sd %xmm5, %xmm5, %xmm5
1417; AVX512-NEXT:    vcvtss2sd %xmm4, %xmm4, %xmm4
1418; AVX512-NEXT:    vunpcklpd {{.*#+}} xmm4 = xmm4[0],xmm5[0]
1419; AVX512-NEXT:    vinsertf128 $1, %xmm6, %ymm4, %ymm4
1420; AVX512-NEXT:    vcvtss2sd %xmm3, %xmm3, %xmm3
1421; AVX512-NEXT:    vcvtss2sd %xmm2, %xmm2, %xmm2
1422; AVX512-NEXT:    vunpcklpd {{.*#+}} xmm2 = xmm2[0],xmm3[0]
1423; AVX512-NEXT:    vcvtss2sd %xmm1, %xmm1, %xmm1
1424; AVX512-NEXT:    vcvtss2sd %xmm0, %xmm0, %xmm0
1425; AVX512-NEXT:    vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
1426; AVX512-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1427; AVX512-NEXT:    vinsertf64x4 $1, %ymm4, %zmm0, %zmm0
1428; AVX512-NEXT:    retq
1429  %1 = load <8 x i16>, <8 x i16>* %a0
1430  %2 = bitcast <8 x i16> %1 to <8 x half>
1431  %3 = fpext <8 x half> %2 to <8 x double>
1432  ret <8 x double> %3
1433}
1434
1435;
1436; Float to Half
1437;
1438
1439define i16 @cvt_f32_to_i16(float %a0) {
1440; ALL-LABEL: cvt_f32_to_i16:
1441; ALL:       # BB#0:
1442; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1443; ALL-NEXT:    vmovd %xmm0, %eax
1444; ALL-NEXT:    retq
1445  %1 = fptrunc float %a0 to half
1446  %2 = bitcast half %1 to i16
1447  ret i16 %2
1448}
1449
1450define <4 x i16> @cvt_4f32_to_4i16(<4 x float> %a0) {
1451; ALL-LABEL: cvt_4f32_to_4i16:
1452; ALL:       # BB#0:
1453; ALL-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1454; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1455; ALL-NEXT:    vmovd %xmm1, %eax
1456; ALL-NEXT:    shll $16, %eax
1457; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1458; ALL-NEXT:    vmovd %xmm1, %ecx
1459; ALL-NEXT:    movzwl %cx, %ecx
1460; ALL-NEXT:    orl %eax, %ecx
1461; ALL-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1462; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1463; ALL-NEXT:    vmovd %xmm1, %eax
1464; ALL-NEXT:    shll $16, %eax
1465; ALL-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
1466; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1467; ALL-NEXT:    vmovd %xmm0, %edx
1468; ALL-NEXT:    movzwl %dx, %edx
1469; ALL-NEXT:    orl %eax, %edx
1470; ALL-NEXT:    shlq $32, %rdx
1471; ALL-NEXT:    orq %rcx, %rdx
1472; ALL-NEXT:    vmovq %rdx, %xmm0
1473; ALL-NEXT:    retq
1474  %1 = fptrunc <4 x float> %a0 to <4 x half>
1475  %2 = bitcast <4 x half> %1 to <4 x i16>
1476  ret <4 x i16> %2
1477}
1478
1479define <8 x i16> @cvt_4f32_to_8i16_undef(<4 x float> %a0) {
1480; ALL-LABEL: cvt_4f32_to_8i16_undef:
1481; ALL:       # BB#0:
1482; ALL-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1483; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1484; ALL-NEXT:    vmovd %xmm1, %eax
1485; ALL-NEXT:    shll $16, %eax
1486; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1487; ALL-NEXT:    vmovd %xmm1, %ecx
1488; ALL-NEXT:    movzwl %cx, %ecx
1489; ALL-NEXT:    orl %eax, %ecx
1490; ALL-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1491; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1492; ALL-NEXT:    vmovd %xmm1, %eax
1493; ALL-NEXT:    shll $16, %eax
1494; ALL-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
1495; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1496; ALL-NEXT:    vmovd %xmm0, %edx
1497; ALL-NEXT:    movzwl %dx, %edx
1498; ALL-NEXT:    orl %eax, %edx
1499; ALL-NEXT:    shlq $32, %rdx
1500; ALL-NEXT:    orq %rcx, %rdx
1501; ALL-NEXT:    vmovq %rdx, %xmm0
1502; ALL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1503; ALL-NEXT:    retq
1504  %1 = fptrunc <4 x float> %a0 to <4 x half>
1505  %2 = bitcast <4 x half> %1 to <4 x i16>
1506  %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1507  ret <8 x i16> %3
1508}
1509
1510define <8 x i16> @cvt_4f32_to_8i16_zero(<4 x float> %a0) {
1511; ALL-LABEL: cvt_4f32_to_8i16_zero:
1512; ALL:       # BB#0:
1513; ALL-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1514; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1515; ALL-NEXT:    vmovd %xmm1, %eax
1516; ALL-NEXT:    shll $16, %eax
1517; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1518; ALL-NEXT:    vmovd %xmm1, %ecx
1519; ALL-NEXT:    movzwl %cx, %ecx
1520; ALL-NEXT:    orl %eax, %ecx
1521; ALL-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1522; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1523; ALL-NEXT:    vmovd %xmm1, %eax
1524; ALL-NEXT:    shll $16, %eax
1525; ALL-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
1526; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1527; ALL-NEXT:    vmovd %xmm0, %edx
1528; ALL-NEXT:    movzwl %dx, %edx
1529; ALL-NEXT:    orl %eax, %edx
1530; ALL-NEXT:    shlq $32, %rdx
1531; ALL-NEXT:    orq %rcx, %rdx
1532; ALL-NEXT:    vmovq %rdx, %xmm0
1533; ALL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero
1534; ALL-NEXT:    retq
1535  %1 = fptrunc <4 x float> %a0 to <4 x half>
1536  %2 = bitcast <4 x half> %1 to <4 x i16>
1537  %3 = shufflevector <4 x i16> %2, <4 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1538  ret <8 x i16> %3
1539}
1540
1541define <8 x i16> @cvt_8f32_to_8i16(<8 x float> %a0) {
1542; AVX1-LABEL: cvt_8f32_to_8i16:
1543; AVX1:       # BB#0:
1544; AVX1-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1545; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1546; AVX1-NEXT:    vmovd %xmm1, %eax
1547; AVX1-NEXT:    shll $16, %eax
1548; AVX1-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1549; AVX1-NEXT:    vmovd %xmm1, %ecx
1550; AVX1-NEXT:    movzwl %cx, %ecx
1551; AVX1-NEXT:    orl %eax, %ecx
1552; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1553; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1554; AVX1-NEXT:    vmovd %xmm1, %edx
1555; AVX1-NEXT:    shll $16, %edx
1556; AVX1-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
1557; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1558; AVX1-NEXT:    vmovd %xmm1, %eax
1559; AVX1-NEXT:    movzwl %ax, %eax
1560; AVX1-NEXT:    orl %edx, %eax
1561; AVX1-NEXT:    shlq $32, %rax
1562; AVX1-NEXT:    orq %rcx, %rax
1563; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
1564; AVX1-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1565; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1566; AVX1-NEXT:    vmovd %xmm1, %ecx
1567; AVX1-NEXT:    shll $16, %ecx
1568; AVX1-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1569; AVX1-NEXT:    vmovd %xmm1, %edx
1570; AVX1-NEXT:    movzwl %dx, %edx
1571; AVX1-NEXT:    orl %ecx, %edx
1572; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1573; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1574; AVX1-NEXT:    vmovd %xmm1, %ecx
1575; AVX1-NEXT:    shll $16, %ecx
1576; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
1577; AVX1-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1578; AVX1-NEXT:    vmovd %xmm0, %esi
1579; AVX1-NEXT:    movzwl %si, %esi
1580; AVX1-NEXT:    orl %ecx, %esi
1581; AVX1-NEXT:    shlq $32, %rsi
1582; AVX1-NEXT:    orq %rdx, %rsi
1583; AVX1-NEXT:    vmovq %rsi, %xmm0
1584; AVX1-NEXT:    vmovq %rax, %xmm1
1585; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1586; AVX1-NEXT:    vzeroupper
1587; AVX1-NEXT:    retq
1588;
1589; AVX2-LABEL: cvt_8f32_to_8i16:
1590; AVX2:       # BB#0:
1591; AVX2-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1592; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1593; AVX2-NEXT:    vmovd %xmm1, %eax
1594; AVX2-NEXT:    shll $16, %eax
1595; AVX2-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1596; AVX2-NEXT:    vmovd %xmm1, %ecx
1597; AVX2-NEXT:    movzwl %cx, %ecx
1598; AVX2-NEXT:    orl %eax, %ecx
1599; AVX2-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1600; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1601; AVX2-NEXT:    vmovd %xmm1, %edx
1602; AVX2-NEXT:    shll $16, %edx
1603; AVX2-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
1604; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1605; AVX2-NEXT:    vmovd %xmm1, %eax
1606; AVX2-NEXT:    movzwl %ax, %eax
1607; AVX2-NEXT:    orl %edx, %eax
1608; AVX2-NEXT:    shlq $32, %rax
1609; AVX2-NEXT:    orq %rcx, %rax
1610; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
1611; AVX2-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1612; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1613; AVX2-NEXT:    vmovd %xmm1, %ecx
1614; AVX2-NEXT:    shll $16, %ecx
1615; AVX2-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1616; AVX2-NEXT:    vmovd %xmm1, %edx
1617; AVX2-NEXT:    movzwl %dx, %edx
1618; AVX2-NEXT:    orl %ecx, %edx
1619; AVX2-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1620; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1621; AVX2-NEXT:    vmovd %xmm1, %ecx
1622; AVX2-NEXT:    shll $16, %ecx
1623; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
1624; AVX2-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1625; AVX2-NEXT:    vmovd %xmm0, %esi
1626; AVX2-NEXT:    movzwl %si, %esi
1627; AVX2-NEXT:    orl %ecx, %esi
1628; AVX2-NEXT:    shlq $32, %rsi
1629; AVX2-NEXT:    orq %rdx, %rsi
1630; AVX2-NEXT:    vmovq %rsi, %xmm0
1631; AVX2-NEXT:    vmovq %rax, %xmm1
1632; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1633; AVX2-NEXT:    vzeroupper
1634; AVX2-NEXT:    retq
1635;
1636; AVX512-LABEL: cvt_8f32_to_8i16:
1637; AVX512:       # BB#0:
1638; AVX512-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1639; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1640; AVX512-NEXT:    vmovd %xmm1, %eax
1641; AVX512-NEXT:    shll $16, %eax
1642; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1643; AVX512-NEXT:    vmovd %xmm1, %ecx
1644; AVX512-NEXT:    movzwl %cx, %ecx
1645; AVX512-NEXT:    orl %eax, %ecx
1646; AVX512-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1647; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1648; AVX512-NEXT:    vmovd %xmm1, %edx
1649; AVX512-NEXT:    shll $16, %edx
1650; AVX512-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
1651; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1652; AVX512-NEXT:    vmovd %xmm1, %eax
1653; AVX512-NEXT:    movzwl %ax, %eax
1654; AVX512-NEXT:    orl %edx, %eax
1655; AVX512-NEXT:    shlq $32, %rax
1656; AVX512-NEXT:    orq %rcx, %rax
1657; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
1658; AVX512-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1659; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1660; AVX512-NEXT:    vmovd %xmm1, %ecx
1661; AVX512-NEXT:    shll $16, %ecx
1662; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1663; AVX512-NEXT:    vmovd %xmm1, %edx
1664; AVX512-NEXT:    movzwl %dx, %edx
1665; AVX512-NEXT:    orl %ecx, %edx
1666; AVX512-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1667; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1668; AVX512-NEXT:    vmovd %xmm1, %ecx
1669; AVX512-NEXT:    shll $16, %ecx
1670; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
1671; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1672; AVX512-NEXT:    vmovd %xmm0, %esi
1673; AVX512-NEXT:    movzwl %si, %esi
1674; AVX512-NEXT:    orl %ecx, %esi
1675; AVX512-NEXT:    shlq $32, %rsi
1676; AVX512-NEXT:    orq %rdx, %rsi
1677; AVX512-NEXT:    vmovq %rsi, %xmm0
1678; AVX512-NEXT:    vmovq %rax, %xmm1
1679; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
1680; AVX512-NEXT:    retq
1681  %1 = fptrunc <8 x float> %a0 to <8 x half>
1682  %2 = bitcast <8 x half> %1 to <8 x i16>
1683  ret <8 x i16> %2
1684}
1685
1686define <16 x i16> @cvt_16f32_to_16i16(<16 x float> %a0) {
1687; AVX1-LABEL: cvt_16f32_to_16i16:
1688; AVX1:       # BB#0:
1689; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm2
1690; AVX1-NEXT:    vmovd %xmm2, %eax
1691; AVX1-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
1692; AVX1-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
1693; AVX1-NEXT:    vmovd %eax, %xmm3
1694; AVX1-NEXT:    vmovd %xmm2, %eax
1695; AVX1-NEXT:    vpermilpd {{.*#+}} xmm2 = xmm1[1,0]
1696; AVX1-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
1697; AVX1-NEXT:    vpinsrw $1, %eax, %xmm3, %xmm3
1698; AVX1-NEXT:    vmovd %xmm2, %eax
1699; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1700; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm1[3,1,2,3]
1701; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1702; AVX1-NEXT:    vpinsrw $2, %eax, %xmm3, %xmm3
1703; AVX1-NEXT:    vmovd %xmm1, %eax
1704; AVX1-NEXT:    vcvtps2ph $4, %xmm2, %xmm1
1705; AVX1-NEXT:    vpinsrw $3, %eax, %xmm3, %xmm3
1706; AVX1-NEXT:    vmovd %xmm1, %eax
1707; AVX1-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]
1708; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1709; AVX1-NEXT:    vpinsrw $4, %eax, %xmm3, %xmm3
1710; AVX1-NEXT:    vmovd %xmm1, %eax
1711; AVX1-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm2[1,0]
1712; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1713; AVX1-NEXT:    vpinsrw $5, %eax, %xmm3, %xmm3
1714; AVX1-NEXT:    vmovd %xmm1, %eax
1715; AVX1-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1716; AVX1-NEXT:    vpermilps {{.*#+}} xmm2 = xmm2[3,1,2,3]
1717; AVX1-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
1718; AVX1-NEXT:    vpinsrw $6, %eax, %xmm3, %xmm3
1719; AVX1-NEXT:    vmovd %xmm2, %eax
1720; AVX1-NEXT:    vpinsrw $7, %eax, %xmm3, %xmm2
1721; AVX1-NEXT:    vmovd %xmm1, %eax
1722; AVX1-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1723; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1724; AVX1-NEXT:    vmovd %eax, %xmm3
1725; AVX1-NEXT:    vmovd %xmm1, %eax
1726; AVX1-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
1727; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1728; AVX1-NEXT:    vpinsrw $1, %eax, %xmm3, %xmm3
1729; AVX1-NEXT:    vmovd %xmm1, %eax
1730; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
1731; AVX1-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
1732; AVX1-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1733; AVX1-NEXT:    vpinsrw $2, %eax, %xmm3, %xmm3
1734; AVX1-NEXT:    vmovd %xmm0, %eax
1735; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm0
1736; AVX1-NEXT:    vpinsrw $3, %eax, %xmm3, %xmm3
1737; AVX1-NEXT:    vmovd %xmm0, %eax
1738; AVX1-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
1739; AVX1-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1740; AVX1-NEXT:    vpinsrw $4, %eax, %xmm3, %xmm3
1741; AVX1-NEXT:    vmovd %xmm0, %eax
1742; AVX1-NEXT:    vpermilps {{.*#+}} xmm0 = xmm1[3,1,2,3]
1743; AVX1-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1744; AVX1-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm1[1,0]
1745; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1746; AVX1-NEXT:    vpinsrw $5, %eax, %xmm3, %xmm3
1747; AVX1-NEXT:    vmovd %xmm1, %eax
1748; AVX1-NEXT:    vpinsrw $6, %eax, %xmm3, %xmm1
1749; AVX1-NEXT:    vmovd %xmm0, %eax
1750; AVX1-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm0
1751; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1752; AVX1-NEXT:    retq
1753;
1754; AVX2-LABEL: cvt_16f32_to_16i16:
1755; AVX2:       # BB#0:
1756; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm2
1757; AVX2-NEXT:    vmovd %xmm2, %eax
1758; AVX2-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
1759; AVX2-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
1760; AVX2-NEXT:    vmovd %eax, %xmm3
1761; AVX2-NEXT:    vmovd %xmm2, %eax
1762; AVX2-NEXT:    vpermilpd {{.*#+}} xmm2 = xmm1[1,0]
1763; AVX2-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
1764; AVX2-NEXT:    vpinsrw $1, %eax, %xmm3, %xmm3
1765; AVX2-NEXT:    vmovd %xmm2, %eax
1766; AVX2-NEXT:    vextractf128 $1, %ymm1, %xmm2
1767; AVX2-NEXT:    vpermilps {{.*#+}} xmm1 = xmm1[3,1,2,3]
1768; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1769; AVX2-NEXT:    vpinsrw $2, %eax, %xmm3, %xmm3
1770; AVX2-NEXT:    vmovd %xmm1, %eax
1771; AVX2-NEXT:    vcvtps2ph $4, %xmm2, %xmm1
1772; AVX2-NEXT:    vpinsrw $3, %eax, %xmm3, %xmm3
1773; AVX2-NEXT:    vmovd %xmm1, %eax
1774; AVX2-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]
1775; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1776; AVX2-NEXT:    vpinsrw $4, %eax, %xmm3, %xmm3
1777; AVX2-NEXT:    vmovd %xmm1, %eax
1778; AVX2-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm2[1,0]
1779; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1780; AVX2-NEXT:    vpinsrw $5, %eax, %xmm3, %xmm3
1781; AVX2-NEXT:    vmovd %xmm1, %eax
1782; AVX2-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1783; AVX2-NEXT:    vpermilps {{.*#+}} xmm2 = xmm2[3,1,2,3]
1784; AVX2-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
1785; AVX2-NEXT:    vpinsrw $6, %eax, %xmm3, %xmm3
1786; AVX2-NEXT:    vmovd %xmm2, %eax
1787; AVX2-NEXT:    vpinsrw $7, %eax, %xmm3, %xmm2
1788; AVX2-NEXT:    vmovd %xmm1, %eax
1789; AVX2-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1790; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1791; AVX2-NEXT:    vmovd %eax, %xmm3
1792; AVX2-NEXT:    vmovd %xmm1, %eax
1793; AVX2-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
1794; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1795; AVX2-NEXT:    vpinsrw $1, %eax, %xmm3, %xmm3
1796; AVX2-NEXT:    vmovd %xmm1, %eax
1797; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm1
1798; AVX2-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
1799; AVX2-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1800; AVX2-NEXT:    vpinsrw $2, %eax, %xmm3, %xmm3
1801; AVX2-NEXT:    vmovd %xmm0, %eax
1802; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm0
1803; AVX2-NEXT:    vpinsrw $3, %eax, %xmm3, %xmm3
1804; AVX2-NEXT:    vmovd %xmm0, %eax
1805; AVX2-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
1806; AVX2-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1807; AVX2-NEXT:    vpinsrw $4, %eax, %xmm3, %xmm3
1808; AVX2-NEXT:    vmovd %xmm0, %eax
1809; AVX2-NEXT:    vpermilps {{.*#+}} xmm0 = xmm1[3,1,2,3]
1810; AVX2-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1811; AVX2-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm1[1,0]
1812; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1813; AVX2-NEXT:    vpinsrw $5, %eax, %xmm3, %xmm3
1814; AVX2-NEXT:    vmovd %xmm1, %eax
1815; AVX2-NEXT:    vpinsrw $6, %eax, %xmm3, %xmm1
1816; AVX2-NEXT:    vmovd %xmm0, %eax
1817; AVX2-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm0
1818; AVX2-NEXT:    vinserti128 $1, %xmm2, %ymm0, %ymm0
1819; AVX2-NEXT:    retq
1820;
1821; AVX512-LABEL: cvt_16f32_to_16i16:
1822; AVX512:       # BB#0:
1823; AVX512-NEXT:    vextractf64x4 $1, %zmm0, %ymm1
1824; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm2
1825; AVX512-NEXT:    vmovd %xmm2, %eax
1826; AVX512-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
1827; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
1828; AVX512-NEXT:    vmovd %eax, %xmm3
1829; AVX512-NEXT:    vmovd %xmm2, %eax
1830; AVX512-NEXT:    vpermilpd {{.*#+}} xmm2 = xmm1[1,0]
1831; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
1832; AVX512-NEXT:    vpinsrw $1, %eax, %xmm3, %xmm3
1833; AVX512-NEXT:    vmovd %xmm2, %eax
1834; AVX512-NEXT:    vextractf128 $1, %ymm1, %xmm2
1835; AVX512-NEXT:    vpermilps {{.*#+}} xmm1 = xmm1[3,1,2,3]
1836; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1837; AVX512-NEXT:    vpinsrw $2, %eax, %xmm3, %xmm3
1838; AVX512-NEXT:    vmovd %xmm1, %eax
1839; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm1
1840; AVX512-NEXT:    vpinsrw $3, %eax, %xmm3, %xmm3
1841; AVX512-NEXT:    vmovd %xmm1, %eax
1842; AVX512-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]
1843; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1844; AVX512-NEXT:    vpinsrw $4, %eax, %xmm3, %xmm3
1845; AVX512-NEXT:    vmovd %xmm1, %eax
1846; AVX512-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm2[1,0]
1847; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1848; AVX512-NEXT:    vpinsrw $5, %eax, %xmm3, %xmm3
1849; AVX512-NEXT:    vmovd %xmm1, %eax
1850; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1851; AVX512-NEXT:    vpermilps {{.*#+}} xmm2 = xmm2[3,1,2,3]
1852; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
1853; AVX512-NEXT:    vpinsrw $6, %eax, %xmm3, %xmm3
1854; AVX512-NEXT:    vmovd %xmm2, %eax
1855; AVX512-NEXT:    vpinsrw $7, %eax, %xmm3, %xmm2
1856; AVX512-NEXT:    vmovd %xmm1, %eax
1857; AVX512-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1858; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1859; AVX512-NEXT:    vmovd %eax, %xmm3
1860; AVX512-NEXT:    vmovd %xmm1, %eax
1861; AVX512-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
1862; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1863; AVX512-NEXT:    vpinsrw $1, %eax, %xmm3, %xmm3
1864; AVX512-NEXT:    vmovd %xmm1, %eax
1865; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm1
1866; AVX512-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
1867; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1868; AVX512-NEXT:    vpinsrw $2, %eax, %xmm3, %xmm3
1869; AVX512-NEXT:    vmovd %xmm0, %eax
1870; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm0
1871; AVX512-NEXT:    vpinsrw $3, %eax, %xmm3, %xmm3
1872; AVX512-NEXT:    vmovd %xmm0, %eax
1873; AVX512-NEXT:    vmovshdup {{.*#+}} xmm0 = xmm1[1,1,3,3]
1874; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1875; AVX512-NEXT:    vpinsrw $4, %eax, %xmm3, %xmm3
1876; AVX512-NEXT:    vmovd %xmm0, %eax
1877; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm1[1,0]
1878; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1879; AVX512-NEXT:    vpinsrw $5, %eax, %xmm3, %xmm3
1880; AVX512-NEXT:    vmovd %xmm0, %eax
1881; AVX512-NEXT:    vpermilps {{.*#+}} xmm0 = xmm1[3,1,2,3]
1882; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1883; AVX512-NEXT:    vpinsrw $6, %eax, %xmm3, %xmm1
1884; AVX512-NEXT:    vmovd %xmm0, %eax
1885; AVX512-NEXT:    vpinsrw $7, %eax, %xmm1, %xmm0
1886; AVX512-NEXT:    vinserti128 $1, %xmm2, %ymm0, %ymm0
1887; AVX512-NEXT:    retq
1888  %1 = fptrunc <16 x float> %a0 to <16 x half>
1889  %2 = bitcast <16 x half> %1 to <16 x i16>
1890  ret <16 x i16> %2
1891}
1892
1893;
1894; Float to Half (Store)
1895;
1896
1897define void @store_cvt_f32_to_i16(float %a0, i16* %a1) {
1898; ALL-LABEL: store_cvt_f32_to_i16:
1899; ALL:       # BB#0:
1900; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1901; ALL-NEXT:    vmovd %xmm0, %eax
1902; ALL-NEXT:    movw %ax, (%rdi)
1903; ALL-NEXT:    retq
1904  %1 = fptrunc float %a0 to half
1905  %2 = bitcast half %1 to i16
1906  store i16 %2, i16* %a1
1907  ret void
1908}
1909
1910define void @store_cvt_4f32_to_4i16(<4 x float> %a0, <4 x i16>* %a1) {
1911; ALL-LABEL: store_cvt_4f32_to_4i16:
1912; ALL:       # BB#0:
1913; ALL-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1914; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1915; ALL-NEXT:    vmovd %xmm1, %eax
1916; ALL-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
1917; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1918; ALL-NEXT:    vmovd %xmm1, %ecx
1919; ALL-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1920; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1921; ALL-NEXT:    vmovd %xmm1, %edx
1922; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1923; ALL-NEXT:    vmovd %xmm0, %esi
1924; ALL-NEXT:    movw %si, (%rdi)
1925; ALL-NEXT:    movw %dx, 6(%rdi)
1926; ALL-NEXT:    movw %cx, 4(%rdi)
1927; ALL-NEXT:    movw %ax, 2(%rdi)
1928; ALL-NEXT:    retq
1929  %1 = fptrunc <4 x float> %a0 to <4 x half>
1930  %2 = bitcast <4 x half> %1 to <4 x i16>
1931  store <4 x i16> %2, <4 x i16>* %a1
1932  ret void
1933}
1934
1935define void @store_cvt_4f32_to_8i16_undef(<4 x float> %a0, <8 x i16>* %a1) {
1936; ALL-LABEL: store_cvt_4f32_to_8i16_undef:
1937; ALL:       # BB#0:
1938; ALL-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1939; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1940; ALL-NEXT:    vmovd %xmm1, %eax
1941; ALL-NEXT:    shll $16, %eax
1942; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1943; ALL-NEXT:    vmovd %xmm1, %ecx
1944; ALL-NEXT:    movzwl %cx, %ecx
1945; ALL-NEXT:    orl %eax, %ecx
1946; ALL-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1947; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1948; ALL-NEXT:    vmovd %xmm1, %eax
1949; ALL-NEXT:    shll $16, %eax
1950; ALL-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
1951; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1952; ALL-NEXT:    vmovd %xmm0, %edx
1953; ALL-NEXT:    movzwl %dx, %edx
1954; ALL-NEXT:    orl %eax, %edx
1955; ALL-NEXT:    shlq $32, %rdx
1956; ALL-NEXT:    orq %rcx, %rdx
1957; ALL-NEXT:    vmovq %rdx, %xmm0
1958; ALL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
1959; ALL-NEXT:    vmovdqa %xmm0, (%rdi)
1960; ALL-NEXT:    retq
1961  %1 = fptrunc <4 x float> %a0 to <4 x half>
1962  %2 = bitcast <4 x half> %1 to <4 x i16>
1963  %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1964  store <8 x i16> %3, <8 x i16>* %a1
1965  ret void
1966}
1967
1968define void @store_cvt_4f32_to_8i16_zero(<4 x float> %a0, <8 x i16>* %a1) {
1969; ALL-LABEL: store_cvt_4f32_to_8i16_zero:
1970; ALL:       # BB#0:
1971; ALL-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
1972; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1973; ALL-NEXT:    vmovd %xmm1, %eax
1974; ALL-NEXT:    shll $16, %eax
1975; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm1
1976; ALL-NEXT:    vmovd %xmm1, %ecx
1977; ALL-NEXT:    movzwl %cx, %ecx
1978; ALL-NEXT:    orl %eax, %ecx
1979; ALL-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
1980; ALL-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
1981; ALL-NEXT:    vmovd %xmm1, %eax
1982; ALL-NEXT:    shll $16, %eax
1983; ALL-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
1984; ALL-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
1985; ALL-NEXT:    vmovd %xmm0, %edx
1986; ALL-NEXT:    movzwl %dx, %edx
1987; ALL-NEXT:    orl %eax, %edx
1988; ALL-NEXT:    shlq $32, %rdx
1989; ALL-NEXT:    orq %rcx, %rdx
1990; ALL-NEXT:    vmovq %rdx, %xmm0
1991; ALL-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero
1992; ALL-NEXT:    vmovdqa %xmm0, (%rdi)
1993; ALL-NEXT:    retq
1994  %1 = fptrunc <4 x float> %a0 to <4 x half>
1995  %2 = bitcast <4 x half> %1 to <4 x i16>
1996  %3 = shufflevector <4 x i16> %2, <4 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
1997  store <8 x i16> %3, <8 x i16>* %a1
1998  ret void
1999}
2000
2001define void @store_cvt_8f32_to_8i16(<8 x float> %a0, <8 x i16>* %a1) {
2002; AVX1-LABEL: store_cvt_8f32_to_8i16:
2003; AVX1:       # BB#0:
2004; AVX1-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
2005; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2006; AVX1-NEXT:    vmovd %xmm1, %r8d
2007; AVX1-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
2008; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2009; AVX1-NEXT:    vmovd %xmm1, %r9d
2010; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
2011; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2012; AVX1-NEXT:    vmovd %xmm1, %r10d
2013; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm1
2014; AVX1-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
2015; AVX1-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2016; AVX1-NEXT:    vmovd %xmm2, %r11d
2017; AVX1-NEXT:    vpermilpd {{.*#+}} xmm2 = xmm1[1,0]
2018; AVX1-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2019; AVX1-NEXT:    vmovd %xmm2, %eax
2020; AVX1-NEXT:    vpermilps {{.*#+}} xmm2 = xmm1[3,1,2,3]
2021; AVX1-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2022; AVX1-NEXT:    vmovd %xmm2, %ecx
2023; AVX1-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
2024; AVX1-NEXT:    vmovd %xmm0, %edx
2025; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm0
2026; AVX1-NEXT:    vmovd %xmm0, %esi
2027; AVX1-NEXT:    movw %si, 8(%rdi)
2028; AVX1-NEXT:    movw %dx, (%rdi)
2029; AVX1-NEXT:    movw %cx, 14(%rdi)
2030; AVX1-NEXT:    movw %ax, 12(%rdi)
2031; AVX1-NEXT:    movw %r11w, 10(%rdi)
2032; AVX1-NEXT:    movw %r10w, 6(%rdi)
2033; AVX1-NEXT:    movw %r9w, 4(%rdi)
2034; AVX1-NEXT:    movw %r8w, 2(%rdi)
2035; AVX1-NEXT:    vzeroupper
2036; AVX1-NEXT:    retq
2037;
2038; AVX2-LABEL: store_cvt_8f32_to_8i16:
2039; AVX2:       # BB#0:
2040; AVX2-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
2041; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2042; AVX2-NEXT:    vmovd %xmm1, %r8d
2043; AVX2-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
2044; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2045; AVX2-NEXT:    vmovd %xmm1, %r9d
2046; AVX2-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
2047; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2048; AVX2-NEXT:    vmovd %xmm1, %r10d
2049; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm1
2050; AVX2-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
2051; AVX2-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2052; AVX2-NEXT:    vmovd %xmm2, %r11d
2053; AVX2-NEXT:    vpermilpd {{.*#+}} xmm2 = xmm1[1,0]
2054; AVX2-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2055; AVX2-NEXT:    vmovd %xmm2, %eax
2056; AVX2-NEXT:    vpermilps {{.*#+}} xmm2 = xmm1[3,1,2,3]
2057; AVX2-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2058; AVX2-NEXT:    vmovd %xmm2, %ecx
2059; AVX2-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
2060; AVX2-NEXT:    vmovd %xmm0, %edx
2061; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm0
2062; AVX2-NEXT:    vmovd %xmm0, %esi
2063; AVX2-NEXT:    movw %si, 8(%rdi)
2064; AVX2-NEXT:    movw %dx, (%rdi)
2065; AVX2-NEXT:    movw %cx, 14(%rdi)
2066; AVX2-NEXT:    movw %ax, 12(%rdi)
2067; AVX2-NEXT:    movw %r11w, 10(%rdi)
2068; AVX2-NEXT:    movw %r10w, 6(%rdi)
2069; AVX2-NEXT:    movw %r9w, 4(%rdi)
2070; AVX2-NEXT:    movw %r8w, 2(%rdi)
2071; AVX2-NEXT:    vzeroupper
2072; AVX2-NEXT:    retq
2073;
2074; AVX512-LABEL: store_cvt_8f32_to_8i16:
2075; AVX512:       # BB#0:
2076; AVX512-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm0[1,1,3,3]
2077; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2078; AVX512-NEXT:    vmovd %xmm1, %r8d
2079; AVX512-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm0[1,0]
2080; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2081; AVX512-NEXT:    vmovd %xmm1, %r9d
2082; AVX512-NEXT:    vpermilps {{.*#+}} xmm1 = xmm0[3,1,2,3]
2083; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2084; AVX512-NEXT:    vmovd %xmm1, %r10d
2085; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm1
2086; AVX512-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
2087; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2088; AVX512-NEXT:    vmovd %xmm2, %r11d
2089; AVX512-NEXT:    vpermilpd {{.*#+}} xmm2 = xmm1[1,0]
2090; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2091; AVX512-NEXT:    vmovd %xmm2, %eax
2092; AVX512-NEXT:    vpermilps {{.*#+}} xmm2 = xmm1[3,1,2,3]
2093; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2094; AVX512-NEXT:    vmovd %xmm2, %ecx
2095; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
2096; AVX512-NEXT:    vmovd %xmm0, %edx
2097; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm0
2098; AVX512-NEXT:    vmovd %xmm0, %esi
2099; AVX512-NEXT:    movw %si, 8(%rdi)
2100; AVX512-NEXT:    movw %dx, (%rdi)
2101; AVX512-NEXT:    movw %cx, 14(%rdi)
2102; AVX512-NEXT:    movw %ax, 12(%rdi)
2103; AVX512-NEXT:    movw %r11w, 10(%rdi)
2104; AVX512-NEXT:    movw %r10w, 6(%rdi)
2105; AVX512-NEXT:    movw %r9w, 4(%rdi)
2106; AVX512-NEXT:    movw %r8w, 2(%rdi)
2107; AVX512-NEXT:    retq
2108  %1 = fptrunc <8 x float> %a0 to <8 x half>
2109  %2 = bitcast <8 x half> %1 to <8 x i16>
2110  store <8 x i16> %2, <8 x i16>* %a1
2111  ret void
2112}
2113
2114define void @store_cvt_16f32_to_16i16(<16 x float> %a0, <16 x i16>* %a1) {
2115; AVX1-LABEL: store_cvt_16f32_to_16i16:
2116; AVX1:       # BB#0:
2117; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
2118; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm3
2119; AVX1-NEXT:    vcvtps2ph $4, %xmm3, %xmm4
2120; AVX1-NEXT:    vmovd %xmm4, %eax
2121; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm4
2122; AVX1-NEXT:    movw %ax, 24(%rdi)
2123; AVX1-NEXT:    vmovd %xmm4, %eax
2124; AVX1-NEXT:    vcvtps2ph $4, %xmm2, %xmm4
2125; AVX1-NEXT:    movw %ax, 16(%rdi)
2126; AVX1-NEXT:    vmovd %xmm4, %eax
2127; AVX1-NEXT:    vcvtps2ph $4, %xmm0, %xmm4
2128; AVX1-NEXT:    movw %ax, 8(%rdi)
2129; AVX1-NEXT:    vmovd %xmm4, %eax
2130; AVX1-NEXT:    vpermilps {{.*#+}} xmm4 = xmm3[3,1,2,3]
2131; AVX1-NEXT:    vcvtps2ph $4, %xmm4, %xmm4
2132; AVX1-NEXT:    movw %ax, (%rdi)
2133; AVX1-NEXT:    vmovd %xmm4, %eax
2134; AVX1-NEXT:    vpermilpd {{.*#+}} xmm4 = xmm3[1,0]
2135; AVX1-NEXT:    vcvtps2ph $4, %xmm4, %xmm4
2136; AVX1-NEXT:    movw %ax, 30(%rdi)
2137; AVX1-NEXT:    vmovd %xmm4, %eax
2138; AVX1-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
2139; AVX1-NEXT:    vcvtps2ph $4, %xmm4, %xmm4
2140; AVX1-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm3[1,1,3,3]
2141; AVX1-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2142; AVX1-NEXT:    movw %ax, 28(%rdi)
2143; AVX1-NEXT:    vmovd %xmm3, %eax
2144; AVX1-NEXT:    vpermilps {{.*#+}} xmm3 = xmm1[3,1,2,3]
2145; AVX1-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2146; AVX1-NEXT:    movw %ax, 26(%rdi)
2147; AVX1-NEXT:    vmovd %xmm3, %eax
2148; AVX1-NEXT:    vpermilpd {{.*#+}} xmm3 = xmm1[1,0]
2149; AVX1-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2150; AVX1-NEXT:    movw %ax, 22(%rdi)
2151; AVX1-NEXT:    vmovd %xmm3, %eax
2152; AVX1-NEXT:    vpermilpd {{.*#+}} xmm3 = xmm0[1,0]
2153; AVX1-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2154; AVX1-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
2155; AVX1-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
2156; AVX1-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm1[1,1,3,3]
2157; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2158; AVX1-NEXT:    movw %ax, 20(%rdi)
2159; AVX1-NEXT:    vmovd %xmm1, %eax
2160; AVX1-NEXT:    vpermilps {{.*#+}} xmm1 = xmm2[3,1,2,3]
2161; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2162; AVX1-NEXT:    movw %ax, 18(%rdi)
2163; AVX1-NEXT:    vmovd %xmm1, %eax
2164; AVX1-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]
2165; AVX1-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2166; AVX1-NEXT:    vpermilpd {{.*#+}} xmm2 = xmm2[1,0]
2167; AVX1-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2168; AVX1-NEXT:    movw %ax, 14(%rdi)
2169; AVX1-NEXT:    vmovd %xmm2, %eax
2170; AVX1-NEXT:    movw %ax, 12(%rdi)
2171; AVX1-NEXT:    vmovd %xmm1, %eax
2172; AVX1-NEXT:    movw %ax, 10(%rdi)
2173; AVX1-NEXT:    vmovd %xmm0, %eax
2174; AVX1-NEXT:    movw %ax, 6(%rdi)
2175; AVX1-NEXT:    vmovd %xmm3, %eax
2176; AVX1-NEXT:    movw %ax, 4(%rdi)
2177; AVX1-NEXT:    vmovd %xmm4, %eax
2178; AVX1-NEXT:    movw %ax, 2(%rdi)
2179; AVX1-NEXT:    vzeroupper
2180; AVX1-NEXT:    retq
2181;
2182; AVX2-LABEL: store_cvt_16f32_to_16i16:
2183; AVX2:       # BB#0:
2184; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm2
2185; AVX2-NEXT:    vextractf128 $1, %ymm1, %xmm3
2186; AVX2-NEXT:    vcvtps2ph $4, %xmm3, %xmm4
2187; AVX2-NEXT:    vmovd %xmm4, %eax
2188; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm4
2189; AVX2-NEXT:    movw %ax, 24(%rdi)
2190; AVX2-NEXT:    vmovd %xmm4, %eax
2191; AVX2-NEXT:    vcvtps2ph $4, %xmm2, %xmm4
2192; AVX2-NEXT:    movw %ax, 16(%rdi)
2193; AVX2-NEXT:    vmovd %xmm4, %eax
2194; AVX2-NEXT:    vcvtps2ph $4, %xmm0, %xmm4
2195; AVX2-NEXT:    movw %ax, 8(%rdi)
2196; AVX2-NEXT:    vmovd %xmm4, %eax
2197; AVX2-NEXT:    vpermilps {{.*#+}} xmm4 = xmm3[3,1,2,3]
2198; AVX2-NEXT:    vcvtps2ph $4, %xmm4, %xmm4
2199; AVX2-NEXT:    movw %ax, (%rdi)
2200; AVX2-NEXT:    vmovd %xmm4, %eax
2201; AVX2-NEXT:    vpermilpd {{.*#+}} xmm4 = xmm3[1,0]
2202; AVX2-NEXT:    vcvtps2ph $4, %xmm4, %xmm4
2203; AVX2-NEXT:    movw %ax, 30(%rdi)
2204; AVX2-NEXT:    vmovd %xmm4, %eax
2205; AVX2-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
2206; AVX2-NEXT:    vcvtps2ph $4, %xmm4, %xmm4
2207; AVX2-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm3[1,1,3,3]
2208; AVX2-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2209; AVX2-NEXT:    movw %ax, 28(%rdi)
2210; AVX2-NEXT:    vmovd %xmm3, %eax
2211; AVX2-NEXT:    vpermilps {{.*#+}} xmm3 = xmm1[3,1,2,3]
2212; AVX2-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2213; AVX2-NEXT:    movw %ax, 26(%rdi)
2214; AVX2-NEXT:    vmovd %xmm3, %eax
2215; AVX2-NEXT:    vpermilpd {{.*#+}} xmm3 = xmm1[1,0]
2216; AVX2-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2217; AVX2-NEXT:    movw %ax, 22(%rdi)
2218; AVX2-NEXT:    vmovd %xmm3, %eax
2219; AVX2-NEXT:    vpermilpd {{.*#+}} xmm3 = xmm0[1,0]
2220; AVX2-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2221; AVX2-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
2222; AVX2-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
2223; AVX2-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm1[1,1,3,3]
2224; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2225; AVX2-NEXT:    movw %ax, 20(%rdi)
2226; AVX2-NEXT:    vmovd %xmm1, %eax
2227; AVX2-NEXT:    vpermilps {{.*#+}} xmm1 = xmm2[3,1,2,3]
2228; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2229; AVX2-NEXT:    movw %ax, 18(%rdi)
2230; AVX2-NEXT:    vmovd %xmm1, %eax
2231; AVX2-NEXT:    vmovshdup {{.*#+}} xmm1 = xmm2[1,1,3,3]
2232; AVX2-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2233; AVX2-NEXT:    vpermilpd {{.*#+}} xmm2 = xmm2[1,0]
2234; AVX2-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2235; AVX2-NEXT:    movw %ax, 14(%rdi)
2236; AVX2-NEXT:    vmovd %xmm2, %eax
2237; AVX2-NEXT:    movw %ax, 12(%rdi)
2238; AVX2-NEXT:    vmovd %xmm1, %eax
2239; AVX2-NEXT:    movw %ax, 10(%rdi)
2240; AVX2-NEXT:    vmovd %xmm0, %eax
2241; AVX2-NEXT:    movw %ax, 6(%rdi)
2242; AVX2-NEXT:    vmovd %xmm3, %eax
2243; AVX2-NEXT:    movw %ax, 4(%rdi)
2244; AVX2-NEXT:    vmovd %xmm4, %eax
2245; AVX2-NEXT:    movw %ax, 2(%rdi)
2246; AVX2-NEXT:    vzeroupper
2247; AVX2-NEXT:    retq
2248;
2249; AVX512-LABEL: store_cvt_16f32_to_16i16:
2250; AVX512:       # BB#0:
2251; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm1
2252; AVX512-NEXT:    vextractf64x4 $1, %zmm0, %ymm2
2253; AVX512-NEXT:    vextractf128 $1, %ymm2, %xmm3
2254; AVX512-NEXT:    vcvtps2ph $4, %xmm3, %xmm4
2255; AVX512-NEXT:    vmovd %xmm4, %eax
2256; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm4
2257; AVX512-NEXT:    movw %ax, 24(%rdi)
2258; AVX512-NEXT:    vmovd %xmm4, %eax
2259; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm4
2260; AVX512-NEXT:    movw %ax, 16(%rdi)
2261; AVX512-NEXT:    vmovd %xmm4, %eax
2262; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm4
2263; AVX512-NEXT:    movw %ax, 8(%rdi)
2264; AVX512-NEXT:    vmovd %xmm4, %eax
2265; AVX512-NEXT:    vpermilps {{.*#+}} xmm4 = xmm3[3,1,2,3]
2266; AVX512-NEXT:    vcvtps2ph $4, %xmm4, %xmm4
2267; AVX512-NEXT:    movw %ax, (%rdi)
2268; AVX512-NEXT:    vmovd %xmm4, %eax
2269; AVX512-NEXT:    vpermilpd {{.*#+}} xmm4 = xmm3[1,0]
2270; AVX512-NEXT:    vcvtps2ph $4, %xmm4, %xmm4
2271; AVX512-NEXT:    movw %ax, 30(%rdi)
2272; AVX512-NEXT:    vmovd %xmm4, %eax
2273; AVX512-NEXT:    vmovshdup {{.*#+}} xmm4 = xmm0[1,1,3,3]
2274; AVX512-NEXT:    vcvtps2ph $4, %xmm4, %xmm4
2275; AVX512-NEXT:    vmovshdup {{.*#+}} xmm3 = xmm3[1,1,3,3]
2276; AVX512-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2277; AVX512-NEXT:    movw %ax, 28(%rdi)
2278; AVX512-NEXT:    vmovd %xmm3, %eax
2279; AVX512-NEXT:    vpermilps {{.*#+}} xmm3 = xmm2[3,1,2,3]
2280; AVX512-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2281; AVX512-NEXT:    movw %ax, 26(%rdi)
2282; AVX512-NEXT:    vmovd %xmm3, %eax
2283; AVX512-NEXT:    vpermilpd {{.*#+}} xmm3 = xmm2[1,0]
2284; AVX512-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2285; AVX512-NEXT:    movw %ax, 22(%rdi)
2286; AVX512-NEXT:    vmovd %xmm3, %eax
2287; AVX512-NEXT:    vpermilpd {{.*#+}} xmm3 = xmm0[1,0]
2288; AVX512-NEXT:    vcvtps2ph $4, %xmm3, %xmm3
2289; AVX512-NEXT:    vpermilps {{.*#+}} xmm0 = xmm0[3,1,2,3]
2290; AVX512-NEXT:    vcvtps2ph $4, %xmm0, %xmm0
2291; AVX512-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm2[1,1,3,3]
2292; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2293; AVX512-NEXT:    movw %ax, 20(%rdi)
2294; AVX512-NEXT:    vmovd %xmm2, %eax
2295; AVX512-NEXT:    vpermilps {{.*#+}} xmm2 = xmm1[3,1,2,3]
2296; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2297; AVX512-NEXT:    movw %ax, 18(%rdi)
2298; AVX512-NEXT:    vmovd %xmm2, %eax
2299; AVX512-NEXT:    vmovshdup {{.*#+}} xmm2 = xmm1[1,1,3,3]
2300; AVX512-NEXT:    vcvtps2ph $4, %xmm2, %xmm2
2301; AVX512-NEXT:    vpermilpd {{.*#+}} xmm1 = xmm1[1,0]
2302; AVX512-NEXT:    vcvtps2ph $4, %xmm1, %xmm1
2303; AVX512-NEXT:    movw %ax, 14(%rdi)
2304; AVX512-NEXT:    vmovd %xmm1, %eax
2305; AVX512-NEXT:    movw %ax, 12(%rdi)
2306; AVX512-NEXT:    vmovd %xmm2, %eax
2307; AVX512-NEXT:    movw %ax, 10(%rdi)
2308; AVX512-NEXT:    vmovd %xmm0, %eax
2309; AVX512-NEXT:    movw %ax, 6(%rdi)
2310; AVX512-NEXT:    vmovd %xmm3, %eax
2311; AVX512-NEXT:    movw %ax, 4(%rdi)
2312; AVX512-NEXT:    vmovd %xmm4, %eax
2313; AVX512-NEXT:    movw %ax, 2(%rdi)
2314; AVX512-NEXT:    retq
2315  %1 = fptrunc <16 x float> %a0 to <16 x half>
2316  %2 = bitcast <16 x half> %1 to <16 x i16>
2317  store <16 x i16> %2, <16 x i16>* %a1
2318  ret void
2319}
2320
2321;
2322; Double to Half
2323;
2324
2325define i16 @cvt_f64_to_i16(double %a0) {
2326; ALL-LABEL: cvt_f64_to_i16:
2327; ALL:       # BB#0:
2328; ALL-NEXT:    jmp __truncdfhf2 # TAILCALL
2329  %1 = fptrunc double %a0 to half
2330  %2 = bitcast half %1 to i16
2331  ret i16 %2
2332}
2333
2334define <2 x i16> @cvt_2f64_to_2i16(<2 x double> %a0) {
2335; ALL-LABEL: cvt_2f64_to_2i16:
2336; ALL:       # BB#0:
2337; ALL-NEXT:    pushq %rbx
2338; ALL-NEXT:  .Ltmp0:
2339; ALL-NEXT:    .cfi_def_cfa_offset 16
2340; ALL-NEXT:    subq $16, %rsp
2341; ALL-NEXT:  .Ltmp1:
2342; ALL-NEXT:    .cfi_def_cfa_offset 32
2343; ALL-NEXT:  .Ltmp2:
2344; ALL-NEXT:    .cfi_offset %rbx, -16
2345; ALL-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2346; ALL-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2347; ALL-NEXT:    callq __truncdfhf2
2348; ALL-NEXT:    movw %ax, %bx
2349; ALL-NEXT:    shll $16, %ebx
2350; ALL-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2351; ALL-NEXT:    callq __truncdfhf2
2352; ALL-NEXT:    movzwl %ax, %eax
2353; ALL-NEXT:    orl %ebx, %eax
2354; ALL-NEXT:    vmovd %eax, %xmm0
2355; ALL-NEXT:    addq $16, %rsp
2356; ALL-NEXT:    popq %rbx
2357; ALL-NEXT:    retq
2358  %1 = fptrunc <2 x double> %a0 to <2 x half>
2359  %2 = bitcast <2 x half> %1 to <2 x i16>
2360  ret <2 x i16> %2
2361}
2362
2363define <4 x i16> @cvt_4f64_to_4i16(<4 x double> %a0) {
2364; AVX1-LABEL: cvt_4f64_to_4i16:
2365; AVX1:       # BB#0:
2366; AVX1-NEXT:    pushq %r14
2367; AVX1-NEXT:  .Ltmp3:
2368; AVX1-NEXT:    .cfi_def_cfa_offset 16
2369; AVX1-NEXT:    pushq %rbx
2370; AVX1-NEXT:  .Ltmp4:
2371; AVX1-NEXT:    .cfi_def_cfa_offset 24
2372; AVX1-NEXT:    subq $40, %rsp
2373; AVX1-NEXT:  .Ltmp5:
2374; AVX1-NEXT:    .cfi_def_cfa_offset 64
2375; AVX1-NEXT:  .Ltmp6:
2376; AVX1-NEXT:    .cfi_offset %rbx, -24
2377; AVX1-NEXT:  .Ltmp7:
2378; AVX1-NEXT:    .cfi_offset %r14, -16
2379; AVX1-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
2380; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2381; AVX1-NEXT:    vzeroupper
2382; AVX1-NEXT:    callq __truncdfhf2
2383; AVX1-NEXT:    movw %ax, %bx
2384; AVX1-NEXT:    shll $16, %ebx
2385; AVX1-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2386; AVX1-NEXT:    vzeroupper
2387; AVX1-NEXT:    callq __truncdfhf2
2388; AVX1-NEXT:    movzwl %ax, %r14d
2389; AVX1-NEXT:    orl %ebx, %r14d
2390; AVX1-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2391; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
2392; AVX1-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2393; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2394; AVX1-NEXT:    vzeroupper
2395; AVX1-NEXT:    callq __truncdfhf2
2396; AVX1-NEXT:    movw %ax, %bx
2397; AVX1-NEXT:    shll $16, %ebx
2398; AVX1-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2399; AVX1-NEXT:    callq __truncdfhf2
2400; AVX1-NEXT:    movzwl %ax, %eax
2401; AVX1-NEXT:    orl %ebx, %eax
2402; AVX1-NEXT:    shlq $32, %rax
2403; AVX1-NEXT:    orq %r14, %rax
2404; AVX1-NEXT:    vmovq %rax, %xmm0
2405; AVX1-NEXT:    addq $40, %rsp
2406; AVX1-NEXT:    popq %rbx
2407; AVX1-NEXT:    popq %r14
2408; AVX1-NEXT:    retq
2409;
2410; AVX2-LABEL: cvt_4f64_to_4i16:
2411; AVX2:       # BB#0:
2412; AVX2-NEXT:    pushq %r14
2413; AVX2-NEXT:  .Ltmp3:
2414; AVX2-NEXT:    .cfi_def_cfa_offset 16
2415; AVX2-NEXT:    pushq %rbx
2416; AVX2-NEXT:  .Ltmp4:
2417; AVX2-NEXT:    .cfi_def_cfa_offset 24
2418; AVX2-NEXT:    subq $40, %rsp
2419; AVX2-NEXT:  .Ltmp5:
2420; AVX2-NEXT:    .cfi_def_cfa_offset 64
2421; AVX2-NEXT:  .Ltmp6:
2422; AVX2-NEXT:    .cfi_offset %rbx, -24
2423; AVX2-NEXT:  .Ltmp7:
2424; AVX2-NEXT:    .cfi_offset %r14, -16
2425; AVX2-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
2426; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2427; AVX2-NEXT:    vzeroupper
2428; AVX2-NEXT:    callq __truncdfhf2
2429; AVX2-NEXT:    movw %ax, %bx
2430; AVX2-NEXT:    shll $16, %ebx
2431; AVX2-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2432; AVX2-NEXT:    vzeroupper
2433; AVX2-NEXT:    callq __truncdfhf2
2434; AVX2-NEXT:    movzwl %ax, %r14d
2435; AVX2-NEXT:    orl %ebx, %r14d
2436; AVX2-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2437; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
2438; AVX2-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2439; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2440; AVX2-NEXT:    vzeroupper
2441; AVX2-NEXT:    callq __truncdfhf2
2442; AVX2-NEXT:    movw %ax, %bx
2443; AVX2-NEXT:    shll $16, %ebx
2444; AVX2-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2445; AVX2-NEXT:    callq __truncdfhf2
2446; AVX2-NEXT:    movzwl %ax, %eax
2447; AVX2-NEXT:    orl %ebx, %eax
2448; AVX2-NEXT:    shlq $32, %rax
2449; AVX2-NEXT:    orq %r14, %rax
2450; AVX2-NEXT:    vmovq %rax, %xmm0
2451; AVX2-NEXT:    addq $40, %rsp
2452; AVX2-NEXT:    popq %rbx
2453; AVX2-NEXT:    popq %r14
2454; AVX2-NEXT:    retq
2455;
2456; AVX512-LABEL: cvt_4f64_to_4i16:
2457; AVX512:       # BB#0:
2458; AVX512-NEXT:    pushq %r14
2459; AVX512-NEXT:  .Ltmp3:
2460; AVX512-NEXT:    .cfi_def_cfa_offset 16
2461; AVX512-NEXT:    pushq %rbx
2462; AVX512-NEXT:  .Ltmp4:
2463; AVX512-NEXT:    .cfi_def_cfa_offset 24
2464; AVX512-NEXT:    subq $40, %rsp
2465; AVX512-NEXT:  .Ltmp5:
2466; AVX512-NEXT:    .cfi_def_cfa_offset 64
2467; AVX512-NEXT:  .Ltmp6:
2468; AVX512-NEXT:    .cfi_offset %rbx, -24
2469; AVX512-NEXT:  .Ltmp7:
2470; AVX512-NEXT:    .cfi_offset %r14, -16
2471; AVX512-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
2472; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2473; AVX512-NEXT:    callq __truncdfhf2
2474; AVX512-NEXT:    movw %ax, %bx
2475; AVX512-NEXT:    shll $16, %ebx
2476; AVX512-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2477; AVX512-NEXT:    callq __truncdfhf2
2478; AVX512-NEXT:    movzwl %ax, %r14d
2479; AVX512-NEXT:    orl %ebx, %r14d
2480; AVX512-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2481; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
2482; AVX512-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2483; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2484; AVX512-NEXT:    callq __truncdfhf2
2485; AVX512-NEXT:    movw %ax, %bx
2486; AVX512-NEXT:    shll $16, %ebx
2487; AVX512-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2488; AVX512-NEXT:    callq __truncdfhf2
2489; AVX512-NEXT:    movzwl %ax, %eax
2490; AVX512-NEXT:    orl %ebx, %eax
2491; AVX512-NEXT:    shlq $32, %rax
2492; AVX512-NEXT:    orq %r14, %rax
2493; AVX512-NEXT:    vmovq %rax, %xmm0
2494; AVX512-NEXT:    addq $40, %rsp
2495; AVX512-NEXT:    popq %rbx
2496; AVX512-NEXT:    popq %r14
2497; AVX512-NEXT:    retq
2498  %1 = fptrunc <4 x double> %a0 to <4 x half>
2499  %2 = bitcast <4 x half> %1 to <4 x i16>
2500  ret <4 x i16> %2
2501}
2502
2503define <8 x i16> @cvt_4f64_to_8i16_undef(<4 x double> %a0) {
2504; AVX1-LABEL: cvt_4f64_to_8i16_undef:
2505; AVX1:       # BB#0:
2506; AVX1-NEXT:    pushq %r14
2507; AVX1-NEXT:  .Ltmp8:
2508; AVX1-NEXT:    .cfi_def_cfa_offset 16
2509; AVX1-NEXT:    pushq %rbx
2510; AVX1-NEXT:  .Ltmp9:
2511; AVX1-NEXT:    .cfi_def_cfa_offset 24
2512; AVX1-NEXT:    subq $40, %rsp
2513; AVX1-NEXT:  .Ltmp10:
2514; AVX1-NEXT:    .cfi_def_cfa_offset 64
2515; AVX1-NEXT:  .Ltmp11:
2516; AVX1-NEXT:    .cfi_offset %rbx, -24
2517; AVX1-NEXT:  .Ltmp12:
2518; AVX1-NEXT:    .cfi_offset %r14, -16
2519; AVX1-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
2520; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2521; AVX1-NEXT:    vzeroupper
2522; AVX1-NEXT:    callq __truncdfhf2
2523; AVX1-NEXT:    movw %ax, %bx
2524; AVX1-NEXT:    shll $16, %ebx
2525; AVX1-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2526; AVX1-NEXT:    vzeroupper
2527; AVX1-NEXT:    callq __truncdfhf2
2528; AVX1-NEXT:    movzwl %ax, %r14d
2529; AVX1-NEXT:    orl %ebx, %r14d
2530; AVX1-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2531; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
2532; AVX1-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2533; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2534; AVX1-NEXT:    vzeroupper
2535; AVX1-NEXT:    callq __truncdfhf2
2536; AVX1-NEXT:    movw %ax, %bx
2537; AVX1-NEXT:    shll $16, %ebx
2538; AVX1-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2539; AVX1-NEXT:    callq __truncdfhf2
2540; AVX1-NEXT:    movzwl %ax, %eax
2541; AVX1-NEXT:    orl %ebx, %eax
2542; AVX1-NEXT:    shlq $32, %rax
2543; AVX1-NEXT:    orq %r14, %rax
2544; AVX1-NEXT:    vmovq %rax, %xmm0
2545; AVX1-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
2546; AVX1-NEXT:    addq $40, %rsp
2547; AVX1-NEXT:    popq %rbx
2548; AVX1-NEXT:    popq %r14
2549; AVX1-NEXT:    retq
2550;
2551; AVX2-LABEL: cvt_4f64_to_8i16_undef:
2552; AVX2:       # BB#0:
2553; AVX2-NEXT:    pushq %r14
2554; AVX2-NEXT:  .Ltmp8:
2555; AVX2-NEXT:    .cfi_def_cfa_offset 16
2556; AVX2-NEXT:    pushq %rbx
2557; AVX2-NEXT:  .Ltmp9:
2558; AVX2-NEXT:    .cfi_def_cfa_offset 24
2559; AVX2-NEXT:    subq $40, %rsp
2560; AVX2-NEXT:  .Ltmp10:
2561; AVX2-NEXT:    .cfi_def_cfa_offset 64
2562; AVX2-NEXT:  .Ltmp11:
2563; AVX2-NEXT:    .cfi_offset %rbx, -24
2564; AVX2-NEXT:  .Ltmp12:
2565; AVX2-NEXT:    .cfi_offset %r14, -16
2566; AVX2-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
2567; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2568; AVX2-NEXT:    vzeroupper
2569; AVX2-NEXT:    callq __truncdfhf2
2570; AVX2-NEXT:    movw %ax, %bx
2571; AVX2-NEXT:    shll $16, %ebx
2572; AVX2-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2573; AVX2-NEXT:    vzeroupper
2574; AVX2-NEXT:    callq __truncdfhf2
2575; AVX2-NEXT:    movzwl %ax, %r14d
2576; AVX2-NEXT:    orl %ebx, %r14d
2577; AVX2-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2578; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
2579; AVX2-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2580; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2581; AVX2-NEXT:    vzeroupper
2582; AVX2-NEXT:    callq __truncdfhf2
2583; AVX2-NEXT:    movw %ax, %bx
2584; AVX2-NEXT:    shll $16, %ebx
2585; AVX2-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2586; AVX2-NEXT:    callq __truncdfhf2
2587; AVX2-NEXT:    movzwl %ax, %eax
2588; AVX2-NEXT:    orl %ebx, %eax
2589; AVX2-NEXT:    shlq $32, %rax
2590; AVX2-NEXT:    orq %r14, %rax
2591; AVX2-NEXT:    vmovq %rax, %xmm0
2592; AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
2593; AVX2-NEXT:    addq $40, %rsp
2594; AVX2-NEXT:    popq %rbx
2595; AVX2-NEXT:    popq %r14
2596; AVX2-NEXT:    retq
2597;
2598; AVX512-LABEL: cvt_4f64_to_8i16_undef:
2599; AVX512:       # BB#0:
2600; AVX512-NEXT:    pushq %r14
2601; AVX512-NEXT:  .Ltmp8:
2602; AVX512-NEXT:    .cfi_def_cfa_offset 16
2603; AVX512-NEXT:    pushq %rbx
2604; AVX512-NEXT:  .Ltmp9:
2605; AVX512-NEXT:    .cfi_def_cfa_offset 24
2606; AVX512-NEXT:    subq $40, %rsp
2607; AVX512-NEXT:  .Ltmp10:
2608; AVX512-NEXT:    .cfi_def_cfa_offset 64
2609; AVX512-NEXT:  .Ltmp11:
2610; AVX512-NEXT:    .cfi_offset %rbx, -24
2611; AVX512-NEXT:  .Ltmp12:
2612; AVX512-NEXT:    .cfi_offset %r14, -16
2613; AVX512-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
2614; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2615; AVX512-NEXT:    callq __truncdfhf2
2616; AVX512-NEXT:    movw %ax, %bx
2617; AVX512-NEXT:    shll $16, %ebx
2618; AVX512-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2619; AVX512-NEXT:    callq __truncdfhf2
2620; AVX512-NEXT:    movzwl %ax, %r14d
2621; AVX512-NEXT:    orl %ebx, %r14d
2622; AVX512-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2623; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
2624; AVX512-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2625; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2626; AVX512-NEXT:    callq __truncdfhf2
2627; AVX512-NEXT:    movw %ax, %bx
2628; AVX512-NEXT:    shll $16, %ebx
2629; AVX512-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2630; AVX512-NEXT:    callq __truncdfhf2
2631; AVX512-NEXT:    movzwl %ax, %eax
2632; AVX512-NEXT:    orl %ebx, %eax
2633; AVX512-NEXT:    shlq $32, %rax
2634; AVX512-NEXT:    orq %r14, %rax
2635; AVX512-NEXT:    vmovq %rax, %xmm0
2636; AVX512-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
2637; AVX512-NEXT:    addq $40, %rsp
2638; AVX512-NEXT:    popq %rbx
2639; AVX512-NEXT:    popq %r14
2640; AVX512-NEXT:    retq
2641  %1 = fptrunc <4 x double> %a0 to <4 x half>
2642  %2 = bitcast <4 x half> %1 to <4 x i16>
2643  %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
2644  ret <8 x i16> %3
2645}
2646
2647define <8 x i16> @cvt_4f64_to_8i16_zero(<4 x double> %a0) {
2648; AVX1-LABEL: cvt_4f64_to_8i16_zero:
2649; AVX1:       # BB#0:
2650; AVX1-NEXT:    pushq %r14
2651; AVX1-NEXT:  .Ltmp13:
2652; AVX1-NEXT:    .cfi_def_cfa_offset 16
2653; AVX1-NEXT:    pushq %rbx
2654; AVX1-NEXT:  .Ltmp14:
2655; AVX1-NEXT:    .cfi_def_cfa_offset 24
2656; AVX1-NEXT:    subq $40, %rsp
2657; AVX1-NEXT:  .Ltmp15:
2658; AVX1-NEXT:    .cfi_def_cfa_offset 64
2659; AVX1-NEXT:  .Ltmp16:
2660; AVX1-NEXT:    .cfi_offset %rbx, -24
2661; AVX1-NEXT:  .Ltmp17:
2662; AVX1-NEXT:    .cfi_offset %r14, -16
2663; AVX1-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
2664; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2665; AVX1-NEXT:    vzeroupper
2666; AVX1-NEXT:    callq __truncdfhf2
2667; AVX1-NEXT:    movw %ax, %bx
2668; AVX1-NEXT:    shll $16, %ebx
2669; AVX1-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2670; AVX1-NEXT:    vzeroupper
2671; AVX1-NEXT:    callq __truncdfhf2
2672; AVX1-NEXT:    movzwl %ax, %r14d
2673; AVX1-NEXT:    orl %ebx, %r14d
2674; AVX1-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2675; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
2676; AVX1-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2677; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2678; AVX1-NEXT:    vzeroupper
2679; AVX1-NEXT:    callq __truncdfhf2
2680; AVX1-NEXT:    movw %ax, %bx
2681; AVX1-NEXT:    shll $16, %ebx
2682; AVX1-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2683; AVX1-NEXT:    callq __truncdfhf2
2684; AVX1-NEXT:    movzwl %ax, %eax
2685; AVX1-NEXT:    orl %ebx, %eax
2686; AVX1-NEXT:    shlq $32, %rax
2687; AVX1-NEXT:    orq %r14, %rax
2688; AVX1-NEXT:    vmovq %rax, %xmm0
2689; AVX1-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero
2690; AVX1-NEXT:    addq $40, %rsp
2691; AVX1-NEXT:    popq %rbx
2692; AVX1-NEXT:    popq %r14
2693; AVX1-NEXT:    retq
2694;
2695; AVX2-LABEL: cvt_4f64_to_8i16_zero:
2696; AVX2:       # BB#0:
2697; AVX2-NEXT:    pushq %r14
2698; AVX2-NEXT:  .Ltmp13:
2699; AVX2-NEXT:    .cfi_def_cfa_offset 16
2700; AVX2-NEXT:    pushq %rbx
2701; AVX2-NEXT:  .Ltmp14:
2702; AVX2-NEXT:    .cfi_def_cfa_offset 24
2703; AVX2-NEXT:    subq $40, %rsp
2704; AVX2-NEXT:  .Ltmp15:
2705; AVX2-NEXT:    .cfi_def_cfa_offset 64
2706; AVX2-NEXT:  .Ltmp16:
2707; AVX2-NEXT:    .cfi_offset %rbx, -24
2708; AVX2-NEXT:  .Ltmp17:
2709; AVX2-NEXT:    .cfi_offset %r14, -16
2710; AVX2-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
2711; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2712; AVX2-NEXT:    vzeroupper
2713; AVX2-NEXT:    callq __truncdfhf2
2714; AVX2-NEXT:    movw %ax, %bx
2715; AVX2-NEXT:    shll $16, %ebx
2716; AVX2-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2717; AVX2-NEXT:    vzeroupper
2718; AVX2-NEXT:    callq __truncdfhf2
2719; AVX2-NEXT:    movzwl %ax, %r14d
2720; AVX2-NEXT:    orl %ebx, %r14d
2721; AVX2-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2722; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
2723; AVX2-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2724; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2725; AVX2-NEXT:    vzeroupper
2726; AVX2-NEXT:    callq __truncdfhf2
2727; AVX2-NEXT:    movw %ax, %bx
2728; AVX2-NEXT:    shll $16, %ebx
2729; AVX2-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2730; AVX2-NEXT:    callq __truncdfhf2
2731; AVX2-NEXT:    movzwl %ax, %eax
2732; AVX2-NEXT:    orl %ebx, %eax
2733; AVX2-NEXT:    shlq $32, %rax
2734; AVX2-NEXT:    orq %r14, %rax
2735; AVX2-NEXT:    vmovq %rax, %xmm0
2736; AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero
2737; AVX2-NEXT:    addq $40, %rsp
2738; AVX2-NEXT:    popq %rbx
2739; AVX2-NEXT:    popq %r14
2740; AVX2-NEXT:    retq
2741;
2742; AVX512-LABEL: cvt_4f64_to_8i16_zero:
2743; AVX512:       # BB#0:
2744; AVX512-NEXT:    pushq %r14
2745; AVX512-NEXT:  .Ltmp13:
2746; AVX512-NEXT:    .cfi_def_cfa_offset 16
2747; AVX512-NEXT:    pushq %rbx
2748; AVX512-NEXT:  .Ltmp14:
2749; AVX512-NEXT:    .cfi_def_cfa_offset 24
2750; AVX512-NEXT:    subq $40, %rsp
2751; AVX512-NEXT:  .Ltmp15:
2752; AVX512-NEXT:    .cfi_def_cfa_offset 64
2753; AVX512-NEXT:  .Ltmp16:
2754; AVX512-NEXT:    .cfi_offset %rbx, -24
2755; AVX512-NEXT:  .Ltmp17:
2756; AVX512-NEXT:    .cfi_offset %r14, -16
2757; AVX512-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
2758; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2759; AVX512-NEXT:    callq __truncdfhf2
2760; AVX512-NEXT:    movw %ax, %bx
2761; AVX512-NEXT:    shll $16, %ebx
2762; AVX512-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2763; AVX512-NEXT:    callq __truncdfhf2
2764; AVX512-NEXT:    movzwl %ax, %r14d
2765; AVX512-NEXT:    orl %ebx, %r14d
2766; AVX512-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2767; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
2768; AVX512-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2769; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2770; AVX512-NEXT:    callq __truncdfhf2
2771; AVX512-NEXT:    movw %ax, %bx
2772; AVX512-NEXT:    shll $16, %ebx
2773; AVX512-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2774; AVX512-NEXT:    callq __truncdfhf2
2775; AVX512-NEXT:    movzwl %ax, %eax
2776; AVX512-NEXT:    orl %ebx, %eax
2777; AVX512-NEXT:    shlq $32, %rax
2778; AVX512-NEXT:    orq %r14, %rax
2779; AVX512-NEXT:    vmovq %rax, %xmm0
2780; AVX512-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero
2781; AVX512-NEXT:    addq $40, %rsp
2782; AVX512-NEXT:    popq %rbx
2783; AVX512-NEXT:    popq %r14
2784; AVX512-NEXT:    retq
2785  %1 = fptrunc <4 x double> %a0 to <4 x half>
2786  %2 = bitcast <4 x half> %1 to <4 x i16>
2787  %3 = shufflevector <4 x i16> %2, <4 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
2788  ret <8 x i16> %3
2789}
2790
2791define <8 x i16> @cvt_8f64_to_8i16(<8 x double> %a0) {
2792; AVX1-LABEL: cvt_8f64_to_8i16:
2793; AVX1:       # BB#0:
2794; AVX1-NEXT:    pushq %r15
2795; AVX1-NEXT:  .Ltmp18:
2796; AVX1-NEXT:    .cfi_def_cfa_offset 16
2797; AVX1-NEXT:    pushq %r14
2798; AVX1-NEXT:  .Ltmp19:
2799; AVX1-NEXT:    .cfi_def_cfa_offset 24
2800; AVX1-NEXT:    pushq %rbx
2801; AVX1-NEXT:  .Ltmp20:
2802; AVX1-NEXT:    .cfi_def_cfa_offset 32
2803; AVX1-NEXT:    subq $64, %rsp
2804; AVX1-NEXT:  .Ltmp21:
2805; AVX1-NEXT:    .cfi_def_cfa_offset 96
2806; AVX1-NEXT:  .Ltmp22:
2807; AVX1-NEXT:    .cfi_offset %rbx, -32
2808; AVX1-NEXT:  .Ltmp23:
2809; AVX1-NEXT:    .cfi_offset %r14, -24
2810; AVX1-NEXT:  .Ltmp24:
2811; AVX1-NEXT:    .cfi_offset %r15, -16
2812; AVX1-NEXT:    vmovups %ymm1, (%rsp) # 32-byte Spill
2813; AVX1-NEXT:    vmovupd %ymm0, {{[0-9]+}}(%rsp) # 32-byte Spill
2814; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2815; AVX1-NEXT:    vzeroupper
2816; AVX1-NEXT:    callq __truncdfhf2
2817; AVX1-NEXT:    movw %ax, %bx
2818; AVX1-NEXT:    shll $16, %ebx
2819; AVX1-NEXT:    vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
2820; AVX1-NEXT:    vzeroupper
2821; AVX1-NEXT:    callq __truncdfhf2
2822; AVX1-NEXT:    movzwl %ax, %r15d
2823; AVX1-NEXT:    orl %ebx, %r15d
2824; AVX1-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
2825; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
2826; AVX1-NEXT:    vmovapd %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
2827; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2828; AVX1-NEXT:    vzeroupper
2829; AVX1-NEXT:    callq __truncdfhf2
2830; AVX1-NEXT:    movw %ax, %bx
2831; AVX1-NEXT:    shll $16, %ebx
2832; AVX1-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
2833; AVX1-NEXT:    callq __truncdfhf2
2834; AVX1-NEXT:    movzwl %ax, %r14d
2835; AVX1-NEXT:    orl %ebx, %r14d
2836; AVX1-NEXT:    shlq $32, %r14
2837; AVX1-NEXT:    orq %r15, %r14
2838; AVX1-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2839; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2840; AVX1-NEXT:    vzeroupper
2841; AVX1-NEXT:    callq __truncdfhf2
2842; AVX1-NEXT:    movw %ax, %bx
2843; AVX1-NEXT:    shll $16, %ebx
2844; AVX1-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2845; AVX1-NEXT:    vzeroupper
2846; AVX1-NEXT:    callq __truncdfhf2
2847; AVX1-NEXT:    movzwl %ax, %r15d
2848; AVX1-NEXT:    orl %ebx, %r15d
2849; AVX1-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2850; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
2851; AVX1-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2852; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2853; AVX1-NEXT:    vzeroupper
2854; AVX1-NEXT:    callq __truncdfhf2
2855; AVX1-NEXT:    movw %ax, %bx
2856; AVX1-NEXT:    shll $16, %ebx
2857; AVX1-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2858; AVX1-NEXT:    callq __truncdfhf2
2859; AVX1-NEXT:    movzwl %ax, %eax
2860; AVX1-NEXT:    orl %ebx, %eax
2861; AVX1-NEXT:    shlq $32, %rax
2862; AVX1-NEXT:    orq %r15, %rax
2863; AVX1-NEXT:    vmovq %rax, %xmm0
2864; AVX1-NEXT:    vmovq %r14, %xmm1
2865; AVX1-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
2866; AVX1-NEXT:    addq $64, %rsp
2867; AVX1-NEXT:    popq %rbx
2868; AVX1-NEXT:    popq %r14
2869; AVX1-NEXT:    popq %r15
2870; AVX1-NEXT:    retq
2871;
2872; AVX2-LABEL: cvt_8f64_to_8i16:
2873; AVX2:       # BB#0:
2874; AVX2-NEXT:    pushq %r15
2875; AVX2-NEXT:  .Ltmp18:
2876; AVX2-NEXT:    .cfi_def_cfa_offset 16
2877; AVX2-NEXT:    pushq %r14
2878; AVX2-NEXT:  .Ltmp19:
2879; AVX2-NEXT:    .cfi_def_cfa_offset 24
2880; AVX2-NEXT:    pushq %rbx
2881; AVX2-NEXT:  .Ltmp20:
2882; AVX2-NEXT:    .cfi_def_cfa_offset 32
2883; AVX2-NEXT:    subq $64, %rsp
2884; AVX2-NEXT:  .Ltmp21:
2885; AVX2-NEXT:    .cfi_def_cfa_offset 96
2886; AVX2-NEXT:  .Ltmp22:
2887; AVX2-NEXT:    .cfi_offset %rbx, -32
2888; AVX2-NEXT:  .Ltmp23:
2889; AVX2-NEXT:    .cfi_offset %r14, -24
2890; AVX2-NEXT:  .Ltmp24:
2891; AVX2-NEXT:    .cfi_offset %r15, -16
2892; AVX2-NEXT:    vmovups %ymm1, (%rsp) # 32-byte Spill
2893; AVX2-NEXT:    vmovupd %ymm0, {{[0-9]+}}(%rsp) # 32-byte Spill
2894; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2895; AVX2-NEXT:    vzeroupper
2896; AVX2-NEXT:    callq __truncdfhf2
2897; AVX2-NEXT:    movw %ax, %bx
2898; AVX2-NEXT:    shll $16, %ebx
2899; AVX2-NEXT:    vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
2900; AVX2-NEXT:    vzeroupper
2901; AVX2-NEXT:    callq __truncdfhf2
2902; AVX2-NEXT:    movzwl %ax, %r15d
2903; AVX2-NEXT:    orl %ebx, %r15d
2904; AVX2-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
2905; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
2906; AVX2-NEXT:    vmovapd %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
2907; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2908; AVX2-NEXT:    vzeroupper
2909; AVX2-NEXT:    callq __truncdfhf2
2910; AVX2-NEXT:    movw %ax, %bx
2911; AVX2-NEXT:    shll $16, %ebx
2912; AVX2-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
2913; AVX2-NEXT:    callq __truncdfhf2
2914; AVX2-NEXT:    movzwl %ax, %r14d
2915; AVX2-NEXT:    orl %ebx, %r14d
2916; AVX2-NEXT:    shlq $32, %r14
2917; AVX2-NEXT:    orq %r15, %r14
2918; AVX2-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2919; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2920; AVX2-NEXT:    vzeroupper
2921; AVX2-NEXT:    callq __truncdfhf2
2922; AVX2-NEXT:    movw %ax, %bx
2923; AVX2-NEXT:    shll $16, %ebx
2924; AVX2-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
2925; AVX2-NEXT:    vzeroupper
2926; AVX2-NEXT:    callq __truncdfhf2
2927; AVX2-NEXT:    movzwl %ax, %r15d
2928; AVX2-NEXT:    orl %ebx, %r15d
2929; AVX2-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
2930; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
2931; AVX2-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
2932; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2933; AVX2-NEXT:    vzeroupper
2934; AVX2-NEXT:    callq __truncdfhf2
2935; AVX2-NEXT:    movw %ax, %bx
2936; AVX2-NEXT:    shll $16, %ebx
2937; AVX2-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
2938; AVX2-NEXT:    callq __truncdfhf2
2939; AVX2-NEXT:    movzwl %ax, %eax
2940; AVX2-NEXT:    orl %ebx, %eax
2941; AVX2-NEXT:    shlq $32, %rax
2942; AVX2-NEXT:    orq %r15, %rax
2943; AVX2-NEXT:    vmovq %rax, %xmm0
2944; AVX2-NEXT:    vmovq %r14, %xmm1
2945; AVX2-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
2946; AVX2-NEXT:    addq $64, %rsp
2947; AVX2-NEXT:    popq %rbx
2948; AVX2-NEXT:    popq %r14
2949; AVX2-NEXT:    popq %r15
2950; AVX2-NEXT:    retq
2951;
2952; AVX512-LABEL: cvt_8f64_to_8i16:
2953; AVX512:       # BB#0:
2954; AVX512-NEXT:    pushq %r15
2955; AVX512-NEXT:  .Ltmp18:
2956; AVX512-NEXT:    .cfi_def_cfa_offset 16
2957; AVX512-NEXT:    pushq %r14
2958; AVX512-NEXT:  .Ltmp19:
2959; AVX512-NEXT:    .cfi_def_cfa_offset 24
2960; AVX512-NEXT:    pushq %rbx
2961; AVX512-NEXT:  .Ltmp20:
2962; AVX512-NEXT:    .cfi_def_cfa_offset 32
2963; AVX512-NEXT:    subq $96, %rsp
2964; AVX512-NEXT:  .Ltmp21:
2965; AVX512-NEXT:    .cfi_def_cfa_offset 128
2966; AVX512-NEXT:  .Ltmp22:
2967; AVX512-NEXT:    .cfi_offset %rbx, -32
2968; AVX512-NEXT:  .Ltmp23:
2969; AVX512-NEXT:    .cfi_offset %r14, -24
2970; AVX512-NEXT:  .Ltmp24:
2971; AVX512-NEXT:    .cfi_offset %r15, -16
2972; AVX512-NEXT:    vmovups %zmm0, (%rsp) # 64-byte Spill
2973; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2974; AVX512-NEXT:    callq __truncdfhf2
2975; AVX512-NEXT:    movw %ax, %bx
2976; AVX512-NEXT:    shll $16, %ebx
2977; AVX512-NEXT:    vmovups (%rsp), %zmm0 # 64-byte Reload
2978; AVX512-NEXT:    callq __truncdfhf2
2979; AVX512-NEXT:    movzwl %ax, %r15d
2980; AVX512-NEXT:    orl %ebx, %r15d
2981; AVX512-NEXT:    vmovups (%rsp), %zmm0 # 64-byte Reload
2982; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
2983; AVX512-NEXT:    vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
2984; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2985; AVX512-NEXT:    callq __truncdfhf2
2986; AVX512-NEXT:    movw %ax, %bx
2987; AVX512-NEXT:    shll $16, %ebx
2988; AVX512-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
2989; AVX512-NEXT:    callq __truncdfhf2
2990; AVX512-NEXT:    movzwl %ax, %r14d
2991; AVX512-NEXT:    orl %ebx, %r14d
2992; AVX512-NEXT:    shlq $32, %r14
2993; AVX512-NEXT:    orq %r15, %r14
2994; AVX512-NEXT:    vmovups (%rsp), %zmm0 # 64-byte Reload
2995; AVX512-NEXT:    vextractf64x4 $1, %zmm0, %ymm0
2996; AVX512-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
2997; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
2998; AVX512-NEXT:    callq __truncdfhf2
2999; AVX512-NEXT:    movw %ax, %bx
3000; AVX512-NEXT:    shll $16, %ebx
3001; AVX512-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
3002; AVX512-NEXT:    callq __truncdfhf2
3003; AVX512-NEXT:    movzwl %ax, %r15d
3004; AVX512-NEXT:    orl %ebx, %r15d
3005; AVX512-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
3006; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
3007; AVX512-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
3008; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3009; AVX512-NEXT:    callq __truncdfhf2
3010; AVX512-NEXT:    movw %ax, %bx
3011; AVX512-NEXT:    shll $16, %ebx
3012; AVX512-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
3013; AVX512-NEXT:    callq __truncdfhf2
3014; AVX512-NEXT:    movzwl %ax, %eax
3015; AVX512-NEXT:    orl %ebx, %eax
3016; AVX512-NEXT:    shlq $32, %rax
3017; AVX512-NEXT:    orq %r15, %rax
3018; AVX512-NEXT:    vmovq %rax, %xmm0
3019; AVX512-NEXT:    vmovq %r14, %xmm1
3020; AVX512-NEXT:    vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
3021; AVX512-NEXT:    addq $96, %rsp
3022; AVX512-NEXT:    popq %rbx
3023; AVX512-NEXT:    popq %r14
3024; AVX512-NEXT:    popq %r15
3025; AVX512-NEXT:    retq
3026  %1 = fptrunc <8 x double> %a0 to <8 x half>
3027  %2 = bitcast <8 x half> %1 to <8 x i16>
3028  ret <8 x i16> %2
3029}
3030
3031;
3032; Double to Half (Store)
3033;
3034
3035define void @store_cvt_f64_to_i16(double %a0, i16* %a1) {
3036; ALL-LABEL: store_cvt_f64_to_i16:
3037; ALL:       # BB#0:
3038; ALL-NEXT:    pushq %rbx
3039; ALL-NEXT:  .Ltmp25:
3040; ALL-NEXT:    .cfi_def_cfa_offset 16
3041; ALL-NEXT:  .Ltmp26:
3042; ALL-NEXT:    .cfi_offset %rbx, -16
3043; ALL-NEXT:    movq %rdi, %rbx
3044; ALL-NEXT:    callq __truncdfhf2
3045; ALL-NEXT:    movw %ax, (%rbx)
3046; ALL-NEXT:    popq %rbx
3047; ALL-NEXT:    retq
3048  %1 = fptrunc double %a0 to half
3049  %2 = bitcast half %1 to i16
3050  store i16 %2, i16* %a1
3051  ret void
3052}
3053
3054define void @store_cvt_2f64_to_2i16(<2 x double> %a0, <2 x i16>* %a1) {
3055; ALL-LABEL: store_cvt_2f64_to_2i16:
3056; ALL:       # BB#0:
3057; ALL-NEXT:    pushq %rbp
3058; ALL-NEXT:  .Ltmp27:
3059; ALL-NEXT:    .cfi_def_cfa_offset 16
3060; ALL-NEXT:    pushq %rbx
3061; ALL-NEXT:  .Ltmp28:
3062; ALL-NEXT:    .cfi_def_cfa_offset 24
3063; ALL-NEXT:    subq $24, %rsp
3064; ALL-NEXT:  .Ltmp29:
3065; ALL-NEXT:    .cfi_def_cfa_offset 48
3066; ALL-NEXT:  .Ltmp30:
3067; ALL-NEXT:    .cfi_offset %rbx, -24
3068; ALL-NEXT:  .Ltmp31:
3069; ALL-NEXT:    .cfi_offset %rbp, -16
3070; ALL-NEXT:    movq %rdi, %rbx
3071; ALL-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
3072; ALL-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3073; ALL-NEXT:    callq __truncdfhf2
3074; ALL-NEXT:    movl %eax, %ebp
3075; ALL-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
3076; ALL-NEXT:    callq __truncdfhf2
3077; ALL-NEXT:    movw %ax, (%rbx)
3078; ALL-NEXT:    movw %bp, 2(%rbx)
3079; ALL-NEXT:    addq $24, %rsp
3080; ALL-NEXT:    popq %rbx
3081; ALL-NEXT:    popq %rbp
3082; ALL-NEXT:    retq
3083  %1 = fptrunc <2 x double> %a0 to <2 x half>
3084  %2 = bitcast <2 x half> %1 to <2 x i16>
3085  store <2 x i16> %2, <2 x i16>* %a1
3086  ret void
3087}
3088
3089define void @store_cvt_4f64_to_4i16(<4 x double> %a0, <4 x i16>* %a1) {
3090; AVX1-LABEL: store_cvt_4f64_to_4i16:
3091; AVX1:       # BB#0:
3092; AVX1-NEXT:    pushq %rbp
3093; AVX1-NEXT:  .Ltmp32:
3094; AVX1-NEXT:    .cfi_def_cfa_offset 16
3095; AVX1-NEXT:    pushq %r15
3096; AVX1-NEXT:  .Ltmp33:
3097; AVX1-NEXT:    .cfi_def_cfa_offset 24
3098; AVX1-NEXT:    pushq %r14
3099; AVX1-NEXT:  .Ltmp34:
3100; AVX1-NEXT:    .cfi_def_cfa_offset 32
3101; AVX1-NEXT:    pushq %rbx
3102; AVX1-NEXT:  .Ltmp35:
3103; AVX1-NEXT:    .cfi_def_cfa_offset 40
3104; AVX1-NEXT:    subq $88, %rsp
3105; AVX1-NEXT:  .Ltmp36:
3106; AVX1-NEXT:    .cfi_def_cfa_offset 128
3107; AVX1-NEXT:  .Ltmp37:
3108; AVX1-NEXT:    .cfi_offset %rbx, -40
3109; AVX1-NEXT:  .Ltmp38:
3110; AVX1-NEXT:    .cfi_offset %r14, -32
3111; AVX1-NEXT:  .Ltmp39:
3112; AVX1-NEXT:    .cfi_offset %r15, -24
3113; AVX1-NEXT:  .Ltmp40:
3114; AVX1-NEXT:    .cfi_offset %rbp, -16
3115; AVX1-NEXT:    movq %rdi, %rbx
3116; AVX1-NEXT:    vmovupd %ymm0, {{[0-9]+}}(%rsp) # 32-byte Spill
3117; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3118; AVX1-NEXT:    vzeroupper
3119; AVX1-NEXT:    callq __truncdfhf2
3120; AVX1-NEXT:    movl %eax, %r14d
3121; AVX1-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3122; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
3123; AVX1-NEXT:    vmovapd %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
3124; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3125; AVX1-NEXT:    vzeroupper
3126; AVX1-NEXT:    callq __truncdfhf2
3127; AVX1-NEXT:    movl %eax, %r15d
3128; AVX1-NEXT:    vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3129; AVX1-NEXT:    vzeroupper
3130; AVX1-NEXT:    callq __truncdfhf2
3131; AVX1-NEXT:    movl %eax, %ebp
3132; AVX1-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
3133; AVX1-NEXT:    callq __truncdfhf2
3134; AVX1-NEXT:    movw %ax, 4(%rbx)
3135; AVX1-NEXT:    movw %bp, (%rbx)
3136; AVX1-NEXT:    movw %r15w, 6(%rbx)
3137; AVX1-NEXT:    movw %r14w, 2(%rbx)
3138; AVX1-NEXT:    addq $88, %rsp
3139; AVX1-NEXT:    popq %rbx
3140; AVX1-NEXT:    popq %r14
3141; AVX1-NEXT:    popq %r15
3142; AVX1-NEXT:    popq %rbp
3143; AVX1-NEXT:    retq
3144;
3145; AVX2-LABEL: store_cvt_4f64_to_4i16:
3146; AVX2:       # BB#0:
3147; AVX2-NEXT:    pushq %rbp
3148; AVX2-NEXT:  .Ltmp32:
3149; AVX2-NEXT:    .cfi_def_cfa_offset 16
3150; AVX2-NEXT:    pushq %r15
3151; AVX2-NEXT:  .Ltmp33:
3152; AVX2-NEXT:    .cfi_def_cfa_offset 24
3153; AVX2-NEXT:    pushq %r14
3154; AVX2-NEXT:  .Ltmp34:
3155; AVX2-NEXT:    .cfi_def_cfa_offset 32
3156; AVX2-NEXT:    pushq %rbx
3157; AVX2-NEXT:  .Ltmp35:
3158; AVX2-NEXT:    .cfi_def_cfa_offset 40
3159; AVX2-NEXT:    subq $88, %rsp
3160; AVX2-NEXT:  .Ltmp36:
3161; AVX2-NEXT:    .cfi_def_cfa_offset 128
3162; AVX2-NEXT:  .Ltmp37:
3163; AVX2-NEXT:    .cfi_offset %rbx, -40
3164; AVX2-NEXT:  .Ltmp38:
3165; AVX2-NEXT:    .cfi_offset %r14, -32
3166; AVX2-NEXT:  .Ltmp39:
3167; AVX2-NEXT:    .cfi_offset %r15, -24
3168; AVX2-NEXT:  .Ltmp40:
3169; AVX2-NEXT:    .cfi_offset %rbp, -16
3170; AVX2-NEXT:    movq %rdi, %rbx
3171; AVX2-NEXT:    vmovupd %ymm0, {{[0-9]+}}(%rsp) # 32-byte Spill
3172; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3173; AVX2-NEXT:    vzeroupper
3174; AVX2-NEXT:    callq __truncdfhf2
3175; AVX2-NEXT:    movl %eax, %r14d
3176; AVX2-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3177; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
3178; AVX2-NEXT:    vmovapd %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
3179; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3180; AVX2-NEXT:    vzeroupper
3181; AVX2-NEXT:    callq __truncdfhf2
3182; AVX2-NEXT:    movl %eax, %r15d
3183; AVX2-NEXT:    vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3184; AVX2-NEXT:    vzeroupper
3185; AVX2-NEXT:    callq __truncdfhf2
3186; AVX2-NEXT:    movl %eax, %ebp
3187; AVX2-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
3188; AVX2-NEXT:    callq __truncdfhf2
3189; AVX2-NEXT:    movw %ax, 4(%rbx)
3190; AVX2-NEXT:    movw %bp, (%rbx)
3191; AVX2-NEXT:    movw %r15w, 6(%rbx)
3192; AVX2-NEXT:    movw %r14w, 2(%rbx)
3193; AVX2-NEXT:    addq $88, %rsp
3194; AVX2-NEXT:    popq %rbx
3195; AVX2-NEXT:    popq %r14
3196; AVX2-NEXT:    popq %r15
3197; AVX2-NEXT:    popq %rbp
3198; AVX2-NEXT:    retq
3199;
3200; AVX512-LABEL: store_cvt_4f64_to_4i16:
3201; AVX512:       # BB#0:
3202; AVX512-NEXT:    pushq %rbp
3203; AVX512-NEXT:  .Ltmp32:
3204; AVX512-NEXT:    .cfi_def_cfa_offset 16
3205; AVX512-NEXT:    pushq %r15
3206; AVX512-NEXT:  .Ltmp33:
3207; AVX512-NEXT:    .cfi_def_cfa_offset 24
3208; AVX512-NEXT:    pushq %r14
3209; AVX512-NEXT:  .Ltmp34:
3210; AVX512-NEXT:    .cfi_def_cfa_offset 32
3211; AVX512-NEXT:    pushq %rbx
3212; AVX512-NEXT:  .Ltmp35:
3213; AVX512-NEXT:    .cfi_def_cfa_offset 40
3214; AVX512-NEXT:    subq $88, %rsp
3215; AVX512-NEXT:  .Ltmp36:
3216; AVX512-NEXT:    .cfi_def_cfa_offset 128
3217; AVX512-NEXT:  .Ltmp37:
3218; AVX512-NEXT:    .cfi_offset %rbx, -40
3219; AVX512-NEXT:  .Ltmp38:
3220; AVX512-NEXT:    .cfi_offset %r14, -32
3221; AVX512-NEXT:  .Ltmp39:
3222; AVX512-NEXT:    .cfi_offset %r15, -24
3223; AVX512-NEXT:  .Ltmp40:
3224; AVX512-NEXT:    .cfi_offset %rbp, -16
3225; AVX512-NEXT:    movq %rdi, %rbx
3226; AVX512-NEXT:    vmovupd %ymm0, {{[0-9]+}}(%rsp) # 32-byte Spill
3227; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3228; AVX512-NEXT:    callq __truncdfhf2
3229; AVX512-NEXT:    movl %eax, %r14d
3230; AVX512-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3231; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
3232; AVX512-NEXT:    vmovapd %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
3233; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3234; AVX512-NEXT:    callq __truncdfhf2
3235; AVX512-NEXT:    movl %eax, %r15d
3236; AVX512-NEXT:    vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3237; AVX512-NEXT:    callq __truncdfhf2
3238; AVX512-NEXT:    movl %eax, %ebp
3239; AVX512-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
3240; AVX512-NEXT:    callq __truncdfhf2
3241; AVX512-NEXT:    movw %ax, 4(%rbx)
3242; AVX512-NEXT:    movw %bp, (%rbx)
3243; AVX512-NEXT:    movw %r15w, 6(%rbx)
3244; AVX512-NEXT:    movw %r14w, 2(%rbx)
3245; AVX512-NEXT:    addq $88, %rsp
3246; AVX512-NEXT:    popq %rbx
3247; AVX512-NEXT:    popq %r14
3248; AVX512-NEXT:    popq %r15
3249; AVX512-NEXT:    popq %rbp
3250; AVX512-NEXT:    retq
3251  %1 = fptrunc <4 x double> %a0 to <4 x half>
3252  %2 = bitcast <4 x half> %1 to <4 x i16>
3253  store <4 x i16> %2, <4 x i16>* %a1
3254  ret void
3255}
3256
3257define void @store_cvt_4f64_to_8i16_undef(<4 x double> %a0, <8 x i16>* %a1) {
3258; AVX1-LABEL: store_cvt_4f64_to_8i16_undef:
3259; AVX1:       # BB#0:
3260; AVX1-NEXT:    pushq %rbp
3261; AVX1-NEXT:  .Ltmp41:
3262; AVX1-NEXT:    .cfi_def_cfa_offset 16
3263; AVX1-NEXT:    pushq %r14
3264; AVX1-NEXT:  .Ltmp42:
3265; AVX1-NEXT:    .cfi_def_cfa_offset 24
3266; AVX1-NEXT:    pushq %rbx
3267; AVX1-NEXT:  .Ltmp43:
3268; AVX1-NEXT:    .cfi_def_cfa_offset 32
3269; AVX1-NEXT:    subq $32, %rsp
3270; AVX1-NEXT:  .Ltmp44:
3271; AVX1-NEXT:    .cfi_def_cfa_offset 64
3272; AVX1-NEXT:  .Ltmp45:
3273; AVX1-NEXT:    .cfi_offset %rbx, -32
3274; AVX1-NEXT:  .Ltmp46:
3275; AVX1-NEXT:    .cfi_offset %r14, -24
3276; AVX1-NEXT:  .Ltmp47:
3277; AVX1-NEXT:    .cfi_offset %rbp, -16
3278; AVX1-NEXT:    movq %rdi, %r14
3279; AVX1-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
3280; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3281; AVX1-NEXT:    vzeroupper
3282; AVX1-NEXT:    callq __truncdfhf2
3283; AVX1-NEXT:    movw %ax, %bp
3284; AVX1-NEXT:    shll $16, %ebp
3285; AVX1-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
3286; AVX1-NEXT:    vzeroupper
3287; AVX1-NEXT:    callq __truncdfhf2
3288; AVX1-NEXT:    movzwl %ax, %ebx
3289; AVX1-NEXT:    orl %ebp, %ebx
3290; AVX1-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
3291; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
3292; AVX1-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
3293; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3294; AVX1-NEXT:    vzeroupper
3295; AVX1-NEXT:    callq __truncdfhf2
3296; AVX1-NEXT:    movw %ax, %bp
3297; AVX1-NEXT:    shll $16, %ebp
3298; AVX1-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
3299; AVX1-NEXT:    callq __truncdfhf2
3300; AVX1-NEXT:    movzwl %ax, %eax
3301; AVX1-NEXT:    orl %ebp, %eax
3302; AVX1-NEXT:    shlq $32, %rax
3303; AVX1-NEXT:    orq %rbx, %rax
3304; AVX1-NEXT:    vmovq %rax, %xmm0
3305; AVX1-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
3306; AVX1-NEXT:    vmovdqa %xmm0, (%r14)
3307; AVX1-NEXT:    addq $32, %rsp
3308; AVX1-NEXT:    popq %rbx
3309; AVX1-NEXT:    popq %r14
3310; AVX1-NEXT:    popq %rbp
3311; AVX1-NEXT:    retq
3312;
3313; AVX2-LABEL: store_cvt_4f64_to_8i16_undef:
3314; AVX2:       # BB#0:
3315; AVX2-NEXT:    pushq %rbp
3316; AVX2-NEXT:  .Ltmp41:
3317; AVX2-NEXT:    .cfi_def_cfa_offset 16
3318; AVX2-NEXT:    pushq %r14
3319; AVX2-NEXT:  .Ltmp42:
3320; AVX2-NEXT:    .cfi_def_cfa_offset 24
3321; AVX2-NEXT:    pushq %rbx
3322; AVX2-NEXT:  .Ltmp43:
3323; AVX2-NEXT:    .cfi_def_cfa_offset 32
3324; AVX2-NEXT:    subq $32, %rsp
3325; AVX2-NEXT:  .Ltmp44:
3326; AVX2-NEXT:    .cfi_def_cfa_offset 64
3327; AVX2-NEXT:  .Ltmp45:
3328; AVX2-NEXT:    .cfi_offset %rbx, -32
3329; AVX2-NEXT:  .Ltmp46:
3330; AVX2-NEXT:    .cfi_offset %r14, -24
3331; AVX2-NEXT:  .Ltmp47:
3332; AVX2-NEXT:    .cfi_offset %rbp, -16
3333; AVX2-NEXT:    movq %rdi, %r14
3334; AVX2-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
3335; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3336; AVX2-NEXT:    vzeroupper
3337; AVX2-NEXT:    callq __truncdfhf2
3338; AVX2-NEXT:    movw %ax, %bp
3339; AVX2-NEXT:    shll $16, %ebp
3340; AVX2-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
3341; AVX2-NEXT:    vzeroupper
3342; AVX2-NEXT:    callq __truncdfhf2
3343; AVX2-NEXT:    movzwl %ax, %ebx
3344; AVX2-NEXT:    orl %ebp, %ebx
3345; AVX2-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
3346; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
3347; AVX2-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
3348; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3349; AVX2-NEXT:    vzeroupper
3350; AVX2-NEXT:    callq __truncdfhf2
3351; AVX2-NEXT:    movw %ax, %bp
3352; AVX2-NEXT:    shll $16, %ebp
3353; AVX2-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
3354; AVX2-NEXT:    callq __truncdfhf2
3355; AVX2-NEXT:    movzwl %ax, %eax
3356; AVX2-NEXT:    orl %ebp, %eax
3357; AVX2-NEXT:    shlq $32, %rax
3358; AVX2-NEXT:    orq %rbx, %rax
3359; AVX2-NEXT:    vmovq %rax, %xmm0
3360; AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
3361; AVX2-NEXT:    vmovdqa %xmm0, (%r14)
3362; AVX2-NEXT:    addq $32, %rsp
3363; AVX2-NEXT:    popq %rbx
3364; AVX2-NEXT:    popq %r14
3365; AVX2-NEXT:    popq %rbp
3366; AVX2-NEXT:    retq
3367;
3368; AVX512-LABEL: store_cvt_4f64_to_8i16_undef:
3369; AVX512:       # BB#0:
3370; AVX512-NEXT:    pushq %rbp
3371; AVX512-NEXT:  .Ltmp41:
3372; AVX512-NEXT:    .cfi_def_cfa_offset 16
3373; AVX512-NEXT:    pushq %r14
3374; AVX512-NEXT:  .Ltmp42:
3375; AVX512-NEXT:    .cfi_def_cfa_offset 24
3376; AVX512-NEXT:    pushq %rbx
3377; AVX512-NEXT:  .Ltmp43:
3378; AVX512-NEXT:    .cfi_def_cfa_offset 32
3379; AVX512-NEXT:    subq $32, %rsp
3380; AVX512-NEXT:  .Ltmp44:
3381; AVX512-NEXT:    .cfi_def_cfa_offset 64
3382; AVX512-NEXT:  .Ltmp45:
3383; AVX512-NEXT:    .cfi_offset %rbx, -32
3384; AVX512-NEXT:  .Ltmp46:
3385; AVX512-NEXT:    .cfi_offset %r14, -24
3386; AVX512-NEXT:  .Ltmp47:
3387; AVX512-NEXT:    .cfi_offset %rbp, -16
3388; AVX512-NEXT:    movq %rdi, %r14
3389; AVX512-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
3390; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3391; AVX512-NEXT:    callq __truncdfhf2
3392; AVX512-NEXT:    movw %ax, %bp
3393; AVX512-NEXT:    shll $16, %ebp
3394; AVX512-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
3395; AVX512-NEXT:    callq __truncdfhf2
3396; AVX512-NEXT:    movzwl %ax, %ebx
3397; AVX512-NEXT:    orl %ebp, %ebx
3398; AVX512-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
3399; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
3400; AVX512-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
3401; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3402; AVX512-NEXT:    callq __truncdfhf2
3403; AVX512-NEXT:    movw %ax, %bp
3404; AVX512-NEXT:    shll $16, %ebp
3405; AVX512-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
3406; AVX512-NEXT:    callq __truncdfhf2
3407; AVX512-NEXT:    movzwl %ax, %eax
3408; AVX512-NEXT:    orl %ebp, %eax
3409; AVX512-NEXT:    shlq $32, %rax
3410; AVX512-NEXT:    orq %rbx, %rax
3411; AVX512-NEXT:    vmovq %rax, %xmm0
3412; AVX512-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
3413; AVX512-NEXT:    vmovdqa %xmm0, (%r14)
3414; AVX512-NEXT:    addq $32, %rsp
3415; AVX512-NEXT:    popq %rbx
3416; AVX512-NEXT:    popq %r14
3417; AVX512-NEXT:    popq %rbp
3418; AVX512-NEXT:    retq
3419  %1 = fptrunc <4 x double> %a0 to <4 x half>
3420  %2 = bitcast <4 x half> %1 to <4 x i16>
3421  %3 = shufflevector <4 x i16> %2, <4 x i16> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
3422  store <8 x i16> %3, <8 x i16>* %a1
3423  ret void
3424}
3425
3426define void @store_cvt_4f64_to_8i16_zero(<4 x double> %a0, <8 x i16>* %a1) {
3427; AVX1-LABEL: store_cvt_4f64_to_8i16_zero:
3428; AVX1:       # BB#0:
3429; AVX1-NEXT:    pushq %rbp
3430; AVX1-NEXT:  .Ltmp48:
3431; AVX1-NEXT:    .cfi_def_cfa_offset 16
3432; AVX1-NEXT:    pushq %r14
3433; AVX1-NEXT:  .Ltmp49:
3434; AVX1-NEXT:    .cfi_def_cfa_offset 24
3435; AVX1-NEXT:    pushq %rbx
3436; AVX1-NEXT:  .Ltmp50:
3437; AVX1-NEXT:    .cfi_def_cfa_offset 32
3438; AVX1-NEXT:    subq $32, %rsp
3439; AVX1-NEXT:  .Ltmp51:
3440; AVX1-NEXT:    .cfi_def_cfa_offset 64
3441; AVX1-NEXT:  .Ltmp52:
3442; AVX1-NEXT:    .cfi_offset %rbx, -32
3443; AVX1-NEXT:  .Ltmp53:
3444; AVX1-NEXT:    .cfi_offset %r14, -24
3445; AVX1-NEXT:  .Ltmp54:
3446; AVX1-NEXT:    .cfi_offset %rbp, -16
3447; AVX1-NEXT:    movq %rdi, %r14
3448; AVX1-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
3449; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3450; AVX1-NEXT:    vzeroupper
3451; AVX1-NEXT:    callq __truncdfhf2
3452; AVX1-NEXT:    movw %ax, %bp
3453; AVX1-NEXT:    shll $16, %ebp
3454; AVX1-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
3455; AVX1-NEXT:    vzeroupper
3456; AVX1-NEXT:    callq __truncdfhf2
3457; AVX1-NEXT:    movzwl %ax, %ebx
3458; AVX1-NEXT:    orl %ebp, %ebx
3459; AVX1-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
3460; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
3461; AVX1-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
3462; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3463; AVX1-NEXT:    vzeroupper
3464; AVX1-NEXT:    callq __truncdfhf2
3465; AVX1-NEXT:    movw %ax, %bp
3466; AVX1-NEXT:    shll $16, %ebp
3467; AVX1-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
3468; AVX1-NEXT:    callq __truncdfhf2
3469; AVX1-NEXT:    movzwl %ax, %eax
3470; AVX1-NEXT:    orl %ebp, %eax
3471; AVX1-NEXT:    shlq $32, %rax
3472; AVX1-NEXT:    orq %rbx, %rax
3473; AVX1-NEXT:    vmovq %rax, %xmm0
3474; AVX1-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero
3475; AVX1-NEXT:    vmovdqa %xmm0, (%r14)
3476; AVX1-NEXT:    addq $32, %rsp
3477; AVX1-NEXT:    popq %rbx
3478; AVX1-NEXT:    popq %r14
3479; AVX1-NEXT:    popq %rbp
3480; AVX1-NEXT:    retq
3481;
3482; AVX2-LABEL: store_cvt_4f64_to_8i16_zero:
3483; AVX2:       # BB#0:
3484; AVX2-NEXT:    pushq %rbp
3485; AVX2-NEXT:  .Ltmp48:
3486; AVX2-NEXT:    .cfi_def_cfa_offset 16
3487; AVX2-NEXT:    pushq %r14
3488; AVX2-NEXT:  .Ltmp49:
3489; AVX2-NEXT:    .cfi_def_cfa_offset 24
3490; AVX2-NEXT:    pushq %rbx
3491; AVX2-NEXT:  .Ltmp50:
3492; AVX2-NEXT:    .cfi_def_cfa_offset 32
3493; AVX2-NEXT:    subq $32, %rsp
3494; AVX2-NEXT:  .Ltmp51:
3495; AVX2-NEXT:    .cfi_def_cfa_offset 64
3496; AVX2-NEXT:  .Ltmp52:
3497; AVX2-NEXT:    .cfi_offset %rbx, -32
3498; AVX2-NEXT:  .Ltmp53:
3499; AVX2-NEXT:    .cfi_offset %r14, -24
3500; AVX2-NEXT:  .Ltmp54:
3501; AVX2-NEXT:    .cfi_offset %rbp, -16
3502; AVX2-NEXT:    movq %rdi, %r14
3503; AVX2-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
3504; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3505; AVX2-NEXT:    vzeroupper
3506; AVX2-NEXT:    callq __truncdfhf2
3507; AVX2-NEXT:    movw %ax, %bp
3508; AVX2-NEXT:    shll $16, %ebp
3509; AVX2-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
3510; AVX2-NEXT:    vzeroupper
3511; AVX2-NEXT:    callq __truncdfhf2
3512; AVX2-NEXT:    movzwl %ax, %ebx
3513; AVX2-NEXT:    orl %ebp, %ebx
3514; AVX2-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
3515; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
3516; AVX2-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
3517; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3518; AVX2-NEXT:    vzeroupper
3519; AVX2-NEXT:    callq __truncdfhf2
3520; AVX2-NEXT:    movw %ax, %bp
3521; AVX2-NEXT:    shll $16, %ebp
3522; AVX2-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
3523; AVX2-NEXT:    callq __truncdfhf2
3524; AVX2-NEXT:    movzwl %ax, %eax
3525; AVX2-NEXT:    orl %ebp, %eax
3526; AVX2-NEXT:    shlq $32, %rax
3527; AVX2-NEXT:    orq %rbx, %rax
3528; AVX2-NEXT:    vmovq %rax, %xmm0
3529; AVX2-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero
3530; AVX2-NEXT:    vmovdqa %xmm0, (%r14)
3531; AVX2-NEXT:    addq $32, %rsp
3532; AVX2-NEXT:    popq %rbx
3533; AVX2-NEXT:    popq %r14
3534; AVX2-NEXT:    popq %rbp
3535; AVX2-NEXT:    retq
3536;
3537; AVX512-LABEL: store_cvt_4f64_to_8i16_zero:
3538; AVX512:       # BB#0:
3539; AVX512-NEXT:    pushq %rbp
3540; AVX512-NEXT:  .Ltmp48:
3541; AVX512-NEXT:    .cfi_def_cfa_offset 16
3542; AVX512-NEXT:    pushq %r14
3543; AVX512-NEXT:  .Ltmp49:
3544; AVX512-NEXT:    .cfi_def_cfa_offset 24
3545; AVX512-NEXT:    pushq %rbx
3546; AVX512-NEXT:  .Ltmp50:
3547; AVX512-NEXT:    .cfi_def_cfa_offset 32
3548; AVX512-NEXT:    subq $32, %rsp
3549; AVX512-NEXT:  .Ltmp51:
3550; AVX512-NEXT:    .cfi_def_cfa_offset 64
3551; AVX512-NEXT:  .Ltmp52:
3552; AVX512-NEXT:    .cfi_offset %rbx, -32
3553; AVX512-NEXT:  .Ltmp53:
3554; AVX512-NEXT:    .cfi_offset %r14, -24
3555; AVX512-NEXT:  .Ltmp54:
3556; AVX512-NEXT:    .cfi_offset %rbp, -16
3557; AVX512-NEXT:    movq %rdi, %r14
3558; AVX512-NEXT:    vmovupd %ymm0, (%rsp) # 32-byte Spill
3559; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3560; AVX512-NEXT:    callq __truncdfhf2
3561; AVX512-NEXT:    movw %ax, %bp
3562; AVX512-NEXT:    shll $16, %ebp
3563; AVX512-NEXT:    vmovups (%rsp), %ymm0 # 32-byte Reload
3564; AVX512-NEXT:    callq __truncdfhf2
3565; AVX512-NEXT:    movzwl %ax, %ebx
3566; AVX512-NEXT:    orl %ebp, %ebx
3567; AVX512-NEXT:    vmovupd (%rsp), %ymm0 # 32-byte Reload
3568; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
3569; AVX512-NEXT:    vmovapd %xmm0, (%rsp) # 16-byte Spill
3570; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3571; AVX512-NEXT:    callq __truncdfhf2
3572; AVX512-NEXT:    movw %ax, %bp
3573; AVX512-NEXT:    shll $16, %ebp
3574; AVX512-NEXT:    vmovaps (%rsp), %xmm0 # 16-byte Reload
3575; AVX512-NEXT:    callq __truncdfhf2
3576; AVX512-NEXT:    movzwl %ax, %eax
3577; AVX512-NEXT:    orl %ebp, %eax
3578; AVX512-NEXT:    shlq $32, %rax
3579; AVX512-NEXT:    orq %rbx, %rax
3580; AVX512-NEXT:    vmovq %rax, %xmm0
3581; AVX512-NEXT:    vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13],zero,zero,zero,zero,zero,zero,zero,zero
3582; AVX512-NEXT:    vmovdqa %xmm0, (%r14)
3583; AVX512-NEXT:    addq $32, %rsp
3584; AVX512-NEXT:    popq %rbx
3585; AVX512-NEXT:    popq %r14
3586; AVX512-NEXT:    popq %rbp
3587; AVX512-NEXT:    retq
3588  %1 = fptrunc <4 x double> %a0 to <4 x half>
3589  %2 = bitcast <4 x half> %1 to <4 x i16>
3590  %3 = shufflevector <4 x i16> %2, <4 x i16> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
3591  store <8 x i16> %3, <8 x i16>* %a1
3592  ret void
3593}
3594
3595define void @store_cvt_8f64_to_8i16(<8 x double> %a0, <8 x i16>* %a1) {
3596; AVX1-LABEL: store_cvt_8f64_to_8i16:
3597; AVX1:       # BB#0:
3598; AVX1-NEXT:    pushq %rbp
3599; AVX1-NEXT:  .Ltmp55:
3600; AVX1-NEXT:    .cfi_def_cfa_offset 16
3601; AVX1-NEXT:    pushq %r15
3602; AVX1-NEXT:  .Ltmp56:
3603; AVX1-NEXT:    .cfi_def_cfa_offset 24
3604; AVX1-NEXT:    pushq %r14
3605; AVX1-NEXT:  .Ltmp57:
3606; AVX1-NEXT:    .cfi_def_cfa_offset 32
3607; AVX1-NEXT:    pushq %r13
3608; AVX1-NEXT:  .Ltmp58:
3609; AVX1-NEXT:    .cfi_def_cfa_offset 40
3610; AVX1-NEXT:    pushq %r12
3611; AVX1-NEXT:  .Ltmp59:
3612; AVX1-NEXT:    .cfi_def_cfa_offset 48
3613; AVX1-NEXT:    pushq %rbx
3614; AVX1-NEXT:  .Ltmp60:
3615; AVX1-NEXT:    .cfi_def_cfa_offset 56
3616; AVX1-NEXT:    subq $136, %rsp
3617; AVX1-NEXT:  .Ltmp61:
3618; AVX1-NEXT:    .cfi_def_cfa_offset 192
3619; AVX1-NEXT:  .Ltmp62:
3620; AVX1-NEXT:    .cfi_offset %rbx, -56
3621; AVX1-NEXT:  .Ltmp63:
3622; AVX1-NEXT:    .cfi_offset %r12, -48
3623; AVX1-NEXT:  .Ltmp64:
3624; AVX1-NEXT:    .cfi_offset %r13, -40
3625; AVX1-NEXT:  .Ltmp65:
3626; AVX1-NEXT:    .cfi_offset %r14, -32
3627; AVX1-NEXT:  .Ltmp66:
3628; AVX1-NEXT:    .cfi_offset %r15, -24
3629; AVX1-NEXT:  .Ltmp67:
3630; AVX1-NEXT:    .cfi_offset %rbp, -16
3631; AVX1-NEXT:    movq %rdi, %rbx
3632; AVX1-NEXT:    vmovups %ymm1, {{[0-9]+}}(%rsp) # 32-byte Spill
3633; AVX1-NEXT:    vmovupd %ymm0, {{[0-9]+}}(%rsp) # 32-byte Spill
3634; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3635; AVX1-NEXT:    vzeroupper
3636; AVX1-NEXT:    callq __truncdfhf2
3637; AVX1-NEXT:    movw %ax, {{[0-9]+}}(%rsp) # 2-byte Spill
3638; AVX1-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3639; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
3640; AVX1-NEXT:    vmovapd %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
3641; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3642; AVX1-NEXT:    vzeroupper
3643; AVX1-NEXT:    callq __truncdfhf2
3644; AVX1-NEXT:    movw %ax, {{[0-9]+}}(%rsp) # 2-byte Spill
3645; AVX1-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3646; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3647; AVX1-NEXT:    vzeroupper
3648; AVX1-NEXT:    callq __truncdfhf2
3649; AVX1-NEXT:    movl %eax, %r12d
3650; AVX1-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3651; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm0
3652; AVX1-NEXT:    vmovapd %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
3653; AVX1-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3654; AVX1-NEXT:    vzeroupper
3655; AVX1-NEXT:    callq __truncdfhf2
3656; AVX1-NEXT:    movl %eax, %r13d
3657; AVX1-NEXT:    vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3658; AVX1-NEXT:    vzeroupper
3659; AVX1-NEXT:    callq __truncdfhf2
3660; AVX1-NEXT:    movl %eax, %ebp
3661; AVX1-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
3662; AVX1-NEXT:    callq __truncdfhf2
3663; AVX1-NEXT:    movl %eax, %r14d
3664; AVX1-NEXT:    vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3665; AVX1-NEXT:    vzeroupper
3666; AVX1-NEXT:    callq __truncdfhf2
3667; AVX1-NEXT:    movl %eax, %r15d
3668; AVX1-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
3669; AVX1-NEXT:    callq __truncdfhf2
3670; AVX1-NEXT:    movw %ax, 12(%rbx)
3671; AVX1-NEXT:    movw %r15w, 8(%rbx)
3672; AVX1-NEXT:    movw %r14w, 4(%rbx)
3673; AVX1-NEXT:    movw %bp, (%rbx)
3674; AVX1-NEXT:    movw %r13w, 14(%rbx)
3675; AVX1-NEXT:    movw %r12w, 10(%rbx)
3676; AVX1-NEXT:    movzwl {{[0-9]+}}(%rsp), %eax # 2-byte Folded Reload
3677; AVX1-NEXT:    movw %ax, 6(%rbx)
3678; AVX1-NEXT:    movzwl {{[0-9]+}}(%rsp), %eax # 2-byte Folded Reload
3679; AVX1-NEXT:    movw %ax, 2(%rbx)
3680; AVX1-NEXT:    addq $136, %rsp
3681; AVX1-NEXT:    popq %rbx
3682; AVX1-NEXT:    popq %r12
3683; AVX1-NEXT:    popq %r13
3684; AVX1-NEXT:    popq %r14
3685; AVX1-NEXT:    popq %r15
3686; AVX1-NEXT:    popq %rbp
3687; AVX1-NEXT:    retq
3688;
3689; AVX2-LABEL: store_cvt_8f64_to_8i16:
3690; AVX2:       # BB#0:
3691; AVX2-NEXT:    pushq %rbp
3692; AVX2-NEXT:  .Ltmp55:
3693; AVX2-NEXT:    .cfi_def_cfa_offset 16
3694; AVX2-NEXT:    pushq %r15
3695; AVX2-NEXT:  .Ltmp56:
3696; AVX2-NEXT:    .cfi_def_cfa_offset 24
3697; AVX2-NEXT:    pushq %r14
3698; AVX2-NEXT:  .Ltmp57:
3699; AVX2-NEXT:    .cfi_def_cfa_offset 32
3700; AVX2-NEXT:    pushq %r13
3701; AVX2-NEXT:  .Ltmp58:
3702; AVX2-NEXT:    .cfi_def_cfa_offset 40
3703; AVX2-NEXT:    pushq %r12
3704; AVX2-NEXT:  .Ltmp59:
3705; AVX2-NEXT:    .cfi_def_cfa_offset 48
3706; AVX2-NEXT:    pushq %rbx
3707; AVX2-NEXT:  .Ltmp60:
3708; AVX2-NEXT:    .cfi_def_cfa_offset 56
3709; AVX2-NEXT:    subq $136, %rsp
3710; AVX2-NEXT:  .Ltmp61:
3711; AVX2-NEXT:    .cfi_def_cfa_offset 192
3712; AVX2-NEXT:  .Ltmp62:
3713; AVX2-NEXT:    .cfi_offset %rbx, -56
3714; AVX2-NEXT:  .Ltmp63:
3715; AVX2-NEXT:    .cfi_offset %r12, -48
3716; AVX2-NEXT:  .Ltmp64:
3717; AVX2-NEXT:    .cfi_offset %r13, -40
3718; AVX2-NEXT:  .Ltmp65:
3719; AVX2-NEXT:    .cfi_offset %r14, -32
3720; AVX2-NEXT:  .Ltmp66:
3721; AVX2-NEXT:    .cfi_offset %r15, -24
3722; AVX2-NEXT:  .Ltmp67:
3723; AVX2-NEXT:    .cfi_offset %rbp, -16
3724; AVX2-NEXT:    movq %rdi, %rbx
3725; AVX2-NEXT:    vmovups %ymm1, {{[0-9]+}}(%rsp) # 32-byte Spill
3726; AVX2-NEXT:    vmovupd %ymm0, {{[0-9]+}}(%rsp) # 32-byte Spill
3727; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3728; AVX2-NEXT:    vzeroupper
3729; AVX2-NEXT:    callq __truncdfhf2
3730; AVX2-NEXT:    movw %ax, {{[0-9]+}}(%rsp) # 2-byte Spill
3731; AVX2-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3732; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
3733; AVX2-NEXT:    vmovapd %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
3734; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3735; AVX2-NEXT:    vzeroupper
3736; AVX2-NEXT:    callq __truncdfhf2
3737; AVX2-NEXT:    movw %ax, {{[0-9]+}}(%rsp) # 2-byte Spill
3738; AVX2-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3739; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3740; AVX2-NEXT:    vzeroupper
3741; AVX2-NEXT:    callq __truncdfhf2
3742; AVX2-NEXT:    movl %eax, %r12d
3743; AVX2-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3744; AVX2-NEXT:    vextractf128 $1, %ymm0, %xmm0
3745; AVX2-NEXT:    vmovapd %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
3746; AVX2-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3747; AVX2-NEXT:    vzeroupper
3748; AVX2-NEXT:    callq __truncdfhf2
3749; AVX2-NEXT:    movl %eax, %r13d
3750; AVX2-NEXT:    vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3751; AVX2-NEXT:    vzeroupper
3752; AVX2-NEXT:    callq __truncdfhf2
3753; AVX2-NEXT:    movl %eax, %ebp
3754; AVX2-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
3755; AVX2-NEXT:    callq __truncdfhf2
3756; AVX2-NEXT:    movl %eax, %r14d
3757; AVX2-NEXT:    vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3758; AVX2-NEXT:    vzeroupper
3759; AVX2-NEXT:    callq __truncdfhf2
3760; AVX2-NEXT:    movl %eax, %r15d
3761; AVX2-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
3762; AVX2-NEXT:    callq __truncdfhf2
3763; AVX2-NEXT:    movw %ax, 12(%rbx)
3764; AVX2-NEXT:    movw %r15w, 8(%rbx)
3765; AVX2-NEXT:    movw %r14w, 4(%rbx)
3766; AVX2-NEXT:    movw %bp, (%rbx)
3767; AVX2-NEXT:    movw %r13w, 14(%rbx)
3768; AVX2-NEXT:    movw %r12w, 10(%rbx)
3769; AVX2-NEXT:    movzwl {{[0-9]+}}(%rsp), %eax # 2-byte Folded Reload
3770; AVX2-NEXT:    movw %ax, 6(%rbx)
3771; AVX2-NEXT:    movzwl {{[0-9]+}}(%rsp), %eax # 2-byte Folded Reload
3772; AVX2-NEXT:    movw %ax, 2(%rbx)
3773; AVX2-NEXT:    addq $136, %rsp
3774; AVX2-NEXT:    popq %rbx
3775; AVX2-NEXT:    popq %r12
3776; AVX2-NEXT:    popq %r13
3777; AVX2-NEXT:    popq %r14
3778; AVX2-NEXT:    popq %r15
3779; AVX2-NEXT:    popq %rbp
3780; AVX2-NEXT:    retq
3781;
3782; AVX512-LABEL: store_cvt_8f64_to_8i16:
3783; AVX512:       # BB#0:
3784; AVX512-NEXT:    pushq %rbp
3785; AVX512-NEXT:  .Ltmp55:
3786; AVX512-NEXT:    .cfi_def_cfa_offset 16
3787; AVX512-NEXT:    pushq %r15
3788; AVX512-NEXT:  .Ltmp56:
3789; AVX512-NEXT:    .cfi_def_cfa_offset 24
3790; AVX512-NEXT:    pushq %r14
3791; AVX512-NEXT:  .Ltmp57:
3792; AVX512-NEXT:    .cfi_def_cfa_offset 32
3793; AVX512-NEXT:    pushq %r13
3794; AVX512-NEXT:  .Ltmp58:
3795; AVX512-NEXT:    .cfi_def_cfa_offset 40
3796; AVX512-NEXT:    pushq %r12
3797; AVX512-NEXT:  .Ltmp59:
3798; AVX512-NEXT:    .cfi_def_cfa_offset 48
3799; AVX512-NEXT:    pushq %rbx
3800; AVX512-NEXT:  .Ltmp60:
3801; AVX512-NEXT:    .cfi_def_cfa_offset 56
3802; AVX512-NEXT:    subq $200, %rsp
3803; AVX512-NEXT:  .Ltmp61:
3804; AVX512-NEXT:    .cfi_def_cfa_offset 256
3805; AVX512-NEXT:  .Ltmp62:
3806; AVX512-NEXT:    .cfi_offset %rbx, -56
3807; AVX512-NEXT:  .Ltmp63:
3808; AVX512-NEXT:    .cfi_offset %r12, -48
3809; AVX512-NEXT:  .Ltmp64:
3810; AVX512-NEXT:    .cfi_offset %r13, -40
3811; AVX512-NEXT:  .Ltmp65:
3812; AVX512-NEXT:    .cfi_offset %r14, -32
3813; AVX512-NEXT:  .Ltmp66:
3814; AVX512-NEXT:    .cfi_offset %r15, -24
3815; AVX512-NEXT:  .Ltmp67:
3816; AVX512-NEXT:    .cfi_offset %rbp, -16
3817; AVX512-NEXT:    movq %rdi, %rbx
3818; AVX512-NEXT:    vmovups %zmm0, {{[0-9]+}}(%rsp) # 64-byte Spill
3819; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3820; AVX512-NEXT:    callq __truncdfhf2
3821; AVX512-NEXT:    movw %ax, {{[0-9]+}}(%rsp) # 2-byte Spill
3822; AVX512-NEXT:    vmovups {{[0-9]+}}(%rsp), %zmm0 # 64-byte Reload
3823; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
3824; AVX512-NEXT:    vmovaps %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
3825; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3826; AVX512-NEXT:    callq __truncdfhf2
3827; AVX512-NEXT:    movw %ax, {{[0-9]+}}(%rsp) # 2-byte Spill
3828; AVX512-NEXT:    vmovups {{[0-9]+}}(%rsp), %zmm0 # 64-byte Reload
3829; AVX512-NEXT:    vextractf64x4 $1, %zmm0, %ymm0
3830; AVX512-NEXT:    vmovupd %ymm0, {{[0-9]+}}(%rsp) # 32-byte Spill
3831; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3832; AVX512-NEXT:    callq __truncdfhf2
3833; AVX512-NEXT:    movl %eax, %r12d
3834; AVX512-NEXT:    vmovupd {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3835; AVX512-NEXT:    vextractf128 $1, %ymm0, %xmm0
3836; AVX512-NEXT:    vmovapd %xmm0, {{[0-9]+}}(%rsp) # 16-byte Spill
3837; AVX512-NEXT:    vpermilpd {{.*#+}} xmm0 = xmm0[1,0]
3838; AVX512-NEXT:    callq __truncdfhf2
3839; AVX512-NEXT:    movl %eax, %r13d
3840; AVX512-NEXT:    vmovups {{[0-9]+}}(%rsp), %zmm0 # 64-byte Reload
3841; AVX512-NEXT:    callq __truncdfhf2
3842; AVX512-NEXT:    movl %eax, %ebp
3843; AVX512-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
3844; AVX512-NEXT:    callq __truncdfhf2
3845; AVX512-NEXT:    movl %eax, %r14d
3846; AVX512-NEXT:    vmovups {{[0-9]+}}(%rsp), %ymm0 # 32-byte Reload
3847; AVX512-NEXT:    callq __truncdfhf2
3848; AVX512-NEXT:    movl %eax, %r15d
3849; AVX512-NEXT:    vmovaps {{[0-9]+}}(%rsp), %xmm0 # 16-byte Reload
3850; AVX512-NEXT:    callq __truncdfhf2
3851; AVX512-NEXT:    movw %ax, 12(%rbx)
3852; AVX512-NEXT:    movw %r15w, 8(%rbx)
3853; AVX512-NEXT:    movw %r14w, 4(%rbx)
3854; AVX512-NEXT:    movw %bp, (%rbx)
3855; AVX512-NEXT:    movw %r13w, 14(%rbx)
3856; AVX512-NEXT:    movw %r12w, 10(%rbx)
3857; AVX512-NEXT:    movzwl {{[0-9]+}}(%rsp), %eax # 2-byte Folded Reload
3858; AVX512-NEXT:    movw %ax, 6(%rbx)
3859; AVX512-NEXT:    movzwl {{[0-9]+}}(%rsp), %eax # 2-byte Folded Reload
3860; AVX512-NEXT:    movw %ax, 2(%rbx)
3861; AVX512-NEXT:    addq $200, %rsp
3862; AVX512-NEXT:    popq %rbx
3863; AVX512-NEXT:    popq %r12
3864; AVX512-NEXT:    popq %r13
3865; AVX512-NEXT:    popq %r14
3866; AVX512-NEXT:    popq %r15
3867; AVX512-NEXT:    popq %rbp
3868; AVX512-NEXT:    retq
3869  %1 = fptrunc <8 x double> %a0 to <8 x half>
3870  %2 = bitcast <8 x half> %1 to <8 x i16>
3871  store <8 x i16> %2, <8 x i16>* %a1
3872  ret void
3873}
3874