1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE,SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,SSE,SSSE3
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=CHECK,SSE,SSE41
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX,AVX1
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX,AVX2
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw,+avx512vl,+fast-variable-shuffle | FileCheck %s --check-prefixes=CHECK,AVX512
8
9declare {<1 x i32>, <1 x i1>} @llvm.sadd.with.overflow.v1i32(<1 x i32>, <1 x i32>)
10declare {<2 x i32>, <2 x i1>} @llvm.sadd.with.overflow.v2i32(<2 x i32>, <2 x i32>)
11declare {<3 x i32>, <3 x i1>} @llvm.sadd.with.overflow.v3i32(<3 x i32>, <3 x i32>)
12declare {<4 x i32>, <4 x i1>} @llvm.sadd.with.overflow.v4i32(<4 x i32>, <4 x i32>)
13declare {<6 x i32>, <6 x i1>} @llvm.sadd.with.overflow.v6i32(<6 x i32>, <6 x i32>)
14declare {<8 x i32>, <8 x i1>} @llvm.sadd.with.overflow.v8i32(<8 x i32>, <8 x i32>)
15declare {<16 x i32>, <16 x i1>} @llvm.sadd.with.overflow.v16i32(<16 x i32>, <16 x i32>)
16
17declare {<16 x i8>, <16 x i1>} @llvm.sadd.with.overflow.v16i8(<16 x i8>, <16 x i8>)
18declare {<8 x i16>, <8 x i1>} @llvm.sadd.with.overflow.v8i16(<8 x i16>, <8 x i16>)
19declare {<2 x i64>, <2 x i1>} @llvm.sadd.with.overflow.v2i64(<2 x i64>, <2 x i64>)
20
21declare {<4 x i24>, <4 x i1>} @llvm.sadd.with.overflow.v4i24(<4 x i24>, <4 x i24>)
22declare {<4 x i1>, <4 x i1>} @llvm.sadd.with.overflow.v4i1(<4 x i1>, <4 x i1>)
23declare {<2 x i128>, <2 x i1>} @llvm.sadd.with.overflow.v2i128(<2 x i128>, <2 x i128>)
24
25define <1 x i32> @saddo_v1i32(<1 x i32> %a0, <1 x i32> %a1, <1 x i32>* %p2) nounwind {
26; CHECK-LABEL: saddo_v1i32:
27; CHECK:       # %bb.0:
28; CHECK-NEXT:    xorl %eax, %eax
29; CHECK-NEXT:    addl %esi, %edi
30; CHECK-NEXT:    seto %al
31; CHECK-NEXT:    negl %eax
32; CHECK-NEXT:    movl %edi, (%rdx)
33; CHECK-NEXT:    retq
34  %t = call {<1 x i32>, <1 x i1>} @llvm.sadd.with.overflow.v1i32(<1 x i32> %a0, <1 x i32> %a1)
35  %val = extractvalue {<1 x i32>, <1 x i1>} %t, 0
36  %obit = extractvalue {<1 x i32>, <1 x i1>} %t, 1
37  %res = sext <1 x i1> %obit to <1 x i32>
38  store <1 x i32> %val, <1 x i32>* %p2
39  ret <1 x i32> %res
40}
41
42define <2 x i32> @saddo_v2i32(<2 x i32> %a0, <2 x i32> %a1, <2 x i32>* %p2) nounwind {
43; SSE-LABEL: saddo_v2i32:
44; SSE:       # %bb.0:
45; SSE-NEXT:    pxor %xmm2, %xmm2
46; SSE-NEXT:    pcmpgtd %xmm1, %xmm2
47; SSE-NEXT:    paddd %xmm0, %xmm1
48; SSE-NEXT:    pcmpgtd %xmm1, %xmm0
49; SSE-NEXT:    pxor %xmm2, %xmm0
50; SSE-NEXT:    movq %xmm1, (%rdi)
51; SSE-NEXT:    retq
52;
53; AVX-LABEL: saddo_v2i32:
54; AVX:       # %bb.0:
55; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
56; AVX-NEXT:    vpcmpgtd %xmm1, %xmm2, %xmm2
57; AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm1
58; AVX-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
59; AVX-NEXT:    vpxor %xmm0, %xmm2, %xmm0
60; AVX-NEXT:    vmovq %xmm1, (%rdi)
61; AVX-NEXT:    retq
62;
63; AVX512-LABEL: saddo_v2i32:
64; AVX512:       # %bb.0:
65; AVX512-NEXT:    vpxor %xmm2, %xmm2, %xmm2
66; AVX512-NEXT:    vpcmpgtd %xmm1, %xmm2, %k0
67; AVX512-NEXT:    vpaddd %xmm1, %xmm0, %xmm1
68; AVX512-NEXT:    vpcmpgtd %xmm1, %xmm0, %k1
69; AVX512-NEXT:    kxorw %k1, %k0, %k1
70; AVX512-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0
71; AVX512-NEXT:    vmovdqa32 %xmm0, %xmm0 {%k1} {z}
72; AVX512-NEXT:    vmovq %xmm1, (%rdi)
73; AVX512-NEXT:    retq
74  %t = call {<2 x i32>, <2 x i1>} @llvm.sadd.with.overflow.v2i32(<2 x i32> %a0, <2 x i32> %a1)
75  %val = extractvalue {<2 x i32>, <2 x i1>} %t, 0
76  %obit = extractvalue {<2 x i32>, <2 x i1>} %t, 1
77  %res = sext <2 x i1> %obit to <2 x i32>
78  store <2 x i32> %val, <2 x i32>* %p2
79  ret <2 x i32> %res
80}
81
82define <3 x i32> @saddo_v3i32(<3 x i32> %a0, <3 x i32> %a1, <3 x i32>* %p2) nounwind {
83; SSE2-LABEL: saddo_v3i32:
84; SSE2:       # %bb.0:
85; SSE2-NEXT:    pxor %xmm2, %xmm2
86; SSE2-NEXT:    pcmpgtd %xmm1, %xmm2
87; SSE2-NEXT:    paddd %xmm0, %xmm1
88; SSE2-NEXT:    pcmpgtd %xmm1, %xmm0
89; SSE2-NEXT:    pxor %xmm2, %xmm0
90; SSE2-NEXT:    movq %xmm1, (%rdi)
91; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
92; SSE2-NEXT:    movd %xmm1, 8(%rdi)
93; SSE2-NEXT:    retq
94;
95; SSSE3-LABEL: saddo_v3i32:
96; SSSE3:       # %bb.0:
97; SSSE3-NEXT:    pxor %xmm2, %xmm2
98; SSSE3-NEXT:    pcmpgtd %xmm1, %xmm2
99; SSSE3-NEXT:    paddd %xmm0, %xmm1
100; SSSE3-NEXT:    pcmpgtd %xmm1, %xmm0
101; SSSE3-NEXT:    pxor %xmm2, %xmm0
102; SSSE3-NEXT:    movq %xmm1, (%rdi)
103; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
104; SSSE3-NEXT:    movd %xmm1, 8(%rdi)
105; SSSE3-NEXT:    retq
106;
107; SSE41-LABEL: saddo_v3i32:
108; SSE41:       # %bb.0:
109; SSE41-NEXT:    pxor %xmm2, %xmm2
110; SSE41-NEXT:    pcmpgtd %xmm1, %xmm2
111; SSE41-NEXT:    paddd %xmm0, %xmm1
112; SSE41-NEXT:    pcmpgtd %xmm1, %xmm0
113; SSE41-NEXT:    pxor %xmm2, %xmm0
114; SSE41-NEXT:    pextrd $2, %xmm1, 8(%rdi)
115; SSE41-NEXT:    movq %xmm1, (%rdi)
116; SSE41-NEXT:    retq
117;
118; AVX-LABEL: saddo_v3i32:
119; AVX:       # %bb.0:
120; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
121; AVX-NEXT:    vpcmpgtd %xmm1, %xmm2, %xmm2
122; AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm1
123; AVX-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
124; AVX-NEXT:    vpxor %xmm0, %xmm2, %xmm0
125; AVX-NEXT:    vpextrd $2, %xmm1, 8(%rdi)
126; AVX-NEXT:    vmovq %xmm1, (%rdi)
127; AVX-NEXT:    retq
128;
129; AVX512-LABEL: saddo_v3i32:
130; AVX512:       # %bb.0:
131; AVX512-NEXT:    vpxor %xmm2, %xmm2, %xmm2
132; AVX512-NEXT:    vpcmpgtd %xmm1, %xmm2, %k0
133; AVX512-NEXT:    vpaddd %xmm1, %xmm0, %xmm1
134; AVX512-NEXT:    vpcmpgtd %xmm1, %xmm0, %k1
135; AVX512-NEXT:    kxorw %k1, %k0, %k1
136; AVX512-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0
137; AVX512-NEXT:    vmovdqa32 %xmm0, %xmm0 {%k1} {z}
138; AVX512-NEXT:    vpextrd $2, %xmm1, 8(%rdi)
139; AVX512-NEXT:    vmovq %xmm1, (%rdi)
140; AVX512-NEXT:    retq
141  %t = call {<3 x i32>, <3 x i1>} @llvm.sadd.with.overflow.v3i32(<3 x i32> %a0, <3 x i32> %a1)
142  %val = extractvalue {<3 x i32>, <3 x i1>} %t, 0
143  %obit = extractvalue {<3 x i32>, <3 x i1>} %t, 1
144  %res = sext <3 x i1> %obit to <3 x i32>
145  store <3 x i32> %val, <3 x i32>* %p2
146  ret <3 x i32> %res
147}
148
149define <4 x i32> @saddo_v4i32(<4 x i32> %a0, <4 x i32> %a1, <4 x i32>* %p2) nounwind {
150; SSE-LABEL: saddo_v4i32:
151; SSE:       # %bb.0:
152; SSE-NEXT:    pxor %xmm2, %xmm2
153; SSE-NEXT:    pcmpgtd %xmm1, %xmm2
154; SSE-NEXT:    paddd %xmm0, %xmm1
155; SSE-NEXT:    pcmpgtd %xmm1, %xmm0
156; SSE-NEXT:    pxor %xmm2, %xmm0
157; SSE-NEXT:    movdqa %xmm1, (%rdi)
158; SSE-NEXT:    retq
159;
160; AVX-LABEL: saddo_v4i32:
161; AVX:       # %bb.0:
162; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
163; AVX-NEXT:    vpcmpgtd %xmm1, %xmm2, %xmm2
164; AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm1
165; AVX-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
166; AVX-NEXT:    vpxor %xmm0, %xmm2, %xmm0
167; AVX-NEXT:    vmovdqa %xmm1, (%rdi)
168; AVX-NEXT:    retq
169;
170; AVX512-LABEL: saddo_v4i32:
171; AVX512:       # %bb.0:
172; AVX512-NEXT:    vpxor %xmm2, %xmm2, %xmm2
173; AVX512-NEXT:    vpcmpgtd %xmm1, %xmm2, %k0
174; AVX512-NEXT:    vpaddd %xmm1, %xmm0, %xmm1
175; AVX512-NEXT:    vpcmpgtd %xmm1, %xmm0, %k1
176; AVX512-NEXT:    kxorw %k1, %k0, %k1
177; AVX512-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0
178; AVX512-NEXT:    vmovdqa32 %xmm0, %xmm0 {%k1} {z}
179; AVX512-NEXT:    vmovdqa %xmm1, (%rdi)
180; AVX512-NEXT:    retq
181  %t = call {<4 x i32>, <4 x i1>} @llvm.sadd.with.overflow.v4i32(<4 x i32> %a0, <4 x i32> %a1)
182  %val = extractvalue {<4 x i32>, <4 x i1>} %t, 0
183  %obit = extractvalue {<4 x i32>, <4 x i1>} %t, 1
184  %res = sext <4 x i1> %obit to <4 x i32>
185  store <4 x i32> %val, <4 x i32>* %p2
186  ret <4 x i32> %res
187}
188
189define <6 x i32> @saddo_v6i32(<6 x i32> %a0, <6 x i32> %a1, <6 x i32>* %p2) nounwind {
190; SSE2-LABEL: saddo_v6i32:
191; SSE2:       # %bb.0:
192; SSE2-NEXT:    movq %rdi, %rax
193; SSE2-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
194; SSE2-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
195; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
196; SSE2-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
197; SSE2-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
198; SSE2-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
199; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
200; SSE2-NEXT:    movd %r8d, %xmm0
201; SSE2-NEXT:    movd %ecx, %xmm1
202; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
203; SSE2-NEXT:    movd %edx, %xmm0
204; SSE2-NEXT:    movd %esi, %xmm3
205; SSE2-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
206; SSE2-NEXT:    punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm1[0]
207; SSE2-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
208; SSE2-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
209; SSE2-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
210; SSE2-NEXT:    movd %r9d, %xmm0
211; SSE2-NEXT:    movd {{.*#+}} xmm4 = mem[0],zero,zero,zero
212; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1]
213; SSE2-NEXT:    movq {{[0-9]+}}(%rsp), %rcx
214; SSE2-NEXT:    movdqa %xmm3, %xmm4
215; SSE2-NEXT:    paddd %xmm2, %xmm4
216; SSE2-NEXT:    pcmpgtd %xmm4, %xmm3
217; SSE2-NEXT:    pxor %xmm5, %xmm5
218; SSE2-NEXT:    pxor %xmm6, %xmm6
219; SSE2-NEXT:    pcmpgtd %xmm2, %xmm6
220; SSE2-NEXT:    pxor %xmm3, %xmm6
221; SSE2-NEXT:    movdqa %xmm0, %xmm2
222; SSE2-NEXT:    paddd %xmm1, %xmm2
223; SSE2-NEXT:    pcmpgtd %xmm2, %xmm0
224; SSE2-NEXT:    pcmpgtd %xmm1, %xmm5
225; SSE2-NEXT:    pxor %xmm0, %xmm5
226; SSE2-NEXT:    movq %xmm2, 16(%rcx)
227; SSE2-NEXT:    movdqa %xmm4, (%rcx)
228; SSE2-NEXT:    movq %xmm5, 16(%rdi)
229; SSE2-NEXT:    movdqa %xmm6, (%rdi)
230; SSE2-NEXT:    retq
231;
232; SSSE3-LABEL: saddo_v6i32:
233; SSSE3:       # %bb.0:
234; SSSE3-NEXT:    movq %rdi, %rax
235; SSSE3-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
236; SSSE3-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
237; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
238; SSSE3-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
239; SSSE3-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
240; SSSE3-NEXT:    punpckldq {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1]
241; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm2 = xmm2[0],xmm1[0]
242; SSSE3-NEXT:    movd %r8d, %xmm0
243; SSSE3-NEXT:    movd %ecx, %xmm1
244; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
245; SSSE3-NEXT:    movd %edx, %xmm0
246; SSSE3-NEXT:    movd %esi, %xmm3
247; SSSE3-NEXT:    punpckldq {{.*#+}} xmm3 = xmm3[0],xmm0[0],xmm3[1],xmm0[1]
248; SSSE3-NEXT:    punpcklqdq {{.*#+}} xmm3 = xmm3[0],xmm1[0]
249; SSSE3-NEXT:    movd {{.*#+}} xmm0 = mem[0],zero,zero,zero
250; SSSE3-NEXT:    movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
251; SSSE3-NEXT:    punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
252; SSSE3-NEXT:    movd %r9d, %xmm0
253; SSSE3-NEXT:    movd {{.*#+}} xmm4 = mem[0],zero,zero,zero
254; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1]
255; SSSE3-NEXT:    movq {{[0-9]+}}(%rsp), %rcx
256; SSSE3-NEXT:    movdqa %xmm3, %xmm4
257; SSSE3-NEXT:    paddd %xmm2, %xmm4
258; SSSE3-NEXT:    pcmpgtd %xmm4, %xmm3
259; SSSE3-NEXT:    pxor %xmm5, %xmm5
260; SSSE3-NEXT:    pxor %xmm6, %xmm6
261; SSSE3-NEXT:    pcmpgtd %xmm2, %xmm6
262; SSSE3-NEXT:    pxor %xmm3, %xmm6
263; SSSE3-NEXT:    movdqa %xmm0, %xmm2
264; SSSE3-NEXT:    paddd %xmm1, %xmm2
265; SSSE3-NEXT:    pcmpgtd %xmm2, %xmm0
266; SSSE3-NEXT:    pcmpgtd %xmm1, %xmm5
267; SSSE3-NEXT:    pxor %xmm0, %xmm5
268; SSSE3-NEXT:    movq %xmm2, 16(%rcx)
269; SSSE3-NEXT:    movdqa %xmm4, (%rcx)
270; SSSE3-NEXT:    movq %xmm5, 16(%rdi)
271; SSSE3-NEXT:    movdqa %xmm6, (%rdi)
272; SSSE3-NEXT:    retq
273;
274; SSE41-LABEL: saddo_v6i32:
275; SSE41:       # %bb.0:
276; SSE41-NEXT:    movq %rdi, %rax
277; SSE41-NEXT:    movd %esi, %xmm1
278; SSE41-NEXT:    pinsrd $1, %edx, %xmm1
279; SSE41-NEXT:    pinsrd $2, %ecx, %xmm1
280; SSE41-NEXT:    pinsrd $3, %r8d, %xmm1
281; SSE41-NEXT:    movd %r9d, %xmm0
282; SSE41-NEXT:    pinsrd $1, {{[0-9]+}}(%rsp), %xmm0
283; SSE41-NEXT:    movd {{.*#+}} xmm2 = mem[0],zero,zero,zero
284; SSE41-NEXT:    pinsrd $1, {{[0-9]+}}(%rsp), %xmm2
285; SSE41-NEXT:    movd {{.*#+}} xmm3 = mem[0],zero,zero,zero
286; SSE41-NEXT:    pinsrd $1, {{[0-9]+}}(%rsp), %xmm3
287; SSE41-NEXT:    pinsrd $2, {{[0-9]+}}(%rsp), %xmm3
288; SSE41-NEXT:    pinsrd $3, {{[0-9]+}}(%rsp), %xmm3
289; SSE41-NEXT:    movq {{[0-9]+}}(%rsp), %rcx
290; SSE41-NEXT:    movdqa %xmm1, %xmm4
291; SSE41-NEXT:    paddd %xmm3, %xmm4
292; SSE41-NEXT:    pcmpgtd %xmm4, %xmm1
293; SSE41-NEXT:    pxor %xmm5, %xmm5
294; SSE41-NEXT:    pxor %xmm6, %xmm6
295; SSE41-NEXT:    pcmpgtd %xmm3, %xmm6
296; SSE41-NEXT:    pxor %xmm1, %xmm6
297; SSE41-NEXT:    pcmpgtd %xmm2, %xmm5
298; SSE41-NEXT:    paddd %xmm0, %xmm2
299; SSE41-NEXT:    pcmpgtd %xmm2, %xmm0
300; SSE41-NEXT:    pxor %xmm5, %xmm0
301; SSE41-NEXT:    movq %xmm2, 16(%rcx)
302; SSE41-NEXT:    movdqa %xmm4, (%rcx)
303; SSE41-NEXT:    movq %xmm0, 16(%rdi)
304; SSE41-NEXT:    movdqa %xmm6, (%rdi)
305; SSE41-NEXT:    retq
306;
307; AVX1-LABEL: saddo_v6i32:
308; AVX1:       # %bb.0:
309; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
310; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
311; AVX1-NEXT:    vpcmpgtd %xmm2, %xmm3, %xmm4
312; AVX1-NEXT:    vpcmpgtd %xmm1, %xmm3, %xmm3
313; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm3, %ymm3
314; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm4
315; AVX1-NEXT:    vpaddd %xmm2, %xmm4, %xmm2
316; AVX1-NEXT:    vpcmpgtd %xmm2, %xmm4, %xmm4
317; AVX1-NEXT:    vpaddd %xmm1, %xmm0, %xmm1
318; AVX1-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
319; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
320; AVX1-NEXT:    vxorps %ymm0, %ymm3, %ymm0
321; AVX1-NEXT:    vmovq %xmm2, 16(%rdi)
322; AVX1-NEXT:    vmovdqa %xmm1, (%rdi)
323; AVX1-NEXT:    retq
324;
325; AVX2-LABEL: saddo_v6i32:
326; AVX2:       # %bb.0:
327; AVX2-NEXT:    vpxor %xmm2, %xmm2, %xmm2
328; AVX2-NEXT:    vpcmpgtd %ymm1, %ymm2, %ymm2
329; AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm1
330; AVX2-NEXT:    vpcmpgtd %ymm1, %ymm0, %ymm0
331; AVX2-NEXT:    vpxor %ymm0, %ymm2, %ymm0
332; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm2
333; AVX2-NEXT:    vmovq %xmm2, 16(%rdi)
334; AVX2-NEXT:    vmovdqa %xmm1, (%rdi)
335; AVX2-NEXT:    retq
336;
337; AVX512-LABEL: saddo_v6i32:
338; AVX512:       # %bb.0:
339; AVX512-NEXT:    vpxor %xmm2, %xmm2, %xmm2
340; AVX512-NEXT:    vpcmpgtd %ymm1, %ymm2, %k0
341; AVX512-NEXT:    vpaddd %ymm1, %ymm0, %ymm1
342; AVX512-NEXT:    vpcmpgtd %ymm1, %ymm0, %k1
343; AVX512-NEXT:    kxorw %k1, %k0, %k1
344; AVX512-NEXT:    vpcmpeqd %ymm0, %ymm0, %ymm0
345; AVX512-NEXT:    vmovdqa32 %ymm0, %ymm0 {%k1} {z}
346; AVX512-NEXT:    vextracti128 $1, %ymm1, %xmm2
347; AVX512-NEXT:    vmovq %xmm2, 16(%rdi)
348; AVX512-NEXT:    vmovdqa %xmm1, (%rdi)
349; AVX512-NEXT:    retq
350  %t = call {<6 x i32>, <6 x i1>} @llvm.sadd.with.overflow.v6i32(<6 x i32> %a0, <6 x i32> %a1)
351  %val = extractvalue {<6 x i32>, <6 x i1>} %t, 0
352  %obit = extractvalue {<6 x i32>, <6 x i1>} %t, 1
353  %res = sext <6 x i1> %obit to <6 x i32>
354  store <6 x i32> %val, <6 x i32>* %p2
355  ret <6 x i32> %res
356}
357
358define <8 x i32> @saddo_v8i32(<8 x i32> %a0, <8 x i32> %a1, <8 x i32>* %p2) nounwind {
359; SSE-LABEL: saddo_v8i32:
360; SSE:       # %bb.0:
361; SSE-NEXT:    pxor %xmm4, %xmm4
362; SSE-NEXT:    pxor %xmm5, %xmm5
363; SSE-NEXT:    pcmpgtd %xmm2, %xmm5
364; SSE-NEXT:    paddd %xmm0, %xmm2
365; SSE-NEXT:    pcmpgtd %xmm2, %xmm0
366; SSE-NEXT:    pxor %xmm5, %xmm0
367; SSE-NEXT:    pcmpgtd %xmm3, %xmm4
368; SSE-NEXT:    paddd %xmm1, %xmm3
369; SSE-NEXT:    pcmpgtd %xmm3, %xmm1
370; SSE-NEXT:    pxor %xmm4, %xmm1
371; SSE-NEXT:    movdqa %xmm3, 16(%rdi)
372; SSE-NEXT:    movdqa %xmm2, (%rdi)
373; SSE-NEXT:    retq
374;
375; AVX1-LABEL: saddo_v8i32:
376; AVX1:       # %bb.0:
377; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
378; AVX1-NEXT:    vpxor %xmm3, %xmm3, %xmm3
379; AVX1-NEXT:    vpcmpgtd %xmm2, %xmm3, %xmm4
380; AVX1-NEXT:    vpcmpgtd %xmm1, %xmm3, %xmm3
381; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm3, %ymm3
382; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm4
383; AVX1-NEXT:    vpaddd %xmm2, %xmm4, %xmm2
384; AVX1-NEXT:    vpcmpgtd %xmm2, %xmm4, %xmm4
385; AVX1-NEXT:    vpaddd %xmm1, %xmm0, %xmm1
386; AVX1-NEXT:    vpcmpgtd %xmm1, %xmm0, %xmm0
387; AVX1-NEXT:    vinsertf128 $1, %xmm4, %ymm0, %ymm0
388; AVX1-NEXT:    vxorps %ymm0, %ymm3, %ymm0
389; AVX1-NEXT:    vmovdqa %xmm2, 16(%rdi)
390; AVX1-NEXT:    vmovdqa %xmm1, (%rdi)
391; AVX1-NEXT:    retq
392;
393; AVX2-LABEL: saddo_v8i32:
394; AVX2:       # %bb.0:
395; AVX2-NEXT:    vpxor %xmm2, %xmm2, %xmm2
396; AVX2-NEXT:    vpcmpgtd %ymm1, %ymm2, %ymm2
397; AVX2-NEXT:    vpaddd %ymm1, %ymm0, %ymm1
398; AVX2-NEXT:    vpcmpgtd %ymm1, %ymm0, %ymm0
399; AVX2-NEXT:    vpxor %ymm0, %ymm2, %ymm0
400; AVX2-NEXT:    vmovdqa %ymm1, (%rdi)
401; AVX2-NEXT:    retq
402;
403; AVX512-LABEL: saddo_v8i32:
404; AVX512:       # %bb.0:
405; AVX512-NEXT:    vpxor %xmm2, %xmm2, %xmm2
406; AVX512-NEXT:    vpcmpgtd %ymm1, %ymm2, %k0
407; AVX512-NEXT:    vpaddd %ymm1, %ymm0, %ymm1
408; AVX512-NEXT:    vpcmpgtd %ymm1, %ymm0, %k1
409; AVX512-NEXT:    kxorw %k1, %k0, %k1
410; AVX512-NEXT:    vpcmpeqd %ymm0, %ymm0, %ymm0
411; AVX512-NEXT:    vmovdqa32 %ymm0, %ymm0 {%k1} {z}
412; AVX512-NEXT:    vmovdqa %ymm1, (%rdi)
413; AVX512-NEXT:    retq
414  %t = call {<8 x i32>, <8 x i1>} @llvm.sadd.with.overflow.v8i32(<8 x i32> %a0, <8 x i32> %a1)
415  %val = extractvalue {<8 x i32>, <8 x i1>} %t, 0
416  %obit = extractvalue {<8 x i32>, <8 x i1>} %t, 1
417  %res = sext <8 x i1> %obit to <8 x i32>
418  store <8 x i32> %val, <8 x i32>* %p2
419  ret <8 x i32> %res
420}
421
422define <16 x i32> @saddo_v16i32(<16 x i32> %a0, <16 x i32> %a1, <16 x i32>* %p2) nounwind {
423; SSE-LABEL: saddo_v16i32:
424; SSE:       # %bb.0:
425; SSE-NEXT:    pxor %xmm8, %xmm8
426; SSE-NEXT:    pxor %xmm9, %xmm9
427; SSE-NEXT:    pcmpgtd %xmm4, %xmm9
428; SSE-NEXT:    paddd %xmm0, %xmm4
429; SSE-NEXT:    pcmpgtd %xmm4, %xmm0
430; SSE-NEXT:    pxor %xmm9, %xmm0
431; SSE-NEXT:    pxor %xmm9, %xmm9
432; SSE-NEXT:    pcmpgtd %xmm5, %xmm9
433; SSE-NEXT:    paddd %xmm1, %xmm5
434; SSE-NEXT:    pcmpgtd %xmm5, %xmm1
435; SSE-NEXT:    pxor %xmm9, %xmm1
436; SSE-NEXT:    pxor %xmm9, %xmm9
437; SSE-NEXT:    pcmpgtd %xmm6, %xmm9
438; SSE-NEXT:    paddd %xmm2, %xmm6
439; SSE-NEXT:    pcmpgtd %xmm6, %xmm2
440; SSE-NEXT:    pxor %xmm9, %xmm2
441; SSE-NEXT:    pcmpgtd %xmm7, %xmm8
442; SSE-NEXT:    paddd %xmm3, %xmm7
443; SSE-NEXT:    pcmpgtd %xmm7, %xmm3
444; SSE-NEXT:    pxor %xmm8, %xmm3
445; SSE-NEXT:    movdqa %xmm7, 48(%rdi)
446; SSE-NEXT:    movdqa %xmm6, 32(%rdi)
447; SSE-NEXT:    movdqa %xmm5, 16(%rdi)
448; SSE-NEXT:    movdqa %xmm4, (%rdi)
449; SSE-NEXT:    retq
450;
451; AVX1-LABEL: saddo_v16i32:
452; AVX1:       # %bb.0:
453; AVX1-NEXT:    vextractf128 $1, %ymm3, %xmm4
454; AVX1-NEXT:    vpxor %xmm5, %xmm5, %xmm5
455; AVX1-NEXT:    vpcmpgtd %xmm4, %xmm5, %xmm6
456; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm7
457; AVX1-NEXT:    vpaddd %xmm4, %xmm7, %xmm8
458; AVX1-NEXT:    vpcmpgtd %xmm8, %xmm7, %xmm7
459; AVX1-NEXT:    vpxor %xmm7, %xmm6, %xmm6
460; AVX1-NEXT:    vpcmpgtd %xmm3, %xmm5, %xmm7
461; AVX1-NEXT:    vpaddd %xmm3, %xmm1, %xmm3
462; AVX1-NEXT:    vpcmpgtd %xmm3, %xmm1, %xmm1
463; AVX1-NEXT:    vpxor %xmm1, %xmm7, %xmm1
464; AVX1-NEXT:    vpackssdw %xmm6, %xmm1, %xmm1
465; AVX1-NEXT:    vextractf128 $1, %ymm2, %xmm6
466; AVX1-NEXT:    vpcmpgtd %xmm6, %xmm5, %xmm7
467; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm4
468; AVX1-NEXT:    vpaddd %xmm6, %xmm4, %xmm6
469; AVX1-NEXT:    vpcmpgtd %xmm6, %xmm4, %xmm4
470; AVX1-NEXT:    vpxor %xmm4, %xmm7, %xmm4
471; AVX1-NEXT:    vpcmpgtd %xmm2, %xmm5, %xmm5
472; AVX1-NEXT:    vpaddd %xmm2, %xmm0, %xmm2
473; AVX1-NEXT:    vpcmpgtd %xmm2, %xmm0, %xmm0
474; AVX1-NEXT:    vpxor %xmm0, %xmm5, %xmm0
475; AVX1-NEXT:    vpackssdw %xmm4, %xmm0, %xmm0
476; AVX1-NEXT:    vpacksswb %xmm1, %xmm0, %xmm0
477; AVX1-NEXT:    vpmovsxbd %xmm0, %xmm4
478; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[1,1,1,1]
479; AVX1-NEXT:    vpmovsxbd %xmm0, %xmm0
480; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm4, %ymm0
481; AVX1-NEXT:    vpacksswb %xmm1, %xmm1, %xmm1
482; AVX1-NEXT:    vpmovsxbd %xmm1, %xmm4
483; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[1,1,1,1]
484; AVX1-NEXT:    vpmovsxbd %xmm1, %xmm1
485; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm4, %ymm1
486; AVX1-NEXT:    vmovdqa %xmm8, 48(%rdi)
487; AVX1-NEXT:    vmovdqa %xmm3, 32(%rdi)
488; AVX1-NEXT:    vmovdqa %xmm6, 16(%rdi)
489; AVX1-NEXT:    vmovdqa %xmm2, (%rdi)
490; AVX1-NEXT:    retq
491;
492; AVX2-LABEL: saddo_v16i32:
493; AVX2:       # %bb.0:
494; AVX2-NEXT:    vpxor %xmm4, %xmm4, %xmm4
495; AVX2-NEXT:    vpcmpgtd %ymm3, %ymm4, %ymm5
496; AVX2-NEXT:    vpaddd %ymm3, %ymm1, %ymm3
497; AVX2-NEXT:    vpcmpgtd %ymm3, %ymm1, %ymm1
498; AVX2-NEXT:    vpxor %ymm1, %ymm5, %ymm1
499; AVX2-NEXT:    vextracti128 $1, %ymm1, %xmm5
500; AVX2-NEXT:    vpackssdw %xmm5, %xmm1, %xmm1
501; AVX2-NEXT:    vpcmpgtd %ymm2, %ymm4, %ymm4
502; AVX2-NEXT:    vpaddd %ymm2, %ymm0, %ymm2
503; AVX2-NEXT:    vpcmpgtd %ymm2, %ymm0, %ymm0
504; AVX2-NEXT:    vpxor %ymm0, %ymm4, %ymm0
505; AVX2-NEXT:    vextracti128 $1, %ymm0, %xmm4
506; AVX2-NEXT:    vpackssdw %xmm4, %xmm0, %xmm0
507; AVX2-NEXT:    vpacksswb %xmm0, %xmm0, %xmm0
508; AVX2-NEXT:    vpmovsxbd %xmm0, %ymm0
509; AVX2-NEXT:    vpacksswb %xmm1, %xmm1, %xmm1
510; AVX2-NEXT:    vpmovsxbd %xmm1, %ymm1
511; AVX2-NEXT:    vmovdqa %ymm3, 32(%rdi)
512; AVX2-NEXT:    vmovdqa %ymm2, (%rdi)
513; AVX2-NEXT:    retq
514;
515; AVX512-LABEL: saddo_v16i32:
516; AVX512:       # %bb.0:
517; AVX512-NEXT:    vpxor %xmm2, %xmm2, %xmm2
518; AVX512-NEXT:    vpcmpgtd %zmm1, %zmm2, %k0
519; AVX512-NEXT:    vpaddd %zmm1, %zmm0, %zmm1
520; AVX512-NEXT:    vpcmpgtd %zmm1, %zmm0, %k1
521; AVX512-NEXT:    kxorw %k1, %k0, %k1
522; AVX512-NEXT:    vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
523; AVX512-NEXT:    vmovdqa64 %zmm1, (%rdi)
524; AVX512-NEXT:    retq
525  %t = call {<16 x i32>, <16 x i1>} @llvm.sadd.with.overflow.v16i32(<16 x i32> %a0, <16 x i32> %a1)
526  %val = extractvalue {<16 x i32>, <16 x i1>} %t, 0
527  %obit = extractvalue {<16 x i32>, <16 x i1>} %t, 1
528  %res = sext <16 x i1> %obit to <16 x i32>
529  store <16 x i32> %val, <16 x i32>* %p2
530  ret <16 x i32> %res
531}
532
533define <16 x i32> @saddo_v16i8(<16 x i8> %a0, <16 x i8> %a1, <16 x i8>* %p2) nounwind {
534; SSE2-LABEL: saddo_v16i8:
535; SSE2:       # %bb.0:
536; SSE2-NEXT:    movdqa %xmm0, %xmm2
537; SSE2-NEXT:    paddsb %xmm1, %xmm2
538; SSE2-NEXT:    paddb %xmm1, %xmm0
539; SSE2-NEXT:    pcmpeqb %xmm0, %xmm2
540; SSE2-NEXT:    pcmpeqd %xmm3, %xmm3
541; SSE2-NEXT:    pxor %xmm2, %xmm3
542; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
543; SSE2-NEXT:    punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3]
544; SSE2-NEXT:    psrad $24, %xmm4
545; SSE2-NEXT:    movdqa %xmm3, %xmm1
546; SSE2-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
547; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
548; SSE2-NEXT:    pslld $31, %xmm1
549; SSE2-NEXT:    psrad $31, %xmm1
550; SSE2-NEXT:    punpckhbw {{.*#+}} xmm3 = xmm3[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
551; SSE2-NEXT:    movdqa %xmm3, %xmm2
552; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3]
553; SSE2-NEXT:    pslld $31, %xmm2
554; SSE2-NEXT:    psrad $31, %xmm2
555; SSE2-NEXT:    punpckhwd {{.*#+}} xmm3 = xmm3[4,4,5,5,6,6,7,7]
556; SSE2-NEXT:    pslld $31, %xmm3
557; SSE2-NEXT:    psrad $31, %xmm3
558; SSE2-NEXT:    movdqa %xmm0, (%rdi)
559; SSE2-NEXT:    movdqa %xmm4, %xmm0
560; SSE2-NEXT:    retq
561;
562; SSSE3-LABEL: saddo_v16i8:
563; SSSE3:       # %bb.0:
564; SSSE3-NEXT:    movdqa %xmm0, %xmm2
565; SSSE3-NEXT:    paddsb %xmm1, %xmm2
566; SSSE3-NEXT:    paddb %xmm1, %xmm0
567; SSSE3-NEXT:    pcmpeqb %xmm0, %xmm2
568; SSSE3-NEXT:    pcmpeqd %xmm3, %xmm3
569; SSSE3-NEXT:    pxor %xmm2, %xmm3
570; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1],xmm1[2],xmm3[2],xmm1[3],xmm3[3],xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7]
571; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm4 = xmm4[0],xmm1[0],xmm4[1],xmm1[1],xmm4[2],xmm1[2],xmm4[3],xmm1[3]
572; SSSE3-NEXT:    psrad $24, %xmm4
573; SSSE3-NEXT:    movdqa %xmm3, %xmm1
574; SSSE3-NEXT:    punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7]
575; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
576; SSSE3-NEXT:    pslld $31, %xmm1
577; SSSE3-NEXT:    psrad $31, %xmm1
578; SSSE3-NEXT:    punpckhbw {{.*#+}} xmm3 = xmm3[8,8,9,9,10,10,11,11,12,12,13,13,14,14,15,15]
579; SSSE3-NEXT:    movdqa %xmm3, %xmm2
580; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0,0,1,1,2,2,3,3]
581; SSSE3-NEXT:    pslld $31, %xmm2
582; SSSE3-NEXT:    psrad $31, %xmm2
583; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm3 = xmm3[4,4,5,5,6,6,7,7]
584; SSSE3-NEXT:    pslld $31, %xmm3
585; SSSE3-NEXT:    psrad $31, %xmm3
586; SSSE3-NEXT:    movdqa %xmm0, (%rdi)
587; SSSE3-NEXT:    movdqa %xmm4, %xmm0
588; SSSE3-NEXT:    retq
589;
590; SSE41-LABEL: saddo_v16i8:
591; SSE41:       # %bb.0:
592; SSE41-NEXT:    movdqa %xmm0, %xmm2
593; SSE41-NEXT:    paddsb %xmm1, %xmm2
594; SSE41-NEXT:    paddb %xmm1, %xmm0
595; SSE41-NEXT:    pcmpeqb %xmm0, %xmm2
596; SSE41-NEXT:    pcmpeqd %xmm3, %xmm3
597; SSE41-NEXT:    pxor %xmm2, %xmm3
598; SSE41-NEXT:    pmovsxbd %xmm3, %xmm4
599; SSE41-NEXT:    pshufd {{.*#+}} xmm1 = xmm3[1,1,1,1]
600; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero
601; SSE41-NEXT:    pslld $31, %xmm1
602; SSE41-NEXT:    psrad $31, %xmm1
603; SSE41-NEXT:    pshufd {{.*#+}} xmm2 = xmm3[2,3,2,3]
604; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero
605; SSE41-NEXT:    pslld $31, %xmm2
606; SSE41-NEXT:    psrad $31, %xmm2
607; SSE41-NEXT:    pshufd {{.*#+}} xmm3 = xmm3[3,3,3,3]
608; SSE41-NEXT:    pmovzxbd {{.*#+}} xmm3 = xmm3[0],zero,zero,zero,xmm3[1],zero,zero,zero,xmm3[2],zero,zero,zero,xmm3[3],zero,zero,zero
609; SSE41-NEXT:    pslld $31, %xmm3
610; SSE41-NEXT:    psrad $31, %xmm3
611; SSE41-NEXT:    movdqa %xmm0, (%rdi)
612; SSE41-NEXT:    movdqa %xmm4, %xmm0
613; SSE41-NEXT:    retq
614;
615; AVX1-LABEL: saddo_v16i8:
616; AVX1:       # %bb.0:
617; AVX1-NEXT:    vpaddsb %xmm1, %xmm0, %xmm2
618; AVX1-NEXT:    vpaddb %xmm1, %xmm0, %xmm3
619; AVX1-NEXT:    vpcmpeqb %xmm2, %xmm3, %xmm0
620; AVX1-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
621; AVX1-NEXT:    vpxor %xmm1, %xmm0, %xmm1
622; AVX1-NEXT:    vpmovsxbd %xmm1, %xmm0
623; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm1[1,1,1,1]
624; AVX1-NEXT:    vpmovsxbd %xmm2, %xmm2
625; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
626; AVX1-NEXT:    vpshufd {{.*#+}} xmm2 = xmm1[2,3,2,3]
627; AVX1-NEXT:    vpmovsxbd %xmm2, %xmm2
628; AVX1-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[3,3,3,3]
629; AVX1-NEXT:    vpmovsxbd %xmm1, %xmm1
630; AVX1-NEXT:    vinsertf128 $1, %xmm1, %ymm2, %ymm1
631; AVX1-NEXT:    vmovdqa %xmm3, (%rdi)
632; AVX1-NEXT:    retq
633;
634; AVX2-LABEL: saddo_v16i8:
635; AVX2:       # %bb.0:
636; AVX2-NEXT:    vpaddsb %xmm1, %xmm0, %xmm2
637; AVX2-NEXT:    vpaddb %xmm1, %xmm0, %xmm3
638; AVX2-NEXT:    vpcmpeqb %xmm2, %xmm3, %xmm0
639; AVX2-NEXT:    vpcmpeqd %xmm1, %xmm1, %xmm1
640; AVX2-NEXT:    vpxor %xmm1, %xmm0, %xmm1
641; AVX2-NEXT:    vpmovsxbd %xmm1, %ymm0
642; AVX2-NEXT:    vpshufd {{.*#+}} xmm1 = xmm1[2,3,2,3]
643; AVX2-NEXT:    vpmovsxbd %xmm1, %ymm1
644; AVX2-NEXT:    vmovdqa %xmm3, (%rdi)
645; AVX2-NEXT:    retq
646;
647; AVX512-LABEL: saddo_v16i8:
648; AVX512:       # %bb.0:
649; AVX512-NEXT:    vpaddsb %xmm1, %xmm0, %xmm2
650; AVX512-NEXT:    vpaddb %xmm1, %xmm0, %xmm1
651; AVX512-NEXT:    vpcmpneqb %xmm2, %xmm1, %k1
652; AVX512-NEXT:    vpternlogd $255, %zmm0, %zmm0, %zmm0 {%k1} {z}
653; AVX512-NEXT:    vmovdqa %xmm1, (%rdi)
654; AVX512-NEXT:    retq
655  %t = call {<16 x i8>, <16 x i1>} @llvm.sadd.with.overflow.v16i8(<16 x i8> %a0, <16 x i8> %a1)
656  %val = extractvalue {<16 x i8>, <16 x i1>} %t, 0
657  %obit = extractvalue {<16 x i8>, <16 x i1>} %t, 1
658  %res = sext <16 x i1> %obit to <16 x i32>
659  store <16 x i8> %val, <16 x i8>* %p2
660  ret <16 x i32> %res
661}
662
663define <8 x i32> @saddo_v8i16(<8 x i16> %a0, <8 x i16> %a1, <8 x i16>* %p2) nounwind {
664; SSE2-LABEL: saddo_v8i16:
665; SSE2:       # %bb.0:
666; SSE2-NEXT:    movdqa %xmm0, %xmm2
667; SSE2-NEXT:    paddsw %xmm1, %xmm2
668; SSE2-NEXT:    paddw %xmm1, %xmm0
669; SSE2-NEXT:    pcmpeqw %xmm0, %xmm2
670; SSE2-NEXT:    pcmpeqd %xmm1, %xmm1
671; SSE2-NEXT:    pxor %xmm2, %xmm1
672; SSE2-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
673; SSE2-NEXT:    psrad $16, %xmm2
674; SSE2-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
675; SSE2-NEXT:    pslld $31, %xmm1
676; SSE2-NEXT:    psrad $31, %xmm1
677; SSE2-NEXT:    movdqa %xmm0, (%rdi)
678; SSE2-NEXT:    movdqa %xmm2, %xmm0
679; SSE2-NEXT:    retq
680;
681; SSSE3-LABEL: saddo_v8i16:
682; SSSE3:       # %bb.0:
683; SSSE3-NEXT:    movdqa %xmm0, %xmm2
684; SSSE3-NEXT:    paddsw %xmm1, %xmm2
685; SSSE3-NEXT:    paddw %xmm1, %xmm0
686; SSSE3-NEXT:    pcmpeqw %xmm0, %xmm2
687; SSSE3-NEXT:    pcmpeqd %xmm1, %xmm1
688; SSSE3-NEXT:    pxor %xmm2, %xmm1
689; SSSE3-NEXT:    punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3]
690; SSSE3-NEXT:    psrad $16, %xmm2
691; SSSE3-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
692; SSSE3-NEXT:    pslld $31, %xmm1
693; SSSE3-NEXT:    psrad $31, %xmm1
694; SSSE3-NEXT:    movdqa %xmm0, (%rdi)
695; SSSE3-NEXT:    movdqa %xmm2, %xmm0
696; SSSE3-NEXT:    retq
697;
698; SSE41-LABEL: saddo_v8i16:
699; SSE41:       # %bb.0:
700; SSE41-NEXT:    movdqa %xmm0, %xmm2
701; SSE41-NEXT:    paddsw %xmm1, %xmm2
702; SSE41-NEXT:    paddw %xmm1, %xmm0
703; SSE41-NEXT:    pcmpeqw %xmm0, %xmm2
704; SSE41-NEXT:    pcmpeqd %xmm1, %xmm1
705; SSE41-NEXT:    pxor %xmm2, %xmm1
706; SSE41-NEXT:    pmovsxwd %xmm1, %xmm2
707; SSE41-NEXT:    punpckhwd {{.*#+}} xmm1 = xmm1[4,4,5,5,6,6,7,7]
708; SSE41-NEXT:    pslld $31, %xmm1
709; SSE41-NEXT:    psrad $31, %xmm1
710; SSE41-NEXT:    movdqa %xmm0, (%rdi)
711; SSE41-NEXT:    movdqa %xmm2, %xmm0
712; SSE41-NEXT:    retq
713;
714; AVX1-LABEL: saddo_v8i16:
715; AVX1:       # %bb.0:
716; AVX1-NEXT:    vpaddsw %xmm1, %xmm0, %xmm2
717; AVX1-NEXT:    vpaddw %xmm1, %xmm0, %xmm1
718; AVX1-NEXT:    vpcmpeqw %xmm2, %xmm1, %xmm0
719; AVX1-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
720; AVX1-NEXT:    vpxor %xmm2, %xmm0, %xmm0
721; AVX1-NEXT:    vpmovsxwd %xmm0, %xmm2
722; AVX1-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[2,3,2,3]
723; AVX1-NEXT:    vpmovsxwd %xmm0, %xmm0
724; AVX1-NEXT:    vinsertf128 $1, %xmm0, %ymm2, %ymm0
725; AVX1-NEXT:    vmovdqa %xmm1, (%rdi)
726; AVX1-NEXT:    retq
727;
728; AVX2-LABEL: saddo_v8i16:
729; AVX2:       # %bb.0:
730; AVX2-NEXT:    vpaddsw %xmm1, %xmm0, %xmm2
731; AVX2-NEXT:    vpaddw %xmm1, %xmm0, %xmm1
732; AVX2-NEXT:    vpcmpeqw %xmm2, %xmm1, %xmm0
733; AVX2-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
734; AVX2-NEXT:    vpxor %xmm2, %xmm0, %xmm0
735; AVX2-NEXT:    vpmovsxwd %xmm0, %ymm0
736; AVX2-NEXT:    vmovdqa %xmm1, (%rdi)
737; AVX2-NEXT:    retq
738;
739; AVX512-LABEL: saddo_v8i16:
740; AVX512:       # %bb.0:
741; AVX512-NEXT:    vpaddsw %xmm1, %xmm0, %xmm2
742; AVX512-NEXT:    vpaddw %xmm1, %xmm0, %xmm1
743; AVX512-NEXT:    vpcmpneqw %xmm2, %xmm1, %k1
744; AVX512-NEXT:    vpcmpeqd %ymm0, %ymm0, %ymm0
745; AVX512-NEXT:    vmovdqa32 %ymm0, %ymm0 {%k1} {z}
746; AVX512-NEXT:    vmovdqa %xmm1, (%rdi)
747; AVX512-NEXT:    retq
748  %t = call {<8 x i16>, <8 x i1>} @llvm.sadd.with.overflow.v8i16(<8 x i16> %a0, <8 x i16> %a1)
749  %val = extractvalue {<8 x i16>, <8 x i1>} %t, 0
750  %obit = extractvalue {<8 x i16>, <8 x i1>} %t, 1
751  %res = sext <8 x i1> %obit to <8 x i32>
752  store <8 x i16> %val, <8 x i16>* %p2
753  ret <8 x i32> %res
754}
755
756define <2 x i32> @saddo_v2i64(<2 x i64> %a0, <2 x i64> %a1, <2 x i64>* %p2) nounwind {
757; SSE-LABEL: saddo_v2i64:
758; SSE:       # %bb.0:
759; SSE-NEXT:    movdqa {{.*#+}} xmm2 = [2147483648,2147483648]
760; SSE-NEXT:    movdqa %xmm0, %xmm3
761; SSE-NEXT:    pxor %xmm2, %xmm3
762; SSE-NEXT:    paddq %xmm1, %xmm0
763; SSE-NEXT:    pxor %xmm0, %xmm2
764; SSE-NEXT:    movdqa %xmm3, %xmm4
765; SSE-NEXT:    pcmpgtd %xmm2, %xmm4
766; SSE-NEXT:    pcmpeqd %xmm3, %xmm2
767; SSE-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
768; SSE-NEXT:    pand %xmm4, %xmm2
769; SSE-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
770; SSE-NEXT:    por %xmm2, %xmm3
771; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm1[1,1,3,3]
772; SSE-NEXT:    pxor %xmm2, %xmm2
773; SSE-NEXT:    pcmpgtd %xmm1, %xmm2
774; SSE-NEXT:    pxor %xmm3, %xmm2
775; SSE-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[0,2,2,3]
776; SSE-NEXT:    movdqa %xmm0, (%rdi)
777; SSE-NEXT:    movdqa %xmm1, %xmm0
778; SSE-NEXT:    retq
779;
780; AVX-LABEL: saddo_v2i64:
781; AVX:       # %bb.0:
782; AVX-NEXT:    vpxor %xmm2, %xmm2, %xmm2
783; AVX-NEXT:    vpcmpgtq %xmm1, %xmm2, %xmm2
784; AVX-NEXT:    vpaddq %xmm1, %xmm0, %xmm1
785; AVX-NEXT:    vpcmpgtq %xmm1, %xmm0, %xmm0
786; AVX-NEXT:    vpxor %xmm0, %xmm2, %xmm0
787; AVX-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
788; AVX-NEXT:    vmovdqa %xmm1, (%rdi)
789; AVX-NEXT:    retq
790;
791; AVX512-LABEL: saddo_v2i64:
792; AVX512:       # %bb.0:
793; AVX512-NEXT:    vpxor %xmm2, %xmm2, %xmm2
794; AVX512-NEXT:    vpcmpgtq %xmm1, %xmm2, %k0
795; AVX512-NEXT:    vpaddq %xmm1, %xmm0, %xmm1
796; AVX512-NEXT:    vpcmpgtq %xmm1, %xmm0, %k1
797; AVX512-NEXT:    kxorw %k1, %k0, %k1
798; AVX512-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0
799; AVX512-NEXT:    vmovdqa32 %xmm0, %xmm0 {%k1} {z}
800; AVX512-NEXT:    vmovdqa %xmm1, (%rdi)
801; AVX512-NEXT:    retq
802  %t = call {<2 x i64>, <2 x i1>} @llvm.sadd.with.overflow.v2i64(<2 x i64> %a0, <2 x i64> %a1)
803  %val = extractvalue {<2 x i64>, <2 x i1>} %t, 0
804  %obit = extractvalue {<2 x i64>, <2 x i1>} %t, 1
805  %res = sext <2 x i1> %obit to <2 x i32>
806  store <2 x i64> %val, <2 x i64>* %p2
807  ret <2 x i32> %res
808}
809
810define <4 x i32> @saddo_v4i24(<4 x i24> %a0, <4 x i24> %a1, <4 x i24>* %p2) nounwind {
811; SSE2-LABEL: saddo_v4i24:
812; SSE2:       # %bb.0:
813; SSE2-NEXT:    movdqa %xmm0, %xmm2
814; SSE2-NEXT:    pslld $8, %xmm1
815; SSE2-NEXT:    psrad $8, %xmm1
816; SSE2-NEXT:    pslld $8, %xmm2
817; SSE2-NEXT:    psrad $8, %xmm2
818; SSE2-NEXT:    paddd %xmm1, %xmm2
819; SSE2-NEXT:    movdqa %xmm2, %xmm0
820; SSE2-NEXT:    pslld $8, %xmm0
821; SSE2-NEXT:    psrad $8, %xmm0
822; SSE2-NEXT:    pcmpeqd %xmm2, %xmm0
823; SSE2-NEXT:    pcmpeqd %xmm1, %xmm1
824; SSE2-NEXT:    pxor %xmm1, %xmm0
825; SSE2-NEXT:    movd %xmm2, %eax
826; SSE2-NEXT:    movw %ax, (%rdi)
827; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[3,3,3,3]
828; SSE2-NEXT:    movd %xmm1, %ecx
829; SSE2-NEXT:    movw %cx, 9(%rdi)
830; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[2,3,2,3]
831; SSE2-NEXT:    movd %xmm1, %edx
832; SSE2-NEXT:    movw %dx, 6(%rdi)
833; SSE2-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,1,1]
834; SSE2-NEXT:    movd %xmm1, %esi
835; SSE2-NEXT:    movw %si, 3(%rdi)
836; SSE2-NEXT:    shrl $16, %eax
837; SSE2-NEXT:    movb %al, 2(%rdi)
838; SSE2-NEXT:    shrl $16, %ecx
839; SSE2-NEXT:    movb %cl, 11(%rdi)
840; SSE2-NEXT:    shrl $16, %edx
841; SSE2-NEXT:    movb %dl, 8(%rdi)
842; SSE2-NEXT:    shrl $16, %esi
843; SSE2-NEXT:    movb %sil, 5(%rdi)
844; SSE2-NEXT:    retq
845;
846; SSSE3-LABEL: saddo_v4i24:
847; SSSE3:       # %bb.0:
848; SSSE3-NEXT:    movdqa %xmm0, %xmm2
849; SSSE3-NEXT:    pslld $8, %xmm1
850; SSSE3-NEXT:    psrad $8, %xmm1
851; SSSE3-NEXT:    pslld $8, %xmm2
852; SSSE3-NEXT:    psrad $8, %xmm2
853; SSSE3-NEXT:    paddd %xmm1, %xmm2
854; SSSE3-NEXT:    movdqa %xmm2, %xmm0
855; SSSE3-NEXT:    pslld $8, %xmm0
856; SSSE3-NEXT:    psrad $8, %xmm0
857; SSSE3-NEXT:    pcmpeqd %xmm2, %xmm0
858; SSSE3-NEXT:    pcmpeqd %xmm1, %xmm1
859; SSSE3-NEXT:    pxor %xmm1, %xmm0
860; SSSE3-NEXT:    movd %xmm2, %eax
861; SSSE3-NEXT:    movw %ax, (%rdi)
862; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[3,3,3,3]
863; SSSE3-NEXT:    movd %xmm1, %ecx
864; SSSE3-NEXT:    movw %cx, 9(%rdi)
865; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[2,3,2,3]
866; SSSE3-NEXT:    movd %xmm1, %edx
867; SSSE3-NEXT:    movw %dx, 6(%rdi)
868; SSSE3-NEXT:    pshufd {{.*#+}} xmm1 = xmm2[1,1,1,1]
869; SSSE3-NEXT:    movd %xmm1, %esi
870; SSSE3-NEXT:    movw %si, 3(%rdi)
871; SSSE3-NEXT:    shrl $16, %eax
872; SSSE3-NEXT:    movb %al, 2(%rdi)
873; SSSE3-NEXT:    shrl $16, %ecx
874; SSSE3-NEXT:    movb %cl, 11(%rdi)
875; SSSE3-NEXT:    shrl $16, %edx
876; SSSE3-NEXT:    movb %dl, 8(%rdi)
877; SSSE3-NEXT:    shrl $16, %esi
878; SSSE3-NEXT:    movb %sil, 5(%rdi)
879; SSSE3-NEXT:    retq
880;
881; SSE41-LABEL: saddo_v4i24:
882; SSE41:       # %bb.0:
883; SSE41-NEXT:    movdqa %xmm0, %xmm2
884; SSE41-NEXT:    pslld $8, %xmm1
885; SSE41-NEXT:    psrad $8, %xmm1
886; SSE41-NEXT:    pslld $8, %xmm2
887; SSE41-NEXT:    psrad $8, %xmm2
888; SSE41-NEXT:    paddd %xmm1, %xmm2
889; SSE41-NEXT:    movdqa %xmm2, %xmm0
890; SSE41-NEXT:    pslld $8, %xmm0
891; SSE41-NEXT:    psrad $8, %xmm0
892; SSE41-NEXT:    pcmpeqd %xmm2, %xmm0
893; SSE41-NEXT:    pcmpeqd %xmm1, %xmm1
894; SSE41-NEXT:    pxor %xmm1, %xmm0
895; SSE41-NEXT:    pextrd $3, %xmm2, %eax
896; SSE41-NEXT:    movw %ax, 9(%rdi)
897; SSE41-NEXT:    pextrd $2, %xmm2, %ecx
898; SSE41-NEXT:    movw %cx, 6(%rdi)
899; SSE41-NEXT:    pextrd $1, %xmm2, %edx
900; SSE41-NEXT:    movw %dx, 3(%rdi)
901; SSE41-NEXT:    movd %xmm2, %esi
902; SSE41-NEXT:    movw %si, (%rdi)
903; SSE41-NEXT:    shrl $16, %eax
904; SSE41-NEXT:    movb %al, 11(%rdi)
905; SSE41-NEXT:    shrl $16, %ecx
906; SSE41-NEXT:    movb %cl, 8(%rdi)
907; SSE41-NEXT:    shrl $16, %edx
908; SSE41-NEXT:    movb %dl, 5(%rdi)
909; SSE41-NEXT:    shrl $16, %esi
910; SSE41-NEXT:    movb %sil, 2(%rdi)
911; SSE41-NEXT:    retq
912;
913; AVX-LABEL: saddo_v4i24:
914; AVX:       # %bb.0:
915; AVX-NEXT:    vpslld $8, %xmm1, %xmm1
916; AVX-NEXT:    vpsrad $8, %xmm1, %xmm1
917; AVX-NEXT:    vpslld $8, %xmm0, %xmm0
918; AVX-NEXT:    vpsrad $8, %xmm0, %xmm0
919; AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm1
920; AVX-NEXT:    vpslld $8, %xmm1, %xmm0
921; AVX-NEXT:    vpsrad $8, %xmm0, %xmm0
922; AVX-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
923; AVX-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
924; AVX-NEXT:    vpxor %xmm2, %xmm0, %xmm0
925; AVX-NEXT:    vpextrd $3, %xmm1, %eax
926; AVX-NEXT:    movw %ax, 9(%rdi)
927; AVX-NEXT:    vpextrd $2, %xmm1, %ecx
928; AVX-NEXT:    movw %cx, 6(%rdi)
929; AVX-NEXT:    vpextrd $1, %xmm1, %edx
930; AVX-NEXT:    movw %dx, 3(%rdi)
931; AVX-NEXT:    vmovd %xmm1, %esi
932; AVX-NEXT:    movw %si, (%rdi)
933; AVX-NEXT:    shrl $16, %eax
934; AVX-NEXT:    movb %al, 11(%rdi)
935; AVX-NEXT:    shrl $16, %ecx
936; AVX-NEXT:    movb %cl, 8(%rdi)
937; AVX-NEXT:    shrl $16, %edx
938; AVX-NEXT:    movb %dl, 5(%rdi)
939; AVX-NEXT:    shrl $16, %esi
940; AVX-NEXT:    movb %sil, 2(%rdi)
941; AVX-NEXT:    retq
942;
943; AVX512-LABEL: saddo_v4i24:
944; AVX512:       # %bb.0:
945; AVX512-NEXT:    vpslld $8, %xmm1, %xmm1
946; AVX512-NEXT:    vpsrad $8, %xmm1, %xmm1
947; AVX512-NEXT:    vpslld $8, %xmm0, %xmm0
948; AVX512-NEXT:    vpsrad $8, %xmm0, %xmm0
949; AVX512-NEXT:    vpaddd %xmm1, %xmm0, %xmm1
950; AVX512-NEXT:    vpslld $8, %xmm1, %xmm0
951; AVX512-NEXT:    vpsrad $8, %xmm0, %xmm0
952; AVX512-NEXT:    vpcmpeqd %xmm1, %xmm0, %xmm0
953; AVX512-NEXT:    vpternlogq $15, %xmm0, %xmm0, %xmm0
954; AVX512-NEXT:    vpextrd $3, %xmm1, %eax
955; AVX512-NEXT:    movw %ax, 9(%rdi)
956; AVX512-NEXT:    vpextrd $2, %xmm1, %ecx
957; AVX512-NEXT:    movw %cx, 6(%rdi)
958; AVX512-NEXT:    vpextrd $1, %xmm1, %edx
959; AVX512-NEXT:    movw %dx, 3(%rdi)
960; AVX512-NEXT:    vmovd %xmm1, %esi
961; AVX512-NEXT:    movw %si, (%rdi)
962; AVX512-NEXT:    shrl $16, %eax
963; AVX512-NEXT:    movb %al, 11(%rdi)
964; AVX512-NEXT:    shrl $16, %ecx
965; AVX512-NEXT:    movb %cl, 8(%rdi)
966; AVX512-NEXT:    shrl $16, %edx
967; AVX512-NEXT:    movb %dl, 5(%rdi)
968; AVX512-NEXT:    shrl $16, %esi
969; AVX512-NEXT:    movb %sil, 2(%rdi)
970; AVX512-NEXT:    retq
971  %t = call {<4 x i24>, <4 x i1>} @llvm.sadd.with.overflow.v4i24(<4 x i24> %a0, <4 x i24> %a1)
972  %val = extractvalue {<4 x i24>, <4 x i1>} %t, 0
973  %obit = extractvalue {<4 x i24>, <4 x i1>} %t, 1
974  %res = sext <4 x i1> %obit to <4 x i32>
975  store <4 x i24> %val, <4 x i24>* %p2
976  ret <4 x i32> %res
977}
978
979define <4 x i32> @saddo_v4i1(<4 x i1> %a0, <4 x i1> %a1, <4 x i1>* %p2) nounwind {
980; SSE-LABEL: saddo_v4i1:
981; SSE:       # %bb.0:
982; SSE-NEXT:    pslld $31, %xmm1
983; SSE-NEXT:    psrad $31, %xmm1
984; SSE-NEXT:    pslld $31, %xmm0
985; SSE-NEXT:    psrad $31, %xmm0
986; SSE-NEXT:    paddd %xmm1, %xmm0
987; SSE-NEXT:    movdqa %xmm0, %xmm1
988; SSE-NEXT:    pslld $31, %xmm1
989; SSE-NEXT:    movmskps %xmm1, %eax
990; SSE-NEXT:    psrad $31, %xmm1
991; SSE-NEXT:    pcmpeqd %xmm0, %xmm1
992; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
993; SSE-NEXT:    pxor %xmm0, %xmm1
994; SSE-NEXT:    movb %al, (%rdi)
995; SSE-NEXT:    movdqa %xmm1, %xmm0
996; SSE-NEXT:    retq
997;
998; AVX-LABEL: saddo_v4i1:
999; AVX:       # %bb.0:
1000; AVX-NEXT:    vpslld $31, %xmm1, %xmm1
1001; AVX-NEXT:    vpsrad $31, %xmm1, %xmm1
1002; AVX-NEXT:    vpslld $31, %xmm0, %xmm0
1003; AVX-NEXT:    vpsrad $31, %xmm0, %xmm0
1004; AVX-NEXT:    vpaddd %xmm1, %xmm0, %xmm0
1005; AVX-NEXT:    vpslld $31, %xmm0, %xmm1
1006; AVX-NEXT:    vpsrad $31, %xmm1, %xmm2
1007; AVX-NEXT:    vpcmpeqd %xmm0, %xmm2, %xmm0
1008; AVX-NEXT:    vpcmpeqd %xmm2, %xmm2, %xmm2
1009; AVX-NEXT:    vpxor %xmm2, %xmm0, %xmm0
1010; AVX-NEXT:    vmovmskps %xmm1, %eax
1011; AVX-NEXT:    movb %al, (%rdi)
1012; AVX-NEXT:    retq
1013;
1014; AVX512-LABEL: saddo_v4i1:
1015; AVX512:       # %bb.0:
1016; AVX512-NEXT:    vpslld $31, %xmm0, %xmm0
1017; AVX512-NEXT:    vptestmd %xmm0, %xmm0, %k0
1018; AVX512-NEXT:    vpslld $31, %xmm1, %xmm1
1019; AVX512-NEXT:    vptestmd %xmm1, %xmm1, %k1
1020; AVX512-NEXT:    kxorw %k1, %k0, %k2
1021; AVX512-NEXT:    vptestnmd %xmm0, %xmm0, %k0 {%k2}
1022; AVX512-NEXT:    kxorw %k0, %k1, %k1
1023; AVX512-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0
1024; AVX512-NEXT:    vmovdqa32 %xmm0, %xmm0 {%k1} {z}
1025; AVX512-NEXT:    kshiftlw $12, %k2, %k0
1026; AVX512-NEXT:    kshiftrw $12, %k0, %k0
1027; AVX512-NEXT:    kmovd %k0, %eax
1028; AVX512-NEXT:    movb %al, (%rdi)
1029; AVX512-NEXT:    retq
1030  %t = call {<4 x i1>, <4 x i1>} @llvm.sadd.with.overflow.v4i1(<4 x i1> %a0, <4 x i1> %a1)
1031  %val = extractvalue {<4 x i1>, <4 x i1>} %t, 0
1032  %obit = extractvalue {<4 x i1>, <4 x i1>} %t, 1
1033  %res = sext <4 x i1> %obit to <4 x i32>
1034  store <4 x i1> %val, <4 x i1>* %p2
1035  ret <4 x i32> %res
1036}
1037
1038define <2 x i32> @saddo_v2i128(<2 x i128> %a0, <2 x i128> %a1, <2 x i128>* %p2) nounwind {
1039; SSE2-LABEL: saddo_v2i128:
1040; SSE2:       # %bb.0:
1041; SSE2-NEXT:    movq {{[0-9]+}}(%rsp), %r10
1042; SSE2-NEXT:    addq %r8, %rdi
1043; SSE2-NEXT:    adcq %r9, %rsi
1044; SSE2-NEXT:    seto %r8b
1045; SSE2-NEXT:    addq {{[0-9]+}}(%rsp), %rdx
1046; SSE2-NEXT:    adcq {{[0-9]+}}(%rsp), %rcx
1047; SSE2-NEXT:    seto %al
1048; SSE2-NEXT:    movzbl %al, %eax
1049; SSE2-NEXT:    negl %eax
1050; SSE2-NEXT:    movd %eax, %xmm1
1051; SSE2-NEXT:    movzbl %r8b, %eax
1052; SSE2-NEXT:    negl %eax
1053; SSE2-NEXT:    movd %eax, %xmm0
1054; SSE2-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1055; SSE2-NEXT:    movq %rdx, 16(%r10)
1056; SSE2-NEXT:    movq %rdi, (%r10)
1057; SSE2-NEXT:    movq %rcx, 24(%r10)
1058; SSE2-NEXT:    movq %rsi, 8(%r10)
1059; SSE2-NEXT:    retq
1060;
1061; SSSE3-LABEL: saddo_v2i128:
1062; SSSE3:       # %bb.0:
1063; SSSE3-NEXT:    movq {{[0-9]+}}(%rsp), %r10
1064; SSSE3-NEXT:    addq %r8, %rdi
1065; SSSE3-NEXT:    adcq %r9, %rsi
1066; SSSE3-NEXT:    seto %r8b
1067; SSSE3-NEXT:    addq {{[0-9]+}}(%rsp), %rdx
1068; SSSE3-NEXT:    adcq {{[0-9]+}}(%rsp), %rcx
1069; SSSE3-NEXT:    seto %al
1070; SSSE3-NEXT:    movzbl %al, %eax
1071; SSSE3-NEXT:    negl %eax
1072; SSSE3-NEXT:    movd %eax, %xmm1
1073; SSSE3-NEXT:    movzbl %r8b, %eax
1074; SSSE3-NEXT:    negl %eax
1075; SSSE3-NEXT:    movd %eax, %xmm0
1076; SSSE3-NEXT:    punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
1077; SSSE3-NEXT:    movq %rdx, 16(%r10)
1078; SSSE3-NEXT:    movq %rdi, (%r10)
1079; SSSE3-NEXT:    movq %rcx, 24(%r10)
1080; SSSE3-NEXT:    movq %rsi, 8(%r10)
1081; SSSE3-NEXT:    retq
1082;
1083; SSE41-LABEL: saddo_v2i128:
1084; SSE41:       # %bb.0:
1085; SSE41-NEXT:    movq {{[0-9]+}}(%rsp), %r10
1086; SSE41-NEXT:    addq %r8, %rdi
1087; SSE41-NEXT:    adcq %r9, %rsi
1088; SSE41-NEXT:    seto %r8b
1089; SSE41-NEXT:    addq {{[0-9]+}}(%rsp), %rdx
1090; SSE41-NEXT:    adcq {{[0-9]+}}(%rsp), %rcx
1091; SSE41-NEXT:    seto %al
1092; SSE41-NEXT:    movzbl %al, %r9d
1093; SSE41-NEXT:    negl %r9d
1094; SSE41-NEXT:    movzbl %r8b, %eax
1095; SSE41-NEXT:    negl %eax
1096; SSE41-NEXT:    movd %eax, %xmm0
1097; SSE41-NEXT:    pinsrd $1, %r9d, %xmm0
1098; SSE41-NEXT:    movq %rdx, 16(%r10)
1099; SSE41-NEXT:    movq %rdi, (%r10)
1100; SSE41-NEXT:    movq %rcx, 24(%r10)
1101; SSE41-NEXT:    movq %rsi, 8(%r10)
1102; SSE41-NEXT:    retq
1103;
1104; AVX-LABEL: saddo_v2i128:
1105; AVX:       # %bb.0:
1106; AVX-NEXT:    movq {{[0-9]+}}(%rsp), %r10
1107; AVX-NEXT:    addq %r8, %rdi
1108; AVX-NEXT:    adcq %r9, %rsi
1109; AVX-NEXT:    seto %r8b
1110; AVX-NEXT:    addq {{[0-9]+}}(%rsp), %rdx
1111; AVX-NEXT:    adcq {{[0-9]+}}(%rsp), %rcx
1112; AVX-NEXT:    seto %al
1113; AVX-NEXT:    movzbl %al, %r9d
1114; AVX-NEXT:    negl %r9d
1115; AVX-NEXT:    movzbl %r8b, %eax
1116; AVX-NEXT:    negl %eax
1117; AVX-NEXT:    vmovd %eax, %xmm0
1118; AVX-NEXT:    vpinsrd $1, %r9d, %xmm0, %xmm0
1119; AVX-NEXT:    movq %rdx, 16(%r10)
1120; AVX-NEXT:    movq %rdi, (%r10)
1121; AVX-NEXT:    movq %rcx, 24(%r10)
1122; AVX-NEXT:    movq %rsi, 8(%r10)
1123; AVX-NEXT:    retq
1124;
1125; AVX512-LABEL: saddo_v2i128:
1126; AVX512:       # %bb.0:
1127; AVX512-NEXT:    movq {{[0-9]+}}(%rsp), %r10
1128; AVX512-NEXT:    addq {{[0-9]+}}(%rsp), %rdx
1129; AVX512-NEXT:    adcq {{[0-9]+}}(%rsp), %rcx
1130; AVX512-NEXT:    seto %al
1131; AVX512-NEXT:    kmovd %eax, %k0
1132; AVX512-NEXT:    addq %r8, %rdi
1133; AVX512-NEXT:    adcq %r9, %rsi
1134; AVX512-NEXT:    seto %al
1135; AVX512-NEXT:    andl $1, %eax
1136; AVX512-NEXT:    kmovw %eax, %k1
1137; AVX512-NEXT:    kshiftlw $1, %k0, %k0
1138; AVX512-NEXT:    korw %k0, %k1, %k1
1139; AVX512-NEXT:    vpcmpeqd %xmm0, %xmm0, %xmm0
1140; AVX512-NEXT:    vmovdqa32 %xmm0, %xmm0 {%k1} {z}
1141; AVX512-NEXT:    movq %rdx, 16(%r10)
1142; AVX512-NEXT:    movq %rdi, (%r10)
1143; AVX512-NEXT:    movq %rcx, 24(%r10)
1144; AVX512-NEXT:    movq %rsi, 8(%r10)
1145; AVX512-NEXT:    retq
1146  %t = call {<2 x i128>, <2 x i1>} @llvm.sadd.with.overflow.v2i128(<2 x i128> %a0, <2 x i128> %a1)
1147  %val = extractvalue {<2 x i128>, <2 x i1>} %t, 0
1148  %obit = extractvalue {<2 x i128>, <2 x i1>} %t, 1
1149  %res = sext <2 x i1> %obit to <2 x i32>
1150  store <2 x i128> %val, <2 x i128>* %p2
1151  ret <2 x i32> %res
1152}
1153