1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42
5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512
8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512
9
10;
11; Unsigned Maximum (GT)
12;
13
14define <2 x i64> @max_gt_v2i64(<2 x i64> %a, <2 x i64> %b) {
15; SSE2-LABEL: max_gt_v2i64:
16; SSE2:       # %bb.0:
17; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
18; SSE2-NEXT:    movdqa %xmm1, %xmm3
19; SSE2-NEXT:    pxor %xmm2, %xmm3
20; SSE2-NEXT:    pxor %xmm0, %xmm2
21; SSE2-NEXT:    movdqa %xmm2, %xmm4
22; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
23; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
24; SSE2-NEXT:    pcmpeqd %xmm3, %xmm2
25; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
26; SSE2-NEXT:    pand %xmm5, %xmm2
27; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
28; SSE2-NEXT:    por %xmm2, %xmm3
29; SSE2-NEXT:    pand %xmm3, %xmm0
30; SSE2-NEXT:    pandn %xmm1, %xmm3
31; SSE2-NEXT:    por %xmm3, %xmm0
32; SSE2-NEXT:    retq
33;
34; SSE41-LABEL: max_gt_v2i64:
35; SSE41:       # %bb.0:
36; SSE41-NEXT:    movdqa %xmm0, %xmm2
37; SSE41-NEXT:    movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456]
38; SSE41-NEXT:    movdqa %xmm1, %xmm0
39; SSE41-NEXT:    pxor %xmm3, %xmm0
40; SSE41-NEXT:    pxor %xmm2, %xmm3
41; SSE41-NEXT:    movdqa %xmm3, %xmm4
42; SSE41-NEXT:    pcmpeqd %xmm0, %xmm4
43; SSE41-NEXT:    pcmpgtd %xmm0, %xmm3
44; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,0,2,2]
45; SSE41-NEXT:    pand %xmm4, %xmm0
46; SSE41-NEXT:    por %xmm3, %xmm0
47; SSE41-NEXT:    blendvpd %xmm0, %xmm2, %xmm1
48; SSE41-NEXT:    movapd %xmm1, %xmm0
49; SSE41-NEXT:    retq
50;
51; SSE42-LABEL: max_gt_v2i64:
52; SSE42:       # %bb.0:
53; SSE42-NEXT:    movdqa %xmm0, %xmm2
54; SSE42-NEXT:    movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808]
55; SSE42-NEXT:    movdqa %xmm1, %xmm3
56; SSE42-NEXT:    pxor %xmm0, %xmm3
57; SSE42-NEXT:    pxor %xmm2, %xmm0
58; SSE42-NEXT:    pcmpgtq %xmm3, %xmm0
59; SSE42-NEXT:    blendvpd %xmm0, %xmm2, %xmm1
60; SSE42-NEXT:    movapd %xmm1, %xmm0
61; SSE42-NEXT:    retq
62;
63; AVX1-LABEL: max_gt_v2i64:
64; AVX1:       # %bb.0:
65; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
66; AVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm3
67; AVX1-NEXT:    vpxor %xmm2, %xmm0, %xmm2
68; AVX1-NEXT:    vpcmpgtq %xmm3, %xmm2, %xmm2
69; AVX1-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
70; AVX1-NEXT:    retq
71;
72; AVX2-LABEL: max_gt_v2i64:
73; AVX2:       # %bb.0:
74; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
75; AVX2-NEXT:    vpxor %xmm2, %xmm1, %xmm3
76; AVX2-NEXT:    vpxor %xmm2, %xmm0, %xmm2
77; AVX2-NEXT:    vpcmpgtq %xmm3, %xmm2, %xmm2
78; AVX2-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
79; AVX2-NEXT:    retq
80;
81; AVX512-LABEL: max_gt_v2i64:
82; AVX512:       # %bb.0:
83; AVX512-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
84; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
85; AVX512-NEXT:    vpmaxuq %zmm1, %zmm0, %zmm0
86; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
87; AVX512-NEXT:    vzeroupper
88; AVX512-NEXT:    retq
89  %1 = icmp ugt <2 x i64> %a, %b
90  %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b
91  ret <2 x i64> %2
92}
93
94define <4 x i64> @max_gt_v4i64(<4 x i64> %a, <4 x i64> %b) {
95; SSE2-LABEL: max_gt_v4i64:
96; SSE2:       # %bb.0:
97; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456]
98; SSE2-NEXT:    movdqa %xmm2, %xmm5
99; SSE2-NEXT:    pxor %xmm4, %xmm5
100; SSE2-NEXT:    movdqa %xmm0, %xmm6
101; SSE2-NEXT:    pxor %xmm4, %xmm6
102; SSE2-NEXT:    movdqa %xmm6, %xmm7
103; SSE2-NEXT:    pcmpgtd %xmm5, %xmm7
104; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2]
105; SSE2-NEXT:    pcmpeqd %xmm5, %xmm6
106; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
107; SSE2-NEXT:    pand %xmm8, %xmm5
108; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
109; SSE2-NEXT:    por %xmm5, %xmm6
110; SSE2-NEXT:    pand %xmm6, %xmm0
111; SSE2-NEXT:    pandn %xmm2, %xmm6
112; SSE2-NEXT:    por %xmm6, %xmm0
113; SSE2-NEXT:    movdqa %xmm3, %xmm2
114; SSE2-NEXT:    pxor %xmm4, %xmm2
115; SSE2-NEXT:    pxor %xmm1, %xmm4
116; SSE2-NEXT:    movdqa %xmm4, %xmm5
117; SSE2-NEXT:    pcmpgtd %xmm2, %xmm5
118; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
119; SSE2-NEXT:    pcmpeqd %xmm2, %xmm4
120; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
121; SSE2-NEXT:    pand %xmm6, %xmm2
122; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
123; SSE2-NEXT:    por %xmm2, %xmm4
124; SSE2-NEXT:    pand %xmm4, %xmm1
125; SSE2-NEXT:    pandn %xmm3, %xmm4
126; SSE2-NEXT:    por %xmm4, %xmm1
127; SSE2-NEXT:    retq
128;
129; SSE41-LABEL: max_gt_v4i64:
130; SSE41:       # %bb.0:
131; SSE41-NEXT:    movdqa %xmm0, %xmm4
132; SSE41-NEXT:    movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456]
133; SSE41-NEXT:    movdqa %xmm2, %xmm0
134; SSE41-NEXT:    pxor %xmm5, %xmm0
135; SSE41-NEXT:    movdqa %xmm4, %xmm6
136; SSE41-NEXT:    pxor %xmm5, %xmm6
137; SSE41-NEXT:    movdqa %xmm6, %xmm7
138; SSE41-NEXT:    pcmpeqd %xmm0, %xmm7
139; SSE41-NEXT:    pcmpgtd %xmm0, %xmm6
140; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[0,0,2,2]
141; SSE41-NEXT:    pand %xmm7, %xmm0
142; SSE41-NEXT:    por %xmm6, %xmm0
143; SSE41-NEXT:    blendvpd %xmm0, %xmm4, %xmm2
144; SSE41-NEXT:    movdqa %xmm3, %xmm0
145; SSE41-NEXT:    pxor %xmm5, %xmm0
146; SSE41-NEXT:    pxor %xmm1, %xmm5
147; SSE41-NEXT:    movdqa %xmm5, %xmm4
148; SSE41-NEXT:    pcmpeqd %xmm0, %xmm4
149; SSE41-NEXT:    pcmpgtd %xmm0, %xmm5
150; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2]
151; SSE41-NEXT:    pand %xmm4, %xmm0
152; SSE41-NEXT:    por %xmm5, %xmm0
153; SSE41-NEXT:    blendvpd %xmm0, %xmm1, %xmm3
154; SSE41-NEXT:    movapd %xmm2, %xmm0
155; SSE41-NEXT:    movapd %xmm3, %xmm1
156; SSE41-NEXT:    retq
157;
158; SSE42-LABEL: max_gt_v4i64:
159; SSE42:       # %bb.0:
160; SSE42-NEXT:    movdqa %xmm0, %xmm4
161; SSE42-NEXT:    movdqa {{.*#+}} xmm5 = [9223372036854775808,9223372036854775808]
162; SSE42-NEXT:    movdqa %xmm2, %xmm6
163; SSE42-NEXT:    pxor %xmm5, %xmm6
164; SSE42-NEXT:    pxor %xmm5, %xmm0
165; SSE42-NEXT:    pcmpgtq %xmm6, %xmm0
166; SSE42-NEXT:    blendvpd %xmm0, %xmm4, %xmm2
167; SSE42-NEXT:    movdqa %xmm3, %xmm0
168; SSE42-NEXT:    pxor %xmm5, %xmm0
169; SSE42-NEXT:    pxor %xmm1, %xmm5
170; SSE42-NEXT:    pcmpgtq %xmm0, %xmm5
171; SSE42-NEXT:    movdqa %xmm5, %xmm0
172; SSE42-NEXT:    blendvpd %xmm0, %xmm1, %xmm3
173; SSE42-NEXT:    movapd %xmm2, %xmm0
174; SSE42-NEXT:    movapd %xmm3, %xmm1
175; SSE42-NEXT:    retq
176;
177; AVX1-LABEL: max_gt_v4i64:
178; AVX1:       # %bb.0:
179; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
180; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
181; AVX1-NEXT:    vpxor %xmm3, %xmm2, %xmm4
182; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm5
183; AVX1-NEXT:    vpxor %xmm3, %xmm5, %xmm6
184; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm6, %xmm4
185; AVX1-NEXT:    vblendvpd %xmm4, %xmm5, %xmm2, %xmm2
186; AVX1-NEXT:    vpxor %xmm3, %xmm1, %xmm4
187; AVX1-NEXT:    vpxor %xmm3, %xmm0, %xmm3
188; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm3, %xmm3
189; AVX1-NEXT:    vblendvpd %xmm3, %xmm0, %xmm1, %xmm0
190; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
191; AVX1-NEXT:    retq
192;
193; AVX2-LABEL: max_gt_v4i64:
194; AVX2:       # %bb.0:
195; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
196; AVX2-NEXT:    vpxor %ymm2, %ymm1, %ymm3
197; AVX2-NEXT:    vpxor %ymm2, %ymm0, %ymm2
198; AVX2-NEXT:    vpcmpgtq %ymm3, %ymm2, %ymm2
199; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
200; AVX2-NEXT:    retq
201;
202; AVX512-LABEL: max_gt_v4i64:
203; AVX512:       # %bb.0:
204; AVX512-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
205; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
206; AVX512-NEXT:    vpmaxuq %zmm1, %zmm0, %zmm0
207; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
208; AVX512-NEXT:    retq
209  %1 = icmp ugt <4 x i64> %a, %b
210  %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b
211  ret <4 x i64> %2
212}
213
214define <4 x i32> @max_gt_v4i32(<4 x i32> %a, <4 x i32> %b) {
215; SSE2-LABEL: max_gt_v4i32:
216; SSE2:       # %bb.0:
217; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
218; SSE2-NEXT:    movdqa %xmm1, %xmm3
219; SSE2-NEXT:    pxor %xmm2, %xmm3
220; SSE2-NEXT:    pxor %xmm0, %xmm2
221; SSE2-NEXT:    pcmpgtd %xmm3, %xmm2
222; SSE2-NEXT:    pand %xmm2, %xmm0
223; SSE2-NEXT:    pandn %xmm1, %xmm2
224; SSE2-NEXT:    por %xmm2, %xmm0
225; SSE2-NEXT:    retq
226;
227; SSE41-LABEL: max_gt_v4i32:
228; SSE41:       # %bb.0:
229; SSE41-NEXT:    pmaxud %xmm1, %xmm0
230; SSE41-NEXT:    retq
231;
232; SSE42-LABEL: max_gt_v4i32:
233; SSE42:       # %bb.0:
234; SSE42-NEXT:    pmaxud %xmm1, %xmm0
235; SSE42-NEXT:    retq
236;
237; AVX-LABEL: max_gt_v4i32:
238; AVX:       # %bb.0:
239; AVX-NEXT:    vpmaxud %xmm1, %xmm0, %xmm0
240; AVX-NEXT:    retq
241  %1 = icmp ugt <4 x i32> %a, %b
242  %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b
243  ret <4 x i32> %2
244}
245
246define <8 x i32> @max_gt_v8i32(<8 x i32> %a, <8 x i32> %b) {
247; SSE2-LABEL: max_gt_v8i32:
248; SSE2:       # %bb.0:
249; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]
250; SSE2-NEXT:    movdqa %xmm2, %xmm5
251; SSE2-NEXT:    pxor %xmm4, %xmm5
252; SSE2-NEXT:    movdqa %xmm0, %xmm6
253; SSE2-NEXT:    pxor %xmm4, %xmm6
254; SSE2-NEXT:    pcmpgtd %xmm5, %xmm6
255; SSE2-NEXT:    pand %xmm6, %xmm0
256; SSE2-NEXT:    pandn %xmm2, %xmm6
257; SSE2-NEXT:    por %xmm6, %xmm0
258; SSE2-NEXT:    movdqa %xmm3, %xmm2
259; SSE2-NEXT:    pxor %xmm4, %xmm2
260; SSE2-NEXT:    pxor %xmm1, %xmm4
261; SSE2-NEXT:    pcmpgtd %xmm2, %xmm4
262; SSE2-NEXT:    pand %xmm4, %xmm1
263; SSE2-NEXT:    pandn %xmm3, %xmm4
264; SSE2-NEXT:    por %xmm4, %xmm1
265; SSE2-NEXT:    retq
266;
267; SSE41-LABEL: max_gt_v8i32:
268; SSE41:       # %bb.0:
269; SSE41-NEXT:    pmaxud %xmm2, %xmm0
270; SSE41-NEXT:    pmaxud %xmm3, %xmm1
271; SSE41-NEXT:    retq
272;
273; SSE42-LABEL: max_gt_v8i32:
274; SSE42:       # %bb.0:
275; SSE42-NEXT:    pmaxud %xmm2, %xmm0
276; SSE42-NEXT:    pmaxud %xmm3, %xmm1
277; SSE42-NEXT:    retq
278;
279; AVX1-LABEL: max_gt_v8i32:
280; AVX1:       # %bb.0:
281; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
282; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
283; AVX1-NEXT:    vpmaxud %xmm2, %xmm3, %xmm2
284; AVX1-NEXT:    vpmaxud %xmm1, %xmm0, %xmm0
285; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
286; AVX1-NEXT:    retq
287;
288; AVX2-LABEL: max_gt_v8i32:
289; AVX2:       # %bb.0:
290; AVX2-NEXT:    vpmaxud %ymm1, %ymm0, %ymm0
291; AVX2-NEXT:    retq
292;
293; AVX512-LABEL: max_gt_v8i32:
294; AVX512:       # %bb.0:
295; AVX512-NEXT:    vpmaxud %ymm1, %ymm0, %ymm0
296; AVX512-NEXT:    retq
297  %1 = icmp ugt <8 x i32> %a, %b
298  %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b
299  ret <8 x i32> %2
300}
301
302define <8 x i16> @max_gt_v8i16(<8 x i16> %a, <8 x i16> %b) {
303; SSE2-LABEL: max_gt_v8i16:
304; SSE2:       # %bb.0:
305; SSE2-NEXT:    psubusw %xmm0, %xmm1
306; SSE2-NEXT:    paddw %xmm1, %xmm0
307; SSE2-NEXT:    retq
308;
309; SSE41-LABEL: max_gt_v8i16:
310; SSE41:       # %bb.0:
311; SSE41-NEXT:    pmaxuw %xmm1, %xmm0
312; SSE41-NEXT:    retq
313;
314; SSE42-LABEL: max_gt_v8i16:
315; SSE42:       # %bb.0:
316; SSE42-NEXT:    pmaxuw %xmm1, %xmm0
317; SSE42-NEXT:    retq
318;
319; AVX-LABEL: max_gt_v8i16:
320; AVX:       # %bb.0:
321; AVX-NEXT:    vpmaxuw %xmm1, %xmm0, %xmm0
322; AVX-NEXT:    retq
323  %1 = icmp ugt <8 x i16> %a, %b
324  %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b
325  ret <8 x i16> %2
326}
327
328define <16 x i16> @max_gt_v16i16(<16 x i16> %a, <16 x i16> %b) {
329; SSE2-LABEL: max_gt_v16i16:
330; SSE2:       # %bb.0:
331; SSE2-NEXT:    psubusw %xmm0, %xmm2
332; SSE2-NEXT:    paddw %xmm2, %xmm0
333; SSE2-NEXT:    psubusw %xmm1, %xmm3
334; SSE2-NEXT:    paddw %xmm3, %xmm1
335; SSE2-NEXT:    retq
336;
337; SSE41-LABEL: max_gt_v16i16:
338; SSE41:       # %bb.0:
339; SSE41-NEXT:    pmaxuw %xmm2, %xmm0
340; SSE41-NEXT:    pmaxuw %xmm3, %xmm1
341; SSE41-NEXT:    retq
342;
343; SSE42-LABEL: max_gt_v16i16:
344; SSE42:       # %bb.0:
345; SSE42-NEXT:    pmaxuw %xmm2, %xmm0
346; SSE42-NEXT:    pmaxuw %xmm3, %xmm1
347; SSE42-NEXT:    retq
348;
349; AVX1-LABEL: max_gt_v16i16:
350; AVX1:       # %bb.0:
351; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
352; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
353; AVX1-NEXT:    vpmaxuw %xmm2, %xmm3, %xmm2
354; AVX1-NEXT:    vpmaxuw %xmm1, %xmm0, %xmm0
355; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
356; AVX1-NEXT:    retq
357;
358; AVX2-LABEL: max_gt_v16i16:
359; AVX2:       # %bb.0:
360; AVX2-NEXT:    vpmaxuw %ymm1, %ymm0, %ymm0
361; AVX2-NEXT:    retq
362;
363; AVX512-LABEL: max_gt_v16i16:
364; AVX512:       # %bb.0:
365; AVX512-NEXT:    vpmaxuw %ymm1, %ymm0, %ymm0
366; AVX512-NEXT:    retq
367  %1 = icmp ugt <16 x i16> %a, %b
368  %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b
369  ret <16 x i16> %2
370}
371
372define <16 x i8> @max_gt_v16i8(<16 x i8> %a, <16 x i8> %b) {
373; SSE-LABEL: max_gt_v16i8:
374; SSE:       # %bb.0:
375; SSE-NEXT:    pmaxub %xmm1, %xmm0
376; SSE-NEXT:    retq
377;
378; AVX-LABEL: max_gt_v16i8:
379; AVX:       # %bb.0:
380; AVX-NEXT:    vpmaxub %xmm1, %xmm0, %xmm0
381; AVX-NEXT:    retq
382  %1 = icmp ugt <16 x i8> %a, %b
383  %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b
384  ret <16 x i8> %2
385}
386
387define <32 x i8> @max_gt_v32i8(<32 x i8> %a, <32 x i8> %b) {
388; SSE-LABEL: max_gt_v32i8:
389; SSE:       # %bb.0:
390; SSE-NEXT:    pmaxub %xmm2, %xmm0
391; SSE-NEXT:    pmaxub %xmm3, %xmm1
392; SSE-NEXT:    retq
393;
394; AVX1-LABEL: max_gt_v32i8:
395; AVX1:       # %bb.0:
396; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
397; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
398; AVX1-NEXT:    vpmaxub %xmm2, %xmm3, %xmm2
399; AVX1-NEXT:    vpmaxub %xmm1, %xmm0, %xmm0
400; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
401; AVX1-NEXT:    retq
402;
403; AVX2-LABEL: max_gt_v32i8:
404; AVX2:       # %bb.0:
405; AVX2-NEXT:    vpmaxub %ymm1, %ymm0, %ymm0
406; AVX2-NEXT:    retq
407;
408; AVX512-LABEL: max_gt_v32i8:
409; AVX512:       # %bb.0:
410; AVX512-NEXT:    vpmaxub %ymm1, %ymm0, %ymm0
411; AVX512-NEXT:    retq
412  %1 = icmp ugt <32 x i8> %a, %b
413  %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b
414  ret <32 x i8> %2
415}
416
417;
418; Unsigned Maximum (GE)
419;
420
421define <2 x i64> @max_ge_v2i64(<2 x i64> %a, <2 x i64> %b) {
422; SSE2-LABEL: max_ge_v2i64:
423; SSE2:       # %bb.0:
424; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
425; SSE2-NEXT:    movdqa %xmm1, %xmm3
426; SSE2-NEXT:    pxor %xmm2, %xmm3
427; SSE2-NEXT:    pxor %xmm0, %xmm2
428; SSE2-NEXT:    movdqa %xmm2, %xmm4
429; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
430; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
431; SSE2-NEXT:    pcmpeqd %xmm3, %xmm2
432; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
433; SSE2-NEXT:    pand %xmm5, %xmm2
434; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
435; SSE2-NEXT:    por %xmm2, %xmm3
436; SSE2-NEXT:    pand %xmm3, %xmm0
437; SSE2-NEXT:    pandn %xmm1, %xmm3
438; SSE2-NEXT:    por %xmm3, %xmm0
439; SSE2-NEXT:    retq
440;
441; SSE41-LABEL: max_ge_v2i64:
442; SSE41:       # %bb.0:
443; SSE41-NEXT:    movdqa %xmm0, %xmm2
444; SSE41-NEXT:    movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456]
445; SSE41-NEXT:    movdqa %xmm1, %xmm0
446; SSE41-NEXT:    pxor %xmm3, %xmm0
447; SSE41-NEXT:    pxor %xmm2, %xmm3
448; SSE41-NEXT:    movdqa %xmm3, %xmm4
449; SSE41-NEXT:    pcmpeqd %xmm0, %xmm4
450; SSE41-NEXT:    pcmpgtd %xmm0, %xmm3
451; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,0,2,2]
452; SSE41-NEXT:    pand %xmm4, %xmm0
453; SSE41-NEXT:    por %xmm3, %xmm0
454; SSE41-NEXT:    blendvpd %xmm0, %xmm2, %xmm1
455; SSE41-NEXT:    movapd %xmm1, %xmm0
456; SSE41-NEXT:    retq
457;
458; SSE42-LABEL: max_ge_v2i64:
459; SSE42:       # %bb.0:
460; SSE42-NEXT:    movdqa %xmm0, %xmm2
461; SSE42-NEXT:    movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808]
462; SSE42-NEXT:    movdqa %xmm1, %xmm3
463; SSE42-NEXT:    pxor %xmm0, %xmm3
464; SSE42-NEXT:    pxor %xmm2, %xmm0
465; SSE42-NEXT:    pcmpgtq %xmm3, %xmm0
466; SSE42-NEXT:    blendvpd %xmm0, %xmm2, %xmm1
467; SSE42-NEXT:    movapd %xmm1, %xmm0
468; SSE42-NEXT:    retq
469;
470; AVX1-LABEL: max_ge_v2i64:
471; AVX1:       # %bb.0:
472; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
473; AVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm3
474; AVX1-NEXT:    vpxor %xmm2, %xmm0, %xmm2
475; AVX1-NEXT:    vpcmpgtq %xmm3, %xmm2, %xmm2
476; AVX1-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
477; AVX1-NEXT:    retq
478;
479; AVX2-LABEL: max_ge_v2i64:
480; AVX2:       # %bb.0:
481; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
482; AVX2-NEXT:    vpxor %xmm2, %xmm1, %xmm3
483; AVX2-NEXT:    vpxor %xmm2, %xmm0, %xmm2
484; AVX2-NEXT:    vpcmpgtq %xmm3, %xmm2, %xmm2
485; AVX2-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
486; AVX2-NEXT:    retq
487;
488; AVX512-LABEL: max_ge_v2i64:
489; AVX512:       # %bb.0:
490; AVX512-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
491; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
492; AVX512-NEXT:    vpmaxuq %zmm1, %zmm0, %zmm0
493; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
494; AVX512-NEXT:    vzeroupper
495; AVX512-NEXT:    retq
496  %1 = icmp uge <2 x i64> %a, %b
497  %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b
498  ret <2 x i64> %2
499}
500
501define <4 x i64> @max_ge_v4i64(<4 x i64> %a, <4 x i64> %b) {
502; SSE2-LABEL: max_ge_v4i64:
503; SSE2:       # %bb.0:
504; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456]
505; SSE2-NEXT:    movdqa %xmm2, %xmm5
506; SSE2-NEXT:    pxor %xmm4, %xmm5
507; SSE2-NEXT:    movdqa %xmm0, %xmm6
508; SSE2-NEXT:    pxor %xmm4, %xmm6
509; SSE2-NEXT:    movdqa %xmm6, %xmm7
510; SSE2-NEXT:    pcmpgtd %xmm5, %xmm7
511; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2]
512; SSE2-NEXT:    pcmpeqd %xmm5, %xmm6
513; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
514; SSE2-NEXT:    pand %xmm8, %xmm5
515; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
516; SSE2-NEXT:    por %xmm5, %xmm6
517; SSE2-NEXT:    pand %xmm6, %xmm0
518; SSE2-NEXT:    pandn %xmm2, %xmm6
519; SSE2-NEXT:    por %xmm6, %xmm0
520; SSE2-NEXT:    movdqa %xmm3, %xmm2
521; SSE2-NEXT:    pxor %xmm4, %xmm2
522; SSE2-NEXT:    pxor %xmm1, %xmm4
523; SSE2-NEXT:    movdqa %xmm4, %xmm5
524; SSE2-NEXT:    pcmpgtd %xmm2, %xmm5
525; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
526; SSE2-NEXT:    pcmpeqd %xmm2, %xmm4
527; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
528; SSE2-NEXT:    pand %xmm6, %xmm2
529; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
530; SSE2-NEXT:    por %xmm2, %xmm4
531; SSE2-NEXT:    pand %xmm4, %xmm1
532; SSE2-NEXT:    pandn %xmm3, %xmm4
533; SSE2-NEXT:    por %xmm4, %xmm1
534; SSE2-NEXT:    retq
535;
536; SSE41-LABEL: max_ge_v4i64:
537; SSE41:       # %bb.0:
538; SSE41-NEXT:    movdqa %xmm0, %xmm4
539; SSE41-NEXT:    movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456]
540; SSE41-NEXT:    movdqa %xmm2, %xmm0
541; SSE41-NEXT:    pxor %xmm5, %xmm0
542; SSE41-NEXT:    movdqa %xmm4, %xmm6
543; SSE41-NEXT:    pxor %xmm5, %xmm6
544; SSE41-NEXT:    movdqa %xmm6, %xmm7
545; SSE41-NEXT:    pcmpeqd %xmm0, %xmm7
546; SSE41-NEXT:    pcmpgtd %xmm0, %xmm6
547; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[0,0,2,2]
548; SSE41-NEXT:    pand %xmm7, %xmm0
549; SSE41-NEXT:    por %xmm6, %xmm0
550; SSE41-NEXT:    blendvpd %xmm0, %xmm4, %xmm2
551; SSE41-NEXT:    movdqa %xmm3, %xmm0
552; SSE41-NEXT:    pxor %xmm5, %xmm0
553; SSE41-NEXT:    pxor %xmm1, %xmm5
554; SSE41-NEXT:    movdqa %xmm5, %xmm4
555; SSE41-NEXT:    pcmpeqd %xmm0, %xmm4
556; SSE41-NEXT:    pcmpgtd %xmm0, %xmm5
557; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2]
558; SSE41-NEXT:    pand %xmm4, %xmm0
559; SSE41-NEXT:    por %xmm5, %xmm0
560; SSE41-NEXT:    blendvpd %xmm0, %xmm1, %xmm3
561; SSE41-NEXT:    movapd %xmm2, %xmm0
562; SSE41-NEXT:    movapd %xmm3, %xmm1
563; SSE41-NEXT:    retq
564;
565; SSE42-LABEL: max_ge_v4i64:
566; SSE42:       # %bb.0:
567; SSE42-NEXT:    movdqa %xmm0, %xmm4
568; SSE42-NEXT:    movdqa {{.*#+}} xmm5 = [9223372036854775808,9223372036854775808]
569; SSE42-NEXT:    movdqa %xmm2, %xmm6
570; SSE42-NEXT:    pxor %xmm5, %xmm6
571; SSE42-NEXT:    pxor %xmm5, %xmm0
572; SSE42-NEXT:    pcmpgtq %xmm6, %xmm0
573; SSE42-NEXT:    blendvpd %xmm0, %xmm4, %xmm2
574; SSE42-NEXT:    movdqa %xmm3, %xmm0
575; SSE42-NEXT:    pxor %xmm5, %xmm0
576; SSE42-NEXT:    pxor %xmm1, %xmm5
577; SSE42-NEXT:    pcmpgtq %xmm0, %xmm5
578; SSE42-NEXT:    movdqa %xmm5, %xmm0
579; SSE42-NEXT:    blendvpd %xmm0, %xmm1, %xmm3
580; SSE42-NEXT:    movapd %xmm2, %xmm0
581; SSE42-NEXT:    movapd %xmm3, %xmm1
582; SSE42-NEXT:    retq
583;
584; AVX1-LABEL: max_ge_v4i64:
585; AVX1:       # %bb.0:
586; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
587; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
588; AVX1-NEXT:    vpxor %xmm3, %xmm2, %xmm4
589; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm5
590; AVX1-NEXT:    vpxor %xmm3, %xmm5, %xmm6
591; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm6, %xmm4
592; AVX1-NEXT:    vblendvpd %xmm4, %xmm5, %xmm2, %xmm2
593; AVX1-NEXT:    vpxor %xmm3, %xmm1, %xmm4
594; AVX1-NEXT:    vpxor %xmm3, %xmm0, %xmm3
595; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm3, %xmm3
596; AVX1-NEXT:    vblendvpd %xmm3, %xmm0, %xmm1, %xmm0
597; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
598; AVX1-NEXT:    retq
599;
600; AVX2-LABEL: max_ge_v4i64:
601; AVX2:       # %bb.0:
602; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
603; AVX2-NEXT:    vpxor %ymm2, %ymm1, %ymm3
604; AVX2-NEXT:    vpxor %ymm2, %ymm0, %ymm2
605; AVX2-NEXT:    vpcmpgtq %ymm3, %ymm2, %ymm2
606; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
607; AVX2-NEXT:    retq
608;
609; AVX512-LABEL: max_ge_v4i64:
610; AVX512:       # %bb.0:
611; AVX512-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
612; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
613; AVX512-NEXT:    vpmaxuq %zmm1, %zmm0, %zmm0
614; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
615; AVX512-NEXT:    retq
616  %1 = icmp uge <4 x i64> %a, %b
617  %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b
618  ret <4 x i64> %2
619}
620
621define <4 x i32> @max_ge_v4i32(<4 x i32> %a, <4 x i32> %b) {
622; SSE2-LABEL: max_ge_v4i32:
623; SSE2:       # %bb.0:
624; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
625; SSE2-NEXT:    movdqa %xmm1, %xmm3
626; SSE2-NEXT:    pxor %xmm2, %xmm3
627; SSE2-NEXT:    pxor %xmm0, %xmm2
628; SSE2-NEXT:    pcmpgtd %xmm3, %xmm2
629; SSE2-NEXT:    pand %xmm2, %xmm0
630; SSE2-NEXT:    pandn %xmm1, %xmm2
631; SSE2-NEXT:    por %xmm2, %xmm0
632; SSE2-NEXT:    retq
633;
634; SSE41-LABEL: max_ge_v4i32:
635; SSE41:       # %bb.0:
636; SSE41-NEXT:    pmaxud %xmm1, %xmm0
637; SSE41-NEXT:    retq
638;
639; SSE42-LABEL: max_ge_v4i32:
640; SSE42:       # %bb.0:
641; SSE42-NEXT:    pmaxud %xmm1, %xmm0
642; SSE42-NEXT:    retq
643;
644; AVX-LABEL: max_ge_v4i32:
645; AVX:       # %bb.0:
646; AVX-NEXT:    vpmaxud %xmm1, %xmm0, %xmm0
647; AVX-NEXT:    retq
648  %1 = icmp uge <4 x i32> %a, %b
649  %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b
650  ret <4 x i32> %2
651}
652
653define <8 x i32> @max_ge_v8i32(<8 x i32> %a, <8 x i32> %b) {
654; SSE2-LABEL: max_ge_v8i32:
655; SSE2:       # %bb.0:
656; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]
657; SSE2-NEXT:    movdqa %xmm2, %xmm5
658; SSE2-NEXT:    pxor %xmm4, %xmm5
659; SSE2-NEXT:    movdqa %xmm0, %xmm6
660; SSE2-NEXT:    pxor %xmm4, %xmm6
661; SSE2-NEXT:    pcmpgtd %xmm5, %xmm6
662; SSE2-NEXT:    pand %xmm6, %xmm0
663; SSE2-NEXT:    pandn %xmm2, %xmm6
664; SSE2-NEXT:    por %xmm6, %xmm0
665; SSE2-NEXT:    movdqa %xmm3, %xmm2
666; SSE2-NEXT:    pxor %xmm4, %xmm2
667; SSE2-NEXT:    pxor %xmm1, %xmm4
668; SSE2-NEXT:    pcmpgtd %xmm2, %xmm4
669; SSE2-NEXT:    pand %xmm4, %xmm1
670; SSE2-NEXT:    pandn %xmm3, %xmm4
671; SSE2-NEXT:    por %xmm4, %xmm1
672; SSE2-NEXT:    retq
673;
674; SSE41-LABEL: max_ge_v8i32:
675; SSE41:       # %bb.0:
676; SSE41-NEXT:    pmaxud %xmm2, %xmm0
677; SSE41-NEXT:    pmaxud %xmm3, %xmm1
678; SSE41-NEXT:    retq
679;
680; SSE42-LABEL: max_ge_v8i32:
681; SSE42:       # %bb.0:
682; SSE42-NEXT:    pmaxud %xmm2, %xmm0
683; SSE42-NEXT:    pmaxud %xmm3, %xmm1
684; SSE42-NEXT:    retq
685;
686; AVX1-LABEL: max_ge_v8i32:
687; AVX1:       # %bb.0:
688; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
689; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
690; AVX1-NEXT:    vpmaxud %xmm2, %xmm3, %xmm2
691; AVX1-NEXT:    vpmaxud %xmm1, %xmm0, %xmm0
692; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
693; AVX1-NEXT:    retq
694;
695; AVX2-LABEL: max_ge_v8i32:
696; AVX2:       # %bb.0:
697; AVX2-NEXT:    vpmaxud %ymm1, %ymm0, %ymm0
698; AVX2-NEXT:    retq
699;
700; AVX512-LABEL: max_ge_v8i32:
701; AVX512:       # %bb.0:
702; AVX512-NEXT:    vpmaxud %ymm1, %ymm0, %ymm0
703; AVX512-NEXT:    retq
704  %1 = icmp uge <8 x i32> %a, %b
705  %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b
706  ret <8 x i32> %2
707}
708
709define <8 x i16> @max_ge_v8i16(<8 x i16> %a, <8 x i16> %b) {
710; SSE2-LABEL: max_ge_v8i16:
711; SSE2:       # %bb.0:
712; SSE2-NEXT:    psubusw %xmm0, %xmm1
713; SSE2-NEXT:    paddw %xmm1, %xmm0
714; SSE2-NEXT:    retq
715;
716; SSE41-LABEL: max_ge_v8i16:
717; SSE41:       # %bb.0:
718; SSE41-NEXT:    pmaxuw %xmm1, %xmm0
719; SSE41-NEXT:    retq
720;
721; SSE42-LABEL: max_ge_v8i16:
722; SSE42:       # %bb.0:
723; SSE42-NEXT:    pmaxuw %xmm1, %xmm0
724; SSE42-NEXT:    retq
725;
726; AVX-LABEL: max_ge_v8i16:
727; AVX:       # %bb.0:
728; AVX-NEXT:    vpmaxuw %xmm1, %xmm0, %xmm0
729; AVX-NEXT:    retq
730  %1 = icmp uge <8 x i16> %a, %b
731  %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b
732  ret <8 x i16> %2
733}
734
735define <16 x i16> @max_ge_v16i16(<16 x i16> %a, <16 x i16> %b) {
736; SSE2-LABEL: max_ge_v16i16:
737; SSE2:       # %bb.0:
738; SSE2-NEXT:    psubusw %xmm0, %xmm2
739; SSE2-NEXT:    paddw %xmm2, %xmm0
740; SSE2-NEXT:    psubusw %xmm1, %xmm3
741; SSE2-NEXT:    paddw %xmm3, %xmm1
742; SSE2-NEXT:    retq
743;
744; SSE41-LABEL: max_ge_v16i16:
745; SSE41:       # %bb.0:
746; SSE41-NEXT:    pmaxuw %xmm2, %xmm0
747; SSE41-NEXT:    pmaxuw %xmm3, %xmm1
748; SSE41-NEXT:    retq
749;
750; SSE42-LABEL: max_ge_v16i16:
751; SSE42:       # %bb.0:
752; SSE42-NEXT:    pmaxuw %xmm2, %xmm0
753; SSE42-NEXT:    pmaxuw %xmm3, %xmm1
754; SSE42-NEXT:    retq
755;
756; AVX1-LABEL: max_ge_v16i16:
757; AVX1:       # %bb.0:
758; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
759; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
760; AVX1-NEXT:    vpmaxuw %xmm2, %xmm3, %xmm2
761; AVX1-NEXT:    vpmaxuw %xmm1, %xmm0, %xmm0
762; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
763; AVX1-NEXT:    retq
764;
765; AVX2-LABEL: max_ge_v16i16:
766; AVX2:       # %bb.0:
767; AVX2-NEXT:    vpmaxuw %ymm1, %ymm0, %ymm0
768; AVX2-NEXT:    retq
769;
770; AVX512-LABEL: max_ge_v16i16:
771; AVX512:       # %bb.0:
772; AVX512-NEXT:    vpmaxuw %ymm1, %ymm0, %ymm0
773; AVX512-NEXT:    retq
774  %1 = icmp uge <16 x i16> %a, %b
775  %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b
776  ret <16 x i16> %2
777}
778
779define <16 x i8> @max_ge_v16i8(<16 x i8> %a, <16 x i8> %b) {
780; SSE-LABEL: max_ge_v16i8:
781; SSE:       # %bb.0:
782; SSE-NEXT:    pmaxub %xmm1, %xmm0
783; SSE-NEXT:    retq
784;
785; AVX-LABEL: max_ge_v16i8:
786; AVX:       # %bb.0:
787; AVX-NEXT:    vpmaxub %xmm1, %xmm0, %xmm0
788; AVX-NEXT:    retq
789  %1 = icmp uge <16 x i8> %a, %b
790  %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b
791  ret <16 x i8> %2
792}
793
794define <32 x i8> @max_ge_v32i8(<32 x i8> %a, <32 x i8> %b) {
795; SSE-LABEL: max_ge_v32i8:
796; SSE:       # %bb.0:
797; SSE-NEXT:    pmaxub %xmm2, %xmm0
798; SSE-NEXT:    pmaxub %xmm3, %xmm1
799; SSE-NEXT:    retq
800;
801; AVX1-LABEL: max_ge_v32i8:
802; AVX1:       # %bb.0:
803; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
804; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
805; AVX1-NEXT:    vpmaxub %xmm2, %xmm3, %xmm2
806; AVX1-NEXT:    vpmaxub %xmm1, %xmm0, %xmm0
807; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
808; AVX1-NEXT:    retq
809;
810; AVX2-LABEL: max_ge_v32i8:
811; AVX2:       # %bb.0:
812; AVX2-NEXT:    vpmaxub %ymm1, %ymm0, %ymm0
813; AVX2-NEXT:    retq
814;
815; AVX512-LABEL: max_ge_v32i8:
816; AVX512:       # %bb.0:
817; AVX512-NEXT:    vpmaxub %ymm1, %ymm0, %ymm0
818; AVX512-NEXT:    retq
819  %1 = icmp uge <32 x i8> %a, %b
820  %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b
821  ret <32 x i8> %2
822}
823
824;
825; Unsigned Minimum (LT)
826;
827
828define <2 x i64> @min_lt_v2i64(<2 x i64> %a, <2 x i64> %b) {
829; SSE2-LABEL: min_lt_v2i64:
830; SSE2:       # %bb.0:
831; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
832; SSE2-NEXT:    movdqa %xmm0, %xmm3
833; SSE2-NEXT:    pxor %xmm2, %xmm3
834; SSE2-NEXT:    pxor %xmm1, %xmm2
835; SSE2-NEXT:    movdqa %xmm2, %xmm4
836; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
837; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
838; SSE2-NEXT:    pcmpeqd %xmm3, %xmm2
839; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
840; SSE2-NEXT:    pand %xmm5, %xmm2
841; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
842; SSE2-NEXT:    por %xmm2, %xmm3
843; SSE2-NEXT:    pand %xmm3, %xmm0
844; SSE2-NEXT:    pandn %xmm1, %xmm3
845; SSE2-NEXT:    por %xmm3, %xmm0
846; SSE2-NEXT:    retq
847;
848; SSE41-LABEL: min_lt_v2i64:
849; SSE41:       # %bb.0:
850; SSE41-NEXT:    movdqa %xmm0, %xmm2
851; SSE41-NEXT:    movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456]
852; SSE41-NEXT:    pxor %xmm3, %xmm0
853; SSE41-NEXT:    pxor %xmm1, %xmm3
854; SSE41-NEXT:    movdqa %xmm3, %xmm4
855; SSE41-NEXT:    pcmpeqd %xmm0, %xmm4
856; SSE41-NEXT:    pcmpgtd %xmm0, %xmm3
857; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,0,2,2]
858; SSE41-NEXT:    pand %xmm4, %xmm0
859; SSE41-NEXT:    por %xmm3, %xmm0
860; SSE41-NEXT:    blendvpd %xmm0, %xmm2, %xmm1
861; SSE41-NEXT:    movapd %xmm1, %xmm0
862; SSE41-NEXT:    retq
863;
864; SSE42-LABEL: min_lt_v2i64:
865; SSE42:       # %bb.0:
866; SSE42-NEXT:    movdqa %xmm0, %xmm2
867; SSE42-NEXT:    movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808]
868; SSE42-NEXT:    movdqa %xmm2, %xmm3
869; SSE42-NEXT:    pxor %xmm0, %xmm3
870; SSE42-NEXT:    pxor %xmm1, %xmm0
871; SSE42-NEXT:    pcmpgtq %xmm3, %xmm0
872; SSE42-NEXT:    blendvpd %xmm0, %xmm2, %xmm1
873; SSE42-NEXT:    movapd %xmm1, %xmm0
874; SSE42-NEXT:    retq
875;
876; AVX1-LABEL: min_lt_v2i64:
877; AVX1:       # %bb.0:
878; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
879; AVX1-NEXT:    vpxor %xmm2, %xmm0, %xmm3
880; AVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm2
881; AVX1-NEXT:    vpcmpgtq %xmm3, %xmm2, %xmm2
882; AVX1-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
883; AVX1-NEXT:    retq
884;
885; AVX2-LABEL: min_lt_v2i64:
886; AVX2:       # %bb.0:
887; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
888; AVX2-NEXT:    vpxor %xmm2, %xmm0, %xmm3
889; AVX2-NEXT:    vpxor %xmm2, %xmm1, %xmm2
890; AVX2-NEXT:    vpcmpgtq %xmm3, %xmm2, %xmm2
891; AVX2-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
892; AVX2-NEXT:    retq
893;
894; AVX512-LABEL: min_lt_v2i64:
895; AVX512:       # %bb.0:
896; AVX512-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
897; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
898; AVX512-NEXT:    vpminuq %zmm1, %zmm0, %zmm0
899; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
900; AVX512-NEXT:    vzeroupper
901; AVX512-NEXT:    retq
902  %1 = icmp ult <2 x i64> %a, %b
903  %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b
904  ret <2 x i64> %2
905}
906
907define <4 x i64> @min_lt_v4i64(<4 x i64> %a, <4 x i64> %b) {
908; SSE2-LABEL: min_lt_v4i64:
909; SSE2:       # %bb.0:
910; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456]
911; SSE2-NEXT:    movdqa %xmm0, %xmm5
912; SSE2-NEXT:    pxor %xmm4, %xmm5
913; SSE2-NEXT:    movdqa %xmm2, %xmm6
914; SSE2-NEXT:    pxor %xmm4, %xmm6
915; SSE2-NEXT:    movdqa %xmm6, %xmm7
916; SSE2-NEXT:    pcmpgtd %xmm5, %xmm7
917; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2]
918; SSE2-NEXT:    pcmpeqd %xmm5, %xmm6
919; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
920; SSE2-NEXT:    pand %xmm8, %xmm5
921; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
922; SSE2-NEXT:    por %xmm5, %xmm6
923; SSE2-NEXT:    pand %xmm6, %xmm0
924; SSE2-NEXT:    pandn %xmm2, %xmm6
925; SSE2-NEXT:    por %xmm6, %xmm0
926; SSE2-NEXT:    movdqa %xmm1, %xmm2
927; SSE2-NEXT:    pxor %xmm4, %xmm2
928; SSE2-NEXT:    pxor %xmm3, %xmm4
929; SSE2-NEXT:    movdqa %xmm4, %xmm5
930; SSE2-NEXT:    pcmpgtd %xmm2, %xmm5
931; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
932; SSE2-NEXT:    pcmpeqd %xmm2, %xmm4
933; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
934; SSE2-NEXT:    pand %xmm6, %xmm2
935; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
936; SSE2-NEXT:    por %xmm2, %xmm4
937; SSE2-NEXT:    pand %xmm4, %xmm1
938; SSE2-NEXT:    pandn %xmm3, %xmm4
939; SSE2-NEXT:    por %xmm4, %xmm1
940; SSE2-NEXT:    retq
941;
942; SSE41-LABEL: min_lt_v4i64:
943; SSE41:       # %bb.0:
944; SSE41-NEXT:    movdqa %xmm0, %xmm4
945; SSE41-NEXT:    movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456]
946; SSE41-NEXT:    pxor %xmm5, %xmm0
947; SSE41-NEXT:    movdqa %xmm2, %xmm6
948; SSE41-NEXT:    pxor %xmm5, %xmm6
949; SSE41-NEXT:    movdqa %xmm6, %xmm7
950; SSE41-NEXT:    pcmpeqd %xmm0, %xmm7
951; SSE41-NEXT:    pcmpgtd %xmm0, %xmm6
952; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[0,0,2,2]
953; SSE41-NEXT:    pand %xmm7, %xmm0
954; SSE41-NEXT:    por %xmm6, %xmm0
955; SSE41-NEXT:    blendvpd %xmm0, %xmm4, %xmm2
956; SSE41-NEXT:    movdqa %xmm1, %xmm0
957; SSE41-NEXT:    pxor %xmm5, %xmm0
958; SSE41-NEXT:    pxor %xmm3, %xmm5
959; SSE41-NEXT:    movdqa %xmm5, %xmm4
960; SSE41-NEXT:    pcmpeqd %xmm0, %xmm4
961; SSE41-NEXT:    pcmpgtd %xmm0, %xmm5
962; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2]
963; SSE41-NEXT:    pand %xmm4, %xmm0
964; SSE41-NEXT:    por %xmm5, %xmm0
965; SSE41-NEXT:    blendvpd %xmm0, %xmm1, %xmm3
966; SSE41-NEXT:    movapd %xmm2, %xmm0
967; SSE41-NEXT:    movapd %xmm3, %xmm1
968; SSE41-NEXT:    retq
969;
970; SSE42-LABEL: min_lt_v4i64:
971; SSE42:       # %bb.0:
972; SSE42-NEXT:    movdqa %xmm0, %xmm4
973; SSE42-NEXT:    movdqa {{.*#+}} xmm5 = [9223372036854775808,9223372036854775808]
974; SSE42-NEXT:    movdqa %xmm0, %xmm6
975; SSE42-NEXT:    pxor %xmm5, %xmm6
976; SSE42-NEXT:    movdqa %xmm2, %xmm0
977; SSE42-NEXT:    pxor %xmm5, %xmm0
978; SSE42-NEXT:    pcmpgtq %xmm6, %xmm0
979; SSE42-NEXT:    blendvpd %xmm0, %xmm4, %xmm2
980; SSE42-NEXT:    movdqa %xmm1, %xmm0
981; SSE42-NEXT:    pxor %xmm5, %xmm0
982; SSE42-NEXT:    pxor %xmm3, %xmm5
983; SSE42-NEXT:    pcmpgtq %xmm0, %xmm5
984; SSE42-NEXT:    movdqa %xmm5, %xmm0
985; SSE42-NEXT:    blendvpd %xmm0, %xmm1, %xmm3
986; SSE42-NEXT:    movapd %xmm2, %xmm0
987; SSE42-NEXT:    movapd %xmm3, %xmm1
988; SSE42-NEXT:    retq
989;
990; AVX1-LABEL: min_lt_v4i64:
991; AVX1:       # %bb.0:
992; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
993; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
994; AVX1-NEXT:    vpxor %xmm3, %xmm2, %xmm4
995; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm5
996; AVX1-NEXT:    vpxor %xmm3, %xmm5, %xmm6
997; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm6, %xmm4
998; AVX1-NEXT:    vblendvpd %xmm4, %xmm2, %xmm5, %xmm2
999; AVX1-NEXT:    vpxor %xmm3, %xmm0, %xmm4
1000; AVX1-NEXT:    vpxor %xmm3, %xmm1, %xmm3
1001; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm3, %xmm3
1002; AVX1-NEXT:    vblendvpd %xmm3, %xmm0, %xmm1, %xmm0
1003; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1004; AVX1-NEXT:    retq
1005;
1006; AVX2-LABEL: min_lt_v4i64:
1007; AVX2:       # %bb.0:
1008; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
1009; AVX2-NEXT:    vpxor %ymm2, %ymm0, %ymm3
1010; AVX2-NEXT:    vpxor %ymm2, %ymm1, %ymm2
1011; AVX2-NEXT:    vpcmpgtq %ymm3, %ymm2, %ymm2
1012; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
1013; AVX2-NEXT:    retq
1014;
1015; AVX512-LABEL: min_lt_v4i64:
1016; AVX512:       # %bb.0:
1017; AVX512-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
1018; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
1019; AVX512-NEXT:    vpminuq %zmm1, %zmm0, %zmm0
1020; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
1021; AVX512-NEXT:    retq
1022  %1 = icmp ult <4 x i64> %a, %b
1023  %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b
1024  ret <4 x i64> %2
1025}
1026
1027define <4 x i32> @min_lt_v4i32(<4 x i32> %a, <4 x i32> %b) {
1028; SSE2-LABEL: min_lt_v4i32:
1029; SSE2:       # %bb.0:
1030; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
1031; SSE2-NEXT:    movdqa %xmm0, %xmm3
1032; SSE2-NEXT:    pxor %xmm2, %xmm3
1033; SSE2-NEXT:    pxor %xmm1, %xmm2
1034; SSE2-NEXT:    pcmpgtd %xmm3, %xmm2
1035; SSE2-NEXT:    pand %xmm2, %xmm0
1036; SSE2-NEXT:    pandn %xmm1, %xmm2
1037; SSE2-NEXT:    por %xmm2, %xmm0
1038; SSE2-NEXT:    retq
1039;
1040; SSE41-LABEL: min_lt_v4i32:
1041; SSE41:       # %bb.0:
1042; SSE41-NEXT:    pminud %xmm1, %xmm0
1043; SSE41-NEXT:    retq
1044;
1045; SSE42-LABEL: min_lt_v4i32:
1046; SSE42:       # %bb.0:
1047; SSE42-NEXT:    pminud %xmm1, %xmm0
1048; SSE42-NEXT:    retq
1049;
1050; AVX-LABEL: min_lt_v4i32:
1051; AVX:       # %bb.0:
1052; AVX-NEXT:    vpminud %xmm1, %xmm0, %xmm0
1053; AVX-NEXT:    retq
1054  %1 = icmp ult <4 x i32> %a, %b
1055  %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b
1056  ret <4 x i32> %2
1057}
1058
1059define <8 x i32> @min_lt_v8i32(<8 x i32> %a, <8 x i32> %b) {
1060; SSE2-LABEL: min_lt_v8i32:
1061; SSE2:       # %bb.0:
1062; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]
1063; SSE2-NEXT:    movdqa %xmm0, %xmm5
1064; SSE2-NEXT:    pxor %xmm4, %xmm5
1065; SSE2-NEXT:    movdqa %xmm2, %xmm6
1066; SSE2-NEXT:    pxor %xmm4, %xmm6
1067; SSE2-NEXT:    pcmpgtd %xmm5, %xmm6
1068; SSE2-NEXT:    pand %xmm6, %xmm0
1069; SSE2-NEXT:    pandn %xmm2, %xmm6
1070; SSE2-NEXT:    por %xmm6, %xmm0
1071; SSE2-NEXT:    movdqa %xmm1, %xmm2
1072; SSE2-NEXT:    pxor %xmm4, %xmm2
1073; SSE2-NEXT:    pxor %xmm3, %xmm4
1074; SSE2-NEXT:    pcmpgtd %xmm2, %xmm4
1075; SSE2-NEXT:    pand %xmm4, %xmm1
1076; SSE2-NEXT:    pandn %xmm3, %xmm4
1077; SSE2-NEXT:    por %xmm4, %xmm1
1078; SSE2-NEXT:    retq
1079;
1080; SSE41-LABEL: min_lt_v8i32:
1081; SSE41:       # %bb.0:
1082; SSE41-NEXT:    pminud %xmm2, %xmm0
1083; SSE41-NEXT:    pminud %xmm3, %xmm1
1084; SSE41-NEXT:    retq
1085;
1086; SSE42-LABEL: min_lt_v8i32:
1087; SSE42:       # %bb.0:
1088; SSE42-NEXT:    pminud %xmm2, %xmm0
1089; SSE42-NEXT:    pminud %xmm3, %xmm1
1090; SSE42-NEXT:    retq
1091;
1092; AVX1-LABEL: min_lt_v8i32:
1093; AVX1:       # %bb.0:
1094; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1095; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
1096; AVX1-NEXT:    vpminud %xmm2, %xmm3, %xmm2
1097; AVX1-NEXT:    vpminud %xmm1, %xmm0, %xmm0
1098; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1099; AVX1-NEXT:    retq
1100;
1101; AVX2-LABEL: min_lt_v8i32:
1102; AVX2:       # %bb.0:
1103; AVX2-NEXT:    vpminud %ymm1, %ymm0, %ymm0
1104; AVX2-NEXT:    retq
1105;
1106; AVX512-LABEL: min_lt_v8i32:
1107; AVX512:       # %bb.0:
1108; AVX512-NEXT:    vpminud %ymm1, %ymm0, %ymm0
1109; AVX512-NEXT:    retq
1110  %1 = icmp ult <8 x i32> %a, %b
1111  %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b
1112  ret <8 x i32> %2
1113}
1114
1115define <8 x i16> @min_lt_v8i16(<8 x i16> %a, <8 x i16> %b) {
1116; SSE2-LABEL: min_lt_v8i16:
1117; SSE2:       # %bb.0:
1118; SSE2-NEXT:    movdqa %xmm0, %xmm2
1119; SSE2-NEXT:    psubusw %xmm1, %xmm2
1120; SSE2-NEXT:    psubw %xmm2, %xmm0
1121; SSE2-NEXT:    retq
1122;
1123; SSE41-LABEL: min_lt_v8i16:
1124; SSE41:       # %bb.0:
1125; SSE41-NEXT:    pminuw %xmm1, %xmm0
1126; SSE41-NEXT:    retq
1127;
1128; SSE42-LABEL: min_lt_v8i16:
1129; SSE42:       # %bb.0:
1130; SSE42-NEXT:    pminuw %xmm1, %xmm0
1131; SSE42-NEXT:    retq
1132;
1133; AVX-LABEL: min_lt_v8i16:
1134; AVX:       # %bb.0:
1135; AVX-NEXT:    vpminuw %xmm1, %xmm0, %xmm0
1136; AVX-NEXT:    retq
1137  %1 = icmp ult <8 x i16> %a, %b
1138  %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b
1139  ret <8 x i16> %2
1140}
1141
1142define <16 x i16> @min_lt_v16i16(<16 x i16> %a, <16 x i16> %b) {
1143; SSE2-LABEL: min_lt_v16i16:
1144; SSE2:       # %bb.0:
1145; SSE2-NEXT:    movdqa %xmm0, %xmm4
1146; SSE2-NEXT:    psubusw %xmm2, %xmm4
1147; SSE2-NEXT:    psubw %xmm4, %xmm0
1148; SSE2-NEXT:    movdqa %xmm1, %xmm2
1149; SSE2-NEXT:    psubusw %xmm3, %xmm2
1150; SSE2-NEXT:    psubw %xmm2, %xmm1
1151; SSE2-NEXT:    retq
1152;
1153; SSE41-LABEL: min_lt_v16i16:
1154; SSE41:       # %bb.0:
1155; SSE41-NEXT:    pminuw %xmm2, %xmm0
1156; SSE41-NEXT:    pminuw %xmm3, %xmm1
1157; SSE41-NEXT:    retq
1158;
1159; SSE42-LABEL: min_lt_v16i16:
1160; SSE42:       # %bb.0:
1161; SSE42-NEXT:    pminuw %xmm2, %xmm0
1162; SSE42-NEXT:    pminuw %xmm3, %xmm1
1163; SSE42-NEXT:    retq
1164;
1165; AVX1-LABEL: min_lt_v16i16:
1166; AVX1:       # %bb.0:
1167; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1168; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
1169; AVX1-NEXT:    vpminuw %xmm2, %xmm3, %xmm2
1170; AVX1-NEXT:    vpminuw %xmm1, %xmm0, %xmm0
1171; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1172; AVX1-NEXT:    retq
1173;
1174; AVX2-LABEL: min_lt_v16i16:
1175; AVX2:       # %bb.0:
1176; AVX2-NEXT:    vpminuw %ymm1, %ymm0, %ymm0
1177; AVX2-NEXT:    retq
1178;
1179; AVX512-LABEL: min_lt_v16i16:
1180; AVX512:       # %bb.0:
1181; AVX512-NEXT:    vpminuw %ymm1, %ymm0, %ymm0
1182; AVX512-NEXT:    retq
1183  %1 = icmp ult <16 x i16> %a, %b
1184  %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b
1185  ret <16 x i16> %2
1186}
1187
1188define <16 x i8> @min_lt_v16i8(<16 x i8> %a, <16 x i8> %b) {
1189; SSE-LABEL: min_lt_v16i8:
1190; SSE:       # %bb.0:
1191; SSE-NEXT:    pminub %xmm1, %xmm0
1192; SSE-NEXT:    retq
1193;
1194; AVX-LABEL: min_lt_v16i8:
1195; AVX:       # %bb.0:
1196; AVX-NEXT:    vpminub %xmm1, %xmm0, %xmm0
1197; AVX-NEXT:    retq
1198  %1 = icmp ult <16 x i8> %a, %b
1199  %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b
1200  ret <16 x i8> %2
1201}
1202
1203define <32 x i8> @min_lt_v32i8(<32 x i8> %a, <32 x i8> %b) {
1204; SSE-LABEL: min_lt_v32i8:
1205; SSE:       # %bb.0:
1206; SSE-NEXT:    pminub %xmm2, %xmm0
1207; SSE-NEXT:    pminub %xmm3, %xmm1
1208; SSE-NEXT:    retq
1209;
1210; AVX1-LABEL: min_lt_v32i8:
1211; AVX1:       # %bb.0:
1212; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1213; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
1214; AVX1-NEXT:    vpminub %xmm2, %xmm3, %xmm2
1215; AVX1-NEXT:    vpminub %xmm1, %xmm0, %xmm0
1216; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1217; AVX1-NEXT:    retq
1218;
1219; AVX2-LABEL: min_lt_v32i8:
1220; AVX2:       # %bb.0:
1221; AVX2-NEXT:    vpminub %ymm1, %ymm0, %ymm0
1222; AVX2-NEXT:    retq
1223;
1224; AVX512-LABEL: min_lt_v32i8:
1225; AVX512:       # %bb.0:
1226; AVX512-NEXT:    vpminub %ymm1, %ymm0, %ymm0
1227; AVX512-NEXT:    retq
1228  %1 = icmp ult <32 x i8> %a, %b
1229  %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b
1230  ret <32 x i8> %2
1231}
1232
1233;
1234; Unsigned Minimum (LE)
1235;
1236
1237define <2 x i64> @min_le_v2i64(<2 x i64> %a, <2 x i64> %b) {
1238; SSE2-LABEL: min_le_v2i64:
1239; SSE2:       # %bb.0:
1240; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [9223372039002259456,9223372039002259456]
1241; SSE2-NEXT:    movdqa %xmm0, %xmm3
1242; SSE2-NEXT:    pxor %xmm2, %xmm3
1243; SSE2-NEXT:    pxor %xmm1, %xmm2
1244; SSE2-NEXT:    movdqa %xmm2, %xmm4
1245; SSE2-NEXT:    pcmpgtd %xmm3, %xmm4
1246; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm4[0,0,2,2]
1247; SSE2-NEXT:    pcmpeqd %xmm3, %xmm2
1248; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm2[1,1,3,3]
1249; SSE2-NEXT:    pand %xmm5, %xmm2
1250; SSE2-NEXT:    pshufd {{.*#+}} xmm3 = xmm4[1,1,3,3]
1251; SSE2-NEXT:    por %xmm2, %xmm3
1252; SSE2-NEXT:    pand %xmm3, %xmm0
1253; SSE2-NEXT:    pandn %xmm1, %xmm3
1254; SSE2-NEXT:    por %xmm3, %xmm0
1255; SSE2-NEXT:    retq
1256;
1257; SSE41-LABEL: min_le_v2i64:
1258; SSE41:       # %bb.0:
1259; SSE41-NEXT:    movdqa %xmm0, %xmm2
1260; SSE41-NEXT:    movdqa {{.*#+}} xmm3 = [9223372039002259456,9223372039002259456]
1261; SSE41-NEXT:    pxor %xmm3, %xmm0
1262; SSE41-NEXT:    pxor %xmm1, %xmm3
1263; SSE41-NEXT:    movdqa %xmm3, %xmm4
1264; SSE41-NEXT:    pcmpeqd %xmm0, %xmm4
1265; SSE41-NEXT:    pcmpgtd %xmm0, %xmm3
1266; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm3[0,0,2,2]
1267; SSE41-NEXT:    pand %xmm4, %xmm0
1268; SSE41-NEXT:    por %xmm3, %xmm0
1269; SSE41-NEXT:    blendvpd %xmm0, %xmm2, %xmm1
1270; SSE41-NEXT:    movapd %xmm1, %xmm0
1271; SSE41-NEXT:    retq
1272;
1273; SSE42-LABEL: min_le_v2i64:
1274; SSE42:       # %bb.0:
1275; SSE42-NEXT:    movdqa %xmm0, %xmm2
1276; SSE42-NEXT:    movdqa {{.*#+}} xmm0 = [9223372036854775808,9223372036854775808]
1277; SSE42-NEXT:    movdqa %xmm2, %xmm3
1278; SSE42-NEXT:    pxor %xmm0, %xmm3
1279; SSE42-NEXT:    pxor %xmm1, %xmm0
1280; SSE42-NEXT:    pcmpgtq %xmm3, %xmm0
1281; SSE42-NEXT:    blendvpd %xmm0, %xmm2, %xmm1
1282; SSE42-NEXT:    movapd %xmm1, %xmm0
1283; SSE42-NEXT:    retq
1284;
1285; AVX1-LABEL: min_le_v2i64:
1286; AVX1:       # %bb.0:
1287; AVX1-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
1288; AVX1-NEXT:    vpxor %xmm2, %xmm0, %xmm3
1289; AVX1-NEXT:    vpxor %xmm2, %xmm1, %xmm2
1290; AVX1-NEXT:    vpcmpgtq %xmm3, %xmm2, %xmm2
1291; AVX1-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
1292; AVX1-NEXT:    retq
1293;
1294; AVX2-LABEL: min_le_v2i64:
1295; AVX2:       # %bb.0:
1296; AVX2-NEXT:    vmovdqa {{.*#+}} xmm2 = [9223372036854775808,9223372036854775808]
1297; AVX2-NEXT:    vpxor %xmm2, %xmm0, %xmm3
1298; AVX2-NEXT:    vpxor %xmm2, %xmm1, %xmm2
1299; AVX2-NEXT:    vpcmpgtq %xmm3, %xmm2, %xmm2
1300; AVX2-NEXT:    vblendvpd %xmm2, %xmm0, %xmm1, %xmm0
1301; AVX2-NEXT:    retq
1302;
1303; AVX512-LABEL: min_le_v2i64:
1304; AVX512:       # %bb.0:
1305; AVX512-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
1306; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 def $zmm0
1307; AVX512-NEXT:    vpminuq %zmm1, %zmm0, %zmm0
1308; AVX512-NEXT:    # kill: def $xmm0 killed $xmm0 killed $zmm0
1309; AVX512-NEXT:    vzeroupper
1310; AVX512-NEXT:    retq
1311  %1 = icmp ule <2 x i64> %a, %b
1312  %2 = select <2 x i1> %1, <2 x i64> %a, <2 x i64> %b
1313  ret <2 x i64> %2
1314}
1315
1316define <4 x i64> @min_le_v4i64(<4 x i64> %a, <4 x i64> %b) {
1317; SSE2-LABEL: min_le_v4i64:
1318; SSE2:       # %bb.0:
1319; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [9223372039002259456,9223372039002259456]
1320; SSE2-NEXT:    movdqa %xmm0, %xmm5
1321; SSE2-NEXT:    pxor %xmm4, %xmm5
1322; SSE2-NEXT:    movdqa %xmm2, %xmm6
1323; SSE2-NEXT:    pxor %xmm4, %xmm6
1324; SSE2-NEXT:    movdqa %xmm6, %xmm7
1325; SSE2-NEXT:    pcmpgtd %xmm5, %xmm7
1326; SSE2-NEXT:    pshufd {{.*#+}} xmm8 = xmm7[0,0,2,2]
1327; SSE2-NEXT:    pcmpeqd %xmm5, %xmm6
1328; SSE2-NEXT:    pshufd {{.*#+}} xmm5 = xmm6[1,1,3,3]
1329; SSE2-NEXT:    pand %xmm8, %xmm5
1330; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm7[1,1,3,3]
1331; SSE2-NEXT:    por %xmm5, %xmm6
1332; SSE2-NEXT:    pand %xmm6, %xmm0
1333; SSE2-NEXT:    pandn %xmm2, %xmm6
1334; SSE2-NEXT:    por %xmm6, %xmm0
1335; SSE2-NEXT:    movdqa %xmm1, %xmm2
1336; SSE2-NEXT:    pxor %xmm4, %xmm2
1337; SSE2-NEXT:    pxor %xmm3, %xmm4
1338; SSE2-NEXT:    movdqa %xmm4, %xmm5
1339; SSE2-NEXT:    pcmpgtd %xmm2, %xmm5
1340; SSE2-NEXT:    pshufd {{.*#+}} xmm6 = xmm5[0,0,2,2]
1341; SSE2-NEXT:    pcmpeqd %xmm2, %xmm4
1342; SSE2-NEXT:    pshufd {{.*#+}} xmm2 = xmm4[1,1,3,3]
1343; SSE2-NEXT:    pand %xmm6, %xmm2
1344; SSE2-NEXT:    pshufd {{.*#+}} xmm4 = xmm5[1,1,3,3]
1345; SSE2-NEXT:    por %xmm2, %xmm4
1346; SSE2-NEXT:    pand %xmm4, %xmm1
1347; SSE2-NEXT:    pandn %xmm3, %xmm4
1348; SSE2-NEXT:    por %xmm4, %xmm1
1349; SSE2-NEXT:    retq
1350;
1351; SSE41-LABEL: min_le_v4i64:
1352; SSE41:       # %bb.0:
1353; SSE41-NEXT:    movdqa %xmm0, %xmm4
1354; SSE41-NEXT:    movdqa {{.*#+}} xmm5 = [9223372039002259456,9223372039002259456]
1355; SSE41-NEXT:    pxor %xmm5, %xmm0
1356; SSE41-NEXT:    movdqa %xmm2, %xmm6
1357; SSE41-NEXT:    pxor %xmm5, %xmm6
1358; SSE41-NEXT:    movdqa %xmm6, %xmm7
1359; SSE41-NEXT:    pcmpeqd %xmm0, %xmm7
1360; SSE41-NEXT:    pcmpgtd %xmm0, %xmm6
1361; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm6[0,0,2,2]
1362; SSE41-NEXT:    pand %xmm7, %xmm0
1363; SSE41-NEXT:    por %xmm6, %xmm0
1364; SSE41-NEXT:    blendvpd %xmm0, %xmm4, %xmm2
1365; SSE41-NEXT:    movdqa %xmm1, %xmm0
1366; SSE41-NEXT:    pxor %xmm5, %xmm0
1367; SSE41-NEXT:    pxor %xmm3, %xmm5
1368; SSE41-NEXT:    movdqa %xmm5, %xmm4
1369; SSE41-NEXT:    pcmpeqd %xmm0, %xmm4
1370; SSE41-NEXT:    pcmpgtd %xmm0, %xmm5
1371; SSE41-NEXT:    pshufd {{.*#+}} xmm0 = xmm5[0,0,2,2]
1372; SSE41-NEXT:    pand %xmm4, %xmm0
1373; SSE41-NEXT:    por %xmm5, %xmm0
1374; SSE41-NEXT:    blendvpd %xmm0, %xmm1, %xmm3
1375; SSE41-NEXT:    movapd %xmm2, %xmm0
1376; SSE41-NEXT:    movapd %xmm3, %xmm1
1377; SSE41-NEXT:    retq
1378;
1379; SSE42-LABEL: min_le_v4i64:
1380; SSE42:       # %bb.0:
1381; SSE42-NEXT:    movdqa %xmm0, %xmm4
1382; SSE42-NEXT:    movdqa {{.*#+}} xmm5 = [9223372036854775808,9223372036854775808]
1383; SSE42-NEXT:    movdqa %xmm0, %xmm6
1384; SSE42-NEXT:    pxor %xmm5, %xmm6
1385; SSE42-NEXT:    movdqa %xmm2, %xmm0
1386; SSE42-NEXT:    pxor %xmm5, %xmm0
1387; SSE42-NEXT:    pcmpgtq %xmm6, %xmm0
1388; SSE42-NEXT:    blendvpd %xmm0, %xmm4, %xmm2
1389; SSE42-NEXT:    movdqa %xmm1, %xmm0
1390; SSE42-NEXT:    pxor %xmm5, %xmm0
1391; SSE42-NEXT:    pxor %xmm3, %xmm5
1392; SSE42-NEXT:    pcmpgtq %xmm0, %xmm5
1393; SSE42-NEXT:    movdqa %xmm5, %xmm0
1394; SSE42-NEXT:    blendvpd %xmm0, %xmm1, %xmm3
1395; SSE42-NEXT:    movapd %xmm2, %xmm0
1396; SSE42-NEXT:    movapd %xmm3, %xmm1
1397; SSE42-NEXT:    retq
1398;
1399; AVX1-LABEL: min_le_v4i64:
1400; AVX1:       # %bb.0:
1401; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm2
1402; AVX1-NEXT:    vmovdqa {{.*#+}} xmm3 = [9223372036854775808,9223372036854775808]
1403; AVX1-NEXT:    vpxor %xmm3, %xmm2, %xmm4
1404; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm5
1405; AVX1-NEXT:    vpxor %xmm3, %xmm5, %xmm6
1406; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm6, %xmm4
1407; AVX1-NEXT:    vblendvpd %xmm4, %xmm2, %xmm5, %xmm2
1408; AVX1-NEXT:    vpxor %xmm3, %xmm0, %xmm4
1409; AVX1-NEXT:    vpxor %xmm3, %xmm1, %xmm3
1410; AVX1-NEXT:    vpcmpgtq %xmm4, %xmm3, %xmm3
1411; AVX1-NEXT:    vblendvpd %xmm3, %xmm0, %xmm1, %xmm0
1412; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1413; AVX1-NEXT:    retq
1414;
1415; AVX2-LABEL: min_le_v4i64:
1416; AVX2:       # %bb.0:
1417; AVX2-NEXT:    vpbroadcastq {{.*#+}} ymm2 = [9223372036854775808,9223372036854775808,9223372036854775808,9223372036854775808]
1418; AVX2-NEXT:    vpxor %ymm2, %ymm0, %ymm3
1419; AVX2-NEXT:    vpxor %ymm2, %ymm1, %ymm2
1420; AVX2-NEXT:    vpcmpgtq %ymm3, %ymm2, %ymm2
1421; AVX2-NEXT:    vblendvpd %ymm2, %ymm0, %ymm1, %ymm0
1422; AVX2-NEXT:    retq
1423;
1424; AVX512-LABEL: min_le_v4i64:
1425; AVX512:       # %bb.0:
1426; AVX512-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
1427; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
1428; AVX512-NEXT:    vpminuq %zmm1, %zmm0, %zmm0
1429; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 killed $zmm0
1430; AVX512-NEXT:    retq
1431  %1 = icmp ule <4 x i64> %a, %b
1432  %2 = select <4 x i1> %1, <4 x i64> %a, <4 x i64> %b
1433  ret <4 x i64> %2
1434}
1435
1436define <4 x i32> @min_le_v4i32(<4 x i32> %a, <4 x i32> %b) {
1437; SSE2-LABEL: min_le_v4i32:
1438; SSE2:       # %bb.0:
1439; SSE2-NEXT:    movdqa {{.*#+}} xmm2 = [2147483648,2147483648,2147483648,2147483648]
1440; SSE2-NEXT:    movdqa %xmm0, %xmm3
1441; SSE2-NEXT:    pxor %xmm2, %xmm3
1442; SSE2-NEXT:    pxor %xmm1, %xmm2
1443; SSE2-NEXT:    pcmpgtd %xmm3, %xmm2
1444; SSE2-NEXT:    pand %xmm2, %xmm0
1445; SSE2-NEXT:    pandn %xmm1, %xmm2
1446; SSE2-NEXT:    por %xmm2, %xmm0
1447; SSE2-NEXT:    retq
1448;
1449; SSE41-LABEL: min_le_v4i32:
1450; SSE41:       # %bb.0:
1451; SSE41-NEXT:    pminud %xmm1, %xmm0
1452; SSE41-NEXT:    retq
1453;
1454; SSE42-LABEL: min_le_v4i32:
1455; SSE42:       # %bb.0:
1456; SSE42-NEXT:    pminud %xmm1, %xmm0
1457; SSE42-NEXT:    retq
1458;
1459; AVX-LABEL: min_le_v4i32:
1460; AVX:       # %bb.0:
1461; AVX-NEXT:    vpminud %xmm1, %xmm0, %xmm0
1462; AVX-NEXT:    retq
1463  %1 = icmp ule <4 x i32> %a, %b
1464  %2 = select <4 x i1> %1, <4 x i32> %a, <4 x i32> %b
1465  ret <4 x i32> %2
1466}
1467
1468define <8 x i32> @min_le_v8i32(<8 x i32> %a, <8 x i32> %b) {
1469; SSE2-LABEL: min_le_v8i32:
1470; SSE2:       # %bb.0:
1471; SSE2-NEXT:    movdqa {{.*#+}} xmm4 = [2147483648,2147483648,2147483648,2147483648]
1472; SSE2-NEXT:    movdqa %xmm0, %xmm5
1473; SSE2-NEXT:    pxor %xmm4, %xmm5
1474; SSE2-NEXT:    movdqa %xmm2, %xmm6
1475; SSE2-NEXT:    pxor %xmm4, %xmm6
1476; SSE2-NEXT:    pcmpgtd %xmm5, %xmm6
1477; SSE2-NEXT:    pand %xmm6, %xmm0
1478; SSE2-NEXT:    pandn %xmm2, %xmm6
1479; SSE2-NEXT:    por %xmm6, %xmm0
1480; SSE2-NEXT:    movdqa %xmm1, %xmm2
1481; SSE2-NEXT:    pxor %xmm4, %xmm2
1482; SSE2-NEXT:    pxor %xmm3, %xmm4
1483; SSE2-NEXT:    pcmpgtd %xmm2, %xmm4
1484; SSE2-NEXT:    pand %xmm4, %xmm1
1485; SSE2-NEXT:    pandn %xmm3, %xmm4
1486; SSE2-NEXT:    por %xmm4, %xmm1
1487; SSE2-NEXT:    retq
1488;
1489; SSE41-LABEL: min_le_v8i32:
1490; SSE41:       # %bb.0:
1491; SSE41-NEXT:    pminud %xmm2, %xmm0
1492; SSE41-NEXT:    pminud %xmm3, %xmm1
1493; SSE41-NEXT:    retq
1494;
1495; SSE42-LABEL: min_le_v8i32:
1496; SSE42:       # %bb.0:
1497; SSE42-NEXT:    pminud %xmm2, %xmm0
1498; SSE42-NEXT:    pminud %xmm3, %xmm1
1499; SSE42-NEXT:    retq
1500;
1501; AVX1-LABEL: min_le_v8i32:
1502; AVX1:       # %bb.0:
1503; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1504; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
1505; AVX1-NEXT:    vpminud %xmm2, %xmm3, %xmm2
1506; AVX1-NEXT:    vpminud %xmm1, %xmm0, %xmm0
1507; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1508; AVX1-NEXT:    retq
1509;
1510; AVX2-LABEL: min_le_v8i32:
1511; AVX2:       # %bb.0:
1512; AVX2-NEXT:    vpminud %ymm1, %ymm0, %ymm0
1513; AVX2-NEXT:    retq
1514;
1515; AVX512-LABEL: min_le_v8i32:
1516; AVX512:       # %bb.0:
1517; AVX512-NEXT:    vpminud %ymm1, %ymm0, %ymm0
1518; AVX512-NEXT:    retq
1519  %1 = icmp ule <8 x i32> %a, %b
1520  %2 = select <8 x i1> %1, <8 x i32> %a, <8 x i32> %b
1521  ret <8 x i32> %2
1522}
1523
1524define <8 x i16> @min_le_v8i16(<8 x i16> %a, <8 x i16> %b) {
1525; SSE2-LABEL: min_le_v8i16:
1526; SSE2:       # %bb.0:
1527; SSE2-NEXT:    movdqa %xmm0, %xmm2
1528; SSE2-NEXT:    psubusw %xmm1, %xmm2
1529; SSE2-NEXT:    psubw %xmm2, %xmm0
1530; SSE2-NEXT:    retq
1531;
1532; SSE41-LABEL: min_le_v8i16:
1533; SSE41:       # %bb.0:
1534; SSE41-NEXT:    pminuw %xmm1, %xmm0
1535; SSE41-NEXT:    retq
1536;
1537; SSE42-LABEL: min_le_v8i16:
1538; SSE42:       # %bb.0:
1539; SSE42-NEXT:    pminuw %xmm1, %xmm0
1540; SSE42-NEXT:    retq
1541;
1542; AVX-LABEL: min_le_v8i16:
1543; AVX:       # %bb.0:
1544; AVX-NEXT:    vpminuw %xmm1, %xmm0, %xmm0
1545; AVX-NEXT:    retq
1546  %1 = icmp ule <8 x i16> %a, %b
1547  %2 = select <8 x i1> %1, <8 x i16> %a, <8 x i16> %b
1548  ret <8 x i16> %2
1549}
1550
1551define <16 x i16> @min_le_v16i16(<16 x i16> %a, <16 x i16> %b) {
1552; SSE2-LABEL: min_le_v16i16:
1553; SSE2:       # %bb.0:
1554; SSE2-NEXT:    movdqa %xmm0, %xmm4
1555; SSE2-NEXT:    psubusw %xmm2, %xmm4
1556; SSE2-NEXT:    psubw %xmm4, %xmm0
1557; SSE2-NEXT:    movdqa %xmm1, %xmm2
1558; SSE2-NEXT:    psubusw %xmm3, %xmm2
1559; SSE2-NEXT:    psubw %xmm2, %xmm1
1560; SSE2-NEXT:    retq
1561;
1562; SSE41-LABEL: min_le_v16i16:
1563; SSE41:       # %bb.0:
1564; SSE41-NEXT:    pminuw %xmm2, %xmm0
1565; SSE41-NEXT:    pminuw %xmm3, %xmm1
1566; SSE41-NEXT:    retq
1567;
1568; SSE42-LABEL: min_le_v16i16:
1569; SSE42:       # %bb.0:
1570; SSE42-NEXT:    pminuw %xmm2, %xmm0
1571; SSE42-NEXT:    pminuw %xmm3, %xmm1
1572; SSE42-NEXT:    retq
1573;
1574; AVX1-LABEL: min_le_v16i16:
1575; AVX1:       # %bb.0:
1576; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1577; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
1578; AVX1-NEXT:    vpminuw %xmm2, %xmm3, %xmm2
1579; AVX1-NEXT:    vpminuw %xmm1, %xmm0, %xmm0
1580; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1581; AVX1-NEXT:    retq
1582;
1583; AVX2-LABEL: min_le_v16i16:
1584; AVX2:       # %bb.0:
1585; AVX2-NEXT:    vpminuw %ymm1, %ymm0, %ymm0
1586; AVX2-NEXT:    retq
1587;
1588; AVX512-LABEL: min_le_v16i16:
1589; AVX512:       # %bb.0:
1590; AVX512-NEXT:    vpminuw %ymm1, %ymm0, %ymm0
1591; AVX512-NEXT:    retq
1592  %1 = icmp ule <16 x i16> %a, %b
1593  %2 = select <16 x i1> %1, <16 x i16> %a, <16 x i16> %b
1594  ret <16 x i16> %2
1595}
1596
1597define <16 x i8> @min_le_v16i8(<16 x i8> %a, <16 x i8> %b) {
1598; SSE-LABEL: min_le_v16i8:
1599; SSE:       # %bb.0:
1600; SSE-NEXT:    pminub %xmm1, %xmm0
1601; SSE-NEXT:    retq
1602;
1603; AVX-LABEL: min_le_v16i8:
1604; AVX:       # %bb.0:
1605; AVX-NEXT:    vpminub %xmm1, %xmm0, %xmm0
1606; AVX-NEXT:    retq
1607  %1 = icmp ule <16 x i8> %a, %b
1608  %2 = select <16 x i1> %1, <16 x i8> %a, <16 x i8> %b
1609  ret <16 x i8> %2
1610}
1611
1612define <32 x i8> @min_le_v32i8(<32 x i8> %a, <32 x i8> %b) {
1613; SSE-LABEL: min_le_v32i8:
1614; SSE:       # %bb.0:
1615; SSE-NEXT:    pminub %xmm2, %xmm0
1616; SSE-NEXT:    pminub %xmm3, %xmm1
1617; SSE-NEXT:    retq
1618;
1619; AVX1-LABEL: min_le_v32i8:
1620; AVX1:       # %bb.0:
1621; AVX1-NEXT:    vextractf128 $1, %ymm1, %xmm2
1622; AVX1-NEXT:    vextractf128 $1, %ymm0, %xmm3
1623; AVX1-NEXT:    vpminub %xmm2, %xmm3, %xmm2
1624; AVX1-NEXT:    vpminub %xmm1, %xmm0, %xmm0
1625; AVX1-NEXT:    vinsertf128 $1, %xmm2, %ymm0, %ymm0
1626; AVX1-NEXT:    retq
1627;
1628; AVX2-LABEL: min_le_v32i8:
1629; AVX2:       # %bb.0:
1630; AVX2-NEXT:    vpminub %ymm1, %ymm0, %ymm0
1631; AVX2-NEXT:    retq
1632;
1633; AVX512-LABEL: min_le_v32i8:
1634; AVX512:       # %bb.0:
1635; AVX512-NEXT:    vpminub %ymm1, %ymm0, %ymm0
1636; AVX512-NEXT:    retq
1637  %1 = icmp ule <32 x i8> %a, %b
1638  %2 = select <32 x i1> %1, <32 x i8> %a, <32 x i8> %b
1639  ret <32 x i8> %2
1640}
1641
1642;
1643; Constant Folding
1644;
1645
1646define <2 x i64> @max_gt_v2i64c() {
1647; SSE-LABEL: max_gt_v2i64c:
1648; SSE:       # %bb.0:
1649; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551615,7]
1650; SSE-NEXT:    retq
1651;
1652; AVX-LABEL: max_gt_v2i64c:
1653; AVX:       # %bb.0:
1654; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551615,7]
1655; AVX-NEXT:    retq
1656  %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
1657  %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
1658  %3 = icmp ugt <2 x i64> %1, %2
1659  %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
1660  ret <2 x i64> %4
1661}
1662
1663define <4 x i64> @max_gt_v4i64c() {
1664; SSE-LABEL: max_gt_v4i64c:
1665; SSE:       # %bb.0:
1666; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,7]
1667; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
1668; SSE-NEXT:    retq
1669;
1670; AVX-LABEL: max_gt_v4i64c:
1671; AVX:       # %bb.0:
1672; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7]
1673; AVX-NEXT:    retq
1674  %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
1675  %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
1676  %3 = icmp ugt <4 x i64> %1, %2
1677  %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
1678  ret <4 x i64> %4
1679}
1680
1681define <4 x i32> @max_gt_v4i32c() {
1682; SSE-LABEL: max_gt_v4i32c:
1683; SSE:       # %bb.0:
1684; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
1685; SSE-NEXT:    retq
1686;
1687; AVX-LABEL: max_gt_v4i32c:
1688; AVX:       # %bb.0:
1689; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
1690; AVX-NEXT:    retq
1691  %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
1692  %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
1693  %3 = icmp ugt <4 x i32> %1, %2
1694  %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
1695  ret <4 x i32> %4
1696}
1697
1698define <8 x i32> @max_gt_v8i32c() {
1699; SSE-LABEL: max_gt_v8i32c:
1700; SSE:       # %bb.0:
1701; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
1702; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
1703; SSE-NEXT:    retq
1704;
1705; AVX-LABEL: max_gt_v8i32c:
1706; AVX:       # %bb.0:
1707; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7]
1708; AVX-NEXT:    retq
1709  %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
1710  %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
1711  %3 = icmp ugt <8 x i32> %1, %2
1712  %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
1713  ret <8 x i32> %4
1714}
1715
1716define <8 x i16> @max_gt_v8i16c() {
1717; SSE-LABEL: max_gt_v8i16c:
1718; SSE:       # %bb.0:
1719; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
1720; SSE-NEXT:    retq
1721;
1722; AVX-LABEL: max_gt_v8i16c:
1723; AVX:       # %bb.0:
1724; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
1725; AVX-NEXT:    retq
1726  %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
1727  %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
1728  %3 = icmp ugt <8 x i16> %1, %2
1729  %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
1730  ret <8 x i16> %4
1731}
1732
1733define <16 x i16> @max_gt_v16i16c() {
1734; SSE-LABEL: max_gt_v16i16c:
1735; SSE:       # %bb.0:
1736; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
1737; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
1738; SSE-NEXT:    retq
1739;
1740; AVX-LABEL: max_gt_v16i16c:
1741; AVX:       # %bb.0:
1742; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8]
1743; AVX-NEXT:    retq
1744  %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
1745  %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
1746  %3 = icmp ugt <16 x i16> %1, %2
1747  %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
1748  ret <16 x i16> %4
1749}
1750
1751define <16 x i8> @max_gt_v16i8c() {
1752; SSE-LABEL: max_gt_v16i8c:
1753; SSE:       # %bb.0:
1754; SSE-NEXT:    movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
1755; SSE-NEXT:    retq
1756;
1757; AVX-LABEL: max_gt_v16i8c:
1758; AVX:       # %bb.0:
1759; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
1760; AVX-NEXT:    retq
1761  %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
1762  %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
1763  %3 = icmp ugt <16 x i8> %1, %2
1764  %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
1765  ret <16 x i8> %4
1766}
1767
1768define <2 x i64> @max_ge_v2i64c() {
1769; SSE-LABEL: max_ge_v2i64c:
1770; SSE:       # %bb.0:
1771; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551615,7]
1772; SSE-NEXT:    retq
1773;
1774; AVX-LABEL: max_ge_v2i64c:
1775; AVX:       # %bb.0:
1776; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551615,7]
1777; AVX-NEXT:    retq
1778  %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
1779  %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
1780  %3 = icmp uge <2 x i64> %1, %2
1781  %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
1782  ret <2 x i64> %4
1783}
1784
1785define <4 x i64> @max_ge_v4i64c() {
1786; SSE-LABEL: max_ge_v4i64c:
1787; SSE:       # %bb.0:
1788; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,7]
1789; SSE-NEXT:    pcmpeqd %xmm0, %xmm0
1790; SSE-NEXT:    retq
1791;
1792; AVX-LABEL: max_ge_v4i64c:
1793; AVX:       # %bb.0:
1794; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7]
1795; AVX-NEXT:    retq
1796  %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
1797  %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
1798  %3 = icmp uge <4 x i64> %1, %2
1799  %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
1800  ret <4 x i64> %4
1801}
1802
1803define <4 x i32> @max_ge_v4i32c() {
1804; SSE-LABEL: max_ge_v4i32c:
1805; SSE:       # %bb.0:
1806; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
1807; SSE-NEXT:    retq
1808;
1809; AVX-LABEL: max_ge_v4i32c:
1810; AVX:       # %bb.0:
1811; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7]
1812; AVX-NEXT:    retq
1813  %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
1814  %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
1815  %3 = icmp uge <4 x i32> %1, %2
1816  %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
1817  ret <4 x i32> %4
1818}
1819
1820define <8 x i32> @max_ge_v8i32c() {
1821; SSE-LABEL: max_ge_v8i32c:
1822; SSE:       # %bb.0:
1823; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295]
1824; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,5,5,7]
1825; SSE-NEXT:    retq
1826;
1827; AVX-LABEL: max_ge_v8i32c:
1828; AVX:       # %bb.0:
1829; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7]
1830; AVX-NEXT:    retq
1831  %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
1832  %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
1833  %3 = icmp uge <8 x i32> %1, %2
1834  %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
1835  ret <8 x i32> %4
1836}
1837
1838define <8 x i16> @max_ge_v8i16c() {
1839; SSE-LABEL: max_ge_v8i16c:
1840; SSE:       # %bb.0:
1841; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
1842; SSE-NEXT:    retq
1843;
1844; AVX-LABEL: max_ge_v8i16c:
1845; AVX:       # %bb.0:
1846; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7]
1847; AVX-NEXT:    retq
1848  %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
1849  %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
1850  %3 = icmp uge <8 x i16> %1, %2
1851  %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
1852  ret <8 x i16> %4
1853}
1854
1855define <16 x i16> @max_ge_v16i16c() {
1856; SSE-LABEL: max_ge_v16i16c:
1857; SSE:       # %bb.0:
1858; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0]
1859; SSE-NEXT:    movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8]
1860; SSE-NEXT:    retq
1861;
1862; AVX-LABEL: max_ge_v16i16c:
1863; AVX:       # %bb.0:
1864; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8]
1865; AVX-NEXT:    retq
1866  %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
1867  %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
1868  %3 = icmp uge <16 x i16> %1, %2
1869  %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
1870  ret <16 x i16> %4
1871}
1872
1873define <16 x i8> @max_ge_v16i8c() {
1874; SSE-LABEL: max_ge_v16i8c:
1875; SSE:       # %bb.0:
1876; SSE-NEXT:    movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
1877; SSE-NEXT:    retq
1878;
1879; AVX-LABEL: max_ge_v16i8c:
1880; AVX:       # %bb.0:
1881; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8]
1882; AVX-NEXT:    retq
1883  %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
1884  %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
1885  %3 = icmp uge <16 x i8> %1, %2
1886  %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
1887  ret <16 x i8> %4
1888}
1889
1890define <2 x i64> @min_lt_v2i64c() {
1891; SSE-LABEL: min_lt_v2i64c:
1892; SSE:       # %bb.0:
1893; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,1]
1894; SSE-NEXT:    retq
1895;
1896; AVX-LABEL: min_lt_v2i64c:
1897; AVX:       # %bb.0:
1898; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551609,1]
1899; AVX-NEXT:    retq
1900  %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
1901  %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
1902  %3 = icmp ult <2 x i64> %1, %2
1903  %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
1904  ret <2 x i64> %4
1905}
1906
1907define <4 x i64> @min_lt_v4i64c() {
1908; SSE-LABEL: min_lt_v4i64c:
1909; SSE:       # %bb.0:
1910; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609]
1911; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,1]
1912; SSE-NEXT:    retq
1913;
1914; AVX-LABEL: min_lt_v4i64c:
1915; AVX:       # %bb.0:
1916; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1]
1917; AVX-NEXT:    retq
1918  %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
1919  %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
1920  %3 = icmp ult <4 x i64> %1, %2
1921  %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
1922  ret <4 x i64> %4
1923}
1924
1925define <4 x i32> @min_lt_v4i32c() {
1926; SSE-LABEL: min_lt_v4i32c:
1927; SSE:       # %bb.0:
1928; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
1929; SSE-NEXT:    retq
1930;
1931; AVX-LABEL: min_lt_v4i32c:
1932; AVX:       # %bb.0:
1933; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
1934; AVX-NEXT:    retq
1935  %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
1936  %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
1937  %3 = icmp ult <4 x i32> %1, %2
1938  %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
1939  ret <4 x i32> %4
1940}
1941
1942define <8 x i32> @min_lt_v8i32c() {
1943; SSE-LABEL: min_lt_v8i32c:
1944; SSE:       # %bb.0:
1945; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
1946; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
1947; SSE-NEXT:    retq
1948;
1949; AVX-LABEL: min_lt_v8i32c:
1950; AVX:       # %bb.0:
1951; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1]
1952; AVX-NEXT:    retq
1953  %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
1954  %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
1955  %3 = icmp ult <8 x i32> %1, %2
1956  %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
1957  ret <8 x i32> %4
1958}
1959
1960define <8 x i16> @min_lt_v8i16c() {
1961; SSE-LABEL: min_lt_v8i16c:
1962; SSE:       # %bb.0:
1963; SSE-NEXT:    movaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
1964; SSE-NEXT:    retq
1965;
1966; AVX-LABEL: min_lt_v8i16c:
1967; AVX:       # %bb.0:
1968; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [1,65531,65531,65529,1,3,3,1]
1969; AVX-NEXT:    retq
1970  %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
1971  %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16  1, i32 0
1972  %3 = icmp ult <8 x i16> %1, %2
1973  %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
1974  ret <8 x i16> %4
1975}
1976
1977define <16 x i16> @min_lt_v16i16c() {
1978; SSE-LABEL: min_lt_v16i16c:
1979; SSE:       # %bb.0:
1980; SSE-NEXT:    movaps {{.*#+}} xmm0 = [1,65530,65531,65532,65531,65530,65529,0]
1981; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
1982; SSE-NEXT:    retq
1983;
1984; AVX-LABEL: min_lt_v16i16c:
1985; AVX:       # %bb.0:
1986; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [1,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0]
1987; AVX-NEXT:    retq
1988  %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
1989  %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16  1, i32 0
1990  %3 = icmp ult <16 x i16> %1, %2
1991  %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
1992  ret <16 x i16> %4
1993}
1994
1995define <16 x i8> @min_lt_v16i8c() {
1996; SSE-LABEL: min_lt_v16i8c:
1997; SSE:       # %bb.0:
1998; SSE-NEXT:    movaps {{.*#+}} xmm0 = [1,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
1999; SSE-NEXT:    retq
2000;
2001; AVX-LABEL: min_lt_v16i8c:
2002; AVX:       # %bb.0:
2003; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [1,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
2004; AVX-NEXT:    retq
2005  %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
2006  %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8  1, i32 0
2007  %3 = icmp ult <16 x i8> %1, %2
2008  %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
2009  ret <16 x i8> %4
2010}
2011
2012define <2 x i64> @min_le_v2i64c() {
2013; SSE-LABEL: min_le_v2i64c:
2014; SSE:       # %bb.0:
2015; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,1]
2016; SSE-NEXT:    retq
2017;
2018; AVX-LABEL: min_le_v2i64c:
2019; AVX:       # %bb.0:
2020; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [18446744073709551609,1]
2021; AVX-NEXT:    retq
2022  %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0
2023  %2 = insertelement <2 x i64> <i64 -1, i64 1>, i64 -1, i32 0
2024  %3 = icmp ule <2 x i64> %1, %2
2025  %4 = select <2 x i1> %3, <2 x i64> %1, <2 x i64> %2
2026  ret <2 x i64> %4
2027}
2028
2029define <4 x i64> @min_le_v4i64c() {
2030; SSE-LABEL: min_le_v4i64c:
2031; SSE:       # %bb.0:
2032; SSE-NEXT:    movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609]
2033; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,1]
2034; SSE-NEXT:    retq
2035;
2036; AVX-LABEL: min_le_v4i64c:
2037; AVX:       # %bb.0:
2038; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1]
2039; AVX-NEXT:    retq
2040  %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0
2041  %2 = insertelement <4 x i64> <i64 -1, i64 -7, i64 7, i64 1>, i64 -1, i32 0
2042  %3 = icmp ule <4 x i64> %1, %2
2043  %4 = select <4 x i1> %3, <4 x i64> %1, <4 x i64> %2
2044  ret <4 x i64> %4
2045}
2046
2047define <4 x i32> @min_le_v4i32c() {
2048; SSE-LABEL: min_le_v4i32c:
2049; SSE:       # %bb.0:
2050; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
2051; SSE-NEXT:    retq
2052;
2053; AVX-LABEL: min_le_v4i32c:
2054; AVX:       # %bb.0:
2055; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1]
2056; AVX-NEXT:    retq
2057  %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0
2058  %2 = insertelement <4 x i32> <i32 -1, i32 -7, i32 7, i32 1>, i32 -1, i32 0
2059  %3 = icmp ule <4 x i32> %1, %2
2060  %4 = select <4 x i1> %3, <4 x i32> %1, <4 x i32> %2
2061  ret <4 x i32> %4
2062}
2063
2064define <8 x i32> @min_le_v8i32c() {
2065; SSE-LABEL: min_le_v8i32c:
2066; SSE:       # %bb.0:
2067; SSE-NEXT:    movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289]
2068; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,3,3,1]
2069; SSE-NEXT:    retq
2070;
2071; AVX-LABEL: min_le_v8i32c:
2072; AVX:       # %bb.0:
2073; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1]
2074; AVX-NEXT:    retq
2075  %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0
2076  %2 = insertelement <8 x i32> <i32 -1, i32 -3, i32 -5, i32 -7, i32 7, i32 5, i32 3, i32 1>, i32 -1, i32 0
2077  %3 = icmp ule <8 x i32> %1, %2
2078  %4 = select <8 x i1> %3, <8 x i32> %1, <8 x i32> %2
2079  ret <8 x i32> %4
2080}
2081
2082define <8 x i16> @min_le_v8i16c() {
2083; SSE-LABEL: min_le_v8i16c:
2084; SSE:       # %bb.0:
2085; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
2086; SSE-NEXT:    retq
2087;
2088; AVX-LABEL: min_le_v8i16c:
2089; AVX:       # %bb.0:
2090; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1]
2091; AVX-NEXT:    retq
2092  %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0
2093  %2 = insertelement <8 x i16> <i16 -1, i16 -3, i16 -5, i16 -7, i16 7, i16 5, i16 3, i16 1>, i16 -1, i32 0
2094  %3 = icmp ule <8 x i16> %1, %2
2095  %4 = select <8 x i1> %3, <8 x i16> %1, <8 x i16> %2
2096  ret <8 x i16> %4
2097}
2098
2099define <16 x i16> @min_le_v16i16c() {
2100; SSE-LABEL: min_le_v16i16c:
2101; SSE:       # %bb.0:
2102; SSE-NEXT:    movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0]
2103; SSE-NEXT:    movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0]
2104; SSE-NEXT:    retq
2105;
2106; AVX-LABEL: min_le_v16i16c:
2107; AVX:       # %bb.0:
2108; AVX-NEXT:    vmovaps {{.*#+}} ymm0 = [65529,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0]
2109; AVX-NEXT:    retq
2110  %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0
2111  %2 = insertelement <16 x i16> <i16 -1, i16 -2, i16 -3, i16 -4, i16 -5, i16 -6, i16 -7, i16 0, i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>, i16 -1, i32 0
2112  %3 = icmp ule <16 x i16> %1, %2
2113  %4 = select <16 x i1> %3, <16 x i16> %1, <16 x i16> %2
2114  ret <16 x i16> %4
2115}
2116
2117define <16 x i8> @min_le_v16i8c() {
2118; SSE-LABEL: min_le_v16i8c:
2119; SSE:       # %bb.0:
2120; SSE-NEXT:    movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
2121; SSE-NEXT:    retq
2122;
2123; AVX-LABEL: min_le_v16i8c:
2124; AVX:       # %bb.0:
2125; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0]
2126; AVX-NEXT:    retq
2127  %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0
2128  %2 = insertelement <16 x i8> <i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 0, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, i8 -1, i32 0
2129  %3 = icmp ule <16 x i8> %1, %2
2130  %4 = select <16 x i1> %3, <16 x i8> %1, <16 x i8> %2
2131  ret <16 x i8> %4
2132}
2133