1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE2 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=VEX --check-prefix=AVX1 4; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=VEX --check-prefix=AVX2 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512F 6; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512VL 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512DQ 8; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX512 --check-prefix=AVX512VLDQ 9; 10; 32-bit tests to make sure we're not doing anything stupid. 11; RUN: llc < %s -mtriple=i686-unknown-unknown 12; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse 13; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 14 15; 16; Signed Integer to Double 17; 18 19define <2 x double> @sitofp_2i64_to_2f64(<2 x i64> %a) { 20; SSE-LABEL: sitofp_2i64_to_2f64: 21; SSE: # BB#0: 22; SSE-NEXT: movd %xmm0, %rax 23; SSE-NEXT: cvtsi2sdq %rax, %xmm1 24; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 25; SSE-NEXT: movd %xmm0, %rax 26; SSE-NEXT: xorps %xmm0, %xmm0 27; SSE-NEXT: cvtsi2sdq %rax, %xmm0 28; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm0[0] 29; SSE-NEXT: movapd %xmm1, %xmm0 30; SSE-NEXT: retq 31; 32; VEX-LABEL: sitofp_2i64_to_2f64: 33; VEX: # BB#0: 34; VEX-NEXT: vpextrq $1, %xmm0, %rax 35; VEX-NEXT: vcvtsi2sdq %rax, %xmm1, %xmm1 36; VEX-NEXT: vmovq %xmm0, %rax 37; VEX-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm0 38; VEX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 39; VEX-NEXT: retq 40; 41; AVX512F-LABEL: sitofp_2i64_to_2f64: 42; AVX512F: # BB#0: 43; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 44; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm1, %xmm1 45; AVX512F-NEXT: vmovq %xmm0, %rax 46; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm0 47; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 48; AVX512F-NEXT: retq 49; 50; AVX512VL-LABEL: sitofp_2i64_to_2f64: 51; AVX512VL: # BB#0: 52; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 53; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm1, %xmm1 54; AVX512VL-NEXT: vmovq %xmm0, %rax 55; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm0 56; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 57; AVX512VL-NEXT: retq 58; 59; AVX512DQ-LABEL: sitofp_2i64_to_2f64: 60; AVX512DQ: # BB#0: 61; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 62; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0 63; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 64; AVX512DQ-NEXT: retq 65; 66; AVX512VLDQ-LABEL: sitofp_2i64_to_2f64: 67; AVX512VLDQ: # BB#0: 68; AVX512VLDQ-NEXT: vcvtqq2pd %xmm0, %xmm0 69; AVX512VLDQ-NEXT: retq 70 %cvt = sitofp <2 x i64> %a to <2 x double> 71 ret <2 x double> %cvt 72} 73 74define <2 x double> @sitofp_2i32_to_2f64(<4 x i32> %a) { 75; SSE-LABEL: sitofp_2i32_to_2f64: 76; SSE: # BB#0: 77; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 78; SSE-NEXT: retq 79; 80; AVX-LABEL: sitofp_2i32_to_2f64: 81; AVX: # BB#0: 82; AVX-NEXT: vcvtdq2pd %xmm0, %xmm0 83; AVX-NEXT: retq 84 %shuf = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 0, i32 1> 85 %cvt = sitofp <2 x i32> %shuf to <2 x double> 86 ret <2 x double> %cvt 87} 88 89define <2 x double> @sitofp_4i32_to_2f64(<4 x i32> %a) { 90; SSE-LABEL: sitofp_4i32_to_2f64: 91; SSE: # BB#0: 92; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 93; SSE-NEXT: retq 94; 95; VEX-LABEL: sitofp_4i32_to_2f64: 96; VEX: # BB#0: 97; VEX-NEXT: vcvtdq2pd %xmm0, %ymm0 98; VEX-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 99; VEX-NEXT: vzeroupper 100; VEX-NEXT: retq 101; 102; AVX512-LABEL: sitofp_4i32_to_2f64: 103; AVX512: # BB#0: 104; AVX512-NEXT: vcvtdq2pd %xmm0, %ymm0 105; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 106; AVX512-NEXT: retq 107 %cvt = sitofp <4 x i32> %a to <4 x double> 108 %shuf = shufflevector <4 x double> %cvt, <4 x double> undef, <2 x i32> <i32 0, i32 1> 109 ret <2 x double> %shuf 110} 111 112define <2 x double> @sitofp_2i16_to_2f64(<8 x i16> %a) { 113; SSE-LABEL: sitofp_2i16_to_2f64: 114; SSE: # BB#0: 115; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 116; SSE-NEXT: psrad $16, %xmm0 117; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 118; SSE-NEXT: retq 119; 120; AVX-LABEL: sitofp_2i16_to_2f64: 121; AVX: # BB#0: 122; AVX-NEXT: vpmovsxwd %xmm0, %xmm0 123; AVX-NEXT: vcvtdq2pd %xmm0, %xmm0 124; AVX-NEXT: retq 125 %shuf = shufflevector <8 x i16> %a, <8 x i16> undef, <2 x i32> <i32 0, i32 1> 126 %cvt = sitofp <2 x i16> %shuf to <2 x double> 127 ret <2 x double> %cvt 128} 129 130define <2 x double> @sitofp_8i16_to_2f64(<8 x i16> %a) { 131; SSE-LABEL: sitofp_8i16_to_2f64: 132; SSE: # BB#0: 133; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 134; SSE-NEXT: psrad $16, %xmm0 135; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 136; SSE-NEXT: retq 137; 138; AVX1-LABEL: sitofp_8i16_to_2f64: 139; AVX1: # BB#0: 140; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 141; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 142; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 143; AVX1-NEXT: vzeroupper 144; AVX1-NEXT: retq 145; 146; AVX2-LABEL: sitofp_8i16_to_2f64: 147; AVX2: # BB#0: 148; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 149; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 150; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 151; AVX2-NEXT: vzeroupper 152; AVX2-NEXT: retq 153; 154; AVX512-LABEL: sitofp_8i16_to_2f64: 155; AVX512: # BB#0: 156; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0 157; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0 158; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 159; AVX512-NEXT: retq 160 %cvt = sitofp <8 x i16> %a to <8 x double> 161 %shuf = shufflevector <8 x double> %cvt, <8 x double> undef, <2 x i32> <i32 0, i32 1> 162 ret <2 x double> %shuf 163} 164 165define <2 x double> @sitofp_2i8_to_2f64(<16 x i8> %a) { 166; SSE-LABEL: sitofp_2i8_to_2f64: 167; SSE: # BB#0: 168; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 169; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 170; SSE-NEXT: psrad $24, %xmm0 171; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 172; SSE-NEXT: retq 173; 174; AVX-LABEL: sitofp_2i8_to_2f64: 175; AVX: # BB#0: 176; AVX-NEXT: vpmovsxbd %xmm0, %xmm0 177; AVX-NEXT: vcvtdq2pd %xmm0, %xmm0 178; AVX-NEXT: retq 179 %shuf = shufflevector <16 x i8> %a, <16 x i8> undef, <2 x i32> <i32 0, i32 1> 180 %cvt = sitofp <2 x i8> %shuf to <2 x double> 181 ret <2 x double> %cvt 182} 183 184define <2 x double> @sitofp_16i8_to_2f64(<16 x i8> %a) { 185; SSE-LABEL: sitofp_16i8_to_2f64: 186; SSE: # BB#0: 187; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 188; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 189; SSE-NEXT: psrad $24, %xmm0 190; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 191; SSE-NEXT: retq 192; 193; AVX1-LABEL: sitofp_16i8_to_2f64: 194; AVX1: # BB#0: 195; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 196; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 197; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 198; AVX1-NEXT: vzeroupper 199; AVX1-NEXT: retq 200; 201; AVX2-LABEL: sitofp_16i8_to_2f64: 202; AVX2: # BB#0: 203; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0 204; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 205; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 206; AVX2-NEXT: vzeroupper 207; AVX2-NEXT: retq 208; 209; AVX512-LABEL: sitofp_16i8_to_2f64: 210; AVX512: # BB#0: 211; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0 212; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0 213; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 214; AVX512-NEXT: retq 215 %cvt = sitofp <16 x i8> %a to <16 x double> 216 %shuf = shufflevector <16 x double> %cvt, <16 x double> undef, <2 x i32> <i32 0, i32 1> 217 ret <2 x double> %shuf 218} 219 220define <4 x double> @sitofp_4i64_to_4f64(<4 x i64> %a) { 221; SSE-LABEL: sitofp_4i64_to_4f64: 222; SSE: # BB#0: 223; SSE-NEXT: movd %xmm0, %rax 224; SSE-NEXT: cvtsi2sdq %rax, %xmm2 225; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 226; SSE-NEXT: movd %xmm0, %rax 227; SSE-NEXT: xorps %xmm0, %xmm0 228; SSE-NEXT: cvtsi2sdq %rax, %xmm0 229; SSE-NEXT: unpcklpd {{.*#+}} xmm2 = xmm2[0],xmm0[0] 230; SSE-NEXT: movd %xmm1, %rax 231; SSE-NEXT: cvtsi2sdq %rax, %xmm3 232; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 233; SSE-NEXT: movd %xmm0, %rax 234; SSE-NEXT: xorps %xmm0, %xmm0 235; SSE-NEXT: cvtsi2sdq %rax, %xmm0 236; SSE-NEXT: unpcklpd {{.*#+}} xmm3 = xmm3[0],xmm0[0] 237; SSE-NEXT: movapd %xmm2, %xmm0 238; SSE-NEXT: movapd %xmm3, %xmm1 239; SSE-NEXT: retq 240; 241; AVX1-LABEL: sitofp_4i64_to_4f64: 242; AVX1: # BB#0: 243; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 244; AVX1-NEXT: vpextrq $1, %xmm1, %rax 245; AVX1-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm2 246; AVX1-NEXT: vmovq %xmm1, %rax 247; AVX1-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm1 248; AVX1-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 249; AVX1-NEXT: vpextrq $1, %xmm0, %rax 250; AVX1-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm2 251; AVX1-NEXT: vmovq %xmm0, %rax 252; AVX1-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm0 253; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 254; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 255; AVX1-NEXT: retq 256; 257; AVX2-LABEL: sitofp_4i64_to_4f64: 258; AVX2: # BB#0: 259; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 260; AVX2-NEXT: vpextrq $1, %xmm1, %rax 261; AVX2-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm2 262; AVX2-NEXT: vmovq %xmm1, %rax 263; AVX2-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm1 264; AVX2-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 265; AVX2-NEXT: vpextrq $1, %xmm0, %rax 266; AVX2-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm2 267; AVX2-NEXT: vmovq %xmm0, %rax 268; AVX2-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm0 269; AVX2-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 270; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 271; AVX2-NEXT: retq 272; 273; AVX512F-LABEL: sitofp_4i64_to_4f64: 274; AVX512F: # BB#0: 275; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1 276; AVX512F-NEXT: vpextrq $1, %xmm1, %rax 277; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm2 278; AVX512F-NEXT: vmovq %xmm1, %rax 279; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm1 280; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 281; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 282; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm2 283; AVX512F-NEXT: vmovq %xmm0, %rax 284; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm0 285; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 286; AVX512F-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 287; AVX512F-NEXT: retq 288; 289; AVX512VL-LABEL: sitofp_4i64_to_4f64: 290; AVX512VL: # BB#0: 291; AVX512VL-NEXT: vextracti32x4 $1, %ymm0, %xmm1 292; AVX512VL-NEXT: vpextrq $1, %xmm1, %rax 293; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm2 294; AVX512VL-NEXT: vmovq %xmm1, %rax 295; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm1 296; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 297; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 298; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm2 299; AVX512VL-NEXT: vmovq %xmm0, %rax 300; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm0 301; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 302; AVX512VL-NEXT: vinsertf32x4 $1, %xmm1, %ymm0, %ymm0 303; AVX512VL-NEXT: retq 304; 305; AVX512DQ-LABEL: sitofp_4i64_to_4f64: 306; AVX512DQ: # BB#0: 307; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 308; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0 309; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 310; AVX512DQ-NEXT: retq 311; 312; AVX512VLDQ-LABEL: sitofp_4i64_to_4f64: 313; AVX512VLDQ: # BB#0: 314; AVX512VLDQ-NEXT: vcvtqq2pd %ymm0, %ymm0 315; AVX512VLDQ-NEXT: retq 316 %cvt = sitofp <4 x i64> %a to <4 x double> 317 ret <4 x double> %cvt 318} 319 320define <4 x double> @sitofp_4i32_to_4f64(<4 x i32> %a) { 321; SSE-LABEL: sitofp_4i32_to_4f64: 322; SSE: # BB#0: 323; SSE-NEXT: cvtdq2pd %xmm0, %xmm2 324; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 325; SSE-NEXT: cvtdq2pd %xmm0, %xmm1 326; SSE-NEXT: movaps %xmm2, %xmm0 327; SSE-NEXT: retq 328; 329; AVX-LABEL: sitofp_4i32_to_4f64: 330; AVX: # BB#0: 331; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0 332; AVX-NEXT: retq 333 %cvt = sitofp <4 x i32> %a to <4 x double> 334 ret <4 x double> %cvt 335} 336 337define <4 x double> @sitofp_4i16_to_4f64(<8 x i16> %a) { 338; SSE-LABEL: sitofp_4i16_to_4f64: 339; SSE: # BB#0: 340; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 341; SSE-NEXT: psrad $16, %xmm1 342; SSE-NEXT: cvtdq2pd %xmm1, %xmm0 343; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 344; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 345; SSE-NEXT: retq 346; 347; AVX-LABEL: sitofp_4i16_to_4f64: 348; AVX: # BB#0: 349; AVX-NEXT: vpmovsxwd %xmm0, %xmm0 350; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0 351; AVX-NEXT: retq 352 %shuf = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 353 %cvt = sitofp <4 x i16> %shuf to <4 x double> 354 ret <4 x double> %cvt 355} 356 357define <4 x double> @sitofp_8i16_to_4f64(<8 x i16> %a) { 358; SSE-LABEL: sitofp_8i16_to_4f64: 359; SSE: # BB#0: 360; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 361; SSE-NEXT: psrad $16, %xmm1 362; SSE-NEXT: cvtdq2pd %xmm1, %xmm0 363; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 364; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 365; SSE-NEXT: retq 366; 367; AVX1-LABEL: sitofp_8i16_to_4f64: 368; AVX1: # BB#0: 369; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 370; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 371; AVX1-NEXT: retq 372; 373; AVX2-LABEL: sitofp_8i16_to_4f64: 374; AVX2: # BB#0: 375; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 376; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 377; AVX2-NEXT: retq 378; 379; AVX512-LABEL: sitofp_8i16_to_4f64: 380; AVX512: # BB#0: 381; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0 382; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0 383; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 384; AVX512-NEXT: retq 385 %cvt = sitofp <8 x i16> %a to <8 x double> 386 %shuf = shufflevector <8 x double> %cvt, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 387 ret <4 x double> %shuf 388} 389 390define <4 x double> @sitofp_4i8_to_4f64(<16 x i8> %a) { 391; SSE-LABEL: sitofp_4i8_to_4f64: 392; SSE: # BB#0: 393; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 394; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 395; SSE-NEXT: psrad $24, %xmm1 396; SSE-NEXT: cvtdq2pd %xmm1, %xmm0 397; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 398; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 399; SSE-NEXT: retq 400; 401; AVX-LABEL: sitofp_4i8_to_4f64: 402; AVX: # BB#0: 403; AVX-NEXT: vpmovsxbd %xmm0, %xmm0 404; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0 405; AVX-NEXT: retq 406 %shuf = shufflevector <16 x i8> %a, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 407 %cvt = sitofp <4 x i8> %shuf to <4 x double> 408 ret <4 x double> %cvt 409} 410 411define <4 x double> @sitofp_16i8_to_4f64(<16 x i8> %a) { 412; SSE-LABEL: sitofp_16i8_to_4f64: 413; SSE: # BB#0: 414; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 415; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 416; SSE-NEXT: psrad $24, %xmm1 417; SSE-NEXT: cvtdq2pd %xmm1, %xmm0 418; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 419; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 420; SSE-NEXT: retq 421; 422; AVX1-LABEL: sitofp_16i8_to_4f64: 423; AVX1: # BB#0: 424; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 425; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 426; AVX1-NEXT: retq 427; 428; AVX2-LABEL: sitofp_16i8_to_4f64: 429; AVX2: # BB#0: 430; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0 431; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 432; AVX2-NEXT: retq 433; 434; AVX512-LABEL: sitofp_16i8_to_4f64: 435; AVX512: # BB#0: 436; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0 437; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0 438; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 439; AVX512-NEXT: retq 440 %cvt = sitofp <16 x i8> %a to <16 x double> 441 %shuf = shufflevector <16 x double> %cvt, <16 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 442 ret <4 x double> %shuf 443} 444 445; 446; Unsigned Integer to Double 447; 448 449define <2 x double> @uitofp_2i64_to_2f64(<2 x i64> %a) { 450; SSE-LABEL: uitofp_2i64_to_2f64: 451; SSE: # BB#0: 452; SSE-NEXT: movdqa {{.*#+}} xmm1 = [1127219200,1160773632,0,0] 453; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm0[2,3,0,1] 454; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 455; SSE-NEXT: movapd {{.*#+}} xmm3 = [4.503600e+15,1.934281e+25] 456; SSE-NEXT: subpd %xmm3, %xmm0 457; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,0,1] 458; SSE-NEXT: addpd %xmm4, %xmm0 459; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1] 460; SSE-NEXT: subpd %xmm3, %xmm2 461; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,3,0,1] 462; SSE-NEXT: addpd %xmm2, %xmm1 463; SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 464; SSE-NEXT: retq 465; 466; VEX-LABEL: uitofp_2i64_to_2f64: 467; VEX: # BB#0: 468; VEX-NEXT: vmovdqa {{.*#+}} xmm1 = [1127219200,1160773632,0,0] 469; VEX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 470; VEX-NEXT: vmovapd {{.*#+}} xmm3 = [4.503600e+15,1.934281e+25] 471; VEX-NEXT: vsubpd %xmm3, %xmm2, %xmm2 472; VEX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 473; VEX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 474; VEX-NEXT: vsubpd %xmm3, %xmm0, %xmm0 475; VEX-NEXT: vhaddpd %xmm0, %xmm2, %xmm0 476; VEX-NEXT: retq 477; 478; AVX512F-LABEL: uitofp_2i64_to_2f64: 479; AVX512F: # BB#0: 480; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 481; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm1, %xmm1 482; AVX512F-NEXT: vmovq %xmm0, %rax 483; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm2, %xmm0 484; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 485; AVX512F-NEXT: retq 486; 487; AVX512VL-LABEL: uitofp_2i64_to_2f64: 488; AVX512VL: # BB#0: 489; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 490; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm1, %xmm1 491; AVX512VL-NEXT: vmovq %xmm0, %rax 492; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm2, %xmm0 493; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 494; AVX512VL-NEXT: retq 495; 496; AVX512DQ-LABEL: uitofp_2i64_to_2f64: 497; AVX512DQ: # BB#0: 498; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 499; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0 500; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 501; AVX512DQ-NEXT: retq 502; 503; AVX512VLDQ-LABEL: uitofp_2i64_to_2f64: 504; AVX512VLDQ: # BB#0: 505; AVX512VLDQ-NEXT: vcvtuqq2pd %xmm0, %xmm0 506; AVX512VLDQ-NEXT: retq 507 %cvt = uitofp <2 x i64> %a to <2 x double> 508 ret <2 x double> %cvt 509} 510 511define <2 x double> @uitofp_2i32_to_2f64(<4 x i32> %a) { 512; SSE-LABEL: uitofp_2i32_to_2f64: 513; SSE: # BB#0: 514; SSE-NEXT: movdqa {{.*#+}} xmm1 = [65535,0,65535,0,65535,0,65535,0] 515; SSE-NEXT: pand %xmm0, %xmm1 516; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 517; SSE-NEXT: psrld $16, %xmm0 518; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 519; SSE-NEXT: mulpd {{.*}}(%rip), %xmm0 520; SSE-NEXT: addpd %xmm1, %xmm0 521; SSE-NEXT: retq 522; 523; VEX-LABEL: uitofp_2i32_to_2f64: 524; VEX: # BB#0: 525; VEX-NEXT: vpxor %xmm1, %xmm1, %xmm1 526; VEX-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 527; VEX-NEXT: vcvtdq2pd %xmm1, %xmm1 528; VEX-NEXT: vpsrld $16, %xmm0, %xmm0 529; VEX-NEXT: vcvtdq2pd %xmm0, %xmm0 530; VEX-NEXT: vmulpd {{.*}}(%rip), %xmm0, %xmm0 531; VEX-NEXT: vaddpd %xmm1, %xmm0, %xmm0 532; VEX-NEXT: retq 533; 534; AVX512F-LABEL: uitofp_2i32_to_2f64: 535; AVX512F: # BB#0: 536; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 537; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0 538; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 539; AVX512F-NEXT: retq 540; 541; AVX512VL-LABEL: uitofp_2i32_to_2f64: 542; AVX512VL: # BB#0: 543; AVX512VL-NEXT: vcvtudq2pd %xmm0, %xmm0 544; AVX512VL-NEXT: retq 545; 546; AVX512DQ-LABEL: uitofp_2i32_to_2f64: 547; AVX512DQ: # BB#0: 548; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 549; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0 550; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 551; AVX512DQ-NEXT: retq 552; 553; AVX512VLDQ-LABEL: uitofp_2i32_to_2f64: 554; AVX512VLDQ: # BB#0: 555; AVX512VLDQ-NEXT: vcvtudq2pd %xmm0, %xmm0 556; AVX512VLDQ-NEXT: retq 557 %shuf = shufflevector <4 x i32> %a, <4 x i32> undef, <2 x i32> <i32 0, i32 1> 558 %cvt = uitofp <2 x i32> %shuf to <2 x double> 559 ret <2 x double> %cvt 560} 561 562define <2 x double> @uitofp_4i32_to_2f64(<4 x i32> %a) { 563; SSE-LABEL: uitofp_4i32_to_2f64: 564; SSE: # BB#0: 565; SSE-NEXT: movdqa {{.*#+}} xmm1 = [65535,0,65535,0,65535,0,65535,0] 566; SSE-NEXT: pand %xmm0, %xmm1 567; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 568; SSE-NEXT: psrld $16, %xmm0 569; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 570; SSE-NEXT: mulpd {{.*}}(%rip), %xmm0 571; SSE-NEXT: addpd %xmm1, %xmm0 572; SSE-NEXT: retq 573; 574; AVX1-LABEL: uitofp_4i32_to_2f64: 575; AVX1: # BB#0: 576; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 577; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 578; AVX1-NEXT: vcvtdq2pd %xmm1, %ymm1 579; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 580; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 581; AVX1-NEXT: vmulpd {{.*}}(%rip), %ymm0, %ymm0 582; AVX1-NEXT: vaddpd %ymm1, %ymm0, %ymm0 583; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 584; AVX1-NEXT: vzeroupper 585; AVX1-NEXT: retq 586; 587; AVX2-LABEL: uitofp_4i32_to_2f64: 588; AVX2: # BB#0: 589; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1 590; AVX2-NEXT: vcvtdq2pd %xmm1, %ymm1 591; AVX2-NEXT: vbroadcastsd {{.*}}(%rip), %ymm2 592; AVX2-NEXT: vmulpd %ymm2, %ymm1, %ymm1 593; AVX2-NEXT: vxorpd %xmm2, %xmm2, %xmm2 594; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 595; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 596; AVX2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 597; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 598; AVX2-NEXT: vzeroupper 599; AVX2-NEXT: retq 600; 601; AVX512F-LABEL: uitofp_4i32_to_2f64: 602; AVX512F: # BB#0: 603; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 604; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0 605; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 606; AVX512F-NEXT: retq 607; 608; AVX512VL-LABEL: uitofp_4i32_to_2f64: 609; AVX512VL: # BB#0: 610; AVX512VL-NEXT: vcvtudq2pd %xmm0, %ymm0 611; AVX512VL-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 612; AVX512VL-NEXT: retq 613; 614; AVX512DQ-LABEL: uitofp_4i32_to_2f64: 615; AVX512DQ: # BB#0: 616; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 617; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0 618; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 619; AVX512DQ-NEXT: retq 620; 621; AVX512VLDQ-LABEL: uitofp_4i32_to_2f64: 622; AVX512VLDQ: # BB#0: 623; AVX512VLDQ-NEXT: vcvtudq2pd %xmm0, %ymm0 624; AVX512VLDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 625; AVX512VLDQ-NEXT: retq 626 %cvt = uitofp <4 x i32> %a to <4 x double> 627 %shuf = shufflevector <4 x double> %cvt, <4 x double> undef, <2 x i32> <i32 0, i32 1> 628 ret <2 x double> %shuf 629} 630 631define <2 x double> @uitofp_2i16_to_2f64(<8 x i16> %a) { 632; SSE-LABEL: uitofp_2i16_to_2f64: 633; SSE: # BB#0: 634; SSE-NEXT: pxor %xmm1, %xmm1 635; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 636; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 637; SSE-NEXT: retq 638; 639; AVX-LABEL: uitofp_2i16_to_2f64: 640; AVX: # BB#0: 641; AVX-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 642; AVX-NEXT: vcvtdq2pd %xmm0, %xmm0 643; AVX-NEXT: retq 644 %shuf = shufflevector <8 x i16> %a, <8 x i16> undef, <2 x i32> <i32 0, i32 1> 645 %cvt = uitofp <2 x i16> %shuf to <2 x double> 646 ret <2 x double> %cvt 647} 648 649define <2 x double> @uitofp_8i16_to_2f64(<8 x i16> %a) { 650; SSE-LABEL: uitofp_8i16_to_2f64: 651; SSE: # BB#0: 652; SSE-NEXT: pxor %xmm1, %xmm1 653; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 654; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 655; SSE-NEXT: retq 656; 657; AVX1-LABEL: uitofp_8i16_to_2f64: 658; AVX1: # BB#0: 659; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 660; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 661; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 662; AVX1-NEXT: vzeroupper 663; AVX1-NEXT: retq 664; 665; AVX2-LABEL: uitofp_8i16_to_2f64: 666; AVX2: # BB#0: 667; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 668; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 669; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 670; AVX2-NEXT: vzeroupper 671; AVX2-NEXT: retq 672; 673; AVX512-LABEL: uitofp_8i16_to_2f64: 674; AVX512: # BB#0: 675; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 676; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0 677; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 678; AVX512-NEXT: retq 679 %cvt = uitofp <8 x i16> %a to <8 x double> 680 %shuf = shufflevector <8 x double> %cvt, <8 x double> undef, <2 x i32> <i32 0, i32 1> 681 ret <2 x double> %shuf 682} 683 684define <2 x double> @uitofp_2i8_to_2f64(<16 x i8> %a) { 685; SSE-LABEL: uitofp_2i8_to_2f64: 686; SSE: # BB#0: 687; SSE-NEXT: pxor %xmm1, %xmm1 688; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 689; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 690; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 691; SSE-NEXT: retq 692; 693; AVX-LABEL: uitofp_2i8_to_2f64: 694; AVX: # BB#0: 695; AVX-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 696; AVX-NEXT: vcvtdq2pd %xmm0, %xmm0 697; AVX-NEXT: retq 698 %shuf = shufflevector <16 x i8> %a, <16 x i8> undef, <2 x i32> <i32 0, i32 1> 699 %cvt = uitofp <2 x i8> %shuf to <2 x double> 700 ret <2 x double> %cvt 701} 702 703define <2 x double> @uitofp_16i8_to_2f64(<16 x i8> %a) { 704; SSE-LABEL: uitofp_16i8_to_2f64: 705; SSE: # BB#0: 706; SSE-NEXT: pxor %xmm1, %xmm1 707; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 708; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 709; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 710; SSE-NEXT: retq 711; 712; AVX1-LABEL: uitofp_16i8_to_2f64: 713; AVX1: # BB#0: 714; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 715; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 716; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 717; AVX1-NEXT: vzeroupper 718; AVX1-NEXT: retq 719; 720; AVX2-LABEL: uitofp_16i8_to_2f64: 721; AVX2: # BB#0: 722; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero 723; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 724; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 725; AVX2-NEXT: vzeroupper 726; AVX2-NEXT: retq 727; 728; AVX512-LABEL: uitofp_16i8_to_2f64: 729; AVX512: # BB#0: 730; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 731; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0 732; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 733; AVX512-NEXT: retq 734 %cvt = uitofp <16 x i8> %a to <16 x double> 735 %shuf = shufflevector <16 x double> %cvt, <16 x double> undef, <2 x i32> <i32 0, i32 1> 736 ret <2 x double> %shuf 737} 738 739define <4 x double> @uitofp_4i64_to_4f64(<4 x i64> %a) { 740; SSE-LABEL: uitofp_4i64_to_4f64: 741; SSE: # BB#0: 742; SSE-NEXT: movdqa {{.*#+}} xmm2 = [1127219200,1160773632,0,0] 743; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm0[2,3,0,1] 744; SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 745; SSE-NEXT: movapd {{.*#+}} xmm4 = [4.503600e+15,1.934281e+25] 746; SSE-NEXT: subpd %xmm4, %xmm0 747; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm0[2,3,0,1] 748; SSE-NEXT: addpd %xmm5, %xmm0 749; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] 750; SSE-NEXT: subpd %xmm4, %xmm3 751; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm3[2,3,0,1] 752; SSE-NEXT: addpd %xmm3, %xmm5 753; SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm5[0] 754; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] 755; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 756; SSE-NEXT: subpd %xmm4, %xmm1 757; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm1[2,3,0,1] 758; SSE-NEXT: addpd %xmm5, %xmm1 759; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] 760; SSE-NEXT: subpd %xmm4, %xmm3 761; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm3[2,3,0,1] 762; SSE-NEXT: addpd %xmm3, %xmm2 763; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 764; SSE-NEXT: retq 765; 766; AVX1-LABEL: uitofp_4i64_to_4f64: 767; AVX1: # BB#0: 768; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 769; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [1127219200,1160773632,0,0] 770; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 771; AVX1-NEXT: vmovapd {{.*#+}} xmm4 = [4.503600e+15,1.934281e+25] 772; AVX1-NEXT: vsubpd %xmm4, %xmm3, %xmm3 773; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 774; AVX1-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 775; AVX1-NEXT: vsubpd %xmm4, %xmm1, %xmm1 776; AVX1-NEXT: vhaddpd %xmm1, %xmm3, %xmm1 777; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 778; AVX1-NEXT: vsubpd %xmm4, %xmm3, %xmm3 779; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 780; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 781; AVX1-NEXT: vsubpd %xmm4, %xmm0, %xmm0 782; AVX1-NEXT: vhaddpd %xmm0, %xmm3, %xmm0 783; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 784; AVX1-NEXT: retq 785; 786; AVX2-LABEL: uitofp_4i64_to_4f64: 787; AVX2: # BB#0: 788; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 789; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [1127219200,1160773632,0,0] 790; AVX2-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 791; AVX2-NEXT: vmovapd {{.*#+}} xmm4 = [4.503600e+15,1.934281e+25] 792; AVX2-NEXT: vsubpd %xmm4, %xmm3, %xmm3 793; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 794; AVX2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 795; AVX2-NEXT: vsubpd %xmm4, %xmm1, %xmm1 796; AVX2-NEXT: vhaddpd %xmm1, %xmm3, %xmm1 797; AVX2-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 798; AVX2-NEXT: vsubpd %xmm4, %xmm3, %xmm3 799; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 800; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 801; AVX2-NEXT: vsubpd %xmm4, %xmm0, %xmm0 802; AVX2-NEXT: vhaddpd %xmm0, %xmm3, %xmm0 803; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 804; AVX2-NEXT: retq 805; 806; AVX512F-LABEL: uitofp_4i64_to_4f64: 807; AVX512F: # BB#0: 808; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1 809; AVX512F-NEXT: vpextrq $1, %xmm1, %rax 810; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm2, %xmm2 811; AVX512F-NEXT: vmovq %xmm1, %rax 812; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm1 813; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 814; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 815; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm2 816; AVX512F-NEXT: vmovq %xmm0, %rax 817; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm0 818; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 819; AVX512F-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 820; AVX512F-NEXT: retq 821; 822; AVX512VL-LABEL: uitofp_4i64_to_4f64: 823; AVX512VL: # BB#0: 824; AVX512VL-NEXT: vextracti32x4 $1, %ymm0, %xmm1 825; AVX512VL-NEXT: vpextrq $1, %xmm1, %rax 826; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm2, %xmm2 827; AVX512VL-NEXT: vmovq %xmm1, %rax 828; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm1 829; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 830; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 831; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm2 832; AVX512VL-NEXT: vmovq %xmm0, %rax 833; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm0 834; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 835; AVX512VL-NEXT: vinsertf32x4 $1, %xmm1, %ymm0, %ymm0 836; AVX512VL-NEXT: retq 837; 838; AVX512DQ-LABEL: uitofp_4i64_to_4f64: 839; AVX512DQ: # BB#0: 840; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 841; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0 842; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 843; AVX512DQ-NEXT: retq 844; 845; AVX512VLDQ-LABEL: uitofp_4i64_to_4f64: 846; AVX512VLDQ: # BB#0: 847; AVX512VLDQ-NEXT: vcvtuqq2pd %ymm0, %ymm0 848; AVX512VLDQ-NEXT: retq 849 %cvt = uitofp <4 x i64> %a to <4 x double> 850 ret <4 x double> %cvt 851} 852 853define <4 x double> @uitofp_4i32_to_4f64(<4 x i32> %a) { 854; SSE-LABEL: uitofp_4i32_to_4f64: 855; SSE: # BB#0: 856; SSE-NEXT: movdqa %xmm0, %xmm1 857; SSE-NEXT: psrld $16, %xmm1 858; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 859; SSE-NEXT: movapd {{.*#+}} xmm2 = [6.553600e+04,6.553600e+04] 860; SSE-NEXT: mulpd %xmm2, %xmm1 861; SSE-NEXT: movdqa {{.*#+}} xmm3 = [65535,0,65535,0,65535,0,65535,0] 862; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,0,1] 863; SSE-NEXT: pand %xmm3, %xmm0 864; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 865; SSE-NEXT: addpd %xmm1, %xmm0 866; SSE-NEXT: movdqa %xmm4, %xmm1 867; SSE-NEXT: psrld $16, %xmm1 868; SSE-NEXT: cvtdq2pd %xmm1, %xmm5 869; SSE-NEXT: mulpd %xmm2, %xmm5 870; SSE-NEXT: pand %xmm3, %xmm4 871; SSE-NEXT: cvtdq2pd %xmm4, %xmm1 872; SSE-NEXT: addpd %xmm5, %xmm1 873; SSE-NEXT: retq 874; 875; AVX1-LABEL: uitofp_4i32_to_4f64: 876; AVX1: # BB#0: 877; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 878; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 879; AVX1-NEXT: vcvtdq2pd %xmm1, %ymm1 880; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 881; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 882; AVX1-NEXT: vmulpd {{.*}}(%rip), %ymm0, %ymm0 883; AVX1-NEXT: vaddpd %ymm1, %ymm0, %ymm0 884; AVX1-NEXT: retq 885; 886; AVX2-LABEL: uitofp_4i32_to_4f64: 887; AVX2: # BB#0: 888; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1 889; AVX2-NEXT: vcvtdq2pd %xmm1, %ymm1 890; AVX2-NEXT: vbroadcastsd {{.*}}(%rip), %ymm2 891; AVX2-NEXT: vmulpd %ymm2, %ymm1, %ymm1 892; AVX2-NEXT: vxorpd %xmm2, %xmm2, %xmm2 893; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 894; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 895; AVX2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 896; AVX2-NEXT: retq 897; 898; AVX512F-LABEL: uitofp_4i32_to_4f64: 899; AVX512F: # BB#0: 900; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 901; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0 902; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 903; AVX512F-NEXT: retq 904; 905; AVX512VL-LABEL: uitofp_4i32_to_4f64: 906; AVX512VL: # BB#0: 907; AVX512VL-NEXT: vcvtudq2pd %xmm0, %ymm0 908; AVX512VL-NEXT: retq 909; 910; AVX512DQ-LABEL: uitofp_4i32_to_4f64: 911; AVX512DQ: # BB#0: 912; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 913; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0 914; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 915; AVX512DQ-NEXT: retq 916; 917; AVX512VLDQ-LABEL: uitofp_4i32_to_4f64: 918; AVX512VLDQ: # BB#0: 919; AVX512VLDQ-NEXT: vcvtudq2pd %xmm0, %ymm0 920; AVX512VLDQ-NEXT: retq 921 %cvt = uitofp <4 x i32> %a to <4 x double> 922 ret <4 x double> %cvt 923} 924 925define <4 x double> @uitofp_4i16_to_4f64(<8 x i16> %a) { 926; SSE-LABEL: uitofp_4i16_to_4f64: 927; SSE: # BB#0: 928; SSE-NEXT: pxor %xmm1, %xmm1 929; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 930; SSE-NEXT: cvtdq2pd %xmm0, %xmm2 931; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 932; SSE-NEXT: cvtdq2pd %xmm0, %xmm1 933; SSE-NEXT: movaps %xmm2, %xmm0 934; SSE-NEXT: retq 935; 936; AVX-LABEL: uitofp_4i16_to_4f64: 937; AVX: # BB#0: 938; AVX-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 939; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0 940; AVX-NEXT: retq 941 %shuf = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 942 %cvt = uitofp <4 x i16> %shuf to <4 x double> 943 ret <4 x double> %cvt 944} 945 946define <4 x double> @uitofp_8i16_to_4f64(<8 x i16> %a) { 947; SSE-LABEL: uitofp_8i16_to_4f64: 948; SSE: # BB#0: 949; SSE-NEXT: pxor %xmm1, %xmm1 950; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 951; SSE-NEXT: cvtdq2pd %xmm0, %xmm2 952; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 953; SSE-NEXT: cvtdq2pd %xmm0, %xmm1 954; SSE-NEXT: movaps %xmm2, %xmm0 955; SSE-NEXT: retq 956; 957; AVX1-LABEL: uitofp_8i16_to_4f64: 958; AVX1: # BB#0: 959; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 960; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 961; AVX1-NEXT: retq 962; 963; AVX2-LABEL: uitofp_8i16_to_4f64: 964; AVX2: # BB#0: 965; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 966; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 967; AVX2-NEXT: retq 968; 969; AVX512-LABEL: uitofp_8i16_to_4f64: 970; AVX512: # BB#0: 971; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 972; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0 973; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 974; AVX512-NEXT: retq 975 %cvt = uitofp <8 x i16> %a to <8 x double> 976 %shuf = shufflevector <8 x double> %cvt, <8 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 977 ret <4 x double> %shuf 978} 979 980define <4 x double> @uitofp_4i8_to_4f64(<16 x i8> %a) { 981; SSE-LABEL: uitofp_4i8_to_4f64: 982; SSE: # BB#0: 983; SSE-NEXT: pxor %xmm1, %xmm1 984; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 985; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 986; SSE-NEXT: cvtdq2pd %xmm0, %xmm2 987; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 988; SSE-NEXT: cvtdq2pd %xmm0, %xmm1 989; SSE-NEXT: movaps %xmm2, %xmm0 990; SSE-NEXT: retq 991; 992; AVX-LABEL: uitofp_4i8_to_4f64: 993; AVX: # BB#0: 994; AVX-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 995; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0 996; AVX-NEXT: retq 997 %shuf = shufflevector <16 x i8> %a, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 998 %cvt = uitofp <4 x i8> %shuf to <4 x double> 999 ret <4 x double> %cvt 1000} 1001 1002define <4 x double> @uitofp_16i8_to_4f64(<16 x i8> %a) { 1003; SSE-LABEL: uitofp_16i8_to_4f64: 1004; SSE: # BB#0: 1005; SSE-NEXT: pxor %xmm1, %xmm1 1006; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 1007; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 1008; SSE-NEXT: cvtdq2pd %xmm0, %xmm2 1009; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1010; SSE-NEXT: cvtdq2pd %xmm0, %xmm1 1011; SSE-NEXT: movaps %xmm2, %xmm0 1012; SSE-NEXT: retq 1013; 1014; AVX1-LABEL: uitofp_16i8_to_4f64: 1015; AVX1: # BB#0: 1016; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 1017; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 1018; AVX1-NEXT: retq 1019; 1020; AVX2-LABEL: uitofp_16i8_to_4f64: 1021; AVX2: # BB#0: 1022; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero 1023; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 1024; AVX2-NEXT: retq 1025; 1026; AVX512-LABEL: uitofp_16i8_to_4f64: 1027; AVX512: # BB#0: 1028; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 1029; AVX512-NEXT: vcvtdq2pd %ymm0, %zmm0 1030; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 1031; AVX512-NEXT: retq 1032 %cvt = uitofp <16 x i8> %a to <16 x double> 1033 %shuf = shufflevector <16 x double> %cvt, <16 x double> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1034 ret <4 x double> %shuf 1035} 1036 1037; 1038; Signed Integer to Float 1039; 1040 1041define <4 x float> @sitofp_2i64_to_4f32(<2 x i64> %a) { 1042; SSE-LABEL: sitofp_2i64_to_4f32: 1043; SSE: # BB#0: 1044; SSE-NEXT: movd %xmm0, %rax 1045; SSE-NEXT: cvtsi2ssq %rax, %xmm1 1046; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1047; SSE-NEXT: movd %xmm0, %rax 1048; SSE-NEXT: xorps %xmm0, %xmm0 1049; SSE-NEXT: cvtsi2ssq %rax, %xmm0 1050; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1051; SSE-NEXT: movaps %xmm1, %xmm0 1052; SSE-NEXT: retq 1053; 1054; VEX-LABEL: sitofp_2i64_to_4f32: 1055; VEX: # BB#0: 1056; VEX-NEXT: vpextrq $1, %xmm0, %rax 1057; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1058; VEX-NEXT: vmovq %xmm0, %rax 1059; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1060; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1061; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm1 1062; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1063; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1064; VEX-NEXT: retq 1065; 1066; AVX512F-LABEL: sitofp_2i64_to_4f32: 1067; AVX512F: # BB#0: 1068; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 1069; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1070; AVX512F-NEXT: vmovq %xmm0, %rax 1071; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1072; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1073; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm1 1074; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1075; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1076; AVX512F-NEXT: retq 1077; 1078; AVX512VL-LABEL: sitofp_2i64_to_4f32: 1079; AVX512VL: # BB#0: 1080; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 1081; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1082; AVX512VL-NEXT: vmovq %xmm0, %rax 1083; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1084; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1085; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm1 1086; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1087; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1088; AVX512VL-NEXT: retq 1089; 1090; AVX512DQ-LABEL: sitofp_2i64_to_4f32: 1091; AVX512DQ: # BB#0: 1092; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 1093; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 1094; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1095; AVX512DQ-NEXT: retq 1096; 1097; AVX512VLDQ-LABEL: sitofp_2i64_to_4f32: 1098; AVX512VLDQ: # BB#0: 1099; AVX512VLDQ-NEXT: vcvtqq2ps %xmm0, %xmm0 1100; AVX512VLDQ-NEXT: retq 1101 %cvt = sitofp <2 x i64> %a to <2 x float> 1102 %ext = shufflevector <2 x float> %cvt, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> 1103 ret <4 x float> %ext 1104} 1105 1106define <4 x float> @sitofp_2i64_to_4f32_zero(<2 x i64> %a) { 1107; SSE-LABEL: sitofp_2i64_to_4f32_zero: 1108; SSE: # BB#0: 1109; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1110; SSE-NEXT: movd %xmm1, %rax 1111; SSE-NEXT: xorps %xmm1, %xmm1 1112; SSE-NEXT: cvtsi2ssq %rax, %xmm1 1113; SSE-NEXT: movd %xmm0, %rax 1114; SSE-NEXT: xorps %xmm0, %xmm0 1115; SSE-NEXT: cvtsi2ssq %rax, %xmm0 1116; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1117; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero 1118; SSE-NEXT: retq 1119; 1120; VEX-LABEL: sitofp_2i64_to_4f32_zero: 1121; VEX: # BB#0: 1122; VEX-NEXT: vpextrq $1, %xmm0, %rax 1123; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1124; VEX-NEXT: vmovq %xmm0, %rax 1125; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1126; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero 1127; VEX-NEXT: retq 1128; 1129; AVX512F-LABEL: sitofp_2i64_to_4f32_zero: 1130; AVX512F: # BB#0: 1131; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 1132; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1133; AVX512F-NEXT: vmovq %xmm0, %rax 1134; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1135; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero 1136; AVX512F-NEXT: retq 1137; 1138; AVX512VL-LABEL: sitofp_2i64_to_4f32_zero: 1139; AVX512VL: # BB#0: 1140; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 1141; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1142; AVX512VL-NEXT: vmovq %xmm0, %rax 1143; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1144; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1145; AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero 1146; AVX512VL-NEXT: retq 1147; 1148; AVX512DQ-LABEL: sitofp_2i64_to_4f32_zero: 1149; AVX512DQ: # BB#0: 1150; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 1151; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 1152; AVX512DQ-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero 1153; AVX512DQ-NEXT: retq 1154; 1155; AVX512VLDQ-LABEL: sitofp_2i64_to_4f32_zero: 1156; AVX512VLDQ: # BB#0: 1157; AVX512VLDQ-NEXT: vcvtqq2ps %xmm0, %xmm0 1158; AVX512VLDQ-NEXT: retq 1159 %cvt = sitofp <2 x i64> %a to <2 x float> 1160 %ext = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1161 ret <4 x float> %ext 1162} 1163 1164define <4 x float> @sitofp_4i64_to_4f32_undef(<2 x i64> %a) { 1165; SSE-LABEL: sitofp_4i64_to_4f32_undef: 1166; SSE: # BB#0: 1167; SSE-NEXT: cvtsi2ssq %rax, %xmm2 1168; SSE-NEXT: movd %xmm0, %rax 1169; SSE-NEXT: cvtsi2ssq %rax, %xmm1 1170; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1171; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1172; SSE-NEXT: movd %xmm0, %rax 1173; SSE-NEXT: xorps %xmm0, %xmm0 1174; SSE-NEXT: cvtsi2ssq %rax, %xmm0 1175; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1176; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1] 1177; SSE-NEXT: movaps %xmm1, %xmm0 1178; SSE-NEXT: retq 1179; 1180; VEX-LABEL: sitofp_4i64_to_4f32_undef: 1181; VEX: # BB#0: 1182; VEX-NEXT: vpextrq $1, %xmm0, %rax 1183; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1184; VEX-NEXT: vmovq %xmm0, %rax 1185; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1186; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1187; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm1 1188; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1189; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1190; VEX-NEXT: retq 1191; 1192; AVX512F-LABEL: sitofp_4i64_to_4f32_undef: 1193; AVX512F: # BB#0: 1194; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 1195; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1196; AVX512F-NEXT: vmovq %xmm0, %rax 1197; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1198; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1199; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm1 1200; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1201; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1202; AVX512F-NEXT: retq 1203; 1204; AVX512VL-LABEL: sitofp_4i64_to_4f32_undef: 1205; AVX512VL: # BB#0: 1206; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 1207; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1208; AVX512VL-NEXT: vmovq %xmm0, %rax 1209; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1210; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1211; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm1 1212; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1213; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1214; AVX512VL-NEXT: retq 1215; 1216; AVX512DQ-LABEL: sitofp_4i64_to_4f32_undef: 1217; AVX512DQ: # BB#0: 1218; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 1219; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 1220; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1221; AVX512DQ-NEXT: retq 1222; 1223; AVX512VLDQ-LABEL: sitofp_4i64_to_4f32_undef: 1224; AVX512VLDQ: # BB#0: 1225; AVX512VLDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 1226; AVX512VLDQ-NEXT: vcvtqq2ps %ymm0, %xmm0 1227; AVX512VLDQ-NEXT: retq 1228 %ext = shufflevector <2 x i64> %a, <2 x i64> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> 1229 %cvt = sitofp <4 x i64> %ext to <4 x float> 1230 ret <4 x float> %cvt 1231} 1232 1233define <4 x float> @sitofp_4i32_to_4f32(<4 x i32> %a) { 1234; SSE-LABEL: sitofp_4i32_to_4f32: 1235; SSE: # BB#0: 1236; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 1237; SSE-NEXT: retq 1238; 1239; AVX-LABEL: sitofp_4i32_to_4f32: 1240; AVX: # BB#0: 1241; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 1242; AVX-NEXT: retq 1243 %cvt = sitofp <4 x i32> %a to <4 x float> 1244 ret <4 x float> %cvt 1245} 1246 1247define <4 x float> @sitofp_4i16_to_4f32(<8 x i16> %a) { 1248; SSE-LABEL: sitofp_4i16_to_4f32: 1249; SSE: # BB#0: 1250; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1251; SSE-NEXT: psrad $16, %xmm0 1252; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 1253; SSE-NEXT: retq 1254; 1255; AVX-LABEL: sitofp_4i16_to_4f32: 1256; AVX: # BB#0: 1257; AVX-NEXT: vpmovsxwd %xmm0, %xmm0 1258; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 1259; AVX-NEXT: retq 1260 %shuf = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1261 %cvt = sitofp <4 x i16> %shuf to <4 x float> 1262 ret <4 x float> %cvt 1263} 1264 1265define <4 x float> @sitofp_8i16_to_4f32(<8 x i16> %a) { 1266; SSE-LABEL: sitofp_8i16_to_4f32: 1267; SSE: # BB#0: 1268; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1269; SSE-NEXT: psrad $16, %xmm0 1270; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 1271; SSE-NEXT: retq 1272; 1273; AVX1-LABEL: sitofp_8i16_to_4f32: 1274; AVX1: # BB#0: 1275; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 1276; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1277; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 1278; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1279; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 1280; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1281; AVX1-NEXT: vzeroupper 1282; AVX1-NEXT: retq 1283; 1284; AVX2-LABEL: sitofp_8i16_to_4f32: 1285; AVX2: # BB#0: 1286; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 1287; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 1288; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1289; AVX2-NEXT: vzeroupper 1290; AVX2-NEXT: retq 1291; 1292; AVX512-LABEL: sitofp_8i16_to_4f32: 1293; AVX512: # BB#0: 1294; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0 1295; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 1296; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1297; AVX512-NEXT: retq 1298 %cvt = sitofp <8 x i16> %a to <8 x float> 1299 %shuf = shufflevector <8 x float> %cvt, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1300 ret <4 x float> %shuf 1301} 1302 1303define <4 x float> @sitofp_4i8_to_4f32(<16 x i8> %a) { 1304; SSE-LABEL: sitofp_4i8_to_4f32: 1305; SSE: # BB#0: 1306; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1307; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1308; SSE-NEXT: psrad $24, %xmm0 1309; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 1310; SSE-NEXT: retq 1311; 1312; AVX-LABEL: sitofp_4i8_to_4f32: 1313; AVX: # BB#0: 1314; AVX-NEXT: vpmovsxbd %xmm0, %xmm0 1315; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 1316; AVX-NEXT: retq 1317 %shuf = shufflevector <16 x i8> %a, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1318 %cvt = sitofp <4 x i8> %shuf to <4 x float> 1319 ret <4 x float> %cvt 1320} 1321 1322define <4 x float> @sitofp_16i8_to_4f32(<16 x i8> %a) { 1323; SSE-LABEL: sitofp_16i8_to_4f32: 1324; SSE: # BB#0: 1325; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1326; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1327; SSE-NEXT: psrad $24, %xmm0 1328; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 1329; SSE-NEXT: retq 1330; 1331; AVX1-LABEL: sitofp_16i8_to_4f32: 1332; AVX1: # BB#0: 1333; AVX1-NEXT: vpmovsxbd %xmm0, %xmm1 1334; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 1335; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 1336; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1337; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 1338; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1339; AVX1-NEXT: vzeroupper 1340; AVX1-NEXT: retq 1341; 1342; AVX2-LABEL: sitofp_16i8_to_4f32: 1343; AVX2: # BB#0: 1344; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0 1345; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 1346; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1347; AVX2-NEXT: vzeroupper 1348; AVX2-NEXT: retq 1349; 1350; AVX512-LABEL: sitofp_16i8_to_4f32: 1351; AVX512: # BB#0: 1352; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0 1353; AVX512-NEXT: vcvtdq2ps %zmm0, %zmm0 1354; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 1355; AVX512-NEXT: retq 1356 %cvt = sitofp <16 x i8> %a to <16 x float> 1357 %shuf = shufflevector <16 x float> %cvt, <16 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1358 ret <4 x float> %shuf 1359} 1360 1361define <4 x float> @sitofp_4i64_to_4f32(<4 x i64> %a) { 1362; SSE-LABEL: sitofp_4i64_to_4f32: 1363; SSE: # BB#0: 1364; SSE-NEXT: movd %xmm1, %rax 1365; SSE-NEXT: cvtsi2ssq %rax, %xmm3 1366; SSE-NEXT: movd %xmm0, %rax 1367; SSE-NEXT: cvtsi2ssq %rax, %xmm2 1368; SSE-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 1369; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 1370; SSE-NEXT: movd %xmm1, %rax 1371; SSE-NEXT: xorps %xmm1, %xmm1 1372; SSE-NEXT: cvtsi2ssq %rax, %xmm1 1373; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1374; SSE-NEXT: movd %xmm0, %rax 1375; SSE-NEXT: xorps %xmm0, %xmm0 1376; SSE-NEXT: cvtsi2ssq %rax, %xmm0 1377; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1378; SSE-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 1379; SSE-NEXT: movaps %xmm2, %xmm0 1380; SSE-NEXT: retq 1381; 1382; AVX1-LABEL: sitofp_4i64_to_4f32: 1383; AVX1: # BB#0: 1384; AVX1-NEXT: vpextrq $1, %xmm0, %rax 1385; AVX1-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1386; AVX1-NEXT: vmovq %xmm0, %rax 1387; AVX1-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 1388; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 1389; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 1390; AVX1-NEXT: vmovq %xmm0, %rax 1391; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 1392; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 1393; AVX1-NEXT: vpextrq $1, %xmm0, %rax 1394; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 1395; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 1396; AVX1-NEXT: vzeroupper 1397; AVX1-NEXT: retq 1398; 1399; AVX2-LABEL: sitofp_4i64_to_4f32: 1400; AVX2: # BB#0: 1401; AVX2-NEXT: vpextrq $1, %xmm0, %rax 1402; AVX2-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1403; AVX2-NEXT: vmovq %xmm0, %rax 1404; AVX2-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 1405; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 1406; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 1407; AVX2-NEXT: vmovq %xmm0, %rax 1408; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 1409; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 1410; AVX2-NEXT: vpextrq $1, %xmm0, %rax 1411; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 1412; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 1413; AVX2-NEXT: vzeroupper 1414; AVX2-NEXT: retq 1415; 1416; AVX512F-LABEL: sitofp_4i64_to_4f32: 1417; AVX512F: # BB#0: 1418; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 1419; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1420; AVX512F-NEXT: vmovq %xmm0, %rax 1421; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 1422; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 1423; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm0 1424; AVX512F-NEXT: vmovq %xmm0, %rax 1425; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 1426; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 1427; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 1428; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 1429; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 1430; AVX512F-NEXT: retq 1431; 1432; AVX512VL-LABEL: sitofp_4i64_to_4f32: 1433; AVX512VL: # BB#0: 1434; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 1435; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1436; AVX512VL-NEXT: vmovq %xmm0, %rax 1437; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 1438; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 1439; AVX512VL-NEXT: vextracti32x4 $1, %ymm0, %xmm0 1440; AVX512VL-NEXT: vmovq %xmm0, %rax 1441; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 1442; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 1443; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 1444; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 1445; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 1446; AVX512VL-NEXT: retq 1447; 1448; AVX512DQ-LABEL: sitofp_4i64_to_4f32: 1449; AVX512DQ: # BB#0: 1450; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 1451; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 1452; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1453; AVX512DQ-NEXT: retq 1454; 1455; AVX512VLDQ-LABEL: sitofp_4i64_to_4f32: 1456; AVX512VLDQ: # BB#0: 1457; AVX512VLDQ-NEXT: vcvtqq2ps %ymm0, %xmm0 1458; AVX512VLDQ-NEXT: retq 1459 %cvt = sitofp <4 x i64> %a to <4 x float> 1460 ret <4 x float> %cvt 1461} 1462 1463define <8 x float> @sitofp_8i32_to_8f32(<8 x i32> %a) { 1464; SSE-LABEL: sitofp_8i32_to_8f32: 1465; SSE: # BB#0: 1466; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 1467; SSE-NEXT: cvtdq2ps %xmm1, %xmm1 1468; SSE-NEXT: retq 1469; 1470; AVX-LABEL: sitofp_8i32_to_8f32: 1471; AVX: # BB#0: 1472; AVX-NEXT: vcvtdq2ps %ymm0, %ymm0 1473; AVX-NEXT: retq 1474 %cvt = sitofp <8 x i32> %a to <8 x float> 1475 ret <8 x float> %cvt 1476} 1477 1478define <8 x float> @sitofp_8i16_to_8f32(<8 x i16> %a) { 1479; SSE-LABEL: sitofp_8i16_to_8f32: 1480; SSE: # BB#0: 1481; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 1482; SSE-NEXT: psrad $16, %xmm1 1483; SSE-NEXT: cvtdq2ps %xmm1, %xmm2 1484; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7] 1485; SSE-NEXT: psrad $16, %xmm0 1486; SSE-NEXT: cvtdq2ps %xmm0, %xmm1 1487; SSE-NEXT: movaps %xmm2, %xmm0 1488; SSE-NEXT: retq 1489; 1490; AVX1-LABEL: sitofp_8i16_to_8f32: 1491; AVX1: # BB#0: 1492; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 1493; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 1494; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 1495; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1496; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 1497; AVX1-NEXT: retq 1498; 1499; AVX2-LABEL: sitofp_8i16_to_8f32: 1500; AVX2: # BB#0: 1501; AVX2-NEXT: vpmovsxwd %xmm0, %ymm0 1502; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 1503; AVX2-NEXT: retq 1504; 1505; AVX512-LABEL: sitofp_8i16_to_8f32: 1506; AVX512: # BB#0: 1507; AVX512-NEXT: vpmovsxwd %xmm0, %ymm0 1508; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 1509; AVX512-NEXT: retq 1510 %cvt = sitofp <8 x i16> %a to <8 x float> 1511 ret <8 x float> %cvt 1512} 1513 1514define <8 x float> @sitofp_8i8_to_8f32(<16 x i8> %a) { 1515; SSE-LABEL: sitofp_8i8_to_8f32: 1516; SSE: # BB#0: 1517; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 1518; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 1519; SSE-NEXT: psrad $24, %xmm1 1520; SSE-NEXT: cvtdq2ps %xmm1, %xmm2 1521; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 1522; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1523; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1524; SSE-NEXT: psrad $24, %xmm0 1525; SSE-NEXT: cvtdq2ps %xmm0, %xmm1 1526; SSE-NEXT: movaps %xmm2, %xmm0 1527; SSE-NEXT: retq 1528; 1529; AVX1-LABEL: sitofp_8i8_to_8f32: 1530; AVX1: # BB#0: 1531; AVX1-NEXT: vpmovsxbd %xmm0, %xmm1 1532; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 1533; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 1534; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1535; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 1536; AVX1-NEXT: retq 1537; 1538; AVX2-LABEL: sitofp_8i8_to_8f32: 1539; AVX2: # BB#0: 1540; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0 1541; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 1542; AVX2-NEXT: retq 1543; 1544; AVX512-LABEL: sitofp_8i8_to_8f32: 1545; AVX512: # BB#0: 1546; AVX512-NEXT: vpmovsxbd %xmm0, %ymm0 1547; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 1548; AVX512-NEXT: retq 1549 %shuf = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1550 %cvt = sitofp <8 x i8> %shuf to <8 x float> 1551 ret <8 x float> %cvt 1552} 1553 1554define <8 x float> @sitofp_16i8_to_8f32(<16 x i8> %a) { 1555; SSE-LABEL: sitofp_16i8_to_8f32: 1556; SSE: # BB#0: 1557; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 1558; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 1559; SSE-NEXT: psrad $24, %xmm1 1560; SSE-NEXT: cvtdq2ps %xmm1, %xmm2 1561; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 1562; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 1563; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 1564; SSE-NEXT: psrad $24, %xmm0 1565; SSE-NEXT: cvtdq2ps %xmm0, %xmm1 1566; SSE-NEXT: movaps %xmm2, %xmm0 1567; SSE-NEXT: retq 1568; 1569; AVX1-LABEL: sitofp_16i8_to_8f32: 1570; AVX1: # BB#0: 1571; AVX1-NEXT: vpmovsxbd %xmm0, %xmm1 1572; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 1573; AVX1-NEXT: vpmovsxbd %xmm0, %xmm0 1574; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 1575; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 1576; AVX1-NEXT: retq 1577; 1578; AVX2-LABEL: sitofp_16i8_to_8f32: 1579; AVX2: # BB#0: 1580; AVX2-NEXT: vpmovsxbd %xmm0, %ymm0 1581; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 1582; AVX2-NEXT: retq 1583; 1584; AVX512-LABEL: sitofp_16i8_to_8f32: 1585; AVX512: # BB#0: 1586; AVX512-NEXT: vpmovsxbd %xmm0, %zmm0 1587; AVX512-NEXT: vcvtdq2ps %zmm0, %zmm0 1588; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 1589; AVX512-NEXT: retq 1590 %cvt = sitofp <16 x i8> %a to <16 x float> 1591 %shuf = shufflevector <16 x float> %cvt, <16 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 1592 ret <8 x float> %shuf 1593} 1594 1595; 1596; Unsigned Integer to Float 1597; 1598 1599define <4 x float> @uitofp_2i64_to_4f32(<2 x i64> %a) { 1600; SSE-LABEL: uitofp_2i64_to_4f32: 1601; SSE: # BB#0: 1602; SSE-NEXT: movdqa %xmm0, %xmm1 1603; SSE-NEXT: movd %xmm1, %rax 1604; SSE-NEXT: testq %rax, %rax 1605; SSE-NEXT: js .LBB39_1 1606; SSE-NEXT: # BB#2: 1607; SSE-NEXT: xorps %xmm0, %xmm0 1608; SSE-NEXT: cvtsi2ssq %rax, %xmm0 1609; SSE-NEXT: jmp .LBB39_3 1610; SSE-NEXT: .LBB39_1: 1611; SSE-NEXT: movq %rax, %rcx 1612; SSE-NEXT: shrq %rcx 1613; SSE-NEXT: andl $1, %eax 1614; SSE-NEXT: orq %rcx, %rax 1615; SSE-NEXT: xorps %xmm0, %xmm0 1616; SSE-NEXT: cvtsi2ssq %rax, %xmm0 1617; SSE-NEXT: addss %xmm0, %xmm0 1618; SSE-NEXT: .LBB39_3: 1619; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 1620; SSE-NEXT: movd %xmm1, %rax 1621; SSE-NEXT: testq %rax, %rax 1622; SSE-NEXT: js .LBB39_4 1623; SSE-NEXT: # BB#5: 1624; SSE-NEXT: xorps %xmm1, %xmm1 1625; SSE-NEXT: cvtsi2ssq %rax, %xmm1 1626; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1627; SSE-NEXT: retq 1628; SSE-NEXT: .LBB39_4: 1629; SSE-NEXT: movq %rax, %rcx 1630; SSE-NEXT: shrq %rcx 1631; SSE-NEXT: andl $1, %eax 1632; SSE-NEXT: orq %rcx, %rax 1633; SSE-NEXT: xorps %xmm1, %xmm1 1634; SSE-NEXT: cvtsi2ssq %rax, %xmm1 1635; SSE-NEXT: addss %xmm1, %xmm1 1636; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1637; SSE-NEXT: retq 1638; 1639; VEX-LABEL: uitofp_2i64_to_4f32: 1640; VEX: # BB#0: 1641; VEX-NEXT: vpextrq $1, %xmm0, %rax 1642; VEX-NEXT: testq %rax, %rax 1643; VEX-NEXT: js .LBB39_1 1644; VEX-NEXT: # BB#2: 1645; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1646; VEX-NEXT: jmp .LBB39_3 1647; VEX-NEXT: .LBB39_1: 1648; VEX-NEXT: movq %rax, %rcx 1649; VEX-NEXT: shrq %rcx 1650; VEX-NEXT: andl $1, %eax 1651; VEX-NEXT: orq %rcx, %rax 1652; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1653; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1 1654; VEX-NEXT: .LBB39_3: 1655; VEX-NEXT: vmovq %xmm0, %rax 1656; VEX-NEXT: testq %rax, %rax 1657; VEX-NEXT: js .LBB39_4 1658; VEX-NEXT: # BB#5: 1659; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1660; VEX-NEXT: jmp .LBB39_6 1661; VEX-NEXT: .LBB39_4: 1662; VEX-NEXT: movq %rax, %rcx 1663; VEX-NEXT: shrq %rcx 1664; VEX-NEXT: andl $1, %eax 1665; VEX-NEXT: orq %rcx, %rax 1666; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1667; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0 1668; VEX-NEXT: .LBB39_6: 1669; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1670; VEX-NEXT: vxorps %xmm1, %xmm1, %xmm1 1671; VEX-NEXT: testq %rax, %rax 1672; VEX-NEXT: js .LBB39_8 1673; VEX-NEXT: # BB#7: 1674; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm1 1675; VEX-NEXT: .LBB39_8: 1676; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1677; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1678; VEX-NEXT: retq 1679; 1680; AVX512F-LABEL: uitofp_2i64_to_4f32: 1681; AVX512F: # BB#0: 1682; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 1683; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 1684; AVX512F-NEXT: vmovq %xmm0, %rax 1685; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm0 1686; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1687; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm1 1688; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1689; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1690; AVX512F-NEXT: retq 1691; 1692; AVX512VL-LABEL: uitofp_2i64_to_4f32: 1693; AVX512VL: # BB#0: 1694; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 1695; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 1696; AVX512VL-NEXT: vmovq %xmm0, %rax 1697; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm0 1698; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1699; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm1 1700; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1701; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1702; AVX512VL-NEXT: retq 1703; 1704; AVX512DQ-LABEL: uitofp_2i64_to_4f32: 1705; AVX512DQ: # BB#0: 1706; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 1707; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0 1708; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1709; AVX512DQ-NEXT: retq 1710; 1711; AVX512VLDQ-LABEL: uitofp_2i64_to_4f32: 1712; AVX512VLDQ: # BB#0: 1713; AVX512VLDQ-NEXT: vcvtuqq2ps %xmm0, %xmm0 1714; AVX512VLDQ-NEXT: retq 1715 %cvt = uitofp <2 x i64> %a to <2 x float> 1716 %ext = shufflevector <2 x float> %cvt, <2 x float> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> 1717 ret <4 x float> %ext 1718} 1719 1720define <4 x float> @uitofp_2i64_to_2f32(<2 x i64> %a) { 1721; SSE-LABEL: uitofp_2i64_to_2f32: 1722; SSE: # BB#0: 1723; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1724; SSE-NEXT: movd %xmm1, %rax 1725; SSE-NEXT: testq %rax, %rax 1726; SSE-NEXT: js .LBB40_1 1727; SSE-NEXT: # BB#2: 1728; SSE-NEXT: xorps %xmm1, %xmm1 1729; SSE-NEXT: cvtsi2ssq %rax, %xmm1 1730; SSE-NEXT: jmp .LBB40_3 1731; SSE-NEXT: .LBB40_1: 1732; SSE-NEXT: movq %rax, %rcx 1733; SSE-NEXT: shrq %rcx 1734; SSE-NEXT: andl $1, %eax 1735; SSE-NEXT: orq %rcx, %rax 1736; SSE-NEXT: xorps %xmm1, %xmm1 1737; SSE-NEXT: cvtsi2ssq %rax, %xmm1 1738; SSE-NEXT: addss %xmm1, %xmm1 1739; SSE-NEXT: .LBB40_3: 1740; SSE-NEXT: movd %xmm0, %rax 1741; SSE-NEXT: testq %rax, %rax 1742; SSE-NEXT: js .LBB40_4 1743; SSE-NEXT: # BB#5: 1744; SSE-NEXT: xorps %xmm0, %xmm0 1745; SSE-NEXT: cvtsi2ssq %rax, %xmm0 1746; SSE-NEXT: jmp .LBB40_6 1747; SSE-NEXT: .LBB40_4: 1748; SSE-NEXT: movq %rax, %rcx 1749; SSE-NEXT: shrq %rcx 1750; SSE-NEXT: andl $1, %eax 1751; SSE-NEXT: orq %rcx, %rax 1752; SSE-NEXT: xorps %xmm0, %xmm0 1753; SSE-NEXT: cvtsi2ssq %rax, %xmm0 1754; SSE-NEXT: addss %xmm0, %xmm0 1755; SSE-NEXT: .LBB40_6: 1756; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1757; SSE-NEXT: movq {{.*#+}} xmm0 = xmm0[0],zero 1758; SSE-NEXT: retq 1759; 1760; VEX-LABEL: uitofp_2i64_to_2f32: 1761; VEX: # BB#0: 1762; VEX-NEXT: vpextrq $1, %xmm0, %rax 1763; VEX-NEXT: testq %rax, %rax 1764; VEX-NEXT: js .LBB40_1 1765; VEX-NEXT: # BB#2: 1766; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1767; VEX-NEXT: jmp .LBB40_3 1768; VEX-NEXT: .LBB40_1: 1769; VEX-NEXT: movq %rax, %rcx 1770; VEX-NEXT: shrq %rcx 1771; VEX-NEXT: andl $1, %eax 1772; VEX-NEXT: orq %rcx, %rax 1773; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1774; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1 1775; VEX-NEXT: .LBB40_3: 1776; VEX-NEXT: vmovq %xmm0, %rax 1777; VEX-NEXT: testq %rax, %rax 1778; VEX-NEXT: js .LBB40_4 1779; VEX-NEXT: # BB#5: 1780; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1781; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero 1782; VEX-NEXT: retq 1783; VEX-NEXT: .LBB40_4: 1784; VEX-NEXT: movq %rax, %rcx 1785; VEX-NEXT: shrq %rcx 1786; VEX-NEXT: andl $1, %eax 1787; VEX-NEXT: orq %rcx, %rax 1788; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1789; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0 1790; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero 1791; VEX-NEXT: retq 1792; 1793; AVX512F-LABEL: uitofp_2i64_to_2f32: 1794; AVX512F: # BB#0: 1795; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 1796; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 1797; AVX512F-NEXT: vmovq %xmm0, %rax 1798; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm0 1799; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],zero,zero 1800; AVX512F-NEXT: retq 1801; 1802; AVX512VL-LABEL: uitofp_2i64_to_2f32: 1803; AVX512VL: # BB#0: 1804; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 1805; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 1806; AVX512VL-NEXT: vmovq %xmm0, %rax 1807; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm0 1808; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1809; AVX512VL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero 1810; AVX512VL-NEXT: retq 1811; 1812; AVX512DQ-LABEL: uitofp_2i64_to_2f32: 1813; AVX512DQ: # BB#0: 1814; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 1815; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0 1816; AVX512DQ-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero 1817; AVX512DQ-NEXT: retq 1818; 1819; AVX512VLDQ-LABEL: uitofp_2i64_to_2f32: 1820; AVX512VLDQ: # BB#0: 1821; AVX512VLDQ-NEXT: vcvtuqq2ps %xmm0, %xmm0 1822; AVX512VLDQ-NEXT: retq 1823 %cvt = uitofp <2 x i64> %a to <2 x float> 1824 %ext = shufflevector <2 x float> %cvt, <2 x float> zeroinitializer, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 1825 ret <4 x float> %ext 1826} 1827 1828define <4 x float> @uitofp_4i64_to_4f32_undef(<2 x i64> %a) { 1829; SSE-LABEL: uitofp_4i64_to_4f32_undef: 1830; SSE: # BB#0: 1831; SSE-NEXT: movdqa %xmm0, %xmm1 1832; SSE-NEXT: testq %rax, %rax 1833; SSE-NEXT: xorps %xmm2, %xmm2 1834; SSE-NEXT: js .LBB41_2 1835; SSE-NEXT: # BB#1: 1836; SSE-NEXT: xorps %xmm2, %xmm2 1837; SSE-NEXT: cvtsi2ssq %rax, %xmm2 1838; SSE-NEXT: .LBB41_2: 1839; SSE-NEXT: movd %xmm1, %rax 1840; SSE-NEXT: testq %rax, %rax 1841; SSE-NEXT: js .LBB41_3 1842; SSE-NEXT: # BB#4: 1843; SSE-NEXT: xorps %xmm0, %xmm0 1844; SSE-NEXT: cvtsi2ssq %rax, %xmm0 1845; SSE-NEXT: jmp .LBB41_5 1846; SSE-NEXT: .LBB41_3: 1847; SSE-NEXT: movq %rax, %rcx 1848; SSE-NEXT: shrq %rcx 1849; SSE-NEXT: andl $1, %eax 1850; SSE-NEXT: orq %rcx, %rax 1851; SSE-NEXT: xorps %xmm0, %xmm0 1852; SSE-NEXT: cvtsi2ssq %rax, %xmm0 1853; SSE-NEXT: addss %xmm0, %xmm0 1854; SSE-NEXT: .LBB41_5: 1855; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 1856; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 1857; SSE-NEXT: movd %xmm1, %rax 1858; SSE-NEXT: testq %rax, %rax 1859; SSE-NEXT: js .LBB41_6 1860; SSE-NEXT: # BB#7: 1861; SSE-NEXT: xorps %xmm1, %xmm1 1862; SSE-NEXT: cvtsi2ssq %rax, %xmm1 1863; SSE-NEXT: jmp .LBB41_8 1864; SSE-NEXT: .LBB41_6: 1865; SSE-NEXT: movq %rax, %rcx 1866; SSE-NEXT: shrq %rcx 1867; SSE-NEXT: andl $1, %eax 1868; SSE-NEXT: orq %rcx, %rax 1869; SSE-NEXT: xorps %xmm1, %xmm1 1870; SSE-NEXT: cvtsi2ssq %rax, %xmm1 1871; SSE-NEXT: addss %xmm1, %xmm1 1872; SSE-NEXT: .LBB41_8: 1873; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 1874; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 1875; SSE-NEXT: retq 1876; 1877; VEX-LABEL: uitofp_4i64_to_4f32_undef: 1878; VEX: # BB#0: 1879; VEX-NEXT: vpextrq $1, %xmm0, %rax 1880; VEX-NEXT: testq %rax, %rax 1881; VEX-NEXT: js .LBB41_1 1882; VEX-NEXT: # BB#2: 1883; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1884; VEX-NEXT: jmp .LBB41_3 1885; VEX-NEXT: .LBB41_1: 1886; VEX-NEXT: movq %rax, %rcx 1887; VEX-NEXT: shrq %rcx 1888; VEX-NEXT: andl $1, %eax 1889; VEX-NEXT: orq %rcx, %rax 1890; VEX-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 1891; VEX-NEXT: vaddss %xmm1, %xmm1, %xmm1 1892; VEX-NEXT: .LBB41_3: 1893; VEX-NEXT: vmovq %xmm0, %rax 1894; VEX-NEXT: testq %rax, %rax 1895; VEX-NEXT: js .LBB41_4 1896; VEX-NEXT: # BB#5: 1897; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1898; VEX-NEXT: jmp .LBB41_6 1899; VEX-NEXT: .LBB41_4: 1900; VEX-NEXT: movq %rax, %rcx 1901; VEX-NEXT: shrq %rcx 1902; VEX-NEXT: andl $1, %eax 1903; VEX-NEXT: orq %rcx, %rax 1904; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm0 1905; VEX-NEXT: vaddss %xmm0, %xmm0, %xmm0 1906; VEX-NEXT: .LBB41_6: 1907; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1908; VEX-NEXT: vxorps %xmm1, %xmm1, %xmm1 1909; VEX-NEXT: testq %rax, %rax 1910; VEX-NEXT: js .LBB41_8 1911; VEX-NEXT: # BB#7: 1912; VEX-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm1 1913; VEX-NEXT: .LBB41_8: 1914; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1915; VEX-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1916; VEX-NEXT: retq 1917; 1918; AVX512F-LABEL: uitofp_4i64_to_4f32_undef: 1919; AVX512F: # BB#0: 1920; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 1921; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 1922; AVX512F-NEXT: vmovq %xmm0, %rax 1923; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm0 1924; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1925; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm1 1926; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1927; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1928; AVX512F-NEXT: retq 1929; 1930; AVX512VL-LABEL: uitofp_4i64_to_4f32_undef: 1931; AVX512VL: # BB#0: 1932; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 1933; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 1934; AVX512VL-NEXT: vmovq %xmm0, %rax 1935; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm0 1936; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[2,3] 1937; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm1 1938; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0],xmm0[3] 1939; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm0[0,1,2],xmm1[0] 1940; AVX512VL-NEXT: retq 1941; 1942; AVX512DQ-LABEL: uitofp_4i64_to_4f32_undef: 1943; AVX512DQ: # BB#0: 1944; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 1945; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0 1946; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 1947; AVX512DQ-NEXT: retq 1948; 1949; AVX512VLDQ-LABEL: uitofp_4i64_to_4f32_undef: 1950; AVX512VLDQ: # BB#0: 1951; AVX512VLDQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<def> 1952; AVX512VLDQ-NEXT: vcvtuqq2ps %ymm0, %xmm0 1953; AVX512VLDQ-NEXT: retq 1954 %ext = shufflevector <2 x i64> %a, <2 x i64> undef, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef> 1955 %cvt = uitofp <4 x i64> %ext to <4 x float> 1956 ret <4 x float> %cvt 1957} 1958 1959define <4 x float> @uitofp_4i32_to_4f32(<4 x i32> %a) { 1960; SSE-LABEL: uitofp_4i32_to_4f32: 1961; SSE: # BB#0: 1962; SSE-NEXT: movdqa {{.*#+}} xmm1 = [65535,65535,65535,65535] 1963; SSE-NEXT: pand %xmm0, %xmm1 1964; SSE-NEXT: por {{.*}}(%rip), %xmm1 1965; SSE-NEXT: psrld $16, %xmm0 1966; SSE-NEXT: por {{.*}}(%rip), %xmm0 1967; SSE-NEXT: addps {{.*}}(%rip), %xmm0 1968; SSE-NEXT: addps %xmm1, %xmm0 1969; SSE-NEXT: retq 1970; 1971; AVX1-LABEL: uitofp_4i32_to_4f32: 1972; AVX1: # BB#0: 1973; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7] 1974; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 1975; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7] 1976; AVX1-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0 1977; AVX1-NEXT: vaddps %xmm0, %xmm1, %xmm0 1978; AVX1-NEXT: retq 1979; 1980; AVX2-LABEL: uitofp_4i32_to_4f32: 1981; AVX2: # BB#0: 1982; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1 1983; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 1984; AVX2-NEXT: vpsrld $16, %xmm0, %xmm0 1985; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2 1986; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 1987; AVX2-NEXT: vbroadcastss {{.*}}(%rip), %xmm2 1988; AVX2-NEXT: vaddps %xmm2, %xmm0, %xmm0 1989; AVX2-NEXT: vaddps %xmm0, %xmm1, %xmm0 1990; AVX2-NEXT: retq 1991; 1992; AVX512F-LABEL: uitofp_4i32_to_4f32: 1993; AVX512F: # BB#0: 1994; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 1995; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0 1996; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 1997; AVX512F-NEXT: retq 1998; 1999; AVX512VL-LABEL: uitofp_4i32_to_4f32: 2000; AVX512VL: # BB#0: 2001; AVX512VL-NEXT: vcvtudq2ps %xmm0, %xmm0 2002; AVX512VL-NEXT: retq 2003; 2004; AVX512DQ-LABEL: uitofp_4i32_to_4f32: 2005; AVX512DQ: # BB#0: 2006; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def> 2007; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0 2008; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 2009; AVX512DQ-NEXT: retq 2010; 2011; AVX512VLDQ-LABEL: uitofp_4i32_to_4f32: 2012; AVX512VLDQ: # BB#0: 2013; AVX512VLDQ-NEXT: vcvtudq2ps %xmm0, %xmm0 2014; AVX512VLDQ-NEXT: retq 2015 %cvt = uitofp <4 x i32> %a to <4 x float> 2016 ret <4 x float> %cvt 2017} 2018 2019define <4 x float> @uitofp_4i16_to_4f32(<8 x i16> %a) { 2020; SSE-LABEL: uitofp_4i16_to_4f32: 2021; SSE: # BB#0: 2022; SSE-NEXT: pxor %xmm1, %xmm1 2023; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 2024; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 2025; SSE-NEXT: retq 2026; 2027; AVX-LABEL: uitofp_4i16_to_4f32: 2028; AVX: # BB#0: 2029; AVX-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 2030; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 2031; AVX-NEXT: retq 2032 %shuf = shufflevector <8 x i16> %a, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 2033 %cvt = uitofp <4 x i16> %shuf to <4 x float> 2034 ret <4 x float> %cvt 2035} 2036 2037define <4 x float> @uitofp_8i16_to_4f32(<8 x i16> %a) { 2038; SSE-LABEL: uitofp_8i16_to_4f32: 2039; SSE: # BB#0: 2040; SSE-NEXT: pxor %xmm1, %xmm1 2041; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 2042; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 2043; SSE-NEXT: retq 2044; 2045; AVX1-LABEL: uitofp_8i16_to_4f32: 2046; AVX1: # BB#0: 2047; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 2048; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 2049; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 2050; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 2051; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 2052; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2053; AVX1-NEXT: vzeroupper 2054; AVX1-NEXT: retq 2055; 2056; AVX2-LABEL: uitofp_8i16_to_4f32: 2057; AVX2: # BB#0: 2058; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 2059; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 2060; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2061; AVX2-NEXT: vzeroupper 2062; AVX2-NEXT: retq 2063; 2064; AVX512-LABEL: uitofp_8i16_to_4f32: 2065; AVX512: # BB#0: 2066; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 2067; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 2068; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2069; AVX512-NEXT: retq 2070 %cvt = uitofp <8 x i16> %a to <8 x float> 2071 %shuf = shufflevector <8 x float> %cvt, <8 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 2072 ret <4 x float> %shuf 2073} 2074 2075define <4 x float> @uitofp_4i8_to_4f32(<16 x i8> %a) { 2076; SSE-LABEL: uitofp_4i8_to_4f32: 2077; SSE: # BB#0: 2078; SSE-NEXT: pxor %xmm1, %xmm1 2079; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 2080; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 2081; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 2082; SSE-NEXT: retq 2083; 2084; AVX-LABEL: uitofp_4i8_to_4f32: 2085; AVX: # BB#0: 2086; AVX-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 2087; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 2088; AVX-NEXT: retq 2089 %shuf = shufflevector <16 x i8> %a, <16 x i8> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 2090 %cvt = uitofp <4 x i8> %shuf to <4 x float> 2091 ret <4 x float> %cvt 2092} 2093 2094define <4 x float> @uitofp_16i8_to_4f32(<16 x i8> %a) { 2095; SSE-LABEL: uitofp_16i8_to_4f32: 2096; SSE: # BB#0: 2097; SSE-NEXT: pxor %xmm1, %xmm1 2098; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 2099; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 2100; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 2101; SSE-NEXT: retq 2102; 2103; AVX1-LABEL: uitofp_16i8_to_4f32: 2104; AVX1: # BB#0: 2105; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 2106; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 2107; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 2108; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 2109; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 2110; AVX1-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2111; AVX1-NEXT: vzeroupper 2112; AVX1-NEXT: retq 2113; 2114; AVX2-LABEL: uitofp_16i8_to_4f32: 2115; AVX2: # BB#0: 2116; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero 2117; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 2118; AVX2-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2119; AVX2-NEXT: vzeroupper 2120; AVX2-NEXT: retq 2121; 2122; AVX512-LABEL: uitofp_16i8_to_4f32: 2123; AVX512: # BB#0: 2124; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 2125; AVX512-NEXT: vcvtdq2ps %zmm0, %zmm0 2126; AVX512-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 2127; AVX512-NEXT: retq 2128 %cvt = uitofp <16 x i8> %a to <16 x float> 2129 %shuf = shufflevector <16 x float> %cvt, <16 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 2130 ret <4 x float> %shuf 2131} 2132 2133define <4 x float> @uitofp_4i64_to_4f32(<4 x i64> %a) { 2134; SSE-LABEL: uitofp_4i64_to_4f32: 2135; SSE: # BB#0: 2136; SSE-NEXT: movd %xmm1, %rax 2137; SSE-NEXT: testq %rax, %rax 2138; SSE-NEXT: js .LBB47_1 2139; SSE-NEXT: # BB#2: 2140; SSE-NEXT: cvtsi2ssq %rax, %xmm3 2141; SSE-NEXT: jmp .LBB47_3 2142; SSE-NEXT: .LBB47_1: 2143; SSE-NEXT: movq %rax, %rcx 2144; SSE-NEXT: shrq %rcx 2145; SSE-NEXT: andl $1, %eax 2146; SSE-NEXT: orq %rcx, %rax 2147; SSE-NEXT: cvtsi2ssq %rax, %xmm3 2148; SSE-NEXT: addss %xmm3, %xmm3 2149; SSE-NEXT: .LBB47_3: 2150; SSE-NEXT: movd %xmm0, %rax 2151; SSE-NEXT: testq %rax, %rax 2152; SSE-NEXT: js .LBB47_4 2153; SSE-NEXT: # BB#5: 2154; SSE-NEXT: cvtsi2ssq %rax, %xmm2 2155; SSE-NEXT: jmp .LBB47_6 2156; SSE-NEXT: .LBB47_4: 2157; SSE-NEXT: movq %rax, %rcx 2158; SSE-NEXT: shrq %rcx 2159; SSE-NEXT: andl $1, %eax 2160; SSE-NEXT: orq %rcx, %rax 2161; SSE-NEXT: cvtsi2ssq %rax, %xmm2 2162; SSE-NEXT: addss %xmm2, %xmm2 2163; SSE-NEXT: .LBB47_6: 2164; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 2165; SSE-NEXT: movd %xmm1, %rax 2166; SSE-NEXT: testq %rax, %rax 2167; SSE-NEXT: js .LBB47_7 2168; SSE-NEXT: # BB#8: 2169; SSE-NEXT: xorps %xmm1, %xmm1 2170; SSE-NEXT: cvtsi2ssq %rax, %xmm1 2171; SSE-NEXT: jmp .LBB47_9 2172; SSE-NEXT: .LBB47_7: 2173; SSE-NEXT: movq %rax, %rcx 2174; SSE-NEXT: shrq %rcx 2175; SSE-NEXT: andl $1, %eax 2176; SSE-NEXT: orq %rcx, %rax 2177; SSE-NEXT: xorps %xmm1, %xmm1 2178; SSE-NEXT: cvtsi2ssq %rax, %xmm1 2179; SSE-NEXT: addss %xmm1, %xmm1 2180; SSE-NEXT: .LBB47_9: 2181; SSE-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 2182; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 2183; SSE-NEXT: movd %xmm0, %rax 2184; SSE-NEXT: testq %rax, %rax 2185; SSE-NEXT: js .LBB47_10 2186; SSE-NEXT: # BB#11: 2187; SSE-NEXT: xorps %xmm0, %xmm0 2188; SSE-NEXT: cvtsi2ssq %rax, %xmm0 2189; SSE-NEXT: jmp .LBB47_12 2190; SSE-NEXT: .LBB47_10: 2191; SSE-NEXT: movq %rax, %rcx 2192; SSE-NEXT: shrq %rcx 2193; SSE-NEXT: andl $1, %eax 2194; SSE-NEXT: orq %rcx, %rax 2195; SSE-NEXT: xorps %xmm0, %xmm0 2196; SSE-NEXT: cvtsi2ssq %rax, %xmm0 2197; SSE-NEXT: addss %xmm0, %xmm0 2198; SSE-NEXT: .LBB47_12: 2199; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 2200; SSE-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1] 2201; SSE-NEXT: movaps %xmm2, %xmm0 2202; SSE-NEXT: retq 2203; 2204; AVX1-LABEL: uitofp_4i64_to_4f32: 2205; AVX1: # BB#0: 2206; AVX1-NEXT: vpextrq $1, %xmm0, %rax 2207; AVX1-NEXT: testq %rax, %rax 2208; AVX1-NEXT: js .LBB47_1 2209; AVX1-NEXT: # BB#2: 2210; AVX1-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 2211; AVX1-NEXT: jmp .LBB47_3 2212; AVX1-NEXT: .LBB47_1: 2213; AVX1-NEXT: movq %rax, %rcx 2214; AVX1-NEXT: shrq %rcx 2215; AVX1-NEXT: andl $1, %eax 2216; AVX1-NEXT: orq %rcx, %rax 2217; AVX1-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 2218; AVX1-NEXT: vaddss %xmm1, %xmm1, %xmm1 2219; AVX1-NEXT: .LBB47_3: 2220; AVX1-NEXT: vmovq %xmm0, %rax 2221; AVX1-NEXT: testq %rax, %rax 2222; AVX1-NEXT: js .LBB47_4 2223; AVX1-NEXT: # BB#5: 2224; AVX1-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 2225; AVX1-NEXT: jmp .LBB47_6 2226; AVX1-NEXT: .LBB47_4: 2227; AVX1-NEXT: movq %rax, %rcx 2228; AVX1-NEXT: shrq %rcx 2229; AVX1-NEXT: andl $1, %eax 2230; AVX1-NEXT: orq %rcx, %rax 2231; AVX1-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 2232; AVX1-NEXT: vaddss %xmm2, %xmm2, %xmm2 2233; AVX1-NEXT: .LBB47_6: 2234; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 2235; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 2236; AVX1-NEXT: vmovq %xmm0, %rax 2237; AVX1-NEXT: testq %rax, %rax 2238; AVX1-NEXT: js .LBB47_7 2239; AVX1-NEXT: # BB#8: 2240; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 2241; AVX1-NEXT: jmp .LBB47_9 2242; AVX1-NEXT: .LBB47_7: 2243; AVX1-NEXT: movq %rax, %rcx 2244; AVX1-NEXT: shrq %rcx 2245; AVX1-NEXT: andl $1, %eax 2246; AVX1-NEXT: orq %rcx, %rax 2247; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 2248; AVX1-NEXT: vaddss %xmm2, %xmm2, %xmm2 2249; AVX1-NEXT: .LBB47_9: 2250; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 2251; AVX1-NEXT: vpextrq $1, %xmm0, %rax 2252; AVX1-NEXT: testq %rax, %rax 2253; AVX1-NEXT: js .LBB47_10 2254; AVX1-NEXT: # BB#11: 2255; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 2256; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 2257; AVX1-NEXT: vzeroupper 2258; AVX1-NEXT: retq 2259; AVX1-NEXT: .LBB47_10: 2260; AVX1-NEXT: movq %rax, %rcx 2261; AVX1-NEXT: shrq %rcx 2262; AVX1-NEXT: andl $1, %eax 2263; AVX1-NEXT: orq %rcx, %rax 2264; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 2265; AVX1-NEXT: vaddss %xmm0, %xmm0, %xmm0 2266; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 2267; AVX1-NEXT: vzeroupper 2268; AVX1-NEXT: retq 2269; 2270; AVX2-LABEL: uitofp_4i64_to_4f32: 2271; AVX2: # BB#0: 2272; AVX2-NEXT: vpextrq $1, %xmm0, %rax 2273; AVX2-NEXT: testq %rax, %rax 2274; AVX2-NEXT: js .LBB47_1 2275; AVX2-NEXT: # BB#2: 2276; AVX2-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 2277; AVX2-NEXT: jmp .LBB47_3 2278; AVX2-NEXT: .LBB47_1: 2279; AVX2-NEXT: movq %rax, %rcx 2280; AVX2-NEXT: shrq %rcx 2281; AVX2-NEXT: andl $1, %eax 2282; AVX2-NEXT: orq %rcx, %rax 2283; AVX2-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 2284; AVX2-NEXT: vaddss %xmm1, %xmm1, %xmm1 2285; AVX2-NEXT: .LBB47_3: 2286; AVX2-NEXT: vmovq %xmm0, %rax 2287; AVX2-NEXT: testq %rax, %rax 2288; AVX2-NEXT: js .LBB47_4 2289; AVX2-NEXT: # BB#5: 2290; AVX2-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 2291; AVX2-NEXT: jmp .LBB47_6 2292; AVX2-NEXT: .LBB47_4: 2293; AVX2-NEXT: movq %rax, %rcx 2294; AVX2-NEXT: shrq %rcx 2295; AVX2-NEXT: andl $1, %eax 2296; AVX2-NEXT: orq %rcx, %rax 2297; AVX2-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 2298; AVX2-NEXT: vaddss %xmm2, %xmm2, %xmm2 2299; AVX2-NEXT: .LBB47_6: 2300; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 2301; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 2302; AVX2-NEXT: vmovq %xmm0, %rax 2303; AVX2-NEXT: testq %rax, %rax 2304; AVX2-NEXT: js .LBB47_7 2305; AVX2-NEXT: # BB#8: 2306; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 2307; AVX2-NEXT: jmp .LBB47_9 2308; AVX2-NEXT: .LBB47_7: 2309; AVX2-NEXT: movq %rax, %rcx 2310; AVX2-NEXT: shrq %rcx 2311; AVX2-NEXT: andl $1, %eax 2312; AVX2-NEXT: orq %rcx, %rax 2313; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 2314; AVX2-NEXT: vaddss %xmm2, %xmm2, %xmm2 2315; AVX2-NEXT: .LBB47_9: 2316; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 2317; AVX2-NEXT: vpextrq $1, %xmm0, %rax 2318; AVX2-NEXT: testq %rax, %rax 2319; AVX2-NEXT: js .LBB47_10 2320; AVX2-NEXT: # BB#11: 2321; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 2322; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 2323; AVX2-NEXT: vzeroupper 2324; AVX2-NEXT: retq 2325; AVX2-NEXT: .LBB47_10: 2326; AVX2-NEXT: movq %rax, %rcx 2327; AVX2-NEXT: shrq %rcx 2328; AVX2-NEXT: andl $1, %eax 2329; AVX2-NEXT: orq %rcx, %rax 2330; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 2331; AVX2-NEXT: vaddss %xmm0, %xmm0, %xmm0 2332; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 2333; AVX2-NEXT: vzeroupper 2334; AVX2-NEXT: retq 2335; 2336; AVX512F-LABEL: uitofp_4i64_to_4f32: 2337; AVX512F: # BB#0: 2338; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 2339; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 2340; AVX512F-NEXT: vmovq %xmm0, %rax 2341; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm2 2342; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 2343; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm0 2344; AVX512F-NEXT: vmovq %xmm0, %rax 2345; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm2 2346; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 2347; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 2348; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm0 2349; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 2350; AVX512F-NEXT: retq 2351; 2352; AVX512VL-LABEL: uitofp_4i64_to_4f32: 2353; AVX512VL: # BB#0: 2354; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 2355; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 2356; AVX512VL-NEXT: vmovq %xmm0, %rax 2357; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm2 2358; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 2359; AVX512VL-NEXT: vextracti32x4 $1, %ymm0, %xmm0 2360; AVX512VL-NEXT: vmovq %xmm0, %rax 2361; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm2 2362; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 2363; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 2364; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm0 2365; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 2366; AVX512VL-NEXT: retq 2367; 2368; AVX512DQ-LABEL: uitofp_4i64_to_4f32: 2369; AVX512DQ: # BB#0: 2370; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 2371; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0 2372; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 2373; AVX512DQ-NEXT: retq 2374; 2375; AVX512VLDQ-LABEL: uitofp_4i64_to_4f32: 2376; AVX512VLDQ: # BB#0: 2377; AVX512VLDQ-NEXT: vcvtuqq2ps %ymm0, %xmm0 2378; AVX512VLDQ-NEXT: retq 2379 %cvt = uitofp <4 x i64> %a to <4 x float> 2380 ret <4 x float> %cvt 2381} 2382 2383define <8 x float> @uitofp_8i32_to_8f32(<8 x i32> %a) { 2384; SSE-LABEL: uitofp_8i32_to_8f32: 2385; SSE: # BB#0: 2386; SSE-NEXT: movdqa {{.*#+}} xmm2 = [65535,65535,65535,65535] 2387; SSE-NEXT: movdqa %xmm0, %xmm3 2388; SSE-NEXT: pand %xmm2, %xmm3 2389; SSE-NEXT: movdqa {{.*#+}} xmm4 = [1258291200,1258291200,1258291200,1258291200] 2390; SSE-NEXT: por %xmm4, %xmm3 2391; SSE-NEXT: psrld $16, %xmm0 2392; SSE-NEXT: movdqa {{.*#+}} xmm5 = [1392508928,1392508928,1392508928,1392508928] 2393; SSE-NEXT: por %xmm5, %xmm0 2394; SSE-NEXT: movaps {{.*#+}} xmm6 = [-5.497642e+11,-5.497642e+11,-5.497642e+11,-5.497642e+11] 2395; SSE-NEXT: addps %xmm6, %xmm0 2396; SSE-NEXT: addps %xmm3, %xmm0 2397; SSE-NEXT: pand %xmm1, %xmm2 2398; SSE-NEXT: por %xmm4, %xmm2 2399; SSE-NEXT: psrld $16, %xmm1 2400; SSE-NEXT: por %xmm5, %xmm1 2401; SSE-NEXT: addps %xmm6, %xmm1 2402; SSE-NEXT: addps %xmm2, %xmm1 2403; SSE-NEXT: retq 2404; 2405; AVX1-LABEL: uitofp_8i32_to_8f32: 2406; AVX1: # BB#0: 2407; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1 2408; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 2409; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 2410; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 2411; AVX1-NEXT: vcvtdq2ps %ymm1, %ymm1 2412; AVX1-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1 2413; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 2414; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 2415; AVX1-NEXT: vaddps %ymm0, %ymm1, %ymm0 2416; AVX1-NEXT: retq 2417; 2418; AVX2-LABEL: uitofp_8i32_to_8f32: 2419; AVX2: # BB#0: 2420; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1 2421; AVX2-NEXT: vpblendw {{.*#+}} ymm1 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15] 2422; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 2423; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm2 2424; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm2[1],ymm0[2],ymm2[3],ymm0[4],ymm2[5],ymm0[6],ymm2[7],ymm0[8],ymm2[9],ymm0[10],ymm2[11],ymm0[12],ymm2[13],ymm0[14],ymm2[15] 2425; AVX2-NEXT: vbroadcastss {{.*}}(%rip), %ymm2 2426; AVX2-NEXT: vaddps %ymm2, %ymm0, %ymm0 2427; AVX2-NEXT: vaddps %ymm0, %ymm1, %ymm0 2428; AVX2-NEXT: retq 2429; 2430; AVX512F-LABEL: uitofp_8i32_to_8f32: 2431; AVX512F: # BB#0: 2432; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 2433; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0 2434; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 2435; AVX512F-NEXT: retq 2436; 2437; AVX512VL-LABEL: uitofp_8i32_to_8f32: 2438; AVX512VL: # BB#0: 2439; AVX512VL-NEXT: vcvtudq2ps %ymm0, %ymm0 2440; AVX512VL-NEXT: retq 2441; 2442; AVX512DQ-LABEL: uitofp_8i32_to_8f32: 2443; AVX512DQ: # BB#0: 2444; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def> 2445; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0 2446; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 2447; AVX512DQ-NEXT: retq 2448; 2449; AVX512VLDQ-LABEL: uitofp_8i32_to_8f32: 2450; AVX512VLDQ: # BB#0: 2451; AVX512VLDQ-NEXT: vcvtudq2ps %ymm0, %ymm0 2452; AVX512VLDQ-NEXT: retq 2453 %cvt = uitofp <8 x i32> %a to <8 x float> 2454 ret <8 x float> %cvt 2455} 2456 2457define <8 x float> @uitofp_8i16_to_8f32(<8 x i16> %a) { 2458; SSE-LABEL: uitofp_8i16_to_8f32: 2459; SSE: # BB#0: 2460; SSE-NEXT: pxor %xmm1, %xmm1 2461; SSE-NEXT: movdqa %xmm0, %xmm2 2462; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 2463; SSE-NEXT: cvtdq2ps %xmm2, %xmm2 2464; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 2465; SSE-NEXT: cvtdq2ps %xmm0, %xmm1 2466; SSE-NEXT: movaps %xmm2, %xmm0 2467; SSE-NEXT: retq 2468; 2469; AVX1-LABEL: uitofp_8i16_to_8f32: 2470; AVX1: # BB#0: 2471; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 2472; AVX1-NEXT: vpunpckhwd {{.*#+}} xmm1 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 2473; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 2474; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 2475; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 2476; AVX1-NEXT: retq 2477; 2478; AVX2-LABEL: uitofp_8i16_to_8f32: 2479; AVX2: # BB#0: 2480; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 2481; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 2482; AVX2-NEXT: retq 2483; 2484; AVX512-LABEL: uitofp_8i16_to_8f32: 2485; AVX512: # BB#0: 2486; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 2487; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 2488; AVX512-NEXT: retq 2489 %cvt = uitofp <8 x i16> %a to <8 x float> 2490 ret <8 x float> %cvt 2491} 2492 2493define <8 x float> @uitofp_8i8_to_8f32(<16 x i8> %a) { 2494; SSE-LABEL: uitofp_8i8_to_8f32: 2495; SSE: # BB#0: 2496; SSE-NEXT: pxor %xmm1, %xmm1 2497; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 2498; SSE-NEXT: movdqa %xmm0, %xmm2 2499; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 2500; SSE-NEXT: cvtdq2ps %xmm2, %xmm2 2501; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 2502; SSE-NEXT: cvtdq2ps %xmm0, %xmm1 2503; SSE-NEXT: movaps %xmm2, %xmm0 2504; SSE-NEXT: retq 2505; 2506; AVX1-LABEL: uitofp_8i8_to_8f32: 2507; AVX1: # BB#0: 2508; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 2509; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 2510; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 2511; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 2512; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 2513; AVX1-NEXT: retq 2514; 2515; AVX2-LABEL: uitofp_8i8_to_8f32: 2516; AVX2: # BB#0: 2517; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero 2518; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 2519; AVX2-NEXT: retq 2520; 2521; AVX512-LABEL: uitofp_8i8_to_8f32: 2522; AVX512: # BB#0: 2523; AVX512-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero 2524; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 2525; AVX512-NEXT: retq 2526 %shuf = shufflevector <16 x i8> %a, <16 x i8> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 2527 %cvt = uitofp <8 x i8> %shuf to <8 x float> 2528 ret <8 x float> %cvt 2529} 2530 2531define <8 x float> @uitofp_16i8_to_8f32(<16 x i8> %a) { 2532; SSE-LABEL: uitofp_16i8_to_8f32: 2533; SSE: # BB#0: 2534; SSE-NEXT: pxor %xmm1, %xmm1 2535; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 2536; SSE-NEXT: movdqa %xmm0, %xmm2 2537; SSE-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm1[0],xmm2[1],xmm1[1],xmm2[2],xmm1[2],xmm2[3],xmm1[3] 2538; SSE-NEXT: cvtdq2ps %xmm2, %xmm2 2539; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 2540; SSE-NEXT: cvtdq2ps %xmm0, %xmm1 2541; SSE-NEXT: movaps %xmm2, %xmm0 2542; SSE-NEXT: retq 2543; 2544; AVX1-LABEL: uitofp_16i8_to_8f32: 2545; AVX1: # BB#0: 2546; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm1 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 2547; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[1,1,2,3] 2548; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 2549; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 2550; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 2551; AVX1-NEXT: retq 2552; 2553; AVX2-LABEL: uitofp_16i8_to_8f32: 2554; AVX2: # BB#0: 2555; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero 2556; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 2557; AVX2-NEXT: retq 2558; 2559; AVX512-LABEL: uitofp_16i8_to_8f32: 2560; AVX512: # BB#0: 2561; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 2562; AVX512-NEXT: vcvtdq2ps %zmm0, %zmm0 2563; AVX512-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 2564; AVX512-NEXT: retq 2565 %cvt = uitofp <16 x i8> %a to <16 x float> 2566 %shuf = shufflevector <16 x float> %cvt, <16 x float> undef, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> 2567 ret <8 x float> %shuf 2568} 2569 2570; 2571; Load Signed Integer to Double 2572; 2573 2574define <2 x double> @sitofp_load_2i64_to_2f64(<2 x i64> *%a) { 2575; SSE-LABEL: sitofp_load_2i64_to_2f64: 2576; SSE: # BB#0: 2577; SSE-NEXT: movdqa (%rdi), %xmm1 2578; SSE-NEXT: movd %xmm1, %rax 2579; SSE-NEXT: cvtsi2sdq %rax, %xmm0 2580; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 2581; SSE-NEXT: movd %xmm1, %rax 2582; SSE-NEXT: xorps %xmm1, %xmm1 2583; SSE-NEXT: cvtsi2sdq %rax, %xmm1 2584; SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2585; SSE-NEXT: retq 2586; 2587; VEX-LABEL: sitofp_load_2i64_to_2f64: 2588; VEX: # BB#0: 2589; VEX-NEXT: vmovdqa (%rdi), %xmm0 2590; VEX-NEXT: vpextrq $1, %xmm0, %rax 2591; VEX-NEXT: vcvtsi2sdq %rax, %xmm1, %xmm1 2592; VEX-NEXT: vmovq %xmm0, %rax 2593; VEX-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm0 2594; VEX-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2595; VEX-NEXT: retq 2596; 2597; AVX512F-LABEL: sitofp_load_2i64_to_2f64: 2598; AVX512F: # BB#0: 2599; AVX512F-NEXT: vmovdqa (%rdi), %xmm0 2600; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 2601; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm1, %xmm1 2602; AVX512F-NEXT: vmovq %xmm0, %rax 2603; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm0 2604; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2605; AVX512F-NEXT: retq 2606; 2607; AVX512VL-LABEL: sitofp_load_2i64_to_2f64: 2608; AVX512VL: # BB#0: 2609; AVX512VL-NEXT: vmovdqa64 (%rdi), %xmm0 2610; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 2611; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm1, %xmm1 2612; AVX512VL-NEXT: vmovq %xmm0, %rax 2613; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm0 2614; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2615; AVX512VL-NEXT: retq 2616; 2617; AVX512DQ-LABEL: sitofp_load_2i64_to_2f64: 2618; AVX512DQ: # BB#0: 2619; AVX512DQ-NEXT: vmovaps (%rdi), %xmm0 2620; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0 2621; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 2622; AVX512DQ-NEXT: retq 2623; 2624; AVX512VLDQ-LABEL: sitofp_load_2i64_to_2f64: 2625; AVX512VLDQ: # BB#0: 2626; AVX512VLDQ-NEXT: vcvtqq2pd (%rdi), %xmm0 2627; AVX512VLDQ-NEXT: retq 2628 %ld = load <2 x i64>, <2 x i64> *%a 2629 %cvt = sitofp <2 x i64> %ld to <2 x double> 2630 ret <2 x double> %cvt 2631} 2632 2633define <2 x double> @sitofp_load_2i32_to_2f64(<2 x i32> *%a) { 2634; SSE-LABEL: sitofp_load_2i32_to_2f64: 2635; SSE: # BB#0: 2636; SSE-NEXT: cvtdq2pd (%rdi), %xmm0 2637; SSE-NEXT: retq 2638; 2639; VEX-LABEL: sitofp_load_2i32_to_2f64: 2640; VEX: # BB#0: 2641; VEX-NEXT: vcvtdq2pd (%rdi), %xmm0 2642; VEX-NEXT: retq 2643; 2644; AVX512F-LABEL: sitofp_load_2i32_to_2f64: 2645; AVX512F: # BB#0: 2646; AVX512F-NEXT: vcvtdq2pd (%rdi), %xmm0 2647; AVX512F-NEXT: retq 2648; 2649; AVX512VL-LABEL: sitofp_load_2i32_to_2f64: 2650; AVX512VL: # BB#0: 2651; AVX512VL-NEXT: vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero 2652; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2653; AVX512VL-NEXT: vcvtdq2pd %xmm0, %xmm0 2654; AVX512VL-NEXT: retq 2655; 2656; AVX512DQ-LABEL: sitofp_load_2i32_to_2f64: 2657; AVX512DQ: # BB#0: 2658; AVX512DQ-NEXT: vcvtdq2pd (%rdi), %xmm0 2659; AVX512DQ-NEXT: retq 2660; 2661; AVX512VLDQ-LABEL: sitofp_load_2i32_to_2f64: 2662; AVX512VLDQ: # BB#0: 2663; AVX512VLDQ-NEXT: vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero 2664; AVX512VLDQ-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2665; AVX512VLDQ-NEXT: vcvtdq2pd %xmm0, %xmm0 2666; AVX512VLDQ-NEXT: retq 2667 %ld = load <2 x i32>, <2 x i32> *%a 2668 %cvt = sitofp <2 x i32> %ld to <2 x double> 2669 ret <2 x double> %cvt 2670} 2671 2672define <2 x double> @sitofp_load_2i16_to_2f64(<2 x i16> *%a) { 2673; SSE-LABEL: sitofp_load_2i16_to_2f64: 2674; SSE: # BB#0: 2675; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 2676; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 2677; SSE-NEXT: psrad $16, %xmm0 2678; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 2679; SSE-NEXT: retq 2680; 2681; AVX-LABEL: sitofp_load_2i16_to_2f64: 2682; AVX: # BB#0: 2683; AVX-NEXT: vpmovsxwq (%rdi), %xmm0 2684; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2685; AVX-NEXT: vcvtdq2pd %xmm0, %xmm0 2686; AVX-NEXT: retq 2687 %ld = load <2 x i16>, <2 x i16> *%a 2688 %cvt = sitofp <2 x i16> %ld to <2 x double> 2689 ret <2 x double> %cvt 2690} 2691 2692define <2 x double> @sitofp_load_2i8_to_2f64(<2 x i8> *%a) { 2693; SSE-LABEL: sitofp_load_2i8_to_2f64: 2694; SSE: # BB#0: 2695; SSE-NEXT: movzwl (%rdi), %eax 2696; SSE-NEXT: movd %eax, %xmm0 2697; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2698; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 2699; SSE-NEXT: psrad $24, %xmm0 2700; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 2701; SSE-NEXT: retq 2702; 2703; AVX-LABEL: sitofp_load_2i8_to_2f64: 2704; AVX: # BB#0: 2705; AVX-NEXT: vpmovsxbq (%rdi), %xmm0 2706; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2707; AVX-NEXT: vcvtdq2pd %xmm0, %xmm0 2708; AVX-NEXT: retq 2709 %ld = load <2 x i8>, <2 x i8> *%a 2710 %cvt = sitofp <2 x i8> %ld to <2 x double> 2711 ret <2 x double> %cvt 2712} 2713 2714define <4 x double> @sitofp_load_4i64_to_4f64(<4 x i64> *%a) { 2715; SSE-LABEL: sitofp_load_4i64_to_4f64: 2716; SSE: # BB#0: 2717; SSE-NEXT: movdqa (%rdi), %xmm1 2718; SSE-NEXT: movdqa 16(%rdi), %xmm2 2719; SSE-NEXT: movd %xmm1, %rax 2720; SSE-NEXT: cvtsi2sdq %rax, %xmm0 2721; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 2722; SSE-NEXT: movd %xmm1, %rax 2723; SSE-NEXT: xorps %xmm1, %xmm1 2724; SSE-NEXT: cvtsi2sdq %rax, %xmm1 2725; SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2726; SSE-NEXT: movd %xmm2, %rax 2727; SSE-NEXT: xorps %xmm1, %xmm1 2728; SSE-NEXT: cvtsi2sdq %rax, %xmm1 2729; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] 2730; SSE-NEXT: movd %xmm2, %rax 2731; SSE-NEXT: xorps %xmm2, %xmm2 2732; SSE-NEXT: cvtsi2sdq %rax, %xmm2 2733; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2734; SSE-NEXT: retq 2735; 2736; AVX1-LABEL: sitofp_load_4i64_to_4f64: 2737; AVX1: # BB#0: 2738; AVX1-NEXT: vmovaps (%rdi), %ymm0 2739; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 2740; AVX1-NEXT: vpextrq $1, %xmm1, %rax 2741; AVX1-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm2 2742; AVX1-NEXT: vmovq %xmm1, %rax 2743; AVX1-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm1 2744; AVX1-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2745; AVX1-NEXT: vpextrq $1, %xmm0, %rax 2746; AVX1-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm2 2747; AVX1-NEXT: vmovq %xmm0, %rax 2748; AVX1-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm0 2749; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2750; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 2751; AVX1-NEXT: retq 2752; 2753; AVX2-LABEL: sitofp_load_4i64_to_4f64: 2754; AVX2: # BB#0: 2755; AVX2-NEXT: vmovdqa (%rdi), %ymm0 2756; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 2757; AVX2-NEXT: vpextrq $1, %xmm1, %rax 2758; AVX2-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm2 2759; AVX2-NEXT: vmovq %xmm1, %rax 2760; AVX2-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm1 2761; AVX2-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2762; AVX2-NEXT: vpextrq $1, %xmm0, %rax 2763; AVX2-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm2 2764; AVX2-NEXT: vmovq %xmm0, %rax 2765; AVX2-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm0 2766; AVX2-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2767; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 2768; AVX2-NEXT: retq 2769; 2770; AVX512F-LABEL: sitofp_load_4i64_to_4f64: 2771; AVX512F: # BB#0: 2772; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 2773; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1 2774; AVX512F-NEXT: vpextrq $1, %xmm1, %rax 2775; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm2 2776; AVX512F-NEXT: vmovq %xmm1, %rax 2777; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm1 2778; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2779; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 2780; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm2 2781; AVX512F-NEXT: vmovq %xmm0, %rax 2782; AVX512F-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm0 2783; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2784; AVX512F-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 2785; AVX512F-NEXT: retq 2786; 2787; AVX512VL-LABEL: sitofp_load_4i64_to_4f64: 2788; AVX512VL: # BB#0: 2789; AVX512VL-NEXT: vmovdqa64 (%rdi), %ymm0 2790; AVX512VL-NEXT: vextracti32x4 $1, %ymm0, %xmm1 2791; AVX512VL-NEXT: vpextrq $1, %xmm1, %rax 2792; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm2, %xmm2 2793; AVX512VL-NEXT: vmovq %xmm1, %rax 2794; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm1 2795; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 2796; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 2797; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm2 2798; AVX512VL-NEXT: vmovq %xmm0, %rax 2799; AVX512VL-NEXT: vcvtsi2sdq %rax, %xmm3, %xmm0 2800; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 2801; AVX512VL-NEXT: vinsertf32x4 $1, %xmm1, %ymm0, %ymm0 2802; AVX512VL-NEXT: retq 2803; 2804; AVX512DQ-LABEL: sitofp_load_4i64_to_4f64: 2805; AVX512DQ: # BB#0: 2806; AVX512DQ-NEXT: vmovaps (%rdi), %ymm0 2807; AVX512DQ-NEXT: vcvtqq2pd %zmm0, %zmm0 2808; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 2809; AVX512DQ-NEXT: retq 2810; 2811; AVX512VLDQ-LABEL: sitofp_load_4i64_to_4f64: 2812; AVX512VLDQ: # BB#0: 2813; AVX512VLDQ-NEXT: vcvtqq2pd (%rdi), %ymm0 2814; AVX512VLDQ-NEXT: retq 2815 %ld = load <4 x i64>, <4 x i64> *%a 2816 %cvt = sitofp <4 x i64> %ld to <4 x double> 2817 ret <4 x double> %cvt 2818} 2819 2820define <4 x double> @sitofp_load_4i32_to_4f64(<4 x i32> *%a) { 2821; SSE-LABEL: sitofp_load_4i32_to_4f64: 2822; SSE: # BB#0: 2823; SSE-NEXT: movdqa (%rdi), %xmm1 2824; SSE-NEXT: cvtdq2pd %xmm1, %xmm0 2825; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 2826; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 2827; SSE-NEXT: retq 2828; 2829; AVX-LABEL: sitofp_load_4i32_to_4f64: 2830; AVX: # BB#0: 2831; AVX-NEXT: vcvtdq2pd (%rdi), %ymm0 2832; AVX-NEXT: retq 2833 %ld = load <4 x i32>, <4 x i32> *%a 2834 %cvt = sitofp <4 x i32> %ld to <4 x double> 2835 ret <4 x double> %cvt 2836} 2837 2838define <4 x double> @sitofp_load_4i16_to_4f64(<4 x i16> *%a) { 2839; SSE-LABEL: sitofp_load_4i16_to_4f64: 2840; SSE: # BB#0: 2841; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 2842; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 2843; SSE-NEXT: psrad $16, %xmm1 2844; SSE-NEXT: cvtdq2pd %xmm1, %xmm0 2845; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 2846; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 2847; SSE-NEXT: retq 2848; 2849; AVX-LABEL: sitofp_load_4i16_to_4f64: 2850; AVX: # BB#0: 2851; AVX-NEXT: vpmovsxwd (%rdi), %xmm0 2852; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0 2853; AVX-NEXT: retq 2854 %ld = load <4 x i16>, <4 x i16> *%a 2855 %cvt = sitofp <4 x i16> %ld to <4 x double> 2856 ret <4 x double> %cvt 2857} 2858 2859define <4 x double> @sitofp_load_4i8_to_4f64(<4 x i8> *%a) { 2860; SSE-LABEL: sitofp_load_4i8_to_4f64: 2861; SSE: # BB#0: 2862; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 2863; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 2864; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 2865; SSE-NEXT: psrad $24, %xmm1 2866; SSE-NEXT: cvtdq2pd %xmm1, %xmm0 2867; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 2868; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 2869; SSE-NEXT: retq 2870; 2871; AVX-LABEL: sitofp_load_4i8_to_4f64: 2872; AVX: # BB#0: 2873; AVX-NEXT: vpmovsxbd (%rdi), %xmm0 2874; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0 2875; AVX-NEXT: retq 2876 %ld = load <4 x i8>, <4 x i8> *%a 2877 %cvt = sitofp <4 x i8> %ld to <4 x double> 2878 ret <4 x double> %cvt 2879} 2880 2881; 2882; Load Unsigned Integer to Double 2883; 2884 2885define <2 x double> @uitofp_load_2i64_to_2f64(<2 x i64> *%a) { 2886; SSE-LABEL: uitofp_load_2i64_to_2f64: 2887; SSE: # BB#0: 2888; SSE-NEXT: movdqa (%rdi), %xmm1 2889; SSE-NEXT: movdqa {{.*#+}} xmm2 = [1127219200,1160773632,0,0] 2890; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm1[2,3,0,1] 2891; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 2892; SSE-NEXT: movapd {{.*#+}} xmm4 = [4.503600e+15,1.934281e+25] 2893; SSE-NEXT: subpd %xmm4, %xmm1 2894; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 2895; SSE-NEXT: addpd %xmm1, %xmm0 2896; SSE-NEXT: punpckldq {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] 2897; SSE-NEXT: subpd %xmm4, %xmm3 2898; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm3[2,3,0,1] 2899; SSE-NEXT: addpd %xmm3, %xmm1 2900; SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2901; SSE-NEXT: retq 2902; 2903; VEX-LABEL: uitofp_load_2i64_to_2f64: 2904; VEX: # BB#0: 2905; VEX-NEXT: vmovdqa (%rdi), %xmm0 2906; VEX-NEXT: vmovdqa {{.*#+}} xmm1 = [1127219200,1160773632,0,0] 2907; VEX-NEXT: vpunpckldq {{.*#+}} xmm2 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 2908; VEX-NEXT: vmovapd {{.*#+}} xmm3 = [4.503600e+15,1.934281e+25] 2909; VEX-NEXT: vsubpd %xmm3, %xmm2, %xmm2 2910; VEX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 2911; VEX-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 2912; VEX-NEXT: vsubpd %xmm3, %xmm0, %xmm0 2913; VEX-NEXT: vhaddpd %xmm0, %xmm2, %xmm0 2914; VEX-NEXT: retq 2915; 2916; AVX512F-LABEL: uitofp_load_2i64_to_2f64: 2917; AVX512F: # BB#0: 2918; AVX512F-NEXT: vmovdqa (%rdi), %xmm0 2919; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 2920; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm1, %xmm1 2921; AVX512F-NEXT: vmovq %xmm0, %rax 2922; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm2, %xmm0 2923; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2924; AVX512F-NEXT: retq 2925; 2926; AVX512VL-LABEL: uitofp_load_2i64_to_2f64: 2927; AVX512VL: # BB#0: 2928; AVX512VL-NEXT: vmovdqa64 (%rdi), %xmm0 2929; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 2930; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm1, %xmm1 2931; AVX512VL-NEXT: vmovq %xmm0, %rax 2932; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm2, %xmm0 2933; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 2934; AVX512VL-NEXT: retq 2935; 2936; AVX512DQ-LABEL: uitofp_load_2i64_to_2f64: 2937; AVX512DQ: # BB#0: 2938; AVX512DQ-NEXT: vmovaps (%rdi), %xmm0 2939; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0 2940; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 2941; AVX512DQ-NEXT: retq 2942; 2943; AVX512VLDQ-LABEL: uitofp_load_2i64_to_2f64: 2944; AVX512VLDQ: # BB#0: 2945; AVX512VLDQ-NEXT: vcvtuqq2pd (%rdi), %xmm0 2946; AVX512VLDQ-NEXT: retq 2947 %ld = load <2 x i64>, <2 x i64> *%a 2948 %cvt = uitofp <2 x i64> %ld to <2 x double> 2949 ret <2 x double> %cvt 2950} 2951 2952define <2 x double> @uitofp_load_2i32_to_2f64(<2 x i32> *%a) { 2953; SSE-LABEL: uitofp_load_2i32_to_2f64: 2954; SSE: # BB#0: 2955; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 2956; SSE-NEXT: movdqa {{.*#+}} xmm1 = [65535,0,65535,0,65535,0,65535,0] 2957; SSE-NEXT: pand %xmm0, %xmm1 2958; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 2959; SSE-NEXT: psrld $16, %xmm0 2960; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 2961; SSE-NEXT: mulpd {{.*}}(%rip), %xmm0 2962; SSE-NEXT: addpd %xmm1, %xmm0 2963; SSE-NEXT: retq 2964; 2965; VEX-LABEL: uitofp_load_2i32_to_2f64: 2966; VEX: # BB#0: 2967; VEX-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero 2968; VEX-NEXT: vpxor %xmm1, %xmm1, %xmm1 2969; VEX-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 2970; VEX-NEXT: vcvtdq2pd %xmm1, %xmm1 2971; VEX-NEXT: vpsrld $16, %xmm0, %xmm0 2972; VEX-NEXT: vcvtdq2pd %xmm0, %xmm0 2973; VEX-NEXT: vmulpd {{.*}}(%rip), %xmm0, %xmm0 2974; VEX-NEXT: vaddpd %xmm1, %xmm0, %xmm0 2975; VEX-NEXT: retq 2976; 2977; AVX512F-LABEL: uitofp_load_2i32_to_2f64: 2978; AVX512F: # BB#0: 2979; AVX512F-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero 2980; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0 2981; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 2982; AVX512F-NEXT: retq 2983; 2984; AVX512VL-LABEL: uitofp_load_2i32_to_2f64: 2985; AVX512VL: # BB#0: 2986; AVX512VL-NEXT: vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero 2987; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 2988; AVX512VL-NEXT: vcvtudq2pd %xmm0, %xmm0 2989; AVX512VL-NEXT: retq 2990; 2991; AVX512DQ-LABEL: uitofp_load_2i32_to_2f64: 2992; AVX512DQ: # BB#0: 2993; AVX512DQ-NEXT: vmovq {{.*#+}} xmm0 = mem[0],zero 2994; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0 2995; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 2996; AVX512DQ-NEXT: retq 2997; 2998; AVX512VLDQ-LABEL: uitofp_load_2i32_to_2f64: 2999; AVX512VLDQ: # BB#0: 3000; AVX512VLDQ-NEXT: vpmovzxdq {{.*#+}} xmm0 = mem[0],zero,mem[1],zero 3001; AVX512VLDQ-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3002; AVX512VLDQ-NEXT: vcvtudq2pd %xmm0, %xmm0 3003; AVX512VLDQ-NEXT: retq 3004 %ld = load <2 x i32>, <2 x i32> *%a 3005 %cvt = uitofp <2 x i32> %ld to <2 x double> 3006 ret <2 x double> %cvt 3007} 3008 3009define <2 x double> @uitofp_load_2i16_to_2f64(<2 x i16> *%a) { 3010; SSE-LABEL: uitofp_load_2i16_to_2f64: 3011; SSE: # BB#0: 3012; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 3013; SSE-NEXT: pxor %xmm1, %xmm1 3014; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 3015; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 3016; SSE-NEXT: retq 3017; 3018; VEX-LABEL: uitofp_load_2i16_to_2f64: 3019; VEX: # BB#0: 3020; VEX-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero 3021; VEX-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 3022; VEX-NEXT: vcvtdq2pd %xmm0, %xmm0 3023; VEX-NEXT: retq 3024; 3025; AVX512F-LABEL: uitofp_load_2i16_to_2f64: 3026; AVX512F: # BB#0: 3027; AVX512F-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero 3028; AVX512F-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 3029; AVX512F-NEXT: vcvtdq2pd %xmm0, %xmm0 3030; AVX512F-NEXT: retq 3031; 3032; AVX512VL-LABEL: uitofp_load_2i16_to_2f64: 3033; AVX512VL: # BB#0: 3034; AVX512VL-NEXT: vpmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero 3035; AVX512VL-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3036; AVX512VL-NEXT: vpxord %xmm1, %xmm1, %xmm1 3037; AVX512VL-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3,4,5,6,7] 3038; AVX512VL-NEXT: vcvtdq2pd %xmm0, %xmm0 3039; AVX512VL-NEXT: retq 3040; 3041; AVX512DQ-LABEL: uitofp_load_2i16_to_2f64: 3042; AVX512DQ: # BB#0: 3043; AVX512DQ-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero 3044; AVX512DQ-NEXT: vpmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 3045; AVX512DQ-NEXT: vcvtdq2pd %xmm0, %xmm0 3046; AVX512DQ-NEXT: retq 3047; 3048; AVX512VLDQ-LABEL: uitofp_load_2i16_to_2f64: 3049; AVX512VLDQ: # BB#0: 3050; AVX512VLDQ-NEXT: vpmovzxwq {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero 3051; AVX512VLDQ-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 3052; AVX512VLDQ-NEXT: vpxord %xmm1, %xmm1, %xmm1 3053; AVX512VLDQ-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3,4,5,6,7] 3054; AVX512VLDQ-NEXT: vcvtdq2pd %xmm0, %xmm0 3055; AVX512VLDQ-NEXT: retq 3056 %ld = load <2 x i16>, <2 x i16> *%a 3057 %cvt = uitofp <2 x i16> %ld to <2 x double> 3058 ret <2 x double> %cvt 3059} 3060 3061define <2 x double> @uitofp_load_2i8_to_2f64(<2 x i8> *%a) { 3062; SSE-LABEL: uitofp_load_2i8_to_2f64: 3063; SSE: # BB#0: 3064; SSE-NEXT: movzwl (%rdi), %eax 3065; SSE-NEXT: movd %eax, %xmm0 3066; SSE-NEXT: pxor %xmm1, %xmm1 3067; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 3068; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 3069; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 3070; SSE-NEXT: retq 3071; 3072; VEX-LABEL: uitofp_load_2i8_to_2f64: 3073; VEX: # BB#0: 3074; VEX-NEXT: movzwl (%rdi), %eax 3075; VEX-NEXT: vmovd %eax, %xmm0 3076; VEX-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 3077; VEX-NEXT: vcvtdq2pd %xmm0, %xmm0 3078; VEX-NEXT: retq 3079; 3080; AVX512F-LABEL: uitofp_load_2i8_to_2f64: 3081; AVX512F: # BB#0: 3082; AVX512F-NEXT: movzwl (%rdi), %eax 3083; AVX512F-NEXT: vmovd %eax, %xmm0 3084; AVX512F-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 3085; AVX512F-NEXT: vcvtdq2pd %xmm0, %xmm0 3086; AVX512F-NEXT: retq 3087; 3088; AVX512VL-LABEL: uitofp_load_2i8_to_2f64: 3089; AVX512VL: # BB#0: 3090; AVX512VL-NEXT: vpmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero 3091; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[u],zero,zero,zero,xmm0[u],zero,zero,zero 3092; AVX512VL-NEXT: vcvtdq2pd %xmm0, %xmm0 3093; AVX512VL-NEXT: retq 3094; 3095; AVX512DQ-LABEL: uitofp_load_2i8_to_2f64: 3096; AVX512DQ: # BB#0: 3097; AVX512DQ-NEXT: movzwl (%rdi), %eax 3098; AVX512DQ-NEXT: vmovd %eax, %xmm0 3099; AVX512DQ-NEXT: vpmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 3100; AVX512DQ-NEXT: vcvtdq2pd %xmm0, %xmm0 3101; AVX512DQ-NEXT: retq 3102; 3103; AVX512VLDQ-LABEL: uitofp_load_2i8_to_2f64: 3104; AVX512VLDQ: # BB#0: 3105; AVX512VLDQ-NEXT: vpmovzxbq {{.*#+}} xmm0 = mem[0],zero,zero,zero,zero,zero,zero,zero,mem[1],zero,zero,zero,zero,zero,zero,zero 3106; AVX512VLDQ-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[u],zero,zero,zero,xmm0[u],zero,zero,zero 3107; AVX512VLDQ-NEXT: vcvtdq2pd %xmm0, %xmm0 3108; AVX512VLDQ-NEXT: retq 3109 %ld = load <2 x i8>, <2 x i8> *%a 3110 %cvt = uitofp <2 x i8> %ld to <2 x double> 3111 ret <2 x double> %cvt 3112} 3113 3114define <4 x double> @uitofp_load_4i64_to_4f64(<4 x i64> *%a) { 3115; SSE-LABEL: uitofp_load_4i64_to_4f64: 3116; SSE: # BB#0: 3117; SSE-NEXT: movdqa (%rdi), %xmm1 3118; SSE-NEXT: movdqa 16(%rdi), %xmm2 3119; SSE-NEXT: movdqa {{.*#+}} xmm3 = [1127219200,1160773632,0,0] 3120; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm1[2,3,0,1] 3121; SSE-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 3122; SSE-NEXT: movapd {{.*#+}} xmm5 = [4.503600e+15,1.934281e+25] 3123; SSE-NEXT: subpd %xmm5, %xmm1 3124; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] 3125; SSE-NEXT: addpd %xmm1, %xmm0 3126; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1] 3127; SSE-NEXT: subpd %xmm5, %xmm4 3128; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm4[2,3,0,1] 3129; SSE-NEXT: addpd %xmm4, %xmm1 3130; SSE-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0] 3131; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm2[2,3,0,1] 3132; SSE-NEXT: punpckldq {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 3133; SSE-NEXT: subpd %xmm5, %xmm2 3134; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm2[2,3,0,1] 3135; SSE-NEXT: addpd %xmm2, %xmm1 3136; SSE-NEXT: punpckldq {{.*#+}} xmm4 = xmm4[0],xmm3[0],xmm4[1],xmm3[1] 3137; SSE-NEXT: subpd %xmm5, %xmm4 3138; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm4[2,3,0,1] 3139; SSE-NEXT: addpd %xmm4, %xmm2 3140; SSE-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 3141; SSE-NEXT: retq 3142; 3143; AVX1-LABEL: uitofp_load_4i64_to_4f64: 3144; AVX1: # BB#0: 3145; AVX1-NEXT: vmovaps (%rdi), %ymm0 3146; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 3147; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [1127219200,1160773632,0,0] 3148; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 3149; AVX1-NEXT: vmovapd {{.*#+}} xmm4 = [4.503600e+15,1.934281e+25] 3150; AVX1-NEXT: vsubpd %xmm4, %xmm3, %xmm3 3151; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 3152; AVX1-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 3153; AVX1-NEXT: vsubpd %xmm4, %xmm1, %xmm1 3154; AVX1-NEXT: vhaddpd %xmm1, %xmm3, %xmm1 3155; AVX1-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 3156; AVX1-NEXT: vsubpd %xmm4, %xmm3, %xmm3 3157; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 3158; AVX1-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 3159; AVX1-NEXT: vsubpd %xmm4, %xmm0, %xmm0 3160; AVX1-NEXT: vhaddpd %xmm0, %xmm3, %xmm0 3161; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 3162; AVX1-NEXT: retq 3163; 3164; AVX2-LABEL: uitofp_load_4i64_to_4f64: 3165; AVX2: # BB#0: 3166; AVX2-NEXT: vmovdqa (%rdi), %ymm0 3167; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 3168; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = [1127219200,1160773632,0,0] 3169; AVX2-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 3170; AVX2-NEXT: vmovapd {{.*#+}} xmm4 = [4.503600e+15,1.934281e+25] 3171; AVX2-NEXT: vsubpd %xmm4, %xmm3, %xmm3 3172; AVX2-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 3173; AVX2-NEXT: vpunpckldq {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 3174; AVX2-NEXT: vsubpd %xmm4, %xmm1, %xmm1 3175; AVX2-NEXT: vhaddpd %xmm1, %xmm3, %xmm1 3176; AVX2-NEXT: vpunpckldq {{.*#+}} xmm3 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 3177; AVX2-NEXT: vsubpd %xmm4, %xmm3, %xmm3 3178; AVX2-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 3179; AVX2-NEXT: vpunpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 3180; AVX2-NEXT: vsubpd %xmm4, %xmm0, %xmm0 3181; AVX2-NEXT: vhaddpd %xmm0, %xmm3, %xmm0 3182; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 3183; AVX2-NEXT: retq 3184; 3185; AVX512F-LABEL: uitofp_load_4i64_to_4f64: 3186; AVX512F: # BB#0: 3187; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 3188; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm1 3189; AVX512F-NEXT: vpextrq $1, %xmm1, %rax 3190; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm2, %xmm2 3191; AVX512F-NEXT: vmovq %xmm1, %rax 3192; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm1 3193; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 3194; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 3195; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm2 3196; AVX512F-NEXT: vmovq %xmm0, %rax 3197; AVX512F-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm0 3198; AVX512F-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3199; AVX512F-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 3200; AVX512F-NEXT: retq 3201; 3202; AVX512VL-LABEL: uitofp_load_4i64_to_4f64: 3203; AVX512VL: # BB#0: 3204; AVX512VL-NEXT: vmovdqa64 (%rdi), %ymm0 3205; AVX512VL-NEXT: vextracti32x4 $1, %ymm0, %xmm1 3206; AVX512VL-NEXT: vpextrq $1, %xmm1, %rax 3207; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm2, %xmm2 3208; AVX512VL-NEXT: vmovq %xmm1, %rax 3209; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm1 3210; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0] 3211; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 3212; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm2 3213; AVX512VL-NEXT: vmovq %xmm0, %rax 3214; AVX512VL-NEXT: vcvtusi2sdq %rax, %xmm3, %xmm0 3215; AVX512VL-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],xmm2[0] 3216; AVX512VL-NEXT: vinsertf32x4 $1, %xmm1, %ymm0, %ymm0 3217; AVX512VL-NEXT: retq 3218; 3219; AVX512DQ-LABEL: uitofp_load_4i64_to_4f64: 3220; AVX512DQ: # BB#0: 3221; AVX512DQ-NEXT: vmovaps (%rdi), %ymm0 3222; AVX512DQ-NEXT: vcvtuqq2pd %zmm0, %zmm0 3223; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 3224; AVX512DQ-NEXT: retq 3225; 3226; AVX512VLDQ-LABEL: uitofp_load_4i64_to_4f64: 3227; AVX512VLDQ: # BB#0: 3228; AVX512VLDQ-NEXT: vcvtuqq2pd (%rdi), %ymm0 3229; AVX512VLDQ-NEXT: retq 3230 %ld = load <4 x i64>, <4 x i64> *%a 3231 %cvt = uitofp <4 x i64> %ld to <4 x double> 3232 ret <4 x double> %cvt 3233} 3234 3235define <4 x double> @uitofp_load_4i32_to_4f64(<4 x i32> *%a) { 3236; SSE-LABEL: uitofp_load_4i32_to_4f64: 3237; SSE: # BB#0: 3238; SSE-NEXT: movdqa (%rdi), %xmm0 3239; SSE-NEXT: movdqa %xmm0, %xmm1 3240; SSE-NEXT: psrld $16, %xmm1 3241; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 3242; SSE-NEXT: movapd {{.*#+}} xmm2 = [6.553600e+04,6.553600e+04] 3243; SSE-NEXT: mulpd %xmm2, %xmm1 3244; SSE-NEXT: movdqa {{.*#+}} xmm3 = [65535,0,65535,0,65535,0,65535,0] 3245; SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm0[2,3,0,1] 3246; SSE-NEXT: pand %xmm3, %xmm0 3247; SSE-NEXT: cvtdq2pd %xmm0, %xmm0 3248; SSE-NEXT: addpd %xmm1, %xmm0 3249; SSE-NEXT: movdqa %xmm4, %xmm1 3250; SSE-NEXT: psrld $16, %xmm1 3251; SSE-NEXT: cvtdq2pd %xmm1, %xmm5 3252; SSE-NEXT: mulpd %xmm2, %xmm5 3253; SSE-NEXT: pand %xmm3, %xmm4 3254; SSE-NEXT: cvtdq2pd %xmm4, %xmm1 3255; SSE-NEXT: addpd %xmm5, %xmm1 3256; SSE-NEXT: retq 3257; 3258; AVX1-LABEL: uitofp_load_4i32_to_4f64: 3259; AVX1: # BB#0: 3260; AVX1-NEXT: vmovdqa (%rdi), %xmm0 3261; AVX1-NEXT: vpxor %xmm1, %xmm1, %xmm1 3262; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 3263; AVX1-NEXT: vcvtdq2pd %xmm1, %ymm1 3264; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 3265; AVX1-NEXT: vcvtdq2pd %xmm0, %ymm0 3266; AVX1-NEXT: vmulpd {{.*}}(%rip), %ymm0, %ymm0 3267; AVX1-NEXT: vaddpd %ymm1, %ymm0, %ymm0 3268; AVX1-NEXT: retq 3269; 3270; AVX2-LABEL: uitofp_load_4i32_to_4f64: 3271; AVX2: # BB#0: 3272; AVX2-NEXT: vmovdqa (%rdi), %xmm0 3273; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1 3274; AVX2-NEXT: vcvtdq2pd %xmm1, %ymm1 3275; AVX2-NEXT: vbroadcastsd {{.*}}(%rip), %ymm2 3276; AVX2-NEXT: vmulpd %ymm2, %ymm1, %ymm1 3277; AVX2-NEXT: vxorpd %xmm2, %xmm2, %xmm2 3278; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 3279; AVX2-NEXT: vcvtdq2pd %xmm0, %ymm0 3280; AVX2-NEXT: vaddpd %ymm0, %ymm1, %ymm0 3281; AVX2-NEXT: retq 3282; 3283; AVX512F-LABEL: uitofp_load_4i32_to_4f64: 3284; AVX512F: # BB#0: 3285; AVX512F-NEXT: vmovaps (%rdi), %xmm0 3286; AVX512F-NEXT: vcvtudq2pd %ymm0, %zmm0 3287; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 3288; AVX512F-NEXT: retq 3289; 3290; AVX512VL-LABEL: uitofp_load_4i32_to_4f64: 3291; AVX512VL: # BB#0: 3292; AVX512VL-NEXT: vcvtudq2pd (%rdi), %ymm0 3293; AVX512VL-NEXT: retq 3294; 3295; AVX512DQ-LABEL: uitofp_load_4i32_to_4f64: 3296; AVX512DQ: # BB#0: 3297; AVX512DQ-NEXT: vmovaps (%rdi), %xmm0 3298; AVX512DQ-NEXT: vcvtudq2pd %ymm0, %zmm0 3299; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 3300; AVX512DQ-NEXT: retq 3301; 3302; AVX512VLDQ-LABEL: uitofp_load_4i32_to_4f64: 3303; AVX512VLDQ: # BB#0: 3304; AVX512VLDQ-NEXT: vcvtudq2pd (%rdi), %ymm0 3305; AVX512VLDQ-NEXT: retq 3306 %ld = load <4 x i32>, <4 x i32> *%a 3307 %cvt = uitofp <4 x i32> %ld to <4 x double> 3308 ret <4 x double> %cvt 3309} 3310 3311define <4 x double> @uitofp_load_4i16_to_4f64(<4 x i16> *%a) { 3312; SSE-LABEL: uitofp_load_4i16_to_4f64: 3313; SSE: # BB#0: 3314; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 3315; SSE-NEXT: pxor %xmm0, %xmm0 3316; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 3317; SSE-NEXT: cvtdq2pd %xmm1, %xmm0 3318; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 3319; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 3320; SSE-NEXT: retq 3321; 3322; AVX-LABEL: uitofp_load_4i16_to_4f64: 3323; AVX: # BB#0: 3324; AVX-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero 3325; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0 3326; AVX-NEXT: retq 3327 %ld = load <4 x i16>, <4 x i16> *%a 3328 %cvt = uitofp <4 x i16> %ld to <4 x double> 3329 ret <4 x double> %cvt 3330} 3331 3332define <4 x double> @uitofp_load_4i8_to_4f64(<4 x i8> *%a) { 3333; SSE-LABEL: uitofp_load_4i8_to_4f64: 3334; SSE: # BB#0: 3335; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 3336; SSE-NEXT: pxor %xmm0, %xmm0 3337; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 3338; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 3339; SSE-NEXT: cvtdq2pd %xmm1, %xmm0 3340; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 3341; SSE-NEXT: cvtdq2pd %xmm1, %xmm1 3342; SSE-NEXT: retq 3343; 3344; AVX-LABEL: uitofp_load_4i8_to_4f64: 3345; AVX: # BB#0: 3346; AVX-NEXT: vpmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero 3347; AVX-NEXT: vcvtdq2pd %xmm0, %ymm0 3348; AVX-NEXT: retq 3349 %ld = load <4 x i8>, <4 x i8> *%a 3350 %cvt = uitofp <4 x i8> %ld to <4 x double> 3351 ret <4 x double> %cvt 3352} 3353 3354; 3355; Load Signed Integer to Float 3356; 3357 3358define <4 x float> @sitofp_load_4i64_to_4f32(<4 x i64> *%a) { 3359; SSE-LABEL: sitofp_load_4i64_to_4f32: 3360; SSE: # BB#0: 3361; SSE-NEXT: movdqa (%rdi), %xmm1 3362; SSE-NEXT: movdqa 16(%rdi), %xmm2 3363; SSE-NEXT: movd %xmm2, %rax 3364; SSE-NEXT: cvtsi2ssq %rax, %xmm3 3365; SSE-NEXT: movd %xmm1, %rax 3366; SSE-NEXT: cvtsi2ssq %rax, %xmm0 3367; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm3[0],xmm0[1],xmm3[1] 3368; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] 3369; SSE-NEXT: movd %xmm2, %rax 3370; SSE-NEXT: xorps %xmm2, %xmm2 3371; SSE-NEXT: cvtsi2ssq %rax, %xmm2 3372; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 3373; SSE-NEXT: movd %xmm1, %rax 3374; SSE-NEXT: xorps %xmm1, %xmm1 3375; SSE-NEXT: cvtsi2ssq %rax, %xmm1 3376; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 3377; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 3378; SSE-NEXT: retq 3379; 3380; AVX1-LABEL: sitofp_load_4i64_to_4f32: 3381; AVX1: # BB#0: 3382; AVX1-NEXT: vmovdqa (%rdi), %ymm0 3383; AVX1-NEXT: vpextrq $1, %xmm0, %rax 3384; AVX1-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 3385; AVX1-NEXT: vmovq %xmm0, %rax 3386; AVX1-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3387; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 3388; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 3389; AVX1-NEXT: vmovq %xmm0, %rax 3390; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 3391; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 3392; AVX1-NEXT: vpextrq $1, %xmm0, %rax 3393; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 3394; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 3395; AVX1-NEXT: vzeroupper 3396; AVX1-NEXT: retq 3397; 3398; AVX2-LABEL: sitofp_load_4i64_to_4f32: 3399; AVX2: # BB#0: 3400; AVX2-NEXT: vmovdqa (%rdi), %ymm0 3401; AVX2-NEXT: vpextrq $1, %xmm0, %rax 3402; AVX2-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 3403; AVX2-NEXT: vmovq %xmm0, %rax 3404; AVX2-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3405; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 3406; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 3407; AVX2-NEXT: vmovq %xmm0, %rax 3408; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 3409; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 3410; AVX2-NEXT: vpextrq $1, %xmm0, %rax 3411; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 3412; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 3413; AVX2-NEXT: vzeroupper 3414; AVX2-NEXT: retq 3415; 3416; AVX512F-LABEL: sitofp_load_4i64_to_4f32: 3417; AVX512F: # BB#0: 3418; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 3419; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 3420; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 3421; AVX512F-NEXT: vmovq %xmm0, %rax 3422; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3423; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 3424; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm0 3425; AVX512F-NEXT: vmovq %xmm0, %rax 3426; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 3427; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 3428; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 3429; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 3430; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 3431; AVX512F-NEXT: retq 3432; 3433; AVX512VL-LABEL: sitofp_load_4i64_to_4f32: 3434; AVX512VL: # BB#0: 3435; AVX512VL-NEXT: vmovdqa64 (%rdi), %ymm0 3436; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 3437; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 3438; AVX512VL-NEXT: vmovq %xmm0, %rax 3439; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3440; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 3441; AVX512VL-NEXT: vextracti32x4 $1, %ymm0, %xmm0 3442; AVX512VL-NEXT: vmovq %xmm0, %rax 3443; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 3444; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 3445; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 3446; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 3447; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 3448; AVX512VL-NEXT: retq 3449; 3450; AVX512DQ-LABEL: sitofp_load_4i64_to_4f32: 3451; AVX512DQ: # BB#0: 3452; AVX512DQ-NEXT: vmovaps (%rdi), %ymm0 3453; AVX512DQ-NEXT: vcvtqq2ps %zmm0, %ymm0 3454; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 3455; AVX512DQ-NEXT: retq 3456; 3457; AVX512VLDQ-LABEL: sitofp_load_4i64_to_4f32: 3458; AVX512VLDQ: # BB#0: 3459; AVX512VLDQ-NEXT: vcvtqq2psy (%rdi), %xmm0 3460; AVX512VLDQ-NEXT: retq 3461 %ld = load <4 x i64>, <4 x i64> *%a 3462 %cvt = sitofp <4 x i64> %ld to <4 x float> 3463 ret <4 x float> %cvt 3464} 3465 3466define <4 x float> @sitofp_load_4i32_to_4f32(<4 x i32> *%a) { 3467; SSE-LABEL: sitofp_load_4i32_to_4f32: 3468; SSE: # BB#0: 3469; SSE-NEXT: cvtdq2ps (%rdi), %xmm0 3470; SSE-NEXT: retq 3471; 3472; AVX-LABEL: sitofp_load_4i32_to_4f32: 3473; AVX: # BB#0: 3474; AVX-NEXT: vcvtdq2ps (%rdi), %xmm0 3475; AVX-NEXT: retq 3476 %ld = load <4 x i32>, <4 x i32> *%a 3477 %cvt = sitofp <4 x i32> %ld to <4 x float> 3478 ret <4 x float> %cvt 3479} 3480 3481define <4 x float> @sitofp_load_4i16_to_4f32(<4 x i16> *%a) { 3482; SSE-LABEL: sitofp_load_4i16_to_4f32: 3483; SSE: # BB#0: 3484; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 3485; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 3486; SSE-NEXT: psrad $16, %xmm0 3487; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 3488; SSE-NEXT: retq 3489; 3490; AVX-LABEL: sitofp_load_4i16_to_4f32: 3491; AVX: # BB#0: 3492; AVX-NEXT: vpmovsxwd (%rdi), %xmm0 3493; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 3494; AVX-NEXT: retq 3495 %ld = load <4 x i16>, <4 x i16> *%a 3496 %cvt = sitofp <4 x i16> %ld to <4 x float> 3497 ret <4 x float> %cvt 3498} 3499 3500define <4 x float> @sitofp_load_4i8_to_4f32(<4 x i8> *%a) { 3501; SSE-LABEL: sitofp_load_4i8_to_4f32: 3502; SSE: # BB#0: 3503; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 3504; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3505; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 3506; SSE-NEXT: psrad $24, %xmm0 3507; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 3508; SSE-NEXT: retq 3509; 3510; AVX-LABEL: sitofp_load_4i8_to_4f32: 3511; AVX: # BB#0: 3512; AVX-NEXT: vpmovsxbd (%rdi), %xmm0 3513; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 3514; AVX-NEXT: retq 3515 %ld = load <4 x i8>, <4 x i8> *%a 3516 %cvt = sitofp <4 x i8> %ld to <4 x float> 3517 ret <4 x float> %cvt 3518} 3519 3520define <8 x float> @sitofp_load_8i64_to_8f32(<8 x i64> *%a) { 3521; SSE-LABEL: sitofp_load_8i64_to_8f32: 3522; SSE: # BB#0: 3523; SSE-NEXT: movdqa (%rdi), %xmm1 3524; SSE-NEXT: movdqa 16(%rdi), %xmm2 3525; SSE-NEXT: movdqa 32(%rdi), %xmm3 3526; SSE-NEXT: movdqa 48(%rdi), %xmm4 3527; SSE-NEXT: movd %xmm2, %rax 3528; SSE-NEXT: cvtsi2ssq %rax, %xmm5 3529; SSE-NEXT: movd %xmm1, %rax 3530; SSE-NEXT: cvtsi2ssq %rax, %xmm0 3531; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1] 3532; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] 3533; SSE-NEXT: movd %xmm2, %rax 3534; SSE-NEXT: xorps %xmm2, %xmm2 3535; SSE-NEXT: cvtsi2ssq %rax, %xmm2 3536; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 3537; SSE-NEXT: movd %xmm1, %rax 3538; SSE-NEXT: xorps %xmm1, %xmm1 3539; SSE-NEXT: cvtsi2ssq %rax, %xmm1 3540; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 3541; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 3542; SSE-NEXT: movd %xmm4, %rax 3543; SSE-NEXT: xorps %xmm2, %xmm2 3544; SSE-NEXT: cvtsi2ssq %rax, %xmm2 3545; SSE-NEXT: movd %xmm3, %rax 3546; SSE-NEXT: xorps %xmm1, %xmm1 3547; SSE-NEXT: cvtsi2ssq %rax, %xmm1 3548; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 3549; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm4[2,3,0,1] 3550; SSE-NEXT: movd %xmm2, %rax 3551; SSE-NEXT: xorps %xmm2, %xmm2 3552; SSE-NEXT: cvtsi2ssq %rax, %xmm2 3553; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] 3554; SSE-NEXT: movd %xmm3, %rax 3555; SSE-NEXT: xorps %xmm3, %xmm3 3556; SSE-NEXT: cvtsi2ssq %rax, %xmm3 3557; SSE-NEXT: unpcklps {{.*#+}} xmm3 = xmm3[0],xmm2[0],xmm3[1],xmm2[1] 3558; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 3559; SSE-NEXT: retq 3560; 3561; AVX1-LABEL: sitofp_load_8i64_to_8f32: 3562; AVX1: # BB#0: 3563; AVX1-NEXT: vmovdqa (%rdi), %ymm0 3564; AVX1-NEXT: vmovdqa 32(%rdi), %ymm1 3565; AVX1-NEXT: vpextrq $1, %xmm1, %rax 3566; AVX1-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3567; AVX1-NEXT: vmovq %xmm1, %rax 3568; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm3 3569; AVX1-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3] 3570; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm1 3571; AVX1-NEXT: vmovq %xmm1, %rax 3572; AVX1-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm3 3573; AVX1-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm3[0],xmm2[3] 3574; AVX1-NEXT: vpextrq $1, %xmm1, %rax 3575; AVX1-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm1 3576; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1,2],xmm1[0] 3577; AVX1-NEXT: vpextrq $1, %xmm0, %rax 3578; AVX1-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm2 3579; AVX1-NEXT: vmovq %xmm0, %rax 3580; AVX1-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm3 3581; AVX1-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3] 3582; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 3583; AVX1-NEXT: vmovq %xmm0, %rax 3584; AVX1-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm3 3585; AVX1-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm3[0],xmm2[3] 3586; AVX1-NEXT: vpextrq $1, %xmm0, %rax 3587; AVX1-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm0 3588; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[0] 3589; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 3590; AVX1-NEXT: retq 3591; 3592; AVX2-LABEL: sitofp_load_8i64_to_8f32: 3593; AVX2: # BB#0: 3594; AVX2-NEXT: vmovdqa (%rdi), %ymm0 3595; AVX2-NEXT: vmovdqa 32(%rdi), %ymm1 3596; AVX2-NEXT: vpextrq $1, %xmm1, %rax 3597; AVX2-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3598; AVX2-NEXT: vmovq %xmm1, %rax 3599; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm3 3600; AVX2-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3] 3601; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm1 3602; AVX2-NEXT: vmovq %xmm1, %rax 3603; AVX2-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm3 3604; AVX2-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm3[0],xmm2[3] 3605; AVX2-NEXT: vpextrq $1, %xmm1, %rax 3606; AVX2-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm1 3607; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0,1,2],xmm1[0] 3608; AVX2-NEXT: vpextrq $1, %xmm0, %rax 3609; AVX2-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm2 3610; AVX2-NEXT: vmovq %xmm0, %rax 3611; AVX2-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm3 3612; AVX2-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3] 3613; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 3614; AVX2-NEXT: vmovq %xmm0, %rax 3615; AVX2-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm3 3616; AVX2-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm3[0],xmm2[3] 3617; AVX2-NEXT: vpextrq $1, %xmm0, %rax 3618; AVX2-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm0 3619; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[0] 3620; AVX2-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 3621; AVX2-NEXT: retq 3622; 3623; AVX512F-LABEL: sitofp_load_8i64_to_8f32: 3624; AVX512F: # BB#0: 3625; AVX512F-NEXT: vmovdqa64 (%rdi), %zmm0 3626; AVX512F-NEXT: vextracti32x4 $2, %zmm0, %xmm1 3627; AVX512F-NEXT: vpextrq $1, %xmm1, %rax 3628; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3629; AVX512F-NEXT: vmovq %xmm1, %rax 3630; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm1 3631; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3] 3632; AVX512F-NEXT: vextracti32x4 $3, %zmm0, %xmm2 3633; AVX512F-NEXT: vmovq %xmm2, %rax 3634; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm3 3635; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm3[0],xmm1[3] 3636; AVX512F-NEXT: vpextrq $1, %xmm2, %rax 3637; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm2 3638; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[0] 3639; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 3640; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm2 3641; AVX512F-NEXT: vmovq %xmm0, %rax 3642; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm3 3643; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3] 3644; AVX512F-NEXT: vextracti32x4 $1, %zmm0, %xmm0 3645; AVX512F-NEXT: vmovq %xmm0, %rax 3646; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm3 3647; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm3[0],xmm2[3] 3648; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 3649; AVX512F-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm0 3650; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[0] 3651; AVX512F-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 3652; AVX512F-NEXT: retq 3653; 3654; AVX512VL-LABEL: sitofp_load_8i64_to_8f32: 3655; AVX512VL: # BB#0: 3656; AVX512VL-NEXT: vmovdqa64 (%rdi), %zmm0 3657; AVX512VL-NEXT: vextracti32x4 $2, %zmm0, %xmm1 3658; AVX512VL-NEXT: vpextrq $1, %xmm1, %rax 3659; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3660; AVX512VL-NEXT: vmovq %xmm1, %rax 3661; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm1 3662; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3] 3663; AVX512VL-NEXT: vextracti32x4 $3, %zmm0, %xmm2 3664; AVX512VL-NEXT: vmovq %xmm2, %rax 3665; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm3 3666; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm3[0],xmm1[3] 3667; AVX512VL-NEXT: vpextrq $1, %xmm2, %rax 3668; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm2 3669; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[0] 3670; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 3671; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm2 3672; AVX512VL-NEXT: vmovq %xmm0, %rax 3673; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm3 3674; AVX512VL-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3] 3675; AVX512VL-NEXT: vextracti32x4 $1, %zmm0, %xmm0 3676; AVX512VL-NEXT: vmovq %xmm0, %rax 3677; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm3 3678; AVX512VL-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm3[0],xmm2[3] 3679; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 3680; AVX512VL-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm0 3681; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[0] 3682; AVX512VL-NEXT: vinsertf32x4 $1, %xmm1, %ymm0, %ymm0 3683; AVX512VL-NEXT: retq 3684; 3685; AVX512DQ-LABEL: sitofp_load_8i64_to_8f32: 3686; AVX512DQ: # BB#0: 3687; AVX512DQ-NEXT: vcvtqq2ps (%rdi), %ymm0 3688; AVX512DQ-NEXT: retq 3689; 3690; AVX512VLDQ-LABEL: sitofp_load_8i64_to_8f32: 3691; AVX512VLDQ: # BB#0: 3692; AVX512VLDQ-NEXT: vcvtqq2ps (%rdi), %ymm0 3693; AVX512VLDQ-NEXT: retq 3694 %ld = load <8 x i64>, <8 x i64> *%a 3695 %cvt = sitofp <8 x i64> %ld to <8 x float> 3696 ret <8 x float> %cvt 3697} 3698 3699define <8 x float> @sitofp_load_8i32_to_8f32(<8 x i32> *%a) { 3700; SSE-LABEL: sitofp_load_8i32_to_8f32: 3701; SSE: # BB#0: 3702; SSE-NEXT: cvtdq2ps (%rdi), %xmm0 3703; SSE-NEXT: cvtdq2ps 16(%rdi), %xmm1 3704; SSE-NEXT: retq 3705; 3706; AVX-LABEL: sitofp_load_8i32_to_8f32: 3707; AVX: # BB#0: 3708; AVX-NEXT: vcvtdq2ps (%rdi), %ymm0 3709; AVX-NEXT: retq 3710 %ld = load <8 x i32>, <8 x i32> *%a 3711 %cvt = sitofp <8 x i32> %ld to <8 x float> 3712 ret <8 x float> %cvt 3713} 3714 3715define <8 x float> @sitofp_load_8i16_to_8f32(<8 x i16> *%a) { 3716; SSE-LABEL: sitofp_load_8i16_to_8f32: 3717; SSE: # BB#0: 3718; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 3719; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 3720; SSE-NEXT: psrad $16, %xmm0 3721; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 3722; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 3723; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 3724; SSE-NEXT: psrad $16, %xmm1 3725; SSE-NEXT: cvtdq2ps %xmm1, %xmm1 3726; SSE-NEXT: retq 3727; 3728; AVX1-LABEL: sitofp_load_8i16_to_8f32: 3729; AVX1: # BB#0: 3730; AVX1-NEXT: vpmovsxwd (%rdi), %xmm0 3731; AVX1-NEXT: vpmovsxwd 8(%rdi), %xmm1 3732; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 3733; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 3734; AVX1-NEXT: retq 3735; 3736; AVX2-LABEL: sitofp_load_8i16_to_8f32: 3737; AVX2: # BB#0: 3738; AVX2-NEXT: vpmovsxwd (%rdi), %ymm0 3739; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 3740; AVX2-NEXT: retq 3741; 3742; AVX512-LABEL: sitofp_load_8i16_to_8f32: 3743; AVX512: # BB#0: 3744; AVX512-NEXT: vpmovsxwd (%rdi), %ymm0 3745; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 3746; AVX512-NEXT: retq 3747 %ld = load <8 x i16>, <8 x i16> *%a 3748 %cvt = sitofp <8 x i16> %ld to <8 x float> 3749 ret <8 x float> %cvt 3750} 3751 3752define <8 x float> @sitofp_load_8i8_to_8f32(<8 x i8> *%a) { 3753; SSE-LABEL: sitofp_load_8i8_to_8f32: 3754; SSE: # BB#0: 3755; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 3756; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3757; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3] 3758; SSE-NEXT: psrad $24, %xmm0 3759; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 3760; SSE-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero 3761; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 3762; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0,0,1,1,2,2,3,3] 3763; SSE-NEXT: psrad $24, %xmm1 3764; SSE-NEXT: cvtdq2ps %xmm1, %xmm1 3765; SSE-NEXT: retq 3766; 3767; AVX1-LABEL: sitofp_load_8i8_to_8f32: 3768; AVX1: # BB#0: 3769; AVX1-NEXT: vpmovsxbw (%rdi), %xmm0 3770; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 3771; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 3772; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 3773; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 3774; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 3775; AVX1-NEXT: retq 3776; 3777; AVX2-LABEL: sitofp_load_8i8_to_8f32: 3778; AVX2: # BB#0: 3779; AVX2-NEXT: vpmovsxbd (%rdi), %ymm0 3780; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 3781; AVX2-NEXT: retq 3782; 3783; AVX512-LABEL: sitofp_load_8i8_to_8f32: 3784; AVX512: # BB#0: 3785; AVX512-NEXT: vpmovsxbd (%rdi), %ymm0 3786; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 3787; AVX512-NEXT: retq 3788 %ld = load <8 x i8>, <8 x i8> *%a 3789 %cvt = sitofp <8 x i8> %ld to <8 x float> 3790 ret <8 x float> %cvt 3791} 3792 3793; 3794; Load Unsigned Integer to Float 3795; 3796 3797define <4 x float> @uitofp_load_4i64_to_4f32(<4 x i64> *%a) { 3798; SSE-LABEL: uitofp_load_4i64_to_4f32: 3799; SSE: # BB#0: 3800; SSE-NEXT: movdqa (%rdi), %xmm1 3801; SSE-NEXT: movdqa 16(%rdi), %xmm3 3802; SSE-NEXT: movd %xmm3, %rax 3803; SSE-NEXT: testq %rax, %rax 3804; SSE-NEXT: js .LBB76_1 3805; SSE-NEXT: # BB#2: 3806; SSE-NEXT: cvtsi2ssq %rax, %xmm2 3807; SSE-NEXT: jmp .LBB76_3 3808; SSE-NEXT: .LBB76_1: 3809; SSE-NEXT: movq %rax, %rcx 3810; SSE-NEXT: shrq %rcx 3811; SSE-NEXT: andl $1, %eax 3812; SSE-NEXT: orq %rcx, %rax 3813; SSE-NEXT: cvtsi2ssq %rax, %xmm2 3814; SSE-NEXT: addss %xmm2, %xmm2 3815; SSE-NEXT: .LBB76_3: 3816; SSE-NEXT: movd %xmm1, %rax 3817; SSE-NEXT: testq %rax, %rax 3818; SSE-NEXT: js .LBB76_4 3819; SSE-NEXT: # BB#5: 3820; SSE-NEXT: cvtsi2ssq %rax, %xmm0 3821; SSE-NEXT: jmp .LBB76_6 3822; SSE-NEXT: .LBB76_4: 3823; SSE-NEXT: movq %rax, %rcx 3824; SSE-NEXT: shrq %rcx 3825; SSE-NEXT: andl $1, %eax 3826; SSE-NEXT: orq %rcx, %rax 3827; SSE-NEXT: cvtsi2ssq %rax, %xmm0 3828; SSE-NEXT: addss %xmm0, %xmm0 3829; SSE-NEXT: .LBB76_6: 3830; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] 3831; SSE-NEXT: movd %xmm3, %rax 3832; SSE-NEXT: testq %rax, %rax 3833; SSE-NEXT: js .LBB76_7 3834; SSE-NEXT: # BB#8: 3835; SSE-NEXT: xorps %xmm3, %xmm3 3836; SSE-NEXT: cvtsi2ssq %rax, %xmm3 3837; SSE-NEXT: jmp .LBB76_9 3838; SSE-NEXT: .LBB76_7: 3839; SSE-NEXT: movq %rax, %rcx 3840; SSE-NEXT: shrq %rcx 3841; SSE-NEXT: andl $1, %eax 3842; SSE-NEXT: orq %rcx, %rax 3843; SSE-NEXT: xorps %xmm3, %xmm3 3844; SSE-NEXT: cvtsi2ssq %rax, %xmm3 3845; SSE-NEXT: addss %xmm3, %xmm3 3846; SSE-NEXT: .LBB76_9: 3847; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1] 3848; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 3849; SSE-NEXT: movd %xmm1, %rax 3850; SSE-NEXT: testq %rax, %rax 3851; SSE-NEXT: js .LBB76_10 3852; SSE-NEXT: # BB#11: 3853; SSE-NEXT: xorps %xmm1, %xmm1 3854; SSE-NEXT: cvtsi2ssq %rax, %xmm1 3855; SSE-NEXT: jmp .LBB76_12 3856; SSE-NEXT: .LBB76_10: 3857; SSE-NEXT: movq %rax, %rcx 3858; SSE-NEXT: shrq %rcx 3859; SSE-NEXT: andl $1, %eax 3860; SSE-NEXT: orq %rcx, %rax 3861; SSE-NEXT: xorps %xmm1, %xmm1 3862; SSE-NEXT: cvtsi2ssq %rax, %xmm1 3863; SSE-NEXT: addss %xmm1, %xmm1 3864; SSE-NEXT: .LBB76_12: 3865; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm3[0],xmm1[1],xmm3[1] 3866; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1] 3867; SSE-NEXT: retq 3868; 3869; AVX1-LABEL: uitofp_load_4i64_to_4f32: 3870; AVX1: # BB#0: 3871; AVX1-NEXT: vmovdqa (%rdi), %ymm0 3872; AVX1-NEXT: vpextrq $1, %xmm0, %rax 3873; AVX1-NEXT: testq %rax, %rax 3874; AVX1-NEXT: js .LBB76_1 3875; AVX1-NEXT: # BB#2: 3876; AVX1-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 3877; AVX1-NEXT: jmp .LBB76_3 3878; AVX1-NEXT: .LBB76_1: 3879; AVX1-NEXT: movq %rax, %rcx 3880; AVX1-NEXT: shrq %rcx 3881; AVX1-NEXT: andl $1, %eax 3882; AVX1-NEXT: orq %rcx, %rax 3883; AVX1-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 3884; AVX1-NEXT: vaddss %xmm1, %xmm1, %xmm1 3885; AVX1-NEXT: .LBB76_3: 3886; AVX1-NEXT: vmovq %xmm0, %rax 3887; AVX1-NEXT: testq %rax, %rax 3888; AVX1-NEXT: js .LBB76_4 3889; AVX1-NEXT: # BB#5: 3890; AVX1-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3891; AVX1-NEXT: jmp .LBB76_6 3892; AVX1-NEXT: .LBB76_4: 3893; AVX1-NEXT: movq %rax, %rcx 3894; AVX1-NEXT: shrq %rcx 3895; AVX1-NEXT: andl $1, %eax 3896; AVX1-NEXT: orq %rcx, %rax 3897; AVX1-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3898; AVX1-NEXT: vaddss %xmm2, %xmm2, %xmm2 3899; AVX1-NEXT: .LBB76_6: 3900; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 3901; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm0 3902; AVX1-NEXT: vmovq %xmm0, %rax 3903; AVX1-NEXT: testq %rax, %rax 3904; AVX1-NEXT: js .LBB76_7 3905; AVX1-NEXT: # BB#8: 3906; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 3907; AVX1-NEXT: jmp .LBB76_9 3908; AVX1-NEXT: .LBB76_7: 3909; AVX1-NEXT: movq %rax, %rcx 3910; AVX1-NEXT: shrq %rcx 3911; AVX1-NEXT: andl $1, %eax 3912; AVX1-NEXT: orq %rcx, %rax 3913; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 3914; AVX1-NEXT: vaddss %xmm2, %xmm2, %xmm2 3915; AVX1-NEXT: .LBB76_9: 3916; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 3917; AVX1-NEXT: vpextrq $1, %xmm0, %rax 3918; AVX1-NEXT: testq %rax, %rax 3919; AVX1-NEXT: js .LBB76_10 3920; AVX1-NEXT: # BB#11: 3921; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 3922; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 3923; AVX1-NEXT: vzeroupper 3924; AVX1-NEXT: retq 3925; AVX1-NEXT: .LBB76_10: 3926; AVX1-NEXT: movq %rax, %rcx 3927; AVX1-NEXT: shrq %rcx 3928; AVX1-NEXT: andl $1, %eax 3929; AVX1-NEXT: orq %rcx, %rax 3930; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 3931; AVX1-NEXT: vaddss %xmm0, %xmm0, %xmm0 3932; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 3933; AVX1-NEXT: vzeroupper 3934; AVX1-NEXT: retq 3935; 3936; AVX2-LABEL: uitofp_load_4i64_to_4f32: 3937; AVX2: # BB#0: 3938; AVX2-NEXT: vmovdqa (%rdi), %ymm0 3939; AVX2-NEXT: vpextrq $1, %xmm0, %rax 3940; AVX2-NEXT: testq %rax, %rax 3941; AVX2-NEXT: js .LBB76_1 3942; AVX2-NEXT: # BB#2: 3943; AVX2-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 3944; AVX2-NEXT: jmp .LBB76_3 3945; AVX2-NEXT: .LBB76_1: 3946; AVX2-NEXT: movq %rax, %rcx 3947; AVX2-NEXT: shrq %rcx 3948; AVX2-NEXT: andl $1, %eax 3949; AVX2-NEXT: orq %rcx, %rax 3950; AVX2-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 3951; AVX2-NEXT: vaddss %xmm1, %xmm1, %xmm1 3952; AVX2-NEXT: .LBB76_3: 3953; AVX2-NEXT: vmovq %xmm0, %rax 3954; AVX2-NEXT: testq %rax, %rax 3955; AVX2-NEXT: js .LBB76_4 3956; AVX2-NEXT: # BB#5: 3957; AVX2-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3958; AVX2-NEXT: jmp .LBB76_6 3959; AVX2-NEXT: .LBB76_4: 3960; AVX2-NEXT: movq %rax, %rcx 3961; AVX2-NEXT: shrq %rcx 3962; AVX2-NEXT: andl $1, %eax 3963; AVX2-NEXT: orq %rcx, %rax 3964; AVX2-NEXT: vcvtsi2ssq %rax, %xmm2, %xmm2 3965; AVX2-NEXT: vaddss %xmm2, %xmm2, %xmm2 3966; AVX2-NEXT: .LBB76_6: 3967; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 3968; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm0 3969; AVX2-NEXT: vmovq %xmm0, %rax 3970; AVX2-NEXT: testq %rax, %rax 3971; AVX2-NEXT: js .LBB76_7 3972; AVX2-NEXT: # BB#8: 3973; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 3974; AVX2-NEXT: jmp .LBB76_9 3975; AVX2-NEXT: .LBB76_7: 3976; AVX2-NEXT: movq %rax, %rcx 3977; AVX2-NEXT: shrq %rcx 3978; AVX2-NEXT: andl $1, %eax 3979; AVX2-NEXT: orq %rcx, %rax 3980; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm2 3981; AVX2-NEXT: vaddss %xmm2, %xmm2, %xmm2 3982; AVX2-NEXT: .LBB76_9: 3983; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 3984; AVX2-NEXT: vpextrq $1, %xmm0, %rax 3985; AVX2-NEXT: testq %rax, %rax 3986; AVX2-NEXT: js .LBB76_10 3987; AVX2-NEXT: # BB#11: 3988; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 3989; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 3990; AVX2-NEXT: vzeroupper 3991; AVX2-NEXT: retq 3992; AVX2-NEXT: .LBB76_10: 3993; AVX2-NEXT: movq %rax, %rcx 3994; AVX2-NEXT: shrq %rcx 3995; AVX2-NEXT: andl $1, %eax 3996; AVX2-NEXT: orq %rcx, %rax 3997; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm0 3998; AVX2-NEXT: vaddss %xmm0, %xmm0, %xmm0 3999; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 4000; AVX2-NEXT: vzeroupper 4001; AVX2-NEXT: retq 4002; 4003; AVX512F-LABEL: uitofp_load_4i64_to_4f32: 4004; AVX512F: # BB#0: 4005; AVX512F-NEXT: vmovdqa (%rdi), %ymm0 4006; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 4007; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 4008; AVX512F-NEXT: vmovq %xmm0, %rax 4009; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm2 4010; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 4011; AVX512F-NEXT: vextracti128 $1, %ymm0, %xmm0 4012; AVX512F-NEXT: vmovq %xmm0, %rax 4013; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm2 4014; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 4015; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 4016; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm0 4017; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 4018; AVX512F-NEXT: retq 4019; 4020; AVX512VL-LABEL: uitofp_load_4i64_to_4f32: 4021; AVX512VL: # BB#0: 4022; AVX512VL-NEXT: vmovdqa64 (%rdi), %ymm0 4023; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 4024; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm1, %xmm1 4025; AVX512VL-NEXT: vmovq %xmm0, %rax 4026; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm2 4027; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm2[0],xmm1[0],xmm2[2,3] 4028; AVX512VL-NEXT: vextracti32x4 $1, %ymm0, %xmm0 4029; AVX512VL-NEXT: vmovq %xmm0, %rax 4030; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm2 4031; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm2[0],xmm1[3] 4032; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 4033; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm0 4034; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm0[0] 4035; AVX512VL-NEXT: retq 4036; 4037; AVX512DQ-LABEL: uitofp_load_4i64_to_4f32: 4038; AVX512DQ: # BB#0: 4039; AVX512DQ-NEXT: vmovaps (%rdi), %ymm0 4040; AVX512DQ-NEXT: vcvtuqq2ps %zmm0, %ymm0 4041; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %YMM0<kill> 4042; AVX512DQ-NEXT: retq 4043; 4044; AVX512VLDQ-LABEL: uitofp_load_4i64_to_4f32: 4045; AVX512VLDQ: # BB#0: 4046; AVX512VLDQ-NEXT: vcvtuqq2psy (%rdi), %xmm0 4047; AVX512VLDQ-NEXT: retq 4048 %ld = load <4 x i64>, <4 x i64> *%a 4049 %cvt = uitofp <4 x i64> %ld to <4 x float> 4050 ret <4 x float> %cvt 4051} 4052 4053define <4 x float> @uitofp_load_4i32_to_4f32(<4 x i32> *%a) { 4054; SSE-LABEL: uitofp_load_4i32_to_4f32: 4055; SSE: # BB#0: 4056; SSE-NEXT: movdqa (%rdi), %xmm0 4057; SSE-NEXT: movdqa {{.*#+}} xmm1 = [65535,65535,65535,65535] 4058; SSE-NEXT: pand %xmm0, %xmm1 4059; SSE-NEXT: por {{.*}}(%rip), %xmm1 4060; SSE-NEXT: psrld $16, %xmm0 4061; SSE-NEXT: por {{.*}}(%rip), %xmm0 4062; SSE-NEXT: addps {{.*}}(%rip), %xmm0 4063; SSE-NEXT: addps %xmm1, %xmm0 4064; SSE-NEXT: retq 4065; 4066; AVX1-LABEL: uitofp_load_4i32_to_4f32: 4067; AVX1: # BB#0: 4068; AVX1-NEXT: vmovdqa (%rdi), %xmm0 4069; AVX1-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7] 4070; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 4071; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],mem[1],xmm0[2],mem[3],xmm0[4],mem[5],xmm0[6],mem[7] 4072; AVX1-NEXT: vaddps {{.*}}(%rip), %xmm0, %xmm0 4073; AVX1-NEXT: vaddps %xmm0, %xmm1, %xmm0 4074; AVX1-NEXT: retq 4075; 4076; AVX2-LABEL: uitofp_load_4i32_to_4f32: 4077; AVX2: # BB#0: 4078; AVX2-NEXT: vmovdqa (%rdi), %xmm0 4079; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm1 4080; AVX2-NEXT: vpblendw {{.*#+}} xmm1 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 4081; AVX2-NEXT: vpsrld $16, %xmm0, %xmm0 4082; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2 4083; AVX2-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm2[1],xmm0[2],xmm2[3],xmm0[4],xmm2[5],xmm0[6],xmm2[7] 4084; AVX2-NEXT: vbroadcastss {{.*}}(%rip), %xmm2 4085; AVX2-NEXT: vaddps %xmm2, %xmm0, %xmm0 4086; AVX2-NEXT: vaddps %xmm0, %xmm1, %xmm0 4087; AVX2-NEXT: retq 4088; 4089; AVX512F-LABEL: uitofp_load_4i32_to_4f32: 4090; AVX512F: # BB#0: 4091; AVX512F-NEXT: vmovaps (%rdi), %xmm0 4092; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0 4093; AVX512F-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 4094; AVX512F-NEXT: retq 4095; 4096; AVX512VL-LABEL: uitofp_load_4i32_to_4f32: 4097; AVX512VL: # BB#0: 4098; AVX512VL-NEXT: vcvtudq2ps (%rdi), %xmm0 4099; AVX512VL-NEXT: retq 4100; 4101; AVX512DQ-LABEL: uitofp_load_4i32_to_4f32: 4102; AVX512DQ: # BB#0: 4103; AVX512DQ-NEXT: vmovaps (%rdi), %xmm0 4104; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0 4105; AVX512DQ-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<kill> 4106; AVX512DQ-NEXT: retq 4107; 4108; AVX512VLDQ-LABEL: uitofp_load_4i32_to_4f32: 4109; AVX512VLDQ: # BB#0: 4110; AVX512VLDQ-NEXT: vcvtudq2ps (%rdi), %xmm0 4111; AVX512VLDQ-NEXT: retq 4112 %ld = load <4 x i32>, <4 x i32> *%a 4113 %cvt = uitofp <4 x i32> %ld to <4 x float> 4114 ret <4 x float> %cvt 4115} 4116 4117define <4 x float> @uitofp_load_4i16_to_4f32(<4 x i16> *%a) { 4118; SSE-LABEL: uitofp_load_4i16_to_4f32: 4119; SSE: # BB#0: 4120; SSE-NEXT: movq {{.*#+}} xmm0 = mem[0],zero 4121; SSE-NEXT: pxor %xmm1, %xmm1 4122; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 4123; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 4124; SSE-NEXT: retq 4125; 4126; AVX-LABEL: uitofp_load_4i16_to_4f32: 4127; AVX: # BB#0: 4128; AVX-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero 4129; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 4130; AVX-NEXT: retq 4131 %ld = load <4 x i16>, <4 x i16> *%a 4132 %cvt = uitofp <4 x i16> %ld to <4 x float> 4133 ret <4 x float> %cvt 4134} 4135 4136define <4 x float> @uitofp_load_4i8_to_4f32(<4 x i8> *%a) { 4137; SSE-LABEL: uitofp_load_4i8_to_4f32: 4138; SSE: # BB#0: 4139; SSE-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 4140; SSE-NEXT: pxor %xmm1, %xmm1 4141; SSE-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3],xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 4142; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1],xmm0[2],xmm1[2],xmm0[3],xmm1[3] 4143; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 4144; SSE-NEXT: retq 4145; 4146; AVX-LABEL: uitofp_load_4i8_to_4f32: 4147; AVX: # BB#0: 4148; AVX-NEXT: vpmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero 4149; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0 4150; AVX-NEXT: retq 4151 %ld = load <4 x i8>, <4 x i8> *%a 4152 %cvt = uitofp <4 x i8> %ld to <4 x float> 4153 ret <4 x float> %cvt 4154} 4155 4156define <8 x float> @uitofp_load_8i64_to_8f32(<8 x i64> *%a) { 4157; SSE-LABEL: uitofp_load_8i64_to_8f32: 4158; SSE: # BB#0: 4159; SSE-NEXT: movdqa (%rdi), %xmm1 4160; SSE-NEXT: movdqa 16(%rdi), %xmm5 4161; SSE-NEXT: movdqa 32(%rdi), %xmm2 4162; SSE-NEXT: movdqa 48(%rdi), %xmm3 4163; SSE-NEXT: movd %xmm5, %rax 4164; SSE-NEXT: testq %rax, %rax 4165; SSE-NEXT: js .LBB80_1 4166; SSE-NEXT: # BB#2: 4167; SSE-NEXT: cvtsi2ssq %rax, %xmm4 4168; SSE-NEXT: jmp .LBB80_3 4169; SSE-NEXT: .LBB80_1: 4170; SSE-NEXT: movq %rax, %rcx 4171; SSE-NEXT: shrq %rcx 4172; SSE-NEXT: andl $1, %eax 4173; SSE-NEXT: orq %rcx, %rax 4174; SSE-NEXT: cvtsi2ssq %rax, %xmm4 4175; SSE-NEXT: addss %xmm4, %xmm4 4176; SSE-NEXT: .LBB80_3: 4177; SSE-NEXT: movd %xmm1, %rax 4178; SSE-NEXT: testq %rax, %rax 4179; SSE-NEXT: js .LBB80_4 4180; SSE-NEXT: # BB#5: 4181; SSE-NEXT: cvtsi2ssq %rax, %xmm0 4182; SSE-NEXT: jmp .LBB80_6 4183; SSE-NEXT: .LBB80_4: 4184; SSE-NEXT: movq %rax, %rcx 4185; SSE-NEXT: shrq %rcx 4186; SSE-NEXT: andl $1, %eax 4187; SSE-NEXT: orq %rcx, %rax 4188; SSE-NEXT: cvtsi2ssq %rax, %xmm0 4189; SSE-NEXT: addss %xmm0, %xmm0 4190; SSE-NEXT: .LBB80_6: 4191; SSE-NEXT: pshufd {{.*#+}} xmm5 = xmm5[2,3,0,1] 4192; SSE-NEXT: movd %xmm5, %rax 4193; SSE-NEXT: testq %rax, %rax 4194; SSE-NEXT: js .LBB80_7 4195; SSE-NEXT: # BB#8: 4196; SSE-NEXT: cvtsi2ssq %rax, %xmm6 4197; SSE-NEXT: jmp .LBB80_9 4198; SSE-NEXT: .LBB80_7: 4199; SSE-NEXT: movq %rax, %rcx 4200; SSE-NEXT: shrq %rcx 4201; SSE-NEXT: andl $1, %eax 4202; SSE-NEXT: orq %rcx, %rax 4203; SSE-NEXT: cvtsi2ssq %rax, %xmm6 4204; SSE-NEXT: addss %xmm6, %xmm6 4205; SSE-NEXT: .LBB80_9: 4206; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1] 4207; SSE-NEXT: movd %xmm1, %rax 4208; SSE-NEXT: testq %rax, %rax 4209; SSE-NEXT: js .LBB80_10 4210; SSE-NEXT: # BB#11: 4211; SSE-NEXT: xorps %xmm5, %xmm5 4212; SSE-NEXT: cvtsi2ssq %rax, %xmm5 4213; SSE-NEXT: jmp .LBB80_12 4214; SSE-NEXT: .LBB80_10: 4215; SSE-NEXT: movq %rax, %rcx 4216; SSE-NEXT: shrq %rcx 4217; SSE-NEXT: andl $1, %eax 4218; SSE-NEXT: orq %rcx, %rax 4219; SSE-NEXT: xorps %xmm5, %xmm5 4220; SSE-NEXT: cvtsi2ssq %rax, %xmm5 4221; SSE-NEXT: addss %xmm5, %xmm5 4222; SSE-NEXT: .LBB80_12: 4223; SSE-NEXT: movd %xmm3, %rax 4224; SSE-NEXT: testq %rax, %rax 4225; SSE-NEXT: js .LBB80_13 4226; SSE-NEXT: # BB#14: 4227; SSE-NEXT: cvtsi2ssq %rax, %xmm7 4228; SSE-NEXT: jmp .LBB80_15 4229; SSE-NEXT: .LBB80_13: 4230; SSE-NEXT: movq %rax, %rcx 4231; SSE-NEXT: shrq %rcx 4232; SSE-NEXT: andl $1, %eax 4233; SSE-NEXT: orq %rcx, %rax 4234; SSE-NEXT: cvtsi2ssq %rax, %xmm7 4235; SSE-NEXT: addss %xmm7, %xmm7 4236; SSE-NEXT: .LBB80_15: 4237; SSE-NEXT: movd %xmm2, %rax 4238; SSE-NEXT: testq %rax, %rax 4239; SSE-NEXT: js .LBB80_16 4240; SSE-NEXT: # BB#17: 4241; SSE-NEXT: xorps %xmm1, %xmm1 4242; SSE-NEXT: cvtsi2ssq %rax, %xmm1 4243; SSE-NEXT: jmp .LBB80_18 4244; SSE-NEXT: .LBB80_16: 4245; SSE-NEXT: movq %rax, %rcx 4246; SSE-NEXT: shrq %rcx 4247; SSE-NEXT: andl $1, %eax 4248; SSE-NEXT: orq %rcx, %rax 4249; SSE-NEXT: xorps %xmm1, %xmm1 4250; SSE-NEXT: cvtsi2ssq %rax, %xmm1 4251; SSE-NEXT: addss %xmm1, %xmm1 4252; SSE-NEXT: .LBB80_18: 4253; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1] 4254; SSE-NEXT: unpcklps {{.*#+}} xmm5 = xmm5[0],xmm6[0],xmm5[1],xmm6[1] 4255; SSE-NEXT: pshufd {{.*#+}} xmm3 = xmm3[2,3,0,1] 4256; SSE-NEXT: movd %xmm3, %rax 4257; SSE-NEXT: testq %rax, %rax 4258; SSE-NEXT: js .LBB80_19 4259; SSE-NEXT: # BB#20: 4260; SSE-NEXT: xorps %xmm3, %xmm3 4261; SSE-NEXT: cvtsi2ssq %rax, %xmm3 4262; SSE-NEXT: jmp .LBB80_21 4263; SSE-NEXT: .LBB80_19: 4264; SSE-NEXT: movq %rax, %rcx 4265; SSE-NEXT: shrq %rcx 4266; SSE-NEXT: andl $1, %eax 4267; SSE-NEXT: orq %rcx, %rax 4268; SSE-NEXT: xorps %xmm3, %xmm3 4269; SSE-NEXT: cvtsi2ssq %rax, %xmm3 4270; SSE-NEXT: addss %xmm3, %xmm3 4271; SSE-NEXT: .LBB80_21: 4272; SSE-NEXT: unpcklps {{.*#+}} xmm0 = xmm0[0],xmm5[0],xmm0[1],xmm5[1] 4273; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm7[0],xmm1[1],xmm7[1] 4274; SSE-NEXT: pshufd {{.*#+}} xmm2 = xmm2[2,3,0,1] 4275; SSE-NEXT: movd %xmm2, %rax 4276; SSE-NEXT: testq %rax, %rax 4277; SSE-NEXT: js .LBB80_22 4278; SSE-NEXT: # BB#23: 4279; SSE-NEXT: xorps %xmm2, %xmm2 4280; SSE-NEXT: cvtsi2ssq %rax, %xmm2 4281; SSE-NEXT: jmp .LBB80_24 4282; SSE-NEXT: .LBB80_22: 4283; SSE-NEXT: movq %rax, %rcx 4284; SSE-NEXT: shrq %rcx 4285; SSE-NEXT: andl $1, %eax 4286; SSE-NEXT: orq %rcx, %rax 4287; SSE-NEXT: xorps %xmm2, %xmm2 4288; SSE-NEXT: cvtsi2ssq %rax, %xmm2 4289; SSE-NEXT: addss %xmm2, %xmm2 4290; SSE-NEXT: .LBB80_24: 4291; SSE-NEXT: unpcklps {{.*#+}} xmm2 = xmm2[0],xmm3[0],xmm2[1],xmm3[1] 4292; SSE-NEXT: unpcklps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1] 4293; SSE-NEXT: retq 4294; 4295; AVX1-LABEL: uitofp_load_8i64_to_8f32: 4296; AVX1: # BB#0: 4297; AVX1-NEXT: vmovdqa (%rdi), %ymm0 4298; AVX1-NEXT: vmovdqa 32(%rdi), %ymm2 4299; AVX1-NEXT: vpextrq $1, %xmm2, %rax 4300; AVX1-NEXT: testq %rax, %rax 4301; AVX1-NEXT: js .LBB80_1 4302; AVX1-NEXT: # BB#2: 4303; AVX1-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 4304; AVX1-NEXT: jmp .LBB80_3 4305; AVX1-NEXT: .LBB80_1: 4306; AVX1-NEXT: movq %rax, %rcx 4307; AVX1-NEXT: shrq %rcx 4308; AVX1-NEXT: andl $1, %eax 4309; AVX1-NEXT: orq %rcx, %rax 4310; AVX1-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 4311; AVX1-NEXT: vaddss %xmm1, %xmm1, %xmm1 4312; AVX1-NEXT: .LBB80_3: 4313; AVX1-NEXT: vmovq %xmm2, %rax 4314; AVX1-NEXT: testq %rax, %rax 4315; AVX1-NEXT: js .LBB80_4 4316; AVX1-NEXT: # BB#5: 4317; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm3 4318; AVX1-NEXT: jmp .LBB80_6 4319; AVX1-NEXT: .LBB80_4: 4320; AVX1-NEXT: movq %rax, %rcx 4321; AVX1-NEXT: shrq %rcx 4322; AVX1-NEXT: andl $1, %eax 4323; AVX1-NEXT: orq %rcx, %rax 4324; AVX1-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm3 4325; AVX1-NEXT: vaddss %xmm3, %xmm3, %xmm3 4326; AVX1-NEXT: .LBB80_6: 4327; AVX1-NEXT: vextractf128 $1, %ymm2, %xmm2 4328; AVX1-NEXT: vmovq %xmm2, %rax 4329; AVX1-NEXT: testq %rax, %rax 4330; AVX1-NEXT: js .LBB80_7 4331; AVX1-NEXT: # BB#8: 4332; AVX1-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm4 4333; AVX1-NEXT: jmp .LBB80_9 4334; AVX1-NEXT: .LBB80_7: 4335; AVX1-NEXT: movq %rax, %rcx 4336; AVX1-NEXT: shrq %rcx 4337; AVX1-NEXT: andl $1, %eax 4338; AVX1-NEXT: orq %rcx, %rax 4339; AVX1-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm4 4340; AVX1-NEXT: vaddss %xmm4, %xmm4, %xmm4 4341; AVX1-NEXT: .LBB80_9: 4342; AVX1-NEXT: vpextrq $1, %xmm2, %rax 4343; AVX1-NEXT: testq %rax, %rax 4344; AVX1-NEXT: js .LBB80_10 4345; AVX1-NEXT: # BB#11: 4346; AVX1-NEXT: vcvtsi2ssq %rax, %xmm5, %xmm2 4347; AVX1-NEXT: jmp .LBB80_12 4348; AVX1-NEXT: .LBB80_10: 4349; AVX1-NEXT: movq %rax, %rcx 4350; AVX1-NEXT: shrq %rcx 4351; AVX1-NEXT: andl $1, %eax 4352; AVX1-NEXT: orq %rcx, %rax 4353; AVX1-NEXT: vcvtsi2ssq %rax, %xmm5, %xmm2 4354; AVX1-NEXT: vaddss %xmm2, %xmm2, %xmm2 4355; AVX1-NEXT: .LBB80_12: 4356; AVX1-NEXT: vpextrq $1, %xmm0, %rax 4357; AVX1-NEXT: testq %rax, %rax 4358; AVX1-NEXT: js .LBB80_13 4359; AVX1-NEXT: # BB#14: 4360; AVX1-NEXT: vcvtsi2ssq %rax, %xmm5, %xmm5 4361; AVX1-NEXT: jmp .LBB80_15 4362; AVX1-NEXT: .LBB80_13: 4363; AVX1-NEXT: movq %rax, %rcx 4364; AVX1-NEXT: shrq %rcx 4365; AVX1-NEXT: andl $1, %eax 4366; AVX1-NEXT: orq %rcx, %rax 4367; AVX1-NEXT: vcvtsi2ssq %rax, %xmm5, %xmm5 4368; AVX1-NEXT: vaddss %xmm5, %xmm5, %xmm5 4369; AVX1-NEXT: .LBB80_15: 4370; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[2,3] 4371; AVX1-NEXT: vmovq %xmm0, %rax 4372; AVX1-NEXT: testq %rax, %rax 4373; AVX1-NEXT: js .LBB80_16 4374; AVX1-NEXT: # BB#17: 4375; AVX1-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm3 4376; AVX1-NEXT: jmp .LBB80_18 4377; AVX1-NEXT: .LBB80_16: 4378; AVX1-NEXT: movq %rax, %rcx 4379; AVX1-NEXT: shrq %rcx 4380; AVX1-NEXT: andl $1, %eax 4381; AVX1-NEXT: orq %rcx, %rax 4382; AVX1-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm3 4383; AVX1-NEXT: vaddss %xmm3, %xmm3, %xmm3 4384; AVX1-NEXT: .LBB80_18: 4385; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm4[0],xmm1[3] 4386; AVX1-NEXT: vinsertps {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[2,3] 4387; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm4 4388; AVX1-NEXT: vmovq %xmm4, %rax 4389; AVX1-NEXT: testq %rax, %rax 4390; AVX1-NEXT: js .LBB80_19 4391; AVX1-NEXT: # BB#20: 4392; AVX1-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm5 4393; AVX1-NEXT: jmp .LBB80_21 4394; AVX1-NEXT: .LBB80_19: 4395; AVX1-NEXT: movq %rax, %rcx 4396; AVX1-NEXT: shrq %rcx 4397; AVX1-NEXT: andl $1, %eax 4398; AVX1-NEXT: orq %rcx, %rax 4399; AVX1-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm0 4400; AVX1-NEXT: vaddss %xmm0, %xmm0, %xmm5 4401; AVX1-NEXT: .LBB80_21: 4402; AVX1-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm2[0] 4403; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm3[0,1],xmm5[0],xmm3[3] 4404; AVX1-NEXT: vpextrq $1, %xmm4, %rax 4405; AVX1-NEXT: testq %rax, %rax 4406; AVX1-NEXT: js .LBB80_22 4407; AVX1-NEXT: # BB#23: 4408; AVX1-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm2 4409; AVX1-NEXT: jmp .LBB80_24 4410; AVX1-NEXT: .LBB80_22: 4411; AVX1-NEXT: movq %rax, %rcx 4412; AVX1-NEXT: shrq %rcx 4413; AVX1-NEXT: andl $1, %eax 4414; AVX1-NEXT: orq %rcx, %rax 4415; AVX1-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm2 4416; AVX1-NEXT: vaddss %xmm2, %xmm2, %xmm2 4417; AVX1-NEXT: .LBB80_24: 4418; AVX1-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[0] 4419; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4420; AVX1-NEXT: retq 4421; 4422; AVX2-LABEL: uitofp_load_8i64_to_8f32: 4423; AVX2: # BB#0: 4424; AVX2-NEXT: vmovdqa (%rdi), %ymm0 4425; AVX2-NEXT: vmovdqa 32(%rdi), %ymm2 4426; AVX2-NEXT: vpextrq $1, %xmm2, %rax 4427; AVX2-NEXT: testq %rax, %rax 4428; AVX2-NEXT: js .LBB80_1 4429; AVX2-NEXT: # BB#2: 4430; AVX2-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 4431; AVX2-NEXT: jmp .LBB80_3 4432; AVX2-NEXT: .LBB80_1: 4433; AVX2-NEXT: movq %rax, %rcx 4434; AVX2-NEXT: shrq %rcx 4435; AVX2-NEXT: andl $1, %eax 4436; AVX2-NEXT: orq %rcx, %rax 4437; AVX2-NEXT: vcvtsi2ssq %rax, %xmm1, %xmm1 4438; AVX2-NEXT: vaddss %xmm1, %xmm1, %xmm1 4439; AVX2-NEXT: .LBB80_3: 4440; AVX2-NEXT: vmovq %xmm2, %rax 4441; AVX2-NEXT: testq %rax, %rax 4442; AVX2-NEXT: js .LBB80_4 4443; AVX2-NEXT: # BB#5: 4444; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm3 4445; AVX2-NEXT: jmp .LBB80_6 4446; AVX2-NEXT: .LBB80_4: 4447; AVX2-NEXT: movq %rax, %rcx 4448; AVX2-NEXT: shrq %rcx 4449; AVX2-NEXT: andl $1, %eax 4450; AVX2-NEXT: orq %rcx, %rax 4451; AVX2-NEXT: vcvtsi2ssq %rax, %xmm3, %xmm3 4452; AVX2-NEXT: vaddss %xmm3, %xmm3, %xmm3 4453; AVX2-NEXT: .LBB80_6: 4454; AVX2-NEXT: vextracti128 $1, %ymm2, %xmm2 4455; AVX2-NEXT: vmovq %xmm2, %rax 4456; AVX2-NEXT: testq %rax, %rax 4457; AVX2-NEXT: js .LBB80_7 4458; AVX2-NEXT: # BB#8: 4459; AVX2-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm4 4460; AVX2-NEXT: jmp .LBB80_9 4461; AVX2-NEXT: .LBB80_7: 4462; AVX2-NEXT: movq %rax, %rcx 4463; AVX2-NEXT: shrq %rcx 4464; AVX2-NEXT: andl $1, %eax 4465; AVX2-NEXT: orq %rcx, %rax 4466; AVX2-NEXT: vcvtsi2ssq %rax, %xmm4, %xmm4 4467; AVX2-NEXT: vaddss %xmm4, %xmm4, %xmm4 4468; AVX2-NEXT: .LBB80_9: 4469; AVX2-NEXT: vpextrq $1, %xmm2, %rax 4470; AVX2-NEXT: testq %rax, %rax 4471; AVX2-NEXT: js .LBB80_10 4472; AVX2-NEXT: # BB#11: 4473; AVX2-NEXT: vcvtsi2ssq %rax, %xmm5, %xmm2 4474; AVX2-NEXT: jmp .LBB80_12 4475; AVX2-NEXT: .LBB80_10: 4476; AVX2-NEXT: movq %rax, %rcx 4477; AVX2-NEXT: shrq %rcx 4478; AVX2-NEXT: andl $1, %eax 4479; AVX2-NEXT: orq %rcx, %rax 4480; AVX2-NEXT: vcvtsi2ssq %rax, %xmm5, %xmm2 4481; AVX2-NEXT: vaddss %xmm2, %xmm2, %xmm2 4482; AVX2-NEXT: .LBB80_12: 4483; AVX2-NEXT: vpextrq $1, %xmm0, %rax 4484; AVX2-NEXT: testq %rax, %rax 4485; AVX2-NEXT: js .LBB80_13 4486; AVX2-NEXT: # BB#14: 4487; AVX2-NEXT: vcvtsi2ssq %rax, %xmm5, %xmm5 4488; AVX2-NEXT: jmp .LBB80_15 4489; AVX2-NEXT: .LBB80_13: 4490; AVX2-NEXT: movq %rax, %rcx 4491; AVX2-NEXT: shrq %rcx 4492; AVX2-NEXT: andl $1, %eax 4493; AVX2-NEXT: orq %rcx, %rax 4494; AVX2-NEXT: vcvtsi2ssq %rax, %xmm5, %xmm5 4495; AVX2-NEXT: vaddss %xmm5, %xmm5, %xmm5 4496; AVX2-NEXT: .LBB80_15: 4497; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm3[0],xmm1[0],xmm3[2,3] 4498; AVX2-NEXT: vmovq %xmm0, %rax 4499; AVX2-NEXT: testq %rax, %rax 4500; AVX2-NEXT: js .LBB80_16 4501; AVX2-NEXT: # BB#17: 4502; AVX2-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm3 4503; AVX2-NEXT: jmp .LBB80_18 4504; AVX2-NEXT: .LBB80_16: 4505; AVX2-NEXT: movq %rax, %rcx 4506; AVX2-NEXT: shrq %rcx 4507; AVX2-NEXT: andl $1, %eax 4508; AVX2-NEXT: orq %rcx, %rax 4509; AVX2-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm3 4510; AVX2-NEXT: vaddss %xmm3, %xmm3, %xmm3 4511; AVX2-NEXT: .LBB80_18: 4512; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm4[0],xmm1[3] 4513; AVX2-NEXT: vinsertps {{.*#+}} xmm3 = xmm3[0],xmm5[0],xmm3[2,3] 4514; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm4 4515; AVX2-NEXT: vmovq %xmm4, %rax 4516; AVX2-NEXT: testq %rax, %rax 4517; AVX2-NEXT: js .LBB80_19 4518; AVX2-NEXT: # BB#20: 4519; AVX2-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm5 4520; AVX2-NEXT: jmp .LBB80_21 4521; AVX2-NEXT: .LBB80_19: 4522; AVX2-NEXT: movq %rax, %rcx 4523; AVX2-NEXT: shrq %rcx 4524; AVX2-NEXT: andl $1, %eax 4525; AVX2-NEXT: orq %rcx, %rax 4526; AVX2-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm0 4527; AVX2-NEXT: vaddss %xmm0, %xmm0, %xmm5 4528; AVX2-NEXT: .LBB80_21: 4529; AVX2-NEXT: vinsertps {{.*#+}} xmm0 = xmm1[0,1,2],xmm2[0] 4530; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm3[0,1],xmm5[0],xmm3[3] 4531; AVX2-NEXT: vpextrq $1, %xmm4, %rax 4532; AVX2-NEXT: testq %rax, %rax 4533; AVX2-NEXT: js .LBB80_22 4534; AVX2-NEXT: # BB#23: 4535; AVX2-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm2 4536; AVX2-NEXT: jmp .LBB80_24 4537; AVX2-NEXT: .LBB80_22: 4538; AVX2-NEXT: movq %rax, %rcx 4539; AVX2-NEXT: shrq %rcx 4540; AVX2-NEXT: andl $1, %eax 4541; AVX2-NEXT: orq %rcx, %rax 4542; AVX2-NEXT: vcvtsi2ssq %rax, %xmm6, %xmm2 4543; AVX2-NEXT: vaddss %xmm2, %xmm2, %xmm2 4544; AVX2-NEXT: .LBB80_24: 4545; AVX2-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[0] 4546; AVX2-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4547; AVX2-NEXT: retq 4548; 4549; AVX512F-LABEL: uitofp_load_8i64_to_8f32: 4550; AVX512F: # BB#0: 4551; AVX512F-NEXT: vmovdqa64 (%rdi), %zmm0 4552; AVX512F-NEXT: vextracti32x4 $2, %zmm0, %xmm1 4553; AVX512F-NEXT: vpextrq $1, %xmm1, %rax 4554; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm2 4555; AVX512F-NEXT: vmovq %xmm1, %rax 4556; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm1 4557; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3] 4558; AVX512F-NEXT: vextracti32x4 $3, %zmm0, %xmm2 4559; AVX512F-NEXT: vmovq %xmm2, %rax 4560; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm3 4561; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm3[0],xmm1[3] 4562; AVX512F-NEXT: vpextrq $1, %xmm2, %rax 4563; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm4, %xmm2 4564; AVX512F-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[0] 4565; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 4566; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm4, %xmm2 4567; AVX512F-NEXT: vmovq %xmm0, %rax 4568; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm4, %xmm3 4569; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3] 4570; AVX512F-NEXT: vextracti32x4 $1, %zmm0, %xmm0 4571; AVX512F-NEXT: vmovq %xmm0, %rax 4572; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm4, %xmm3 4573; AVX512F-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm3[0],xmm2[3] 4574; AVX512F-NEXT: vpextrq $1, %xmm0, %rax 4575; AVX512F-NEXT: vcvtusi2ssq %rax, %xmm4, %xmm0 4576; AVX512F-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[0] 4577; AVX512F-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4578; AVX512F-NEXT: retq 4579; 4580; AVX512VL-LABEL: uitofp_load_8i64_to_8f32: 4581; AVX512VL: # BB#0: 4582; AVX512VL-NEXT: vmovdqa64 (%rdi), %zmm0 4583; AVX512VL-NEXT: vextracti32x4 $2, %zmm0, %xmm1 4584; AVX512VL-NEXT: vpextrq $1, %xmm1, %rax 4585; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm2, %xmm2 4586; AVX512VL-NEXT: vmovq %xmm1, %rax 4587; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm1 4588; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[2,3] 4589; AVX512VL-NEXT: vextracti32x4 $3, %zmm0, %xmm2 4590; AVX512VL-NEXT: vmovq %xmm2, %rax 4591; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm3, %xmm3 4592; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1],xmm3[0],xmm1[3] 4593; AVX512VL-NEXT: vpextrq $1, %xmm2, %rax 4594; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm4, %xmm2 4595; AVX512VL-NEXT: vinsertps {{.*#+}} xmm1 = xmm1[0,1,2],xmm2[0] 4596; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 4597; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm4, %xmm2 4598; AVX512VL-NEXT: vmovq %xmm0, %rax 4599; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm4, %xmm3 4600; AVX512VL-NEXT: vinsertps {{.*#+}} xmm2 = xmm3[0],xmm2[0],xmm3[2,3] 4601; AVX512VL-NEXT: vextracti32x4 $1, %zmm0, %xmm0 4602; AVX512VL-NEXT: vmovq %xmm0, %rax 4603; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm4, %xmm3 4604; AVX512VL-NEXT: vinsertps {{.*#+}} xmm2 = xmm2[0,1],xmm3[0],xmm2[3] 4605; AVX512VL-NEXT: vpextrq $1, %xmm0, %rax 4606; AVX512VL-NEXT: vcvtusi2ssq %rax, %xmm4, %xmm0 4607; AVX512VL-NEXT: vinsertps {{.*#+}} xmm0 = xmm2[0,1,2],xmm0[0] 4608; AVX512VL-NEXT: vinsertf32x4 $1, %xmm1, %ymm0, %ymm0 4609; AVX512VL-NEXT: retq 4610; 4611; AVX512DQ-LABEL: uitofp_load_8i64_to_8f32: 4612; AVX512DQ: # BB#0: 4613; AVX512DQ-NEXT: vcvtuqq2ps (%rdi), %ymm0 4614; AVX512DQ-NEXT: retq 4615; 4616; AVX512VLDQ-LABEL: uitofp_load_8i64_to_8f32: 4617; AVX512VLDQ: # BB#0: 4618; AVX512VLDQ-NEXT: vcvtuqq2ps (%rdi), %ymm0 4619; AVX512VLDQ-NEXT: retq 4620 %ld = load <8 x i64>, <8 x i64> *%a 4621 %cvt = uitofp <8 x i64> %ld to <8 x float> 4622 ret <8 x float> %cvt 4623} 4624 4625define <8 x float> @uitofp_load_8i32_to_8f32(<8 x i32> *%a) { 4626; SSE-LABEL: uitofp_load_8i32_to_8f32: 4627; SSE: # BB#0: 4628; SSE-NEXT: movdqa (%rdi), %xmm0 4629; SSE-NEXT: movdqa 16(%rdi), %xmm1 4630; SSE-NEXT: movdqa {{.*#+}} xmm2 = [65535,65535,65535,65535] 4631; SSE-NEXT: movdqa %xmm0, %xmm3 4632; SSE-NEXT: pand %xmm2, %xmm3 4633; SSE-NEXT: movdqa {{.*#+}} xmm4 = [1258291200,1258291200,1258291200,1258291200] 4634; SSE-NEXT: por %xmm4, %xmm3 4635; SSE-NEXT: psrld $16, %xmm0 4636; SSE-NEXT: movdqa {{.*#+}} xmm5 = [1392508928,1392508928,1392508928,1392508928] 4637; SSE-NEXT: por %xmm5, %xmm0 4638; SSE-NEXT: movaps {{.*#+}} xmm6 = [-5.497642e+11,-5.497642e+11,-5.497642e+11,-5.497642e+11] 4639; SSE-NEXT: addps %xmm6, %xmm0 4640; SSE-NEXT: addps %xmm3, %xmm0 4641; SSE-NEXT: pand %xmm1, %xmm2 4642; SSE-NEXT: por %xmm4, %xmm2 4643; SSE-NEXT: psrld $16, %xmm1 4644; SSE-NEXT: por %xmm5, %xmm1 4645; SSE-NEXT: addps %xmm6, %xmm1 4646; SSE-NEXT: addps %xmm2, %xmm1 4647; SSE-NEXT: retq 4648; 4649; AVX1-LABEL: uitofp_load_8i32_to_8f32: 4650; AVX1: # BB#0: 4651; AVX1-NEXT: vmovdqa (%rdi), %ymm0 4652; AVX1-NEXT: vpsrld $16, %xmm0, %xmm1 4653; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 4654; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 4655; AVX1-NEXT: vinsertf128 $1, %xmm2, %ymm1, %ymm1 4656; AVX1-NEXT: vcvtdq2ps %ymm1, %ymm1 4657; AVX1-NEXT: vmulps {{.*}}(%rip), %ymm1, %ymm1 4658; AVX1-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 4659; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 4660; AVX1-NEXT: vaddps %ymm0, %ymm1, %ymm0 4661; AVX1-NEXT: retq 4662; 4663; AVX2-LABEL: uitofp_load_8i32_to_8f32: 4664; AVX2: # BB#0: 4665; AVX2-NEXT: vmovdqa (%rdi), %ymm0 4666; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm1 4667; AVX2-NEXT: vpblendw {{.*#+}} ymm1 = ymm0[0],ymm1[1],ymm0[2],ymm1[3],ymm0[4],ymm1[5],ymm0[6],ymm1[7],ymm0[8],ymm1[9],ymm0[10],ymm1[11],ymm0[12],ymm1[13],ymm0[14],ymm1[15] 4668; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 4669; AVX2-NEXT: vpbroadcastd {{.*}}(%rip), %ymm2 4670; AVX2-NEXT: vpblendw {{.*#+}} ymm0 = ymm0[0],ymm2[1],ymm0[2],ymm2[3],ymm0[4],ymm2[5],ymm0[6],ymm2[7],ymm0[8],ymm2[9],ymm0[10],ymm2[11],ymm0[12],ymm2[13],ymm0[14],ymm2[15] 4671; AVX2-NEXT: vbroadcastss {{.*}}(%rip), %ymm2 4672; AVX2-NEXT: vaddps %ymm2, %ymm0, %ymm0 4673; AVX2-NEXT: vaddps %ymm0, %ymm1, %ymm0 4674; AVX2-NEXT: retq 4675; 4676; AVX512F-LABEL: uitofp_load_8i32_to_8f32: 4677; AVX512F: # BB#0: 4678; AVX512F-NEXT: vmovaps (%rdi), %ymm0 4679; AVX512F-NEXT: vcvtudq2ps %zmm0, %zmm0 4680; AVX512F-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 4681; AVX512F-NEXT: retq 4682; 4683; AVX512VL-LABEL: uitofp_load_8i32_to_8f32: 4684; AVX512VL: # BB#0: 4685; AVX512VL-NEXT: vcvtudq2ps (%rdi), %ymm0 4686; AVX512VL-NEXT: retq 4687; 4688; AVX512DQ-LABEL: uitofp_load_8i32_to_8f32: 4689; AVX512DQ: # BB#0: 4690; AVX512DQ-NEXT: vmovaps (%rdi), %ymm0 4691; AVX512DQ-NEXT: vcvtudq2ps %zmm0, %zmm0 4692; AVX512DQ-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<kill> 4693; AVX512DQ-NEXT: retq 4694; 4695; AVX512VLDQ-LABEL: uitofp_load_8i32_to_8f32: 4696; AVX512VLDQ: # BB#0: 4697; AVX512VLDQ-NEXT: vcvtudq2ps (%rdi), %ymm0 4698; AVX512VLDQ-NEXT: retq 4699 %ld = load <8 x i32>, <8 x i32> *%a 4700 %cvt = uitofp <8 x i32> %ld to <8 x float> 4701 ret <8 x float> %cvt 4702} 4703 4704define <8 x float> @uitofp_load_8i16_to_8f32(<8 x i16> *%a) { 4705; SSE-LABEL: uitofp_load_8i16_to_8f32: 4706; SSE: # BB#0: 4707; SSE-NEXT: movdqa (%rdi), %xmm1 4708; SSE-NEXT: pxor %xmm2, %xmm2 4709; SSE-NEXT: movdqa %xmm1, %xmm0 4710; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 4711; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 4712; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 4713; SSE-NEXT: cvtdq2ps %xmm1, %xmm1 4714; SSE-NEXT: retq 4715; 4716; AVX1-LABEL: uitofp_load_8i16_to_8f32: 4717; AVX1: # BB#0: 4718; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero 4719; AVX1-NEXT: vpmovzxwd {{.*#+}} xmm1 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero 4720; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4721; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 4722; AVX1-NEXT: retq 4723; 4724; AVX2-LABEL: uitofp_load_8i16_to_8f32: 4725; AVX2: # BB#0: 4726; AVX2-NEXT: vpmovzxwd {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero 4727; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 4728; AVX2-NEXT: retq 4729; 4730; AVX512-LABEL: uitofp_load_8i16_to_8f32: 4731; AVX512: # BB#0: 4732; AVX512-NEXT: vpmovzxwd {{.*#+}} ymm0 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero,mem[4],zero,mem[5],zero,mem[6],zero,mem[7],zero 4733; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 4734; AVX512-NEXT: retq 4735 %ld = load <8 x i16>, <8 x i16> *%a 4736 %cvt = uitofp <8 x i16> %ld to <8 x float> 4737 ret <8 x float> %cvt 4738} 4739 4740define <8 x float> @uitofp_load_8i8_to_8f32(<8 x i8> *%a) { 4741; SSE-LABEL: uitofp_load_8i8_to_8f32: 4742; SSE: # BB#0: 4743; SSE-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 4744; SSE-NEXT: pxor %xmm2, %xmm2 4745; SSE-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm2[0],xmm1[1],xmm2[1],xmm1[2],xmm2[2],xmm1[3],xmm2[3],xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 4746; SSE-NEXT: movdqa %xmm1, %xmm0 4747; SSE-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 4748; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 4749; SSE-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 4750; SSE-NEXT: cvtdq2ps %xmm1, %xmm1 4751; SSE-NEXT: retq 4752; 4753; AVX1-LABEL: uitofp_load_8i8_to_8f32: 4754; AVX1: # BB#0: 4755; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero 4756; AVX1-NEXT: vpmovzxbd {{.*#+}} xmm1 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero 4757; AVX1-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0 4758; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 4759; AVX1-NEXT: retq 4760; 4761; AVX2-LABEL: uitofp_load_8i8_to_8f32: 4762; AVX2: # BB#0: 4763; AVX2-NEXT: vpmovzxbd {{.*#+}} ymm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero 4764; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 4765; AVX2-NEXT: retq 4766; 4767; AVX512-LABEL: uitofp_load_8i8_to_8f32: 4768; AVX512: # BB#0: 4769; AVX512-NEXT: vpmovzxbd {{.*#+}} ymm0 = mem[0],zero,zero,zero,mem[1],zero,zero,zero,mem[2],zero,zero,zero,mem[3],zero,zero,zero,mem[4],zero,zero,zero,mem[5],zero,zero,zero,mem[6],zero,zero,zero,mem[7],zero,zero,zero 4770; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 4771; AVX512-NEXT: retq 4772 %ld = load <8 x i8>, <8 x i8> *%a 4773 %cvt = uitofp <8 x i8> %ld to <8 x float> 4774 ret <8 x float> %cvt 4775} 4776 4777; 4778; Aggregates 4779; 4780 4781%Arguments = type <{ <8 x i8>, <8 x i16>, <8 x float>* }> 4782define void @aggregate_sitofp_8i16_to_8f32(%Arguments* nocapture readonly %a0) { 4783; SSE-LABEL: aggregate_sitofp_8i16_to_8f32: 4784; SSE: # BB#0: 4785; SSE-NEXT: movq 24(%rdi), %rax 4786; SSE-NEXT: movdqu 8(%rdi), %xmm0 4787; SSE-NEXT: punpcklwd {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3] 4788; SSE-NEXT: psrad $16, %xmm1 4789; SSE-NEXT: cvtdq2ps %xmm1, %xmm1 4790; SSE-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4,4,5,5,6,6,7,7] 4791; SSE-NEXT: psrad $16, %xmm0 4792; SSE-NEXT: cvtdq2ps %xmm0, %xmm0 4793; SSE-NEXT: movaps %xmm0, 16(%rax) 4794; SSE-NEXT: movaps %xmm1, (%rax) 4795; SSE-NEXT: retq 4796; 4797; AVX1-LABEL: aggregate_sitofp_8i16_to_8f32: 4798; AVX1: # BB#0: 4799; AVX1-NEXT: movq 24(%rdi), %rax 4800; AVX1-NEXT: vmovdqu 8(%rdi), %xmm0 4801; AVX1-NEXT: vpmovsxwd %xmm0, %xmm1 4802; AVX1-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] 4803; AVX1-NEXT: vpmovsxwd %xmm0, %xmm0 4804; AVX1-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0 4805; AVX1-NEXT: vcvtdq2ps %ymm0, %ymm0 4806; AVX1-NEXT: vmovaps %ymm0, (%rax) 4807; AVX1-NEXT: vzeroupper 4808; AVX1-NEXT: retq 4809; 4810; AVX2-LABEL: aggregate_sitofp_8i16_to_8f32: 4811; AVX2: # BB#0: 4812; AVX2-NEXT: movq 24(%rdi), %rax 4813; AVX2-NEXT: vpmovsxwd 8(%rdi), %ymm0 4814; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0 4815; AVX2-NEXT: vmovaps %ymm0, (%rax) 4816; AVX2-NEXT: vzeroupper 4817; AVX2-NEXT: retq 4818; 4819; AVX512-LABEL: aggregate_sitofp_8i16_to_8f32: 4820; AVX512: # BB#0: 4821; AVX512-NEXT: movq 24(%rdi), %rax 4822; AVX512-NEXT: vpmovsxwd 8(%rdi), %ymm0 4823; AVX512-NEXT: vcvtdq2ps %ymm0, %ymm0 4824; AVX512-NEXT: vmovaps %ymm0, (%rax) 4825; AVX512-NEXT: retq 4826 %1 = load %Arguments, %Arguments* %a0, align 1 4827 %2 = extractvalue %Arguments %1, 1 4828 %3 = extractvalue %Arguments %1, 2 4829 %4 = sitofp <8 x i16> %2 to <8 x float> 4830 store <8 x float> %4, <8 x float>* %3, align 32 4831 ret void 4832} 4833