1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-apple-darwin9 -mattr=+mmx,+sse4.2 | FileCheck %s --check-prefix=X32
3; RUN: llc < %s -mtriple=x86_64-apple-darwin9 -mattr=+mmx,+sse4.2 | FileCheck %s --check-prefix=X64
4
5; MMX insertelement is not available; these are promoted to xmm.
6; (Without SSE they are split to two ints, and the code is much better.)
7
8define x86_mmx @mmx_movzl(x86_mmx %x) nounwind {
9; X32-LABEL: mmx_movzl:
10; X32:       ## %bb.0:
11; X32-NEXT:    subl $20, %esp
12; X32-NEXT:    movl $32, %eax
13; X32-NEXT:    movd %eax, %xmm0
14; X32-NEXT:    movq %xmm0, (%esp)
15; X32-NEXT:    movq (%esp), %mm0
16; X32-NEXT:    addl $20, %esp
17; X32-NEXT:    retl
18;
19; X64-LABEL: mmx_movzl:
20; X64:       ## %bb.0:
21; X64-NEXT:    movdq2q %xmm0, %mm0
22; X64-NEXT:    movq %mm0, -{{[0-9]+}}(%rsp)
23; X64-NEXT:    pmovzxdq {{.*#+}} xmm1 = mem[0],zero,mem[1],zero
24; X64-NEXT:    movl $32, %eax
25; X64-NEXT:    pinsrq $0, %rax, %xmm1
26; X64-NEXT:    pxor %xmm0, %xmm0
27; X64-NEXT:    pblendw {{.*#+}} xmm0 = xmm1[0,1],xmm0[2,3,4,5,6,7]
28; X64-NEXT:    retq
29  %tmp = bitcast x86_mmx %x to <2 x i32>
30  %tmp3 = insertelement <2 x i32> %tmp, i32 32, i32 0
31  %tmp8 = insertelement <2 x i32> %tmp3, i32 0, i32 1
32  %tmp9 = bitcast <2 x i32> %tmp8 to x86_mmx
33  ret x86_mmx %tmp9
34}
35