1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2,+ssse3 | FileCheck %s --check-prefix=X32 3; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2,+ssse3 | FileCheck %s --check-prefix=X64 4 5; There are no MMX operations in @t1 6 7define void @t1(i32 %a, x86_mmx* %P) nounwind { 8; X32-LABEL: t1: 9; X32: # %bb.0: 10; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 11; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx 12; X32-NEXT: shll $12, %ecx 13; X32-NEXT: movd %ecx, %xmm0 14; X32-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,0,1,1] 15; X32-NEXT: movq %xmm0, (%eax) 16; X32-NEXT: retl 17; 18; X64-LABEL: t1: 19; X64: # %bb.0: 20; X64-NEXT: shll $12, %edi 21; X64-NEXT: movd %edi, %xmm0 22; X64-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2,3,4,5,6,7] 23; X64-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] 24; X64-NEXT: movq %xmm0, (%rsi) 25; X64-NEXT: retq 26 %tmp12 = shl i32 %a, 12 27 %tmp21 = insertelement <2 x i32> undef, i32 %tmp12, i32 1 28 %tmp22 = insertelement <2 x i32> %tmp21, i32 0, i32 0 29 %tmp23 = bitcast <2 x i32> %tmp22 to x86_mmx 30 store x86_mmx %tmp23, x86_mmx* %P 31 ret void 32} 33 34define <4 x float> @t2(<4 x float>* %P) nounwind { 35; X32-LABEL: t2: 36; X32: # %bb.0: 37; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 38; X32-NEXT: movaps (%eax), %xmm1 39; X32-NEXT: xorps %xmm0, %xmm0 40; X32-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0] 41; X32-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0] 42; X32-NEXT: retl 43; 44; X64-LABEL: t2: 45; X64: # %bb.0: 46; X64-NEXT: movaps (%rdi), %xmm1 47; X64-NEXT: xorps %xmm0, %xmm0 48; X64-NEXT: shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[2,0] 49; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[2,0] 50; X64-NEXT: retq 51 %tmp1 = load <4 x float>, <4 x float>* %P 52 %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 4, i32 4, i32 0 > 53 ret <4 x float> %tmp2 54} 55 56define <4 x float> @t3(<4 x float>* %P) nounwind { 57; X32-LABEL: t3: 58; X32: # %bb.0: 59; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 60; X32-NEXT: xorps %xmm0, %xmm0 61; X32-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3] 62; X32-NEXT: retl 63; 64; X64-LABEL: t3: 65; X64: # %bb.0: 66; X64-NEXT: xorps %xmm0, %xmm0 67; X64-NEXT: movlps {{.*#+}} xmm0 = mem[0,1],xmm0[2,3] 68; X64-NEXT: retq 69 %tmp1 = load <4 x float>, <4 x float>* %P 70 %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 4, i32 4 > 71 ret <4 x float> %tmp2 72} 73 74define <4 x float> @t4(<4 x float>* %P) nounwind { 75; X32-LABEL: t4: 76; X32: # %bb.0: 77; X32-NEXT: movl {{[0-9]+}}(%esp), %eax 78; X32-NEXT: movaps (%eax), %xmm0 79; X32-NEXT: xorps %xmm1, %xmm1 80; X32-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[1,0] 81; X32-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[2,3] 82; X32-NEXT: retl 83; 84; X64-LABEL: t4: 85; X64: # %bb.0: 86; X64-NEXT: movaps (%rdi), %xmm0 87; X64-NEXT: xorps %xmm1, %xmm1 88; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[1,0] 89; X64-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[2,3] 90; X64-NEXT: retq 91 %tmp1 = load <4 x float>, <4 x float>* %P 92 %tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 7, i32 0, i32 0, i32 0 > 93 ret <4 x float> %tmp2 94} 95 96define <16 x i8> @t5(<16 x i8> %x) nounwind { 97; X32-LABEL: t5: 98; X32: # %bb.0: 99; X32-NEXT: psrlw $8, %xmm0 100; X32-NEXT: retl 101; 102; X64-LABEL: t5: 103; X64: # %bb.0: 104; X64-NEXT: psrlw $8, %xmm0 105; X64-NEXT: retq 106 %s = shufflevector <16 x i8> %x, <16 x i8> zeroinitializer, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 17> 107 ret <16 x i8> %s 108} 109 110define <16 x i8> @t6(<16 x i8> %x) nounwind { 111; X32-LABEL: t6: 112; X32: # %bb.0: 113; X32-NEXT: psrlw $8, %xmm0 114; X32-NEXT: retl 115; 116; X64-LABEL: t6: 117; X64: # %bb.0: 118; X64-NEXT: psrlw $8, %xmm0 119; X64-NEXT: retq 120 %s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef> 121 ret <16 x i8> %s 122} 123 124define <16 x i8> @t7(<16 x i8> %x) nounwind { 125; X32-LABEL: t7: 126; X32: # %bb.0: 127; X32-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2] 128; X32-NEXT: retl 129; 130; X64-LABEL: t7: 131; X64: # %bb.0: 132; X64-NEXT: pslldq {{.*#+}} xmm0 = zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,zero,xmm0[0,1,2] 133; X64-NEXT: retq 134 %s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 1, i32 2> 135 ret <16 x i8> %s 136} 137 138define <16 x i8> @t8(<16 x i8> %x) nounwind { 139; X32-LABEL: t8: 140; X32: # %bb.0: 141; X32-NEXT: psrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero 142; X32-NEXT: retl 143; 144; X64-LABEL: t8: 145; X64: # %bb.0: 146; X64-NEXT: psrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero 147; X64-NEXT: retq 148 %s = shufflevector <16 x i8> %x, <16 x i8> zeroinitializer, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 8, i32 9, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 17> 149 ret <16 x i8> %s 150} 151 152define <16 x i8> @t9(<16 x i8> %x) nounwind { 153; X32-LABEL: t9: 154; X32: # %bb.0: 155; X32-NEXT: psrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero 156; X32-NEXT: retl 157; 158; X64-LABEL: t9: 159; X64: # %bb.0: 160; X64-NEXT: psrldq {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15],zero 161; X64-NEXT: retq 162 %s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 7, i32 8, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 14, i32 undef, i32 undef> 163 ret <16 x i8> %s 164} 165