1; RUN: llc < %s -march=x86 -mattr=+sse2,+ssse3 | FileCheck %s
2; There are no MMX operations in @t1
3
4define void  @t1(i32 %a, x86_mmx* %P) nounwind {
5; CHECK-LABEL: t1:
6; CHECK:       # BB#0:
7; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
8; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %ecx
9; CHECK-NEXT:    shll $12, %ecx
10; CHECK-NEXT:    movd %ecx, %xmm0
11; CHECK-NEXT:    pshufd {{.*#+}} xmm0 = xmm0[1,0,0,1]
12; CHECK-NEXT:    movlpd %xmm0, (%eax)
13; CHECK-NEXT:    retl
14 %tmp12 = shl i32 %a, 12
15 %tmp21 = insertelement <2 x i32> undef, i32 %tmp12, i32 1
16 %tmp22 = insertelement <2 x i32> %tmp21, i32 0, i32 0
17 %tmp23 = bitcast <2 x i32> %tmp22 to x86_mmx
18 store x86_mmx %tmp23, x86_mmx* %P
19 ret void
20}
21
22define <4 x float> @t2(<4 x float>* %P) nounwind {
23; CHECK-LABEL: t2:
24; CHECK:       # BB#0:
25; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
26; CHECK-NEXT:    movaps (%eax), %xmm1
27; CHECK-NEXT:    xorps %xmm0, %xmm0
28; CHECK-NEXT:    shufps {{.*#+}} xmm1 = xmm1[0,0],xmm0[0,0]
29; CHECK-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,0],xmm1[2,0]
30; CHECK-NEXT:    retl
31  %tmp1 = load <4 x float>* %P
32  %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 4, i32 4, i32 4, i32 0 >
33  ret <4 x float> %tmp2
34}
35
36define <4 x float> @t3(<4 x float>* %P) nounwind {
37; CHECK-LABEL: t3:
38; CHECK:       # BB#0:
39; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
40; CHECK-NEXT:    movaps (%eax), %xmm0
41; CHECK-NEXT:    xorps %xmm1, %xmm1
42; CHECK-NEXT:    shufps {{.*#+}} xmm0 = xmm0[2,3],xmm1[0,0]
43; CHECK-NEXT:    retl
44  %tmp1 = load <4 x float>* %P
45  %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> zeroinitializer, <4 x i32> < i32 2, i32 3, i32 4, i32 4 >
46  ret <4 x float> %tmp2
47}
48
49define <4 x float> @t4(<4 x float>* %P) nounwind {
50; CHECK-LABEL: t4:
51; CHECK:       # BB#0:
52; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
53; CHECK-NEXT:    movaps (%eax), %xmm0
54; CHECK-NEXT:    xorps %xmm1, %xmm1
55; CHECK-NEXT:    shufps {{.*#+}} xmm0 = xmm0[3,0],xmm1[0,0]
56; CHECK-NEXT:    shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,0]
57; CHECK-NEXT:    retl
58  %tmp1 = load <4 x float>* %P
59  %tmp2 = shufflevector <4 x float> zeroinitializer, <4 x float> %tmp1, <4 x i32> < i32 7, i32 0, i32 0, i32 0 >
60  ret <4 x float> %tmp2
61}
62
63define <16 x i8> @t5(<16 x i8> %x) nounwind {
64; CHECK-LABEL: t5:
65; CHECK:       # BB#0:
66; CHECK-NEXT:    pxor %xmm1, %xmm1
67; CHECK-NEXT:    pshufb {{.*#+}} xmm1 = zero,xmm1[u,u,u,u,u,u,u,u,u,u,u,u,u,u,1]
68; CHECK-NEXT:    pshufb {{.*#+}} xmm0 = xmm0[1,u,u,u,u,u,u,u,u,u,u,u,u,u,u],zero
69; CHECK-NEXT:    por %xmm1, %xmm0
70; CHECK-NEXT:    retl
71  %s = shufflevector <16 x i8> %x, <16 x i8> zeroinitializer, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 17>
72  ret <16 x i8> %s
73}
74
75define <16 x i8> @t6(<16 x i8> %x) nounwind {
76; CHECK-LABEL: t6:
77; CHECK:       # BB#0:
78; CHECK-NEXT:    palignr {{.*#+}} xmm0 = xmm0[1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,0]
79; CHECK-NEXT:    retl
80  %s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
81  ret <16 x i8> %s
82}
83
84define <16 x i8> @t7(<16 x i8> %x) nounwind {
85; CHECK-LABEL: t7:
86; CHECK:       # BB#0:
87; CHECK-NEXT:    palignr {{.*#+}} xmm0 = xmm0[3,4,5,6,7,8,9,10,11,12,13,14,15,0,1,2]
88; CHECK-NEXT:    retl
89  %s = shufflevector <16 x i8> %x, <16 x i8> undef, <16 x i32> <i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 1, i32 2>
90  ret <16 x i8> %s
91}
92