1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE
3; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx | FileCheck %s --check-prefix=AVX
4
5; PR11674
6define void @fpext_frommem(<2 x float>* %in, <2 x double>* %out) {
7; SSE-LABEL: fpext_frommem:
8; SSE:       # BB#0: # %entry
9; SSE-NEXT:    movl {{[0-9]+}}(%esp), %eax
10; SSE-NEXT:    movl {{[0-9]+}}(%esp), %ecx
11; SSE-NEXT:    cvtps2pd (%ecx), %xmm0
12; SSE-NEXT:    movups %xmm0, (%eax)
13; SSE-NEXT:    retl
14;
15; AVX-LABEL: fpext_frommem:
16; AVX:       # BB#0: # %entry
17; AVX-NEXT:    movl {{[0-9]+}}(%esp), %eax
18; AVX-NEXT:    movl {{[0-9]+}}(%esp), %ecx
19; AVX-NEXT:    vcvtps2pd (%ecx), %xmm0
20; AVX-NEXT:    vmovups %xmm0, (%eax)
21; AVX-NEXT:    retl
22entry:
23  %0 = load <2 x float>, <2 x float>* %in, align 8
24  %1 = fpext <2 x float> %0 to <2 x double>
25  store <2 x double> %1, <2 x double>* %out, align 1
26  ret void
27}
28
29define void @fpext_frommem4(<4 x float>* %in, <4 x double>* %out) {
30; SSE-LABEL: fpext_frommem4:
31; SSE:       # BB#0: # %entry
32; SSE-NEXT:    movl {{[0-9]+}}(%esp), %eax
33; SSE-NEXT:    movl {{[0-9]+}}(%esp), %ecx
34; SSE-NEXT:    cvtps2pd (%ecx), %xmm0
35; SSE-NEXT:    cvtps2pd 8(%ecx), %xmm1
36; SSE-NEXT:    movups %xmm1, 16(%eax)
37; SSE-NEXT:    movups %xmm0, (%eax)
38; SSE-NEXT:    retl
39;
40; AVX-LABEL: fpext_frommem4:
41; AVX:       # BB#0: # %entry
42; AVX-NEXT:    movl {{[0-9]+}}(%esp), %eax
43; AVX-NEXT:    movl {{[0-9]+}}(%esp), %ecx
44; AVX-NEXT:    vcvtps2pd (%ecx), %ymm0
45; AVX-NEXT:    vmovups %ymm0, (%eax)
46; AVX-NEXT:    vzeroupper
47; AVX-NEXT:    retl
48entry:
49  %0 = load <4 x float>, <4 x float>* %in
50  %1 = fpext <4 x float> %0 to <4 x double>
51  store <4 x double> %1, <4 x double>* %out, align 1
52  ret void
53}
54
55define void @fpext_frommem8(<8 x float>* %in, <8 x double>* %out) {
56; SSE-LABEL: fpext_frommem8:
57; SSE:       # BB#0: # %entry
58; SSE-NEXT:    movl {{[0-9]+}}(%esp), %eax
59; SSE-NEXT:    movl {{[0-9]+}}(%esp), %ecx
60; SSE-NEXT:    cvtps2pd (%ecx), %xmm0
61; SSE-NEXT:    cvtps2pd 8(%ecx), %xmm1
62; SSE-NEXT:    cvtps2pd 16(%ecx), %xmm2
63; SSE-NEXT:    cvtps2pd 24(%ecx), %xmm3
64; SSE-NEXT:    movups %xmm3, 48(%eax)
65; SSE-NEXT:    movups %xmm2, 32(%eax)
66; SSE-NEXT:    movups %xmm1, 16(%eax)
67; SSE-NEXT:    movups %xmm0, (%eax)
68; SSE-NEXT:    retl
69;
70; AVX-LABEL: fpext_frommem8:
71; AVX:       # BB#0: # %entry
72; AVX-NEXT:    movl {{[0-9]+}}(%esp), %eax
73; AVX-NEXT:    movl {{[0-9]+}}(%esp), %ecx
74; AVX-NEXT:    vcvtps2pd (%ecx), %ymm0
75; AVX-NEXT:    vcvtps2pd 16(%ecx), %ymm1
76; AVX-NEXT:    vmovups %ymm1, 32(%eax)
77; AVX-NEXT:    vmovups %ymm0, (%eax)
78; AVX-NEXT:    vzeroupper
79; AVX-NEXT:    retl
80entry:
81  %0 = load <8 x float>, <8 x float>* %in
82  %1 = fpext <8 x float> %0 to <8 x double>
83  store <8 x double> %1, <8 x double>* %out, align 1
84  ret void
85}
86
87define <2 x double> @fpext_fromconst() {
88; SSE-LABEL: fpext_fromconst:
89; SSE:       # BB#0: # %entry
90; SSE-NEXT:    movaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
91; SSE-NEXT:    retl
92;
93; AVX-LABEL: fpext_fromconst:
94; AVX:       # BB#0: # %entry
95; AVX-NEXT:    vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00]
96; AVX-NEXT:    retl
97entry:
98  %0  = insertelement <2 x float> undef, float 1.0, i32 0
99  %1  = insertelement <2 x float> %0, float -2.0, i32 1
100  %2  = fpext <2 x float> %1 to <2 x double>
101  ret <2 x double> %2
102}
103