1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefix=X32-SSE 3; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=X32-AVX 4; RUN: llc < %s -mtriple=i686-unknown -mattr=+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=X32-AVX512VL 5; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse4.1 -show-mc-encoding | FileCheck %s --check-prefix=X64-SSE 6; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx -show-mc-encoding | FileCheck %s --check-prefix=X64-AVX 7; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+avx512vl -show-mc-encoding | FileCheck %s --check-prefix=X64-AVX512VL 8 9; PR11674 10define void @fpext_frommem(<2 x float>* %in, <2 x double>* %out) { 11; X32-SSE-LABEL: fpext_frommem: 12; X32-SSE: # BB#0: # %entry 13; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08] 14; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04] 15; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0 # encoding: [0x0f,0x5a,0x01] 16; X32-SSE-NEXT: movups %xmm0, (%eax) # encoding: [0x0f,0x11,0x00] 17; X32-SSE-NEXT: retl # encoding: [0xc3] 18; 19; X32-AVX-LABEL: fpext_frommem: 20; X32-AVX: # BB#0: # %entry 21; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08] 22; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04] 23; X32-AVX-NEXT: vcvtps2pd (%ecx), %xmm0 # encoding: [0xc5,0xf8,0x5a,0x01] 24; X32-AVX-NEXT: vmovups %xmm0, (%eax) # encoding: [0xc5,0xf8,0x11,0x00] 25; X32-AVX-NEXT: retl # encoding: [0xc3] 26; 27; X32-AVX512VL-LABEL: fpext_frommem: 28; X32-AVX512VL: # BB#0: # %entry 29; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08] 30; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04] 31; X32-AVX512VL-NEXT: vcvtps2pd (%ecx), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x5a,0x01] 32; X32-AVX512VL-NEXT: vmovups %xmm0, (%eax) # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x11,0x00] 33; X32-AVX512VL-NEXT: retl # encoding: [0xc3] 34; 35; X64-SSE-LABEL: fpext_frommem: 36; X64-SSE: # BB#0: # %entry 37; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # encoding: [0x0f,0x5a,0x07] 38; X64-SSE-NEXT: movups %xmm0, (%rsi) # encoding: [0x0f,0x11,0x06] 39; X64-SSE-NEXT: retq # encoding: [0xc3] 40; 41; X64-AVX-LABEL: fpext_frommem: 42; X64-AVX: # BB#0: # %entry 43; X64-AVX-NEXT: vcvtps2pd (%rdi), %xmm0 # encoding: [0xc5,0xf8,0x5a,0x07] 44; X64-AVX-NEXT: vmovups %xmm0, (%rsi) # encoding: [0xc5,0xf8,0x11,0x06] 45; X64-AVX-NEXT: retq # encoding: [0xc3] 46; 47; X64-AVX512VL-LABEL: fpext_frommem: 48; X64-AVX512VL: # BB#0: # %entry 49; X64-AVX512VL-NEXT: vcvtps2pd (%rdi), %xmm0 # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x5a,0x07] 50; X64-AVX512VL-NEXT: vmovups %xmm0, (%rsi) # EVEX TO VEX Compression encoding: [0xc5,0xf8,0x11,0x06] 51; X64-AVX512VL-NEXT: retq # encoding: [0xc3] 52entry: 53 %0 = load <2 x float>, <2 x float>* %in, align 8 54 %1 = fpext <2 x float> %0 to <2 x double> 55 store <2 x double> %1, <2 x double>* %out, align 1 56 ret void 57} 58 59define void @fpext_frommem4(<4 x float>* %in, <4 x double>* %out) { 60; X32-SSE-LABEL: fpext_frommem4: 61; X32-SSE: # BB#0: # %entry 62; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08] 63; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04] 64; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0 # encoding: [0x0f,0x5a,0x01] 65; X32-SSE-NEXT: cvtps2pd 8(%ecx), %xmm1 # encoding: [0x0f,0x5a,0x49,0x08] 66; X32-SSE-NEXT: movups %xmm1, 16(%eax) # encoding: [0x0f,0x11,0x48,0x10] 67; X32-SSE-NEXT: movups %xmm0, (%eax) # encoding: [0x0f,0x11,0x00] 68; X32-SSE-NEXT: retl # encoding: [0xc3] 69; 70; X32-AVX-LABEL: fpext_frommem4: 71; X32-AVX: # BB#0: # %entry 72; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08] 73; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04] 74; X32-AVX-NEXT: vcvtps2pd (%ecx), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x01] 75; X32-AVX-NEXT: vmovups %ymm0, (%eax) # encoding: [0xc5,0xfc,0x11,0x00] 76; X32-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] 77; X32-AVX-NEXT: retl # encoding: [0xc3] 78; 79; X32-AVX512VL-LABEL: fpext_frommem4: 80; X32-AVX512VL: # BB#0: # %entry 81; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08] 82; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04] 83; X32-AVX512VL-NEXT: vcvtps2pd (%ecx), %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x5a,0x01] 84; X32-AVX512VL-NEXT: vmovups %ymm0, (%eax) # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x11,0x00] 85; X32-AVX512VL-NEXT: retl # encoding: [0xc3] 86; 87; X64-SSE-LABEL: fpext_frommem4: 88; X64-SSE: # BB#0: # %entry 89; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # encoding: [0x0f,0x5a,0x07] 90; X64-SSE-NEXT: cvtps2pd 8(%rdi), %xmm1 # encoding: [0x0f,0x5a,0x4f,0x08] 91; X64-SSE-NEXT: movups %xmm1, 16(%rsi) # encoding: [0x0f,0x11,0x4e,0x10] 92; X64-SSE-NEXT: movups %xmm0, (%rsi) # encoding: [0x0f,0x11,0x06] 93; X64-SSE-NEXT: retq # encoding: [0xc3] 94; 95; X64-AVX-LABEL: fpext_frommem4: 96; X64-AVX: # BB#0: # %entry 97; X64-AVX-NEXT: vcvtps2pd (%rdi), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x07] 98; X64-AVX-NEXT: vmovups %ymm0, (%rsi) # encoding: [0xc5,0xfc,0x11,0x06] 99; X64-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] 100; X64-AVX-NEXT: retq # encoding: [0xc3] 101; 102; X64-AVX512VL-LABEL: fpext_frommem4: 103; X64-AVX512VL: # BB#0: # %entry 104; X64-AVX512VL-NEXT: vcvtps2pd (%rdi), %ymm0 # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x5a,0x07] 105; X64-AVX512VL-NEXT: vmovups %ymm0, (%rsi) # EVEX TO VEX Compression encoding: [0xc5,0xfc,0x11,0x06] 106; X64-AVX512VL-NEXT: retq # encoding: [0xc3] 107entry: 108 %0 = load <4 x float>, <4 x float>* %in 109 %1 = fpext <4 x float> %0 to <4 x double> 110 store <4 x double> %1, <4 x double>* %out, align 1 111 ret void 112} 113 114define void @fpext_frommem8(<8 x float>* %in, <8 x double>* %out) { 115; X32-SSE-LABEL: fpext_frommem8: 116; X32-SSE: # BB#0: # %entry 117; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08] 118; X32-SSE-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04] 119; X32-SSE-NEXT: cvtps2pd (%ecx), %xmm0 # encoding: [0x0f,0x5a,0x01] 120; X32-SSE-NEXT: cvtps2pd 8(%ecx), %xmm1 # encoding: [0x0f,0x5a,0x49,0x08] 121; X32-SSE-NEXT: cvtps2pd 16(%ecx), %xmm2 # encoding: [0x0f,0x5a,0x51,0x10] 122; X32-SSE-NEXT: cvtps2pd 24(%ecx), %xmm3 # encoding: [0x0f,0x5a,0x59,0x18] 123; X32-SSE-NEXT: movups %xmm3, 48(%eax) # encoding: [0x0f,0x11,0x58,0x30] 124; X32-SSE-NEXT: movups %xmm2, 32(%eax) # encoding: [0x0f,0x11,0x50,0x20] 125; X32-SSE-NEXT: movups %xmm1, 16(%eax) # encoding: [0x0f,0x11,0x48,0x10] 126; X32-SSE-NEXT: movups %xmm0, (%eax) # encoding: [0x0f,0x11,0x00] 127; X32-SSE-NEXT: retl # encoding: [0xc3] 128; 129; X32-AVX-LABEL: fpext_frommem8: 130; X32-AVX: # BB#0: # %entry 131; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08] 132; X32-AVX-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04] 133; X32-AVX-NEXT: vcvtps2pd (%ecx), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x01] 134; X32-AVX-NEXT: vcvtps2pd 16(%ecx), %ymm1 # encoding: [0xc5,0xfc,0x5a,0x49,0x10] 135; X32-AVX-NEXT: vmovups %ymm1, 32(%eax) # encoding: [0xc5,0xfc,0x11,0x48,0x20] 136; X32-AVX-NEXT: vmovups %ymm0, (%eax) # encoding: [0xc5,0xfc,0x11,0x00] 137; X32-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] 138; X32-AVX-NEXT: retl # encoding: [0xc3] 139; 140; X32-AVX512VL-LABEL: fpext_frommem8: 141; X32-AVX512VL: # BB#0: # %entry 142; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %eax # encoding: [0x8b,0x44,0x24,0x08] 143; X32-AVX512VL-NEXT: movl {{[0-9]+}}(%esp), %ecx # encoding: [0x8b,0x4c,0x24,0x04] 144; X32-AVX512VL-NEXT: vcvtps2pd (%ecx), %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x5a,0x01] 145; X32-AVX512VL-NEXT: vmovups %zmm0, (%eax) # encoding: [0x62,0xf1,0x7c,0x48,0x11,0x00] 146; X32-AVX512VL-NEXT: retl # encoding: [0xc3] 147; 148; X64-SSE-LABEL: fpext_frommem8: 149; X64-SSE: # BB#0: # %entry 150; X64-SSE-NEXT: cvtps2pd (%rdi), %xmm0 # encoding: [0x0f,0x5a,0x07] 151; X64-SSE-NEXT: cvtps2pd 8(%rdi), %xmm1 # encoding: [0x0f,0x5a,0x4f,0x08] 152; X64-SSE-NEXT: cvtps2pd 16(%rdi), %xmm2 # encoding: [0x0f,0x5a,0x57,0x10] 153; X64-SSE-NEXT: cvtps2pd 24(%rdi), %xmm3 # encoding: [0x0f,0x5a,0x5f,0x18] 154; X64-SSE-NEXT: movups %xmm3, 48(%rsi) # encoding: [0x0f,0x11,0x5e,0x30] 155; X64-SSE-NEXT: movups %xmm2, 32(%rsi) # encoding: [0x0f,0x11,0x56,0x20] 156; X64-SSE-NEXT: movups %xmm1, 16(%rsi) # encoding: [0x0f,0x11,0x4e,0x10] 157; X64-SSE-NEXT: movups %xmm0, (%rsi) # encoding: [0x0f,0x11,0x06] 158; X64-SSE-NEXT: retq # encoding: [0xc3] 159; 160; X64-AVX-LABEL: fpext_frommem8: 161; X64-AVX: # BB#0: # %entry 162; X64-AVX-NEXT: vcvtps2pd (%rdi), %ymm0 # encoding: [0xc5,0xfc,0x5a,0x07] 163; X64-AVX-NEXT: vcvtps2pd 16(%rdi), %ymm1 # encoding: [0xc5,0xfc,0x5a,0x4f,0x10] 164; X64-AVX-NEXT: vmovups %ymm1, 32(%rsi) # encoding: [0xc5,0xfc,0x11,0x4e,0x20] 165; X64-AVX-NEXT: vmovups %ymm0, (%rsi) # encoding: [0xc5,0xfc,0x11,0x06] 166; X64-AVX-NEXT: vzeroupper # encoding: [0xc5,0xf8,0x77] 167; X64-AVX-NEXT: retq # encoding: [0xc3] 168; 169; X64-AVX512VL-LABEL: fpext_frommem8: 170; X64-AVX512VL: # BB#0: # %entry 171; X64-AVX512VL-NEXT: vcvtps2pd (%rdi), %zmm0 # encoding: [0x62,0xf1,0x7c,0x48,0x5a,0x07] 172; X64-AVX512VL-NEXT: vmovups %zmm0, (%rsi) # encoding: [0x62,0xf1,0x7c,0x48,0x11,0x06] 173; X64-AVX512VL-NEXT: retq # encoding: [0xc3] 174entry: 175 %0 = load <8 x float>, <8 x float>* %in 176 %1 = fpext <8 x float> %0 to <8 x double> 177 store <8 x double> %1, <8 x double>* %out, align 1 178 ret void 179} 180 181define <2 x double> @fpext_fromconst() { 182; X32-SSE-LABEL: fpext_fromconst: 183; X32-SSE: # BB#0: # %entry 184; X32-SSE-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00] 185; X32-SSE-NEXT: # encoding: [0x0f,0x28,0x05,A,A,A,A] 186; X32-SSE-NEXT: # fixup A - offset: 3, value: {{\.LCPI.*}}, kind: FK_Data_4 187; X32-SSE-NEXT: retl # encoding: [0xc3] 188; 189; X32-AVX-LABEL: fpext_fromconst: 190; X32-AVX: # BB#0: # %entry 191; X32-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00] 192; X32-AVX-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A] 193; X32-AVX-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}, kind: FK_Data_4 194; X32-AVX-NEXT: retl # encoding: [0xc3] 195; 196; X32-AVX512VL-LABEL: fpext_fromconst: 197; X32-AVX512VL: # BB#0: # %entry 198; X32-AVX512VL-NEXT: vmovaps {{\.LCPI.*}}, %xmm0 # EVEX TO VEX Compression xmm0 = [1.000000e+00,-2.000000e+00] 199; X32-AVX512VL-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A] 200; X32-AVX512VL-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}, kind: FK_Data_4 201; X32-AVX512VL-NEXT: retl # encoding: [0xc3] 202; 203; X64-SSE-LABEL: fpext_fromconst: 204; X64-SSE: # BB#0: # %entry 205; X64-SSE-NEXT: movaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00] 206; X64-SSE-NEXT: # encoding: [0x0f,0x28,0x05,A,A,A,A] 207; X64-SSE-NEXT: # fixup A - offset: 3, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte 208; X64-SSE-NEXT: retq # encoding: [0xc3] 209; 210; X64-AVX-LABEL: fpext_fromconst: 211; X64-AVX: # BB#0: # %entry 212; X64-AVX-NEXT: vmovaps {{.*#+}} xmm0 = [1.000000e+00,-2.000000e+00] 213; X64-AVX-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A] 214; X64-AVX-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte 215; X64-AVX-NEXT: retq # encoding: [0xc3] 216; 217; X64-AVX512VL-LABEL: fpext_fromconst: 218; X64-AVX512VL: # BB#0: # %entry 219; X64-AVX512VL-NEXT: vmovaps {{.*}}(%rip), %xmm0 # EVEX TO VEX Compression xmm0 = [1.000000e+00,-2.000000e+00] 220; X64-AVX512VL-NEXT: # encoding: [0xc5,0xf8,0x28,0x05,A,A,A,A] 221; X64-AVX512VL-NEXT: # fixup A - offset: 4, value: {{\.LCPI.*}}-4, kind: reloc_riprel_4byte 222; X64-AVX512VL-NEXT: retq # encoding: [0xc3] 223entry: 224 %0 = insertelement <2 x float> undef, float 1.0, i32 0 225 %1 = insertelement <2 x float> %0, float -2.0, i32 1 226 %2 = fpext <2 x float> %1 to <2 x double> 227 ret <2 x double> %2 228} 229