1; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx -enable-patchpoint-liveness=false | FileCheck %s 2; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=corei7-avx | FileCheck -check-prefix=PATCH %s 3; 4; Note: Print verbose stackmaps using -debug-only=stackmaps. 5 6; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps 7; CHECK-NEXT: __LLVM_StackMaps: 8; Header 9; CHECK-NEXT: .byte 2 10; CHECK-NEXT: .byte 0 11; CHECK-NEXT: .short 0 12; Num Functions 13; CHECK-NEXT: .long 2 14; Num LargeConstants 15; CHECK-NEXT: .long 0 16; Num Callsites 17; CHECK-NEXT: .long 5 18 19; Functions and stack size 20; CHECK-NEXT: .quad _stackmap_liveness 21; CHECK-NEXT: .quad 8 22; CHECK-NEXT: .quad 3 23; CHECK-NEXT: .quad _mixed_liveness 24; CHECK-NEXT: .quad 8 25; CHECK-NEXT: .quad 2 26 27define void @stackmap_liveness() { 28entry: 29 %a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind 30; StackMap 1 (no liveness information available) 31; CHECK-LABEL: .long L{{.*}}-_stackmap_liveness 32; CHECK-NEXT: .short 0 33; CHECK-NEXT: .short 0 34; Padding 35; CHECK-NEXT: .short 0 36; Num LiveOut Entries: 0 37; CHECK-NEXT: .short 0 38; Align 39; CHECK-NEXT: .p2align 3 40 41; StackMap 1 (patchpoint liveness information enabled) 42; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness 43; PATCH-NEXT: .short 0 44; PATCH-NEXT: .short 0 45; Padding 46; PATCH-NEXT: .short 0 47; Num LiveOut Entries: 1 48; PATCH-NEXT: .short 1 49; LiveOut Entry 1: %YMM2 (16 bytes) --> %XMM2 50; PATCH-NEXT: .short 19 51; PATCH-NEXT: .byte 0 52; PATCH-NEXT: .byte 16 53; Align 54; PATCH-NEXT: .p2align 3 55 call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 1, i32 12, i8* null, i32 0) 56 %a2 = call i64 asm sideeffect "", "={r8}"() nounwind 57 %a3 = call i8 asm sideeffect "", "={ah}"() nounwind 58 %a4 = call <4 x double> asm sideeffect "", "={ymm0}"() nounwind 59 %a5 = call <4 x double> asm sideeffect "", "={ymm1}"() nounwind 60 61; StackMap 2 (no liveness information available) 62; CHECK-LABEL: .long L{{.*}}-_stackmap_liveness 63; CHECK-NEXT: .short 0 64; CHECK-NEXT: .short 0 65; Padding 66; CHECK-NEXT: .short 0 67; Num LiveOut Entries: 0 68; CHECK-NEXT: .short 0 69; Align 70; CHECK-NEXT: .p2align 3 71 72; StackMap 2 (patchpoint liveness information enabled) 73; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness 74; PATCH-NEXT: .short 0 75; PATCH-NEXT: .short 0 76; Padding 77; PATCH-NEXT: .short 0 78; Num LiveOut Entries: 5 79; PATCH-NEXT: .short 5 80; LiveOut Entry 1: %RAX (1 bytes) --> %AL or %AH 81; PATCH-NEXT: .short 0 82; PATCH-NEXT: .byte 0 83; PATCH-NEXT: .byte 1 84; LiveOut Entry 2: %R8 (8 bytes) 85; PATCH-NEXT: .short 8 86; PATCH-NEXT: .byte 0 87; PATCH-NEXT: .byte 8 88; LiveOut Entry 3: %YMM0 (32 bytes) 89; PATCH-NEXT: .short 17 90; PATCH-NEXT: .byte 0 91; PATCH-NEXT: .byte 32 92; LiveOut Entry 4: %YMM1 (32 bytes) 93; PATCH-NEXT: .short 18 94; PATCH-NEXT: .byte 0 95; PATCH-NEXT: .byte 32 96; LiveOut Entry 5: %YMM2 (16 bytes) --> %XMM2 97; PATCH-NEXT: .short 19 98; PATCH-NEXT: .byte 0 99; PATCH-NEXT: .byte 16 100; Align 101; PATCH-NEXT: .p2align 3 102 call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 2, i32 12, i8* null, i32 0) 103 call void asm sideeffect "", "{r8},{ah},{ymm0},{ymm1}"(i64 %a2, i8 %a3, <4 x double> %a4, <4 x double> %a5) nounwind 104 105; StackMap 3 (no liveness information available) 106; CHECK-LABEL: .long L{{.*}}-_stackmap_liveness 107; CHECK-NEXT: .short 0 108; CHECK-NEXT: .short 0 109; Padding 110; CHECK-NEXT: .short 0 111; Num LiveOut Entries: 0 112; CHECK-NEXT: .short 0 113; Align 114; CHECK-NEXT: .p2align 3 115 116; StackMap 3 (patchpoint liveness information enabled) 117; PATCH-LABEL: .long L{{.*}}-_stackmap_liveness 118; PATCH-NEXT: .short 0 119; PATCH-NEXT: .short 0 120; Padding 121; PATCH-NEXT: .short 0 122; Num LiveOut Entries: 2 123; PATCH-NEXT: .short 2 124; LiveOut Entry 1: %RSP (8 bytes) 125; PATCH-NEXT: .short 7 126; PATCH-NEXT: .byte 0 127; PATCH-NEXT: .byte 8 128; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2 129; PATCH-NEXT: .short 19 130; PATCH-NEXT: .byte 0 131; PATCH-NEXT: .byte 16 132; Align 133; PATCH-NEXT: .p2align 3 134 call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 3, i32 12, i8* null, i32 0) 135 call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind 136 ret void 137} 138 139define void @mixed_liveness() { 140entry: 141 %a1 = call <2 x double> asm sideeffect "", "={xmm2}"() nounwind 142; StackMap 4 (patchpoint liveness information enabled) 143; PATCH-LABEL: .long L{{.*}}-_mixed_liveness 144; PATCH-NEXT: .short 0 145; PATCH-NEXT: .short 0 146; Padding 147; PATCH-NEXT: .short 0 148; Num LiveOut Entries: 0 149; PATCH-NEXT: .short 0 150; Align 151; PATCH-NEXT: .p2align 3 152 153; StackMap 5 (patchpoint liveness information enabled) 154; PATCH-LABEL: .long L{{.*}}-_mixed_liveness 155; PATCH-NEXT: .short 0 156; PATCH-NEXT: .short 0 157; Padding 158; PATCH-NEXT: .short 0 159; Num LiveOut Entries: 2 160; PATCH-NEXT: .short 2 161; LiveOut Entry 1: %RSP (8 bytes) 162; PATCH-NEXT: .short 7 163; PATCH-NEXT: .byte 0 164; PATCH-NEXT: .byte 8 165; LiveOut Entry 2: %YMM2 (16 bytes) --> %XMM2 166; PATCH-NEXT: .short 19 167; PATCH-NEXT: .byte 0 168; PATCH-NEXT: .byte 16 169; Align 170; PATCH-NEXT: .p2align 3 171 call void (i64, i32, ...) @llvm.experimental.stackmap(i64 4, i32 5) 172 call anyregcc void (i64, i32, i8*, i32, ...) @llvm.experimental.patchpoint.void(i64 5, i32 0, i8* null, i32 0) 173 call void asm sideeffect "", "{xmm2}"(<2 x double> %a1) nounwind 174 ret void 175} 176 177declare void @llvm.experimental.stackmap(i64, i32, ...) 178declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...) 179