1; RUN: llc -O3 -verify-machineinstrs -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+sse4.2 < %s | FileCheck %s
2
3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
4target triple = "x86_64-unknown-unknown"
5
6; Stack reload folding tests.
7;
8; By including a nop call with sideeffects we can force a partial register spill of the
9; relevant registers and check that the reload is correctly folded into the instruction.
10
11define <2 x double> @stack_fold_addpd(<2 x double> %a0, <2 x double> %a1) {
12  ;CHECK-LABEL: stack_fold_addpd
13  ;CHECK:       addpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
14  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
15  %2 = fadd <2 x double> %a0, %a1
16  ret <2 x double> %2
17}
18
19define <4 x float> @stack_fold_addps(<4 x float> %a0, <4 x float> %a1) {
20  ;CHECK-LABEL: stack_fold_addps
21  ;CHECK:       addps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
22  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
23  %2 = fadd <4 x float> %a0, %a1
24  ret <4 x float> %2
25}
26
27define double @stack_fold_addsd(double %a0, double %a1) {
28  ;CHECK-LABEL: stack_fold_addsd
29  ;CHECK:       addsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
30  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
31  %2 = fadd double %a0, %a1
32  ret double %2
33}
34
35define <2 x double> @stack_fold_addsd_int(<2 x double> %a0, <2 x double> %a1) {
36  ;CHECK-LABEL: stack_fold_addsd_int
37  ;CHECK:       addsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
38  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
39  %2 = call <2 x double> @llvm.x86.sse2.add.sd(<2 x double> %a0, <2 x double> %a1)
40  ret <2 x double> %2
41}
42declare <2 x double> @llvm.x86.sse2.add.sd(<2 x double>, <2 x double>) nounwind readnone
43
44define float @stack_fold_addss(float %a0, float %a1) {
45  ;CHECK-LABEL: stack_fold_addss
46  ;CHECK:       addss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
47  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
48  %2 = fadd float %a0, %a1
49  ret float %2
50}
51
52define <4 x float> @stack_fold_addss_int(<4 x float> %a0, <4 x float> %a1) {
53  ;CHECK-LABEL: stack_fold_addss_int
54  ;CHECK:       addss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
55  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
56  %2 = call <4 x float> @llvm.x86.sse.add.ss(<4 x float> %a0, <4 x float> %a1)
57  ret <4 x float> %2
58}
59declare <4 x float> @llvm.x86.sse.add.ss(<4 x float>, <4 x float>) nounwind readnone
60
61define <2 x double> @stack_fold_addsubpd(<2 x double> %a0, <2 x double> %a1) {
62  ;CHECK-LABEL: stack_fold_addsubpd
63  ;CHECK:       addsubpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
64  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
65  %2 = call <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double> %a0, <2 x double> %a1)
66  ret <2 x double> %2
67}
68declare <2 x double> @llvm.x86.sse3.addsub.pd(<2 x double>, <2 x double>) nounwind readnone
69
70define <4 x float> @stack_fold_addsubps(<4 x float> %a0, <4 x float> %a1) {
71  ;CHECK-LABEL: stack_fold_addsubps
72  ;CHECK:       addsubps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
73  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
74  %2 = call <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float> %a0, <4 x float> %a1)
75  ret <4 x float> %2
76}
77declare <4 x float> @llvm.x86.sse3.addsub.ps(<4 x float>, <4 x float>) nounwind readnone
78
79define <2 x double> @stack_fold_andnpd(<2 x double> %a0, <2 x double> %a1) {
80  ;CHECK-LABEL: stack_fold_andnpd
81  ;CHECK:       andnpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
82  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
83  %2 = bitcast <2 x double> %a0 to <2 x i64>
84  %3 = bitcast <2 x double> %a1 to <2 x i64>
85  %4 = xor <2 x i64> %2, <i64 -1, i64 -1>
86  %5 = and <2 x i64> %4, %3
87  %6 = bitcast <2 x i64> %5 to <2 x double>
88  ; fadd forces execution domain
89  %7 = fadd <2 x double> %6, <double 0x0, double 0x0>
90  ret <2 x double> %7
91}
92
93define <4 x float> @stack_fold_andnps(<4 x float> %a0, <4 x float> %a1) {
94  ;CHECK-LABEL: stack_fold_andnps
95  ;CHECK:       andnps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
96  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
97  %2 = bitcast <4 x float> %a0 to <2 x i64>
98  %3 = bitcast <4 x float> %a1 to <2 x i64>
99  %4 = xor <2 x i64> %2, <i64 -1, i64 -1>
100  %5 = and <2 x i64> %4, %3
101  %6 = bitcast <2 x i64> %5 to <4 x float>
102  ; fadd forces execution domain
103  %7 = fadd <4 x float> %6, <float 0x0, float 0x0, float 0x0, float 0x0>
104  ret <4 x float> %7
105}
106
107define <2 x double> @stack_fold_andpd(<2 x double> %a0, <2 x double> %a1) {
108  ;CHECK-LABEL: stack_fold_andpd
109  ;CHECK:       andpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
110  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
111  %2 = bitcast <2 x double> %a0 to <2 x i64>
112  %3 = bitcast <2 x double> %a1 to <2 x i64>
113  %4 = and <2 x i64> %2, %3
114  %5 = bitcast <2 x i64> %4 to <2 x double>
115  ; fadd forces execution domain
116  %6 = fadd <2 x double> %5, <double 0x0, double 0x0>
117  ret <2 x double> %6
118}
119
120define <4 x float> @stack_fold_andps(<4 x float> %a0, <4 x float> %a1) {
121  ;CHECK-LABEL: stack_fold_andps
122  ;CHECK:       andps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
123  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
124  %2 = bitcast <4 x float> %a0 to <2 x i64>
125  %3 = bitcast <4 x float> %a1 to <2 x i64>
126  %4 = and <2 x i64> %2, %3
127  %5 = bitcast <2 x i64> %4 to <4 x float>
128  ; fadd forces execution domain
129  %6 = fadd <4 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0>
130  ret <4 x float> %6
131}
132
133define <2 x double> @stack_fold_blendpd(<2 x double> %a0, <2 x double> %a1) {
134  ;CHECK-LABEL: stack_fold_blendpd
135  ;CHECK:       blendpd $2, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
136  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
137  %2 = select <2 x i1> <i1 1, i1 0>, <2 x double> %a0, <2 x double> %a1
138  ret <2 x double> %2
139}
140
141define <4 x float> @stack_fold_blendps(<4 x float> %a0, <4 x float> %a1) {
142  ;CHECK-LABEL: stack_fold_blendps
143  ;CHECK:       blendps $6, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
144  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
145  %2 = select <4 x i1> <i1 1, i1 0, i1 0, i1 1>, <4 x float> %a0, <4 x float> %a1
146  ret <4 x float> %2
147}
148
149define <2 x double> @stack_fold_blendvpd(<2 x double> %a0, <2 x double> %a1, <2 x double> %c) {
150  ;CHECK-LABEL: stack_fold_blendvpd
151  ;CHECK:       blendvpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
152  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
153  %2 = call <2 x double> @llvm.x86.sse41.blendvpd(<2 x double> %a1, <2 x double> %c, <2 x double> %a0)
154  ret <2 x double> %2
155}
156declare <2 x double> @llvm.x86.sse41.blendvpd(<2 x double>, <2 x double>, <2 x double>) nounwind readnone
157
158define <4 x float> @stack_fold_blendvps(<4 x float> %a0, <4 x float> %a1, <4 x float> %c) {
159  ;CHECK-LABEL: stack_fold_blendvps
160  ;CHECK:       blendvps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
161  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
162  %2 = call <4 x float> @llvm.x86.sse41.blendvps(<4 x float> %a1, <4 x float> %c, <4 x float> %a0)
163  ret <4 x float> %2
164}
165declare <4 x float> @llvm.x86.sse41.blendvps(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
166
167define <2 x double> @stack_fold_cmppd(<2 x double> %a0, <2 x double> %a1) {
168  ;CHECK-LABEL: stack_fold_cmppd
169  ;CHECK:       cmpeqpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
170  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
171  %2 = call <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double> %a0, <2 x double> %a1, i8 0)
172  ret <2 x double> %2
173}
174declare <2 x double> @llvm.x86.sse2.cmp.pd(<2 x double>, <2 x double>, i8) nounwind readnone
175
176define <4 x float> @stack_fold_cmpps(<4 x float> %a0, <4 x float> %a1) {
177  ;CHECK-LABEL: stack_fold_cmpps
178  ;CHECK:       cmpeqps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
179  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
180  %2 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %a0, <4 x float> %a1, i8 0)
181  ret <4 x float> %2
182}
183declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone
184
185define i32 @stack_fold_cmpsd(double %a0, double %a1) {
186  ;CHECK-LABEL: stack_fold_cmpsd
187  ;CHECK:       cmpeqsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
188  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
189  %2 = fcmp oeq double %a0, %a1
190  %3 = zext i1 %2 to i32
191  ret i32 %3
192}
193
194define <2 x double> @stack_fold_cmpsd_int(<2 x double> %a0, <2 x double> %a1) {
195  ;CHECK-LABEL: stack_fold_cmpsd_int
196  ;CHECK:       cmpeqsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
197  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
198  %2 = call <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double> %a0, <2 x double> %a1, i8 0)
199  ret <2 x double> %2
200}
201declare <2 x double> @llvm.x86.sse2.cmp.sd(<2 x double>, <2 x double>, i8) nounwind readnone
202
203define i32 @stack_fold_cmpss(float %a0, float %a1) {
204  ;CHECK-LABEL: stack_fold_cmpss
205  ;CHECK:       cmpeqss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
206  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
207  %2 = fcmp oeq float %a0, %a1
208  %3 = zext i1 %2 to i32
209  ret i32 %3
210}
211
212define <4 x float> @stack_fold_cmpss_int(<4 x float> %a0, <4 x float> %a1) {
213  ;CHECK-LABEL: stack_fold_cmpss_int
214  ;CHECK:       cmpeqss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
215  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
216  %2 = call <4 x float> @llvm.x86.sse.cmp.ss(<4 x float> %a0, <4 x float> %a1, i8 0)
217  ret <4 x float> %2
218}
219declare <4 x float> @llvm.x86.sse.cmp.ss(<4 x float>, <4 x float>, i8) nounwind readnone
220
221; TODO stack_fold_comisd
222
223define i32 @stack_fold_comisd_int(<2 x double> %a0, <2 x double> %a1) {
224  ;CHECK-LABEL: stack_fold_comisd_int
225  ;CHECK:       comisd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
226  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
227  %2 = call i32 @llvm.x86.sse2.comieq.sd(<2 x double> %a0, <2 x double> %a1)
228  ret i32 %2
229}
230declare i32 @llvm.x86.sse2.comieq.sd(<2 x double>, <2 x double>) nounwind readnone
231
232; TODO stack_fold_comiss
233
234define i32 @stack_fold_comiss_int(<4 x float> %a0, <4 x float> %a1) {
235  ;CHECK-LABEL: stack_fold_comiss_int
236  ;CHECK:       comiss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
237  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
238  %2 = call i32 @llvm.x86.sse.comieq.ss(<4 x float> %a0, <4 x float> %a1)
239  ret i32 %2
240}
241declare i32 @llvm.x86.sse.comieq.ss(<4 x float>, <4 x float>) nounwind readnone
242
243define <2 x double> @stack_fold_cvtdq2pd(<4 x i32> %a0) {
244  ;CHECK-LABEL: stack_fold_cvtdq2pd
245  ;CHECK:       cvtdq2pd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
246  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
247  %2 = shufflevector <4 x i32> %a0, <4 x i32> undef, <2 x i32> <i32 0, i32 1>
248  %3 = sitofp <2 x i32> %2 to <2 x double>
249  ret <2 x double> %3
250}
251
252define <2 x double> @stack_fold_cvtdq2pd_int(<4 x i32> %a0) {
253  ;CHECK-LABEL: stack_fold_cvtdq2pd_int
254  ;CHECK:       cvtdq2pd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
255  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
256  %2 = call <2 x double> @llvm.x86.sse2.cvtdq2pd(<4 x i32> %a0)
257  ret <2 x double> %2
258}
259declare <2 x double> @llvm.x86.sse2.cvtdq2pd(<4 x i32>) nounwind readnone
260
261define <4 x float> @stack_fold_cvtdq2ps(<4 x i32> %a0) {
262  ;CHECK-LABEL: stack_fold_cvtdq2ps
263  ;CHECK:       cvtdq2ps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
264  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
265  %2 = sitofp <4 x i32> %a0 to <4 x float>
266  ret <4 x float> %2
267}
268
269define <4 x i32> @stack_fold_cvtpd2dq(<2 x double> %a0) {
270  ;CHECK-LABEL: stack_fold_cvtpd2dq
271  ;CHECK:       cvtpd2dq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
272  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
273  %2 = call <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double> %a0)
274  ret <4 x i32> %2
275}
276declare <4 x i32> @llvm.x86.sse2.cvtpd2dq(<2 x double>) nounwind readnone
277
278define <2 x float> @stack_fold_cvtpd2ps(<2 x double> %a0) {
279  ;CHECK-LABEL: stack_fold_cvtpd2ps
280  ;CHECK:       cvtpd2ps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
281  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
282  %2 = fptrunc <2 x double> %a0 to <2 x float>
283  ret <2 x float> %2
284}
285
286define <4 x i32> @stack_fold_cvtps2dq(<4 x float> %a0) {
287  ;CHECK-LABEL: stack_fold_cvtps2dq
288  ;CHECK:       cvtps2dq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
289  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
290  %2 = call <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float> %a0)
291  ret <4 x i32> %2
292}
293declare <4 x i32> @llvm.x86.sse2.cvtps2dq(<4 x float>) nounwind readnone
294
295define <2 x double> @stack_fold_cvtps2pd(<4 x float> %a0) {
296  ;CHECK-LABEL: stack_fold_cvtps2pd
297  ;CHECK:       cvtps2pd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
298  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
299  %2 = shufflevector <4 x float> %a0, <4 x float> undef, <2 x i32> <i32 0, i32 1>
300  %3 = fpext <2 x float> %2 to <2 x double>
301  ret <2 x double> %3
302}
303
304define <2 x double> @stack_fold_cvtps2pd_int(<4 x float> %a0) {
305  ;CHECK-LABEL: stack_fold_cvtps2pd_int
306  ;CHECK:       cvtps2pd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
307  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
308  %2 = call <2 x double> @llvm.x86.sse2.cvtps2pd(<4 x float> %a0)
309  ret <2 x double> %2
310}
311declare <2 x double> @llvm.x86.sse2.cvtps2pd(<4 x float>) nounwind readnone
312
313; TODO stack_fold_cvtsd2si
314
315define i32 @stack_fold_cvtsd2si_int(<2 x double> %a0) {
316  ;CHECK-LABEL: stack_fold_cvtsd2si_int
317  ;CHECK:       cvtsd2si {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 16-byte Folded Reload
318  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
319  %2 = call i32 @llvm.x86.sse2.cvtsd2si(<2 x double> %a0)
320  ret i32 %2
321}
322declare i32 @llvm.x86.sse2.cvtsd2si(<2 x double>) nounwind readnone
323
324; TODO stack_fold_cvtsd2si64
325
326define i64 @stack_fold_cvtsd2si64_int(<2 x double> %a0) {
327  ;CHECK-LABEL: stack_fold_cvtsd2si64_int
328  ;CHECK:       cvtsd2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 16-byte Folded Reload
329  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
330  %2 = call i64 @llvm.x86.sse2.cvtsd2si64(<2 x double> %a0)
331  ret i64 %2
332}
333declare i64 @llvm.x86.sse2.cvtsd2si64(<2 x double>) nounwind readnone
334
335define float @stack_fold_cvtsd2ss(double %a0) minsize {
336  ;CHECK-LABEL: stack_fold_cvtsd2ss
337  ;CHECK:       cvtsd2ss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
338  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
339  %2 = fptrunc double %a0 to float
340  ret float %2
341}
342
343define <4 x float> @stack_fold_cvtsd2ss_int(<2 x double> %a0) optsize {
344  ;CHECK-LABEL: stack_fold_cvtsd2ss_int
345  ;CHECK:       cvtsd2ss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
346  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
347  %2 = call <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float> <float 0x0, float 0x0, float 0x0, float 0x0>, <2 x double> %a0)
348  ret <4 x float> %2
349}
350declare <4 x float> @llvm.x86.sse2.cvtsd2ss(<4 x float>, <2 x double>) nounwind readnone
351
352define double @stack_fold_cvtsi2sd(i32 %a0) minsize {
353  ;CHECK-LABEL: stack_fold_cvtsi2sd
354  ;CHECK:       cvtsi2sdl {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
355  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
356  %2 = sitofp i32 %a0 to double
357  ret double %2
358}
359
360define <2 x double> @stack_fold_cvtsi2sd_int(i32 %a0) {
361  ;CHECK-LABEL: stack_fold_cvtsi2sd_int
362  ;CHECK:       cvtsi2sdl {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
363  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
364  %2 = call <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double> <double 0x0, double 0x0>, i32 %a0)
365  ret <2 x double> %2
366}
367declare <2 x double> @llvm.x86.sse2.cvtsi2sd(<2 x double>, i32) nounwind readnone
368
369define double @stack_fold_cvtsi642sd(i64 %a0) optsize {
370  ;CHECK-LABEL: stack_fold_cvtsi642sd
371  ;CHECK:       cvtsi2sdq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
372  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
373  %2 = sitofp i64 %a0 to double
374  ret double %2
375}
376
377define <2 x double> @stack_fold_cvtsi642sd_int(i64 %a0) {
378  ;CHECK-LABEL: stack_fold_cvtsi642sd_int
379  ;CHECK:       cvtsi2sdq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
380  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
381  %2 = call <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double> <double 0x0, double 0x0>, i64 %a0)
382  ret <2 x double> %2
383}
384declare <2 x double> @llvm.x86.sse2.cvtsi642sd(<2 x double>, i64) nounwind readnone
385
386define float @stack_fold_cvtsi2ss(i32 %a0) minsize {
387  ;CHECK-LABEL: stack_fold_cvtsi2ss
388  ;CHECK:       cvtsi2ssl {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
389  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
390  %2 = sitofp i32 %a0 to float
391  ret float %2
392}
393
394define <4 x float> @stack_fold_cvtsi2ss_int(i32 %a0) {
395  ;CHECK-LABEL: stack_fold_cvtsi2ss_int
396  ;CHECK:  cvtsi2ssl {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
397  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
398  %2 = call <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float> <float 0x0, float 0x0, float 0x0, float 0x0>, i32 %a0)
399  ret <4 x float> %2
400}
401declare <4 x float> @llvm.x86.sse.cvtsi2ss(<4 x float>, i32) nounwind readnone
402
403define float @stack_fold_cvtsi642ss(i64 %a0) optsize {
404  ;CHECK-LABEL: stack_fold_cvtsi642ss
405  ;CHECK:       cvtsi2ssq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
406  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
407  %2 = sitofp i64 %a0 to float
408  ret float %2
409}
410
411define <4 x float> @stack_fold_cvtsi642ss_int(i64 %a0) {
412  ;CHECK-LABEL: stack_fold_cvtsi642ss_int
413  ;CHECK:  cvtsi2ssq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
414  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
415  %2 = call <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float> <float 0x0, float 0x0, float 0x0, float 0x0>, i64 %a0)
416  ret <4 x float> %2
417}
418declare <4 x float> @llvm.x86.sse.cvtsi642ss(<4 x float>, i64) nounwind readnone
419
420define double @stack_fold_cvtss2sd(float %a0) minsize {
421  ;CHECK-LABEL: stack_fold_cvtss2sd
422  ;CHECK:       cvtss2sd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
423  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
424  %2 = fpext float %a0 to double
425  ret double %2
426}
427
428define <2 x double> @stack_fold_cvtss2sd_int(<4 x float> %a0) optsize {
429  ;CHECK-LABEL: stack_fold_cvtss2sd_int
430  ;CHECK:       cvtss2sd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
431  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
432  %2 = call <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double> <double 0x0, double 0x0>, <4 x float> %a0)
433  ret <2 x double> %2
434}
435declare <2 x double> @llvm.x86.sse2.cvtss2sd(<2 x double>, <4 x float>) nounwind readnone
436
437; TODO stack_fold_cvtss2si
438
439define i32 @stack_fold_cvtss2si_int(<4 x float> %a0) {
440  ;CHECK-LABEL: stack_fold_cvtss2si_int
441  ;CHECK:       cvtss2si {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 16-byte Folded Reload
442  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
443  %2 = call i32 @llvm.x86.sse.cvtss2si(<4 x float> %a0)
444  ret i32 %2
445}
446declare i32 @llvm.x86.sse.cvtss2si(<4 x float>) nounwind readnone
447
448; TODO stack_fold_cvtss2si64
449
450define i64 @stack_fold_cvtss2si64_int(<4 x float> %a0) {
451  ;CHECK-LABEL: stack_fold_cvtss2si64_int
452  ;CHECK:       cvtss2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 16-byte Folded Reload
453  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
454  %2 = call i64 @llvm.x86.sse.cvtss2si64(<4 x float> %a0)
455  ret i64 %2
456}
457declare i64 @llvm.x86.sse.cvtss2si64(<4 x float>) nounwind readnone
458
459define <4 x i32> @stack_fold_cvttpd2dq(<2 x double> %a0) {
460  ;CHECK-LABEL: stack_fold_cvttpd2dq
461  ;CHECK:       cvttpd2dq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
462  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
463  %2 = call <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double> %a0)
464  ret <4 x i32> %2
465}
466declare <4 x i32> @llvm.x86.sse2.cvttpd2dq(<2 x double>) nounwind readnone
467
468define <4 x i32> @stack_fold_cvttps2dq(<4 x float> %a0) {
469  ;CHECK-LABEL: stack_fold_cvttps2dq
470  ;CHECK:       cvttps2dq {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
471  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
472  %2 = fptosi <4 x float> %a0 to <4 x i32>
473  ret <4 x i32> %2
474}
475
476define i32 @stack_fold_cvttsd2si(double %a0) {
477  ;CHECK-LABEL: stack_fold_cvttsd2si
478  ;CHECK:       cvttsd2si {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 8-byte Folded Reload
479  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
480  %2 = fptosi double %a0 to i32
481  ret i32 %2
482}
483
484define i32 @stack_fold_cvttsd2si_int(<2 x double> %a0) {
485  ;CHECK-LABEL: stack_fold_cvttsd2si_int
486  ;CHECK:       cvttsd2si {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 16-byte Folded Reload
487  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
488  %2 = call i32 @llvm.x86.sse2.cvttsd2si(<2 x double> %a0)
489  ret i32 %2
490}
491declare i32 @llvm.x86.sse2.cvttsd2si(<2 x double>) nounwind readnone
492
493define i64 @stack_fold_cvttsd2si64(double %a0) {
494  ;CHECK-LABEL: stack_fold_cvttsd2si64
495  ;CHECK:       cvttsd2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
496  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
497  %2 = fptosi double %a0 to i64
498  ret i64 %2
499}
500
501define i64 @stack_fold_cvttsd2si64_int(<2 x double> %a0) {
502  ;CHECK-LABEL: stack_fold_cvttsd2si64_int
503  ;CHECK:       cvttsd2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 16-byte Folded Reload
504  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
505  %2 = call i64 @llvm.x86.sse2.cvttsd2si64(<2 x double> %a0)
506  ret i64 %2
507}
508declare i64 @llvm.x86.sse2.cvttsd2si64(<2 x double>) nounwind readnone
509
510define i32 @stack_fold_cvttss2si(float %a0) {
511  ;CHECK-LABEL: stack_fold_cvttss2si
512  ;CHECK:       cvttss2si {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
513  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
514  %2 = fptosi float %a0 to i32
515  ret i32 %2
516}
517
518define i32 @stack_fold_cvttss2si_int(<4 x float> %a0) {
519  ;CHECK-LABEL: stack_fold_cvttss2si_int
520  ;CHECK:       cvttss2si {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 16-byte Folded Reload
521  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
522  %2 = call i32 @llvm.x86.sse.cvttss2si(<4 x float> %a0)
523  ret i32 %2
524}
525declare i32 @llvm.x86.sse.cvttss2si(<4 x float>) nounwind readnone
526
527define i64 @stack_fold_cvttss2si64(float %a0) {
528  ;CHECK-LABEL: stack_fold_cvttss2si64
529  ;CHECK:       cvttss2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 4-byte Folded Reload
530  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
531  %2 = fptosi float %a0 to i64
532  ret i64 %2
533}
534
535define i64 @stack_fold_cvttss2si64_int(<4 x float> %a0) {
536  ;CHECK-LABEL: stack_fold_cvttss2si64_int
537  ;CHECK:       cvttss2si {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 16-byte Folded Reload
538  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
539  %2 = call i64 @llvm.x86.sse.cvttss2si64(<4 x float> %a0)
540  ret i64 %2
541}
542declare i64 @llvm.x86.sse.cvttss2si64(<4 x float>) nounwind readnone
543
544define <2 x double> @stack_fold_divpd(<2 x double> %a0, <2 x double> %a1) {
545  ;CHECK-LABEL: stack_fold_divpd
546  ;CHECK:       divpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
547  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
548  %2 = fdiv <2 x double> %a0, %a1
549  ret <2 x double> %2
550}
551
552define <4 x float> @stack_fold_divps(<4 x float> %a0, <4 x float> %a1) {
553  ;CHECK-LABEL: stack_fold_divps
554  ;CHECK:       divps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
555  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
556  %2 = fdiv <4 x float> %a0, %a1
557  ret <4 x float> %2
558}
559
560define double @stack_fold_divsd(double %a0, double %a1) {
561  ;CHECK-LABEL: stack_fold_divsd
562  ;CHECK:       divsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
563  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
564  %2 = fdiv double %a0, %a1
565  ret double %2
566}
567
568define <2 x double> @stack_fold_divsd_int(<2 x double> %a0, <2 x double> %a1) {
569  ;CHECK-LABEL: stack_fold_divsd_int
570  ;CHECK:       divsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
571  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
572  %2 = call <2 x double> @llvm.x86.sse2.div.sd(<2 x double> %a0, <2 x double> %a1)
573  ret <2 x double> %2
574}
575declare <2 x double> @llvm.x86.sse2.div.sd(<2 x double>, <2 x double>) nounwind readnone
576
577define float @stack_fold_divss(float %a0, float %a1) {
578  ;CHECK-LABEL: stack_fold_divss
579  ;CHECK:       divss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
580  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
581  %2 = fdiv float %a0, %a1
582  ret float %2
583}
584
585define <4 x float> @stack_fold_divss_int(<4 x float> %a0, <4 x float> %a1) {
586  ;CHECK-LABEL: stack_fold_divss_int
587  ;CHECK:       divss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
588  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
589  %2 = call <4 x float> @llvm.x86.sse.div.ss(<4 x float> %a0, <4 x float> %a1)
590  ret <4 x float> %2
591}
592declare <4 x float> @llvm.x86.sse.div.ss(<4 x float>, <4 x float>) nounwind readnone
593
594define <2 x double> @stack_fold_dppd(<2 x double> %a0, <2 x double> %a1) {
595  ;CHECK-LABEL: stack_fold_dppd
596  ;CHECK:       dppd $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
597  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
598  %2 = call <2 x double> @llvm.x86.sse41.dppd(<2 x double> %a0, <2 x double> %a1, i8 7)
599  ret <2 x double> %2
600}
601declare <2 x double> @llvm.x86.sse41.dppd(<2 x double>, <2 x double>, i8) nounwind readnone
602
603define <4 x float> @stack_fold_dpps(<4 x float> %a0, <4 x float> %a1) {
604  ;CHECK-LABEL: stack_fold_dpps
605  ;CHECK:       dpps $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
606  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
607  %2 = call <4 x float> @llvm.x86.sse41.dpps(<4 x float> %a0, <4 x float> %a1, i8 7)
608  ret <4 x float> %2
609}
610declare <4 x float> @llvm.x86.sse41.dpps(<4 x float>, <4 x float>, i8) nounwind readnone
611
612define i32 @stack_fold_extractps(<4 x float> %a0) {
613  ;CHECK-LABEL: stack_fold_extractps
614  ;CHECK:       extractps $1, {{%xmm[0-9][0-9]*}}, {{-?[0-9]*}}(%rsp) {{.*#+}} 4-byte Folded Spill
615  ;CHECK:       movl    {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Reload
616  ; fadd forces execution domain
617  %1 = fadd <4 x float> %a0, <float 1.0, float 2.0, float 3.0, float 4.0>
618  %2 = extractelement <4 x float> %1, i32 1
619  %3 = bitcast float %2 to i32
620  %4 = tail call <2 x i64> asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
621  ret i32 %3
622}
623
624define <2 x double> @stack_fold_haddpd(<2 x double> %a0, <2 x double> %a1) {
625  ;CHECK-LABEL: stack_fold_haddpd
626  ;CHECK:       haddpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
627  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
628  %2 = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1)
629  ret <2 x double> %2
630}
631declare <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double>, <2 x double>) nounwind readnone
632
633define <4 x float> @stack_fold_haddps(<4 x float> %a0, <4 x float> %a1) {
634  ;CHECK-LABEL: stack_fold_haddps
635  ;CHECK:       haddps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
636  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
637  %2 = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1)
638  ret <4 x float> %2
639}
640declare <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float>, <4 x float>) nounwind readnone
641
642define <2 x double> @stack_fold_hsubpd(<2 x double> %a0, <2 x double> %a1) {
643  ;CHECK-LABEL: stack_fold_hsubpd
644  ;CHECK:       hsubpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
645  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
646  %2 = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1)
647  ret <2 x double> %2
648}
649declare <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double>, <2 x double>) nounwind readnone
650
651define <4 x float> @stack_fold_hsubps(<4 x float> %a0, <4 x float> %a1) {
652  ;CHECK-LABEL: stack_fold_hsubps
653  ;CHECK:       hsubps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
654  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
655  %2 = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1)
656  ret <4 x float> %2
657}
658declare <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float>, <4 x float>) nounwind readnone
659
660define <4 x float> @stack_fold_insertps(<4 x float> %a0, <4 x float> %a1) {
661  ;CHECK-LABEL: stack_fold_insertps
662  ;CHECK:       insertps $17, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
663  ;CHECK-NEXT:                                                        {{.*#+}} xmm0 = zero,mem[0],xmm0[2,3]
664  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
665  %2 = call <4 x float> @llvm.x86.sse41.insertps(<4 x float> %a0, <4 x float> %a1, i8 209)
666  ret <4 x float> %2
667}
668declare <4 x float> @llvm.x86.sse41.insertps(<4 x float>, <4 x float>, i8) nounwind readnone
669
670define <2 x double> @stack_fold_maxpd(<2 x double> %a0, <2 x double> %a1) #0 {
671  ;CHECK-LABEL: stack_fold_maxpd
672  ;CHECK:       maxpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
673  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
674  %2 = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %a0, <2 x double> %a1)
675  ret <2 x double> %2
676}
677declare <2 x double> @llvm.x86.sse2.max.pd(<2 x double>, <2 x double>) nounwind readnone
678
679define <2 x double> @stack_fold_maxpd_commutable(<2 x double> %a0, <2 x double> %a1) #1 {
680  ;CHECK-LABEL: stack_fold_maxpd_commutable
681  ;CHECK:       maxpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
682  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
683  %2 = call <2 x double> @llvm.x86.sse2.max.pd(<2 x double> %a0, <2 x double> %a1)
684  ret <2 x double> %2
685}
686
687define <4 x float> @stack_fold_maxps(<4 x float> %a0, <4 x float> %a1) #0 {
688  ;CHECK-LABEL: stack_fold_maxps
689  ;CHECK:       maxps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
690  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
691  %2 = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %a0, <4 x float> %a1)
692  ret <4 x float> %2
693}
694declare <4 x float> @llvm.x86.sse.max.ps(<4 x float>, <4 x float>) nounwind readnone
695
696define <4 x float> @stack_fold_maxps_commutable(<4 x float> %a0, <4 x float> %a1) #1 {
697  ;CHECK-LABEL: stack_fold_maxps_commutable
698  ;CHECK:       maxps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
699  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
700  %2 = call <4 x float> @llvm.x86.sse.max.ps(<4 x float> %a0, <4 x float> %a1)
701  ret <4 x float> %2
702}
703
704define double @stack_fold_maxsd(double %a0, double %a1) #0 {
705  ;CHECK-LABEL: stack_fold_maxsd
706  ;CHECK:       maxsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
707  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
708  %2 = fcmp ogt double %a0, %a1
709  %3 = select i1 %2, double %a0, double %a1
710  ret double %3
711}
712
713define double @stack_fold_maxsd_commutable(double %a0, double %a1) #1 {
714  ;CHECK-LABEL: stack_fold_maxsd_commutable
715  ;CHECK:       maxsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
716  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
717  %2 = fcmp ogt double %a0, %a1
718  %3 = select i1 %2, double %a0, double %a1
719  ret double %3
720}
721
722define <2 x double> @stack_fold_maxsd_int(<2 x double> %a0, <2 x double> %a1) #0 {
723  ;CHECK-LABEL: stack_fold_maxsd_int
724  ;CHECK:       maxsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
725  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
726  %2 = call <2 x double> @llvm.x86.sse2.max.sd(<2 x double> %a0, <2 x double> %a1)
727  ret <2 x double> %2
728}
729declare <2 x double> @llvm.x86.sse2.max.sd(<2 x double>, <2 x double>) nounwind readnone
730
731define float @stack_fold_maxss(float %a0, float %a1) #0 {
732  ;CHECK-LABEL: stack_fold_maxss
733  ;CHECK:       maxss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
734  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
735  %2 = fcmp ogt float %a0, %a1
736  %3 = select i1 %2, float %a0, float %a1
737  ret float %3
738}
739
740define float @stack_fold_maxss_commutable(float %a0, float %a1) #1 {
741  ;CHECK-LABEL: stack_fold_maxss_commutable
742  ;CHECK:       maxss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
743  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
744  %2 = fcmp ogt float %a0, %a1
745  %3 = select i1 %2, float %a0, float %a1
746  ret float %3
747}
748
749define <4 x float> @stack_fold_maxss_int(<4 x float> %a0, <4 x float> %a1) #0 {
750  ;CHECK-LABEL: stack_fold_maxss_int
751  ;CHECK:       maxss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
752  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
753  %2 = call <4 x float> @llvm.x86.sse.max.ss(<4 x float> %a0, <4 x float> %a1)
754  ret <4 x float> %2
755}
756declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>) nounwind readnone
757
758define <2 x double> @stack_fold_minpd(<2 x double> %a0, <2 x double> %a1) #0 {
759  ;CHECK-LABEL: stack_fold_minpd
760  ;CHECK:       minpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
761  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
762  %2 = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %a0, <2 x double> %a1)
763  ret <2 x double> %2
764}
765declare <2 x double> @llvm.x86.sse2.min.pd(<2 x double>, <2 x double>) nounwind readnone
766
767define <2 x double> @stack_fold_minpd_commutable(<2 x double> %a0, <2 x double> %a1) #1 {
768  ;CHECK-LABEL: stack_fold_minpd_commutable
769  ;CHECK:       minpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
770  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
771  %2 = call <2 x double> @llvm.x86.sse2.min.pd(<2 x double> %a0, <2 x double> %a1)
772  ret <2 x double> %2
773}
774
775define <4 x float> @stack_fold_minps(<4 x float> %a0, <4 x float> %a1) #0 {
776  ;CHECK-LABEL: stack_fold_minps
777  ;CHECK:       minps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
778  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
779  %2 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %a0, <4 x float> %a1)
780  ret <4 x float> %2
781}
782declare <4 x float> @llvm.x86.sse.min.ps(<4 x float>, <4 x float>) nounwind readnone
783
784define <4 x float> @stack_fold_minps_commutable(<4 x float> %a0, <4 x float> %a1) #1 {
785  ;CHECK-LABEL: stack_fold_minps_commutable
786  ;CHECK:       minps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
787  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
788  %2 = call <4 x float> @llvm.x86.sse.min.ps(<4 x float> %a0, <4 x float> %a1)
789  ret <4 x float> %2
790}
791
792define double @stack_fold_minsd(double %a0, double %a1) #0 {
793  ;CHECK-LABEL: stack_fold_minsd
794  ;CHECK:       minsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
795  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
796  %2 = fcmp olt double %a0, %a1
797  %3 = select i1 %2, double %a0, double %a1
798  ret double %3
799}
800
801define double @stack_fold_minsd_commutable(double %a0, double %a1) #1 {
802  ;CHECK-LABEL: stack_fold_minsd_commutable
803  ;CHECK:       minsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
804  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
805  %2 = fcmp olt double %a0, %a1
806  %3 = select i1 %2, double %a0, double %a1
807  ret double %3
808}
809
810define <2 x double> @stack_fold_minsd_int(<2 x double> %a0, <2 x double> %a1) #0 {
811  ;CHECK-LABEL: stack_fold_minsd_int
812  ;CHECK:       minsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
813  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
814  %2 = call <2 x double> @llvm.x86.sse2.min.sd(<2 x double> %a0, <2 x double> %a1)
815  ret <2 x double> %2
816}
817declare <2 x double> @llvm.x86.sse2.min.sd(<2 x double>, <2 x double>) nounwind readnone
818
819define float @stack_fold_minss(float %a0, float %a1) #0 {
820  ;CHECK-LABEL: stack_fold_minss
821  ;CHECK:       minss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
822  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
823  %2 = fcmp olt float %a0, %a1
824  %3 = select i1 %2, float %a0, float %a1
825  ret float %3
826}
827
828define float @stack_fold_minss_commutable(float %a0, float %a1) #1 {
829  ;CHECK-LABEL: stack_fold_minss_commutable
830  ;CHECK:       minss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
831  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
832  %2 = fcmp olt float %a0, %a1
833  %3 = select i1 %2, float %a0, float %a1
834  ret float %3
835}
836
837define <4 x float> @stack_fold_minss_int(<4 x float> %a0, <4 x float> %a1) #0 {
838  ;CHECK-LABEL: stack_fold_minss_int
839  ;CHECK:       minss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
840  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
841  %2 = call <4 x float> @llvm.x86.sse.min.ss(<4 x float> %a0, <4 x float> %a1)
842  ret <4 x float> %2
843}
844declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>) nounwind readnone
845
846define <2 x double> @stack_fold_movddup(<2 x double> %a0) {
847  ;CHECK-LABEL: stack_fold_movddup
848  ;CHECK:   movddup {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
849  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
850  %2 = shufflevector <2 x double> %a0, <2 x double> undef, <2 x i32> <i32 0, i32 0>
851  ret <2 x double> %2
852}
853; TODO stack_fold_movhpd (load / store)
854; TODO stack_fold_movhps (load / store)
855
856; TODO stack_fold_movlpd (load / store)
857; TODO stack_fold_movlps (load / store)
858
859define <4 x float> @stack_fold_movshdup(<4 x float> %a0) {
860  ;CHECK-LABEL: stack_fold_movshdup
861  ;CHECK:       movshdup {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
862  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
863  %2 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> <i32 1, i32 1, i32 3, i32 3>
864  ret <4 x float> %2
865}
866
867define <4 x float> @stack_fold_movsldup(<4 x float> %a0) {
868  ;CHECK-LABEL: stack_fold_movsldup
869  ;CHECK:       movsldup {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
870  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
871  %2 = shufflevector <4 x float> %a0, <4 x float> undef, <4 x i32> <i32 0, i32 0, i32 2, i32 2>
872  ret <4 x float> %2
873}
874
875define <2 x double> @stack_fold_mulpd(<2 x double> %a0, <2 x double> %a1) {
876  ;CHECK-LABEL: stack_fold_mulpd
877  ;CHECK:       mulpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
878  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
879  %2 = fmul <2 x double> %a0, %a1
880  ret <2 x double> %2
881}
882
883define <4 x float> @stack_fold_mulps(<4 x float> %a0, <4 x float> %a1) {
884  ;CHECK-LABEL: stack_fold_mulps
885  ;CHECK:       mulps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
886  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
887  %2 = fmul <4 x float> %a0, %a1
888  ret <4 x float> %2
889}
890
891define double @stack_fold_mulsd(double %a0, double %a1) {
892  ;CHECK-LABEL: stack_fold_mulsd
893  ;CHECK:       mulsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
894  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
895  %2 = fmul double %a0, %a1
896  ret double %2
897}
898
899define <2 x double> @stack_fold_mulsd_int(<2 x double> %a0, <2 x double> %a1) {
900  ;CHECK-LABEL: stack_fold_mulsd_int
901  ;CHECK:       mulsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
902  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
903  %2 = call <2 x double> @llvm.x86.sse2.mul.sd(<2 x double> %a0, <2 x double> %a1)
904  ret <2 x double> %2
905}
906declare <2 x double> @llvm.x86.sse2.mul.sd(<2 x double>, <2 x double>) nounwind readnone
907
908define float @stack_fold_mulss(float %a0, float %a1) {
909  ;CHECK-LABEL: stack_fold_mulss
910  ;CHECK:       mulss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
911  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
912  %2 = fmul float %a0, %a1
913  ret float %2
914}
915
916define <4 x float> @stack_fold_mulss_int(<4 x float> %a0, <4 x float> %a1) {
917  ;CHECK-LABEL: stack_fold_mulss_int
918  ;CHECK:       mulss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
919  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
920  %2 = call <4 x float> @llvm.x86.sse.mul.ss(<4 x float> %a0, <4 x float> %a1)
921  ret <4 x float> %2
922}
923declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>) nounwind readnone
924
925define <2 x double> @stack_fold_orpd(<2 x double> %a0, <2 x double> %a1) {
926  ;CHECK-LABEL: stack_fold_orpd
927  ;CHECK:       orpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
928  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
929  %2 = bitcast <2 x double> %a0 to <2 x i64>
930  %3 = bitcast <2 x double> %a1 to <2 x i64>
931  %4 = or <2 x i64> %2, %3
932  %5 = bitcast <2 x i64> %4 to <2 x double>
933  ; fadd forces execution domain
934  %6 = fadd <2 x double> %5, <double 0x0, double 0x0>
935  ret <2 x double> %6
936}
937
938define <4 x float> @stack_fold_orps(<4 x float> %a0, <4 x float> %a1) {
939  ;CHECK-LABEL: stack_fold_orps
940  ;CHECK:       orps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
941  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
942  %2 = bitcast <4 x float> %a0 to <2 x i64>
943  %3 = bitcast <4 x float> %a1 to <2 x i64>
944  %4 = or <2 x i64> %2, %3
945  %5 = bitcast <2 x i64> %4 to <4 x float>
946  ; fadd forces execution domain
947  %6 = fadd <4 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0>
948  ret <4 x float> %6
949}
950
951; TODO stack_fold_rcpps
952
953define <4 x float> @stack_fold_rcpps_int(<4 x float> %a0) {
954  ;CHECK-LABEL: stack_fold_rcpps_int
955  ;CHECK:       rcpps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
956  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
957  %2 = call <4 x float> @llvm.x86.sse.rcp.ps(<4 x float> %a0)
958  ret <4 x float> %2
959}
960declare <4 x float> @llvm.x86.sse.rcp.ps(<4 x float>) nounwind readnone
961
962; TODO stack_fold_rcpss
963; TODO stack_fold_rcpss_int
964
965define <2 x double> @stack_fold_roundpd(<2 x double> %a0) {
966  ;CHECK-LABEL: stack_fold_roundpd
967  ;CHECK:       roundpd $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
968  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
969  %2 = call <2 x double> @llvm.x86.sse41.round.pd(<2 x double> %a0, i32 7)
970  ret <2 x double> %2
971}
972declare <2 x double> @llvm.x86.sse41.round.pd(<2 x double>, i32) nounwind readnone
973
974define <4 x float> @stack_fold_roundps(<4 x float> %a0) {
975  ;CHECK-LABEL: stack_fold_roundps
976  ;CHECK:       roundps $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
977  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
978  %2 = call <4 x float> @llvm.x86.sse41.round.ps(<4 x float> %a0, i32 7)
979  ret <4 x float> %2
980}
981declare <4 x float> @llvm.x86.sse41.round.ps(<4 x float>, i32) nounwind readnone
982
983define double @stack_fold_roundsd(double %a0) optsize {
984  ;CHECK-LABEL: stack_fold_roundsd
985  ;CHECK:       roundsd $9, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
986  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
987  %2 = call double @llvm.floor.f64(double %a0)
988  ret double %2
989}
990declare double @llvm.floor.f64(double) nounwind readnone
991
992define <2 x double> @stack_fold_roundsd_int(<2 x double> %a0, <2 x double> %a1) optsize {
993  ;CHECK-LABEL: stack_fold_roundsd_int
994  ;CHECK:       roundsd $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
995  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
996  %2 = call <2 x double> @llvm.x86.sse41.round.sd(<2 x double> %a0, <2 x double> %a1, i32 7)
997  ret <2 x double> %2
998}
999declare <2 x double> @llvm.x86.sse41.round.sd(<2 x double>, <2 x double>, i32) nounwind readnone
1000
1001define float @stack_fold_roundss(float %a0) minsize {
1002  ;CHECK-LABEL: stack_fold_roundss
1003  ;CHECK:       roundss $9, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
1004  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1005  %2 = call float @llvm.floor.f32(float %a0)
1006  ret float %2
1007}
1008declare float @llvm.floor.f32(float) nounwind readnone
1009
1010define <4 x float> @stack_fold_roundss_int(<4 x float> %a0, <4 x float> %a1) optsize {
1011  ;CHECK-LABEL: stack_fold_roundss_int
1012  ;CHECK:       roundss $7, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1013  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1014  %2 = call <4 x float> @llvm.x86.sse41.round.ss(<4 x float> %a0, <4 x float> %a1, i32 7)
1015  ret <4 x float> %2
1016}
1017declare <4 x float> @llvm.x86.sse41.round.ss(<4 x float>, <4 x float>, i32) nounwind readnone
1018
1019; TODO stack_fold_rsqrtps
1020
1021define <4 x float> @stack_fold_rsqrtps_int(<4 x float> %a0) {
1022  ;CHECK-LABEL: stack_fold_rsqrtps_int
1023  ;CHECK:       rsqrtps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1024  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1025  %2 = call <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float> %a0)
1026  ret <4 x float> %2
1027}
1028declare <4 x float> @llvm.x86.sse.rsqrt.ps(<4 x float>) nounwind readnone
1029
1030; TODO stack_fold_rsqrtss
1031; TODO stack_fold_rsqrtss_int
1032
1033define <2 x double> @stack_fold_shufpd(<2 x double> %a0, <2 x double> %a1) {
1034  ;CHECK-LABEL: stack_fold_shufpd
1035  ;CHECK:       shufpd $1, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1036  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1037  %2 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 1, i32 2>
1038  ret <2 x double> %2
1039}
1040
1041define <4 x float> @stack_fold_shufps(<4 x float> %a0, <4 x float> %a1) {
1042  ;CHECK-LABEL: stack_fold_shufps
1043  ;CHECK:       shufps $200, {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1044  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1045  %2 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 0, i32 2, i32 4, i32 7>
1046  ret <4 x float> %2
1047}
1048
1049define <2 x double> @stack_fold_sqrtpd(<2 x double> %a0) {
1050  ;CHECK-LABEL: stack_fold_sqrtpd
1051  ;CHECK:       sqrtpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1052  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1053  %2 = call <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double> %a0)
1054  ret <2 x double> %2
1055}
1056declare <2 x double> @llvm.x86.sse2.sqrt.pd(<2 x double>) nounwind readnone
1057
1058define <4 x float> @stack_fold_sqrtps(<4 x float> %a0) {
1059  ;CHECK-LABEL: stack_fold_sqrtps
1060  ;CHECK:       sqrtps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1061  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1062  %2 = call <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float> %a0)
1063  ret <4 x float> %2
1064}
1065declare <4 x float> @llvm.x86.sse.sqrt.ps(<4 x float>) nounwind readnone
1066
1067define double @stack_fold_sqrtsd(double %a0) optsize {
1068  ;CHECK-LABEL: stack_fold_sqrtsd
1069  ;CHECK:       sqrtsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
1070  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1071  %2 = call double @llvm.sqrt.f64(double %a0)
1072  ret double %2
1073}
1074declare double @llvm.sqrt.f64(double) nounwind readnone
1075
1076; TODO stack_fold_sqrtsd_int
1077declare <2 x double> @llvm.x86.sse2.sqrt.sd(<2 x double>) nounwind readnone
1078
1079define float @stack_fold_sqrtss(float %a0) minsize {
1080  ;CHECK-LABEL: stack_fold_sqrtss
1081  ;CHECK:       sqrtss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
1082  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1083  %2 = call float @llvm.sqrt.f32(float %a0)
1084  ret float %2
1085}
1086declare float @llvm.sqrt.f32(float) nounwind readnone
1087
1088; TODO stack_fold_sqrtss_int
1089declare <4 x float> @llvm.x86.sse.sqrt.ss(<4 x float>) nounwind readnone
1090
1091define <2 x double> @stack_fold_subpd(<2 x double> %a0, <2 x double> %a1) {
1092  ;CHECK-LABEL: stack_fold_subpd
1093  ;CHECK:       subpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1094  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1095  %2 = fsub <2 x double> %a0, %a1
1096  ret <2 x double> %2
1097}
1098
1099define <4 x float> @stack_fold_subps(<4 x float> %a0, <4 x float> %a1) {
1100  ;CHECK-LABEL: stack_fold_subps
1101  ;CHECK:       subps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1102  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1103  %2 = fsub <4 x float> %a0, %a1
1104  ret <4 x float> %2
1105}
1106
1107define double @stack_fold_subsd(double %a0, double %a1) {
1108  ;CHECK-LABEL: stack_fold_subsd
1109  ;CHECK:       subsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
1110  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1111  %2 = fsub double %a0, %a1
1112  ret double %2
1113}
1114
1115define <2 x double> @stack_fold_subsd_int(<2 x double> %a0, <2 x double> %a1) {
1116  ;CHECK-LABEL: stack_fold_subsd_int
1117  ;CHECK:       subsd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1118  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1119  %2 = call <2 x double> @llvm.x86.sse2.sub.sd(<2 x double> %a0, <2 x double> %a1)
1120  ret <2 x double> %2
1121}
1122declare <2 x double> @llvm.x86.sse2.sub.sd(<2 x double>, <2 x double>) nounwind readnone
1123
1124define float @stack_fold_subss(float %a0, float %a1) {
1125  ;CHECK-LABEL: stack_fold_subss
1126  ;CHECK:       subss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
1127  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1128  %2 = fsub float %a0, %a1
1129  ret float %2
1130}
1131
1132define <4 x float> @stack_fold_subss_int(<4 x float> %a0, <4 x float> %a1) {
1133  ;CHECK-LABEL: stack_fold_subss_int
1134  ;CHECK:       subss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1135  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1136  %2 = call <4 x float> @llvm.x86.sse.sub.ss(<4 x float> %a0, <4 x float> %a1)
1137  ret <4 x float> %2
1138}
1139declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>) nounwind readnone
1140
1141define i32 @stack_fold_ucomisd(double %a0, double %a1) {
1142  ;CHECK-LABEL: stack_fold_ucomisd
1143  ;CHECK:       ucomisd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 8-byte Folded Reload
1144  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1145  %2 = fcmp ueq double %a0, %a1
1146  %3 = select i1 %2, i32 1, i32 -1
1147  ret i32 %3
1148}
1149
1150define i32 @stack_fold_ucomisd_int(<2 x double> %a0, <2 x double> %a1) {
1151  ;CHECK-LABEL: stack_fold_ucomisd_int
1152  ;CHECK:       ucomisd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1153  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1154  %2 = call i32 @llvm.x86.sse2.ucomieq.sd(<2 x double> %a0, <2 x double> %a1)
1155  ret i32 %2
1156}
1157declare i32 @llvm.x86.sse2.ucomieq.sd(<2 x double>, <2 x double>) nounwind readnone
1158
1159define i32 @stack_fold_ucomiss(float %a0, float %a1) {
1160  ;CHECK-LABEL: stack_fold_ucomiss
1161  ;CHECK:       ucomiss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 4-byte Folded Reload
1162  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1163  %2 = fcmp ueq float %a0, %a1
1164  %3 = select i1 %2, i32 1, i32 -1
1165  ret i32 %3
1166}
1167
1168define i32 @stack_fold_ucomiss_int(<4 x float> %a0, <4 x float> %a1) {
1169  ;CHECK-LABEL: stack_fold_ucomiss_int
1170  ;CHECK:       ucomiss {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1171  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1172  %2 = call i32 @llvm.x86.sse.ucomieq.ss(<4 x float> %a0, <4 x float> %a1)
1173  ret i32 %2
1174}
1175declare i32 @llvm.x86.sse.ucomieq.ss(<4 x float>, <4 x float>) nounwind readnone
1176
1177define <2 x double> @stack_fold_unpckhpd(<2 x double> %a0, <2 x double> %a1) {
1178  ;CHECK-LABEL: stack_fold_unpckhpd
1179  ;CHECK:       unpckhpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1180  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1181  %2 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 1, i32 3>
1182  ; fadd forces execution domain
1183  %3 = fadd <2 x double> %2, <double 0x0, double 0x0>
1184  ret <2 x double> %3
1185}
1186
1187define <4 x float> @stack_fold_unpckhps(<4 x float> %a0, <4 x float> %a1) {
1188  ;CHECK-LABEL: stack_fold_unpckhps
1189  ;CHECK:       unpckhps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1190  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1191  %2 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 2, i32 6, i32 3, i32 7>
1192  ; fadd forces execution domain
1193  %3 = fadd <4 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0>
1194  ret <4 x float> %3
1195}
1196
1197define <2 x double> @stack_fold_unpcklpd(<2 x double> %a0, <2 x double> %a1) {
1198  ;CHECK-LABEL: stack_fold_unpcklpd
1199  ;CHECK:       unpcklpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1200  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1201  %2 = shufflevector <2 x double> %a0, <2 x double> %a1, <2 x i32> <i32 0, i32 2>
1202  ; fadd forces execution domain
1203  %3 = fadd <2 x double> %2, <double 0x0, double 0x0>
1204  ret <2 x double> %3
1205}
1206
1207define <4 x float> @stack_fold_unpcklps(<4 x float> %a0, <4 x float> %a1) {
1208  ;CHECK-LABEL: stack_fold_unpcklps
1209  ;CHECK:       unpcklps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1210  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1211  %2 = shufflevector <4 x float> %a0, <4 x float> %a1, <4 x i32> <i32 0, i32 4, i32 1, i32 5>
1212  ; fadd forces execution domain
1213  %3 = fadd <4 x float> %2, <float 0x0, float 0x0, float 0x0, float 0x0>
1214  ret <4 x float> %3
1215}
1216
1217define <2 x double> @stack_fold_xorpd(<2 x double> %a0, <2 x double> %a1) {
1218  ;CHECK-LABEL: stack_fold_xorpd
1219  ;CHECK:       xorpd {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1220  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1221  %2 = bitcast <2 x double> %a0 to <2 x i64>
1222  %3 = bitcast <2 x double> %a1 to <2 x i64>
1223  %4 = xor <2 x i64> %2, %3
1224  %5 = bitcast <2 x i64> %4 to <2 x double>
1225  ; fadd forces execution domain
1226  %6 = fadd <2 x double> %5, <double 0x0, double 0x0>
1227  ret <2 x double> %6
1228}
1229
1230define <4 x float> @stack_fold_xorps(<4 x float> %a0, <4 x float> %a1) {
1231  ;CHECK-LABEL: stack_fold_xorps
1232  ;CHECK:       xorps {{-?[0-9]*}}(%rsp), {{%xmm[0-9][0-9]*}} {{.*#+}} 16-byte Folded Reload
1233  %1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
1234  %2 = bitcast <4 x float> %a0 to <2 x i64>
1235  %3 = bitcast <4 x float> %a1 to <2 x i64>
1236  %4 = xor <2 x i64> %2, %3
1237  %5 = bitcast <2 x i64> %4 to <4 x float>
1238  ; fadd forces execution domain
1239  %6 = fadd <4 x float> %5, <float 0x0, float 0x0, float 0x0, float 0x0>
1240  ret <4 x float> %6
1241}
1242
1243attributes #0 = { "unsafe-fp-math"="false" }
1244attributes #1 = { "unsafe-fp-math"="true" }
1245