1; RUN: llc -O3 -disable-peephole -mtriple=x86_64-unknown-unknown -mattr=+bmi,+bmi2 < %s | FileCheck %s
2
3target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
4target triple = "x86_64-unknown-unknown"
5
6; Stack reload folding tests.
7;
8; By including a nop call with sideeffects we can force a partial register spill of the
9; relevant registers and check that the reload is correctly folded into the instruction.
10
11define i32 @stack_fold_bzhi_u32(i32 %a0, i32 %a1)   {
12  ;CHECK-LABEL: stack_fold_bzhi_u32
13  ;CHECK:       bzhil %eax, {{-?[0-9]*}}(%rsp), %eax {{.*#+}} 4-byte Folded Reload
14  %1 = tail call i32 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
15  %2 = tail call i32 @llvm.x86.bmi.bzhi.32(i32 %a0, i32 %a1)
16  ret i32 %2
17}
18declare i32 @llvm.x86.bmi.bzhi.32(i32, i32)
19
20define i64 @stack_fold_bzhi_u64(i64 %a0, i64 %a1)   {
21  ;CHECK-LABEL: stack_fold_bzhi_u64
22  ;CHECK:       bzhiq %rax, {{-?[0-9]*}}(%rsp), %rax {{.*#+}} 8-byte Folded Reload
23  %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
24  %2 = tail call i64 @llvm.x86.bmi.bzhi.64(i64 %a0, i64 %a1)
25  ret i64 %2
26}
27declare i64 @llvm.x86.bmi.bzhi.64(i64, i64)
28
29define i32 @stack_fold_pdep_u32(i32 %a0, i32 %a1)   {
30  ;CHECK-LABEL: stack_fold_pdep_u32
31  ;CHECK:       pdepl {{-?[0-9]*}}(%rsp), %eax, %eax {{.*#+}} 4-byte Folded Reload
32  %1 = tail call i32 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
33  %2 = tail call i32 @llvm.x86.bmi.pdep.32(i32 %a0, i32 %a1)
34  ret i32 %2
35}
36declare i32 @llvm.x86.bmi.pdep.32(i32, i32)
37
38define i64 @stack_fold_pdep_u64(i64 %a0, i64 %a1)   {
39  ;CHECK-LABEL: stack_fold_pdep_u64
40  ;CHECK:       pdepq {{-?[0-9]*}}(%rsp), %rax, %rax {{.*#+}} 8-byte Folded Reload
41  %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
42  %2 = tail call i64 @llvm.x86.bmi.pdep.64(i64 %a0, i64 %a1)
43  ret i64 %2
44}
45declare i64 @llvm.x86.bmi.pdep.64(i64, i64)
46
47define i32 @stack_fold_pext_u32(i32 %a0, i32 %a1)   {
48  ;CHECK-LABEL: stack_fold_pext_u32
49  ;CHECK:       pextl {{-?[0-9]*}}(%rsp), %eax, %eax {{.*#+}} 4-byte Folded Reload
50  %1 = tail call i32 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
51  %2 = tail call i32 @llvm.x86.bmi.pext.32(i32 %a0, i32 %a1)
52  ret i32 %2
53}
54declare i32 @llvm.x86.bmi.pext.32(i32, i32)
55
56define i64 @stack_fold_pext_u64(i64 %a0, i64 %a1)   {
57  ;CHECK-LABEL: stack_fold_pext_u64
58  ;CHECK:       pextq {{-?[0-9]*}}(%rsp), %rax, %rax {{.*#+}} 8-byte Folded Reload
59  %1 = tail call i64 asm sideeffect "nop", "=x,~{rax},~{rbx},~{rcx},~{rdx},~{rsi},~{rdi},~{rbp},~{r8},~{r9},~{r10},~{r11},~{r12},~{r13},~{r14},~{r15}"()
60  %2 = tail call i64 @llvm.x86.bmi.pext.64(i64 %a0, i64 %a1)
61  ret i64 %2
62}
63declare i64 @llvm.x86.bmi.pext.64(i64, i64)
64