1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefixes=CHECK32,SLM32 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefixes=CHECK64,SLM64 4; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=CHECK32,SLOW32 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.2,+slow-pmulld | FileCheck %s --check-prefixes=CHECK64,SLOW64 6; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE4-32 7; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE4-64 8; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX-32,AVX2-32 9; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX-64,AVX2-64 10; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX-32,AVX512-32,AVX512DQ-32 11; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512dq | FileCheck %s --check-prefixes=AVX-64,AVX512-64,AVX512DQ-64 12; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX-32,AVX512-32,AVX512BW-32 13; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512bw | FileCheck %s --check-prefixes=AVX-64,AVX512-64,AVX512BW-64 14; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX-32,AVX512-32,KNL-32 15; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=knl | FileCheck %s --check-prefixes=AVX-64,AVX512-64,KNL-64 16 17; Make sure that the slow-pmulld feature can be used without SSE4.1. 18; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont -mattr=-sse4.1 19 20define <4 x i32> @test_mul_v4i32_v4i8(<4 x i8> %A) { 21; CHECK32-LABEL: test_mul_v4i32_v4i8: 22; CHECK32: # %bb.0: 23; CHECK32-NEXT: pand {{\.LCPI.*}}, %xmm0 24; CHECK32-NEXT: pmaddwd {{\.LCPI.*}}, %xmm0 25; CHECK32-NEXT: retl 26; 27; CHECK64-LABEL: test_mul_v4i32_v4i8: 28; CHECK64: # %bb.0: 29; CHECK64-NEXT: pand {{.*}}(%rip), %xmm0 30; CHECK64-NEXT: pmaddwd {{.*}}(%rip), %xmm0 31; CHECK64-NEXT: retq 32; 33; SSE4-32-LABEL: test_mul_v4i32_v4i8: 34; SSE4-32: # %bb.0: 35; SSE4-32-NEXT: pand {{\.LCPI.*}}, %xmm0 36; SSE4-32-NEXT: pmaddwd {{\.LCPI.*}}, %xmm0 37; SSE4-32-NEXT: retl 38; 39; SSE4-64-LABEL: test_mul_v4i32_v4i8: 40; SSE4-64: # %bb.0: 41; SSE4-64-NEXT: pand {{.*}}(%rip), %xmm0 42; SSE4-64-NEXT: pmaddwd {{.*}}(%rip), %xmm0 43; SSE4-64-NEXT: retq 44; 45; AVX2-32-LABEL: test_mul_v4i32_v4i8: 46; AVX2-32: # %bb.0: 47; AVX2-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 48; AVX2-32-NEXT: vpmaddwd {{\.LCPI.*}}, %xmm0, %xmm0 49; AVX2-32-NEXT: retl 50; 51; AVX2-64-LABEL: test_mul_v4i32_v4i8: 52; AVX2-64: # %bb.0: 53; AVX2-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 54; AVX2-64-NEXT: vpmaddwd {{.*}}(%rip), %xmm0, %xmm0 55; AVX2-64-NEXT: retq 56; 57; AVX512DQ-32-LABEL: test_mul_v4i32_v4i8: 58; AVX512DQ-32: # %bb.0: 59; AVX512DQ-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 60; AVX512DQ-32-NEXT: vpmaddwd {{\.LCPI.*}}, %xmm0, %xmm0 61; AVX512DQ-32-NEXT: retl 62; 63; AVX512DQ-64-LABEL: test_mul_v4i32_v4i8: 64; AVX512DQ-64: # %bb.0: 65; AVX512DQ-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 66; AVX512DQ-64-NEXT: vpmaddwd {{.*}}(%rip), %xmm0, %xmm0 67; AVX512DQ-64-NEXT: retq 68; 69; AVX512BW-32-LABEL: test_mul_v4i32_v4i8: 70; AVX512BW-32: # %bb.0: 71; AVX512BW-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 72; AVX512BW-32-NEXT: vpmaddwd {{\.LCPI.*}}, %xmm0, %xmm0 73; AVX512BW-32-NEXT: retl 74; 75; AVX512BW-64-LABEL: test_mul_v4i32_v4i8: 76; AVX512BW-64: # %bb.0: 77; AVX512BW-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 78; AVX512BW-64-NEXT: vpmaddwd {{.*}}(%rip), %xmm0, %xmm0 79; AVX512BW-64-NEXT: retq 80; 81; KNL-32-LABEL: test_mul_v4i32_v4i8: 82; KNL-32: # %bb.0: 83; KNL-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 84; KNL-32-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778] 85; KNL-32-NEXT: vpmulld %xmm1, %xmm0, %xmm0 86; KNL-32-NEXT: retl 87; 88; KNL-64-LABEL: test_mul_v4i32_v4i8: 89; KNL-64: # %bb.0: 90; KNL-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 91; KNL-64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778] 92; KNL-64-NEXT: vpmulld %xmm1, %xmm0, %xmm0 93; KNL-64-NEXT: retq 94 %z = zext <4 x i8> %A to <4 x i32> 95 %m = mul nuw nsw <4 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778> 96 ret <4 x i32> %m 97} 98 99define <8 x i32> @test_mul_v8i32_v8i8(<8 x i8> %A) { 100; SLM32-LABEL: test_mul_v8i32_v8i8: 101; SLM32: # %bb.0: 102; SLM32-NEXT: movdqa %xmm0, %xmm1 103; SLM32-NEXT: pand {{\.LCPI.*}}, %xmm1 104; SLM32-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 105; SLM32-NEXT: movdqa %xmm1, %xmm2 106; SLM32-NEXT: pmullw %xmm0, %xmm1 107; SLM32-NEXT: pmulhw %xmm0, %xmm2 108; SLM32-NEXT: movdqa %xmm1, %xmm0 109; SLM32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 110; SLM32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 111; SLM32-NEXT: retl 112; 113; SLM64-LABEL: test_mul_v8i32_v8i8: 114; SLM64: # %bb.0: 115; SLM64-NEXT: movdqa %xmm0, %xmm1 116; SLM64-NEXT: pand {{.*}}(%rip), %xmm1 117; SLM64-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 118; SLM64-NEXT: movdqa %xmm1, %xmm2 119; SLM64-NEXT: pmullw %xmm0, %xmm1 120; SLM64-NEXT: pmulhw %xmm0, %xmm2 121; SLM64-NEXT: movdqa %xmm1, %xmm0 122; SLM64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 123; SLM64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 124; SLM64-NEXT: retq 125; 126; SLOW32-LABEL: test_mul_v8i32_v8i8: 127; SLOW32: # %bb.0: 128; SLOW32-NEXT: movdqa %xmm0, %xmm1 129; SLOW32-NEXT: pand {{\.LCPI.*}}, %xmm1 130; SLOW32-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 131; SLOW32-NEXT: movdqa %xmm1, %xmm2 132; SLOW32-NEXT: pmulhw %xmm0, %xmm2 133; SLOW32-NEXT: pmullw %xmm0, %xmm1 134; SLOW32-NEXT: movdqa %xmm1, %xmm0 135; SLOW32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 136; SLOW32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 137; SLOW32-NEXT: retl 138; 139; SLOW64-LABEL: test_mul_v8i32_v8i8: 140; SLOW64: # %bb.0: 141; SLOW64-NEXT: movdqa %xmm0, %xmm1 142; SLOW64-NEXT: pand {{.*}}(%rip), %xmm1 143; SLOW64-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 144; SLOW64-NEXT: movdqa %xmm1, %xmm2 145; SLOW64-NEXT: pmulhw %xmm0, %xmm2 146; SLOW64-NEXT: pmullw %xmm0, %xmm1 147; SLOW64-NEXT: movdqa %xmm1, %xmm0 148; SLOW64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 149; SLOW64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 150; SLOW64-NEXT: retq 151; 152; SSE4-32-LABEL: test_mul_v8i32_v8i8: 153; SSE4-32: # %bb.0: 154; SSE4-32-NEXT: pand {{\.LCPI.*}}, %xmm0 155; SSE4-32-NEXT: pxor %xmm1, %xmm1 156; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 157; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 158; SSE4-32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 159; SSE4-32-NEXT: pmaddwd %xmm1, %xmm2 160; SSE4-32-NEXT: pmaddwd %xmm0, %xmm1 161; SSE4-32-NEXT: movdqa %xmm2, %xmm0 162; SSE4-32-NEXT: retl 163; 164; SSE4-64-LABEL: test_mul_v8i32_v8i8: 165; SSE4-64: # %bb.0: 166; SSE4-64-NEXT: pand {{.*}}(%rip), %xmm0 167; SSE4-64-NEXT: pxor %xmm1, %xmm1 168; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 169; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 170; SSE4-64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 171; SSE4-64-NEXT: pmaddwd %xmm1, %xmm2 172; SSE4-64-NEXT: pmaddwd %xmm0, %xmm1 173; SSE4-64-NEXT: movdqa %xmm2, %xmm0 174; SSE4-64-NEXT: retq 175; 176; AVX2-32-LABEL: test_mul_v8i32_v8i8: 177; AVX2-32: # %bb.0: 178; AVX2-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 179; AVX2-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 180; AVX2-32-NEXT: vpmaddwd {{\.LCPI.*}}, %ymm0, %ymm0 181; AVX2-32-NEXT: retl 182; 183; AVX2-64-LABEL: test_mul_v8i32_v8i8: 184; AVX2-64: # %bb.0: 185; AVX2-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 186; AVX2-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 187; AVX2-64-NEXT: vpmaddwd {{.*}}(%rip), %ymm0, %ymm0 188; AVX2-64-NEXT: retq 189; 190; AVX512DQ-32-LABEL: test_mul_v8i32_v8i8: 191; AVX512DQ-32: # %bb.0: 192; AVX512DQ-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 193; AVX512DQ-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 194; AVX512DQ-32-NEXT: vpmaddwd {{\.LCPI.*}}, %ymm0, %ymm0 195; AVX512DQ-32-NEXT: retl 196; 197; AVX512DQ-64-LABEL: test_mul_v8i32_v8i8: 198; AVX512DQ-64: # %bb.0: 199; AVX512DQ-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 200; AVX512DQ-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 201; AVX512DQ-64-NEXT: vpmaddwd {{.*}}(%rip), %ymm0, %ymm0 202; AVX512DQ-64-NEXT: retq 203; 204; AVX512BW-32-LABEL: test_mul_v8i32_v8i8: 205; AVX512BW-32: # %bb.0: 206; AVX512BW-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 207; AVX512BW-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 208; AVX512BW-32-NEXT: vpmaddwd {{\.LCPI.*}}, %ymm0, %ymm0 209; AVX512BW-32-NEXT: retl 210; 211; AVX512BW-64-LABEL: test_mul_v8i32_v8i8: 212; AVX512BW-64: # %bb.0: 213; AVX512BW-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 214; AVX512BW-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 215; AVX512BW-64-NEXT: vpmaddwd {{.*}}(%rip), %ymm0, %ymm0 216; AVX512BW-64-NEXT: retq 217; 218; KNL-32-LABEL: test_mul_v8i32_v8i8: 219; KNL-32: # %bb.0: 220; KNL-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 221; KNL-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 222; KNL-32-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778] 223; KNL-32-NEXT: vpmulld %ymm1, %ymm0, %ymm0 224; KNL-32-NEXT: retl 225; 226; KNL-64-LABEL: test_mul_v8i32_v8i8: 227; KNL-64: # %bb.0: 228; KNL-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 229; KNL-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 230; KNL-64-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778] 231; KNL-64-NEXT: vpmulld %ymm1, %ymm0, %ymm0 232; KNL-64-NEXT: retq 233 %z = zext <8 x i8> %A to <8 x i32> 234 %m = mul nuw nsw <8 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778> 235 ret <8 x i32> %m 236} 237 238define <16 x i32> @test_mul_v16i32_v16i8(<16 x i8> %A) { 239; SLM32-LABEL: test_mul_v16i32_v16i8: 240; SLM32: # %bb.0: 241; SLM32-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 242; SLM32-NEXT: movdqa %xmm0, %xmm3 243; SLM32-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 244; SLM32-NEXT: pxor %xmm4, %xmm4 245; SLM32-NEXT: movdqa %xmm1, %xmm2 246; SLM32-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm4[8],xmm3[9],xmm4[9],xmm3[10],xmm4[10],xmm3[11],xmm4[11],xmm3[12],xmm4[12],xmm3[13],xmm4[13],xmm3[14],xmm4[14],xmm3[15],xmm4[15] 247; SLM32-NEXT: movdqa %xmm3, %xmm4 248; SLM32-NEXT: pmullw %xmm0, %xmm1 249; SLM32-NEXT: pmulhw %xmm0, %xmm2 250; SLM32-NEXT: pmullw %xmm0, %xmm3 251; SLM32-NEXT: pmulhw %xmm0, %xmm4 252; SLM32-NEXT: movdqa %xmm1, %xmm0 253; SLM32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 254; SLM32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 255; SLM32-NEXT: movdqa %xmm3, %xmm2 256; SLM32-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 257; SLM32-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3] 258; SLM32-NEXT: retl 259; 260; SLM64-LABEL: test_mul_v16i32_v16i8: 261; SLM64: # %bb.0: 262; SLM64-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 263; SLM64-NEXT: movdqa %xmm0, %xmm3 264; SLM64-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 265; SLM64-NEXT: pxor %xmm4, %xmm4 266; SLM64-NEXT: movdqa %xmm1, %xmm2 267; SLM64-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm4[8],xmm3[9],xmm4[9],xmm3[10],xmm4[10],xmm3[11],xmm4[11],xmm3[12],xmm4[12],xmm3[13],xmm4[13],xmm3[14],xmm4[14],xmm3[15],xmm4[15] 268; SLM64-NEXT: movdqa %xmm3, %xmm4 269; SLM64-NEXT: pmullw %xmm0, %xmm1 270; SLM64-NEXT: pmulhw %xmm0, %xmm2 271; SLM64-NEXT: pmullw %xmm0, %xmm3 272; SLM64-NEXT: pmulhw %xmm0, %xmm4 273; SLM64-NEXT: movdqa %xmm1, %xmm0 274; SLM64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 275; SLM64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 276; SLM64-NEXT: movdqa %xmm3, %xmm2 277; SLM64-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 278; SLM64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3] 279; SLM64-NEXT: retq 280; 281; SLOW32-LABEL: test_mul_v16i32_v16i8: 282; SLOW32: # %bb.0: 283; SLOW32-NEXT: movdqa %xmm0, %xmm3 284; SLOW32-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 285; SLOW32-NEXT: movdqa {{.*#+}} xmm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 286; SLOW32-NEXT: movdqa %xmm1, %xmm4 287; SLOW32-NEXT: pmulhw %xmm2, %xmm4 288; SLOW32-NEXT: pmullw %xmm2, %xmm1 289; SLOW32-NEXT: movdqa %xmm1, %xmm0 290; SLOW32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3] 291; SLOW32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 292; SLOW32-NEXT: pxor %xmm4, %xmm4 293; SLOW32-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm4[8],xmm3[9],xmm4[9],xmm3[10],xmm4[10],xmm3[11],xmm4[11],xmm3[12],xmm4[12],xmm3[13],xmm4[13],xmm3[14],xmm4[14],xmm3[15],xmm4[15] 294; SLOW32-NEXT: movdqa %xmm3, %xmm4 295; SLOW32-NEXT: pmulhw %xmm2, %xmm4 296; SLOW32-NEXT: pmullw %xmm2, %xmm3 297; SLOW32-NEXT: movdqa %xmm3, %xmm2 298; SLOW32-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3] 299; SLOW32-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 300; SLOW32-NEXT: retl 301; 302; SLOW64-LABEL: test_mul_v16i32_v16i8: 303; SLOW64: # %bb.0: 304; SLOW64-NEXT: movdqa %xmm0, %xmm3 305; SLOW64-NEXT: pmovzxbw {{.*#+}} xmm1 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 306; SLOW64-NEXT: movdqa {{.*#+}} xmm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 307; SLOW64-NEXT: movdqa %xmm1, %xmm4 308; SLOW64-NEXT: pmulhw %xmm2, %xmm4 309; SLOW64-NEXT: pmullw %xmm2, %xmm1 310; SLOW64-NEXT: movdqa %xmm1, %xmm0 311; SLOW64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3] 312; SLOW64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 313; SLOW64-NEXT: pxor %xmm4, %xmm4 314; SLOW64-NEXT: punpckhbw {{.*#+}} xmm3 = xmm3[8],xmm4[8],xmm3[9],xmm4[9],xmm3[10],xmm4[10],xmm3[11],xmm4[11],xmm3[12],xmm4[12],xmm3[13],xmm4[13],xmm3[14],xmm4[14],xmm3[15],xmm4[15] 315; SLOW64-NEXT: movdqa %xmm3, %xmm4 316; SLOW64-NEXT: pmulhw %xmm2, %xmm4 317; SLOW64-NEXT: pmullw %xmm2, %xmm3 318; SLOW64-NEXT: movdqa %xmm3, %xmm2 319; SLOW64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3] 320; SLOW64-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 321; SLOW64-NEXT: retq 322; 323; SSE4-32-LABEL: test_mul_v16i32_v16i8: 324; SSE4-32: # %bb.0: 325; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3] 326; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 327; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 328; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 329; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 330; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 331; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 332; SSE4-32-NEXT: movdqa {{.*#+}} xmm4 = [18778,18778,18778,18778] 333; SSE4-32-NEXT: pmaddwd %xmm4, %xmm0 334; SSE4-32-NEXT: pmaddwd %xmm4, %xmm1 335; SSE4-32-NEXT: pmaddwd %xmm4, %xmm2 336; SSE4-32-NEXT: pmaddwd %xmm4, %xmm3 337; SSE4-32-NEXT: retl 338; 339; SSE4-64-LABEL: test_mul_v16i32_v16i8: 340; SSE4-64: # %bb.0: 341; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3] 342; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 343; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 344; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 345; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 346; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 347; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 348; SSE4-64-NEXT: movdqa {{.*#+}} xmm4 = [18778,18778,18778,18778] 349; SSE4-64-NEXT: pmaddwd %xmm4, %xmm0 350; SSE4-64-NEXT: pmaddwd %xmm4, %xmm1 351; SSE4-64-NEXT: pmaddwd %xmm4, %xmm2 352; SSE4-64-NEXT: pmaddwd %xmm4, %xmm3 353; SSE4-64-NEXT: retq 354; 355; AVX2-32-LABEL: test_mul_v16i32_v16i8: 356; AVX2-32: # %bb.0: 357; AVX2-32-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 358; AVX2-32-NEXT: vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero 359; AVX2-32-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero 360; AVX2-32-NEXT: vpbroadcastd {{.*#+}} ymm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 361; AVX2-32-NEXT: vpmaddwd %ymm2, %ymm0, %ymm0 362; AVX2-32-NEXT: vpmaddwd %ymm2, %ymm1, %ymm1 363; AVX2-32-NEXT: retl 364; 365; AVX2-64-LABEL: test_mul_v16i32_v16i8: 366; AVX2-64: # %bb.0: 367; AVX2-64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 368; AVX2-64-NEXT: vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero 369; AVX2-64-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero 370; AVX2-64-NEXT: vpbroadcastd {{.*#+}} ymm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 371; AVX2-64-NEXT: vpmaddwd %ymm2, %ymm0, %ymm0 372; AVX2-64-NEXT: vpmaddwd %ymm2, %ymm1, %ymm1 373; AVX2-64-NEXT: retq 374; 375; AVX512DQ-32-LABEL: test_mul_v16i32_v16i8: 376; AVX512DQ-32: # %bb.0: 377; AVX512DQ-32-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 378; AVX512DQ-32-NEXT: vpmulld {{\.LCPI.*}}{1to16}, %zmm0, %zmm0 379; AVX512DQ-32-NEXT: retl 380; 381; AVX512DQ-64-LABEL: test_mul_v16i32_v16i8: 382; AVX512DQ-64: # %bb.0: 383; AVX512DQ-64-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 384; AVX512DQ-64-NEXT: vpmulld {{.*}}(%rip){1to16}, %zmm0, %zmm0 385; AVX512DQ-64-NEXT: retq 386; 387; AVX512BW-32-LABEL: test_mul_v16i32_v16i8: 388; AVX512BW-32: # %bb.0: 389; AVX512BW-32-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 390; AVX512BW-32-NEXT: vpmaddwd {{\.LCPI.*}}, %zmm0, %zmm0 391; AVX512BW-32-NEXT: retl 392; 393; AVX512BW-64-LABEL: test_mul_v16i32_v16i8: 394; AVX512BW-64: # %bb.0: 395; AVX512BW-64-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 396; AVX512BW-64-NEXT: vpmaddwd {{.*}}(%rip), %zmm0, %zmm0 397; AVX512BW-64-NEXT: retq 398; 399; KNL-32-LABEL: test_mul_v16i32_v16i8: 400; KNL-32: # %bb.0: 401; KNL-32-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 402; KNL-32-NEXT: vpmulld {{\.LCPI.*}}{1to16}, %zmm0, %zmm0 403; KNL-32-NEXT: retl 404; 405; KNL-64-LABEL: test_mul_v16i32_v16i8: 406; KNL-64: # %bb.0: 407; KNL-64-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 408; KNL-64-NEXT: vpmulld {{.*}}(%rip){1to16}, %zmm0, %zmm0 409; KNL-64-NEXT: retq 410 %z = zext <16 x i8> %A to <16 x i32> 411 %m = mul nuw nsw <16 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778> 412 ret <16 x i32> %m 413} 414 415define <4 x i32> @test_mul_v4i32_v4i16(<4 x i16> %A) { 416; SLM32-LABEL: test_mul_v4i32_v4i16: 417; SLM32: # %bb.0: 418; SLM32-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 419; SLM32-NEXT: movdqa {{.*#+}} xmm1 = <18778,18778,18778,18778,u,u,u,u> 420; SLM32-NEXT: movdqa %xmm0, %xmm2 421; SLM32-NEXT: pmullw %xmm1, %xmm0 422; SLM32-NEXT: pmulhuw %xmm1, %xmm2 423; SLM32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 424; SLM32-NEXT: retl 425; 426; SLM64-LABEL: test_mul_v4i32_v4i16: 427; SLM64: # %bb.0: 428; SLM64-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 429; SLM64-NEXT: movdqa {{.*#+}} xmm1 = <18778,18778,18778,18778,u,u,u,u> 430; SLM64-NEXT: movdqa %xmm0, %xmm2 431; SLM64-NEXT: pmullw %xmm1, %xmm0 432; SLM64-NEXT: pmulhuw %xmm1, %xmm2 433; SLM64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 434; SLM64-NEXT: retq 435; 436; SLOW32-LABEL: test_mul_v4i32_v4i16: 437; SLOW32: # %bb.0: 438; SLOW32-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 439; SLOW32-NEXT: movdqa {{.*#+}} xmm1 = <18778,18778,18778,18778,u,u,u,u> 440; SLOW32-NEXT: movdqa %xmm0, %xmm2 441; SLOW32-NEXT: pmulhuw %xmm1, %xmm2 442; SLOW32-NEXT: pmullw %xmm1, %xmm0 443; SLOW32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 444; SLOW32-NEXT: retl 445; 446; SLOW64-LABEL: test_mul_v4i32_v4i16: 447; SLOW64: # %bb.0: 448; SLOW64-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] 449; SLOW64-NEXT: movdqa {{.*#+}} xmm1 = <18778,18778,18778,18778,u,u,u,u> 450; SLOW64-NEXT: movdqa %xmm0, %xmm2 451; SLOW64-NEXT: pmulhuw %xmm1, %xmm2 452; SLOW64-NEXT: pmullw %xmm1, %xmm0 453; SLOW64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 454; SLOW64-NEXT: retq 455; 456; SSE4-32-LABEL: test_mul_v4i32_v4i16: 457; SSE4-32: # %bb.0: 458; SSE4-32-NEXT: pxor %xmm1, %xmm1 459; SSE4-32-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 460; SSE4-32-NEXT: pmulld {{\.LCPI.*}}, %xmm0 461; SSE4-32-NEXT: retl 462; 463; SSE4-64-LABEL: test_mul_v4i32_v4i16: 464; SSE4-64: # %bb.0: 465; SSE4-64-NEXT: pxor %xmm1, %xmm1 466; SSE4-64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 467; SSE4-64-NEXT: pmulld {{.*}}(%rip), %xmm0 468; SSE4-64-NEXT: retq 469; 470; AVX-32-LABEL: test_mul_v4i32_v4i16: 471; AVX-32: # %bb.0: 472; AVX-32-NEXT: vpxor %xmm1, %xmm1, %xmm1 473; AVX-32-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 474; AVX-32-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778] 475; AVX-32-NEXT: vpmulld %xmm1, %xmm0, %xmm0 476; AVX-32-NEXT: retl 477; 478; AVX-64-LABEL: test_mul_v4i32_v4i16: 479; AVX-64: # %bb.0: 480; AVX-64-NEXT: vpxor %xmm1, %xmm1, %xmm1 481; AVX-64-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 482; AVX-64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778] 483; AVX-64-NEXT: vpmulld %xmm1, %xmm0, %xmm0 484; AVX-64-NEXT: retq 485 %z = zext <4 x i16> %A to <4 x i32> 486 %m = mul nuw nsw <4 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778> 487 ret <4 x i32> %m 488} 489 490define <8 x i32> @test_mul_v8i32_v8i16(<8 x i16> %A) { 491; SLM32-LABEL: test_mul_v8i32_v8i16: 492; SLM32: # %bb.0: 493; SLM32-NEXT: movdqa %xmm0, %xmm1 494; SLM32-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 495; SLM32-NEXT: movdqa %xmm1, %xmm2 496; SLM32-NEXT: pmullw %xmm0, %xmm1 497; SLM32-NEXT: pmulhuw %xmm0, %xmm2 498; SLM32-NEXT: movdqa %xmm1, %xmm0 499; SLM32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 500; SLM32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 501; SLM32-NEXT: retl 502; 503; SLM64-LABEL: test_mul_v8i32_v8i16: 504; SLM64: # %bb.0: 505; SLM64-NEXT: movdqa %xmm0, %xmm1 506; SLM64-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 507; SLM64-NEXT: movdqa %xmm1, %xmm2 508; SLM64-NEXT: pmullw %xmm0, %xmm1 509; SLM64-NEXT: pmulhuw %xmm0, %xmm2 510; SLM64-NEXT: movdqa %xmm1, %xmm0 511; SLM64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 512; SLM64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 513; SLM64-NEXT: retq 514; 515; SLOW32-LABEL: test_mul_v8i32_v8i16: 516; SLOW32: # %bb.0: 517; SLOW32-NEXT: movdqa %xmm0, %xmm1 518; SLOW32-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 519; SLOW32-NEXT: movdqa %xmm1, %xmm2 520; SLOW32-NEXT: pmulhuw %xmm0, %xmm2 521; SLOW32-NEXT: pmullw %xmm0, %xmm1 522; SLOW32-NEXT: movdqa %xmm1, %xmm0 523; SLOW32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 524; SLOW32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 525; SLOW32-NEXT: retl 526; 527; SLOW64-LABEL: test_mul_v8i32_v8i16: 528; SLOW64: # %bb.0: 529; SLOW64-NEXT: movdqa %xmm0, %xmm1 530; SLOW64-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 531; SLOW64-NEXT: movdqa %xmm1, %xmm2 532; SLOW64-NEXT: pmulhuw %xmm0, %xmm2 533; SLOW64-NEXT: pmullw %xmm0, %xmm1 534; SLOW64-NEXT: movdqa %xmm1, %xmm0 535; SLOW64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 536; SLOW64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 537; SLOW64-NEXT: retq 538; 539; SSE4-32-LABEL: test_mul_v8i32_v8i16: 540; SSE4-32: # %bb.0: 541; SSE4-32-NEXT: pxor %xmm1, %xmm1 542; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 543; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 544; SSE4-32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 545; SSE4-32-NEXT: pmulld %xmm1, %xmm2 546; SSE4-32-NEXT: pmulld %xmm0, %xmm1 547; SSE4-32-NEXT: movdqa %xmm2, %xmm0 548; SSE4-32-NEXT: retl 549; 550; SSE4-64-LABEL: test_mul_v8i32_v8i16: 551; SSE4-64: # %bb.0: 552; SSE4-64-NEXT: pxor %xmm1, %xmm1 553; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 554; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 555; SSE4-64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 556; SSE4-64-NEXT: pmulld %xmm1, %xmm2 557; SSE4-64-NEXT: pmulld %xmm0, %xmm1 558; SSE4-64-NEXT: movdqa %xmm2, %xmm0 559; SSE4-64-NEXT: retq 560; 561; AVX-32-LABEL: test_mul_v8i32_v8i16: 562; AVX-32: # %bb.0: 563; AVX-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 564; AVX-32-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778] 565; AVX-32-NEXT: vpmulld %ymm1, %ymm0, %ymm0 566; AVX-32-NEXT: retl 567; 568; AVX-64-LABEL: test_mul_v8i32_v8i16: 569; AVX-64: # %bb.0: 570; AVX-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 571; AVX-64-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778] 572; AVX-64-NEXT: vpmulld %ymm1, %ymm0, %ymm0 573; AVX-64-NEXT: retq 574 %z = zext <8 x i16> %A to <8 x i32> 575 %m = mul nuw nsw <8 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778> 576 ret <8 x i32> %m 577} 578 579define <16 x i32> @test_mul_v16i32_v16i16(<16 x i16> %A) { 580; SLM32-LABEL: test_mul_v16i32_v16i16: 581; SLM32: # %bb.0: 582; SLM32-NEXT: movdqa %xmm1, %xmm3 583; SLM32-NEXT: movdqa %xmm0, %xmm1 584; SLM32-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 585; SLM32-NEXT: movdqa %xmm1, %xmm2 586; SLM32-NEXT: movdqa %xmm3, %xmm4 587; SLM32-NEXT: pmullw %xmm0, %xmm1 588; SLM32-NEXT: pmulhuw %xmm0, %xmm2 589; SLM32-NEXT: pmullw %xmm0, %xmm3 590; SLM32-NEXT: pmulhuw %xmm0, %xmm4 591; SLM32-NEXT: movdqa %xmm1, %xmm0 592; SLM32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 593; SLM32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 594; SLM32-NEXT: movdqa %xmm3, %xmm2 595; SLM32-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 596; SLM32-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3] 597; SLM32-NEXT: retl 598; 599; SLM64-LABEL: test_mul_v16i32_v16i16: 600; SLM64: # %bb.0: 601; SLM64-NEXT: movdqa %xmm1, %xmm3 602; SLM64-NEXT: movdqa %xmm0, %xmm1 603; SLM64-NEXT: movdqa {{.*#+}} xmm0 = [18778,18778,18778,18778,18778,18778,18778,18778] 604; SLM64-NEXT: movdqa %xmm1, %xmm2 605; SLM64-NEXT: movdqa %xmm3, %xmm4 606; SLM64-NEXT: pmullw %xmm0, %xmm1 607; SLM64-NEXT: pmulhuw %xmm0, %xmm2 608; SLM64-NEXT: pmullw %xmm0, %xmm3 609; SLM64-NEXT: pmulhuw %xmm0, %xmm4 610; SLM64-NEXT: movdqa %xmm1, %xmm0 611; SLM64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm2[4],xmm1[5],xmm2[5],xmm1[6],xmm2[6],xmm1[7],xmm2[7] 612; SLM64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 613; SLM64-NEXT: movdqa %xmm3, %xmm2 614; SLM64-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 615; SLM64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3] 616; SLM64-NEXT: retq 617; 618; SLOW32-LABEL: test_mul_v16i32_v16i16: 619; SLOW32: # %bb.0: 620; SLOW32-NEXT: movdqa %xmm1, %xmm3 621; SLOW32-NEXT: movdqa %xmm0, %xmm1 622; SLOW32-NEXT: movdqa {{.*#+}} xmm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 623; SLOW32-NEXT: movdqa %xmm0, %xmm4 624; SLOW32-NEXT: pmulhuw %xmm2, %xmm4 625; SLOW32-NEXT: pmullw %xmm2, %xmm1 626; SLOW32-NEXT: movdqa %xmm1, %xmm0 627; SLOW32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3] 628; SLOW32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 629; SLOW32-NEXT: movdqa %xmm3, %xmm4 630; SLOW32-NEXT: pmulhuw %xmm2, %xmm4 631; SLOW32-NEXT: pmullw %xmm2, %xmm3 632; SLOW32-NEXT: movdqa %xmm3, %xmm2 633; SLOW32-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3] 634; SLOW32-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 635; SLOW32-NEXT: retl 636; 637; SLOW64-LABEL: test_mul_v16i32_v16i16: 638; SLOW64: # %bb.0: 639; SLOW64-NEXT: movdqa %xmm1, %xmm3 640; SLOW64-NEXT: movdqa %xmm0, %xmm1 641; SLOW64-NEXT: movdqa {{.*#+}} xmm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 642; SLOW64-NEXT: movdqa %xmm0, %xmm4 643; SLOW64-NEXT: pmulhuw %xmm2, %xmm4 644; SLOW64-NEXT: pmullw %xmm2, %xmm1 645; SLOW64-NEXT: movdqa %xmm1, %xmm0 646; SLOW64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm4[0],xmm0[1],xmm4[1],xmm0[2],xmm4[2],xmm0[3],xmm4[3] 647; SLOW64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm4[4],xmm1[5],xmm4[5],xmm1[6],xmm4[6],xmm1[7],xmm4[7] 648; SLOW64-NEXT: movdqa %xmm3, %xmm4 649; SLOW64-NEXT: pmulhuw %xmm2, %xmm4 650; SLOW64-NEXT: pmullw %xmm2, %xmm3 651; SLOW64-NEXT: movdqa %xmm3, %xmm2 652; SLOW64-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm4[0],xmm2[1],xmm4[1],xmm2[2],xmm4[2],xmm2[3],xmm4[3] 653; SLOW64-NEXT: punpckhwd {{.*#+}} xmm3 = xmm3[4],xmm4[4],xmm3[5],xmm4[5],xmm3[6],xmm4[6],xmm3[7],xmm4[7] 654; SLOW64-NEXT: retq 655; 656; SSE4-32-LABEL: test_mul_v16i32_v16i16: 657; SSE4-32: # %bb.0: 658; SSE4-32-NEXT: movdqa %xmm0, %xmm4 659; SSE4-32-NEXT: pxor %xmm3, %xmm3 660; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 661; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 662; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 663; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 664; SSE4-32-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778] 665; SSE4-32-NEXT: pmulld %xmm3, %xmm0 666; SSE4-32-NEXT: pmulld %xmm3, %xmm4 667; SSE4-32-NEXT: pmulld %xmm3, %xmm2 668; SSE4-32-NEXT: pmulld %xmm1, %xmm3 669; SSE4-32-NEXT: movdqa %xmm4, %xmm1 670; SSE4-32-NEXT: retl 671; 672; SSE4-64-LABEL: test_mul_v16i32_v16i16: 673; SSE4-64: # %bb.0: 674; SSE4-64-NEXT: movdqa %xmm0, %xmm4 675; SSE4-64-NEXT: pxor %xmm3, %xmm3 676; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 677; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 678; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 679; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 680; SSE4-64-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778] 681; SSE4-64-NEXT: pmulld %xmm3, %xmm0 682; SSE4-64-NEXT: pmulld %xmm3, %xmm4 683; SSE4-64-NEXT: pmulld %xmm3, %xmm2 684; SSE4-64-NEXT: pmulld %xmm1, %xmm3 685; SSE4-64-NEXT: movdqa %xmm4, %xmm1 686; SSE4-64-NEXT: retq 687; 688; AVX2-32-LABEL: test_mul_v16i32_v16i16: 689; AVX2-32: # %bb.0: 690; AVX2-32-NEXT: vextracti128 $1, %ymm0, %xmm1 691; AVX2-32-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 692; AVX2-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 693; AVX2-32-NEXT: vpbroadcastd {{.*#+}} ymm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 694; AVX2-32-NEXT: vpmulld %ymm2, %ymm0, %ymm0 695; AVX2-32-NEXT: vpmulld %ymm2, %ymm1, %ymm1 696; AVX2-32-NEXT: retl 697; 698; AVX2-64-LABEL: test_mul_v16i32_v16i16: 699; AVX2-64: # %bb.0: 700; AVX2-64-NEXT: vextracti128 $1, %ymm0, %xmm1 701; AVX2-64-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 702; AVX2-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 703; AVX2-64-NEXT: vpbroadcastd {{.*#+}} ymm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 704; AVX2-64-NEXT: vpmulld %ymm2, %ymm0, %ymm0 705; AVX2-64-NEXT: vpmulld %ymm2, %ymm1, %ymm1 706; AVX2-64-NEXT: retq 707; 708; AVX512-32-LABEL: test_mul_v16i32_v16i16: 709; AVX512-32: # %bb.0: 710; AVX512-32-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 711; AVX512-32-NEXT: vpmulld {{\.LCPI.*}}{1to16}, %zmm0, %zmm0 712; AVX512-32-NEXT: retl 713; 714; AVX512-64-LABEL: test_mul_v16i32_v16i16: 715; AVX512-64: # %bb.0: 716; AVX512-64-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 717; AVX512-64-NEXT: vpmulld {{.*}}(%rip){1to16}, %zmm0, %zmm0 718; AVX512-64-NEXT: retq 719 %z = zext <16 x i16> %A to <16 x i32> 720 %m = mul nuw nsw <16 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778> 721 ret <16 x i32> %m 722} 723 724; 725; MinSize Tests 726; 727 728define <4 x i32> @test_mul_v4i32_v4i8_minsize(<4 x i8> %A) minsize { 729; CHECK32-LABEL: test_mul_v4i32_v4i8_minsize: 730; CHECK32: # %bb.0: 731; CHECK32-NEXT: pand {{\.LCPI.*}}, %xmm0 732; CHECK32-NEXT: pmaddwd {{\.LCPI.*}}, %xmm0 733; CHECK32-NEXT: retl 734; 735; CHECK64-LABEL: test_mul_v4i32_v4i8_minsize: 736; CHECK64: # %bb.0: 737; CHECK64-NEXT: pand {{.*}}(%rip), %xmm0 738; CHECK64-NEXT: pmaddwd {{.*}}(%rip), %xmm0 739; CHECK64-NEXT: retq 740; 741; SSE4-32-LABEL: test_mul_v4i32_v4i8_minsize: 742; SSE4-32: # %bb.0: 743; SSE4-32-NEXT: pand {{\.LCPI.*}}, %xmm0 744; SSE4-32-NEXT: pmaddwd {{\.LCPI.*}}, %xmm0 745; SSE4-32-NEXT: retl 746; 747; SSE4-64-LABEL: test_mul_v4i32_v4i8_minsize: 748; SSE4-64: # %bb.0: 749; SSE4-64-NEXT: pand {{.*}}(%rip), %xmm0 750; SSE4-64-NEXT: pmaddwd {{.*}}(%rip), %xmm0 751; SSE4-64-NEXT: retq 752; 753; AVX2-32-LABEL: test_mul_v4i32_v4i8_minsize: 754; AVX2-32: # %bb.0: 755; AVX2-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 756; AVX2-32-NEXT: vpmaddwd {{\.LCPI.*}}, %xmm0, %xmm0 757; AVX2-32-NEXT: retl 758; 759; AVX2-64-LABEL: test_mul_v4i32_v4i8_minsize: 760; AVX2-64: # %bb.0: 761; AVX2-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 762; AVX2-64-NEXT: vpmaddwd {{.*}}(%rip), %xmm0, %xmm0 763; AVX2-64-NEXT: retq 764; 765; AVX512DQ-32-LABEL: test_mul_v4i32_v4i8_minsize: 766; AVX512DQ-32: # %bb.0: 767; AVX512DQ-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 768; AVX512DQ-32-NEXT: vpmaddwd {{\.LCPI.*}}, %xmm0, %xmm0 769; AVX512DQ-32-NEXT: retl 770; 771; AVX512DQ-64-LABEL: test_mul_v4i32_v4i8_minsize: 772; AVX512DQ-64: # %bb.0: 773; AVX512DQ-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 774; AVX512DQ-64-NEXT: vpmaddwd {{.*}}(%rip), %xmm0, %xmm0 775; AVX512DQ-64-NEXT: retq 776; 777; AVX512BW-32-LABEL: test_mul_v4i32_v4i8_minsize: 778; AVX512BW-32: # %bb.0: 779; AVX512BW-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 780; AVX512BW-32-NEXT: vpmaddwd {{\.LCPI.*}}, %xmm0, %xmm0 781; AVX512BW-32-NEXT: retl 782; 783; AVX512BW-64-LABEL: test_mul_v4i32_v4i8_minsize: 784; AVX512BW-64: # %bb.0: 785; AVX512BW-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 786; AVX512BW-64-NEXT: vpmaddwd {{.*}}(%rip), %xmm0, %xmm0 787; AVX512BW-64-NEXT: retq 788; 789; KNL-32-LABEL: test_mul_v4i32_v4i8_minsize: 790; KNL-32: # %bb.0: 791; KNL-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 792; KNL-32-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778] 793; KNL-32-NEXT: vpmulld %xmm1, %xmm0, %xmm0 794; KNL-32-NEXT: retl 795; 796; KNL-64-LABEL: test_mul_v4i32_v4i8_minsize: 797; KNL-64: # %bb.0: 798; KNL-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 799; KNL-64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778] 800; KNL-64-NEXT: vpmulld %xmm1, %xmm0, %xmm0 801; KNL-64-NEXT: retq 802 %z = zext <4 x i8> %A to <4 x i32> 803 %m = mul nuw nsw <4 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778> 804 ret <4 x i32> %m 805} 806 807define <8 x i32> @test_mul_v8i32_v8i8_minsize(<8 x i8> %A) minsize { 808; CHECK32-LABEL: test_mul_v8i32_v8i8_minsize: 809; CHECK32: # %bb.0: 810; CHECK32-NEXT: pand {{\.LCPI.*}}, %xmm0 811; CHECK32-NEXT: pxor %xmm1, %xmm1 812; CHECK32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 813; CHECK32-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 814; CHECK32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 815; CHECK32-NEXT: pmaddwd %xmm1, %xmm2 816; CHECK32-NEXT: pmaddwd %xmm0, %xmm1 817; CHECK32-NEXT: movdqa %xmm2, %xmm0 818; CHECK32-NEXT: retl 819; 820; CHECK64-LABEL: test_mul_v8i32_v8i8_minsize: 821; CHECK64: # %bb.0: 822; CHECK64-NEXT: pand {{.*}}(%rip), %xmm0 823; CHECK64-NEXT: pxor %xmm1, %xmm1 824; CHECK64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 825; CHECK64-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 826; CHECK64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 827; CHECK64-NEXT: pmaddwd %xmm1, %xmm2 828; CHECK64-NEXT: pmaddwd %xmm0, %xmm1 829; CHECK64-NEXT: movdqa %xmm2, %xmm0 830; CHECK64-NEXT: retq 831; 832; SSE4-32-LABEL: test_mul_v8i32_v8i8_minsize: 833; SSE4-32: # %bb.0: 834; SSE4-32-NEXT: pand {{\.LCPI.*}}, %xmm0 835; SSE4-32-NEXT: pxor %xmm1, %xmm1 836; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 837; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 838; SSE4-32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 839; SSE4-32-NEXT: pmaddwd %xmm1, %xmm2 840; SSE4-32-NEXT: pmaddwd %xmm0, %xmm1 841; SSE4-32-NEXT: movdqa %xmm2, %xmm0 842; SSE4-32-NEXT: retl 843; 844; SSE4-64-LABEL: test_mul_v8i32_v8i8_minsize: 845; SSE4-64: # %bb.0: 846; SSE4-64-NEXT: pand {{.*}}(%rip), %xmm0 847; SSE4-64-NEXT: pxor %xmm1, %xmm1 848; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 849; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 850; SSE4-64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 851; SSE4-64-NEXT: pmaddwd %xmm1, %xmm2 852; SSE4-64-NEXT: pmaddwd %xmm0, %xmm1 853; SSE4-64-NEXT: movdqa %xmm2, %xmm0 854; SSE4-64-NEXT: retq 855; 856; AVX2-32-LABEL: test_mul_v8i32_v8i8_minsize: 857; AVX2-32: # %bb.0: 858; AVX2-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 859; AVX2-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 860; AVX2-32-NEXT: vpmaddwd {{\.LCPI.*}}, %ymm0, %ymm0 861; AVX2-32-NEXT: retl 862; 863; AVX2-64-LABEL: test_mul_v8i32_v8i8_minsize: 864; AVX2-64: # %bb.0: 865; AVX2-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 866; AVX2-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 867; AVX2-64-NEXT: vpmaddwd {{.*}}(%rip), %ymm0, %ymm0 868; AVX2-64-NEXT: retq 869; 870; AVX512DQ-32-LABEL: test_mul_v8i32_v8i8_minsize: 871; AVX512DQ-32: # %bb.0: 872; AVX512DQ-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 873; AVX512DQ-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 874; AVX512DQ-32-NEXT: vpmaddwd {{\.LCPI.*}}, %ymm0, %ymm0 875; AVX512DQ-32-NEXT: retl 876; 877; AVX512DQ-64-LABEL: test_mul_v8i32_v8i8_minsize: 878; AVX512DQ-64: # %bb.0: 879; AVX512DQ-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 880; AVX512DQ-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 881; AVX512DQ-64-NEXT: vpmaddwd {{.*}}(%rip), %ymm0, %ymm0 882; AVX512DQ-64-NEXT: retq 883; 884; AVX512BW-32-LABEL: test_mul_v8i32_v8i8_minsize: 885; AVX512BW-32: # %bb.0: 886; AVX512BW-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 887; AVX512BW-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 888; AVX512BW-32-NEXT: vpmaddwd {{\.LCPI.*}}, %ymm0, %ymm0 889; AVX512BW-32-NEXT: retl 890; 891; AVX512BW-64-LABEL: test_mul_v8i32_v8i8_minsize: 892; AVX512BW-64: # %bb.0: 893; AVX512BW-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 894; AVX512BW-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 895; AVX512BW-64-NEXT: vpmaddwd {{.*}}(%rip), %ymm0, %ymm0 896; AVX512BW-64-NEXT: retq 897; 898; KNL-32-LABEL: test_mul_v8i32_v8i8_minsize: 899; KNL-32: # %bb.0: 900; KNL-32-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 901; KNL-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 902; KNL-32-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778] 903; KNL-32-NEXT: vpmulld %ymm1, %ymm0, %ymm0 904; KNL-32-NEXT: retl 905; 906; KNL-64-LABEL: test_mul_v8i32_v8i8_minsize: 907; KNL-64: # %bb.0: 908; KNL-64-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 909; KNL-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 910; KNL-64-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778] 911; KNL-64-NEXT: vpmulld %ymm1, %ymm0, %ymm0 912; KNL-64-NEXT: retq 913 %z = zext <8 x i8> %A to <8 x i32> 914 %m = mul nuw nsw <8 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778> 915 ret <8 x i32> %m 916} 917 918define <16 x i32> @test_mul_v16i32_v16i8_minsize(<16 x i8> %A) minsize { 919; SLM32-LABEL: test_mul_v16i32_v16i8_minsize: 920; SLM32: # %bb.0: 921; SLM32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3] 922; SLM32-NEXT: movdqa {{.*#+}} xmm5 = [18778,18778,18778,18778] 923; SLM32-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,2,3] 924; SLM32-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 925; SLM32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 926; SLM32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 927; SLM32-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 928; SLM32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero 929; SLM32-NEXT: pmaddwd %xmm5, %xmm0 930; SLM32-NEXT: pmaddwd %xmm5, %xmm1 931; SLM32-NEXT: pmaddwd %xmm5, %xmm2 932; SLM32-NEXT: pmaddwd %xmm5, %xmm3 933; SLM32-NEXT: retl 934; 935; SLM64-LABEL: test_mul_v16i32_v16i8_minsize: 936; SLM64: # %bb.0: 937; SLM64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3] 938; SLM64-NEXT: movdqa {{.*#+}} xmm5 = [18778,18778,18778,18778] 939; SLM64-NEXT: pshufd {{.*#+}} xmm4 = xmm0[1,1,2,3] 940; SLM64-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 941; SLM64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 942; SLM64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 943; SLM64-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 944; SLM64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm4[0],zero,zero,zero,xmm4[1],zero,zero,zero,xmm4[2],zero,zero,zero,xmm4[3],zero,zero,zero 945; SLM64-NEXT: pmaddwd %xmm5, %xmm0 946; SLM64-NEXT: pmaddwd %xmm5, %xmm1 947; SLM64-NEXT: pmaddwd %xmm5, %xmm2 948; SLM64-NEXT: pmaddwd %xmm5, %xmm3 949; SLM64-NEXT: retq 950; 951; SLOW32-LABEL: test_mul_v16i32_v16i8_minsize: 952; SLOW32: # %bb.0: 953; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3] 954; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 955; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 956; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 957; SLOW32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 958; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 959; SLOW32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 960; SLOW32-NEXT: movdqa {{.*#+}} xmm4 = [18778,18778,18778,18778] 961; SLOW32-NEXT: pmaddwd %xmm4, %xmm0 962; SLOW32-NEXT: pmaddwd %xmm4, %xmm1 963; SLOW32-NEXT: pmaddwd %xmm4, %xmm2 964; SLOW32-NEXT: pmaddwd %xmm4, %xmm3 965; SLOW32-NEXT: retl 966; 967; SLOW64-LABEL: test_mul_v16i32_v16i8_minsize: 968; SLOW64: # %bb.0: 969; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3] 970; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 971; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 972; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 973; SLOW64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 974; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 975; SLOW64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 976; SLOW64-NEXT: movdqa {{.*#+}} xmm4 = [18778,18778,18778,18778] 977; SLOW64-NEXT: pmaddwd %xmm4, %xmm0 978; SLOW64-NEXT: pmaddwd %xmm4, %xmm1 979; SLOW64-NEXT: pmaddwd %xmm4, %xmm2 980; SLOW64-NEXT: pmaddwd %xmm4, %xmm3 981; SLOW64-NEXT: retq 982; 983; SSE4-32-LABEL: test_mul_v16i32_v16i8_minsize: 984; SSE4-32: # %bb.0: 985; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3] 986; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 987; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 988; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 989; SSE4-32-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 990; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 991; SSE4-32-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 992; SSE4-32-NEXT: movdqa {{.*#+}} xmm4 = [18778,18778,18778,18778] 993; SSE4-32-NEXT: pmaddwd %xmm4, %xmm0 994; SSE4-32-NEXT: pmaddwd %xmm4, %xmm1 995; SSE4-32-NEXT: pmaddwd %xmm4, %xmm2 996; SSE4-32-NEXT: pmaddwd %xmm4, %xmm3 997; SSE4-32-NEXT: retl 998; 999; SSE4-64-LABEL: test_mul_v16i32_v16i8_minsize: 1000; SSE4-64: # %bb.0: 1001; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[3,1,2,3] 1002; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm3 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 1003; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1004; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm2 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 1005; SSE4-64-NEXT: pshufd {{.*#+}} xmm1 = xmm0[1,1,2,3] 1006; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero 1007; SSE4-64-NEXT: pmovzxbd {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero 1008; SSE4-64-NEXT: movdqa {{.*#+}} xmm4 = [18778,18778,18778,18778] 1009; SSE4-64-NEXT: pmaddwd %xmm4, %xmm0 1010; SSE4-64-NEXT: pmaddwd %xmm4, %xmm1 1011; SSE4-64-NEXT: pmaddwd %xmm4, %xmm2 1012; SSE4-64-NEXT: pmaddwd %xmm4, %xmm3 1013; SSE4-64-NEXT: retq 1014; 1015; AVX2-32-LABEL: test_mul_v16i32_v16i8_minsize: 1016; AVX2-32: # %bb.0: 1017; AVX2-32-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1018; AVX2-32-NEXT: vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero 1019; AVX2-32-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero 1020; AVX2-32-NEXT: vpbroadcastd {{.*#+}} ymm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 1021; AVX2-32-NEXT: vpmaddwd %ymm2, %ymm0, %ymm0 1022; AVX2-32-NEXT: vpmaddwd %ymm2, %ymm1, %ymm1 1023; AVX2-32-NEXT: retl 1024; 1025; AVX2-64-LABEL: test_mul_v16i32_v16i8_minsize: 1026; AVX2-64: # %bb.0: 1027; AVX2-64-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] 1028; AVX2-64-NEXT: vpmovzxbd {{.*#+}} ymm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero 1029; AVX2-64-NEXT: vpmovzxbd {{.*#+}} ymm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero 1030; AVX2-64-NEXT: vpbroadcastd {{.*#+}} ymm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 1031; AVX2-64-NEXT: vpmaddwd %ymm2, %ymm0, %ymm0 1032; AVX2-64-NEXT: vpmaddwd %ymm2, %ymm1, %ymm1 1033; AVX2-64-NEXT: retq 1034; 1035; AVX512DQ-32-LABEL: test_mul_v16i32_v16i8_minsize: 1036; AVX512DQ-32: # %bb.0: 1037; AVX512DQ-32-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 1038; AVX512DQ-32-NEXT: vpmulld {{\.LCPI.*}}{1to16}, %zmm0, %zmm0 1039; AVX512DQ-32-NEXT: retl 1040; 1041; AVX512DQ-64-LABEL: test_mul_v16i32_v16i8_minsize: 1042; AVX512DQ-64: # %bb.0: 1043; AVX512DQ-64-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 1044; AVX512DQ-64-NEXT: vpmulld {{.*}}(%rip){1to16}, %zmm0, %zmm0 1045; AVX512DQ-64-NEXT: retq 1046; 1047; AVX512BW-32-LABEL: test_mul_v16i32_v16i8_minsize: 1048; AVX512BW-32: # %bb.0: 1049; AVX512BW-32-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 1050; AVX512BW-32-NEXT: vpmaddwd {{\.LCPI.*}}, %zmm0, %zmm0 1051; AVX512BW-32-NEXT: retl 1052; 1053; AVX512BW-64-LABEL: test_mul_v16i32_v16i8_minsize: 1054; AVX512BW-64: # %bb.0: 1055; AVX512BW-64-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 1056; AVX512BW-64-NEXT: vpmaddwd {{.*}}(%rip), %zmm0, %zmm0 1057; AVX512BW-64-NEXT: retq 1058; 1059; KNL-32-LABEL: test_mul_v16i32_v16i8_minsize: 1060; KNL-32: # %bb.0: 1061; KNL-32-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 1062; KNL-32-NEXT: vpmulld {{\.LCPI.*}}{1to16}, %zmm0, %zmm0 1063; KNL-32-NEXT: retl 1064; 1065; KNL-64-LABEL: test_mul_v16i32_v16i8_minsize: 1066; KNL-64: # %bb.0: 1067; KNL-64-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero 1068; KNL-64-NEXT: vpmulld {{.*}}(%rip){1to16}, %zmm0, %zmm0 1069; KNL-64-NEXT: retq 1070 %z = zext <16 x i8> %A to <16 x i32> 1071 %m = mul nuw nsw <16 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778> 1072 ret <16 x i32> %m 1073} 1074 1075define <4 x i32> @test_mul_v4i32_v4i16_minsize(<4 x i16> %A) minsize { 1076; CHECK32-LABEL: test_mul_v4i32_v4i16_minsize: 1077; CHECK32: # %bb.0: 1078; CHECK32-NEXT: pxor %xmm1, %xmm1 1079; CHECK32-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 1080; CHECK32-NEXT: pmulld {{\.LCPI.*}}, %xmm0 1081; CHECK32-NEXT: retl 1082; 1083; CHECK64-LABEL: test_mul_v4i32_v4i16_minsize: 1084; CHECK64: # %bb.0: 1085; CHECK64-NEXT: pxor %xmm1, %xmm1 1086; CHECK64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 1087; CHECK64-NEXT: pmulld {{.*}}(%rip), %xmm0 1088; CHECK64-NEXT: retq 1089; 1090; SSE4-32-LABEL: test_mul_v4i32_v4i16_minsize: 1091; SSE4-32: # %bb.0: 1092; SSE4-32-NEXT: pxor %xmm1, %xmm1 1093; SSE4-32-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 1094; SSE4-32-NEXT: pmulld {{\.LCPI.*}}, %xmm0 1095; SSE4-32-NEXT: retl 1096; 1097; SSE4-64-LABEL: test_mul_v4i32_v4i16_minsize: 1098; SSE4-64: # %bb.0: 1099; SSE4-64-NEXT: pxor %xmm1, %xmm1 1100; SSE4-64-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 1101; SSE4-64-NEXT: pmulld {{.*}}(%rip), %xmm0 1102; SSE4-64-NEXT: retq 1103; 1104; AVX-32-LABEL: test_mul_v4i32_v4i16_minsize: 1105; AVX-32: # %bb.0: 1106; AVX-32-NEXT: vpxor %xmm1, %xmm1, %xmm1 1107; AVX-32-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 1108; AVX-32-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778] 1109; AVX-32-NEXT: vpmulld %xmm1, %xmm0, %xmm0 1110; AVX-32-NEXT: retl 1111; 1112; AVX-64-LABEL: test_mul_v4i32_v4i16_minsize: 1113; AVX-64: # %bb.0: 1114; AVX-64-NEXT: vpxor %xmm1, %xmm1, %xmm1 1115; AVX-64-NEXT: vpblendw {{.*#+}} xmm0 = xmm0[0],xmm1[1],xmm0[2],xmm1[3],xmm0[4],xmm1[5],xmm0[6],xmm1[7] 1116; AVX-64-NEXT: vpbroadcastd {{.*#+}} xmm1 = [18778,18778,18778,18778] 1117; AVX-64-NEXT: vpmulld %xmm1, %xmm0, %xmm0 1118; AVX-64-NEXT: retq 1119 %z = zext <4 x i16> %A to <4 x i32> 1120 %m = mul nuw nsw <4 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778> 1121 ret <4 x i32> %m 1122} 1123 1124define <8 x i32> @test_mul_v8i32_v8i16_minsize(<8 x i16> %A) minsize { 1125; CHECK32-LABEL: test_mul_v8i32_v8i16_minsize: 1126; CHECK32: # %bb.0: 1127; CHECK32-NEXT: pxor %xmm1, %xmm1 1128; CHECK32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 1129; CHECK32-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 1130; CHECK32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 1131; CHECK32-NEXT: pmulld %xmm1, %xmm2 1132; CHECK32-NEXT: pmulld %xmm0, %xmm1 1133; CHECK32-NEXT: movdqa %xmm2, %xmm0 1134; CHECK32-NEXT: retl 1135; 1136; CHECK64-LABEL: test_mul_v8i32_v8i16_minsize: 1137; CHECK64: # %bb.0: 1138; CHECK64-NEXT: pxor %xmm1, %xmm1 1139; CHECK64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 1140; CHECK64-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 1141; CHECK64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 1142; CHECK64-NEXT: pmulld %xmm1, %xmm2 1143; CHECK64-NEXT: pmulld %xmm0, %xmm1 1144; CHECK64-NEXT: movdqa %xmm2, %xmm0 1145; CHECK64-NEXT: retq 1146; 1147; SSE4-32-LABEL: test_mul_v8i32_v8i16_minsize: 1148; SSE4-32: # %bb.0: 1149; SSE4-32-NEXT: pxor %xmm1, %xmm1 1150; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 1151; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 1152; SSE4-32-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 1153; SSE4-32-NEXT: pmulld %xmm1, %xmm2 1154; SSE4-32-NEXT: pmulld %xmm0, %xmm1 1155; SSE4-32-NEXT: movdqa %xmm2, %xmm0 1156; SSE4-32-NEXT: retl 1157; 1158; SSE4-64-LABEL: test_mul_v8i32_v8i16_minsize: 1159; SSE4-64: # %bb.0: 1160; SSE4-64-NEXT: pxor %xmm1, %xmm1 1161; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 1162; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm0 = xmm0[4],xmm1[4],xmm0[5],xmm1[5],xmm0[6],xmm1[6],xmm0[7],xmm1[7] 1163; SSE4-64-NEXT: movdqa {{.*#+}} xmm1 = [18778,18778,18778,18778] 1164; SSE4-64-NEXT: pmulld %xmm1, %xmm2 1165; SSE4-64-NEXT: pmulld %xmm0, %xmm1 1166; SSE4-64-NEXT: movdqa %xmm2, %xmm0 1167; SSE4-64-NEXT: retq 1168; 1169; AVX-32-LABEL: test_mul_v8i32_v8i16_minsize: 1170; AVX-32: # %bb.0: 1171; AVX-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 1172; AVX-32-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778] 1173; AVX-32-NEXT: vpmulld %ymm1, %ymm0, %ymm0 1174; AVX-32-NEXT: retl 1175; 1176; AVX-64-LABEL: test_mul_v8i32_v8i16_minsize: 1177; AVX-64: # %bb.0: 1178; AVX-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 1179; AVX-64-NEXT: vpbroadcastd {{.*#+}} ymm1 = [18778,18778,18778,18778,18778,18778,18778,18778] 1180; AVX-64-NEXT: vpmulld %ymm1, %ymm0, %ymm0 1181; AVX-64-NEXT: retq 1182 %z = zext <8 x i16> %A to <8 x i32> 1183 %m = mul nuw nsw <8 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778> 1184 ret <8 x i32> %m 1185} 1186 1187define <16 x i32> @test_mul_v16i32_v16i16_minsize(<16 x i16> %A) minsize { 1188; SLM32-LABEL: test_mul_v16i32_v16i16_minsize: 1189; SLM32: # %bb.0: 1190; SLM32-NEXT: movdqa %xmm0, %xmm4 1191; SLM32-NEXT: pxor %xmm3, %xmm3 1192; SLM32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 1193; SLM32-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 1194; SLM32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 1195; SLM32-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 1196; SLM32-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778] 1197; SLM32-NEXT: pmulld %xmm3, %xmm4 1198; SLM32-NEXT: pmulld %xmm3, %xmm0 1199; SLM32-NEXT: pmulld %xmm3, %xmm2 1200; SLM32-NEXT: pmulld %xmm1, %xmm3 1201; SLM32-NEXT: movdqa %xmm4, %xmm1 1202; SLM32-NEXT: retl 1203; 1204; SLM64-LABEL: test_mul_v16i32_v16i16_minsize: 1205; SLM64: # %bb.0: 1206; SLM64-NEXT: movdqa %xmm0, %xmm4 1207; SLM64-NEXT: pxor %xmm3, %xmm3 1208; SLM64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 1209; SLM64-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 1210; SLM64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 1211; SLM64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 1212; SLM64-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778] 1213; SLM64-NEXT: pmulld %xmm3, %xmm4 1214; SLM64-NEXT: pmulld %xmm3, %xmm0 1215; SLM64-NEXT: pmulld %xmm3, %xmm2 1216; SLM64-NEXT: pmulld %xmm1, %xmm3 1217; SLM64-NEXT: movdqa %xmm4, %xmm1 1218; SLM64-NEXT: retq 1219; 1220; SLOW32-LABEL: test_mul_v16i32_v16i16_minsize: 1221; SLOW32: # %bb.0: 1222; SLOW32-NEXT: movdqa %xmm0, %xmm4 1223; SLOW32-NEXT: pxor %xmm3, %xmm3 1224; SLOW32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 1225; SLOW32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 1226; SLOW32-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 1227; SLOW32-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 1228; SLOW32-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778] 1229; SLOW32-NEXT: pmulld %xmm3, %xmm0 1230; SLOW32-NEXT: pmulld %xmm3, %xmm4 1231; SLOW32-NEXT: pmulld %xmm3, %xmm2 1232; SLOW32-NEXT: pmulld %xmm1, %xmm3 1233; SLOW32-NEXT: movdqa %xmm4, %xmm1 1234; SLOW32-NEXT: retl 1235; 1236; SLOW64-LABEL: test_mul_v16i32_v16i16_minsize: 1237; SLOW64: # %bb.0: 1238; SLOW64-NEXT: movdqa %xmm0, %xmm4 1239; SLOW64-NEXT: pxor %xmm3, %xmm3 1240; SLOW64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 1241; SLOW64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 1242; SLOW64-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 1243; SLOW64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 1244; SLOW64-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778] 1245; SLOW64-NEXT: pmulld %xmm3, %xmm0 1246; SLOW64-NEXT: pmulld %xmm3, %xmm4 1247; SLOW64-NEXT: pmulld %xmm3, %xmm2 1248; SLOW64-NEXT: pmulld %xmm1, %xmm3 1249; SLOW64-NEXT: movdqa %xmm4, %xmm1 1250; SLOW64-NEXT: retq 1251; 1252; SSE4-32-LABEL: test_mul_v16i32_v16i16_minsize: 1253; SSE4-32: # %bb.0: 1254; SSE4-32-NEXT: movdqa %xmm0, %xmm4 1255; SSE4-32-NEXT: pxor %xmm3, %xmm3 1256; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 1257; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 1258; SSE4-32-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 1259; SSE4-32-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 1260; SSE4-32-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778] 1261; SSE4-32-NEXT: pmulld %xmm3, %xmm0 1262; SSE4-32-NEXT: pmulld %xmm3, %xmm4 1263; SSE4-32-NEXT: pmulld %xmm3, %xmm2 1264; SSE4-32-NEXT: pmulld %xmm1, %xmm3 1265; SSE4-32-NEXT: movdqa %xmm4, %xmm1 1266; SSE4-32-NEXT: retl 1267; 1268; SSE4-64-LABEL: test_mul_v16i32_v16i16_minsize: 1269; SSE4-64: # %bb.0: 1270; SSE4-64-NEXT: movdqa %xmm0, %xmm4 1271; SSE4-64-NEXT: pxor %xmm3, %xmm3 1272; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero 1273; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm1 = xmm1[4],xmm3[4],xmm1[5],xmm3[5],xmm1[6],xmm3[6],xmm1[7],xmm3[7] 1274; SSE4-64-NEXT: pmovzxwd {{.*#+}} xmm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero 1275; SSE4-64-NEXT: punpckhwd {{.*#+}} xmm4 = xmm4[4],xmm3[4],xmm4[5],xmm3[5],xmm4[6],xmm3[6],xmm4[7],xmm3[7] 1276; SSE4-64-NEXT: movdqa {{.*#+}} xmm3 = [18778,18778,18778,18778] 1277; SSE4-64-NEXT: pmulld %xmm3, %xmm0 1278; SSE4-64-NEXT: pmulld %xmm3, %xmm4 1279; SSE4-64-NEXT: pmulld %xmm3, %xmm2 1280; SSE4-64-NEXT: pmulld %xmm1, %xmm3 1281; SSE4-64-NEXT: movdqa %xmm4, %xmm1 1282; SSE4-64-NEXT: retq 1283; 1284; AVX2-32-LABEL: test_mul_v16i32_v16i16_minsize: 1285; AVX2-32: # %bb.0: 1286; AVX2-32-NEXT: vextracti128 $1, %ymm0, %xmm1 1287; AVX2-32-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 1288; AVX2-32-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 1289; AVX2-32-NEXT: vpbroadcastd {{.*#+}} ymm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 1290; AVX2-32-NEXT: vpmulld %ymm2, %ymm0, %ymm0 1291; AVX2-32-NEXT: vpmulld %ymm2, %ymm1, %ymm1 1292; AVX2-32-NEXT: retl 1293; 1294; AVX2-64-LABEL: test_mul_v16i32_v16i16_minsize: 1295; AVX2-64: # %bb.0: 1296; AVX2-64-NEXT: vextracti128 $1, %ymm0, %xmm1 1297; AVX2-64-NEXT: vpmovzxwd {{.*#+}} ymm1 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 1298; AVX2-64-NEXT: vpmovzxwd {{.*#+}} ymm0 = xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[4],zero,xmm0[5],zero,xmm0[6],zero,xmm0[7],zero 1299; AVX2-64-NEXT: vpbroadcastd {{.*#+}} ymm2 = [18778,18778,18778,18778,18778,18778,18778,18778] 1300; AVX2-64-NEXT: vpmulld %ymm2, %ymm0, %ymm0 1301; AVX2-64-NEXT: vpmulld %ymm2, %ymm1, %ymm1 1302; AVX2-64-NEXT: retq 1303; 1304; AVX512-32-LABEL: test_mul_v16i32_v16i16_minsize: 1305; AVX512-32: # %bb.0: 1306; AVX512-32-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1307; AVX512-32-NEXT: vpmulld {{\.LCPI.*}}{1to16}, %zmm0, %zmm0 1308; AVX512-32-NEXT: retl 1309; 1310; AVX512-64-LABEL: test_mul_v16i32_v16i16_minsize: 1311; AVX512-64: # %bb.0: 1312; AVX512-64-NEXT: vpmovzxwd {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero 1313; AVX512-64-NEXT: vpmulld {{.*}}(%rip){1to16}, %zmm0, %zmm0 1314; AVX512-64-NEXT: retq 1315 %z = zext <16 x i16> %A to <16 x i32> 1316 %m = mul nuw nsw <16 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778, i32 18778> 1317 ret <16 x i32> %m 1318} 1319