1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=i386-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefix=CHECK32 3; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=silvermont | FileCheck %s --check-prefix=CHECK64 4; RUN: llc < %s -mtriple=i386-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE4-32 5; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=SSE4-64 6 7define <4 x i32> @foo(<4 x i8> %A) { 8; CHECK32-LABEL: foo: 9; CHECK32: # BB#0: 10; CHECK32-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0],zero,xmm0[4],zero,xmm0[8],zero,xmm0[12],zero,xmm0[u,u,u,u,u,u,u,u] 11; CHECK32-NEXT: movdqa {{.*#+}} xmm1 = <18778,18778,18778,18778,u,u,u,u> 12; CHECK32-NEXT: movdqa %xmm0, %xmm2 13; CHECK32-NEXT: pmullw %xmm1, %xmm0 14; CHECK32-NEXT: pmulhw %xmm1, %xmm2 15; CHECK32-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 16; CHECK32-NEXT: retl 17; 18; CHECK64-LABEL: foo: 19; CHECK64: # BB#0: 20; CHECK64-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0],zero,xmm0[4],zero,xmm0[8],zero,xmm0[12],zero,xmm0[u,u,u,u,u,u,u,u] 21; CHECK64-NEXT: movdqa {{.*#+}} xmm1 = <18778,18778,18778,18778,u,u,u,u> 22; CHECK64-NEXT: movdqa %xmm0, %xmm2 23; CHECK64-NEXT: pmullw %xmm1, %xmm0 24; CHECK64-NEXT: pmulhw %xmm1, %xmm2 25; CHECK64-NEXT: punpcklwd {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1],xmm0[2],xmm2[2],xmm0[3],xmm2[3] 26; CHECK64-NEXT: retq 27; 28; SSE4-32-LABEL: foo: 29; SSE4-32: # BB#0: 30; SSE4-32-NEXT: pand {{\.LCPI.*}}, %xmm0 31; SSE4-32-NEXT: pmulld {{\.LCPI.*}}, %xmm0 32; SSE4-32-NEXT: retl 33; 34; SSE4-64-LABEL: foo: 35; SSE4-64: # BB#0: 36; SSE4-64-NEXT: pand {{.*}}(%rip), %xmm0 37; SSE4-64-NEXT: pmulld {{.*}}(%rip), %xmm0 38; SSE4-64-NEXT: retq 39 %z = zext <4 x i8> %A to <4 x i32> 40 %m = mul nuw nsw <4 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778> 41 ret <4 x i32> %m 42} 43 44define <4 x i32> @foo_os(<4 x i8> %A) minsize { 45; CHECK32-LABEL: foo_os: 46; CHECK32: # BB#0: 47; CHECK32-NEXT: pand {{\.LCPI.*}}, %xmm0 48; CHECK32-NEXT: pmulld {{\.LCPI.*}}, %xmm0 49; CHECK32-NEXT: retl 50; 51; CHECK64-LABEL: foo_os: 52; CHECK64: # BB#0: 53; CHECK64-NEXT: pand {{.*}}(%rip), %xmm0 54; CHECK64-NEXT: pmulld {{.*}}(%rip), %xmm0 55; CHECK64-NEXT: retq 56; 57; SSE4-32-LABEL: foo_os: 58; SSE4-32: # BB#0: 59; SSE4-32-NEXT: pand {{\.LCPI.*}}, %xmm0 60; SSE4-32-NEXT: pmulld {{\.LCPI.*}}, %xmm0 61; SSE4-32-NEXT: retl 62; 63; SSE4-64-LABEL: foo_os: 64; SSE4-64: # BB#0: 65; SSE4-64-NEXT: pand {{.*}}(%rip), %xmm0 66; SSE4-64-NEXT: pmulld {{.*}}(%rip), %xmm0 67; SSE4-64-NEXT: retq 68 %z = zext <4 x i8> %A to <4 x i32> 69 %m = mul nuw nsw <4 x i32> %z, <i32 18778, i32 18778, i32 18778, i32 18778> 70 ret <4 x i32> %m 71} 72