1; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
2; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s
3
4define i32 @select_0_or_1(i1 %cond) {
5; CHECK-LABEL: select_0_or_1:
6; CHECK:       # BB#0:
7; CHECK-NEXT:    notb %dil
8; CHECK-NEXT:    movzbl %dil, %eax
9; CHECK-NEXT:    andl $1, %eax
10; CHECK-NEXT:    retq
11;
12  %sel = select i1 %cond, i32 0, i32 1
13  ret i32 %sel
14}
15
16define i32 @select_0_or_1_zeroext(i1 zeroext %cond) {
17; CHECK-LABEL: select_0_or_1_zeroext:
18; CHECK:       # BB#0:
19; CHECK-NEXT:    xorb $1, %dil
20; CHECK-NEXT:    movzbl %dil, %eax
21; CHECK-NEXT:    retq
22;
23  %sel = select i1 %cond, i32 0, i32 1
24  ret i32 %sel
25}
26
27define i32 @select_1_or_0(i1 %cond) {
28; CHECK-LABEL: select_1_or_0:
29; CHECK:       # BB#0:
30; CHECK-NEXT:    andl $1, %edi
31; CHECK-NEXT:    movl %edi, %eax
32; CHECK-NEXT:    retq
33;
34  %sel = select i1 %cond, i32 1, i32 0
35  ret i32 %sel
36}
37
38define i32 @select_1_or_0_zeroext(i1 zeroext %cond) {
39; CHECK-LABEL: select_1_or_0_zeroext:
40; CHECK:       # BB#0:
41; CHECK-NEXT:    movzbl %dil, %eax
42; CHECK-NEXT:    retq
43;
44  %sel = select i1 %cond, i32 1, i32 0
45  ret i32 %sel
46}
47
48define i32 @select_0_or_neg1(i1 %cond) {
49; CHECK-LABEL: select_0_or_neg1:
50; CHECK:       # BB#0:
51; CHECK-NEXT:    # kill: %EDI<def> %EDI<kill> %RDI<def>
52; CHECK-NEXT:    andl $1, %edi
53; CHECK-NEXT:    leal -1(%rdi), %eax
54; CHECK-NEXT:    retq
55;
56  %sel = select i1 %cond, i32 0, i32 -1
57  ret i32 %sel
58}
59
60define i32 @select_0_or_neg1_zeroext(i1 zeroext %cond) {
61; CHECK-LABEL: select_0_or_neg1_zeroext:
62; CHECK:       # BB#0:
63; CHECK-NEXT:    movzbl %dil, %eax
64; CHECK-NEXT:    decl %eax
65; CHECK-NEXT:    retq
66;
67  %sel = select i1 %cond, i32 0, i32 -1
68  ret i32 %sel
69}
70
71define i32 @select_neg1_or_0(i1 %cond) {
72; CHECK-LABEL: select_neg1_or_0:
73; CHECK:       # BB#0:
74; CHECK-NEXT:    xorl %ecx, %ecx
75; CHECK-NEXT:    testb $1, %dil
76; CHECK-NEXT:    movl $-1, %eax
77; CHECK-NEXT:    cmovel %ecx, %eax
78; CHECK-NEXT:    retq
79;
80  %sel = select i1 %cond, i32 -1, i32 0
81  ret i32 %sel
82}
83
84define i32 @select_neg1_or_0_zeroext(i1 zeroext %cond) {
85; CHECK-LABEL: select_neg1_or_0_zeroext:
86; CHECK:       # BB#0:
87; CHECK-NEXT:    xorl %ecx, %ecx
88; CHECK-NEXT:    testb %dil, %dil
89; CHECK-NEXT:    movl $-1, %eax
90; CHECK-NEXT:    cmovel %ecx, %eax
91; CHECK-NEXT:    retq
92;
93  %sel = select i1 %cond, i32 -1, i32 0
94  ret i32 %sel
95}
96
97define i64 @select_2_or_inc(i64 %x) {
98; CHECK-LABEL: select_2_or_inc:
99; CHECK:       # BB#0:
100; CHECK-NEXT:    leaq 1(%rdi), %rax
101; CHECK-NEXT:    cmpq $2, %rdi
102; CHECK-NEXT:    cmoveq %rdi, %rax
103; CHECK-NEXT:    retq
104;
105  %cmp = icmp eq i64 %x, 2
106  %add = add i64 %x, 1
107  %retval.0 = select i1 %cmp, i64 2, i64 %add
108  ret i64 %retval.0
109}
110
111