1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-linux -opaque-pointers -mcpu=ivybridge -mattr=+avx2 | FileCheck %s --check-prefixes=IVB 3; RUN: llc < %s -mtriple=x86_64-linux -opaque-pointers -mcpu=haswell | FileCheck %s --check-prefixes=HSW 4 5define <2 x i64> @PR55158(ptr %0) { 6; IVB-LABEL: PR55158: 7; IVB: # %bb.0: 8; IVB-NEXT: vmovdqa 64(%rdi), %xmm0 9; IVB-NEXT: vmovdqa 128(%rdi), %xmm1 10; IVB-NEXT: vpmovsxbd (%rdi), %xmm2 11; IVB-NEXT: vpcmpgtd %xmm2, %xmm1, %xmm1 12; IVB-NEXT: vphsubw %xmm0, %xmm0, %xmm0 13; IVB-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero 14; IVB-NEXT: vpxor %xmm2, %xmm2, %xmm2 15; IVB-NEXT: vpsrlvq %xmm1, %xmm2, %xmm1 16; IVB-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm1[1],xmm0[1] 17; IVB-NEXT: retq 18; 19; HSW-LABEL: PR55158: 20; HSW: # %bb.0: 21; HSW-NEXT: vmovdqa 64(%rdi), %xmm0 22; HSW-NEXT: vmovdqa 128(%rdi), %xmm1 23; HSW-NEXT: vpmovsxbd (%rdi), %xmm2 24; HSW-NEXT: vpcmpgtd %xmm2, %xmm1, %xmm1 25; HSW-NEXT: vphsubw %xmm0, %xmm0, %xmm0 26; HSW-NEXT: vpmovzxdq {{.*#+}} xmm1 = xmm1[0],zero,xmm1[1],zero 27; HSW-NEXT: vpandn {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm2 28; HSW-NEXT: vpsrlvq %xmm1, %xmm2, %xmm1 29; HSW-NEXT: vpunpckhqdq {{.*#+}} xmm0 = xmm1[1],xmm0[1] 30; HSW-NEXT: retq 31 %2 = load <16 x i8>, ptr %0, align 16 32 %3 = getelementptr inbounds i32, ptr %0, i64 16 33 %4 = load <8 x i16>, ptr %3, align 16 34 %5 = getelementptr inbounds i32, ptr %0, i64 32 35 %6 = load <4 x i32>, ptr %5, align 16 36 %7 = shufflevector <16 x i8> %2, <16 x i8> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 37 %8 = sext <4 x i8> %7 to <4 x i32> 38 %9 = icmp sgt <4 x i32> %6, %8 39 %10 = sext <4 x i1> %9 to <4 x i32> 40 %11 = tail call <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16> %4, <8 x i16> %4) 41 %12 = bitcast <8 x i16> %11 to <2 x i64> 42 %13 = shufflevector <4 x i32> %10, <4 x i32> poison, <2 x i32> <i32 0, i32 1> 43 %14 = zext <2 x i32> %13 to <2 x i64> 44 %15 = bitcast <8 x i16> %11 to <16 x i8> 45 %16 = icmp ne <16 x i8> %15, zeroinitializer 46 %17 = sext <16 x i1> %16 to <16 x i8> 47 %18 = shufflevector <16 x i8> %17, <16 x i8> poison, <2 x i32> <i32 0, i32 1> 48 %19 = zext <2 x i8> %18 to <2 x i64> 49 %20 = insertelement <2 x i64> %19, i64 0, i64 1 50 %21 = tail call <2 x i64> @llvm.x86.avx2.psrlv.q(<2 x i64> %20, <2 x i64> %14) 51 %22 = shufflevector <2 x i64> %21, <2 x i64> %12, <2 x i32> <i32 1, i32 3> 52 ret <2 x i64> %22 53} 54declare <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16>, <8 x i16>) 55declare <2 x i64> @llvm.x86.avx2.psrlv.q(<2 x i64>, <2 x i64>) 56