1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py 2; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2 3; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+sse4.2 | FileCheck %s --check-prefixes=SSE,SSE42 4; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1 5; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-SLOW 6; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx2,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX,AVX2,AVX2-FAST 7; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512-SLOW 8; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+avx512f,+fast-variable-shuffle | FileCheck %s --check-prefixes=AVX512,AVX512-FAST 9; RUN: llc < %s -mtriple=x86_64-pc-linux -mattr=+xop | FileCheck %s --check-prefixes=AVX,XOP 10 11define void @insert_v7i8_v2i16_2(<7 x i8> *%a0, <2 x i16> *%a1) nounwind { 12; SSE2-LABEL: insert_v7i8_v2i16_2: 13; SSE2: # %bb.0: 14; SSE2-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 15; SSE2-NEXT: punpcklbw {{.*#+}} xmm0 = xmm0[0,0,1,1,2,2,3,3,4,4,5,5,6,6,7,7] 16; SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 17; SSE2-NEXT: punpcklbw {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1],xmm1[2],xmm0[2],xmm1[3],xmm0[3],xmm1[4],xmm0[4],xmm1[5],xmm0[5],xmm1[6],xmm0[6],xmm1[7],xmm0[7] 18; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,1],xmm1[0,3] 19; SSE2-NEXT: shufps {{.*#+}} xmm0 = xmm0[2,0,1,3] 20; SSE2-NEXT: movaps {{.*#+}} xmm1 = [255,255,255,255,255,255,255,255] 21; SSE2-NEXT: andps %xmm0, %xmm1 22; SSE2-NEXT: packuswb %xmm1, %xmm1 23; SSE2-NEXT: movaps %xmm0, -{{[0-9]+}}(%rsp) 24; SSE2-NEXT: movb -{{[0-9]+}}(%rsp), %al 25; SSE2-NEXT: movb %al, 6(%rdi) 26; SSE2-NEXT: movd %xmm1, (%rdi) 27; SSE2-NEXT: pextrw $2, %xmm1, %eax 28; SSE2-NEXT: movw %ax, 4(%rdi) 29; SSE2-NEXT: retq 30; 31; SSE42-LABEL: insert_v7i8_v2i16_2: 32; SSE42: # %bb.0: 33; SSE42-NEXT: movd {{.*#+}} xmm0 = mem[0],zero,zero,zero 34; SSE42-NEXT: movq {{.*#+}} xmm1 = mem[0],zero 35; SSE42-NEXT: pmovzxbw {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 36; SSE42-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[3],zero,zero,zero 37; SSE42-NEXT: pblendw {{.*#+}} xmm0 = xmm2[0,1],xmm0[2,3,4,5],xmm2[6,7] 38; SSE42-NEXT: packuswb %xmm0, %xmm0 39; SSE42-NEXT: pextrb $6, %xmm1, 6(%rdi) 40; SSE42-NEXT: pextrw $2, %xmm0, 4(%rdi) 41; SSE42-NEXT: movd %xmm0, (%rdi) 42; SSE42-NEXT: retq 43; 44; AVX1-LABEL: insert_v7i8_v2i16_2: 45; AVX1: # %bb.0: 46; AVX1-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero 47; AVX1-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero 48; AVX1-NEXT: vpmovzxbw {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 49; AVX1-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[3],zero,zero,zero 50; AVX1-NEXT: vpblendw {{.*#+}} xmm0 = xmm2[0,1],xmm0[2,3,4,5],xmm2[6,7] 51; AVX1-NEXT: vpackuswb %xmm0, %xmm0, %xmm0 52; AVX1-NEXT: vpextrb $6, %xmm1, 6(%rdi) 53; AVX1-NEXT: vpextrw $2, %xmm0, 4(%rdi) 54; AVX1-NEXT: vmovd %xmm0, (%rdi) 55; AVX1-NEXT: retq 56; 57; AVX2-LABEL: insert_v7i8_v2i16_2: 58; AVX2: # %bb.0: 59; AVX2-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero 60; AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero 61; AVX2-NEXT: vpmovzxbw {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 62; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[3],zero,zero,zero 63; AVX2-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0],xmm0[1,2],xmm2[3] 64; AVX2-NEXT: vpackuswb %xmm0, %xmm0, %xmm0 65; AVX2-NEXT: vpextrb $6, %xmm1, 6(%rdi) 66; AVX2-NEXT: vpextrw $2, %xmm0, 4(%rdi) 67; AVX2-NEXT: vmovd %xmm0, (%rdi) 68; AVX2-NEXT: retq 69; 70; AVX512-LABEL: insert_v7i8_v2i16_2: 71; AVX512: # %bb.0: 72; AVX512-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero 73; AVX512-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero 74; AVX512-NEXT: vpmovzxbw {{.*#+}} xmm2 = xmm1[0],zero,xmm1[1],zero,xmm1[2],zero,xmm1[3],zero,xmm1[4],zero,xmm1[5],zero,xmm1[6],zero,xmm1[7],zero 75; AVX512-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0],zero,zero,zero,xmm0[0],zero,xmm0[1],zero,xmm0[2],zero,xmm0[3],zero,xmm0[3],zero,zero,zero 76; AVX512-NEXT: vpblendd {{.*#+}} xmm0 = xmm2[0],xmm0[1,2],xmm2[3] 77; AVX512-NEXT: vpackuswb %xmm0, %xmm0, %xmm0 78; AVX512-NEXT: vpextrb $6, %xmm1, 6(%rdi) 79; AVX512-NEXT: vpextrw $2, %xmm0, 4(%rdi) 80; AVX512-NEXT: vmovd %xmm0, (%rdi) 81; AVX512-NEXT: retq 82; 83; XOP-LABEL: insert_v7i8_v2i16_2: 84; XOP: # %bb.0: 85; XOP-NEXT: vmovd {{.*#+}} xmm0 = mem[0],zero,zero,zero 86; XOP-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero 87; XOP-NEXT: vpextrb $6, %xmm1, 6(%rdi) 88; XOP-NEXT: insertq {{.*#+}} xmm1 = xmm1[0,1],xmm0[0,1,2,3],xmm1[6,7,u,u,u,u,u,u,u,u] 89; XOP-NEXT: vpextrw $1, %xmm0, 4(%rdi) 90; XOP-NEXT: vmovd %xmm1, (%rdi) 91; XOP-NEXT: retq 92 %1 = load <2 x i16>, <2 x i16> *%a1 93 %2 = bitcast <2 x i16> %1 to <4 x i8> 94 %3 = shufflevector <4 x i8> %2, <4 x i8> undef, <7 x i32> <i32 0, i32 1, i32 2, i32 3, i32 undef, i32 undef, i32 undef> 95 %4 = load <7 x i8>, <7 x i8> *%a0 96 %5 = shufflevector <7 x i8> %4, <7 x i8> %3, <7 x i32> <i32 0, i32 1, i32 7, i32 8, i32 9, i32 10, i32 6> 97 store <7 x i8> %5, <7 x i8>* %a0 98 ret void 99} 100 101%struct.Mat4 = type { %struct.storage } 102%struct.storage = type { [16 x float] } 103 104define void @PR40815(%struct.Mat4* nocapture readonly dereferenceable(64), %struct.Mat4* nocapture dereferenceable(64)) { 105; SSE-LABEL: PR40815: 106; SSE: # %bb.0: 107; SSE-NEXT: movaps (%rdi), %xmm0 108; SSE-NEXT: movaps 16(%rdi), %xmm1 109; SSE-NEXT: movaps 32(%rdi), %xmm2 110; SSE-NEXT: movaps 48(%rdi), %xmm3 111; SSE-NEXT: movaps %xmm3, (%rsi) 112; SSE-NEXT: movaps %xmm2, 16(%rsi) 113; SSE-NEXT: movaps %xmm1, 32(%rsi) 114; SSE-NEXT: movaps %xmm0, 48(%rsi) 115; SSE-NEXT: retq 116; 117; AVX-LABEL: PR40815: 118; AVX: # %bb.0: 119; AVX-NEXT: vmovaps 16(%rdi), %xmm0 120; AVX-NEXT: vmovaps 48(%rdi), %xmm1 121; AVX-NEXT: vinsertf128 $1, 32(%rdi), %ymm1, %ymm1 122; AVX-NEXT: vinsertf128 $1, (%rdi), %ymm0, %ymm0 123; AVX-NEXT: vmovups %ymm1, (%rsi) 124; AVX-NEXT: vmovups %ymm0, 32(%rsi) 125; AVX-NEXT: vzeroupper 126; AVX-NEXT: retq 127; 128; AVX512-LABEL: PR40815: 129; AVX512: # %bb.0: 130; AVX512-NEXT: vmovaps 16(%rdi), %xmm0 131; AVX512-NEXT: vmovaps 48(%rdi), %xmm1 132; AVX512-NEXT: vinsertf128 $1, (%rdi), %ymm0, %ymm0 133; AVX512-NEXT: vinsertf128 $1, 32(%rdi), %ymm1, %ymm1 134; AVX512-NEXT: vinsertf64x4 $1, %ymm0, %zmm1, %zmm0 135; AVX512-NEXT: vmovups %zmm0, (%rsi) 136; AVX512-NEXT: vzeroupper 137; AVX512-NEXT: retq 138 %3 = bitcast %struct.Mat4* %0 to <16 x float>* 139 %4 = load <16 x float>, <16 x float>* %3, align 64 140 %5 = shufflevector <16 x float> %4, <16 x float> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3> 141 %6 = getelementptr inbounds %struct.Mat4, %struct.Mat4* %1, i64 0, i32 0, i32 0, i64 4 142 %7 = bitcast <16 x float> %4 to <4 x i128> 143 %8 = extractelement <4 x i128> %7, i32 1 144 %9 = getelementptr inbounds %struct.Mat4, %struct.Mat4* %1, i64 0, i32 0, i32 0, i64 8 145 %10 = bitcast <16 x float> %4 to <4 x i128> 146 %11 = extractelement <4 x i128> %10, i32 2 147 %12 = getelementptr inbounds %struct.Mat4, %struct.Mat4* %1, i64 0, i32 0, i32 0, i64 12 148 %13 = bitcast float* %12 to <4 x float>* 149 %14 = bitcast <16 x float> %4 to <4 x i128> 150 %15 = extractelement <4 x i128> %14, i32 3 151 %16 = bitcast %struct.Mat4* %1 to i128* 152 store i128 %15, i128* %16, align 16 153 %17 = bitcast float* %6 to i128* 154 store i128 %11, i128* %17, align 16 155 %18 = bitcast float* %9 to i128* 156 store i128 %8, i128* %18, align 16 157 store <4 x float> %5, <4 x float>* %13, align 16 158 ret void 159} 160